NXP PDTC115EE, PDTC115EEF, PDTC115EK, PDTC115EM, PDTC115ES Schematic [ru]
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DATA SH EET
DISCRETE SEMICONDUCTORS
PDTC115E series
NPN resistor-equipped transistors;
R1 = 100 kΩ, R2 = 100 kΩ
Product data sheet
Supersedes data of 2004 Apr 06
2004 Aug 06
NXP Semiconductors Product data sheet
NPN resistor-equipped transistors;
PDTC115E series
R1 = 100 kΩ, R2 = 100 kΩ
FEATURES
• Built-in bias resistors
• Simplified circuit design
• Reduction of component count
• Reduced pick and place costs.
APPLICATIONS
• General purpose switching and amplification
• Inverter and interface circuits
• Circuit driver.
PRODUCT OVERVIEW
PACKAGE
T YPE NUMBER
PHILIPS EIAJ
PDTC115EE SOT416 SC-75 46 PDTA115EE
PDTC115EEF SOT490 SC-89 49 PDTA115EEF
PDTC115EK SOT346 SC-59 56 PDTA115EK
PDTC115EM SOT883 SC-101 DV PDTA115EM
PDTC115ES SOT54 (TO-92) SC-43 TC115E PDTA115ES
PDTC115ET SOT23 − *44
PDTC115EU SOT323 SC-70 *15
QUICK REFERENCE DATA
SYMBOL PARAMETER TYP. MAX. UNIT
V
CEO
I
O
R1 bias resistor 100 − kΩ
R2 bias resistor 100 − kΩ
DESCRIPTION
NPN resistor equipped transistor (see “Simplified outline,
symbol and pinning” for package details).
collector-emitter
voltage
output current (DC) − 20 mA
MARKING CODE PNP COMPLEMENT
(1)
(1)
− 50 V
PDTA115ET
PDTA115EU
Note
1. * = p: Made in Hong Kong.
* = t: Made in Malaysia.
* = W: Made in China.
2004 Aug 06 2
NXP Semiconductors Product data sheet
MAM364
NPN resistor-equipped transistors;
PDTC115E series
R1 = 100 kΩ, R2 = 100 kΩ
SIMPLIFIED OUTLINE, SYMBOL AND PINNING
T YPE NUMBER SIMPLIFIED OUTLINE AND SYMBOL
PDTC115ES 1 base
handbook, halfpage
1
2
3
R1
1
R2
2
3
PDTC115EE 1 base
PDTC115EEF 2 emitter
PDTC115EK 3 collector
handbook, halfpage
PDTC115ET
PDTC115EU
1
Top view
3
2
R1
1
R2
MDB269
3
2
PINNING
PIN DESCRIPTION
2 collector
3 emitter
PDTC115EM 1 base
2 emitter
handbook, halfpage
2
1
bottom view
3
MHC506
R1
1
R2
3
2
3 collector
2004 Aug 06 3
NXP Semiconductors Product data sheet
NPN resistor-equipped transistors;
PDTC115E series
R1 = 100 kΩ, R2 = 100 kΩ
ORDERING INFORMATION
TYPE NUMBER
NAME DESCRIPTION VERSION
PDTC115EE − plastic surface mounted package; 3 leads SOT416
PDTC115EEF − plastic surface mounted package; 3 leads SOT490
PDTC115EK − plastic surface mounted package; 3 leads SOT346
PDTC115EM − leadless ultra small plastic package; 3 solder lands; body
× 0.6 × 0.5 mm
1.0
PDTC115ES − plastic single-ended leaded (through hole) package; 3 leads SOT54
PDTC115ET − plastic surface mounted package; 3 leads SOT23
PDTC115EU − plastic surface mounted package; 3 leads SOT323
LIMITING VALUES
In accordance with the Absolu te Maximum Rating System (IEC 60134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
V
V
V
CBO
CEO
EBO
I
collector-base voltage open emitter − 50 V
collector-emitter voltage open base − 50 V
emitter-base voltage open collector − 10 V
input voltage
positive − +40 V
negative − −10 V
I
I
P
O
CM
tot
output current (DC) − 20 mA
peak collector current − 100 mA
total power dissipation T
amb
≤ 25 °C
SOT54 note 1 − 500 mW
SOT23 note 1 − 250 mW
SOT346 note 1 − 250 mW
SOT323 note 1 − 200 mW
SOT416 note 1 − 150 mW
SOT883 notes 2 and 3 − 250 mW
SOT490 notes 1 and 2 − 250 mW
T
T
T
stg
j
amb
storage temperature −65 +150 °C
junction temperature − 150 °C
operating ambient
temperature
PACKAGE
SOT883
−65 +150 °C
Notes
1. Refer to standard mounting conditions.
2. Reflow soldering is the only recommended soldering method.
3. Refer to SOT883 standard mounting conditions; FR4 with 60 μm copper strip line.
2004 Aug 06 4
NXP Semiconductors Product data sheet
NPN resistor-equipped transistors;
PDTC115E series
R1 = 100 kΩ, R2 = 100 kΩ
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS VALUE UNIT
R
th(j-a)
Notes
1. Refer to standard mounting conditions.
2. Reflow soldering is the only recommended soldering method.
3. Refer to SOT883 standard mounting conditions; FR4 with 60 μm copper strip line.
CHARACTERISTICS
T
= 25 °C unless otherwise specified.
amb
thermal resistance from junction to ambient in free air
SOT54 note 1 250 K/W
SOT23 note 1 500 K/W
SOT346 note 1 500 K/W
SOT323 note 1 625 K/W
SOT416 note 1 833 K/W
SOT833 notes 2 and 3 500 K/W
SOT490 notes 1 and 2 500 K/W
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
CBO
I
CEO
collector-base cut-off curren t VCB = 50 V; IE = 0 A − − 100 nA
collector-emitter cut-off current VCE = 30 V; IB = 0 A − − 1 μA
VCE = 30 V; IB = 0 A; Tj = 150 °C − − 50 μA
I
EBO
h
V
V
V
FE
CEsat
i(off)
i(on)
emitter-base cut-off current VEB = 5 V; IC = 0 A − − 50 μA
DC current gain VCE = 5 V; IC = 5 mA 80 − −
collector-emitter saturation voltage IC = 5 mA; IB = 0.25 mA − − 150 mV
input-off voltage IC = 100 μA; VCE = 5 V − 1.1 0.5 V
input-on voltage IC = 1 mA; VCE = 0.3 V 3 1.5 − V
R1 input resistor 70 100 130 kΩ
R2
------- R1
C
c
resistor ratio 0.8 1 1.2
collector capacitance IE = ie = 0 A; VCB = 10 V;
= 1 MHz
f
− − 2.5 pF
2004 Aug 06 5
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