NSC RCL420AJFQML Datasheet
CLC420
High-Speed, Voltage Feedback Op Amp
General Description
The CLC420 is an operational amplifier designed for applications requiring matched inputs, integration or transimpedance amplification. Utilizing voltage feedback architecture,
the CLC420 offers a 300MHz bandwidth, a 1100V/µs slew
rate and a 4mA supply current (power consumption of
40mW,
±
5V supplies).
Applications such as differential amplifiers will benefit from
70dB common mode rejection ratio and an input offset current of 0.2µA. With its unity-gain stability, 2pA/
current
noise and 3µA of input bias current, the CLC420 is designed
to meet the needs of filter applications and log amplifiers.
The low input offset current and current noise, combined
with a settling time of18ns to 0.01%make the CLC420 ideal
for D/A converters, pin diode receivers and photo multipliers
amplifiers. All applications will find 70dB power supply rejection ratio attractive.
Features
n 300MHz small signal bandwidth
n 1100V/µs slew rate
n Unity-gain stability
n Low distortion, -60dBc at 20MHz
n 0.01%settling in 18ns
n 0.2µA input offset current
n 2pA
current noise
Applications
n Active filters/integrators
n Differential amplifiers
n Pin diode receivers
n Log amplifiers
n D/A converters
n Photo multiplier amplifiers
Connection Diagram
Non-Inverting Frequency Response
DS012752-19
DS012752-18
Pinout
DIP & SOIC
DS012752-20
2nd and 3rd Harmonic Distortion
September 1999
CLC420 High-Speed, Voltage Feedback Op Amp
© 1999 National Semiconductor Corporation DS012752 www.national.com
Ordering Information
Package Temperature Range
Industrial
Packaging
Marking
NSC
Drawing
8-pin plastic DIP −40˚C to +85˚C CLC420AJP N08E
8-pin plastic SOIC −40˚C to +85˚C CLC420AJE
CLC420AJE-TR13
M08A
CLC420
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
)
±
7V
I
OUT
(is short circuit protected to ground,
but maximum reliability will be
maintained if I
OUT
does not exceed
70mA, except A8D, B8D which should
not exceed 35mA over the military
temperature range)..
Common Mode Input Voltage
±
V
CC
Differential Input Voltage 10V
Junction Temperature +150˚C
Operating Temperature Range
AJ: −40˚C to +85˚C
Storage Temperature Range −65˚C to +150˚C
Lead Solder Duration (+300˚C) 10 sec
Electrical Characteristics
A
V
=
+1, V
CC
=
±
5V, R
L
=
100Ω,R
f
=
0Ω; unless specified
Symbol Parameter Conditions Typ Max/Min (Note 2) Units
Ambient Temperature CLC420AJ +25˚C −40˚C +25˚C +85˚
Frequency Domain Response
SSBW -3dB bandwidth V
OUT
<
0..4V
PP
300
>
200>200>130 MHz
LSBW V
OUT
<
5V
PP
40
>
20
>
25
>
20 MHz
SSBWI A
v
=
−1, R
f
=
500Ω V
OUT
<
0.4V
PP
100
>
65
>
65
>
45 MHz
LSBWI A
v
=
−1, R
f
=
500Ω V
OUT
<
5V
PP
60
>
30
>
35
>
30 MHz
gain flatness V
OUT
<
0.4V
PP
GFPL peaking 0.1MHz to
100MHz
0
<
1
<
0.6
<
0.6 dB
GFPH peaking
>
100MHz 0
<
5
<
3
<
3dB
GFR rolloff 0.1MHz to
100MHz
0.2
<
1
<
1
<
2dB
GFRI rolloff, A
v
=
−1, R
f
=
500Ω 0.1MHz to
30MHz
0.2
<
1.4
<
1.4
<
1.6 dB
LPD linear phase deviation 0.1MHz to
100MHz
0.9
<
1.8
<
1.8
<
2.5 ˚
Time Domain Response
TRS rise and fall time 0.4V step 1.2
<
2
<
2
<
3ns
TRL 5V step 1.4
<
25
<
20
<
20 ns
TRSI rise and fall time,A
v
=
−1,
R
f
=
500Ω
0.4V step 3.5
<
5.5
<
5.5
<
7.8 ns
TRLI 5V step 6
<
10
<
9.5
<
10 ns
TSS settling time to
±
0.1
%
2V step 12
<
18
<
18
<
18 ns
TSP
±
0.01
%
2V step 18
<
25
<
25
<
25 ns
OS overshoot 0.4V step 8
<
35
<
25
<
25
%
SR slew rate, A
v
=
+2 5V step 1100
>
600>750>600 V/µs
SRI slew rate, A
v
=
−1, R
f
=
500Ω 5V step 750
>
430>500>430 V/µs
Distortion And Noise Response
HD2 2nd harmonic distortion 2V
PP
, 20MHz −50
<
−40<−40<−40 dBc
HD3 3rd harmonic distortion 2V
PP
, 20MHz −53
<
−45<−45<−40 dBc
HD2 2nd harmonic distortion A
v
=
−1 2V
PP
,
20MHz, R
f
=
500
−51
<
−40<−40<−40 dBc
HD3 3rd harmonic distortion A
v
=
−1,
R
f
=
500Ω2V
PP
,
20MHz, R
f
=
500
−51
<
−40<−40<−35 dBc
input referred noise
VN voltage 1MHz to
200MHz
4.2
<
5.3
<
5.3
<
6 nV/
CLC420
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