NSC LM2413T Datasheet
LM2413
Monolithic Triple 4 ns CRT Driver
General Description
The LM2413 is an integrated high voltage CRT driver circuit
designed for use in high-resolution color monitor applications. The IC contains three high input impedance, wide
band amplifiers, which directly drive the RGB cathodes of a
CRT. Eachchannel has its gain internally set to −14 and can
drive CRT capacitive loads as well as resistive loads present
in other applications, limited only by the package’s power
dissipation.
The IC is packaged in an industry standard 11 lead TO-220
molded plastic power package. See Thermal Considerations
on page 6.
Features
n Rise/Fall times typically 3.7/4.4 with 8 pF load at 40 V
Schematic and Connection Diagrams
n Well matched with LM1282/3 video preamps
n 1V to 5V input range
n Stable with 0–20 pF capacitive loads and inductive
peaking networks
n Convenient TO-220 staggered lead package style
n Standard LM240X Family Pinout which is designed for
easy PCB layout
Applications
n 1600 x 1200 Displays up to 70 Hz Refresh
n Pixel clock frequencies up to 180 MHz
n Monitors using video blanking
PP
LM2413 Monolithic Triple 4 ns CRT Driver
December 1999
DS101275-2
Top View
DS101275-1
FIGURE 1. Simplified Schematic Diagram (One
Channel)
© 1999 National Semiconductor Corporation DS101275 www.national.com
Order Number LM2413T
See NS Package Number TA11C
Absolute Maximum Ratings (Notes 1, 3)
If Military/Aerospace specified devices are required,
LM2413
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage, V
Bias Voltage, V
Input Voltage, V
Storage Temperature Range,T
Lead Temperature (Soldering, ≤10 sec.) 300˚C
ESD Tolerance, Human Body Model 2kV
CC
BB
IN
STG
−65˚C to +150˚C
+90V
+16V
0V to 6V
Machine Model 250V
Operating Ranges (Note 2)
V
CC
V
BB
V
IN
V
OUT
Case Temperature −20˚C to +100˚C
Do not operate the part without a heat sink.
+60V to +85V
+10V to +15V
+1V to +5V
+15 to +75V
Electrical Characteristics (See
Unless otherwise noted: V
Symbol Parameter Conditions
I
I
V
A
∆A
CC
BB
OUT
V
V
Supply Current Per Channel, No Output Load 10 16 22 mA
Bias Current All three channels 15 25 35 mA
DC Output Voltage VIN= 1.9V 62 65 68 V
DC Voltage Gain −12 −14 −16
Gain Matching (Note 4) 1.0 dB
CC
=
+80V, V
BB
=
+12V, V
Figure 2
IN
for Test Circuit)
=
+3.3V, No AC Input, C
=
L
8pF, T
=
60˚C
C
LM2413
Min Typ Max
Units
LE Linearity Error (Notes 4, 5) 3.5
t
R
t
F
OS Overshoot (Note 6) (Note 6), 40 V
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and
test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may
change when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to GND, unless otherwise specified.
Note 4: Calculated value from Voltage Gain test on each channel.
Note 5: Linearity Error is the variation in dc gain from V
Note 6: Input from signal generator: t
Note 7: 100%tested in production. These limits are not used to calculate outgoing quality levels.
Rise Time (Notes 6, 7) 10%to 90%,40VPPOutput (1 MHz) 3.7 4.7 ns
Fall Time (Notes 6, 7) 90%to 10%,40VPPOutput (1 MHz) 4.4 5.4 ns
Output (1 MHz) 5
PP
r,tf
1 ns.
IN
<
=
1.6V to V
=
5V.
IN
AC Test Circuit
DC
%
%
FIGURE 2. Test Circuit (One Channel)
Figure 2
shows a typical test circuit for evaluation of the
LM2413. This circuit is designed to allow testing of the
LM2413 in a 50Ω environment without the use of an expensive FET probe. The combined resistors of 4950Ω at the out-
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DS101275-3
put form a 200:1 voltage divider when connected to a 50Ω
load. The compensation cap is used to flatten the frequency
response of the 200:1 divider.
AC Test Circuit (Continued)
FIGURE 3. VINvs V
OUT
DS101275-4
LM2413
DS101275-7
FIGURE 6. Power Dissipation vs Frequency
FIGURE 4. Speed vs Temp
FIGURE 5. Rise/Fall Time
DS101275-5
DS101275-6
DS101275-8
FIGURE 7. Speed vs Offset
DS101275-9
FIGURE 8. Bandwidth
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Theory of Operation
The LM2413 is a high voltage monolithic three channel CRT
LM2413
driver suitable for very high resolution display applications,
up to 1600 x 1200 at 70 Hz refresh rate. The LM2413 operates using 80V and 12V power supplies. The part is housed
in the industry standard 11-lead TO-220 molded plastic
power package.
The simplified circuit diagram of one channel of the LM2413
is shown in
Figure 1
.APNPemitter follower, Q5, provides input buffering. This minimizes the current loading of the video
pre-amp. R9 is used to turn on Q5 when there is no input.
With Q5 turn on, Q1 will be almost completely off, minimizing
the current flow through Q1 and Q2. This will drive the output
stage near the V
with no inputs. R6 is a pull-up resistor for Q5 and also limits
rail, minimizing the power dissipation
CC
the current flow through Q5. R3 and R2 are used to set the
current flow through Q1 and Q2. The ratio of R1 to R2 is
used to set the gain of the LM2413. R1, R2, and R3 are all
related when calculating the output voltage of the CRT
driver. R
Q2 are in a cascode configuration. Q1 is a low voltage and
limits the current through the base of Q2. Q1 and
b
very fast transistor. Q2 is a higher voltage transistor. The
cascode configuration gives the equivalent of a very fast and
high voltage transistor. The two output transistors, Q3 and
Q4, form a class B amplifier output stage. R4 and R5 are
used to limit the current through the output stage and set the
output impedance of the LM2413. Q6, along with R7 and R8
set the bias current through Q3 and Q4 when there is no
change in the signal level. This bias current minimizes the
crossover distortion of the output stage. With this bias current the output stage now becomes a class AB amplifier with
a crossover distortion much lower than a class B amplifier.
Figure 2
shows a typical test circuit for evaluation of the
LM2413. Due to the very wide bandwidth of the LM2413, a
specially designed output circuit is used with the required series resistor and C
when evaluating the performance of the LM2413 in a 50Ω
to emulate the actual application
LOAD
environment without the use of an expensive FET probe.
The combined resistors of 4950Ω at the output form a 200:1
voltage divider when connected to a 50Ω load. The input signal from the generator is ac coupled to the input of the CRT
driver. V
LM2413.
input sets the DC operating range of the
ADJ
Application Hints
INTRODUCTION
National Semiconductor (NSC) is committed to providing application information that assists our customers in obtaining
the best performance possible from our products. The following information is provided in order to support this commitment. The reader should be aware that the optimization of
performance was done using a specific printed circuit board
designed at NSC. Variations in performance can be realized
due to physical changes in the printed circuit board and the
application. Therefore, the designer should know that component value changes may be required in order to optimize
performance in a given application. The values shown in this
document can be used as a starting point for evaluation purposes. When working with high bandwidth circuits, good layout practices are also critical to achieving maximum performance.
POWER SUPPY BYPASS
Since the LM2413 is a very high bandwidth amplifier, proper
power supply bypassing is critical for optimum performance.
Improper power supply bypassing can result in large overshoot, ringing and oscillation. A 0.1 µF capacitor should be
connected from the supply pin, V
the supply and ground pins as is practical. Additionally, a 10
, to ground, as close to
CC
µF to 100 µF electrolytic capacitor should be connected from
the supply pin to ground. The electrolytic capacitor should
also be placed reasonably close to the LM2413’s supply and
ground pins. A 0.1 µF capacitor should be connected from
the bias pin, V
part.
, to ground, as close as is practical to the
BB
ARC PROTECTION
During normal CRT operation, internal arcing may occasionally occur. Spark gaps, in the range of 200V, connected from
the CRT cathodes to CRT ground will limit the maximum voltage, but to a value that is much higher than allowable on the
LM2413. This fast, high voltage, high-energy pulse can damage the LM2413 output stage. The application circuit shown
in
Figure 9
is designed to help clamp the voltage at the output of the LM2413 to a safe level. The clamp diodes should
have a fast transient response, high peak current rating, low
series impedance and low shunt capacitance. FDH400 or
equivalent diodes are recommended. D1 and D2 should
have short, low impedance connections to V
respectively. The cathode of D1 should be located very close
and ground
CC
to a separately decoupled bypass capacitor. The ground
connection of the diode and the decoupling capacitor should
be very close to the LM2413 ground. This will significantly reduce the high frequency voltage transients that the LM2413
would be subjected to during an arc-over condition. Resistor
R2 limits the arc-over current that is seen by the diodes while
R1 limits the current into the LM2413 as well as the voltage
stress at the outputs of the device. R2 should be a 1/2W
solid carbon type resistor. R1 can be a 1/4W metal or carbon
film type resistor. Inductor L1 is critical to reduce the inital
high frequency voltage levels that the LM2413 would be subjected to during an arc-over. Having large value resistors for
R1 and R2 would be desirable, but this has the effect of increasing rise and fall times. The inductor will not only help
protect the device but it will also help optimize rise and fall
times as well as minimize EMI. For proper arc protection, it is
important to not omit any of the arc protection components
shown in
Figure 9
. The values of L1 and R1 may need to be
adjusted for a particular application. The recommended minimum value for R1 is 110Ω, with L1=.12 µH.
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