NSC LM1290N Datasheet
LM1290
Autosync Horizontal Deflection Processor
LM1290 Autosync Horizontal Deflection Processor
January 1997
General Description
The LM1290 is a high-performance, low-cost deflection solution for autosync monitors.
The LM1290 provides full autosync capability, DC controls
and complete freedom from manufacturing trims. Its continuous capture range is from 22 kHz to 110 kHz (1:5). Mode
change frequency ramping, for protection of the horizontal
deflection output transistor, is programmable by using an external capacitor.
Together with the National Semiconductor LM1296 Raster
Geometry Correction System for Multi-Frequency Displays,
excellent performance is offered. The two-chip solution provides the advantage of good jitter performance, simplified
board layout, and lower system cost.
The LM1290 is packaged in a 14-pin plastic DIP package.
Connection Diagram
FIGURE 1.
Order Number LM1290N
See NS Package Number N14A
Features
n Full autosync—22 kHz to 110 kHz with no component
switching or external adjustments
n No manufacturing trims needed—internal VCO
capacitor trimmed on chip
n Sample-and-hold circuit for fast top-of-screen phase
recovery, even when using composite sync
n DC-controlled H phase and duty cycle
n Resistor-programmable minimum VCO frequency
n Excellent jitter performance
n X-ray input disables H drive until V
n Low V
n H output transistor protected against accidental turn on
during flyback
n Capacitor-programmable frequency ramping, d
protects H output transistor during scanning mode
changes
disables H drive (V
CC
DS012917-1
CC
powered down
CC
<
8.5V)
f
VCO
/dt
,
© 1999 National Semiconductor Corporation DS012917 www.national.com
Absolute Maximum Ratings (Notes 1, 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
Input Voltage (V
Pin 1 8V
Pins 3, 4, 5, 6 V
Pin 10 1.0V<V
Pin 12 10V
Output Sink Current, Pin 7 130 mA
Power Dissipation (P
(Above 25˚C, derate based on θ
and TJ) 1.65W
) 15V
CC
)
DC
)
D
JA
CC
<
7.5V
DC
Thermal Resistance (θ
Junction Temperature (T
) 75˚C/W
JA
) 150˚C
J
ESD Susceptibility (Note 5) 3.5 kV
Storage Temperature −65˚C to +150˚C
Lead Temperature
(Soldering 10 seconds) 265˚C
Operating Ratings (Note 2)
Operating Temperature Range −20˚C to +80˚C
Supply Voltage 10.8V ≤ V
CC
≤ 13.2V
Electrical Characteristics
See Test Circuit (
Figure 2
);T
A
=
25˚C; V
Parameter Condition Typical Limit Units
Supply Current (Pin 14) Pin 3 and Pin 7 Open Circuit, 30 40 mA (max)
Minimum Capture Frequency H Sync Duty Cycle=10%; 10 22 kHz (max)
Maximum Capture Frequency Pin 1 (f
H/HV SYNC Input (Pin 3) High Level 2.2 V (min)
Threshold Voltage Low Level 0.8 V (max)
H/HV SYNC Input (Pin 3) 26 24
Maximum Sync Tip Duty Cycle
H/HV SYNC Input (Pin 3) f
Minimum Sync Tip Duty Cycle
H/HV POLARITY (Pin 2) C
Low Level Output Voltage, V
OL
H/HV POLARITY (Pin 2) C
High Level Output Voltage, V
OH
FVC Gain 22 kHz ≤ fH≤ 110 kHz 0.055 V/kHz
VCO Gain 22 kHz ≤ f
Phase Detector 1 Gain H Sync Duty Cycle=10%:
Phase Detector 1 Output Impedance 20 kΩ
(Pin 12)
Phase Detector 1 Leakage Current + H/HV SYNC Input Grounded 0.3 2 µA
VCO Bias Current (Pin 12)
Jitter f
Free Run Frequency Variation I
H Drive Phase Control Gain V
=
CC
12V; V
=
0V unless otherwise stated.
5
(Note 6) (Note 7)
Pin 1=−100 µA
) Open 115 110 kHz (min)
MIN
=
22 kHz 5
H
=
0.1 µF; I
POL
=
0.1 µF; I
POL
=
f
110 kHz 120
H
=
f
60 kHz 80
H
=
f
22 kHz 30
H
=
110 kHz (Note 8) 0.9
H
=
90 kHz 1.1
f
H
=
f
60 kHz 1.6
H
=
f
31 kHz 3.6
H
=
f
22 kHz 5.8
H
=
−225 µA 32 34 kHz (max)
1
=
+1 µA 0.05 0.4 V (max)
OL
=
−1 µA 4.5 4 V (min)
OL
≤ 110 kHz 18.2 kHz/V
VCO
26 25 kHz (min)
=
2V to 6V (Note 11) 8.89
10
(32) (˚/V)
%
%
µA/radian
ns p-p
%
/V
T
H
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Electrical Characteristics (Continued)
See Test Circuit (
Figure 2
);T
A
=
25˚C; V
Parameter Condition Typical Limit Units
H Drive Phase Control Range V
H Drive Duty Cycle Control Gain V
H Drive Duty Cycle Maximum (Pin 7) V
H Drive Duty Cycle Minimum (Pin 7) V
H Drive Low Level Output Voltage (Pin 7) I
Flyback Input Threshold Voltage (Pin 6) Positive-Going Flyback Pulse 2.2 V
Maximum Allowable Storage Delay of From H Drive Rising Edge to
Horizontal Deflection Output Transistor Center of Flyback Pulse 30
Plus Half of Flyback Pulse Width
V
Lockout Threshold Voltage VCCBelow Threshold: 8.5 V (max)
CC
(Pin 14) H Drive Output Disabled
X-Ray Shutdown Threshold Voltage Above Threshold: 1.85 2 V (min)
(Pin 5) H Drive Output Disabled
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and
test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to GND, unless otherwise specified.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any elevated temperature is P
this device, T
Note 5: Human Body model, 100 pF capacitor discharged through a 1.5 kΩ resistor.
Note 6: Typical specifications are at T
Note 7: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: The standard deviation, σ, of the flyback pulse period is measured with a HP 53310A Modulation Domain Analyzer.Peak-to-peak jitter of the flyback pulse
is defined by 6σ.
Note 9: A positive phase value represents a phase lead of the flyback pulse peak with reference to the center of H sync.
Note 10: The duty cycle is measured under the conditions of free run with I
and the turn off delay of the H deflection output transistor respectively.
Note 11: T
=
150˚C. The typical thermal resistance (θ
JMAX
=
25˚C and represent most likely parametric norm.
A
is defined as the total time of one horizontal line.
H
=
CC
12V; V
=
0V unless otherwise stated.
5
(Note 6) (Note 7)
=
3.6V to 7V (Notes 9, 11)
10
±
14
(See Application Hint#3)
=
0V to 4V (Note 10) 10.8
4
=
0V (Note 10) 68 63
4
=
4V (Note 10) 25 35
4
=
100 mA 0.7 V
OL
V
Above Threshold: 10.5 V (min)
CC
H Drive Output Enabled
, θJAand the ambient temperature, TA. The maximum
=
3 µs and T
JMAX
=
d
3.5 µs where T
and Tdare the flyback pulse width
FBP
=
(T
D
) of the LM1290N is 75˚C/W.
JA
)/θJAor the number given in the Absolute Maximum Ratings, whichever is lower. For
JMAX−TA
=
−100 µA,T
1
FBP
%
%
%
T
%
/V
(min)
(max)
%
T
H
H
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