NSC DS8641N Datasheet
DS8641
Quad Unified Bus Transceiver
DS8641 Quad Unified Bus Transceiver
January 1996
General Description
The DS8641 is a quad high speed drivers/receivers designed for use in bus organized data transmission systems
interconnected by terminated 120Ω impedance lines. The
external termination is intended to be a 180Ω resistor from
the busto the +5V logic supply together with a 390Ω resistor
from thebus toground. The bus canbe terminatedat oneor
both ends. Low bus pin current allows up to 27 driver/
receiver pairs to utilize a common bus. The bus loading is
unchanged when V
thresholds for betterbus noise immunity. One two-inputNOR
gate is included to disable all drivers in a package simultaneously.
=
0V. The receivers incorporate tight
CC
Connection Diagram
Dual-In-Line Package
Features
n 4 separate driver/receiver pairs per package
n Guaranteed minimum bus noise immunity of 0.6V, 1.1V
typ
n Temperature insensitive receiver thresholds track bus
logic levels
n 30 µA typical bus terminal current with normal V
n Open collector driver output allows wire-OR connection
n High speed
n Series 74 TTL compatible driver and disable inputs and
=
with V
receiver outputs
0V
CC
or
CC
DS005806-1
Top View
Order Number DS8641N
See NS Package Number N16A
© 1999 National Semiconductor Corporation DS005806 www.national.com
Typical Application
DS005806-2
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