The CLC5957 is a monolithic 12-bit, 70MSPS analog-to-digital
converter. The device has been optimized for use in IF-sampled
digital receivers and other applications where high resolution,
high sampling rate, wide dynamic range, low power dissipation,
and compact size are required. The CLC5957 features differential
analog inputs, low jitter differential universal clock inputs, a low
distortion track-and-hold with 0-300MHz input bandwidth, a bandgap voltage reference, data valid clock output, TTL compatible
CMOS (3.3V or 2.5V) programmable output logic, and a proprietary 12-bit multi-stage quantizer. The CLC5957 is fabricated on
the ABIC-V 0.8 micron BiCMOS process.
The CLC5957 features a 74dBc spurious free dynamic range
(SFDR) and a 67dB signal to noise ratio (SNR). The wideband
track-and-hold allows sampling of IF signals to greater than
250MHz. The part produces two-tone, dithered, SFDR of 83dBFS
at 75MHz input frequency. The differential analog input provides
excellent common mode rejection, while the differential universal
clock inputs minimize jitter. The 48-pin TSSOP package provides
an extremely small footprint for applications where space is a
critical consideration. The CLC5957 operates from a single +5V
power supply. Operation over the industrial temperature range of
-40°C to +85°C is guaranteed. National Semiconductor tests
each part to verify compliance with the guaranteed specifications.
maximum conversion rateFull7075MSPS1
minimum conversion rate+25°C10MSPS
pulse width highFull7.2ns
pulse width lowFull7.2ns
pipeline latencyFull3.0clk cycle
falling ENCODE to output change (50%) (Tod)+25°C10ns
rising ENCODE to DAV change (50%) (Tdv)+25°C9.6ns
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2
CLC5957 Electrical Characteristics(V
= +5V, 66MSPS; unless specified) (T
cc
= -40°C, T
min
= +85°C)
max
PARAMETERSCONDITIONS TEMPRATINGSUNITSNOTES
MIN TYPMAX2
POWER REQUIREMENTS
+5V supply currentFull128150mA1
Power dissipationFull640750mW1
V
power supply rejection ratio+25°C64dB
CC
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
Notes
1) These parameters are 100% tested at 25°C. Sample tested at full
temperature range.
2) Typical specifications are based on the mean test values of
deliverable converters from the first three diffusion lots.
Absolute Maximum Ratings
positive supply voltage (V
differential voltage between any two grounds<100mV
analog input voltage rangeGND to V
digital input voltage range-0.5V to +V
output short circuit duration (one-pin to ground)infinite
junction temperature175°C
storage temperature range-65°C to 150°C
lead solder duration (+300°C)10sec
Note: Absolute maximum ratings are limiting values , to be applied individually, and
beyond which the serviceability of the circuit may be impaired. Functional
operability under any of these conditions is not necessarily implied. Exposure to
maximum ratings for extended periods may affect device reliability.
) -0.5V to +6V
cc
3) See page 7, Figure 3 for ENCODE Inputs circuit.
Recommended Operating Conditions
positive supply voltage (V
analog input voltage range2.048V
operating temperature range-40°C to +85°C
cc
cc
)+5V ±5%
cc
Pac kage Thermal Resistance
Package
48-pin TSSOP56°C/W16°C/W
θ
JA
Reliability Information
Transistor count5000
diff.
pp
θ
JC
Ordering Information
ModelTemperature RangeDescription
CLC5957MTD-40°C to +85°C48-pin TSSOP
CLC5957PCASMFully loaded evaluation board with CLC5957 … ready for test.
ANALOG
INPUT
Ta = -410ps
ENCODE
CLOCK
DAV
CLOCK
DATA
OUTPUT
N
N
Tdv = 9.6ns
N+1
N+1N+2
Tod = 10ns
N-3N-2N-1
N+2
CLC5957 Timing Diagram
3
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CLC5957 Typical Performance Characteristics(V
= +5V)
cc
SNR and SFDR vs. Input Frequency
85
80
75
70
65
60
SFDR
SNR
55
50
45
SNR (dBFS) and SFDR (dBc)
40
0
100
Fs = 66MSPS
A
in
Input Frequency (MHz)
SNR and SFDR vs. Input Frequency
85
80
75
70
SNR
65
SFDR
60
55
50
100
Fs = 40.96MSPS
A
in
45
SNR (dBFS) and SFDR (dBc)
40
0
Input Frequency (MHz)
= -3dBFS
200
= -3dBFS
200
300
300
SNR and SFDR vs. Input Frequency
85
80
75
70
65
SNR
SFDR
60
55
50
45
SNR (dBFS) and SFDR (dBc)
40
0
100
Fs = 52MSPS
= -3dBFS
A
in
200
Input Frequency (MHz)
SNR and SFDR vs. Sample Rate
90
Fin = 24.5MHz
85
80
SFDR
75
70
65
SNR
60
55
SNR (dBc) and SFDR (dBc)
50
4050607080
Sample Rate (MSPS)
300
Single Tone Output Spectrum
0
-10
-20
-30
-40
-50
-60
-70
Output Level (dBFS)
-80
-90
-100
Fs = 66MSPS
= -1dBFS
A
in
F
= 24.5MHz
in
05101535
20
25
Frequency (MHz)
Differential Non-Linearity
1.0
0.5
0
Fs = 66MSPS
F
= 5MHz
in
DNL (LSBs)
-0.5
-1.0
0512 1024 15363584
2048
2560
Output Code
3072
Single Tone Output Spectrum (w/Dither)
0
-10
-20
-30
-40
-50
-60
-70
Output Level (dBFS)
-80
-90
-100
30
Fs = 66MSPS
= - 6dBFS
A
in
F
= 24.5MHz
in
Dither Signal = 500kHz @ - 28dBFS
05101535
20
30
25
Frequency (MHz)
Integral Non-Linearity
4096
2.0
1.5
1.0
0.5
0
-0.5
INL (LSBs)
-1.0
-1.5
-2.0
Fs = 66MSPS
F
= 5MHz
in
0512 1024 15363584
2048
2560
3072
4096
Output Code
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