NSC CLC5956IMTD Datasheet
CLC5956
12-bit, 65 MSPS Broadband Monolithic A/D Converter
CLC5956 12-bit, 65 MSPS Broadband Monolithic A/D Converter
June 1999
General Description
The CLC5956 is a monolithic 12-bit, 65 MSPS
analog-to-digital converter subsystem. The device has been
optimized for use in cellularbase stations and other applications where high resolution, high sampling rate, wide dynamic range, low power dissipation, and compact size are
required. The CLC5956 features differential analog inputs,
low jitter differential PECL clock inputs, a low distortion
track-and-hold with DC to 300 MHz input bandwidth, a bandgap voltage reference, TTL compatible CMOS output logic,
and a proprietary 12-bit multi-stage quantizer. The CLC5956
is fabricated on the ABIC-IV 0.8 micron BiCMOS process.
The part features a 73 dB spurious free dynamic range
(SFDR) and 67 dB SNR. The wideband track-and-hold allows sampling of IF signals to greater than 250 MHz. The
part produces two-tone, dithered, spurious-free dynamic
range of 83 dBFS at 75 MHz input frequency.The differential
analog input provides excellent common-mode rejection,
while the differential PECL clock inputs permit the use of balanced transmission to minimize jitter in distributed systems.
The 48-pin TSSOP package provides an extremely small
footprint for applications where space is a critical consideration. The CLC5956 operates from a single +5V power supply over the industrial temperature range of −40˚C to +85˚C.
National thoroughly tests each part to verify full compliance
with the guaranteed specifications.
Block Diagram
Features
n Wide dynamic range
n IF sampling capability
n 300 MHz input bandwidth
n Small 48-pin TSSOP
n Single +5V supply
n Low cost
Key Specifications
n Sample Rate 65 MSPS
n SFDR 73 dBc
n SFDR with dither 85 dBFS
n SNR 67 dB
n Low power consumption 615 mW
Applications
n Cellular base-stations
n Digital communications
n Infrared/CCD imaging
n IF sampling
n Electro-optics
n Instrumentation
n Medical imaging
n High definition video
DS015011-2
© 1999 National Semiconductor Corporation DS015011 www.national.com
Pin Configuration Ordering Information
CLC5956IMTD 48-Pin TSSOP
CLC5956IMTDX 48-Pin TSSOP (Taped Reel)
CLC5956PCASM Evaluation Board
DS015011-1
Pin Descriptions
Pin
Name
A
IN
A
IN
ENCODE
ENCODE
Pin
No.
13, 14
9, 10
Differential input with a common mode voltage of +2.4V. The ADC
full scale input is 1.024 VPPon each of the complimentary input
signals.
Differential clock where ENCODE initiates a new data conversion
cycle on each rising edge. Logic for these inputs are a 50%duty
cycle differential PECL signal.
Internal common mode voltage reference. Nominally +2.4V. Can
VCM 21
be used for the input common mode voltage. This voltage is
derived from an internal bandgap reference.
D0–D11
GND
+AV
CC
+DV
CC
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30–34,
39–45
1–4, 8, 11, 12, 15, 19,
20, 23–26, 35, 36, 47, 48
5–7, 16–18, 22
37, 38, 46
Digital data outputs are CMOS and TTL compatible. D0 is the LSB
and D11 is the MSB. MSB is inverted. Output coding is two’s
complement.
Circuit ground.
+5V power supply for the analog section. Bypass to ground with a
0.1 µF capacitor.
+5V power supply for the digital section. Bypass to ground with a
0.1 µF capacitor.
Description
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Positive Supply Voltage (V
Differential Voltage between any Two
Grounds
Analog Input Voltage Range GND to V
Digital Input Voltage Range −0.5V to +V
Output Short Circuit Duration (one-pin
to ground) Infinite
) −0.5V to +6V
CC
<
200 mV
Recommended Operating
Conditions
Positive Supply Voltage (VCC) +5V±5
Analog Input Voltage Range 2.048 V
Operating Temperature Range −40˚C to +85˚C
CC
Package Thermal Resistance (Note 6)
CC
Package θ
JA
48-Pin TSSOP 56˚C/W 16˚C/W
diff.
PP
θ
JC
Junction Temperature (Note 6) 175˚C
Storage Temperature Range −65˚C to +150˚C
Lead Solder Duration (+300˚C) 10 sec.
Reliability Information
Transistor Count 5000
Converter Electrical Characteristics
=
The following specifications apply for AV
limits apply for T
=
=
T
min
−40˚C to T
A
CC
max
=
DV
+5V, 52 MSPS, 50%Encode Clock Duty Cycle, C
CC
=
+85˚C, all other limits T
=
25˚C (Notes 2, 3, 4).
A
Symbol Parameter Conditions Min Typ Max Units
DYNAMIC PERFORMANCE
BW Large-Signal Bandwidth V
Overvoltage Recovery Time V
t
DS
t
AJ
Effective Aperture Delay −0.21 ns
Aperture Jitter 0.4 ps(rms)
=FS−3dB 300 MHz
IN
=
1.5 FS (0.01%)12ns
IN
NOISE AND DISTORTION
=
f
20 MHz, FS −1 dB 63 66 dBFS
IN
=
f
5 MHz, FS −3 dB 67 dBFS
IN
=
f
SNR
SFDR
IMD
Signal-to-Noise Ratio (without
harmonics)
Spurious-Free Dynamic Range
Spurious-Free Dynamic Range
(dithered)
Intermodulation Distortion
Intermodulation Distortion
(dithered)
25 MHz, FS −3 dB 66 dBFS
IN
=
f
75 MHz, FS −3 dB 64 dBFS
IN
=
f
150 MHz, FS −3 dB 62 dBFS
IN
=
f
250 MHz, FS −3 dB 59 dBFS
IN
=
f
20 MHz, FS −1 dB 66 70 dBc
IN
=
f
5 MHz, FS −3 dB 73 dBc
IN
=
f
25 MHz, FS −3 dB 70 dBc
IN
=
f
75 MHz, FS −3 dB 68 dBc
IN
=
f
150 MHz, FS −3 dB 58 dBc
IN
=
f
250 MHz, FS −3 dB 55 dBc
IN
=
f
19 MHz, FS −6 dB 85 dBFS
IN
=
149.84 MHz, f
f
1
MHz, FS −10 dB
=
249.86 MHz, f
f
1
MHz, FS −10 dB
=
74 MHz, f
f
1
−12 dB
2
2
=
75 MHz, FS
2
=
=
149.7
249.69
DC ACCURACY AND PERFORMANCE
DNL Differential Non-Linearity DC; Full Scale 0.65 LSB
INL Integral Non-Linearity DC; Full Scale 1.7 LSB
Bipolar Offset Error −1 mV
Bipolar Gain Error −0.1
ANALOG INPUTS
V
IN
RIN(SE)
Analog Diff Input Voltage Range 2.048 V
Analog Input Resistance
(Single-Ended)
=
7 pF. Boldface
L
68 dBFS
58 dBFS
83 dBFS
%
500 Ω
PP
%
FS
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