NSC ADC08100MWC, ADC08100MDC, ADC08100EVAL, ADC08100CIMTC Datasheet
ADC08100
8-Bit, 20 MSPS to 100 MSPS, 1.3 mW/MSPS A/D
Converter
General Description
The ADC08100 is a low-power, 8-bit, monolithic analog-todigital converter with an on-chip track-and-hold circuit. Optimized for low cost, low power, small size and ease of use,
this product operates at conversion rates of 20 MSPS to
100 MSPS with outstanding dynamic performance over its
full operating range while consuming just 1.3 mW per MHz of
clock frequency. That’s just 130 mW of power at 100 MSPS.
Raising the PD pin puts the ADC08100 into a Power Down
mode where it consumes just 1 mW.
The unique architecture achieves 7.4 Effective Bits with
41 MHz input frequency. The excellent DC and AC characteristics of this device, together with its low power consumption and single +3V supply operation, make it ideally suited
for many imaging and communications applications, including use in portable equipment. Furthermore, the ADC08100
is resistant to latch-up and the outputs are short-circuit proof.
The top and bottom of the ADC08100’s reference ladder are
available for connections, enabling a wide range of input
possibilities. The digital outputs are TTL/CMOS compatible
with a separate output power supply pin to support interfacing with 3V or 2.5V logic. The digital inputs (CLK and PD) are
TTL/CMOS compatible.
The ADC08100 is offered in a 24-lead plastic package
(TSSOP) and is specified over the industrial temperature
range of −40˚C to +85˚C.
Features
n Single-ended input
n Internal sample-and-hold function
n Low voltage (single +3V) operation
n Small package
n Power-down feature
Key Specifications
n Resolution 8 bits
n Maximum sampling frequency 100 MSPS (min)
n DNL 0.4 LSB (typ)
n ENOB 7.4 bits (typ) at f
IN
=41MHz
n THD −60 dB (typ)
n Guaranteed no missing codes
n Power consumption
— Operating: 1.3 mW/MSPS (typ)
— Power down: 1 mW (typ)
Applications
n Flat panel displays
n Projection systems
n Set-top boxes
n Battery-powered instruments
n Communications
n Medical scan converters
n X-ray imaging
n High speed viterbi decoders
n Astronomy
Pin Configuration
10137101
December 2002
ADC08100 8-Bit, 100 MSPS, 1.3 mW/MSPS A/D Converter
© 2002 National Semiconductor Corporation DS101371 www.national.com
Ordering Information
ADC08100CIMT TSSOP
ADC08100CIMTX TSSOP (tape and reel)
Block Diagram
10137102
Pin Descriptions and Equivalent Circuits
Pin No. Symbol Equivalent Circuit Description
6V
IN
Analog signal input. Conversion range is VRBto VRT.
3V
RT
Analog Input that is the high (top) side of the reference
ladder of the ADC. Nominal range is 1.0V to V
A
. Voltage
on V
RT
and VRBinputs define the VINconversion range.
Bypass well. See Section 2.0 for more information.
9V
RM
Mid-point of the reference ladder. This pin should be
bypassed to a clean, quiet point in the analog ground
plane with a 0.1 µF capacitor.
10 V
RB
Analog Input that is the low side (bottom) of the
reference ladder of the ADC. Nominal range is 0.0V to
(V
RT
– 1.0V). Voltage on VRTand VRBinputs define the
V
IN
conversion range. Bypass well. See Section 2.0 for
more information.
ADC08100
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Pin Descriptions and Equivalent Circuits (Continued)
Pin No. Symbol Equivalent Circuit Description
23 PD
Power Down input. When this pin is high, the converter is
in the Power Down mode and the data output pins hold
the last conversion result.
24 CLK
CMOS/TTL compatible digital clock Input. V
IN
is sampled
on the falling edge of CLK input.
13 thru 16
and
19 thru 22
D0–D7
Conversion data digital Output pins. D0 is the LSB, D7 is
the MSB. Valid data is output just after the rising edge of
the CLK input.
7V
IN
GND Reference ground for the single-ended analog input, VIN.
1, 4, 12 V
A
Positive analog supply pin. Connect to a clean, quiet
voltage source of +3V. V
A
should be bypassed with a
0.1 µF ceramic chip capacitor for each pin, plus one
10 µF capacitor. See Section 3.0 for more information.
18 DR V
D
Power supply for the output drivers. If connected to VA,
decouple well from V
A
.
17 DR GND The ground return for the output driver supply.
2, 5, 8, 11 AGND The ground return for the analog supply.
ADC08100
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Absolute Maximum Ratings (Notes 1,
2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
A
) 3.8V
Driver Supply Voltage (DR V
D
)V
A
+ 0.3V
Voltage on Any Input or Output Pin −0.3V to V
A
Reference Voltage (VRT,VRB)V
A
to AGND
CLK, OE Voltage Range
−0.3V to
(V
A
+ 0.3V)
Digital Output Voltage (V
OH,VOL
) DR GND to DR V
D
Input Current at Any Pin (Note 3)
±
25 mA
Package Input Current (Note 3)
±
50 mA
Power Dissipation at T
A
= 25˚C See (Note 4)
ESD Susceptibility (Note 5)
Human Body Model
Machine Model
2500V
250V
Soldering Temperature, Infrared,
10 seconds (Note 6) 235˚C
Storage Temperature −65˚C to +150˚C
Operating Ratings (Notes 1, 2)
Operating Temperature Range −40˚C ≤ T
A
≤ +85˚C
Supply Voltage (V
A
) +2.7V to +3.6V
Driver Supply Voltage (DR V
D
) +2.4V to V
A
Ground Difference |GND - DR GND| 0V to 300 mV
Upper Reference Voltage (V
RT
) 1.0V to (VA+ 0.1V)
Lower Reference Voltage (V
RB
) 0Vto(VRT− 1.0V)
V
IN
Voltage Range VRBto V
RT
Converter Electrical Characteristics
The following specifications apply for VA=DRVD= +3.0VDC,VRT= +1.9V, VRB= 0.3V, CL= 10 pF, f
CLK
= 100 MHz at 50%
duty cycle. Boldface limits apply for T
A=TMIN
to T
MAX
: all other limits TA= 25˚C (Notes 7, 8)
Symbol Parameter Conditions
Typical
(Note 9)
Limits
(Note 9)
Units
(Limits)
DC ACCURACY
INL Integral Non-Linearity
±
0.5
±
1.3 LSB (max)
DNL Differential Non-Linearity
±
0.4
+1.0
−0.95
LSB (max)
LSB (min)
Missing Codes 0 (max)
FSE Full Scale Error 18
±
28 mV (max)
V
OFF
Zero Scale Offset Error 26
±
35 mV (max)
ANALOG INPUT AND REFERENCE CHARACTERISTICS
V
IN
Input Voltage 1.6
V
RB
V (min)
V
RT
V (max)
C
IN
VINInput Capacitance
V
IN
= 0.75V +0.5
Vrms
(CLK LOW) 3 pF
(CLK HIGH) 4 pF
R
IN
RINInput Resistance
>
1MΩ
BW Full Power Bandwidth 200 MHz
V
RT
Top Reference Voltage 1.9
V
A
V (max)
1.0 V (min)
V
RB
Bottom Reference Voltage 0.3
V
RT
− 1.0 V (max)
0 V (min)
V
RT
-
V
RB
Reference Delta 1.6
1.0 V (min)
2.3 V(max)
R
REF
Reference Ladder Resistance VRTto V
RB
220
150 Ω (min)
300 Ω (max)
I
REF
Reference Ladder Current 7.3
5.3 mA (min)
10.6 mA (max)
CLK, PD DIGITAL INPUT CHARACTERISTICS
V
IH
Logical High Input Voltage DR VD=VA= 3.3V 2.0 V (min)
V
IL
Logical Low Input Voltage DR VD=VA= 2.7V 0.8 V (max)
I
IH
Logical High Input Current VIH=DRVD=VA= 3.3V 10 nA
ADC08100
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Converter Electrical Characteristics (Continued)
The following specifications apply for VA=DRVD= +3.0VDC,VRT= +1.9V, VRB= 0.3V, CL= 10 pF, f
CLK
= 100 MHz at 50%
duty cycle. Boldface limits apply for T
A=TMIN
to T
MAX
: all other limits TA= 25˚C (Notes 7, 8)
Symbol Parameter Conditions
Typical
(Note 9)
Limits
(Note 9)
Units
(Limits)
CLK, PD DIGITAL INPUT CHARACTERISTICS
I
IL
Logical Low Input Current VIL= 0V, DR VD=VA= 2.7V −50 nA
C
IN
Logic Input Capacitance 3 pF
DIGITAL OUTPUT CHARACTERISTICS
V
OH
High Level Output Voltage VA=DRVD= 2.7V, IOH= −400 µA 2.6 2.4 V (min)
V
OL
Low Level Output Voltage VA=DRVD= 2.7V, IOL= 1.0 mA 0.4 0.5 V (max)
DYNAMIC PERFORMANCE
ENOB Effective Number of Bits
f
IN
= 4 MHz, VIN= FS − 0.25 dB 7.5 Bits
f
IN
= 10 MHz, VIN= FS − 0.25 dB 7.5 7.0 Bits (min)
f
IN
= 41 MHz, VIN= FS − 0.25 dB,
T
A
= 25˚C
7.3 6.9 Bits (min)
f
IN
= 41 MHz, VIN= FS − 0.25 dB, T
A
=T
MIN
to T
MAX
7.3 6.8 Bits (min)
f
IN
= 49.8 MHz, VIN= FS − 0.25 dB 7.2 Bits
SINAD Signal-to-Noise & Distortion
f
IN
= 4 MHz, VIN= FS − 0.25 dB 47 dB
f
IN
= 10 MHz, VIN= FS − 0.25 dB 47 43.9 dB (min)
f
IN
= 41 MHz, VIN= FS − 0.25 dB,
T
A
= 25˚C
46 43.3 dB (min)
f
IN
= 41 MHz, VIN= FS − 0.25 dB, T
A
=T
MIN
to T
MAX
46 42.7 dB (min)
f
IN
= 49.8 MHz, VIN= FS − 0.25 dB 45 dB
SNR Signal-to-Noise Ratio
f
IN
= 4 MHz, VIN= FS − 0.25 dB 47 dB
f
IN
= 10 MHz, VIN= FS − 0.25 dB 47 44 dB (min)
f
IN
= 41 MHz, VIN= FS − 0.25 dB 46.5 42.8 dB (min)
f
IN
= 49.8 MHz, VIN= FS − 0.25 dB 45.8 dB
SFDR Spurious Free Dynamic Range
f
IN
= 4 MHz, VIN= FS − 0.25 dB 61 dBc
f
IN
= 10 MHz, VIN= FS − 0.25 dB 60 dBc
f
IN
= 41 MHz, VIN= FS − 0.25 dB 63 dBc
f
IN
= 49.8 MHz, VIN= FS − 0.25 dB 54 dBc
THD Total Harmonic Distortion
f
IN
= 4 MHz, VIN= FS − 0.25 dB −61 dBc
f
IN
= 10 MHz, VIN= FS − 0.25 dB −60 dBc
f
IN
= 41 MHz, VIN= FS − 0.25 dB -60 dBc
f
IN
= 49.8 MHz, VIN= FS − 0.25 dB −54 dBc
HD2 2nd Harmonic Distortion
f
IN
= 4 MHz, VIN= FS − 0.25 dB -62 dBc
f
IN
= 10 MHz, VIN= FS − 0.25 dB −60 dBc
f
IN
= 41 MHz, VIN= FS − 0.25 dB -63 dBc
f
IN
= 49.8 MHz, VIN= FS − 0.25 dB −54 dBc
HD3 3rd Harmonic Distortion
f
IN
= 4 MHz, VIN= FS − 0.25 dB −68 dBc
f
IN
= 10 MHz, VIN= FS − 0.25 dB −65 dBc
f
IN
= 41 MHz, VIN= FS − 0.25 dB -64 dBc
f
IN
= 49.8 MHz, VIN= FS − 0.25 dB −68 dBc
IMD Intermodulation Distortion
f
1
= 9 MHz, VIN= FS − 6.25 dB
f
2
= 10 MHz, VIN= FS − 6.25 dB
-48 dBc
POWER SUPPLY CHARACTERISTICS
I
A
Analog Supply Current
DC Input 41 50 mA (max)
f
IN
= 10 MHz, VIN=FS−3dB 41 mA(max)
ADC08100
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Converter Electrical Characteristics (Continued)
The following specifications apply for VA=DRVD= +3.0VDC,VRT= +1.9V, VRB= 0.3V, CL= 10 pF, f
CLK
= 100 MHz at 50%
duty cycle. Boldface limits apply for T
A=TMIN
to T
MAX
: all other limits TA= 25˚C (Notes 7, 8)
Symbol Parameter Conditions
Typical
(Note 9)
Limits
(Note 9)
Units
(Limits)
POWER SUPPLY CHARACTERISTICS
DR I
D
Output Driver Supply Current
DC Input 1 2 mA (max)
f
IN
= 10 MHz, VIN=FS−3dB 8 mA(max)
I
A
+
DRI
D
Total Operating Current
DC Input 42 52
mA (max)
f
IN
= 10 MHz, VIN=FS−3dB,
PD = Low
49
CLK Low, PD = Hi 0.2
PC Power Consumption
DC Input 126 156 mW (max)
f
IN
= 10 MHz, VIN=FS−3dB,
PD = Low
147 mW
CLK Low, PD = Hi 0.6 mW
PSRR
1
Power Supply Rejection Ratio
FSE change with 2.7V to 3.3V change
in V
A
54 dB
PSRR
2
Power Supply Rejection Ratio
SNR change with 200 mV at 1 MHz
on supply
TBD dB
AC ELECTRICAL CHARACTERISTICS
f
C1
Maximum Conversion Rate 125 100 MHz (min)
f
C2
Minimum Conversion Rate 20 MHz
t
CL
Minimum Clock Low Time 4.5 ns (min)
t
CH
Minimum Clock High Time 4.5 ns (min)
t
OH
Output Hold Time CLK Rise to Data Invalid 4.4 ns
t
OD
Output Delay CLK Rise to Data Valid 5.9 8.5 ns (max)
Pipeline Delay (Latency) 2.5 Clock Cycles
t
AD
Sampling (Aperture) Delay CLK Fall to Acquisition of Data 1.5 ns
t
AJ
Aperture Jitter 2 ps rms
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND = AGND = DR GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supplies (that is, less than AGND or DR GND, or greater than V
A
or DR VD), the current at that pin
should be limited to 25 mA. The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input
current of 25 mA to two.
Note 4: The absolute maximum junction temperature (T
J
max) for this device is 150˚C. The maximum allowable power dissipation is dictated by TJmax, the
junction-to-ambient thermal resistance (θ
JA
), and the ambient temperature (TA), and can be calculated using the formula PDMAX=(TJmax − TA)/θJA. In the 24-pin
TSSOP, θ
JA
is 92˚C/W, so PDMAX = 1,358 mW at 25˚C and 435 mW at the maximum operating ambient temperature of 85˚C. Note that the power consumption of
this device under normal operation will typically be about 162 mW (126 mW quiescent power + 12 mW reference ladder power + 24 mW to drive the output bus
capacitance). The values for maximum power dissipation listed above will be reached only when the ADC08100 is operated in a severe fault condition (e.g., when
input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 kΩ resistor. Machine model is 220 pF discharged through ZERO Ohms.
Note 6: See AN-450, “Surface Mounting Methods and Their Effect on Product Reliability”, or the section entitled “Surface Mount” found in any post 1986 National
Semiconductor Linear Data Book, for other methods of soldering surface mount devices.
Note 7: The analog inputs are protected as shown below. Input voltage magnitudes up to V
A
+ 300 mV or to 300 mV below GND will not damage this device.
However, errors in the A/D conversion can occur if the input goes above DR V
D
or below GND by more than 100 mV. For example, if VAis 2.7VDCthe full-scale input
voltage must be ≤2.6V
DC
to ensure accurate conversions.
ADC08100
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