NSC 5962-9160901MLA, 5962-9160901M3A, 5962-9160901MKA Datasheet

54ACT818
8-Bit Diagnostic Register

General Description

The ’ACT818 is a high-speed, general-purpose pipeline reg­ister with an on-board diagnostic register for performing se­rial diagnostics and/or writable control store loading.

The D-to-Y path provides an 8-bit parallel data path pipeline
register for normal system operation.Thediagnostic register
can load parallel data to or from the pipeline register and can
output data through the D input port (as in WCS loading).

The 8-bit diagnostic register has multiplexer inputs that se­lect parallel inputs from the Y-port or adjacent bits in the di­agnostic register to operate as a right-shift-only register. This
register can then participate in a serial loop throughout the
system where normal data, address, status and control reg­isters are replaced with ’ACT818 diagnostic pipeline regis­ters. The loop can be used to scan in a complete test routine
starting point (Data, Address, etc.). Then after a specified
number of machine cycles it scans out the results to be in­spected for the expected results. WCS loading can be ac­complished using the same technique. An instruction word
can be serially shifted into the shadow register and written
into the WCS RAM by enabling the D output.

Features

n On-line and off-line system diagnostics

n Swaps the contents of diagnostic register and output

register

n Diagnostic register and diagnostic testing
n Cascadable for wide control words as used in

microprogramming

n Edge-triggered D registers
n Outputs source/sink 24 mA
n ’ACT818 has TTL-compatible inputs
n ’ACT818 is functionally- and pin-compatible to AMD

Am29818 and MMI 74S818

n Standard Microcircuit Drawing (SMD) 5962-9160901

Applications

n Register for microprogram control store
n Status register
n Data register
n Instruction register
n Interrupt mask register
n Pipeline register
n General purpose register
n Parallel-serial/serial-parallel converter

Logic Symbol

TRI-STATE®is a registered trademark of National Semiconductor Corporation.
FACT

™

is a trademark of Fairchild Semiconductor Corporation.

DS100251-3

September 1998

54ACT818 8-Bit Diagnostic Register

© 1998 National Semiconductor Corporation DS100251 www.national.com

Connection Diagrams

Pin Names Description

D

0–D7

Data Inputs
SDI Serial Data Input
DCLK Diagnostics Clock
MODE Control Input
PCLK Pipeline Register Clock
OEY

Output Enable Input
SDO Serial Data Output
Y

0–Y7

Data Outputs

Diagnostic Register

Pin Assignment

for DIP and Flatpak

DS100251-1

Pin Assignment

for LCC

DS100251-2

DS100251-4

www.national.com 2

Block Diagram

Functional Description

Data transfers into the diagnostic register occur on the
LOW-to-HIGH transition of DCLK. Mode and SDI determine
what data source will be loaded. The pipeline register is
loaded on the LOW-to-HIGH transition of PCLK. Mode se­lects whether the data source is the data input or the diag-

nostic register output. Because of the independence of the
clock inputs, data can be shifted in the diagnostic register via
DCLK and loaded into the pipeline register from the data in­put via PCLK simultaneously, as long as no setup or hold
times are violated. This simultaneous operation is legal.

Function Table

Inputs Outputs Operation

SDI MODE DCLK PCLK SDO Diagnostic Reg. Pipeline Reg.

X L N X S7 SI

<

SI − 1, NA Serial Shift; D7–D0Disabled

SO

<

SD

I

X L X N S7 NA PI<DI Normal Load Pipeline Register
LHN XL SI

<

YI NA Load Diagnostic Register from Y;

DI Disabled

X H X N SDI NA PI

<

SI Load Pipeline Register from

Diagnostic Register

H H N X H Hold NA Hold Diagnostic Register; DI

Enabled

H=HIGH Voltage Level
L=LOW Voltage Level
X=Immaterial
N=LOW-to-HIGH Clock Transition

DS100251-5

www.national.com3