54AC821•54ACT821
10-Bit D Flip-Flop with TRI-STATE
®
Outputs
General Description
The ’AC/’ACT821 is a 10-bit D flip-flop with TRI-STATE outputs arranged in a broadside pinout.
The ’AC/’ACT821 is functionally identical to the AM29821.
Features
n TRI-STATE outputs for bus interfacing
n Noninverting outputs
n Outputs source/sink 24 mA
n ’ACT821 has TTL-compatible inputs
n Standard Microcircuit Drawing (SMD)
—’ACT821: 5962-88705
—’AC821: 5962-91606
Logic Symbols
Pin Names Description
D
0–D9
Data Inputs
O
0–O9
Data Outputs
OE
Output Enable Input
CP Clock Input
Connection Diagrams
TRI-STATE®is a registered trademark of National Semiconductor Corporation.
FACT
®
is a registered trademark of Fairchild Semiconductor Corporation.
DS100355-1
IEEE/IEC
DS100355-2
Pin Assignment
for DIP and Flatpak
DS100355-3
Pin Assignment for LCC
DS100355-4
August 1998
54AC821
•
54ACT821 10-Bit D Flip-Flop with TRI-STATE Outputs
© 1998 National Semiconductor Corporation DS100355 www.national.com
Functional Description
The ’AC/’ACT821 consists of ten D-type edge-triggered
flip-flops. The buffered Clock (CP) and buffered Output Enable (OE) are common to all flip-flops. The flip-flops will store
the state of their individual D inputs that meet the setup and
hold time requirements on the LOW-to-HIGH CP transition.
With OE LOW the contents of the flip-flops are available at
the outputs. When OE is HIGH the outputs go to the high impedance state. Operation of the OE input does not affect the
state of the flip-flops.
The ’AC/’ACT821 is functionally and pin compatible with the
AM29821.
Function Table
Inputs Internal Outputs Function
OE
CP D Q O
H
N
L L Z High Z
H
N
H H Z High Z
L
N
L L L Load
L
N
H H H Load
H=HIGH Voltage Level
L=LOW Voltage Level
Z=HIGH Impedance
N
=
LOW-to-HIGH Clock Transition
Logic Diagram
DS100355-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.national.com 2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
) −0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
=
−0.5V −20 mA
V
I
=
V
CC
+ 0.5V +20 mA
DC Input Voltage (V
I
) −0.5V to VCC+ 0.5V
DC Output Diode Current (I
OK
)
V
O
=
−0.5V −20 mA
V
O
=
V
CC
+ 0.5V +20 mA
DC Output Voltage (V
O
) −0.5V to VCC+ 0.5V
DC Output Source
or Sink Current (I
O
)
±
50 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
±
50 mA
Storage Temperature (T
STG
) −65˚C to +150˚C
Junction Temperature (T
J
)
CDIP 175˚C
Recommended Operating
Conditions
Supply Voltage (VCC)
’AC 2.0V to 6.0V
’ACT 4.5V to 5.5V
Input Voltage (V
I
) 0VtoV
CC
Output Voltage (VO) 0VtoV
CC
Operating Temperature (TA)
54AC/ACT −55˚C to +125˚C
Minimum Input Edge Rate (∆V/∆t)
’AC Devices
V
IN
from 30%to 70%of V
CC
V
CC
@
3.3V, 4.5V, 5.5V 125 mV/ns
Minimum Input Edge Rate (∆V/∆t)
’ACT Devices
V
IN
from 0.8V to 2.0V
V
CC
@
4.5V, 5.5V 125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recommend operation of FACT
®
circuits outside databook specifications.
DC Characteristics for ’AC Family Devices
54AC
Symbol Parameter V
CC
(V)
T
A
=
−55˚C to +125˚C Units Conditions
Guaranteed Limits
V
IH
Minimum High Level 3.0 2.1 V
OUT
=
0.1V
Input Voltage 4.5 3.15 V or V
CC
− 0.1V
5.5 3.85
V
IL
Maximum Low Level 3.0 0.9 V
OUT
=
0.1V
Input Voltage 4.5 1.35 V or V
CC
− 0.1V
5.5 1.65
V
OH
Minimum High Level 3.0 2.9 I
OUT
=
−50 µA
Output Voltage 4.5 4.4 V
5.5 5.4
(Note 2)
V
IN
=
V
IL
or V
IH
3.0 2.4 I
OH
=
−12 mA
4.5 3.7 V I
OH
=
−24 mA
5.5 4.7 I
OH
=
−24 mA
V
OL
Maximum Low Level 3.0 0.1 I
OUT
=
50 µA
Output Voltage 4.5 0.1 V
5.5 0.1
(Note 2)
V
IN
=
V
IL
or V
IH
3.0 0.50 I
OL
=
12 mA
4.5 0.50 V I
OL
=
24 mA
5.5 0.50 I
OL
=
24 mA
I
IN
Maximum Input 5.5
±
1.0 µA V
I
=
V
CC
, GND
Leakage Current
I
OZ
Maximum TRI-STATE VI(OE)=VIL,V
IH
Current 5.5
±
10.0 µA V
I
=
V
CC
, GND
V
O
=
V
CC
, GND
3 www.national.com
DC Characteristics for ’AC Family Devices (Continued)
54AC
Symbol Parameter V
CC
(V)
T
A
=
−55˚C to +125˚C Units Conditions
Guaranteed Limits
I
OLD
(Note 3) 5.5 50 mA V
OLD
=
1.65V Max
Minimum Dynamic
I
OHD
Output Current 5.5 −50 mA V
OHD
=
3.85V Min
I
CC
Maximum Quiescent 5.5 160.0 µA V
IN
=
V
CC
Supply Current or GND
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: I
IN
and I
CC
@
3.0V are guaranteed to be less than or equal to the respective limit@5.5V VCC.
I
CC
for 54AC@25˚C is identical to 74AC@25˚C.
DC Characteristics for ’ACT Family Devices
54ACT
Symbol Parameter V
CC
T
A
=
−55˚C to +125˚C Units Conditions
(V) Guaranteed Limits
V
IH
Minimum High Level 4.5 2.0 V V
OUT
=
0.1V
Input Voltage 5.5 2.0 or V
CC
− 0.1V
V
IL
Maximum Low Level 4.5 0.8 V V
OUT
=
0.1V
Input Voltage 5.5 0.8 or V
CC
− 0.1V
V
OH
Minimum High Level 4.5 4.4 V I
OUT
=
−50 µA
Output Voltage 5.5 5.4
(Note 5)
V
IN
=
V
IL
or V
IH
4.5 3.70 V I
OH
=
−24 mA
5.5 4.70 I
OH
=
−24 mA
V
OL
Maximum Low Level 4.5 0.1 V I
OUT
=
50 µA
Output Voltage 5.5 0.1
(Note 5)
V
IN
=
V
IL
or V
IH
4.5 0.50 V I
OL
=
24 mA
5.5 0.50 I
OL
=
24 mA
I
IN
Maximum Input 5.5
±
1.0 µA V
I
=
V
CC
, GND
Leakage Current
I
OZ
Maximum TRI-STATE 5.5
±
10.0 µA V
I
=
V
IL,VIH
Current V
O
=
V
CC
, GND
I
CCT
Maximum 5.5 1.6 mA V
I
=
V
CC
− 2.1V
I
CC
/Input
I
OLD
(Note 6) 5.5 50 mA V
OLD
=
1.65V Max
Minimum Dynamic
I
OHD
Output Current 5.5 −50 mA V
OHD
=
3.85V Min
I
CC
Maximum Quiescent 5.5 160.0 µA V
IN
=
V
CC
Supply Current or GND
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
Note 7: I
CC
for 54ACT@25˚C is identical to 74ACT@25˚C.
www.national.com 4
AC Electrical Characteristics
54AC
Symbol Parameter V
CC
T
A
=
−55˚C to +125˚C Units Fig.
(V) C
L
=
50 pF No.
(Note 8) Min Max
f
max
Maximum Clock 3.3 95 MHz
Frequency 5.0 100
t
PLH
Propagation Delay 3.3 1.0 13.0 ns
CP to O
n
5.0 1.5 9.5
t
PHL
Propagation Delay 3.3 1.0 13.0 ns
CP to O
n
5.0 1.5 9.5
t
PZH
Output Enable Time 3.3 1.0 13.0 ns
OE to O
n
5.0 1.5 9.5
t
PZL
Output Enable Time 3.3 1.0 13.0 ns
OE to O
n
5.0 1.5 9.5
t
PHZ
Output Disable Time 3.3 1.0 12.0 ns
OE to O
n
5.0 1.5 10.0
t
PLZ
Output Disable Time 3.3 1.0 12.0 ns
OE to O
n
5.0 1.5 10.0
Note 8: Voltage Range 3.3 is 3.3V±0.3V
Note 9: Voltage Range 5.0 is 5.0V
±
0.5V
AC Operating Requirements
Symbol Parameter
54AC
Units
V
CC
T
A
=
−55˚C to +125˚C Fig.
(V) C
L
=
50 pF No.
(Note 10) Guaranteed Minimum
t
s
Setup Time, HIGH or LOW 3.3 3.0 ns
D
n
to CP 5.0 3.0
t
h
Hold Time, HIGH or LOW 3.3 3.0 ns
D
n
to CP 5.0 3.0
t
w
CP Pulse Width 3.3 6.0 ns
HIGH or LOW 5.0 5.0
Note 10: Voltage Range 3.3 is 3.3V±0.3V
Note 11: Voltage Range 5.0 is 5.0V
±
0.5V
AC Electrical Characteristics
54ACT
V
CC
T
A
=
−55˚C Fig.
Symbol Parameter (V) to +125˚C Units No.
(Note 12) C
L
=
50 pF
Min Max
f
max
Maximum Clock 5.0 85 MHz
Frequency
t
PLH
Propagation Delay 5.0 1.5 11.5 ns
CP to O
n
t
PHL
Propagation Delay 5.0 1.5 11.5 ns
CP to O
n
t
PZH
Output Enable Time 5.0 1.5 12.5 ns
OE to O
n
5 www.national.com
AC Electrical Characteristics (Continued)
54ACT
V
CC
T
A
=
−55˚C Fig.
Symbol Parameter (V) to +125˚C Units No.
(Note 12) C
L
=
50 pF
Min Max
t
PZL
Output Enable Time 5.0 1.5 13.0 ns
OE to O
n
t
PHZ
Output Disable Time 5.0 1.5 13.5 ns
OE to O
n
t
PLZ
Output Disable Time 5.0 1.5 12.5 ns
OE to O
n
Note 12: Voltage Range 5.0 is 5.0V±0.5V
AC Operating Requirements
54ACT
V
CC
T
A
=
−55˚C Fig.
Symbol Parameter (V) to +125˚C Units No.
(Note 13) C
L
=
50 pF
Guaranteed Minimum
t
s
Setup Time, HIGH or LOW 5.0 4.0 ns
D
n
to CP
t
h
Hold Time, HIGH or LOW 5.0 3.0 ns
D
n
to CP
t
w
CP Pulse Width 5.0 6.0 ns
HIGH or LOW
Note 13: Voltage Range 5.0 is 5.0V±0.5V
Capacitance
Symbol Parameter Typ Units Conditions
C
IN
Input Capacitance 4.5 pF V
CC
=
OPEN
C
PD
Power Dissipation 35.0 pF V
CC
=
5.0V
Capacitance
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Physical Dimensions inches (millimeters) unless otherwise noted
28 Terminal Ceramic Leadless Chip Carrier (L)
NS Package Number E28A
24 Lead Slim (0.300" Wide) Ceramic Dual-In-Line Package (SD)
NS Package Number J24F
7 www.national.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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24 Lead Ceramic Flatpak (F)
NS Package Number W24C
54AC821
•
54ACT821 10-Bit D Flip-Flop with TRI-STATE Outputs
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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