Nokia 8550 Service Manual 03 nsm3sys
PAMS Technical Documentation
NSM–3/3D Series Transceivers
System Module
Issue 4 02/2002 Nokia Corporation.
NSM–3/3D
System Module
PAMS Technical Documentation
CONTENTS
Transceiver NSM–3/3D 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differences between NSM–3 and NSM–3D 7. . . . . . . . . . . . . .
Introduction NSM–3 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Introduction NSM–3D 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operation Modes 8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interconnection Diagram 9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System Module 10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Baseband Module 10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Diagram 10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Technical Summary 11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
External and Internal Signals and Connections 12. . . . . . . . .
DC (charger) connector 12. . . . . . . . . . . . . . . . . . . . . . . . . . .
Service connector 12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Battery connector 12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SIM card connector 13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RTC backup battery 13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Distribution 14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Battery charging 14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Startup Charging 15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Battery Overvoltage Protection 15. . . . . . . . . . . . . . . . . . . .
Battery Removal During Charging 17. . . . . . . . . . . . . . . . . .
PWM 18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Battery Identification 18. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Battery Temperature 19. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply Voltage Regulators 20. . . . . . . . . . . . . . . . . . . . . . . .
Switched Mode Supply VSIM 21. . . . . . . . . . . . . . . . . . . . . .
Power Up and Power Down 21. . . . . . . . . . . . . . . . . . . . . . . . .
Power up with a charger 21. . . . . . . . . . . . . . . . . . . . . . . . . .
Power Up With The Power Switch (PWRONX) 22. . . . . . .
Power Up by RTC 23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Up by IBI 23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Down 23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Modes of Operation 24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Acting Dead 24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Active Mode 24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sleep Mode 24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Charging 25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Watchdog 25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Audio control 26. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCM serial interface 26. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Control 27. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MAD2 WD1 27. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Memories 35. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MAD memory configuration 35. . . . . . . . . . . . . . . . . . . . . . .
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Memory 35. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Program and Data Memory 35. . . . . . . . . . . . . . . . . . . . . . .
Work Memory 35. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MCU Memory Requirements 35. . . . . . . . . . . . . . . . . . . . . .
MCU Memory Map 35. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Flash Programming 36. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
COBBA GJP 38. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Real Time Clock 38. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RTC backup battery charging 38. . . . . . . . . . . . . . . . . . . . . .
RF Module 39. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Ratings 39. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RF Characteristics 39. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RF Frequency Plan 40. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC characteristics 40. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Regulators 40. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Distribution Diagram 41. . . . . . . . . . . . . . . . . . . . . . . . . .
RF Functional Description 42. . . . . . . . . . . . . . . . . . . . . . . . . . .
Frequency synthesizer 43. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receiver 44. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmitter 45. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AGC strategy 46. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AFC function 46. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC–compensation 47. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receiver characteristics 47. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmitter characteristics 47. . . . . . . . . . . . . . . . . . . . . . . . . . .
NSM–3/3D
System Module
Parts list of RM7L (EDMS Issue 6.0) Layout 11 Code: 0201386 48
Parts list of RM7L (EDMS Issue 10.1) Layout 16 Code: 0201386 56. . . . . . . . .
Parts list of RM7L (EDMS Issue 11.2) Layout 18 Code: 0201386 64. . . . . . . . .
Parts list of RM7L (EDMS Issue 12.5) Layout 19 Code: 0201386 72. . . . . . . . .
Parts list of RM7L (EDMS Issue 13.5) Layout 21 Code: 0201386 80. . . . . . . . . .
Parts list of RM7LD (EDMS Issue 2.1) Layout 03 Code: 0201682 88. . . . . . . . .
Parts list of RM7LD (EDMS Issue 2.4) Layout 03 Code: 0201682 96. . . . . . . .
Parts list of RM7LD (EDMS Issue 3.2) Layout 05 Code: 0201682 104. . . . . . . .
Parts list of RM7LD (EDMS Issue 3.3) Layout 05 Code: 0201682 112. . . . . . . .
Hardware ID chart for NSM–3/3D System module 120. . . . . . . . . . .
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NSM–3/3D
System Module
Schematic Diagrams: RM7L layout 11 HW 1120(at the back of the binder)
Connection between RF and BB modules (Version 1110 Ed. 16) layout 11 A–1
Baseband Block Interconnections (Version 1110 Edition 11) for layout 11 A–2
Circuit Diagram of Power Supply (Version 1110 Edition 17) for layout 11 A–3
Circuit Diagram of CPU Block (Version 1110 Edition 12) for layout 11 A–4
Circuit Diagram of RF Block (Version 1110 Edition 28) for layout 11 A–5
Circuit Diagram of Audio and RFI (Version 1110 Edition 15) for layout 11 A–6
Circuit Diagram of IR Module (Version 1110 Edition 10) for layout 11 A–7
Circuit Diagram of UI (Version 1110 Edition 12) for layout version 11 A–8
Layout Diagram of RM7L – Top (Version 11) A–9. . . . . . . . . . . . . . . .
Layout Diagram of RM7L – Bottom (Version 11) A–9. . . . . . . . . . . . .
Testpoints of RM7L – Bottom (Version 11) A–10. . . . . . . . . . . . . . . . . .
PAMS Technical Documentation
Schematic Diagrams: RM7L layout 16 HW 1210–1621(at the back of the binder)
Connection between RF and BB modules (Version 1410 Ed. 20) layout 16 A–11
Baseband Block Interconnections (Version 1410 Edition 18) for layout 16 A–12
Circuit Diagram of Power Supply (Version 1510 Edition 26) for layout 16 A–13
Circuit Diagram of CPU Block (Version 1410 Edition 16) for layout 16 A–14
Circuit Diagram of RF Block (Version 1410 Edition 37) for layout 16 A–15
Circuit Diagram of Audio and RFI (Version 1410 Edition 20) for layout 16 A–16
Circuit Diagram of IR Module (Version 1410 Edition 13) for layout 16 A–17
Circuit Diagram of UI (Version 1410 Edition 14) for layout version 16 A–18
Layout Diagram of RM7L – Top (Version 16) A–19. . . . . . . . . . . . . . . .
Layout Diagram of RM7L – Bottom (Version 16) A–19. . . . . . . . . . . .
Testpoints of RM7L – Bottom (Version 16) A–20. . . . . . . . . . . . . . . . . .
Schematic Diagrams: RM7L layout 18 HW1800 (at the back of the binder)
Layout Diagram of RM7L – Top (Version 18) A–21. . . . . . . . . . . . . . . .
Layout Diagram of RM7L – Bottom (Version 18) A–21. . . . . . . . . . . .
Testpoints of RM7L – Bottom (Version 18) A–22. . . . . . . . . . . . . . . . . .
Schematic Diagrams: RM7L layout 19 HW1903–2000 (at the back of the binder)
Connection between RF and Baseband (HW1910 Edit 4) layout 19 A–23
Baseband Block Interconnections (HW1910 Edit 4) layout 19 A–24
Circuit Diagram of Power Supply (HW1910 Edit 4) layout 19 A–25.
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NSM–3/3D
PAMS Technical Documentation
Circuit Diagram of CPU Block (HW 1910 Edit 5) for layout 19 A–26
Circuit Diagram of RF Block (HW 1910 Edit 4) for layout 19 A–27. .
Circuit Diagram of Audio and RFI (HW1910 Edit 4) layout 19 A–28
Circuit Diagram of IR Module (HW 1910 Edit 4) for layout 19 A–29.
Circuit Diagram of UI (HW 1910 Edit 4) for layout version 19 A–30
Layout Diagram of RM7L – Top (Version 19) A–31. . . . . . . . . . . . . . . .
Layout Diagram of RM7L – Bottom (Version 19) A–31. . . . . . . . . . . .
Testpoints of RM7L – Bottom (Version 19) A–32. . . . . . . . . . . . . . . . . .
Schematic Diagrams: RM7L layout 21 HW2100–2103 (at the back of the binder)
Connection between RF and Baseband (HW2103 Ed2) layout 21 A–33. . . . . . .
Baseband Block Interconnections (HW2103 Edit 3) for layout 21 A–34. . . . . . .
Circuit Diagram of Power Supply (HW2103 Edit 5) for layout 21 A–35
System Module
Circuit Diagram of CPU Block (HW2103 Edit 3) for layout 21 A–36.
Circuit Diagram of RF Block (HW2103 Edit 5) for layout 21 A–37. . .
Circuit Diagram of Audio and RFI (HW2103 Edit 20) layout 21 A–38
Circuit Diagram of IR Module (HW2103 Edit 17) for layout 21 A–39
Circuit Diagram of UI (HW2103 Edit 3) for layout version 21 A–40.
Layout Diagram of RM7L – Top (Version 21) A–41. . . . . . . . . . . . . . . .
Layout Diagram of RM7L – Bottom (Version 21) A–41. . . . . . . . . . . .
Testpoints of RM7L (Version 21) A–42. . . . . . . . . . . . . . . . . . . . . . . . . .
Schematic Diagrams: RM7LD layout 03 HW3.01–3.02 (at the back of the binder)
Connection between RF and BB modules (Version 1410 Ed. 4) layout 03 A–D1
Baseband Block Interconnections (Version 1410 Edition 4) for layout 03 A–D2
Circuit Diagram of Power Supply (Version 1510 Edition 7) for layout 03 A–D3
Circuit Diagram of CPU Block (Version 1410 Edition 04) for layout 03 A–D4
Circuit Diagram of RF Block (Version 1410 Edition 3) for layout 03 A–D5
Circuit Diagram of Audio and RFI (Version 1410 Edition 4) for layout 03 A–D6
Circuit Diagram of IR Module (Version 1410 Edition 2) for layout 03 A–D7
Circuit Diagram of UI (Version 1410 Edition 4) for layout version 03 A–D8
Layout Diagram of RM7LD – Top (Version 03) A–D9. . . . . . . . . . . . . .
Layout Diagram of RM7LD – Bottom (Version 03) A–D9. . . . . . . . . . .
Testpoints of RM7LD – Bottom (Version 03) A–D10. . . . . . . . . . . . . . . .
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NSM–3/3D
System Module
Schematic Diagrams: RM7LD layout 05 HW5.01 (at the back of the binder) . . .
Connection between RF and BB (Version 1410 Edit 7) layout 05 A–D11. . . . . . .
Baseband Block Interconnections (Version 1410 Edit 6) layout 05 A–D12. . . .
Circuit Diagram of Power Supply (Version 1510 Edit 8) layout 05 A–D13. . . . . .
Circuit Diagram of CPU Block (Version 1410 Edit 7) layout 05 A–D14
Circuit Diagram of RF Block (Version 1410 Edit 13) layout 05 A–D15.
Circuit Diagram of Audio and RFI (Version 1410 Edit 4) layout 05 A–D16. . . . .
Circuit Diagram of IR Module (Version 1410 Edit 2) layout 05 A–D17
Circuit Diagram of UI (Version 1410 Edit 5) for layout 05 A–D18. . . .
Layout Diagram of RM7LD – Bottom (Version 05) A–D19. . . . . . . . . . .
Layout Diagram of RM7LD – Top (Version 05) A–D19. . . . . . . . . . . . . .
Testpoints of RM7LD (Version 05) A–D20. . . . . . . . . . . . . . . . . . . . . . . .
PAMS Technical Documentation
Schematic Diagrams: RM7LD layout 05 HW5.02 (at the back of the binder) . . .
Connection between RF and Baseband modules (Version 5.02 Edit 8) for layout
version 05 A–D21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Baseband Block Interconnections (Version 5.02 Edit 7) layout 05 A–D22. . . . . .
Circuit Diagram of Power Supply (Version 5.02 Edit 9) layout 05 A–D23. . . . .
Circuit Diagram of CPU Block (Version 5.02 Edit 8) layout 05 A–D24. . . . . . . .
Circuit Diagram of RF Block (Version 5.02 Edit 14) layout 05 A–D25.
Circuit Diagram of Audio and RFI (Version 5.02 Edit 6) layout 05 A–D26. . . . . .
Circuit Diagram of IR Module (Version 5.02 Edit 3) layout 05 A–D27.
Circuit Diagram of UI (Version 5.02 Edit 6) layout 05 A–D28. . . . . . . .
Layout Diagram of RM7LD – Bottom (Version 05) A–D29. . . . . . . . . . .
Layout Diagram of RM7LD – Top (Version 05) A–D29. . . . . . . . . . . . . .
Testpoints of RM7LD (Version 05) A–D30. . . . . . . . . . . . . . . . . . . . . . . .
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PAMS Technical Documentation
Transceiver NSM–3/3D
Differences between NSM–3 and NSM–3D
The main differences are in A–cover and display module. NSM–3 and
NSM–3D share the same accessories. Other differences between the
phones are stated in the text. See also Product Variants –section in this
manual.
Introduction NSM–3
The NSM–3 is a dual band transceiver unit designed for the GSM900 (in-
cluding EGSM) and GSM1800 networks. It is both GSM900 phase 2 power
class 4 transceiver (2W) and GSM1800 power class 1 (1W) transceiver.
The transceiver consists of System/RF module (RM7L), Display module
(UX7) and assembly parts.
NSM–3/3D
System Module
The transceiver has a full graphic display and the user interface is based
on a Jack style UI with two soft keys.
An internal antenna is used, there is no connection to an external anten-
na.
The transceiver has a low leakage tolerant earpiece and an omnidirec-
tional microphone located in B–cover, providing an excellent audio quality.
The transceiver supports a full rate, an enhanced full rate and a half rate
speech decoding.
An integrated IR link provides a connection between two NSM–3 trans-
ceivers or a transceiver and a PC (internal data), or a transceiver and a
printer.
The small SIM ( Subscriber Identity Module ) card is located below the
back cover of the phone.
Introduction NSM–3D
The NSM–3DX is a dualband radio transceiver unit for the E–GSM900 and
GSM1800 networks. GSM power class is 4 and PCN power class is 1. It is
a true 3 V transceiver, with user changeable A–cover and internal vibra.
The transceiver consists of System/RF module (RM7LD), Display module
(UX7V) and assembly parts.
The transceiver has full graphic display and the user interface is based on
Jack style UI with two soft keys.
NSM–3D phone is equipped with an internal antenna and there isn’t any
external antenna connector.
The transceiver has leakage tolerant earpiece and omnidirectional micro-
phone, providing excellent audio quality. Transceiver supports full rate,
enhanced full rate and half rate speech decoding.
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NSM–3/3D
System Module
Integrated IR link provides for connection between two NSM–3DX trans-
ceivers or a transceiver and a PC (internal data), or a transceiver and a
printer.
The small SIM ( Subscriber Identity Module ) card is located below the
back cover of the phone.
Operation Modes
There are five different operation modes:
– power off mode
– idle mode
– active mode
– charge mode
– local mode
In the power off mode only the circuits needed for power up are supplied.
PAMS Technical Documentation
In the idle mode circuits are powered down and only sleep clock is run-
ning.
In the active mode all the circuits are supplied with power although some
parts might be in the idle state part of the time.
The charge mode is effective in parallel with all previous modes. The
charge mode itself consists of two different states, i.e. the fast charge and
the maintenance mode.
The local mode is used for alignment and testing.
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Interconnection Diagram
NSM–3/3D
System Module
Keyboard
module
14
LCD
module
9
64
SIM Battery
Radio
Module
2+2
2
RM7L, RM7LD
Charger
Antenna
2
8
2
4
Mic
IR Link
Earpiece
HF/HS
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NSM–3/3D
System Module
System Module
Baseband Module
The baseband architecture supports a power saving function called ”sleep
mode”. This sleep mode shuts off the VCTCXO, which is used as system
clock source for both RF and baseband. During the sleep mode the sys-
tem runs from a 32 kHz crystal. The phone is waken up by a timer run-
ning from this 32 kHz clock supply. The sleeping time is determined by
some network parameters. The sleep mode is entered when both the
MCU and the DSP are in standby mode and the normal VCTCXO clock
has been switched off.
The battery charging is controlled by a PWM signal from the CCONT. The
PWM duty cycle is determined by a charging software and is fed to the
CHAPS charging switch.
PAMS Technical Documentation
Standard chargers (two wires) provide coarse supply power, which is
switched by the CHAPS for suitable charging voltage and current. Ad-
vanced chargers (three wires) are equipped with a control input. Three
wire chargers are treated like two wire ones.
Block Diagram
TX/RX SIGNALS
UI
IR
COBBA SUPPLY
COBBA
MAD
+
MEMORIES
RF SUPPLIES
CCONT
BB SUPPLY
CHAPS
PA SUPPL Y
32kHz
CLK
SLEEP CLOCK
SIM
VBAT
13MHz
CLK
SYSTEM CLOCK
BATTERY
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BASEBAND
EXT. AUDIO
HS–connector
Nokia Corporation
Charger
connector
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PAMS Technical Documentation
Technical Summary
The baseband module consists four ASICs; CHAPS, CCONT, COBBA–
GJP and MAD2WD1, which take care of the baseband functions of the
engine.
The baseband is running from a 2.8V power rail, which is supplied by a
power controlling ASIC CCONT. In the CCONT there are 6 individually
controlled regulator outputs for RF–section and two outputs for the base-
band. In addition there is one +5V power supply output (V5V). The
CCONT contains also a SIM interface, which supports both 3V and 5V
SIM–cards. A real time clock function is integrated into the CCONT, which
utilizes the same 32kHz clock supply as the sleep clock. A backup power
supply is provided for the RTC, which keeps the real time clock running
when the main battery is removed. The backup power supply is a re-
chargable battery. The backup time with the battery is ten minutes mini-
mum.
The interface between the baseband and the RF section is mainly han-
dled by a COBBA ASIC. COBBA provides A/D and D/A conversion of the
in–phase and quadrature receive and transmit signal paths and also A/D
and D/A conversions of received and transmitted audio signals to and
from the user interface. The COBBA supplies the analog TXC and AFC
signals to RF section according to the MAD DSP digital control. Data
transmission between the COBBA and the MAD is implemented using se-
rial bus for high speed signalling and for PCM coded audio signals. Digital
speech processing is handled by the MAD ASIC. COBBA is a dual volt-
age circuit, the digital parts are running from the baseband supply VBB
and the analog parts are running from the analog supply VCOBBA.
NSM–3/3D
System Module
The baseband supports both internal and external microphone inputs and
speaker outputs. Input and output signal source selection and gain control
is done by the COBBA according to control messages from the MAD.
Keypad tones, DTMF, and other audio tones are generated and encoded
by the MAD and transmitted to the COBBA for decoding. A buzzer and an
external vibra alert control signals are generated by the MAD with sepa-
rate PWM outputs.
EMC shieding is implemented using a metallized plastic frame. On the
other side the engine is shielded with PCB grounding. Heat generated by
the circuitry will be conducted out via the PCB ground planes.
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NSM–3/3D
System Module
PAMS Technical Documentation
External and Internal Signals and Connections
This section describes the external electrical connection and interface lev-
els on the baseband. The electrical interface specifications are collected
into tables that covers a connector or a defined interface.
DC (charger) connector
DC (charger) connector is physically integrated in the same component
with the accessory interface connector. DC connector has both jack and
contact pads for desk stand.
Service connector
Name Parameter Min Typ Max Unit Remark
MBUS Serial clock
from the
Prommer
FBUS_RX Serial data
from the
Prommer
FBUS_TX Data ac-
knowledge to
the Prommer
GND GND 0 0 V Ground
0
2.0
0
2.0
0
2.0
logic low
logic low
logic low
logic high
logic low
logic high
0.8
2.85
0.8
2.85
0.5
2.85
V Prommer detection and Seri-
al Clock for synchronous
communication
V Receive Data from
Prommer to Baseband
V Transmit Data from Base-
band to Prommer
The service connector is used as a flash programming interface for updating (i.e. re–programming) the flash program memory and an electrical
access for services to the engine.
When the flash prommer is connected to the phone supply power is provided through the battery contacts and the phone is powered up with a
pulse given to the BTEMP line.
Battery connector
The BSI contact on the battery connector is used to detect when the battery is to be removed to be able to shut down the operations of the SIM
card before the power is lost if the battery is removed with power on. The
BSI contact disconnects earlier than the supply power contacts to give
enough time for the SIM and LCD shut down.
Name Min Typ Max Unit Notes
VBATT 3.0 3.9 4.2 V Battery voltage
BSI
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0 2.85 V Battery size indication
Phone has 100kohm pull up resistor.
SIM Card removal detection
(Treshold is 2.4V@VBB=2.8V)
67 68 69 kohm Battery indication resistor (BLB–2)
0 0 1 kohm Battery indication resistor (service battery)
Nokia Corporation
Issue 4 02/2002
PAMS Technical Documentation
NSM–3/3D
System Module
NotesUnitMaxTypMinName
BTEMP
BGND 0 0 V Battery ground
0 1.4 V Battery temperature indication
Phone has a 100k (+–5%) pullup resistor,
Battery package has a NTC pulldown resistor:
47k+–5%@+25C , B=4050+–3%
2.1
5 10
1.9
90 100
0 1 kohm Local mode initialization (in production)
3
20
2.85
200
V
ms
V
ms
Phone power up by battery (input)
Power up pulse width
Battery power up by phone (output)
Power up pulse width
SIM card connector
The SIM card connector is located on the engine board beside the battery
pack.
Pin Name Parameter Min Typ Max Unit Notes
4 GND GND 0 0 V Ground
3, 5 VSIM 5V SIM Card
3V SIM Card
6 DATA 5V Vin/Vout
3V Vin/Vout
2 SIMRST 5V SIM Card
3V SIM Card
4.8
2.8
4.0
0
2.8
0
4.0
2.8
5.0
3.0
”1”
”0”
”1”
”0”
”1”
”1”
5.2
3.2
VSIM
0.5
VSIM
0.5
VSIM
VSIM
V Supply voltage
V SIM data
Trise/Tfall max 1us
V SIM reset
1 SIMCLK Frequency
Trise/Tfall
3.25
25
MHz
ns
SIM clock
RTC backup battery
The RTC block in CCONT needs a power backup to keep the clock running when the phone battery is disconnected. The backup power is supplied from a rechargable polyacene battery that can keep the clock running ten minutes minimum. The backup battery is charged from the main
battery through CHAPS.
Signal Parameter Min Typ Max Unit Notes
VBACK
VBACK
Backup battery charging from CHAPS
Backup battery charging from CHAPS
Backup battery supply
to CCONT
Backup battery supply
to CCONT
3.02 3.15 3.28 V
100 200 500 uA Vout@VBAT–0.2V
2 3.28 V
80 uA
Issue 4 02/2002
Nokia Corporation
Page 13
NSM–3/3D
System Module
Power Distribution
In normal operation the baseband is powered from the phone‘s battery.
The battery consists of one Lithium–Ion cell. An external charger can be
used for recharging the battery and supplying power to the phone.
The baseband contains parts that control power distribution to whole
phone excluding those parts that use continuous battery supply. The battery feeds power directly to the CCONT and UI (buzzer and display and
keyboard lights).
The power management circuit CHAPS provides protection against overvoltages, charger failures and pirate chargers etc. that would otherwise
cause damage to the phone.
PAMS Technical Documentation
PA SUPPL Y
VCOBBA
COBBA
UI
VBAT
VBB
BASEBAND
VBB
MAD
+
MEMORIES
RF SUPPLIES
CCONT
PWRONX
CNTVR
CHARGER CONNECTOR
PWM
VBB
PURX
LIM
CHAPS
VIN
VSIM
SIM
RTC
BACKUP
VBAT
BATTERY
Battery charging
The electrical specifications give the idle voltages produced by the acceptable chargers at the DC connector input. The absolute maximum input voltage is 30V due to the transient suppressor that is protecting the
charger input. At phone end there is no difference between a plug–in
charger or a desktop charger. The DC–jack pins and bottom connector
charging pads are connected together inside the phone.
Page 14
Nokia Corporation
Issue 4 02/2002
PAMS Technical Documentation
NSM–3/3D
System Module
MAD
VBAT
MAD
CCONTINT
CCONT
Startup Charging
LIM
0R22
PWM_OUT
GND
ICHAR
VCHAR
VOUT
CHAPS
RSENSE
PWM
22k
VCH
GND
1n
TRANSCEIVER
1u
100k
10k
30V
2A
VIN
L_GND
CHARGER
When a charger is connected, the CHAPS is supplying a startup current
minimum of 130mA to the phone. The startup current provides initial
charging to a phone with an empty battery. Startup circuit charges the
battery until the battery voltage level is reaches 3.0V (+/– 0.1V) and the
CCONT releases the PURX reset signal and program execution starts.
Charging mode is changed from startup charging to PWM charging that is
controlled by the MCU software. If the battery voltage reaches 3.55V
(3.75V maximum) before the program has taken control over the charging, the startup current is switched off. The startup current is switched on
again when the battery voltage is sunken 100mV (nominal).
Parameter Symbol Min Typ Max Unit
VOUT Start– up mode cutoff limit Vstart 3.45 3.55 3.75 V
VOUT Start– up mode hysteresis
NOTE: Cout = 4.7 uF
Start–up regulator output current
VOUT = 0V ... Vstart
Vstarthys 80 100 200 mV
Istart 130 165 200 mA
Battery Overvoltage Protection
Output overvoltage protection is used to protect phone from damage.
This function is also used to define the protection cutoff voltage for different battery types (Li or Ni). The power switch is immediately turned OFF if
the voltage in VOUT rises above the selected limit VLIM1 or VLIM2.
Parameter Symbol LIM input Min Typ Max Unit
Output voltage cutoff limit
(during transmission or Li–
battery)
VLIM LOW 4.4 4.6 4.8 V
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Nokia Corporation
Page 15
NSM–3/3D
System Module
The voltage limit (VLIM1 or VLIM2) is selected by logic LOW or logic
HIGH on the CHAPS (N101) VLIM input pin. In NSM–3 phones VLIM is
fixed low in HW.
When the switch in output overvoltage situation has once turned OFF, it
stays OFF until the the battery voltage falls below VLIM and PWM = LOW
is detected. The switch can be turned on again by setting PWM = HIGH.
VCH
VCH<VOUT
VOUT
VLIM
PAMS Technical Documentation
t
SWITCH
PWM (1 Hz)
ON OFF
t
ON
Page 16
Nokia Corporation
Issue 4 02/2002
PAMS Technical Documentation
Battery Removal During Charging
Output overvoltage protection is also needed in case the main battery is
removed when charger connected or charger is connected before the battery is connected to the phone.
With a charger connected, if VOUT exceeds VLIM, CHAPS turns switch
OFF until the charger input has sunken below Vpor (nominal 3.0V, maximum 3.4V). MCU software will stop the charging (turn off PWM) when it
detects that battery has been removed. The CHAPS remains in protection
state as long as PWM stays HIGH after the output overvoltage situation
has occured.
NSM–3/3D
System Module
VCH
(Standard
Charger)
VOUT
PWM
SWITCH
Vpor
VLIM
4V
Vstart
”1”
”0”
ON
OFF
Droop depends on load
& C in phone
2
5
4
6
7
Istart off due to VCH<Vpor
Vstarthys
t
t
t
1.1Battery removed, (standard) charger connected, VOUT rises (follows charger voltage)
2. VOUT exceeds limit VLIM(X), switch is turned immediately OFF
3.3VOUT falls (because no battery) , also VCH<Vpor (standard chargers full–rectified
output). When VCH > Vpor and VOUT < VLIM(X) –> switch turned on again (also PWM
is still HIGH) and VOUT again exceeds VLIM(X).
4. Software sets PWM = LOW –> CHAPS does not enter PWM mode
5. PWM low –> Startup mode, startup current flows until Vstart limit reached
6. VOUT exceeds limit Vstart, Istart is turned off
7. VCH falls below Vpor
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Nokia Corporation
Page 17
NSM–3/3D
System Module
PAMS Technical Documentation
PWM
When a charger is used, the power switch is turned ON and OFF by the
PWM input. PWM rate is 1Hz. When PWM is HIGH, the switch is ON and
the output current Iout = charger current – CHAPS supply current. When
PWM is LOW, the switch is OFF and the output current Iout = 0. To prevent the switching transients inducing noise in audio circuitry of the phone
soft switching is used.
Battery Identification
Different battery types are identified by a pulldown resistor inside the battery pack. The BSI line inside transceiver has a 100k pullup to VBB. The
MCU can identify the battery by reading the BSI line DC–voltage level
with a CCONT (N100) A/D–converter.
Name Min Typ Max Unit Notes
BSI
0 2.8 V Battery size indication
100k pullup resistor to VBB in phone
SIM Card removal detection
(Treshold is 2.4V@VBB=2.8V)
67 68 69 kohm Indication of a BLB–2 battery (650 mAh Li–Ion)
0 1 kohm Indication resistor for a service battery
VBATT
BATTERY
BTEMP
BSI
R
s
BGND
2.8V
100k
10n
10k
TRANSCEIVER
BSI
SIMCardDetX
CCONT
MAD
Page 18
The battery identification line is used also for battery removal detection.
The BSI line is connected to a SIMCardDetX line of MAD2. SIMCardDetX
is a threshold detector with a nominal input switching level 0.85xVcc for a
rising edge and 0.55xVcc for a falling edge. The battery removal detection
is used as a trigger to power down the SIM card before the power is lost.
The BSI contact in the battery contact disconnects before the other contacts so that there is a delay between battery removal detection and supply power off.
Nokia Corporation
Issue 4 02/2002
PAMS Technical Documentation
Vcc
0.850.05 Vcc
0.550.05 Vcc
SIMCARDDETX
GND
Battery Temperature
The battery temperature is measured with a NTC inside the battery pack.
The BTEMP line inside transceiver has a 100k pullup to VREF. The MCU
can calculate the battery temperature by reading the BTEMP line DC–
voltage level with a CCONT (N100) A/D–converter.
NSM–3/3D
System Module
S
IGOUT
Pin Name Min Typ Max Unit Notes
3 BTEMP
0 1.4 V Battery temperature indication
100k pullup resistor to VREF in phone
Battery package has NTC pull down resis-
tor:
47k +/–5%@+25C , B=4050+/–3%
2.1
5 10
1.9
90
–5 5 % 100k pullup resistor tolerance
100
BATTERY
3
20
2.8
200
VBATT
BSI
BTEMP
V
ms
V
ms
Phone power up by battery (input)
Power up pulse width
Battery power up by phone (output)
Power up pulse width
TRANSCEIVER
VREF
100k
10k
BTEMP
CCONT
Issue 4 02/2002
R
NTC
T
BGND
Nokia Corporation
Page 19
NSM–3/3D
System Module
Supply Voltage Regulators
The heart of the power distrubution is the CCONT. It includes all the voltage regulators and feeds the power to the whole system. The baseband
digital parts are powered from the VBB regulator which provides 2.8V
baseband supply. The baseband regulator is active always when the
phone is powered on. The VBB baseband regulator feeds MAD and memories, COBBA digital parts and the LCD driver in the UI section. There is
a separate regulator for a SIM card. The regulator is selectable between
3V and 5V and controlled by the SIMPwr line from MAD to CCONT. The
COBBA analog parts are powered from a dedicated 2.8V supply VCOBBA. The CCONT supplies also 5V for RF and for flash VPP. The CCONT
contains a real time clock function, which is powered from a RTC backup
when the main battery is disconnected. The RTC backup is rechargable
polyacene battery. The battery is charged from the main battery voltage
by the CHAPS when the main battery voltage is over 3.2V.
PAMS Technical Documentation
Operating mode
Vref
RF REG VCOBBA VBB VSIM SIMIF
Power off Off Off Off Off Off Pull
down
Power on On On/Off On On On On/Off
Reset On Off
VR1 On
On On Off Pull
down
Sleep On Off Off On On On/Off
NOTE: COBBA regulator is off in SLEEP mode. Its output pin may be fed
from VBB in SLEEP mode by setting bit RFReg(5) to ’1’ (default).
CCONT includes also five additional 2.8V regulators providing power to
the RF section. These regulators can be controlled either by the direct
control signals from MAD or by the RF regulator control register in
CCONT which MAD can update. Below are the listed the MAD control
lines and the regulators they are controlling.
– TxPwr controls VTX regulator (VR5) – RxPwr controls VRX regulator (VR2)
Page 20
– SynthPwr controls all the rf regulators except VR1
– VCXOPwr controls VXO regulator (VR1)
In additon to the above mentioned signals MAD includes also TXP control
signal which goes to HAGAR power control block. The transmitter power
control TXC is led from COBBA to HAGAR.
Nokia Corporation
Issue 4 02/2002
PAMS Technical Documentation
Switched Mode Supply VSIM
There is a switched mode supply for SIM–interface. SIM voltage is selected via serial IO. The 5V SMR can be switched on independently of the
SIM voltage selection, but can’t be switched off when VSIM voltage value
is set to 5V.
NOTE: VSIM and V5V can give together a total of 30mA.
In the next figure the principle of the SMR / VSIM–functions is shown.
CCONT External
VBAT
NSM–3/3D
System Module
V5V_4
V5V_3
V5V_2
VSIM
5V reg
Power Up and Power Down
The baseband is powered up by:
1. Pressing the power key, that generates a PWRONX interrupt
signal from the power key to the CCONT, which starts the power up procedure.
2. Connecting a charger to the phone. The CCONT recognizes
the charger from the VCHAR voltage and starts the power up
procedure.
3. A RTC interrupt. If the real time clock is set to alarm and the
phone is switched off, the RTC generates an interrupt signal,
when the alarm is gone off. The RTC interrupt signal is connected to the PWRONX line to give a power on signal to the
CCONT just like the power key.
V5V
5V
5/3V
4. A battery interrupt. Intelligent battery packs have a possibility
to power up the phone. When the battery gives a short (10ms)
voltage pulse through the BTEMP pin, the CCONT wakes up
and starts the power on procedure.
Power up with a charger
When the charger is connected CCONT will switch on the CCONT digital
voltage as soon as the battery voltage exeeds 3.0V. The reset for
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Nokia Corporation
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NSM–3/3D
System Module
CCONT’s digital parts is released when the operating voltage is stabilized
( 50 us from switching on the voltages). Operating voltage for VCXO is
also switched on. The counter in CCONT digital section will keep MAD in
reset for 62 ms (PURX) to make sure that the clock provided by VCXO is
stable. After this delay MAD reset is relased, and VCXO –control
(SLEEPX) is given to MAD. The next diagram explains the power on procedure with charger ( the picture assumes empty battery, but the situation
would be the same with full battery):
PAMS Technical Documentation
SLEEPX
PURX
CCPURX
12 3
1: Battery voltage over 3.0==>Digital voltages to CCONT (VBB)
2: CCONT digital reset released. VCXO turned on
3: 62ms delay before PURX released
When the phone is powered up with an empty battery pack using the
standard charger, the charger may not supply enough current for standard powerup procedure and the powerup must be delayed.
Power Up With The Power Switch (PWRONX)
When the power on switch is pressed the PWRONX signal will go low.
CCONT will switch on the CCONT digital section and VCXO as was the
case with the charger driven power up. If PWRONX is low when the 64
ms delay expires, PURX is released and SLEEPX control goes to MAD. If
PWRONX is not low when 64 ms expires, PURX will not be released, and
CCONT will go to power off ( digital section will send power off signal to
analog parts)
Vbat
VR6
VR1
VBB (2.8V)
Vchar
Vref
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Issue 4 02/2002
PAMS Technical Documentation
12 3
1:Power switch pressed ==> Digital voltages on in CCONT (VBB)
2: CCONT digital reset released. VCXO turned on
3: 62 ms delay to see if power switch is still pressed.
NSM–3/3D
System Module
SLEEPX
PURX
CCPURX
PWRONX
VR1,VR6
VBB (2.8V)
Vchar
Power Up by RTC
RTC (internal in CCONT) can power the phone up by changing RTCPwr
to logical 1.
Power Up by IBI
IBI can power CCONT up by giving a short pulse (10ms) through the
BTEMP line. After powerup BTEMP will act as any other input channel for
ADC.
When the PURX reset is released, the MAD releases the system reset
ExtSysResetX and the internal MCUResetX signals and starts the boot
program execution from MAD bootrom if MAD GenSDIO pin is pulled low
or from external memory if GenSDIO pin is pulled high. In normal operation the program execution continues from the flash program memory. If
the MBUS line is pulled low during the power up the bootrom starts a
flash programming sequence and waits for the prommer response
through FBUS_RX line.
Power Down
The baseband is powered down by:
Issue 4 02/2002
1. Pressing the power key, that is monitored by the MAD, which
starts the power down procedure.
2. If the battery voltage is dropped below the operation limit, either by not charging it or by removing the battery.
3. Letting the CCONT watchdog expire, which switches off all
CCONT regulators and the phone is powered down.
Nokia Corporation
Page 23
NSM–3/3D
System Module
4. Setting the real time clock to power off the phone by a timer.
The RTC generates an interrupt signal, when the alarm is gone
off. The RTC interrupt signal is connected to the PWRONX line
to give a power off signal to the CCONT just like the power key.
The power down is controlled by the MAD. When the power key has been
pressed long enough or the battery voltage is dropped below the limit the
MCU initiates a power down procedure and disconnects the SIM power.
Then the MCU outputs a system reset signal and resets the DSP. If there
is no charger connected the MCU writes a short delay to CCONT watchdog and resets itself. After the set delay the CCONT watchdog expires,
which activates the PURX and all regulators are switched off and the
phone is powered down by the CCONT.
If a charger is connected when the power key is pressed the phone enters into the acting dead mode.
Modes of Operation
PAMS Technical Documentation
Acting Dead
If the phone is off when the charger is connected, the phone is powered
on but enters a state called ”acting dead”. To the user the phone acts as if
it was switched off. A battery charging alert is given and/or a battery
charging indication on the display is shown to acknowledge the user that
the battery is being charged.
Active Mode
In the active mode the phone is in normal operation, scanning for channels, listening to a base station, transmitting and processing information.
All the CCONT regulators are operating. There are several substates in
the active mode depending on if the phone is in burst reception, burst
transmission, if DSP is working etc.
Sleep Mode
In the sleep mode all the regulators except the baseband VBB and the
SIM card VSIM regulators are off. Sleep mode is activated by the MAD
after MCU and DSP clocks have been switched off. The voltage regulators for the RF section are switched off and the VCXO power control,
VCXOPwr is set low. In this state only the 32 kHz sleep clock oscillator in
CCONT is running. The flash memory power down input is connected to
the ExtSysResetX signal, and the flash is deep powered down during the
sleep mode.
Page 24
The sleep mode is exited either by the expiration of a sleep clock counter
in the MAD or by some external interrupt, generated by a charger connection, key press, headset connection etc. The MAD starts the wake up
sequence and sets the VCXOPwr and ExtSysResetX control high. After
VCXO settling time other regulators and clocks are enabled for active
mode.
Nokia Corporation
Issue 4 02/2002
PAMS Technical Documentation
If the battery pack is disconnect during the sleep mode, the CCONT pulls
the SIM interface lines low as there is no time to wake up the MCU.
Charging
Charging can be performed in any operating mode.The battery type/size
is indicated by a resistor inside the battery pack. The resistor value corresponds to a specific battery capacity. This capacity value is related to the
battery technology as different capacity values are achieved by using different battery technology.
The battery voltage, temperature, size and current are measured by the
CCONT controlled by the charging software running in the MAD.
The power management circuitry controls the charging current delivered
from the charger to the battery. Charging is controlled with a PWM input
signal, generated by the CCONT. The PWM pulse width is controlled by
the MAD and sent to the CCONT through a serial data bus. The battery
voltage rise is limited by turning the CHAPS switch off when the battery
voltage has reached 4.2 V. Charging current is monitored by measuring
the voltage drop across a 220 mohm resistor.
NSM–3/3D
System Module
Watchdog
The Watchdog block inside CCONT contains a watchdog counter and
some additional logic which are used for controlling the power on and
power off procedures of CCONT. Watchdog output is disabled when
WDDisX pin is tied low. The WD-counter runs during that time, though.
Watchdog counter is reset internally to 32 s at power up. Normally it is reset by MAD writing a control word to the WDReg.
Issue 4 02/2002
Nokia Corporation
Page 25
NSM–3/3D
System Module
Audio control
PCM serial interface
The interface consists of following signals: a PCM codec master clock
(PCMDClk), a frame synchronization signal to DSP (PCMSClk), a codec
transmit data line (PCMTX) and a codec receive data line (PCMRX). The
COBBA–GJP generates the PCMDClk clock, which is supplied to DSP
SIO. The COBBA–GJP also generates the PCMSClk signal to DSP by dividing the PCMDClk. The PCMDClk frequency is 1.000 MHz and is generated by dividing the RFIClk 13 MHz by 13. The COBBA–GJP further divides the PCMDClk by 125 to get a PCMSClk signal, 8.0 kHz.
PCMDClk
PCMSClk
PAMS Technical Documentation
PCMTxData
PCMRxData
sign extended
MSB
15 14 13 12 011 10
sign extended
MSB
LSB
LSB
Page 26
Nokia Corporation
Issue 4 02/2002
PAMS Technical Documentation
Digital Control
The baseband functions are controlled by the MAD asic, which consists of
a MCU, a system ASIC and a DSP.
MAD2 WD1
MAD2 WD1 contains following building blocks:
– ARM RISC processor with both 16–bit instruction set (THUMB mode)
and 32–bit instruction set (ARM mode)
– TI Lead DSP core with peripherials:
– API (Arm Port Interface memory) for MCU–DSP commu-
nication, DSP code download, MCU interrupt handling vec-
tors (in DSP RAM) and DSP booting.
– Serial port (connection to PCM)
– Timer
NSM–3/3D
System Module
– DSP memory
– BUSC (BusController for controlling accesses from ARM to API, Sys-
tem Logic and MCU external memories, both 8– and 16–bit memories)
– System Logic
– CTSI (Clock, Timing, Sleep and Interrupt control)
– MCUIF (Interface to ARM via B
USC). Contains MCU Boo-
tROM
– DSPIF (Interface to DSP)
– MFI (Interface to COBBA AD/DA Converters)
– CODER (Block encoding/decoding and A51&A52 ciphering)
– AccIF(Accessory Interface)
– SCU (Synthesizer Control Unit for controlling 2 separate
synthesizer)
– UIF (Keyboard interface, serial control interface for COBBA
PCM Codec, LCD Driver and CCONT)
– SIMI (SimCard interface with enhanched features)
– PUP (Parallel IO, USART and PWM control unit for vibra
and buzzer)
The MAD2 operates from a 13 MHz system clock, which is generated
from the 13Mhz VCXO frequency. The MAD2 supplies a 6,5 MHz or a 13
MHz internal clock for the MCU and system logic blocks and a 13 MHz
clock for the DSP, where it is multiplied to 45.5 MHz DSP clock. The system clock can be stopped for a system sleep mode by disabling the
VCXO supply power from the CCONT regulator output. The CCONT provides a 32 kHz sleep clock for internal use and to the MAD2, which is
Issue 4 02/2002
– Flexpool
Nokia Corporation
Page 27
NSM–3/3D
System Module
used for the sleep mode timing. The sleep clock is active when there is a
battery voltage available i.e. always when the battery is connected.
PAMS Technical Documentation
Ball Name Pin
Type
A1 MCUGemIO 0 O 2 0 MCU General
C2
D2 Col4 I/O UIF 2 Input program-
D3 Col3 I/O UIF 2 Input program-
H11 MCUGenIO1 I/O 2 Input,
E4 GND Ground
D4 Col2 I/O UIF 2 Input program-
C4 Col1 I/O UIF 2 Input program-
C3 Col0 I/O UIF 2 Input program-
D1 LCDCSX I/O UIF 2 Input external
LEADGND
Connected
to/from
Drive
req.
mA
Reset
State
pullup
Note Explanation
purpose output
Lead Ground
I/O line for key-
mable pullup
PR0201
mable pullup
PR0201
pullup
PR0201
mable pullup
PR0201
mable pullup
PR0201
mable pullup
PR0201
pullup/down
board column 4
I/O line for keyboard column 3
General purpose
I/O port
I/O line for keyboard column 2
I/O line for keyboard column 1
I/O line for keyboard column 0
serial LCD driver
chip select, par-
allel LCD driver
enable
port
E1
F12
E3 Row5LCDCD I/O UIF 2 Input,
N4 VCC_CORE Core VCC in
E2 Row4 I/O UIF 2 Input,
F4 Row3 I/O UIF 2 Input,
Page 28
LEADVCC
LoByteSelX
Nokia Corporation
pullup
pullup
pullup
pullup
PR0201
3325c10
pullup
PR0201
pullup
PR0201
Lead Power
NC
Keyboard row5
data I/O , serial
LCD driver com-
mand/data indi-
cator, parallel
LCD driver read/
write select
Power
I/O line for key-
board row 4, par-
allel LCD driver
register selection
control
I/O line for key-
board row 3, par-
allel LCD driver
data
Issue 4 02/2002
PAMS Technical Documentation
NSM–3/3D
System Module
NameBall
F3 Row2 I/O UIF 2 Input,
F2 Row1 I/O UIF 2 Input,
F1 Row0 I/O UIF 2 Input,
L11 JTDO O 2 Tri–
L5 GND Ground
N12 JTRst I Input,
M12 JTClk I Input pulldown
N13 JTDI I Input,
M13 JTMS I Input,
G13 VCC_IO IO VCC in
L12 CoEmu0 I/O 2 Input,
L13 CoEmu1 I/O 2 Input,
H4
LEADGND
Pin
Type
Connected
to/from
Drive
req.
mA
State
pullup
pullup
pullup
state
pull-
down
pullup
pullup
pullup
pullup
pullup
PR0201
pullup
PR0201
pullup
PR0201
pulldown
PD0201
PD0201
pullup
PR0201
pullup
PR0201
3325c10
pullup
PR0201
pullup
PR0201
ExplanationNoteReset
I/O line for key-
board row 2, par-
allel LCD driver
data
I/O line for key-
board row 1, par-
allel LCD driver
data
I/O line for key-
board row 0, par-
allel LCD driver
data
JTAG data out
JTAG reset
JT AG Clock
JTAG data in
JTAG mode se-
lect
Power
DSP/MCU
emulation port 0
DSP/MCU
emulation port 1
Lead Ground
L1
N3 MCUAd0 O MCU
K4
N2 MCUAd1 O MCU
N1 MCUAd2 O MCU
M4 MCUAd3 O MCU
M3 MCUAd4 O MCU
M2 MCUAd5 O MCU
M1 MCUAd6 O MCU
Issue 4 02/2002
ARMGND
MEMORY
ARMVCC
MEMORY
MEMORY
MEMORY
MEMORY
MEMORY
MEMORY
Nokia Corporation
ARM Ground
2 0 MCU address
bus
ARM Power
2 0 MCU address
bus
2 0 MCU address
bus
2 0 MCU address
bus
2 0 MCU address
bus
2 0 MCU address
bus
2 0 MCU address
bus
Page 29
NSM–3/3D
System Module
PAMS Technical Documentation
NameBall
H1 VCC_IO IO VCC in
L4 MCUAd7 O MCU
L3 MCUAd8 O MCU
L2 MCUAd9 O MCU
K5 MCUAd10 O MCU
J4 GND Ground
K3 MCUAd11 O MCU
K2 MCUAd12 O MCU
K1 MCUAd13 O MCU
J3 MCUAd14 O MCU
Pin
Type
Connected
to/from
MEMORY
MEMORY
MEMORY
MEMORY
MEMORY
MEMORY
MEMORY
MEMORY
Drive
req.
mA
State
3325c10
2 0 MCU address
2 0 MCU address
2 0 MCU address
2 0 MCU address
2 0 MCU address
2 0 MCU address
2 0 MCU address
2 0 MCU address
ExplanationNoteReset
Power
bus
bus
bus
bus
bus
bus
bus
bus
J2 MCUAd15 O MCU
MEMORY
J1 MCUAd16 O MCU
MEMORY
M10 VCC_CORE Core VCC in
H3 MCUAd17 O MCU
MEMORY
H2 MCUAd18 O MCU
MEMORY
G4 MCUAd19 O MCU
MEMORY
G3 MCUAd20 O MCU
MEMORY
G2 VCONT O
K6 ExtMCUDa0 I/O MCU
MEMORY
K9 GND Ground
L6 ExtMCUDa1 I/O MCU
MEMORY
M6 ExtMCUDa2 I/O MCU
MEMORY
2 0 MCU address
bus
2 0 MCU address
bus
Power
3325c10
2 0 MCU address
bus
2 0 MCU address
bus
2 0 MCU address
bus
2 0 MCU address
bus
2 Input MCU data bus
2 Output MCU data bus
2 Output MCU data bus
N6 ExtMCUDa3 I/O MCU
MEMORY
L7 ExtMCUDa4 I/O MCU
MEMORY
Page 30
Nokia Corporation
2 Output MCU data bus
2 Output MCU data bus
Issue 4 02/2002
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