Circuit Diagram of System Blocks (Version 05.03 Edit 2) for layout version 05
NSC–3 Phase 2
Original 10/98
3/A3–1
Circuit Diagram of Power Supply (Version 05.01 Edit 4) for layout version 05
TP4
NSC–3 Phase 2
TP5
TP20
TP11
TP12
TP13 TP8
TP14
TP15
TP7
TP17
TP9
TP18
TP6 TP10
TP16
TP19
Original 10/98
3/A3–2
Circuit Diagram of CTRLU Block (Version 05.01 Edit 4) for layout version 05
NSC–3 Phase 2
TP1
TP2
TP3
Original 10/98
3/A3–3
Circuit Diagram of Audio (Version 06.01 Edit 3) for layout version 05
TP22
NSC–3 Phase 2
TP23TP21
TP24
TP25
TP26
TP27
Original 10/98
3/A3–4
Circuit Diagram of Transmitter (Version 05.01 Edit 2) for layout version 05
TP33
NSC–3 Phase 2
TP34
Original 10/98
3/A3–5
Circuit Diagram of Receiver (Version 05.01 Edit 2) for layout version 05
NSC–3 Phase 2
Original 10/98
3/A3–6
Circuit Diagram of Synthesizer (Version 05.01 Edit 2) for layout version 05
NSC–3 Phase 2
TP
TP
Original 10/98
3/A3–7
Circuit Diagram of RF Block (Version 06.01 Edit 2) for layout version 05
NSC–3 Phase 2
Original 10/98
3/A3–8
Circuit Diagram of RF–BB Interface (Version 06.01 Edit 3) for layout version 05
NSC–3 Phase 2
Original 10/98
3/A3–9
Layout Diagram of US4R (Layout version 05)
NSC–3 Phase 2
testpoint name condition dc–level ac–level
J200 Only for R&D use
J201 Only for R&D use
J202 Only for R&D use
J203 Only for R&D use
TP1, D202 pin 78 HOOKINT Remote controlheadset pulse active 2.8 V, non–active 0 V
TP2, D202 pin 77 HEADSE-
TINT
TP3, D202 pin 117 TXF False transmission indicator Irregular from 0 V to 2.8 V
TP4, R153 RSENSE VOUT detection min 0V, typ 3.6 V, max 5.2 V
TP5, R153 VOUT VOUT detection min 0V, typ 3.6 V, max 5.2 V
TP30, G850 pin 3 VCTCXO power on typ. 0.8 V – 1.2 Vpp siniwave 19.44 MHz
TP31, G820 pin 3 CTL active state ch 300 typ. 2.2 V
TP32, G860 pin 3 CTL active state ch 1000 typ. 2.2 V
Headset connected pulse active 0 V, non–active 2.8 V
Original 10/98
3/A3–10
Layout Diagram of US4R (Layout version 05)
NSC–3 Phase 2
testpoint name condition dc–level ac–level
TP6, N150 pin 11 VR5 supply for TX 2.8 V min 2.7 V / max 2.85 V
TP7, N150 pin 15 VR4 regulated supply forRX2.8 V min 2.7 V / max 2.85 V
TP8, N150 pin 4 VR3 regulated supply forTX2.8 V min 2.7 V / max 2.85 V
TP9, N150 pin 9 VR2 regulated supply for
SYNT
TP10, N150 pin 25 VR1 regulated supply for
VCTCXO
TP11, N150 pin 20 VR7 regulated supply forTX2.8 V min 2.7 V / max 2.85 V
TP12, N150 pin 19 VR7BASEVR7 regulator ex-
ternal transistor
base current
TP13, N150 pin 13 VREF ref.voltage for N150 1.5 V +/– 1.5%
TP14, N150 pin 55 VBB regulated supply for
BaseBand
TP15, N150 pin 22 VR6 regulated supply for
COBBA
TP16, N150 pin 32 V5V regulated supply to
2GHz PLL
TP17, N150 pin 36 VSIM regulated supply for
flashing
2.8 V min 2.7 V / max 2.85 V
2.8 V min 2.7 V / max 2.85 V
2.8 V min 2.7 V / max 2.85 V
2.8 V min 2.7 V / max 2.85 V
2.8 V min 2.7 V / max 2.85 V
5.0 V min 4.8 V / max 5.2 V
3.0 V min 2.8 V / max 3.2 V
TP18, N150 pin 54 PURX RESET Power up/
down
testpoint name condition/type dc–level ac–level
TP19, N150 pin 52 CCON-
TINT
TP20, N150 pin 48 SLCLK 32.768 kHz, poweronpulsed DC (0V/2.8 V)
TP21, N250 pin 1 RFCEN active state pulse active 2.8 V, non–active 0 V
TP22, N250 pin 54 RFCSE
TTLED
TP23, N250 pin 2 RFC 19.44 MHz sine-
TP24, N250 pin 63 COB-
BACLK
TP25, N250 pin 64 ADATA active state pulsed DC (0V/2.8V)
TP26, N250 pin 13 AFC Autom.Freq.control 0 – 2.3 V, typ. 1.15 V (room temp)
TP27, N250 pin 15 TXC TX power control
TP33, R939 DETO active state 0.4 V – 2.2 V
TP34, R220 VAPC active state 0 V – 1.5 V typ.
TP35, N702 pins
9,11,12.13,14
VR8 –
VR 12
Charger interrupt pulse active 2.8 V, non–active 0 V
active state pulse active 2.8 V, non–active 0 V
wave
9.72 MHz, active
state
voltage
power on nominal 2.8 V
reset state 0 V, normal state 2.8 V
0.2Vpp–1V
pp sinewave
pulsed DC (0V/2.8V)
@level 10 typ.ca 0.5 V pulse
@level 2 typ.ca 1.7 V pulse
Original 10/98
3/A3–11
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