Nokia 434 System Module 03

5 (1)

PAMS Technical Documentation

NHN±5NT Transceiver

Chapter 3

System Module JF5

Originat 05/98

Copyright 1998 Nokia Mobile Phones. All rights reserved.

NHN±5NT

PAMS

 

 

System Module JF5

Technical Documentation

AMENDMENT RECORD SHEET

Amendment

Date

Inserted By

Comments

Number

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Page 3 ± 2

Originat 05/98

PAMS

NHN±5NT

 

 

Technical Documentation

System Module JF5

CONTENTS

Transceiver NHN±5N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 5

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 5

Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 5

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 5

Baseband . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 6

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 6

Baseband Technical Summary . . . . . . . . . . . . . . . . . . . . . . .

± 6

Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 6

Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 7

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 7

Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 7

UIF Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 9

System Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 10

Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 11

CTRLU Control Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 12

Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 14

Main Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 16

PWRU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 19

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 19

Technical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 19

Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 20

Block Diagram of MUUMI ASIC . . . . . . . . . . . . . . . . . . . . . .

± 22

Main components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 22

AUDIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 24

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 24

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 24

Technical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 25

Block description, Audio Processor . . . . . . . . . . . . . . . . . .

± 28

Main components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 30

RF Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 31

Technical Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 31

List of Submodules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 31

Specification and Functional Description . . . . . . . . . . . . . . . . .

± 31

Characteristics of the Module . . . . . . . . . . . . . . . . . . . . . . . .

± 32

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 32

Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 34

Antenna . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 37

Functional description , RF section . . . . . . . . . . . . . . . . . . . . . .

± 38

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 38

RF Key components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 39

Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 39

RX Synthesizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

± 39

Originat 05/98

Page 3 ± 3

NHN±5NT

PAMS

 

 

System Module JF5

Technical Documentation

RF Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . ± 41

Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . ± 41

RX Synthesizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . ± 42

RX loop filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . ± 42

TX Synthesizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . ± 43

TX Loop Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . ± 43

Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . ± 43

Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . ± 43

AFC function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . ± 44

Parts List of JF5 system module . . . . . . . . . . . . . . . . . . .

. . . . . ± 45

Page 3 ± 4

Originat 05/98

Nokia 434 System Module 03

PAMS

NHN±5NT

 

 

Technical Documentation

System Module JF5

Transceiver NHN±5N

Introduction

Functional Description

The NHN±5N transceiver electronics consists of the UI module PCB and the RF/system PCB. The UI module is connected to the system module with a connector. The system and RF submodules are interconnected with PCB wiring. The phone can be connected to accessories with a bottom system connector, which includes charging and accessory control.

Block Diagram

The NHN±5N consist of 2 PCB's: JF5 system module and GN4 user interface module.

The JF5 consists of 2 submodules, BASEBAND and RF. BASEBAND consist of 3 functional blocks: PWRU, CTRLU and AUDIO; RF also consists of 3 modules: RX, SYNT, TX; while the GN4 is the User Interface module (UIF±module, kindly refer to section 4.).

 

 

RX

ANT

 

 

 

PWRU

 

 

 

 

 

SYNT

DUP

CTRLU

AUDIO

TX

 

 

 

BASEBAND±submodule

 

RF±submodule

UIF±module

BUZZER

MIC,EAR

 

LCD LCD Driver

Originat 05/98

Page 3 ± 5

NHN±5NT

PAMS

 

 

System Module JF5

Technical Documentation

Baseband

Introduction

The baseband submodule controls the internal operation of the phone. It controls the user interface, i.e. LCD driver, keyboard and audio interface functions. The module performs all signalling towards the system and carries out audio±frequency signal processing. In addition, it controls the operation of the transceiver and stores tuning data for the phone.

Baseband Technical Summary

All functional blocks of the baseband are mounted on a single multi layer printed circuit board. This PCB contains also the RF±parts. The chassis of the radio unit contains separating walls for baseband and RF. All components of the baseband are surface mounted and soldered by reflow.

The connections to accessories are fed through the CAP (Common Accessory Platform) bottom connector of the radio unit. The connections to User Interface ±module (UIF) are fed through a board to board connector. There is no physical connector between RF and baseband.

Modes of Operation

The module has three operating modes: stand±by, listening and conversation mode.

Standby mode:

MCU clock is switched off, only NIPA timer is running to enable battery save timings.

If a charger is connected, the MCU doesn`t go to standby mode.

Listening mode:

In the listening mode some blocks of the audio IC (NIPA) are in standby state.

Conversation mode:

In the conversation mode all ICs are active.

Page 3 ± 6

Originat 05/98

PAMS

 

 

 

 

 

 

 

 

 

 

 

NHN±5NT

 

 

 

 

 

 

 

 

 

 

 

 

Technical Documentation

 

 

 

 

 

 

 

System Module JF5

Maximum Ratings

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

 

 

 

 

 

 

 

Value

 

 

 

Operating temperature range

 

 

±25 ... +55 deg. C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Storage temperature range

 

 

 

±40 ... +85 °C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VBAT max.

 

 

 

 

8.8 V (TX off)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VBAT max.

 

 

 

 

7.5 V (TX on)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VC max.

 

 

 

 

16 V.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Battery charging is enabled

 

 

 

+5 ... +45 °C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DC Characteristics

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Pin / Conn.

Line Symbol

 

Minimum

 

Typical /

 

Maximum

 

 

Unit / Notes

 

 

 

 

 

 

Nominal

 

 

 

 

 

 

 

VCS

 

11.0V

 

12.0V

 

16.0V

 

Slow charger

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9.8V

 

10.3V

 

10.8V

 

Fast charger

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VBAT

 

5.3V

 

6.0V

 

8.8V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VRF

 

5.3V

 

6.0V

 

8.8V

 

VBAT for RF mod-

 

 

 

 

 

 

 

 

 

 

 

ule

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VA

 

3.2V

 

3.3V

 

3.42V

 

Imax = 40mA

 

 

 

 

 

 

 

 

 

 

 

 

 

VL

 

3.2V

 

3.3V

 

3.42V

 

Imax = 40mA

 

 

 

 

 

 

 

 

 

 

 

 

 

VL3

 

4.5V

 

4.75V

 

5.0V

 

Imax = 180mA

 

 

 

 

 

 

 

 

 

 

 

 

 

VREF

 

3.2V

 

3.3V

 

3.42V

 

Imax = 5mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Signals

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Pin /

Line Symbol

Mini-

Typi-

 

Max-

 

Notes

Conn.

 

mum

cal /

 

i-

 

 

 

 

 

 

 

 

 

 

Nomi-

 

mum

 

 

 

 

 

 

 

 

 

 

nal

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6/system

M2BUS

0V

 

 

 

0.7V

Input low level

 

 

Isink<5m

 

 

 

 

 

 

 

 

 

 

 

 

 

ABaud

 

 

2.3V

 

 

 

5.25

Input high level

 

 

 

 

 

 

 

rate 9600

 

 

 

 

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

bits/s.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0V

0.2V

 

0.35

Output low level

 

 

 

 

 

 

 

 

 

 

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4.1V

4.5V

 

5.0V

Output high level

 

 

 

 

 

 

 

 

 

 

 

 

 

10/sys-

HOOK

0V

 

 

 

0.5V

Input low level

 

 

Hook

tem

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2.4V

 

 

 

3.2V

Input high level

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Originat 05/98

Page 3 ± 7

NHN±5NT

 

 

 

 

 

PAMS

 

 

 

 

 

 

 

System Module JF5

 

 

 

Technical Documentation

 

 

 

 

 

 

 

Pin /

Line Symbol

Mini-

Typi-

Max-

Notes

 

Conn.

 

mum

cal /

i-

 

 

 

 

 

Nomi-

mum

 

 

 

 

 

nal

 

 

 

 

 

 

 

 

 

 

2/system

VOUT

0V

0.2V

0.4V

Output low, power

HDA de-

 

 

 

 

 

off

vice pow-

 

 

 

 

 

 

er on/off

 

 

4.1V

4.5V

5.0V

Output high, power

 

 

 

 

 

on

 

 

 

 

 

 

 

 

5/system

BOOST0

 

0V

 

booster detect /

RF

 

 

 

 

 

power control º0º

booster

 

 

 

 

 

 

detection

 

 

 

3.3V

 

booster detect /

 

 

 

 

/ power

 

 

 

 

 

power control º1º

 

 

 

 

 

select

 

 

 

 

 

 

 

 

 

 

 

 

 

11/sys-

BOOST1

 

0V

 

booster detect /

RF

tem

 

 

 

 

power control º0º

booster

 

 

 

 

 

 

detection

 

 

 

3.3V

 

booster detect /

 

 

 

 

/ power

 

 

 

 

 

power control º1º

 

 

 

 

 

select

 

 

 

 

 

 

 

 

 

 

 

 

 

12/sys-

VCS

9.8V

 

16V

Isink < 730mA

 

tem

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2/battery

BSI

 

1.95V

 

400mAh Li±ION

A 47k

 

 

 

 

 

 

pull±up

 

 

 

0.45V

 

550mAh NiMH

 

 

 

 

resistor in

 

 

 

 

 

 

 

 

 

1.95V

 

1500mAh Li±ION

HP.

 

 

 

 

 

 

 

3/battery

BTEMP

 

1.0V

 

47k , B=4050 NTC between

 

 

 

 

 

BTEMP and ground in battery

 

 

 

 

 

pack.

 

 

 

 

 

 

A 47k pull±up resistor in HP.

 

 

 

 

 

Vibrator control output (AC±

 

 

 

 

 

controlled)

 

 

 

 

 

 

 

 

3,4/UIF

BACKLIGHT

 

0mA

 

backlights off

Back-

 

 

 

 

 

 

light±

 

 

 

40mA

 

backlights on

ing for

 

 

 

 

 

 

keymat

 

 

 

 

 

 

 

17±24/UI

LD(0:7)

0V

 

0.7V

Output/Input low

LCD I/O,

F

 

 

 

 

 

keypad

 

2.3V

 

3.3V

Output/Input high

 

 

 

output

 

 

 

 

 

 

 

 

 

 

 

 

 

7±9/UIF

ROW(0:2)

0V

 

0.7V

Input low

Keypad

 

 

 

 

 

 

input

 

 

2.8V

 

3.3V

Input high

 

 

 

 

 

 

 

 

 

 

 

Page 3 ± 8

Originat 05/98

PAMS

 

 

 

 

 

 

 

 

NHN±5NT

 

 

 

 

 

 

 

 

 

 

 

Technical Documentation

 

 

 

 

 

 

 

System Module JF5

 

 

 

 

 

 

 

 

 

 

 

Pin /

Line Symbol

 

Mini-

 

Typi-

 

Max-

Notes

 

Conn.

 

 

mum

 

cal /

 

i-

 

 

 

 

 

 

 

Nomi-

mum

 

 

 

 

 

 

 

nal

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

25/UIF

LCDREG

 

0V

 

 

 

 

0.7V

Output low

LCD

 

 

 

 

 

 

 

 

 

 

data/con-

 

 

 

2.8V

 

 

 

 

3.3V

Output high

 

 

 

 

 

 

 

trol

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

26/UIF

LCDCS

 

0V

 

 

 

 

0.7V

Output low

LCD chip

 

 

 

 

 

 

 

 

 

 

select

 

 

 

2.8V

 

 

 

 

3.3V

Output high

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

27/UIF

LCDRESET

 

0V

 

 

 

 

0.7V

Output low

LCD re-

 

 

 

 

 

 

 

 

 

 

set

 

 

 

2.8V

 

 

 

 

3.3V

Output high

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

11/UIF

XNWR

 

0V

 

 

 

 

0.7V

Output low

LCD write

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2.8V

 

 

 

 

3.3V

Output high

 

 

 

 

 

 

 

 

 

 

 

 

28/UIF

XNRD

 

0V

 

 

 

 

0.7V

Output low

LCD read

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2.8V

 

 

 

 

3.3V

Output high

 

 

 

 

 

 

 

 

 

 

 

 

10/UIF

LCDCLK

 

0V

 

 

 

 

0.7V

Output low

LCD

 

 

 

 

 

 

 

 

 

 

clock

 

 

 

2.8V

 

 

 

 

3.3V

Output high

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

12/UIF

XPWRON

 

0V

 

 

 

 

0.7V

Input low

Power

 

 

 

 

 

 

 

 

 

 

ON but-

 

 

 

2.8V

 

 

 

 

3.3V

Input high

 

 

 

 

 

 

 

ton

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

UIF Connector

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Signal Name

 

Pin

 

 

 

 

Notes

 

VL

 

1

 

 

 

Logic supply voltage 3.3V

 

 

 

 

 

 

 

 

 

CALLLED

 

2

 

 

 

Call LED

 

 

 

 

 

 

 

 

BACKLIGHT

3,4

 

 

 

Backlights on/off

 

 

 

 

 

 

 

 

VNEG

 

6

 

 

 

Negative voltage for LCD module

 

 

 

 

 

 

 

 

ROW0,1,2

 

7±9

 

 

 

Lines for keyboard read

 

 

 

 

 

 

 

 

 

LCDCLK

 

10

 

 

 

LCD Driver clock

 

 

 

 

 

 

 

 

XNWR

 

11

 

 

 

LCD Driver write selection input

 

 

 

 

 

 

 

XPWRON

 

12

 

 

 

Power on control from keyboard

 

 

 

 

 

 

 

GND

 

13,14,15,16

 

Ground

 

 

 

 

 

 

 

 

 

 

LD(0:7)

 

17±24

 

 

 

Parallel data for LCD driver

 

 

 

 

 

 

 

 

LCDREG

 

25

 

 

 

LCD Driver control/data select

 

 

 

 

 

 

 

 

 

 

 

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System Module JF5

 

Technical Documentation

 

 

 

Signal Name

Pin

Notes

LCDCS

26

LCD Driver chip select

 

 

 

LCDRESET

27

LCD Driver reset

 

 

 

XNRD

28

LCD Driver read selection input

 

 

 

System Connector

 

 

 

 

 

Signal Name

Pin

Notes

GND

1, 8

Power supply ground.

 

 

 

XMIC

3

External audio input from accessories

 

 

or handsfree microphone. There is a

 

 

pull±down resistor in accessory for

 

 

identification

 

 

 

M2BUS

6

Serial bidirectional data and control be-

 

 

tween the handphone and accessories.

 

 

A 10k pull±up resistor in HP.

 

 

 

BOOST0,1

5,11

RF booster detection lines / RF power-

 

 

level control.

 

 

 

HOOK

10

HOOK±indication. The phone has a

 

 

47k pull±up resistor.

 

 

 

VOUT

2

Hand±free device power on/off.

 

 

 

XEAR

9

External audio output to accessories or

 

 

handsfree speaker. There is a DC volt-

 

 

age control for HF unit mute control.

 

 

 

BGND

BGND

Battery connector

 

 

 

BTEMP

BTEMP

Battery connector, Battery temperature

 

 

 

BSI

BSI

Battery connector

 

 

 

VBAT

B+

Battery connector

 

 

 

VCS

12,CH+,

Battery charging voltage

 

DC+

 

 

 

 

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Technical Documentation

System Module JF5

Connections

Charging Connectors

Battery Connector

4

3

2

1

12

7

 

 

+ 3

4 ±

1

2

1

6

 

 

 

Locking

 

 

RF±connector

 

 

 

(not used)

System Connector

 

 

 

 

 

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System Module JF5

Technical Documentation

CTRLU Control Block

The Control block controls all phones functions and it includes modem and SIS±processor too.

CTRLU internal signals, input

Signal Name

Notes

From

VL

Logic supply voltage, 3.3V.

PWRU

 

 

 

VL3

Logic supply voltage, 4.75V.

PWRU

 

 

 

VREF

Reference voltage 3.3V 3%. Max.

PWRU

 

 

 

XRES

Reset line from MUUMI

PWRU

 

 

 

PWRON

Power on signal from MUUMI

PWRU

 

 

 

VCHARG

Charger voltage to A/D converter

PWRU

 

 

 

VBATSW

Battery voltage to A/D converter.

VCHARG

 

 

 

CLKMCU

Clock signal from NIPA.

AUDIO

 

 

 

NMI

No maskable Interrupt reques from NIPA

AUDIO

 

 

 

XINT

Interrupt reques from NIPA.

AUDIO

 

 

 

HOOK

HOOK±indication

SYSTEM

 

 

 

BTEMP

Battery temperature

SYSTEM

 

 

 

BSI

Battery size indication

SYSTEM

 

 

 

M2BUS

Serial interface

SYSTEM

 

 

 

RFTEMP

RF temperature

SYNT

 

 

 

RSSI

Received signal strenght indication

RX

 

 

 

TXI

Transmitter output power level indication

TX

 

 

 

XPWRON

Power buttom from UIF.

UIF

 

 

 

ROW0

Line for keyboard read.

UIF

 

 

 

ROW1

Line for keyboard read.

UIF

 

 

 

ROW2

Line for keyboard read.

UIF

 

 

 

ACCDET

Accessory detection line

SYSTEM

 

 

 

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Technical Documentation

System Module JF5

CTRLU internal signals, output

 

 

 

 

 

 

Signal Name

Notes

 

To

CSW

Charger control

 

PWRU

 

 

 

 

VOUT

Headset±adapter powersupply

 

SYSTEM

 

 

 

 

M2BUS

Common serial clock (NIPA,sis)

 

SYSTEM

 

 

 

 

AGC

Gain control

 

RX

 

 

 

 

RXE

RX Circuit power on/off

 

RX

 

 

 

 

SCLK

Synchronous data clock for synthesizers

 

SYNT

 

 

 

 

SDAT

Synchronous data for synthesizers /

 

SYNT, TX

 

TX duplex filter current control 2 (option)

 

 

 

 

 

 

SLE

Synthesizer data latch enable

 

SYNT

 

 

 

 

TXE

Transmitter control (on/off)

 

TX

 

 

 

 

TXC

Transmitter Power Control

 

TX

 

 

 

 

XNCS

NIPA chip select signal

 

AUDIO

 

 

 

 

XNWR

NIPA/LCD write control signal

 

AUDIO.UIF

 

 

 

 

XNRD

NIPA/LCD read control signal

 

AUDIO,UIF

 

 

 

 

NA0±3

NIPA/LCD address bus

 

AUDIO,UIF

 

 

 

 

ND0±7

NIPA/LCD data bus

 

AUDIO,UIF

 

 

 

 

EARENA

Ear amplifier enable

 

AUDIO

 

 

 

 

KBINT

Keyboard interrupt

 

AUDIO

 

 

 

 

MBUSINT

MBUS interrupt

 

AUDIO

 

 

 

 

MBUSOUT

MBUS out

 

PWRU

 

 

 

 

LIGHTS

Backlights on/off

 

UIF

 

 

 

 

LCDCS

LCD Driver chip select

 

UIF

 

 

 

 

LCDRESET

LCD Driver reset

 

UIF

 

 

 

 

XEARON

External ear amplifier enable

 

SYSTEM

 

 

 

 

XEARDC

PHF5 DC mute control

 

SYSTEM

 

 

 

 

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System Module JF5

Technical Documentation

Block Description

± CTRLU ± PWRU

MCU controls the watchdog timer in the MUUMI ASIC. It sends a positive pulse approximately once every 1 s to the XPWROFF pin of the MUUMI to keep the power on. If the CTRLU fails to deliver this pulse, the MUUMI will remove power from the system. The CTRLU controls also the charger on/off switching in the PWRU block. When power off is requested, the CTRLU leaves the MUUMI watchdog without reset. After the watchdog has elapsed the MUUMI cuts off the supply voltages from the phone. Battery charging is controlled by CSW line.

VBATSW , Battery voltage measurement

Battery voltage can be measured from 5.4 V to 10.3 V nominal with 3.3 V reference voltage. The absolute accuracy is low because of the reference 3 % accuracy and A/D±converter +/± 8 LSB accuracy . This battery voltage measurement offset error must be calibrated with input voltage

6.0 V and 8.2 V. The A/D conversion result can be calculated from the following equation:

A/D readout = 1024 * (VBATSW* ( 47/147)) / VREF

VREF=3.3 V

For example:

 

 

 

8.2 V

results

814

= 32EH

6.0 V

results

595

= 253H

VCHARG , Charger voltage measurement

Charger voltage can be measured up to 18.3 V nominal. The A/D±conversion result can be calculated from equation :

A/D readout = 1024 * (VCSW*(22/122)) / VREF VREF=3.3 V

For example:

 

 

12.0 V

gives

671 = 29FH

6.0 V

gives

336 = 150H

BSI , Battery size indication

Battery type can be defined with the BSI resistor value. A NiMH battery has a different BSI resistor compared with a Li±ION battery. Different sizes of the Li±ION batteries cannot be identified.

BTEMP , Battery temperature measurement

Battery temperature measurement is implemented with a 47 kohm NTC with N value of 4050 and 47 kohm pullup resistor. The A/D conversion readout can be calculated from equation:

A/D readout= 1024* ( RNTC /( RNTC+47k))

For example:

 

 

 

45

C

gives

?

25

C

gives

?

5 C

gives

?

0 C

gives

?

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Technical Documentation

System Module JF5

Battery voltage is measured over the VBATSW and charging voltage over the VCHARG. Battery temperature is measured over the BTEMP line.

Battery size is determined by reading the BSI line. This is pulled to +3,3V by a 47kohm resistor. In the battery pack a ºsizeº resistor is connected between BSI and GND. Battery charging is controlled by the CSW line. Muumi watchdog is refreshed by controlling XPWROFF line.

± CTRLU ± AUDIO

Interface between the MCU and the NIPA circuit is a bidirectional 8±bit data bus with 4 address lines. Address, data and control lines are used in the MCU as I/O±port pins. The data lines direction is controlled with the MCU data direction register. The interface includes address outputs

NA0±3, data inputs (read) / outputs (write) ND0±7, chip select control output XCS , read control output XRD, write control output XWR and interrupt input XINT. When the MCU is in sleep state, the control signals XRD and XCS must be in '0' state and the address output NA0±3 and NWR in '1' state and data lines ND0±7 must be in `0` state.

± CTRLU ± UIF

The keyboard is connected directly to the controller. ND0±6 are the output lines and ROW0±2 are the input lines. Keyboard scanning is done by driving one ND line to 0 V at the time. If any key is pressed, then the corresponding ROW line goes to 0V and the phone knows which key is pressed.

Data to the LCD Driver is written and read by ND(0:7) lines. XNRD/

XNWT are the read / write selection lines and NA0 is the instruction / data register selection line. LCDCS line enables the LCD driver.

ND(0:7) lines are in 0 V state when phone is in sleep mode so that any key pressing can be indicated.

Keyboard and LCD lights are controlled by LIGHTS signal.

± CTRLU ± RX

RX circuit power is switched on/off by RXE signal.

The received signal strength is measured over the RSSI and the intermediate frequency is measured over the IF.

± CTRLU ± SYNT

RF temperature is measured over the RFTEMP. Frequency is controlled by the AFC signal. The synthesizer is controlled via the synchronous serial bus SDAT/SCLK. The data is latched to the synthesizer by the positive edge of SLE line. The TX synthesizer power on/off (TXS/port P3) line is controlled via PLL circuit.

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System Module JF5

Technical Documentation

± CTRLU ± TX

The transmitter output power level is measured over the TXI. TXE line activates the power module. The power is controlled via TXC line which is a PWM±controlled output port.

Main Components

± MCU

The phone MCU H8/3092 is a CMOS MCU. All the memory needed (128 kB ROM, 4 kB RAM) except the EEPROM, is located in the controller. MCU operating clock (7.3728 MHz) is generated on the NIPA.

MCU Pins are listed in the table:

Pin No

Port

Signal

Description

1

PB0

SISCLK

Clock for SIS prosessor

 

 

 

 

2

PB1

SISDATA

Serialdata to SIS prosessor

 

 

 

 

3

PB2

EDATA

Serial data to EEPROM

 

 

 

 

4

PB3

RXD

Serial interface (M2BUS)

 

 

 

 

5

PB4

SCLK

Serial clock for synthesiz

 

 

 

 

6

PB5

HOOK

Handset hook signal

 

 

 

 

7

PB6

PWRON

Power button

 

 

 

 

8

PB7

SLE

RX/TX synthesizer latch

 

 

 

 

9

P90

TXD

Serial interface (M2BUS)

 

 

 

 

10

P92

RXD

M2BUS net free timer input

 

 

 

 

11

P94

ECLK

Clock to EEPROM

 

 

 

 

12

Vss

GND

MCU Ground

 

 

 

 

13±20

P30±P37

ND0±7

Paraller data bus for NIPA,LCD & keys

 

 

 

 

21

Vcc

VL

Power supply for processor

 

 

 

 

22

P10

NA0

Address line for NIPA and LCD regis-

 

 

 

ter

 

 

 

 

23

P11

NA1

Address line for NIPA

 

 

 

 

24

P12

NA2

Address line for NIPA

 

 

 

 

25

P13

NA3

Address line for NIPA

 

 

 

 

26

P14

XNCS

NIPA chip select

 

 

 

 

27

P15

XNWR

Read/write control to NIPA

 

 

 

 

28

P16

XNRD

Read/write control to NIPA

 

 

 

 

29

P17

LCDCD

LCD chip select

 

 

 

 

30

 

GND

MCU Ground

 

 

 

 

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Technical Documentation

System Module JF5

31

P20

LIGHTS

Backlight control

 

 

 

 

32±35

P21±P24

ROW0±3

Keypad inputs

 

 

 

 

36

P25

 

protoseries indicator, pull±down if pro-

 

 

 

to

 

 

 

 

37

P26

 

 

 

 

 

 

38

P27

CALLCNT

Call continue during battery change

 

 

 

 

39

P50

XPWROFF

Muumi watchdog refresh

 

 

 

 

40

P51

EARENA

EAR amplifier enable

 

 

 

 

41

P52

 

 

 

 

 

 

42

P53

LCDRESET

Reset to LCD

 

 

 

 

43

P60

 

 

 

 

 

 

44

MD0

 

 

 

 

 

 

45

MD1

 

 

 

 

 

 

46

 

 

 

 

 

 

 

47

STBY

 

 

 

 

 

 

48

RES

XRES

Reset from MUUMI

 

 

 

 

49

NMI

NMI

Interrupt request from NIPA

 

 

 

 

50

Vss

GND

Ground

 

 

 

 

51

EXTAL

EXTAL

External system clock from NIPA

 

 

 

 

52

XTAL

 

 

 

 

 

 

53

Vcc

VL

 

 

 

 

 

54

P63

TXE

Transmitter on/off

 

 

 

 

55

P64

AGC

Gain control

 

 

 

 

56

P65

RXE

RX circuit power on/off

 

 

 

 

57

RESO

 

 

 

 

 

 

58

AVcc

 

 

 

 

 

 

59

P70

VBATSW

Battery voltage

 

 

 

 

60

P71

VCHARG

Charger voltage

 

 

 

 

61

P72

RSSI

Received signal strength

 

 

 

 

62

P73

TXI

Transmitter power monitor

 

 

 

 

63

P74

BTEMP

Battery temperature

 

 

 

 

64

P75

BSI

Battery size indication

 

 

 

 

65

P76

RFTEMP

RF temperature

 

 

 

 

66

P77

ACCDET

Accessory detection

 

 

 

 

67

Vref

Vref

Reference voltage for processor

 

 

 

 

68

AVcc

Vref

Reference voltage for processor

 

 

 

 

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