NEC PD789426, PD789436, PD789446, PD789456 User Guide

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User’s Manual

PD789426, 789436, 789446

µµ

789456 Subseries

8-Bit Single-Chip Microcontrollers

PD789425

µµµµ

PD789426

µµµµ

PD789435

µµµµ

PD789436

µµµµ

PD78F9436

µµµµ

PD789445

µµµµ

PD789446

µµµµ

PD789455

µµµµ

PD789456

µµµµ

PD78F9456

µµµµ

Document No. U15075EJ1V0UM00 (1st edition) Date Published November 2000 N CP(K)

1999

Printed in Japan

2000

[MEMO]

User’s Manual U15075EJ1V0UM00

NOTES FOR CMOS DEVICES

1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS

Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it.

2 HANDLING OF UNUSED INPUT PINS FOR CMOS

Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused

pin should be connected to V being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices.

or GND with a resistor, if it is considered to have a possibility of

3 STATUS BEFORE INITIALIZATION OF MOS DEVICES

Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function.

EEPROM is a trademark of NEC Corporation. Windows and Windows NT are either registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. PC/AT is a trademark of International Business Machines Corporation. HP9000 series 700 and HP-UX are trademarks of Hewlett-Packard Company. SPARCstation is a trademark of SPARC International, Inc. Solaris and SunOS are trademarks of Sun Microsystems, Inc. OSF/Motif is a trademark of Open Software Foundation, Inc. NEWS and NEWS-OS are trademarks of Sony Corporation. TRON is an abbreviation of The Realtime Operating system Nucleus. ITRON is an abbreviation of Industrial TRON.

User’s Manual U15075EJ1V0UM00

The export of these products from Japan is regulated by the Japanese government. The export of some or all of these products may be prohibited without governmental license. To export or re-export some or all of these products from a country other than Japan may also be prohibited without a license from that country. Please call an NEC sales representative.

License not needed: The customer must judge the need for license:

PD78F9436, 78F9456

PD789425, 789426, 789435, 789436, 789445,

789446, 789455, 789456

•

The information in this document is current as of September, 2000. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information.

•

No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.

•

NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others.

•

Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information.

•

While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features.

•

NEC semiconductor products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of a semiconductor product depend on its quality grade, as indicated below. Customers must check the quality grade of each semiconductor product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio

and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots

"Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster

systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support)

"Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life

support systems and medical equipment for life support, etc. The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness to support a given application. (Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for

NEC (as defined above).

M8E 00.4

User’s Manual U15075EJ1V0UM00

Regional Information

Some information contained in this document may vary from country to country. Before using any NEC product in your application, pIease contact the NEC office in your country to obtain a list of authorized representatives and distributors. They will verify:

•

Device availability

•

Ordering information

•

Product release schedule

•

Availability of related technical literature

•

Development environment specifications (for example, specifications for third-party tools and

components, host computers, power plugs, AC supply voltages, and so forth)

•

Network requirements

In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary from country to country.

NEC Electronics Inc. (U.S.)

Santa Clara, California Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288

NEC Electronics (Germany) GmbH

Duesseldorf, Germany Tel: 0211-65 03 02 Fax: 0211-65 03 490

NEC Electronics (UK) Ltd.

Milton Keynes, UK Tel: 01908-691-133 Fax: 01908-670-290

NEC Electronics Italiana s.r.l.

Milano, Italy Tel: 02-66 75 41 Fax: 02-66 75 42 99

NEC Electronics (Germany) GmbH

Benelux Office Eindhoven, The Netherlands Tel: 040-2445845 Fax: 040-2444580

NEC Electronics (France) S.A.

Velizy-Villacoublay, France Tel: 01-30-67 58 00 Fax: 01-30-67 58 99

NEC Electronics (France) S.A.

Madrid Office Madrid, Spain Tel: 91-504-2787 Fax: 91-504-2860

NEC Electronics (Germany) GmbH

Scandinavia Office Taeby, Sweden Tel: 08-63 80 820 Fax: 08-63 80 388

NEC Electronics Hong Kong Ltd.

Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044

NEC Electronics Hong Kong Ltd.

Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411

NEC Electronics Singapore Pte. Ltd.

United Square, Singapore Tel: 65-253-8311 Fax: 65-250-3583

NEC Electronics Taiwan Ltd.

Taipei, Taiwan Tel: 02-2719-2377 Fax: 02-2719-5951

NEC do Brasil S.A.

Electron Devices Division Guarulhos-SP Brasil Tel: 55-11-6462-6810 Fax: 55-11-6462-6829

User’s Manual U15075EJ1V0UM00

J00.7

[MEMO]

User’s Manual U15075EJ1V0UM00

INTRODUCTION

Target Readers

Purpose

Organization

This manual is intended to give user engineers an understanding of the functions of

PD789426, 789436, 789446, and 789456 Subseries to design and develop its

the

application systems and programs. Target products:

PD789426 Subseries:µPD789425, 789426

•

PD789436 Subseries:µPD789435, 789436

•

PD789446 Subseries:µPD789445, 789446

•

PD789456 Subseries:µPD789455, 789456

•

This manual is designed to deepen your understanding of the following functions using the following organization.

Two manuals are available for the µPD789426, 789436, 789446, and 789456 Subseries: This manual and the instruction manual (common to the 78K/0S Series).

PD789426, 789436, 789446,

and 789456 Subseries

User’s Manual

Pin functions

•

Internal block functions

•

Interrupts

•

Other internal peripheral functions

•

78K/0S Series User’s Manual

Instructions

CPU function

•

Instruction set

•

Instruction description

•

How to Use This Manual

It is assumed that the readers of this manual have general knowledge of electrical engineering, logic circuits, and microcontrollers.

To understand the overall functions of the

•

789456 Subser ies

Read this manual in the order of the

→

How to read register formats

•

The name of a bit whose number is enclosed in brackets is reserved for the

→

assembler and is defined for the C compiler by the header file sfrbit.h.

To learn the detailed functions of a register whose register name is known

•

See

→

To learn the details of the instruction functions of the 78K/0S series

• →

APPENDIX C REGISTER INDEX

Refer to available.

78K/0S Series Instructions User’s Manual (U11047E)

CONTENTS

PD789426, 789436, 789446, and

separately

User’s Manual U15075EJ1V0UM00 7

Conventions

Data significance: Higher digits on the left and lower digits on the right Active low representation: xxx (overscore over pin or signal name)

: Footnote for item marked with

Note Caution Remark

: Information requiring particular attention

: Supplementary information

Note

in the text

Numerical representation: Binary ... xxxx or xxxxB

Decimal ... xxxx Hexadecimal ... xxxxH

Other Related Documents

Document Name

SEMICONDUCTOR SELECTION GUI DE Products & Packages (CD-ROM) X13769X Semiconductor Device Mounting Technology Manual C10535J C10535E Quality Grades on NEC Semic onductor Devices C11531J C11531E NEC Semiconductor Device Reliability /Quality Control System C10983J C10983E Guide to Prevent Damage for Semi conductor Devices by El ec trostatic Discharge (E S D) C11892J C11892E Guide to Microcomputer-Relat ed P roducts by Third Parties U11416J —

Document No.

Japanese English

Caution The related documents listed above are subject to change without notice. Be sure to use the

latest version of each document for designing.

User’s Manual U15075EJ1V0UM00 9

[MEMO]

10 User’s Manual U15075EJ1V0UM00

CONTENTS

CHAPTER 1 GENERAL...........................................................................................................................25

1.1 Features.......................................................................................................................................25

1.2 Applications................................................................................................................................25

1.3 Ordering Information .................................................................................................................26

1.4 Pin Configuration (Top View)....................................................................................................27

1.4.1 Pin configuration of µPD789426, 789436 Subseries (Top View) ................................................. 27

1.4.2 Pin configuration of

PD789446, 789456 Subseries (Top View) ................................................. 28

1.5 78K/0S Series Lineup.................................................................................................................30

1.6 Block Diagram ............................................................................................................................32

1.6.1 Block diagram of µPD789426, 789436 Subseries........................................................................ 32

1.6.2 Block diagram of

PD789446, 789456 Subseries........................................................................ 33

1.7 Overview of Functions...............................................................................................................34

CHAPTER 2 PIN FUNCTIONS................................................................................................................37

2.1 List of Pin Functions..................................................................................................................37

2.2 Description of Pin Functions ....................................................................................................40

2.2.1 P00 to P03 (Port 0)....................................................................................................................... 40

2.2.2 P10, P11 (Port 1).......................................................................................................................... 40

2.2.3 P20 to P26 (Port 2)....................................................................................................................... 40

2.2.4 P30 to P33 (Port 3)....................................................................................................................... 41

2.2.5 P50 to P53 (Port 5)....................................................................................................................... 41

2.2.6 P60 to P65 (Port 6)....................................................................................................................... 41

2.2.7 P70 to P72 (Port 7)....................................................................................................................... 42

2.2.8 P80, P81 (Port 8).......................................................................................................................... 42

2.2.9 P90 to P97 (Port 9)....................................................................................................................... 42

2.2.10 S0 to S14...................................................................................................................................... 42

2.2.11 COM0 to COM3............................................................................................................................ 42

2.2.12 V

to V

...................................................................................................................................42

LC0

LC2

2.2.13 CAPH, CAPL ................................................................................................................................42

2.2.14 RESET.......................................................................................................................................... 42

2.2.15 X1, X2........................................................................................................................................... 42

2.2.16 XT1, XT2 ...................................................................................................................................... 42

2.2.17 V

2.2.18 V

2.2.19 V

................................................................................................................................................ 43

(µPD78F9436, 78F9456 only)................................................................................................ 43

2.2.20 IC (mask ROM version only)......................................................................................................... 43

2.3 Pin Input/Output Circuits and Recommended Connection of Unused Pins........................44

CHAPTER 3 CPU ARCHITECTURE.......................................................................................................47

3.1 Memory Space............................................................................................................................47

3.1.1 Internal program memory space................................................................................................... 53

User’s Manual U15075EJ1V0UM00 11

3.1.2 Internal data memory (internal high-speed RAM) space..............................................................54

3.1.3 Special function register (SFR) area.............................................................................................54

3.1.4 Data memory addressing..............................................................................................................55

3.2 Processor Registers.................................................................................................................. 61

3.2.1 Control registers ...........................................................................................................................61

3.2.2 General-purpose registers............................................................................................................ 64

3.2.3 Special function registers (SFRs).................................................................................................65

3.3 Instruction Address Addressing.............................................................................................. 68

3.3.1 Relative addressing...................................................................................................................... 68

3.3.2 Immediate addressing ..................................................................................................................69

3.3.3 Table indirect addressing .............................................................................................................70

3.3.4 Register addressing......................................................................................................................70

3.4 Operand Address Addressing.................................................................................................. 71

3.4.1 Direct addressing..........................................................................................................................71

3.4.2 Short direct addressing.................................................................................................................72

3.4.3 Special function register (SFR) addressing..................................................................................73

3.4.4 Register addressing......................................................................................................................74

3.4.5 Register indirect addressing......................................................................................................... 75

3.4.6 Based addressing......................................................................................................................... 76

3.4.7 Stack addressing..........................................................................................................................76

CHAPTER 4 PORT FUNCTIONS........................................................................................................... 77

4.1 Port Functions ........................................................................................................................... 77

4.2 Port Configuration..................................................................................................................... 80

4.2.1 Port 0............................................................................................................................................81

4.2.2 Port 1............................................................................................................................................82

4.2.3 Port 2............................................................................................................................................83

4.2.4 Port 3............................................................................................................................................89

4.2.5 Port 5............................................................................................................................................91

4.2.6 Port 6............................................................................................................................................92

4.2.7 Port 7............................................................................................................................................93

4.2.8 Port 8 (

4.2.9 Port 9 (

PD789426, 789436 Subseries only)...............................................................................94

PD789426, 789436 Subseries only)...............................................................................95

4.3 Registers Controlling Port Function........................................................................................ 96

4.4 Port Function Operation......................................................................................................... 102

4.4.1 Writing to I/O port........................................................................................................................102

4.4.2 Reading from I/O port................................................................................................................. 102

4.4.3 Arithmetic operation of I/O port...................................................................................................102

CHAPTER 5 CLOCK GENERATOR.................................................................................................... 103

5.1 Clock Generator Functions .................................................................................................... 103

5.2 Clock Generator Configuration.............................................................................................. 103

5.3 Registers Controlling Clock Generator................................................................................. 105

5.4 System Clock Oscillators ....................................................................................................... 108

5.4.1 Main system clock oscillator.......................................................................................................108

12 User’s Manual U15075EJ1V0UM00

5.4.2 Subsystem clock oscillator.........................................................................................................109

5.4.3 Divider circuit..............................................................................................................................111

5.4.4 When no subsystem clock is used ............................................................................................. 111

5.5 Clock Generator Operation .....................................................................................................112

5.6 Changing Setting of System Clock and CPU Clock..............................................................113

5.6.1 Time required for switching between system clock and CPU clock ........................................... 113

5.6.2 Switching between system clock and CPU clock....................................................................... 114

CHAPTER 6 16-BIT TIMER ..................................................................................................................115

6.1 16-Bit Timer Functions ............................................................................................................115

6.2 16-Bit Timer Configuration......................................................................................................116

6.3 Registers Controlling 16-Bit Timer.........................................................................................119

6.4 16-Bit Timer Operation.............................................................................................................123

6.4.1 Operation as timer interrupt........................................................................................................ 123

6.4.2 Operation as timer output........................................................................................................... 125

6.4.3 Capture operation....................................................................................................................... 126

6.4.4 16-bit timer counter 90 readout .................................................................................................. 127

6.4.5 Buzzer output operation ............................................................................................................. 128

6.5 Notes on Using 16-Bit Timer ...................................................................................................129

CHAPTER 7 8-BIT TIMER ....................................................................................................................131

7.1 8-Bit Timer Functions ..............................................................................................................131

7.2 8-Bit Timer Configuration........................................................................................................132

7.3 Registers Controlling 8-Bit Timer...........................................................................................138

7.4 8-Bit Timer Operation...............................................................................................................143

7.4.1 Operation as 8-bit timer counter................................................................................................. 143

7.4.2 Operation as 16-bit timer counter............................................................................................... 153

7.4.3 Operation as carrier generator ................................................................................................... 160

7.4.4 PWM free-running mode operation (timer 50)............................................................................ 164

7.4.5 Operation as PWM output (timer 60).......................................................................................... 168

7.5 Notes on Using 8-Bit Timer .....................................................................................................170

CHAPTER 8 WATCH TIMER................................................................................................................171

8.1 Watch Timer Functions............................................................................................................171

8.2 Watch Timer Configuration .....................................................................................................172

8.3 Watch Timer Control Register.................................................................................................173

8.4 Watch Timer Operation............................................................................................................174

8.4.1 Operation as watch timer............................................................................................................ 174

8.4.2 Operation as interval timer ......................................................................................................... 174

CHAPTER 9 WATCHDOG TIMER........................................................................................................177

9.1 Watchdog Timer Functions.....................................................................................................177

9.2 Watchdog Timer Configuration...............................................................................................178

9.3 Watchdog Timer Control Registers........................................................................................179

User’s Manual U15075EJ1V0UM00 13

9.4 Watchdog Timer Operation .................................................................................................... 181

9.4.1 Operation as watchdog timer......................................................................................................181

9.4.2 Operation as interval timer..........................................................................................................182

CHAPTER 10 8-BIT A/D CONVERTER (

µµµµ

PD789426 AND 789446 SUBSERIES)........................ 183

10.1 8-Bit A/D Converter Functions............................................................................................... 183

10.2 8-Bit A/D Converter Configuration......................................................................................... 183

10.3 8-Bit A/D Converter Control Registers.................................................................................. 186

10.4 8-Bit A/D Converter Operation ............................................................................................... 188

10.4.1 Basic operation of 8-bit A/D converter........................................................................................188

10.4.2 Input voltage and conversion result............................................................................................189

10.4.3 Operation mode of 8-bit A/D converter.......................................................................................191

10.5 Cautions Related to 8-Bit A/D Converter............................................................................... 192

CHAPTER 11 10-BIT A/D CONVERTER (

µµµµ

PD789436 AND 789456 SUBSERIES)...................... 197

11.1 10-Bit A/D Converter Functions............................................................................................. 197

11.2 10-Bit A/D Converter Configuration....................................................................................... 197

11.3 10-Bit A/D Converter Control Registers................................................................................ 200

11.4 10-Bit A/D Converter Operation ............................................................................................. 202

11.4.1 Basic operation of 10-bit A/D converter......................................................................................202

11.4.2 Input voltage and conversion result............................................................................................203

11.4.3 Operation mode of 10-bit A/D converter.....................................................................................205

11.5 Cautions Related to 10-Bit A/D Converter............................................................................. 206

CHAPTER 12 SERIAL INTERFACE 20.............................................................................................. 211

12.1 Serial Interface 20 Functions.................................................................................................. 211

12.2 Serial Interface 20 Configuration ........................................................................................... 211

12.3 Serial Interface 20 Control Registers..................................................................................... 215

12.4 Serial Interface 20 Operation.................................................................................................. 222

12.4.1 Operation stop mode.................................................................................................................. 222

12.4.2 Asynchronous serial interface (UART) mode .............................................................................224

12.4.3 3-wire serial I/O mode.................................................................................................................237

CHAPTER 13 LCD CONTROLLER/DRIVER....................................................................................... 247

13.1 LCD Controller/Driver Functions ........................................................................................... 247

13.2 LCD Controller/Driver Configuration..................................................................................... 247

13.3 Registers Controlling LCD Controller/Driver........................................................................ 249

13.4 Setting LCD Controller/Driver ................................................................................................ 253

13.5 LCD Display Data Memory...................................................................................................... 253

13.6 Common and Segment Signals.............................................................................................. 254

13.7 Display Modes.......................................................................................................................... 256

13.7.1 Three-time slot display example.................................................................................................256

13.7.2 Four-time slot display example...................................................................................................259

14 User’s Manual U15075EJ1V0UM00

CHAPTER 14 INTERRUPT FUNCTIONS.............................................................................................263

14.1 Interrupt Function Types.........................................................................................................263

14.2 Interrupt Sources and Configuration .....................................................................................263

14.3 Registers Controlling Interrupt Function...............................................................................266

14.4 Interrupt Servicing Operation .................................................................................................272

14.4.1 Non-maskable interrupt request acknowledgment operation..................................................... 272

14.4.2 Maskable interrupt request acknowledgment operation............................................................. 274

14.4.3 Multiple interrupt servicing..........................................................................................................275

14.4.4 Putting interrupt requests on hold...............................................................................................277

CHAPTER 15 STANDBY FUNCTION ..................................................................................................279

15.1 Standby Function and Configuration.....................................................................................279

15.1.1 Standby function......................................................................................................................... 279

15.1.2 Register controlling standby function.......................................................................................... 280

15.2 Standby Function Operation...................................................................................................281

15.2.1 HALT mode ................................................................................................................................ 281

15.2.2 STOP mode................................................................................................................................ 284

CHAPTER 16 RESET FUNCTION........................................................................................................287

CHAPTER 17

µµµµ

PD78F9436, 78F9456...................................................................................................291

17.1 Flash Memory Programming...................................................................................................292

17.1.1 Selecting communication mode..................................................................................................292

17.1.2 Function of flash memory programming.....................................................................................293

17.1.3 Flashpro III connection example.................................................................................................293

17.1.4 Example of settings for Flashpro III (PG-FP3)............................................................................295

CHAPTER 18 MASK OPTIONS............................................................................................................297

CHAPTER 19 INSTRUCTION SET.......................................................................................................299

19.1 Operation...................................................................................................................................299

19.1.1 Operand identifiers and description methods............................................................................. 299

19.1.2 Description of “Operation” column.............................................................................................. 300

19.1.3 Description of “Flag” column....................................................................................................... 300

19.2 Operation List...........................................................................................................................301

19.3 Instructions Listed by Addressing Type................................................................................306

APPENDIX A DEVELOPMENT TOOLS...............................................................................................309

A.1 Language Processing Software..............................................................................................311

A.2 Flash Memory Writing Tools ...................................................................................................312

A.3 Debugging Tools......................................................................................................................313

A.3.1 Hardware.................................................................................................................................... 313

A.3.2 Software ..................................................................................................................................... 314

User’s Manual U15075EJ1V0UM00 15

APPENDIX B EMBEDDED SOFTWARE............................................................................................. 315

APPENDIX C REGISTER INDEX......................................................................................................... 317

C.1 Register Index (Alphabetic Order of Register Name) .......................................................... 317

C.2 Register Index (Alphabetic Order of Register Symbol) ....................................................... 319

16 User’s Manual U15075EJ1V0UM00

LIST OF FIGURES (1/5)

Figure No. Title Page

2-1 Pin Input/Output Circuits...............................................................................................................................45

3-1 Memory Map (µPD789425, 789435)............................................................................................................. 47

3-2 Memory Map (µPD789426, 789436)............................................................................................................. 48

3-3 Memory Map (µPD78F9436).........................................................................................................................49

3-4 Memory Map (µPD789445, 789455)............................................................................................................. 50

3-5 Memory Map (µPD789446, 789456)............................................................................................................. 51

3-6 Memory Map (µPD78F9456).........................................................................................................................52

3-7 Data Memory Addressing (µPD789425, 789435) .........................................................................................55

3-8 Data Memory Addressing (µPD789426, 789436) .........................................................................................56

3-9 Data Memory Addressing (µPD78F9436).....................................................................................................57

3-10 Data Memory Addressing (µPD789445, 789455) .........................................................................................58

3-11 Data Memory Addressing (µPD789446, 789456) .........................................................................................59

3-12 Data Memory Addressing (µPD78F9456).....................................................................................................60

3-13 Program Counter Configuration ....................................................................................................................61

3-14 Program Status Word Configuration ............................................................................................................. 61

3-15 Stack Pointer Configuration ..........................................................................................................................63

3-16 Data to Be Saved to Stack Memory.............................................................................................................. 63

3-17 Data to Be Restored from Stack Memory...................................................................................................... 63

3-18 General-Purpose Register Configuration...................................................................................................... 64

4-1 Port Types (µPD789426, 789436 Subseries) ...............................................................................................77

4-2 Port Types (µPD789446, 789456 Subseries) ...............................................................................................78

4-3 Block Diagram of P00 to P03........................................................................................................................81

4-4 Block Diagram of P10 and P11.....................................................................................................................82

4-5 Block Diagram of P20....................................................................................................................................83

4-6 Block Diagram of P21 and P26.....................................................................................................................84

4-7 Block Diagram of P22....................................................................................................................................85

4-8 Block Diagram of P23....................................................................................................................................86

4-9 Block Diagram of P24....................................................................................................................................87

4-10 Block Diagram of P25....................................................................................................................................88

4-11 Block Diagram of P30....................................................................................................................................89

4-12 Block Diagram of P31 to P33........................................................................................................................ 90

4-13 Block Diagram of P50 to P53........................................................................................................................ 91

4-14 Block Diagram of Port 6 ................................................................................................................................92

4-15 Block Diagram of P70 to P72........................................................................................................................ 93

4-16 Block Diagram of P80, P81........................................................................................................................... 94

4-17 Block Diagram of P90 to P97........................................................................................................................ 95

4-18 Format of Port Mode Register.......................................................................................................................97

4-19 Format of Pull-Up Resistor Option Register 0...............................................................................................98

4-20 Format of Pull-Up Resistor Option Register B2............................................................................................. 99

4-21 Format of Pull-Up Resistor Option Register B3............................................................................................. 99

User’s Manual U15075EJ1V0UM00 17

LIST OF FIGURES (2/5)

Figure No. Title Page

4-22 Format of Pull-Up Resistor Option Register B7...........................................................................................100

4-23 Format of Pull-Up Resistor Option Register B8...........................................................................................100

4-24 Format of Pull-Up Resistor Option Register B9...........................................................................................101

5-1 Block Diagram of Clock Generator..............................................................................................................104

5-2 Format of Processor Clock Control Register...............................................................................................105

5-3 Format of Suboscillation Mode Register .....................................................................................................106

5-4 Format of Subclock Control Register ..........................................................................................................107

5-5 External Circuit of Main System Clock Oscillator........................................................................................108

5-6 External Circuit of Subsystem Clock Oscillator...........................................................................................109

5-7 Examples of Incorrect Resonator Connection.............................................................................................110

5-8 Switching Between System Clock and CPU Clock......................................................................................114

6-1 Block Diagram of 16-Bit Timer.....................................................................................................................117

6-2 Format of 16-Bit Timer Mode Control Register 90.......................................................................................120

6-3 Format of Buzzer Output Control Register 90.............................................................................................121

6-4 Format of Port Mode Register 2..................................................................................................................122

6-5 Settings of 16-Bit Timer Mode Control Register 90 for Timer Interrupt Operation ......................................123

6-6 Timing of Timer Interrupt Operation............................................................................................................124

6-7 Settings of 16-Bit Timer Mode Control Register 90 for Timer Output Operation.........................................125

6-8 Timer Output Timing....................................................................................................................................125

6-9 Settings of 16-Bit Timer Mode Control Register 90 for Capture Operation.................................................126

6-10 Capture Operation Timing (Both Edges of CPT90 Pin Are Specified) ........................................................126

6-11 16-Bit Timer Counter 90 Readout Timing....................................................................................................127

6-12 Settings of Buzzer Output Control Register 90 for Buzzer Output Operation..............................................128

7-1 Block Diagram of Timer 50..........................................................................................................................133

7-2 Block Diagram of Timer 60..........................................................................................................................134

7-3 Block Diagram of Output Controller (Timer 60)...........................................................................................135

7-4 Format of 8-Bit Timer Mode Control Register 50.........................................................................................139

7-5 Format of 8-Bit Timer Mode Control Register 60.........................................................................................141

7-6 Format of Carrier Generator Output Control Register 60............................................................................142

7-7 Format of Port Mode Register 3..................................................................................................................142

7-8 Timing of Interval Timer Operation with 8-Bit Resolution (Basic Operation)...............................................145

7-9 Timing of Interval Timer Operation with 8-Bit Resolution (When CRn0 Is Set to 00H) ...............................145

7-10 Timing of Interval Timer Operation with 8-Bit Resolution (When CRn0 Is Set to FFH)...............................146

7-11 Timing of Interval Timer Operation with 8-Bit Resolution (When CRn0 Changes from N to M (N < M)) .....146

7-12 Timing of Interval Timer Operation with 8-Bit Resolution (When CRn0 Changes from N to M (N > M)) .....147

7-13 Timing of Interval Timer Operation with 8-Bit Resolution (When Timer 60 Match Signal Is

Selected for Timer 50 Count Clock)............................................................................................................148

7-14 Timing of Operation of External Event Counter with 8-Bit Resolution........................................................150

7-15 Timing of Square-Wave Output with 8-Bit Resolution.................................................................................152

18 User’s Manual U15075EJ1V0UM00

LIST OF FIGURES (3/5)

Figure No. Title Page

7-16 Timing of Interval Timer Operation with 16-Bit Resolution..........................................................................155

7-17 Timing of External Event Counter Operation with 16-Bit Resolution...........................................................157

7-18 Timing of Square-Wave Output with 16-Bit Resolution...............................................................................159

7-19 Timing of Carrier Generator Operation (When CR60 = N, CRH60 = M (M > N)) ........................................161

7-20 Timing of Carrier Generator Operation (When CR60 = N, CRH60 = M (M < N),

Phases of Carrier Clock and NRZ60 Are Asynchronous) ...........................................................................162

7-21 Timing of Carrier Generator Operation (When CR60 = CRH60 = N).......................................................... 163

7-22 Operation Timing in PWM Free-Running Mode (When Rising Edge Is Selected) ...................................... 165

7-23 Operation Timing When Overwriting CR50 (When Rising Edge Is Selected).............................................165

7-24 Operation Timing in PWM Free-Running Mode (When Both Edges Are Selected) .................................... 166

7-25 Operation Timing in PWM Free-Running Mode (When Both Edges Are Selected)

(When CR50 Is Overwritten).......................................................................................................................167

7-26 PWM Pulse Generator Mode Timing (Basic Operation)..............................................................................169

7-27 PWM Output Mode Timing (When CR60 and CRH60 Are Overwritten)......................................................169

7-28 Start Timing of 8-Bit Timer Counter............................................................................................................. 170

7-29 Timing of Operation as External Event Counter (8-Bit Resolution)............................................................. 170

8-1 Block Diagram of Watch Timer....................................................................................................................171

8-2 Format of Watch Timer Mode Control Register........................................................................................... 173

8-3 Watch Timer/Interval Timer Operation Timing ............................................................................................175

9-1 Block Diagram of Watchdog Timer..............................................................................................................178

9-2 Format of Watchdog Timer Clock Select Register...................................................................................... 179

9-3 Format of Watchdog Timer Mode Register................................................................................................. 180

10-1 Block Diagram of 8-Bit A/D Converter.........................................................................................................184

10-2 Format of A/D Converter Mode Register 0.................................................................................................. 186

10-3 Format of Analog Input Channel Specification Register 0...........................................................................187

10-4 Basic Operation of 8-Bit A/D Converter....................................................................................................... 189

10-5 Relationship Between Analog Input Voltage and A/D Conversion Result...................................................190

10-6 Software-Started A/D Conversion............................................................................................................... 191

10-7 How to Reduce Current Consumption in Standby Mode.............................................................................192

10-8 Conversion Result Read Timing (If Conversion Result Is Undefined).........................................................193

10-9 Conversion Result Read Timing (If Conversion Result Is Normal) .............................................................193

10-10 Analog Input Pin Treatment......................................................................................................................... 194

10-11 A/D Conversion End Interrupt Request Generation Timing ........................................................................195

10-12 AVDD Pin Handling....................................................................................................................................... 195

11-1 Block Diagram of 10-Bit A/D Converter.......................................................................................................198

11-2 Format of A/D Converter Mode Register 0.................................................................................................. 200

11-3 Format of Analog Input Channel Specification Register 0...........................................................................201

11-4 Basic Operation of 10-Bit A/D Converter..................................................................................................... 203

User’s Manual U15075EJ1V0UM00 19

LIST OF FIGURES (4/5)

Figure No. Title Page

11-5 Relationship Between Analog Input Voltage and A/D Conversion Result...................................................204

11-6 Software-Started A/D Conversion ...............................................................................................................205

11-7 How to Reduce Current Consumption in Standby Mode.............................................................................206

11-8 Conversion Result Read Timing (If Conversion Result Is Undefined).........................................................207

11-9 Conversion Result Read Timing (If Conversion Result Is Normal)..............................................................207

11-10 Analog Input Pin Treatment.........................................................................................................................208

11-11 A/D Conversion End Interrupt Request Generation Timing.........................................................................209

11-12 AVDD Pin Handling.......................................................................................................................................209

12-1 Block Diagram of Serial Interface 20...........................................................................................................212

12-2 Block Diagram of Baud Rate Generator 20.................................................................................................213

12-3 Format of Serial Operation Mode Register 20.............................................................................................215

12-4 Format of Asynchronous Serial Interface Mode Register 20.......................................................................216

12-5 Format of Asynchronous Serial Interface Status Register 20 .....................................................................218

12-6 Format of Baud Rate Generator Control Register 20..................................................................................219

12-7 Format of Asynchronous Serial Interface Transmit/Receive Data...............................................................231

12-8 Asynchronous Serial Interface Transmission Completion Interrupt Timing.................................................233

12-9 Asynchronous Serial Interface Reception Completion Interrupt Timing......................................................234

12-10 Receive Error Timing...................................................................................................................................235

12-11 3-Wire Serial I/O Mode Timing....................................................................................................................240

13-1 Block Diagram of LCD Controller/Driver......................................................................................................248

13-2 Format of LCD Display Mode Register 0.....................................................................................................250

13-3 Format of LCD Clock Control Register 0.....................................................................................................251

13-4 Format of LCD Voltage Amplification Control Register 0 ............................................................................252

13-5 Relationship Between LCD Display Data Memory Contents and Segment/Common Outputs

(µPD789446, 789456 Subseries)................................................................................................................253

13-6 Common Signal Waveforms........................................................................................................................255

13-7 Voltages and Phases of Common and Segment Signals............................................................................255

13-8 Three-Time Slot LCD Display Pattern and Electrode Connections.............................................................256

13-9 Example of Connecting Three-Time Slot LCD Panel..................................................................................257

13-10 Three-Time Slot LCD Drive Waveform Examples.......................................................................................258

13-11 Four-Time Slot LCD Display Pattern and Electrode Connections...............................................................259

13-12 Example of Connecting Four-Time Slot LCD Panel....................................................................................260

13-13 Four-Time Slot LCD Drive Waveform Examples.........................................................................................261

14-1 Basic Configuration of Interrupt Function....................................................................................................265

14-2 Format of Interrupt Request Flag Registers................................................................................................267

14-3 Format of Interrupt Mask Flag Registers.................................................................................... .................268

14-4 Format of External Interrupt Mode Register 0.............................................................................................269

14-5 Format of External Interrupt Mode Register 1.............................................................................................270

14-6 Configuration of Program Status Word........................................................................................................270

20 User’s Manual U15075EJ1V0UM00

LIST OF FIGURES (5/5)

Figure No. Title Page

14-7 Format of Key Return Mode Register 00.....................................................................................................271

14-8 Block Diagram of Falling Edge Detector .....................................................................................................271

14-9 Flow from Generation of Non-Maskable Interrupt Request to Acknowledgment.........................................273

14-10 Timing of Non-Maskable Interrupt Request Acknowledgment....................................................................273

14-11 Non-Maskable Interrupt Request Acknowledgment....................................................................................273

14-12 Interrupt Request Acknowledgment Program Algorithm .............................................................................274

14-13 Interrupt Request Acknowledgment Timing (Example: MOV A, r) ..............................................................275

14-14 Interrupt Request Acknowledgment Timing (When Interrupt Request Flag Is

Generated in Final Clock Under Execution)................................................................................................275

14-15 Example of Multiple Interrupts .....................................................................................................................276

15-1 Format of Oscillation Stabilization Time Select Register.............................................................................280

15-2 Releasing HALT Mode by Interrupt.............................................................................................................282

15-3 Releasing HALT Mode by RESET Input .....................................................................................................283

15-4 Releasing STOP Mode by Interrupt ............................................................................................................285

15-5 Releasing STOP Mode by RESET Input.....................................................................................................286

16-1 Block Diagram of Reset Function................................................................................................................287

16-2 Reset Timing by RESET Input ....................................................................................................................288

16-3 Reset Timing by Overflow in Watchdog Timer............................................................................................288

16-4 Reset Timing by RESET Input in STOP Mode............................................................................................288

17-1 Communication Mode Selection Format.....................................................................................................292

17-2 Flashpro III Connection Example in 3-Wire Serial I/O Mode.......................................................................293

17-3 Flashpro III Connection Example in UART Mode........................................................................................294

A-1 Development Tools.....................................................................................................................................310

User’s Manual U15075EJ1V0UM00 21

LIST OF TABLES (1/2)

Table No. Title Page

2-1 Types of Pin Input/Output Circuits.................................................................................................................44

3-1 Internal ROM Capacity..................................................................................................................................53

3-2 Vector Table..................................................................................................................................................53

3-3 LCD Display RAM Capacity...........................................................................................................................54

3-4 Special Function Register List.......................................................................................................................66

4-1 Port Functions...............................................................................................................................................79

4-2 Configuration of Port .....................................................................................................................................80

4-3 Port Mode Register and Output Latch Settings When Using Alternate Functions ........................................98

5-1 Configuration of Clock Generator................................................................................................................103

5-2 Maximum Time Required for Switching CPU Clock....................................................................................113

6-1 16-Bit Timer Configuration ..........................................................................................................................116

6-2 Interval Time of 16-Bit Timer.......................................................................................................................123

6-3 Settings of Capture Edge............................................................................................................................126

6-4 Buzzer Frequency of 16-Bit Timer...............................................................................................................128

7-1 Operation Modes.........................................................................................................................................131

7-2 8-Bit Timer Configuration ............................................................................................................................132

7-3 Interval Time of Timer 50 ............................................................................................................................144

7-4 Interval Time of Timer 60 ............................................................................................................................144

7-5 Square-Wave Output Range of Timer 50 (During fX = 5.0 MHz Operation)................................................151

7-6 Square-Wave Output Range of Timer 60 (During fX = 5.0 MHz Operation)................................................152

7-7 Interval Time with 16-Bit Resolution (During fX = 5.0 MHz Operation)........................................................154

7-8 Square-Wave Output Range with 16-Bit Resolution (During fX = 5.0 MHz Operation)................................158

8-1 Interval Generated Using the Interval Timer ...............................................................................................172

8-2 Watch Timer Configuration..........................................................................................................................172

8-3 Interval Time of Interval Timer.....................................................................................................................174

9-1 Watchdog Timer Runaway Detector Time...................................................................................................177

9-2 Interval Time................................................................................................................................................177

9-3 Configuration of Watchdog Timer................................................................................................................178

9-4 Watchdog Timer Runaway Detection Time.................................................................................................181

9-5 Interval Time of Interval Timer.....................................................................................................................182

10-1 Configuration of 8-Bit A/D Converter...........................................................................................................183

11-1 Configuration of 10-Bit A/D Converter......................................................................................................... 197

22 User’s Manual U15075EJ1V0UM00

LIST OF TABLES (2/2)

Table No. Title Page

12-1 Configuration of Serial Interface 20.............................................................................................................211

12-2 Serial Interface 20 Operating Mode Settings .............................................................................................. 217

12-3 Example of Relationships Between System Clock and Baud Rate.............................................................220

12-4 Relationship Between ASCK20 Pin Input Frequency and Baud Rate (When BRGC20 Is Set to 80H).......221

12-5 Example of Relationships Between System Clock and Baud Rate.............................................................229

12-6 Relationship Between ASCK20 Pin Input Frequency and Baud Rate (When BRGC20 Is Set to 80H).......230

12-7 Receive Error Causes................................................................................................................................. 235

13-1 Number of Segment Outputs and Maximum Number of Pixels................................................................... 247

13-2 Configuration of LCD Controller/Driver........................................................................................................ 247

13-3 Frame Frequencies (Hz) .............................................................................................................................251

13-4 COM Signals...............................................................................................................................................254

13-5 LCD Drive Voltage.......................................................................................................................................254

13-6 Select and Deselect Voltages (COM0 to COM2)........................................................................................256

13-7 Select and Deselect Voltages (COM0 to COM3)........................................................................................259

14-1 Interrupt Source List.................................................................................................................................... 264

14-2 Flags Corresponding to Interrupt Request Signal Name.............................................................................266

14-3 Time from Generation of Maskable Interrupt Request to Servicing ............................................................ 274

15-1 HALT Mode Operating Status..................................................................................................................... 281

15-2 Operation After Releasing HALT Mode.......................................................................................................283

15-3 STOP Mode Operating Status..................................................................................................................... 284

15-4 Operation After Releasing STOP Mode...................................................................................................... 286

16-1 Hardware Status After Reset....................................................................................................................... 289

17-1 Differences Between µPD78F9436, 78F9456 and Mask ROM Versions.................................................... 291

17-2 Communication Mode .................................................................................................................................292

17-3 Functions of Flash Memory Programming ..................................................................................................293

17-4 Example of Settings for PG-FP3.................................................................................................................295

18-1 Selection of Mask Option for Pins...............................................................................................................297

19-1 Operand Identifiers and Description Methods.............................................................................................299

User’s Manual U15075EJ1V0UM00 23

[MEMO]

24 User’s Manual U15075EJ1V0UM00

1.1 Features

• ROM and RAM capacities

CHAPTER 1 GENERAL

Item Data Memory

Part Number

PD789425, 789435 8 KB

PD789426, 789436

PD78F9436 Flash memory 16 KB

PD789445, 789455 12 KB

PD789446, 789456

PD78F9456 Flash memory

Program Memory

Mask ROM

(ROM)

16 KB

Internal High-Speed

RAM

512 bytes

LCD Display RAM

5 bytes

15 bytes

• Minimum instruction execution time can be changed from high-speed (0.4 µs: @ 5.0 MHz operation with main system clock) to ultra-low-speed (122 µs: @ 32.768 kHz operation with subsystem clock)

• I/O ports: 40 (µPD789426, 789436 Subseries)

30 (µPD789446, 789456 Subseries)

• Timer: 5 channels

16-bit timer: 1 channel

•

8-bit timer: 2 channels

•

Watch timer: 1 channel

•

Watchdog timer: 1 channel

•

• A/D converter: 8-bit resolution: 6 channels (µPD789426, 789446 Subseries) 10-bit resolution: 6 channels (µPD789436, 789456 Subseries)

• Serial interface: 1 channel

• LCD controller/driver Segment signals: 5, common signals: 4 (µPD789426, 789436 Subseries) Segment signals: 15, common signals: 4 (µPD789446, 789456 Subseries)

• Vectored interrupt sources: 15

• Power supply voltage: VDD = 1.8 to 5.5 V

• Operating ambient temperature: TA = –40 to +85°C

1.2 Applications

Portable audio, cameras, healthcare equipment, etc.

User’s Manual U15075EJ1V0UM00 25

CHAPTER 1 GENERAL

1.3 Ordering Information

Part Number Package Internal ROM

PD789425GK-

PD789426GK-

PD789435GK-

PD789436GK-

PD789445GK-

PD789446GK-

PD789455GK-

PD789456GK-

PD78F9436GK-9ET 64-pin plastic TQFP (12 × 12 mm) Flash memory

PD78F9456GK-9ET 64-pin plastic TQFP (12 × 12 mm) Flash memory

Remark

×××