NEC PD78214, PD78212, PD78213, PD78P214 User Manual
USER'S MANUAL
µ
PD78214 SUB-SERIES
8-BIT SINGLE-CHIP MICROCOMPUTER
HARDWARE
µ
PD78212
µ
PD78213
µ
PD78214
µ
PD78P214
µ
PD78212 (A)
µ
PD78213 (A)
µ
PD78214 (A)
µ
PD78P214 (A)
NEC Corporation 1989
Document No. IEU-1236H
(O. D. No. IEM-5119H)
Date Published September 1994 P
Printed in Japan
GENERAL
1
PIN FUNCTIONS
CPU FUNCTION
CLOCK GENERATOR
PORT FUNCTIONS
REAL-TIME OUTPUT FUNCTION
TIMER/COUNTER UNITS
A/D CONVERTER
ASYNCHRONOUS SERIAL INTERFACE
CLOCK SYNCHRONOUS SERIAL INTERFACE
EDGE DETECTION FUNCTION
INTERRUPT FUNCTIONS
LOCAL BUS INTERFACE FUNCTION
STANDBY FUNCTION
2
3
4
5
6
7
8
9
10
11
12
13
14
RESET FUNCTION
APPLICATION EXAMPLES
PROGRAMMING FOR THE
INSTRUCTION OPERATIONS
78K/II SERIES PRODUCT LIST
DEVELOPMENT TOOLS
SOFTWARE FOR EMBEDDED APPLICATIONS
REGISTER INDEX
µ
PD78214
INDEX
15
16
17
18
A
B
C
D
E
Cautions on CMOS Devices
1 Countermeasures against static electricity for all MOSs
Caution When handling MOS devices, take care so that they are not electrostatically charged.
Strong static electricity may cause dielectric breakdown in gates. When transporting or
storing MOS devices, use conductive trays, magazine cases, shock absorbers, or metal
cases that NEC uses for packaging and shipping. Be sure to ground MOS devices during
assembling. Do not allow MOS devices to stand on plastic plates or do not touch pins.
Also handle boards on which MOS devices are mounted in the same way.
2 CMOS-specific handling of unused input pins
Caution Hold CMOS devices at a fixed input level.
Unlike bipolar or NMOS devices, if a CMOS device is operated with no input, an
intermediate-level input may be caused by noise. This allows current to flow in the CMOS
device, resulting in a malfunction. Use a pull-up or pull-down resistor to hold a fixed input
level. Since unused pins may function as output pins at unexpected times, each unused
pin should be separately connected to the V
If handling of unused pins is documented, follow the instructions in the document.
3 Statuses of all MOS devices at initialization
Caution The initial status of a MOS device is unpredictable when power is turned on.
Since characteristics of a MOS device are determined by the amount of ions implanted
in molecules, the initial status cannot be determined in the manufacture process. NEC
has no responsibility for the output statuses of pins, input and output settings, and the
contents of registers at power on. However, NEC assures operation after reset and items
for mode setting if they are defined.
When you turn on a device having a reset function, be sure to reset the device first.
DD or GND pin through a resistor.
EWS-4800 Series, EWS-UX/V, and QTOP are trademarks of NEC Corporation.
MS-DOS is a trademark of Microsoft Corporation.
IBM DOS, PC/AT, and PC DOS are trademarks of IBM Corporation.
SPARCstation is a trademark of SPARC International, Inc.
Sun OS is a trademark of Sun Microsystems Inc.
HP9000 Series 300 and HP-UX are trademarks of Hewlett-Packard.
The information in this document is subject to change without notice.
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from use of a device described herein or any other liability arising
from use of such device. No license, either express, implied or otherwise, is granted under any patents,
copyrights or other intellectual property rights of NEC Corporation or others.
The devices listed in this document are not suitable for use in aerospace equipment, submarine cables, nuclear
reactor control systems and life support systems. If customers intend to use NEC devices for above applications
or they intend to use "Standard" quality grade NEC devices for applications not intended by NEC, please contact
our sales people in advance.
Application examples recommended by NEC Corporation
Standard: Computer, Office equipment, Communication equipment, Test and Measurement equipment,
Machine tools, Industrial robots, Audio and Visual equipment, Other consumer products, etc.
Special: Automotive and Transportation equipment, Traffic control systems, Antidisaster systems, Anticrime
systems, etc.
M7 92.6
Main Revisions in This Edition
Page Description
P.55 V
P.329
P.383 "Caution" has been added in (b) of Section
P.429 Appendix B has been modified as follows:
P.441 Appendix C has been added.
Major changes in this revision are indicated by stars (★)
in the margins.
and "Caution" have been added in (a) of Fig.
SS
4-2.
"Caution" has been added in (2) of Section 12.4.6.
14.4.2.
• "IBM PC series" has been changed to "IBM
PC/AT."
• Upgraded versions of MS-DOS are now
supported by some development tools
designed for the PC-9800 series.
• 3.5" 2HC has been added to as a PC DOS
distribution media.
• MS DOS and IBM DOS have been added
as supported operating systems for the
IBM PC/AT.
• The description of real-time OS has been
deleted.
PREFACE
Users:
This manual is aimed at engineers who need to be familiar with the capabilities of the µPD78214 sub-series for
application program development purposes.
Purpose:
The purpose of this manual is to help users understand the hardware capabilities of the µPD78214 sub-series.
Organization:
Two manuals are available for the µPD78214 sub-series: The hardware manual (this manual) and instruction
manual (common to all 78K/II series products). The contents of the manuals are:
Hardware Instruction
Pin functions CPU functions
Internal block functions Addressing
Interrupt functions Instruction set
Other built-in functions
Important information related to using the products described in this manual is provided in the form of
“Caution” notes, appearing in appropriate places in each chapter. Each “Caution” is repeated at the end
of the chapter. Be careful to observe these notes when using the products.
Guidance:
Readers of this manual are assumed to have a general knowledge of electronics, logical circuits, and microcomputers.
When using this manual with the µPD78212, µPD78213, µPD78P214, µPD78212(A), µPD78213(A), µPD78214(A), or
µ
PD78P214(A):
This manual describes the functions of the µPD78212, µPD78213, µPD78214, µPD78P214, µPD78212(A), µPD78213(A),
µ
PD78214(A), and µPD78P214(A). The relationships between these products are shown in the figure on the next
page. Where there is no functional difference between the products, only the µPD78214 is described, that
description also being applicable to the µPD78212, µPD78213, µPD78P214, µPD78212(A), µPD78213(A), µPD78214(A),
and µPD78P214(A).
The examples given in this manual are prepared for “Standard” quality products for general electronics
devices. If customers intend to use the examples in this manual in fields where the “Special” quality is
required, note the quality grade of the parts and circuits actually used.
PD78P214
µ
PD78P214(A)
µ
PROM 16K
RAM 512
PD78214
µ
PD78214(A)
µ
PD78212
µ
PD78212(A)
µ
ROM 16K
RAM 512
ROM 8K
RAM 384
PD78213
µ
PD78213(A)
µ
ROM-less
RAM 512
To check the details of a register when you know the name of the register:
See Appendix D.
To check the differences between the µPD78214 sub-series and other models of the 78K/II series:
First see Appendix A to determine the differences between the models then see Appendix E for details.
To check the details of a function when you know the name of the function:
See Appendix E.
If the microcomputer does not operate correctly during debugging:
See the cautions at the end of the chapter related to the erroneous function.
To become familiar with the general functions of the µPD78214 sub-series:
Read the entire manual in the order of the table of contents.
To determine the instructions supported by the µPD78214 sub-series in detail:
Refer to 78K/II Series User’s Manual, Instruction (IEU-1311).
To determine the electrical characteristics of the µPD78214 sub-series:
Refer to the separate data sheet.
Application examples of the µPD78214 sub-series:
Refer to the separate application note.
Notation:
Data weight: High-order digits on the left side
Low-order digits on the right side
Active low: ××× (Pins and signal names are overscored.)
Note: Explanation of a noted part of text
Caution: Information demanding the user's special attention
Remarks: Supplementary information
Numeric value: Binary : ××××B or ××××
Decimal : ××××
Hexadecimal : ××××H
Register representation
7
6
5
4
3
2
1
0
EDC
Register name
B
1
0
×
A
1
0
The encircled bit number indicates that the bit name
×
is used as reserved word by the NEC assembler and
defined by the header file, sfrbit.h, by C compiler.
Write operation Read operation
Either 0 or 1 can be
written to this bit without
affecting the register
operation.
Write 0 to this bit.
Write 1 to this bit.
Write a value according to
the necessary function.
Never use the code combinations indicated "Not to be set" in the register descriptions.
Characters likely to be confused: 0 (zero) and O (uppercase "O")
1 (one), l (lowercase "L"), and I (uppercase "I")
Related documents:
The following reference documents are also available.
0 or 1 is read from these
bits.
A value is read according
to the operation.
• Documents related to the µPD78214 sub-series
Product
Document
Data Sheet
User's Manual Hardware
Instruction
Application Note Basic
Application
Floating-Point Arithme-
tic Operation Programs
• Serial Bus Interface (SBI) User’s Manual (IEM-1303)
µ
PD78212
µ
PD78213
µ
PD78214
IC-2526 IC-2831 IC-3095
µ
PD78212(A)
µ
PD78213(A)
µ
PD78214(A)
This manual
IEU-1311
IEA-1220
IEA-1282
IEA-1273
µ
PD78P214(A)
• Documents related to development tools
Document name
IE-78240-R-A In-Circuit Emulator User's Manual
IE-78240-R In-Circuit Emulator User's Manual Hardware
IE-78210-R In-Circuit Emulator Hardware Operator's Manual
IE-78210-R In-Circuit Emulator Software Operator's Manual
IE-78210-R In-Circuit Emulator System
Software Operator's Manual
RA78K Series Assembler Package User's Manual Language
78K Series Structured Assembler Preprocessor User's Manual
CC78K Series C Compiler User's Manual
SD78K/II Screen Debugger User's Manual for Operation under
MS-DOS Tutorial
78K/II Series Development Tools Selection Guide
For Operation on the PC-9800 Series (MS-DOS)
For Operation on the IBM PC Series (PC DOS)
• Documents related to software to be incorporated into the product
Software
Operation
Language
Operation
Document No.
EEU-1395
EEU-1322
EEU-1331
EEP-1027
EEM-1024
EEM-1260
EEM-1027
EEU-1283
EEU-1273
EEU-1254
EEU-1289
EEU-1280
EEU-1447
EEU-1413
EF-1114
Document name
Fuzzy Inference Development Support System Pamphlet
78K/II Series Fuzzy Inference Development Support System User's
Manual
78K/0, 78K/II and 87AD Series Fuzzy Inference Development Support
System User's Manual
User's Manual for Tool for Creating Fuzzy Knowledge Data
Fuzzy Inference
Module
Translator
Document No.
EF-1113
EEU-1448
EEU-1444
EEU-1438
• Other documents
Document name
Package Manual
SMD Surface Mount Technology Manual
Quality Grades on NEC Semiconductor Devices
NEC Semiconductor Device Reliability/Quality Control System
Guide to Quality Assurance for Semiconductor Devices
Caution The above documents may be revised without notice. Use the latest versions when you designing an application system.
Document No.
IEI-1213
IEI-1207
IEI-1209
IEI-1203
MEI-1202
Contents
CONTENTS
CHAPTER 1 GENERAL ........................................................................................................................................1
1.1 FEATURES ............................................................................................................................3
1.2 ORDERING INFORMATION AND QUALITY GRADE ........................................................4
1.2.1 Ordering Information ................................................................................................. 4
1.2.2 Quality Grade ............................................................................................................. 5
1.3 PIN CONFIGURATION (TOP VIEW) ....................................................................................6
1.3.1 Normal Operating Mode ...........................................................................................6
1.3.2 PROM Programming Mode ...................................................................................... 11
1.4 EXAMPLE APPLICATION SYSTEM (PRINTER) ................................................................. 16
1.5 BLOCK DIAGRAM ................................................................................................................ 17
1.6 FUNCTIONS ..........................................................................................................................18
1.7 DIFFERENCES BETWEEN THE µPD78210 AND µPD78213 .............................................20
1.8
DIFFERENCES BETWEEN THE µPD78214 SUB-SERIES AND µPD78218A SUB-SERIES ......
1.9 DIFFERENCES BETWEEN THE µPD78212 AND µPD78212(A) ........................................22
1.10 DIFFERENCES BETWEEN THE µPD78213 AND µPD78214, AND THE µPD78213(A)
AND µPD78214(A) ................................................................................................................22
1.11 DIFFERENCES BETWEEN THE µPD78P214 AND µPD78P214(A) .................................... 22
1.12 DIFFERENCES BETWEEN THE µPD78212, µPD78213, µPD78214, AND µPD78P214 ...23
1.12.1 Functional Differences ...........................................................................................23
1.12.2 Package Differences ...............................................................................................23
21
CHAPTER 2 PIN FUNCTIONS ............................................................................................................................ 25
2.1 PIN FUNCTION LIST ............................................................................................................25
2.1.1 Normal Operating Mode ...........................................................................................25
2.1.2 PROM Programming Mode ...................................................................................... 27
2.2 PIN FUNCTIONS ...................................................................................................................27
2.2.1 Normal Operating Mode ...........................................................................................27
2.2.2 PROM Programming Mode ...................................................................................... 31
2.3 I/O CIRCUITS AND UNUSED-PIN HANDLING ..................................................................33
2.4 NOTES ...................................................................................................................................35
CHAPTER 3 CPU FUNCTION ............................................................................................................................. 37
3.1 MEMORY SPACE ................................................................................................................. 37
3.1.1 Internal Program Memory Area ...............................................................................42
3.1.2 Internal RAM Area ..................................................................................................... 43
3.1.3 Special Function Register (SFR) Area .....................................................................43
3.1.4 External SFR Area ......................................................................................................43
3.1.5 External Memory Space ............................................................................................ 43
3.1.6 External Extension Data Memory Space ................................................................43
3.2 REGISTERS ...........................................................................................................................45
3.2.1 Program Counter (PC) ...............................................................................................45
3.2.2 Program Status Word (PSW) ....................................................................................45
3.2.3 Stack Pointer (SP) ...................................................................................................... 46
3.2.4 General-Purpose Registers .......................................................................................47
3.2.5 Special Function Registers (SFR) ............................................................................. 50
- i -
Contents
3.3 NOTES ...................................................................................................................................53
CHAPTER 4 CLOCK GENERATOR .....................................................................................................................55
4.1 CONFIGURATION AND FUNCTION ................................................................................... 55
4.2 NOTES ...................................................................................................................................56
4.2.1 Inputting an external clock .......................................................................................56
4.2.2 Using the Crystal/Ceramic Oscillator ...................................................................... 56
CHAPTER 5 PORT FUNCTIONS .........................................................................................................................59
5.1 DIGITAL I/O PORTS ............................................................................................................. 59
5.2 PORT 0 ................................................................................................................................... 60
5.2.1 Hardware Configuration ............................................................................................61
5.2.2 Setting the Input/Output Mode and Control Mode ...............................................61
5.2.3 Operation ....................................................................................................................62
5.2.4 Built-In Pull-Up Resistor ............................................................................................ 62
5.2.5 Driving Transistors .................................................................................................... 62
5.3 PORT 2 ................................................................................................................................... 63
5.3.1 Hardware Configuration ............................................................................................64
5.3.2 Setting the Input Mode and Control Mode ............................................................ 64
5.3.3 Operation ....................................................................................................................64
5.3.4 Built-In Pull-Up Resistor ............................................................................................ 65
5.4 PORT 3 ................................................................................................................................... 66
5.4.1 Hardware Configuration ............................................................................................68
5.4.2 Setting the I/O Mode and Control Mode ................................................................ 71
5.4.3 Operation ....................................................................................................................73
5.4.4 Built-In Pull-Up Resistor ............................................................................................ 74
5.5 PORT 4 ................................................................................................................................... 75
5.5.1 Hardware Configuration ............................................................................................76
5.5.2 Setting the I/O Mode and Control Mode ................................................................ 76
5.5.3 Operation ....................................................................................................................77
5.5.4 Built-In Pull-Up Resistor ............................................................................................ 78
5.5.5 Driving LEDs Directly .................................................................................................79
5.6 PORT 5 ................................................................................................................................... 80
5.6.1 Hardware Configuration ............................................................................................80
5.6.2 Setting the I/O Mode and Control Mode ................................................................ 80
5.6.3 Operation ....................................................................................................................81
5.6.4 Built-In Pull-Up Resistor ............................................................................................ 82
5.6.5 Driving LEDs Directly .................................................................................................83
5.7 PORT 6 ................................................................................................................................... 84
5.7.1 Hardware Configuration ............................................................................................85
5.7.2 Setting the I/O Mode and Control Mode ................................................................ 88
5.7.3 Operation ....................................................................................................................90
5.7.4 Built-In Pull-Up Resistor ............................................................................................ 91
5.7.5 Note ............................................................................................................................. 92
5.8 PORT 7 ................................................................................................................................... 92
5.8.1 Hardware Configuration ............................................................................................92
5.8.2 Setting the I/O Mode and Control Mode ................................................................ 92
5.8.3 Operation ....................................................................................................................93
- ii -
ContentsPreface
5.8.4 Built-In Pull-Up Resistor .......................................................................................... 93
5.8.5 Notes ......................................................................................................................... 93
5.9 NOTES ...................................................................................................................................93
CHAPTER 6 REAL-TIME OUTPUT FUNCTION ................................................................................................. 95
6.1 CONFIGURATION AND FUNCTION ................................................................................... 95
6.2 REAL-TIME OUTPUT CONTROL REGISTER (RTPC) ........................................................ 97
6.3 ACCESS TO THE REAL-TIME OUTPUT PORT ..................................................................97
6.4 OPERATION ..........................................................................................................................99
6.5 APPLICATION EXAMPLE .....................................................................................................102
6.6 NOTES ...................................................................................................................................104
CHAPTER 7 TIMER/COUNTER UNITS ..............................................................................................................107
7.1 16-BIT TIMER/COUNTER ..................................................................................................... 109
7.1.1 Functions ................................................................................................................... 109
7.1.2 Configuration ............................................................................................................ 109
7.1.3 16-Bit Timer/Counter Control Registers ................................................................ 111
7.1.4 Operation of 16-Bit Timer 0 (TM0) ........................................................................114
7.1.5 Compare Register and Capture Register Operations ..........................................117
7.1.6 Basic Operation of Output Control Circuit ...........................................................119
7.1.7 PWM Output .............................................................................................................122
7.1.8 PPG Output ...............................................................................................................125
7.1.9 Sample Applications ...............................................................................................129
7.2 8-BIT TIMER/COUNTER 1 ....................................................................................................139
7.2.1 Functions ................................................................................................................... 139
7.2.2 Configuration ............................................................................................................ 140
7.2.3 8-Bit Timer/Counter 1 Control Registers...............................................................143
7.2.4 Operation of 8-Bit Timer 1 (TM1) ..........................................................................145
7.2.5 Compare Register and Capture/Compare Register Operations ......................... 148
7.2.6 Sample Applications ...............................................................................................151
7.3 8-BIT TIMER/COUNTER 2 ....................................................................................................159
7.3.1 Functions ................................................................................................................... 159
7.3.2 Configuration ............................................................................................................ 161
7.3.3 8-Bit Timer/Counter 2 Control Registers...............................................................163
7.3.4 Operation of 8-Bit Timer 2 (TM2) ..........................................................................167
7.3.5 External Event Counter Function ...........................................................................170
7.3.6 One-Shot Timer Function .......................................................................................175
7.3.7 Compare Register and Capture Register Operations ..........................................176
7.3.8 Basic Operation of Output Control Circuit ...........................................................179
7.3.9 PWM Output .............................................................................................................182
7.3.10 PPG Output ............................................................................................................... 185
7.3.11 Sample Applications ...............................................................................................190
7.4 8-BIT TIMER/COUNTER 3 ....................................................................................................205
7.4.1 Functions ................................................................................................................... 205
7.4.2 Configuration ............................................................................................................ 205
7.4.3 8-Bit Timer/Counter 3 Control Registers...............................................................207
7.4.4 Operation of 8-Bit Timer 3 (TM3) ..........................................................................208
7.4.5 Compare Register Operation ..................................................................................210
- iii -
Contents
7.4.6 Sample Applications ..................................................................................................211
7.5 NOTES ...................................................................................................................................212
7.5.1 Common Notes on All Timers/Counters .................................................................212
★
CHAPTER 8 A/D CONVERTER ...........................................................................................................................225
7.5.2 Notes on 16-Bit Timer/Counter ................................................................................ 219
7.5.3 Notes on 8-Bit Timer/Counter 2 ...............................................................................219
7.5.4 Notes on Using In-Circuit Emulators ....................................................................... 222
8.1 CONFIGURATION ................................................................................................................ 225
8.2 A/D CONVERTER MODE REGISTER (ADM) ......................................................................228
8.3 OPERATION ..........................................................................................................................230
8.3.1 Basic A/D Converter Operation ................................................................................230
8.3.2 Select Mode ................................................................................................................232
8.3.3 Scan Mode ..................................................................................................................233
8.3.4 A/D Conversion Activated by Software Start ......................................................... 234
8.3.5 A/D Conversion Activated by Hardware Start ........................................................235
8.4 INTERRUPT REQUEST FROM THE A/D CONVERTER .....................................................239
8.5 SETTING FOR USE OF AN6 AND AN7 ..............................................................................239
8.6 NOTES ...................................................................................................................................239
CHAPTER 9 ASYNCHRONOUS SERIAL INTERFACE ......................................................................................243
9.1 CONFIGURATION ................................................................................................................ 243
9.2 ASYNCHRONOUS SERIAL INTERFACE CONTROL REGISTER ......................................245
9.3 ASYNCHRONOUS SERIAL INTERFACE OPERATIONS ...................................................247
9.3.1 Data Format ................................................................................................................247
9.3.2 Parity Types and Operations ....................................................................................247
9.3.3 Transmission .............................................................................................................. 248
9.3.4 Reception ....................................................................................................................249
9.3.5 Reception Error .......................................................................................................... 249
9.4 BAUD RATE GENERATOR ..................................................................................................251
9.4.1 Configuration of the Baud Rate Generator for UART ...........................................251
9.4.2 Baud Rate Generator Control Register (BRGC) ......................................................251
9.4.3 Operation of the Baud Rate Generator for UART ..................................................253
9.5 BAUD RATE SETTING .........................................................................................................254
9.5.1 Example of Setting the BRGC Register When the Baud Rate Generator
for UART Is Used .......................................................................................................254
9.5.2 Example of Setting the Baud Rate When 8-bit Timer/Counter 3 Is Used .......... 256
9.5.3 Example of Setting the BRGC When the External Baud Rate Input (ASCK)
Is Used .........................................................................................................................258
9.6 NOTES ...................................................................................................................................258
CHAPTER 10 CLOCK SYNCHRONOUS SERIAL INTERFACE ........................................................................... 259
10.1 FUNCTION ............................................................................................................................259
10.2 CONFIGURATION ................................................................................................................259
10.3 CONTROL REGISTERS ........................................................................................................ 262
10.3.1 Clock Synchronous Serial Interface Mode Register (CSIM)...............................262
10.3.2 Serial Bus Interface Control Register (SBIC) ........................................................263
- iv -
Contents
10.4 OPERATIONS IN THE THREE-WIRE SERIAL I/O MODE .................................................. 265
10.4.1 Basic Operation Timing ..........................................................................................265
10.4.2 Operation When Only Transmission Is Permitted...............................................267
10.4.3 Operation When Only Reception Is Permitted..................................................... 267
10.4.4 Operation When Both Transmission and Reception Are Permitted ................. 267
10.4.5
10.5 SBI MODE .............................................................................................................................268
10.5.1 Features of SBI .........................................................................................................268
10.5.2 Configuration of the Serial Interface.....................................................................270
10.5.3 Detecting an Address Match ..................................................................................272
10.5.4 Control Registers in SBI Mode...............................................................................272
10.6 SBI COMMUNICATION AND SIGNALS.............................................................................277
10.6.1 Bus Release Signal (REL) .......................................................................................277
10.6.2 Command Signal (CMD) ........................................................................................278
10.6.3 Address ....................................................................................................................278
10.6.4 Command and Data................................................................................................279
10.6.5 Acknowledge Signal (ACK)....................................................................................279
10.6.6 Busy Signal (BUSY) and Ready Signal (READY) ................................................ 280
10.6.7 Signals......................................................................................................................280
10.6.8 Communication ....................................................................................................... 287
10.6.9 Releasing the Busy State .......................................................................................287
10.6.10 Setting Wake-Up .....................................................................................................287
10.6.11 Starting Transmission and Reception..................................................................287
10.7 NOTES ...................................................................................................................................292
Action to Be Taken When the Serial Clock and Shift Become Asynchronous ....
268
CHAPTER 11 EDGE DETECTION FUNCTION .....................................................................................................293
11.1 EXTERNAL INTERRUPT MODE REGISTERS (INTM0, INTM1) .......................................293
11.2 EDGE DETECTION ON PIN P20 .......................................................................................... 296
11.3 EDGE DETECTION ON PINS P21 TO P26..........................................................................297
11.4 NOTES ...................................................................................................................................298
CHAPTER 12 INTERRUPT FUNCTIONS .............................................................................................................. 301
12.1 INTERRUPT REQUEST SOURCES...................................................................................... 302
12.1.1 Software Interrupt Request ................................................................................... 302
12.1.2 Nonmaskable Interrupt Request ...........................................................................303
12.1.3 Maskable Interrupt Request ..................................................................................303
12.1.4 Selecting an Interrupt Source ............................................................................... 303
12.2 INTERRUPT HANDLING CONTROL REGISTERS..............................................................304
12.2.1 Interrupt Request Flag Register (IF0) ................................................................... 305
12.2.2 Interrupt Mask Register (MK0) ..............................................................................306
12.2.3 Interrupt Service Mode Register (ISM0) ..............................................................306
12.2.4 Priority Specification Flag Register (PR0)............................................................ 306
12.2.5 Interrupt Status Register (IST) ..............................................................................307
12.2.6 Program Status Word (PSW) ................................................................................308
12.3 INTERRUPT HANDLING ...................................................................................................... 308
12.3.1 Accepting Software Interrupts ..............................................................................308
12.3.2 Accepting Nonmaskable Interrupts ......................................................................308
12.3.3 Accepting Maskable Interrupts .............................................................................311
- v -
Contents
12.3.4 Multiplexed-Interrupt Handling.............................................................................. 313
12.3.5 Interrupt Request and Macro Service Pending....................................................316
12.3.6 Interrupt and Macro Service Operation Timing ..................................................317
12.4 MACRO SERVICE FUNCTION ............................................................................................. 319
12.4.1 Macro Service Outline.............................................................................................319
12.4.2 Macro Service Types ...............................................................................................320
12.4.3 Macro Service Basic Operation..............................................................................321
12.4.4 Macro Service Control Register .............................................................................322
12.4.5 Macro Service Type A .............................................................................................323
12.4.6 Type B Macro Service .............................................................................................327
12.4.7 Macro Service Type C .............................................................................................331
12.5 NOTES ...................................................................................................................................343
CHAPTER 13 LOCAL BUS INTERFACE FUNCTION ...........................................................................................345
13.1 CONTROL REGISTERS ........................................................................................................ 346
13.1.1 Memory Expansion Mode Register (MM) ............................................................346
13.1.2 Programmable Wait Control Register (PW) .........................................................347
13.2 MEMORY EXPANSION FUNCTION ...................................................................................347
13.2.1 External Memory Expansion Function .................................................................. 347
13.2.2 1M-Byte Expansion Function .................................................................................348
13.2.3 Memory Mapping with Expanded Memory .........................................................350
13.2.4 Example of Connecting Memories ........................................................................355
13.3 INTERNAL ROM HIGH-SPEED FETCH FUNCTION...........................................................357
13.4 WAIT FUNCTION.................................................................................................................. 357
13.5 PSEUDO STATIC RAM REFRESH FUNCTION ..................................................................367
13.5.1 Function .................................................................................................................... 367
13.5.2 Refresh Mode Register (RFM) ................................................................................ 367
13.5.3 Operation ..................................................................................................................368
13.5.4 Example of Connecting Pseudo Static RAM ........................................................ 372
13.6 NOTES ...................................................................................................................................372
CHAPTER 14 STANDBY FUNCTION ...................................................................................................................377
14.1 FUNCTION OVERVIEW ........................................................................................................377
14.2 STANDBY CONTROL REGISTER (STBC) ..........................................................................379
14.3 HALT MODE..........................................................................................................................379
14.3.1 Specifying HALT Mode and Operation States in HALT Mode...........................379
14.3.2 Releasing HALT Mode ............................................................................................. 380
14.4 STOP MODE .........................................................................................................................382
14.4.1 Specifying STOP Mode and Operation States in STOP Mode ..........................382
14.4.2 Releasing STOP Mode.............................................................................................382
14.4.3 Notes on Using STOP Mode ..................................................................................384
14.5 NOTES ...................................................................................................................................386
CHAPTER 15 RESET FUNCTION .........................................................................................................................389
15.1 RESET FUNCTION................................................................................................................ 389
15.2 NOTE .....................................................................................................................................393
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Contents
CHAPTER 16 APPLICATION EXAMPLES ............................................................................................................ 395
16.1 OPEN-LOOP CONTROL OF STEPPER MOTORS ..............................................................395
16.2 SERIAL COMMUNICATION WITH MULTIPLE DEVICES..................................................397
CHAPTER 17 PROGRAMMING FOR THE
17.1 OPERATING MODE ..............................................................................................................399
17.2 PROCEDURE FOR WRITING INTO PROM .........................................................................399
17.3 PROCEDURE FOR READING FROM PROM.......................................................................401
17.4 NOTE .....................................................................................................................................402
CHAPTER 18 INSTRUCTION OPERATIONS .......................................................................................................403
18.1 LEGEND.................................................................................................................................403
18.1.1 Operand Field ...........................................................................................................403
18.1.2 Operation Field.........................................................................................................404
18.1.3 Flag Field ...................................................................................................................405
18.2 LIST OF OPERATIONS.........................................................................................................406
18.3 INSTRUCTION LISTS FOR EACH ADDRESSING TYPE ...................................................416
APPENDIX A 78K/II SERIES PRODUCT LIST ..................................................................................................... 421
APPENDIX B DEVELOPMENT TOOLS ................................................................................................................429
B.1 HARDWARE ..........................................................................................................................431
B.2 SOFTWARE ...........................................................................................................................433
B.2.1 Language Processing Software ...............................................................................433
B.2.2 Software for the In-Circuit Emulator ....................................................................... 435
B.2.3 Software for the PROM Programmer ......................................................................437
B.2.4 OS for the IBM PC ...................................................................................................... 437
B.3 UPGRADING OTHER IN-CIRCUIT EMULATORS TO 78K/II SERIES LEVEL ................... 438
B.3.1 Upgrading to IE-78240-R-A Level.............................................................................438
B.3.2 Upgrading to IE-78240-R Level................................................................................. 439
B.3.3 Upgrading to IE-78210-R Level................................................................................. 440
µ
PD78P214 ....................................................................................... 399
★
APPENDIX C SOFTWARE FOR EMBEDDED APPLICATIONS .......................................................................... 441
C.1 FUZZY INFERENCE DEVELOPMENT SUPPORT SYSTEM .............................................. 441
APPENDIX D REGISTER INDEX..........................................................................................................................443
D.1 REGISTER INDEX .................................................................................................................443
D.2 REGISTER SYMBOL INDEX ................................................................................................445
APPENDIX E INDEX .............................................................................................................................................447
E.1 INDEX ....................................................................................................................................447
E.2 SYMBOL INDEX ...................................................................................................................452
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★
Contents
LIST OF FIGURES
Fig. No. Title, Page
2-1 I/O Circuits Provided for Pins.......................................................................................................34
3-1 Memory Map of
3-2 Memory Map of µPD78212 (EA Pin Driven Low) ......................................................................39
3-3 Memory Map of
3-4 Memory Map of
3-5 Sample Data Transfer between Banks .......................................................................................44
3-6 Configuration of the Program Counter ......................................................................................45
3-7 Configuration of the Program Status Word...............................................................................45
3-8 Configuration of the Stack Pointer..............................................................................................46
3-9 Data Saved to the Stack Area ......................................................................................................47
3-10 Data Restored from the Stack Area ............................................................................................47
3-11 Configuration of General-Purpose Registers .............................................................................48
4-1 Block Diagram of Clock Generator ..............................................................................................55
4-2 External Circuit for the Clock Oscillator .....................................................................................55
4-3 Point from Which Signals Can Be Drawn When an External Clock Is Input ......................... 56
4-4 Notes on Connection of the Oscillator .......................................................................................57
4-5 Incorrect Oscillator Connections ................................................................................................. 57
5-1 Port Configuration .........................................................................................................................59
5-2 Configuration of Port 0 .................................................................................................................61
5-3 Port 0 Mode Register Format.......................................................................................................61
5-4 Port Specified as an Output Port.................................................................................................62
5-5 Example of Driving a Transistor..................................................................................................62
5-6 Block Diagram of Port 2................................................................................................................64
5-7 Port Specified as an Input Port....................................................................................................65
5-8 Built-In Pull-Up Resistor Format..................................................................................................65
5-9 Connection of Pull-Up Resistors (Port 2) ...................................................................................66
5-10 Block Diagram of P30 (Port 3)......................................................................................................68
5-11 Block Diagram of P31, and P34 through P37 (Port 3) ...............................................................69
5-12 Block Diagram of P32 (Port 3)......................................................................................................70
5-13 Block Diagram of P33 (Port 3)......................................................................................................71
5-14 Port 3 Mode Register Format.......................................................................................................72
5-15 Port 3 Mode Control Register (PMC3) Format...........................................................................72
5-16 Port Specified as an Output Port.................................................................................................73
5-17 Port Specified as an Input Port....................................................................................................73
5-18 Port Specified as a Control Signal Input or Output .................................................................. 74
5-19 Pull-Up-Resistor-Option Register Format...................................................................................74
5-20 Connection of Pull-Up Resistors (Port 3) ...................................................................................75
5-21 Block Diagram of Port 4................................................................................................................76
5-22 Port Specified as an Output Port.................................................................................................77
5-23 Port Specified as an Input Port....................................................................................................77
5-24 Pull-Up-Resistor-Option Register Format...................................................................................78
µ
PD78212 (EA Pin Driven High) .....................................................................38
µ
PD78213, µPD78214, or µPD78P214 (EA Pin Driven Low) ........................40
µ
PD78214, µPD78P214 (EA Pin Driven High)................................................41
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Contents
Fig. No. Title, Page
5-25 Connection of Pull-Up Resistors (Port 4) ...................................................................................79
5-26 Example of Driving an LED Directly ........................................................................................... 79
5-27 Block Diagram of Port 5................................................................................................................80
5-28 Port 5 Mode Register Format.......................................................................................................81
5-29 Port Specified as an Output Port.................................................................................................81
5-30 Port Specified as an Input Port .................................................................................................... 82
5-31 Pull-Up-Resistor-Option Register Format...................................................................................82
5-32 Connection of Pull-Up Resistors (Port 5) ...................................................................................83
5-33 Example of Driving an LED Directly ........................................................................................... 83
5-34 Block Diagram of P60 through P63 (Port 6) ............................................................................... 85
5-35 Block Diagram of P64 and P65 (Port 6) ......................................................................................86
5-36 Block Diagram of P66 (Port 6)......................................................................................................87
5-37 Block Diagram of P67 (Port 6)......................................................................................................88
5-38 Port 6 Mode Register Format.......................................................................................................89
5-39 Port Specified as an Output Port.................................................................................................90
5-40 Port Specified as an Input Port .................................................................................................... 90
5-41 Pull-Up-Resistor-Option Register Format...................................................................................91
5-42 Connection of Pull-Up Resistors (Port 6) ...................................................................................91
5-43 Block Diagram of Port 7................................................................................................................92
5-44 Port Specified as an Input Port .................................................................................................... 93
6-1 Block Diagram of the Real-Time Output Port ............................................................................ 96
6-2 Real-Time Output Port Control Register (RTPC) Format ..........................................................97
6-3 Configuration of the Buffer Registers (P0H and P0L) ...............................................................97
6-4 Real-Time Output Port Operation Timing .................................................................................. 100
6-5 Real-Time Output Port Operation Timing (Controlling 2 Channels
Independently of Each Other) ......................................................................................................101
6-6 Real-Time Output Port Operation Timing .................................................................................. 102
6-7 Contents of the Control Register for the Real-Time Output Function....................................103
6-8 Real-Time Output Function Setting Procedure .........................................................................103
6-9 Interrupt Request Handling When the Real-Time Output Function Is Used .........................104
7-1 Block Diagrams of Timer/Counter Units ....................................................................................108
7-2 Block Diagram of 16-Bit Timer/Counter .....................................................................................110
7-3 Format of Timer Control Register 0 (TMC0) .............................................................................. 112
7-4 Format of Capture/Compare Control Register 0 (CRC0) ..........................................................112
7-5 Format of Timer Output Control Register (TOC) ....................................................................... 113
7-6 Basic Operation of 16-Bit Timer 0 (TM0)....................................................................................114
7-7 TM0 Cleared by a Coincidence with Compare Register (CR01) ..............................................115
7-8 Clear Operation When the CE0 Bit Is Reset to 0 .......................................................................116
7-9 Compare Operation ....................................................................................................................... 117
7-10 TM0 Cleared After a Coincidence Is Detected ........................................................................... 118
7-11 Capture Operation .........................................................................................................................119
7-12 Toggle Output Operation .............................................................................................................121
7-13 PWM Pulse Output ........................................................................................................................122
7-14 Example of PWM Output Using TM0 .........................................................................................123
7-15 PWM Output When CR00 = FFFFH ..............................................................................................123
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Fig. No. Title, Page
7-16 Example of Rewriting Compare Register CR00 ......................................................................... 124
7-17 Example of PWM Output Signal with a 100% Duty Factor......................................................124
7-18 Example of PPG Output Using TM0 ...........................................................................................125
7-19 PPG Output When CR00 = CR01 ..................................................................................................126
7-20 PPG Output When CR00 = 0000H ................................................................................................126
7-21 Example of Rewriting Compare Register CR00 ......................................................................... 127
7-22 Example of PPG Output Signal with a 100% Duty Factor ........................................................127
7-23 Example of PPG Output Period Made Longer ...........................................................................128
7-24 Timing of Interval Timer Operation (1) ......................................................................................129
7-25 Setting of Control Registers for Interval Timer Operation (1) ................................................130
7-26 Setting Procedure for Interval Timer Operation (1)..................................................................130
7-27 Interrupt Request Handling for Interval Timer Operation (1) .................................................. 131
7-28 Timing of Interval Timer Operation (2) ......................................................................................131
7-29 Setting of Control Registers for Interval Timer Operation (2) ................................................132
7-30 Setting Procedure for Interval Timer Operation (2)..................................................................132
7-31 Timing of Pulse Width Measurement .........................................................................................133
7-32 Setting of Control Registers for Pulse Width Measurement ................................................... 133
7-33 Setting Procedure for Pulse Width Measurement ....................................................................134
7-34 Interrupt Request Handling for Pulse Width Calculation .........................................................134
7-35 Example of PWM Signal Output by 16-Bit Timer/Counter ......................................................135
7-36 Setting of Control Registers for PWM Output Operation ........................................................135
7-37 Setting Procedure for PWM Output ............................................................................................136
7-38 Changing Duty Factor of PWM Output ....................................................................................... 136
7-39 Example of PPG Signal Output by 16-Bit Timer/Counter ........................................................137
7-40 Setting of Control Registers for PPG Output Operation ..........................................................137
7-41 Setting Procedure for PPG Output ..............................................................................................138
7-42 Changing Duty Factor of PPG Output ......................................................................................... 138
7-43 Block Diagram of 8-Bit Timer/Counter 1 ....................................................................................141
7-44 Format of Timer Control Register 1 (TMC1) .............................................................................. 143
7-45 Format of Prescaler Mode Register 1 (PRM1) ...........................................................................144
7-46 Format of Capture/Compare Control Register 1 (CRC1) ..........................................................144
7-47 Basic Operation of 8-Bit Timer 1 (TM1)......................................................................................145
7-48 TM1 Cleared by a Coincidence with Compare Register (CR1m) ............................................146
7-49 TM1 Cleared after Capture Operation ........................................................................................147
7-50 Clear Operation When the CE1 Bit Is Reset to 0 .......................................................................147
7-51 Compare Operation ....................................................................................................................... 149
7-52 TM1 Cleared After a Coincidence Is Detected ........................................................................... 149
7-53 Capture Operation .........................................................................................................................150
7-54 TM1 Cleared after Capture Operations ...................................................................................... 151
7-55 Timing of Interval Timer Operation (1) ......................................................................................152
7-56 Setting of Control Registers for Interval Timer Operation (1) ................................................152
7-57 Setting Procedure for Interval Timer Operation (1)..................................................................153
7-58 Interrupt Request Handling for Interval Timer Operation (1) .................................................. 153
7-59 Timing of Interval Timer Operation (2) ......................................................................................154
7-60 Setting of Control Registers for Interval Timer Operation (2) ................................................154
7-61 Setting Procedure for Interval Timer Operation (2)..................................................................155
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Fig. No. Title, Page
7-62 Timing of Pulse Width Measurement .........................................................................................156
7-63 Setting of Control Registers for Pulse Width Measurement ................................................... 157
7-64 Setting Procedure for Pulse Width Measurement ....................................................................158
7-65 Interrupt Request Handling for Pulse Width Calculation .........................................................158
7-66 Block Diagram of 8-Bit Timer/Counter 2 ....................................................................................162
7-67 Format of Timer Control Register 1 (TMC1) .............................................................................. 163
7-68 Format of Prescaler Mode Register 1 (PRM1) ...........................................................................164
7-69 Format of Capture/Compare Control Register 2 (CRC2) ..........................................................165
7-70 Format of Timer Output Control Register (TOC) ....................................................................... 166
7-71 Basic Operation of 8-Bit Timer 2 (TM2)......................................................................................167
7-72 TM2 Cleared by a Coincidence with Compare Register (CR21) ..............................................168
7-73 TM2 Cleared After Capture Operation ........................................................................................ 168
7-74 Clear Operation When the CE2 Bit Is Reset to 0 .......................................................................169
7-75 External Event Count Timing of 8-Bit Timer/Counter 2 ...........................................................171
7-76 Interrupt Request Generation Using External Event Counter .................................................172
7-77 Example Where Input of No Valid Edge Cannot Be Distinguished from Input of
Only One Valid Edge with External Event Counter .................................................................173
7-78 How to Distinguish Input of No Valid Edge from Input of Only One Valid Edge
with External Event Counter ........................................................................................................ 173
7-79 One-Shot Timer Operation ........................................................................................................... 175
7-80 Compare Operation ....................................................................................................................... 176
7-81 TM2 Cleared After a Coincidence Is Detected ........................................................................... 177
7-82 Capture Operation .........................................................................................................................178
7-83 TM2 Cleared After Capture Operation ........................................................................................ 179
7-84 Toggle Output Operation .............................................................................................................181
7-85 PWM Pulse Output ........................................................................................................................182
7-86 Example of PWM Output Using TM2 .........................................................................................183
7-87 PWM Output When CR20 = FFH .................................................................................................. 184
7-88 Example of Rewriting a Compare Register ................................................................................ 184
7-89 Example of PWM Output Signal with a 100% Duty Factor......................................................185
7-90 Example of PPG Output Using TM2 ...........................................................................................186
7-91 PPG Output When CR20 = CR21 ..................................................................................................187
7-92 PPG Output When CR20 = 00H .................................................................................................... 187
7-93 Example of Rewriting Compare Register CR20 ......................................................................... 188
7-94 Example of PPG Output Signal with a 100% Duty Factor ........................................................188
7-95 Example of PPG Output Period Made Longer ...........................................................................189
7-96 Timing of Interval Timer Operation (1) ......................................................................................190
7-97 Setting of Control Registers for Interval Timer Operation (1) ................................................191
7-98 Setting Procedure for Interval Timer Operation (1)..................................................................191
7-99 Interrupt Request Handling for Interval Timer Operation (1) .................................................. 192
7-100 Timing of Interval Timer Operation (2) ......................................................................................192
7-101 Setting of Control Registers for Interval Timer Operation (2) ................................................ 193
7-102 Setting Procedure for Interval Timer Operation (2)..................................................................194
7-103 Timing of Pulse Width Measurement .........................................................................................195
7-104 Setting of Control Registers for Pulse Width Measurement ................................................... 195
7-105 Setting Procedure for Pulse Width Measurement ....................................................................196
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Contents
Fig. No. Title, Page
7-106 Interrupt Request Handling for Pulse Width Calculation .........................................................197
7-107 Example of PWM Signal Output by 8-Bit Timer/Counter 2 .....................................................197
7-108 Setting of Control Registers for PWM Output Operation ........................................................198
7-109 Setting Procedure for PWM Output ............................................................................................199
7-110 Changing Duty Factor of PWM Output ....................................................................................... 199
7-111 Example of PPG Signal Output by 8-Bit Timer/Counter 2 .......................................................199
7-112 Setting of Control Registers for PPG Output Operation ..........................................................200
7-113 Setting Procedure for PPG Output ..............................................................................................201
7-114 Changing Duty Factor of PPG Output ......................................................................................... 201
7-115 External Event Counter Operation ..............................................................................................201
7-116 Setting of Control Registers for External Event Counter Operation ......................................202
7-117 Setting Procedure for External Event Counter Operation .......................................................202
7-118 One-Shot Timer Operation ........................................................................................................... 203
7-119 Setting of Control Registers for One-Shot Timer Operation ...................................................203
7-120 Setting Procedure for One-Shot Timer Operation ....................................................................204
7-121 Procedure for Starting an Additional One-Shot Timer Operation ..........................................204
7-122 Block Diagram of 8-Bit Timer/Counter 3 ....................................................................................206
7-123 Format of Timer Control Register 0 (TMC0) .............................................................................. 207
7-124 Format of Prescaler Mode Register 0 (PRM0) ...........................................................................207
7-125 Basic Operation of 8-Bit Timer 3 (TM3)......................................................................................208
7-126 TM3 Cleared by a Coincidence with Compare Register (CR30) ..............................................209
7-127 Clear Operation When the CE3 Bit Is Reset to 0 .......................................................................209
7-128 Compare Operation ....................................................................................................................... 211
7-129 Timing of Interval Timer Operation ............................................................................................ 211
7-130 Setting of Control Registers for Interval Timer Operation ......................................................212
7-131 Setting Procedure for Interval Timer Operation .......................................................................212
7-132 Count Start Operation ...................................................................................................................214
7-133 Count Operation Stop ...................................................................................................................214
7-134 Timing of Count Operation Stop and Restart............................................................................214
7-135 Example of PWM Output Signal with a 100% Duty Factor......................................................216
7-136 Example of PPG Output Signal with a 100% Duty Factor ........................................................217
7-137 Example of PPG Output Period Made Longer ...........................................................................218
7-138 Interrupt Request Generation Using External Event Counter .................................................220
7-139 Example Where Input of No Valid Edge Cannot Be Distinguished from Input of
Only One Valid Edge with External Event Counter ..................................................................220
7-140 How to Distinguish Input of No Valid Edge from Input of Only One Valid Edge
with External Event Counter ........................................................................................................ 221
7-141 Interrupt Generation Timing Change by an Erroneously Detected Edge ..............................223
8-1 A/D Converter Configuration .......................................................................................................226
8-2 Example of Capacitors Connected to the A/D Converter Pins ................................................227
8-3 A/D Converter Mode Register (ADM) Format ............................................................................229
8-4 Basic A/D Converter Operation....................................................................................................230
8-5 Relations between Analog Input Voltages and A/D Conversion Results............................... 231
8-6 Select Mode Operation Timing ...................................................................................................232
8-7 Scan Mode Operation Timing......................................................................................................233
8-8 Software-Started Select-Mode A/D Conversion ........................................................................234
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Contents
Fig. No. Title, Page
8-9 Software-Started Scan-Mode A/D Conversion .......................................................................... 235
8-10 Example of Malfunction in a Hardware-Started A/D Conversion ........................................... 236
8-11 Select-Mode A/D Conversion Started by Hardware .................................................................237
8-12 Scan-Mode A/D Conversion Started by Hardware ...................................................................238
8-13 Example of Capacitors Connected to the A/D Converter Pins ................................................240
8-14 Example of Malfunction in a Hardware-Started A/D Conversion ........................................... 241
9-1 Asynchronous Serial Interface Configuration ...........................................................................244
9-2 Format of the Asynchronous Serial Interface Mode Register (ASIM)....................................246
9-3 Format of the Asynchronous Serial Interface Status Register (ASIS) ...................................247
9-4 Format of the Transmission/Reception Data at the Asynchronous Serial Interface ............247
9-5 Asynchronous Serial Interface Transmission Completion Interrupt Timing ........................248
9-6 Asynchronous Serial Interface Reception Completion Interrupt Timing...............................249
9-7 Reception Error Timing ................................................................................................................250
9-8 Baud Rate Generator Clock Configuration ................................................................................. 251
9-9 Baud Rate Generator Control Register (BRGC) Format ...........................................................252
10-1 Block Diagram of the Clock Synchronous Serial Interface ......................................................260
10-2 Format of the Clock Synchronous Serial Interface Mode Register (CSIM) ...........................262
10-3 Format of Serial Bus Interface Control Register (SBIC) ...........................................................264
10-4 Sample System Configuration with Three-Wire Serial I/O ......................................................265
10-5 Timing in Three-Wire Serial I/O Mode .......................................................................................266
10-6 Sample Connection with a Device Having Two-Wire Serial I/O .............................................266
10-7 Sample Serial Bus Configured with SBI.....................................................................................269
10-8 Pin Configuration...........................................................................................................................270
10-9 Block Diagram of Clock Synchronous Serial Interface.............................................................271
10-10 Format of Clock Synchronous Serial Interface Mode Register (CSIM) ..................................273
10-11 Format of SBIC Register ............................................................................................................... 274
10-12 Configuration of Shift Register and Related Components ......................................................276
10-13 SBI Transfer Timing ......................................................................................................................277
10-14 Bus Release Signal ........................................................................................................................277
10-15 Command Signal ...........................................................................................................................278
10-16 Address ...........................................................................................................................................278
10-17 Selecting a Slave Device by Its Address .................................................................................... 278
10-18 Command .......................................................................................................................................279
10-19 Data .................................................................................................................................................279
10-20 Acknowledge Signal ..................................................................................................................... 279
10-21 Busy Signal and Ready Signal .................................................................................................... 280
10-22 Operation of RELT, CMDT, RELD, and CMDD ...........................................................................280
10-23 ACKT Operation .............................................................................................................................281
10-24 ACKE Operations ........................................................................................................................... 281
10-25 ACKD Operations ...........................................................................................................................282
10-26 BSYE Operation .............................................................................................................................283
10-27 Sending an Address from Master Device to Slave Device ......................................................288
10-28 Sending a Command from Master Device to Slave Device ....................................................289
10-29 Sending Data from Master Device to Slave Device .................................................................. 290
10-30 Sending Data from the Slave Device to the Master Device ....................................................291
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Contents
Fig. No. Title, Page
11-1 Format of External Interrupt Mode Register 0 (INTM0) ........................................................... 294
11-2 Format of External Interrupt Mode Register 1 (INTM1) ........................................................... 295
11-3 Edge Detection on Pin P20 ...........................................................................................................296
11-4 Edge Detection on Pins P21 to P26 .............................................................................................297
11-5 Erroneously Detected Edges ........................................................................................................297
11-6 Erroneously Detected Edges ........................................................................................................299
12-1 INTM1 Register Format ................................................................................................................303
12-2 ADM Register Format ...................................................................................................................304
12-3 Interrupt Request Flag Register (IF0) Format ............................................................................305
12-4 Interrupt Mask Register (MK0) Format .......................................................................................306
12-5 Interrupt Service Mode Register (ISM0) Format ....................................................................... 306
12-6 Priority Specification Flag Register (PR0) Format.....................................................................307
12-7 Interrupt Status Register (IST) Format .......................................................................................307
12-8 Program Status Word Format......................................................................................................308
12-9 Accepting an NMI Interrupt Request ..........................................................................................309
12-10 Interrupt Handling Algorithm ......................................................................................................312
12-11 Example of Handling an Interrupt Request When an Interrupt Is
Already Being Handled .................................................................................................................314
12-12 Example of Handling Interrupts That Occur Simultaneously..................................................316
12-13 Interrupt Request Generation and Acceptance .........................................................................317
12-14 Differences between a Vectored Interrupt and Macro Service ...............................................319
12-15 Macro Service Processing Sequence..........................................................................................321
12-16 Macro Service Control Word Configuration ..............................................................................322
12-17 Macro Service Mode Register Format ........................................................................................323
12-18 Flow of Data Transfer by Macro Service (Type A)....................................................................325
12-19 Type A Macro Service Channel ...................................................................................................326
12-20 Asynchronous Serial Reception ..................................................................................................327
12-21 Flow of Data Transfer by Macro Service (Type B) ....................................................................328
12-22 Type B Macro Service Channel ...................................................................................................329
12-23 Parallel Data Input in Synchronization with an External Interrupt .........................................330
12-24 Parallel Data Input Timing ........................................................................................................... 330
12-25 Flow of Data Transfer by Macro Service (Type C) ....................................................................332
12-26 Type C Macro Service Channel ...................................................................................................334
12-27 Open-Loop Control for a Stepper Motor by the Real-Time Output Port ...............................336
12-28 Data Transfer Control Timing ...................................................................................................... 337
12-29 Four-Phase Stepping Motor with Phase 1 Excitation ...............................................................338
12-30 Four-Phase Stepping Motor with Phases 1 and 2 Excitation ..................................................338
12-31 Block Diagram 1 for Automatic Addition Control Plus Ring Control
(Constant-Speed Rotation with Phases 1 and 2 Excitation) ....................................................339
12-32 Timing Chart 1 for Automatic Addition Control Plus Ring Control
(Constant-Speed Rotation with Phases 1 and 2 Excitation) ....................................................340
12-33 Block Diagram 2 for Automatic Addition Control Plus Ring Control
(with the Output Timing Varied by Phase 2 Excitation) ........................................................... 341
12-34 Timing Chart 2 for Automatic Addition Control Plus Ring Control
(with the Output Timing Varied by Phase 2 Excitation) ........................................................... 342
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Contents
Fig. No. Title, Page
13-1 Format of the Memory Expansion Mode Register (MM) ......................................................... 346
13-2 Format of Programmable Wait Control Register (PW) ............................................................. 347
13-3 Read Timing ...................................................................................................................................348
13-4 Write Timing ..................................................................................................................................348
13-5 Accessing Expansion Data Memory ...........................................................................................349
13-6 Data Memory Expansion for µPD78212 (When EA = L) ...........................................................351
13-7 Data Memory Expansion for µPD78212 (When EA = H) .......................................................... 352
13-8 Data Memory Expansion for µPD78213 and µPD78214 (When EA = L) ................................. 353
13-9 Data Memory Expansion for µPD78214 and µPD78P214 (When EA = H) ..............................354
13-10 Example of Connecting Memories to µPD78214 ....................................................................... 356
13-11 Wait Control Space of µPD78212 (When EA = L) ......................................................................358
13-12 Wait Control Space of µPD78212 (When EA = H) .....................................................................359
13-13 Wait Control Space of µPD78213 and µPD78214 (When EA = L) ............................................360
13-14 Wait Control Space of µPD78214 and µPD78P214 ....................................................................361
13-15 Read Timing of Programmable Wait Function .......................................................................... 362
13-16 Write Timing of Programmable Wait Function .........................................................................364
13-17 Timing When External Wait Signal Is Used .............................................................................. 366
13-18 Format of Refresh Mode Register (RFM) ...................................................................................367
13-19 Pulse Refresh When Internal Memory Is Accessed .................................................................. 368
13-20 Pulse Refresh When External Memory Is Accessed ................................................................. 369
13-21 Restoration Timing from Self-Refresh........................................................................................370
13-22 Return from Self-Refresh ............................................................................................................. 371
13-23 Example of Connecting Pseudo Static RAM to µPD78214.......................................................372
13-24 Return from Self-Refresh ............................................................................................................. 374
13-25 Glitch Observed on Pins A16 to A19 during Emulation ...........................................................374
13-26 Insufficient Address Hold Time during Emulation ................................................................... 374
13-27 Preventing Problems That May Occur during Emulation ........................................................ 375
14-1 Transition Diagram for the Standby Modes .............................................................................. 377
14-2 Standby Function Block ................................................................................................................378
14-3 Configuration of the Standby Control Register (STBC) ...........................................................379
14-4 Releasing STOP Mode with an NMI Signal ...............................................................................383
14-5 Example of Longer Oscillation Settling Time ............................................................................ 383
14-6 Example of Address Bus Arrangement ...................................................................................... 385
14-7 Example Address/Data Bus Arrangement ..................................................................................385
14-8 Example Arrangement for Analog Input Pin .............................................................................386
14-9 Example of Longer Oscillation Settling Time ............................................................................ 387
15-1 Acceptance of the RESET Signal .................................................................................................389
15-2 Reset Operation at Power-On ...................................................................................................... 389
15-3 Timing Charts for Reset Operation ............................................................................................. 393
16-1 Example of Controlling Two Stepper Motors............................................................................396
16-2 Example System Configuration Using the Serial Bus Interface .............................................397
16-3 Example of Communication with SBI ......................................................................................... 398
16-4 Serial Bus Communication Timing ............................................................................................. 398
- xv -
Contents
Fig. No. Title, Page
17-1 Timing Chart for PROM Write and Verify .................................................................................. 400
17-2 Write Operation Flowchart ...........................................................................................................401
17-3 PROM Read Timing Chart ............................................................................................................402
- xvi -
Contents
LIST OF TABLES
Table No. Title, Page
2-1 Port 2 Functions ............................................................................................................................. 27
2-2 Port 3 Operating Mode .................................................................................................................29
2-3 Port 6 Operating Mode .................................................................................................................30
2-4 Types of I/O Circuits and Unused-Pin Handling ........................................................................ 33
3-1 Vector Table ...................................................................................................................................42
3-2 Selecting a Register Bank.............................................................................................................46
3-3 Function Names and Absolute Names .......................................................................................49
3-4 Special Function Registers (SFR) ................................................................................................51
5-1 Port Functions ................................................................................................................................60
5-2 Number of I/O Ports ......................................................................................................................60
5-3 Functions of Port 2 ........................................................................................................................63
5-4 Port 3 Operating Modes ...............................................................................................................67
5-5 Port 4 Operating Modes ...............................................................................................................76
5-6 Port 5 Operating Modes ...............................................................................................................81
5-7 Port 6 Operating Modes ...............................................................................................................84
5-8 Port 6 Control Pin Functions and the Required Operations ....................................................88
6-1 Port 0 Operating Modes and Operations Needed for the Port 0 Buffer Registers ...............98
6-2 Output Trigger for the Real-Time Output Port ..........................................................................99
7-1 Timer/Counter Types and Functions...........................................................................................107
7-2 Intervals of 16-Bit Timer/Counter ................................................................................................109
7-3 Programmable Square Wave Output Setting Range of 16-Bit Timer/Counter .....................109
7-4 Pulse Width Measurement Range of 16-Bit Timer/Counter .................................................... 109
7-5 Timer Output (TO0, TO1) Operation ...........................................................................................120
7-6 TO0 and TO1 Toggle Output ........................................................................................................ 121
7-7 PWM Output on TO0 and TO1 .....................................................................................................122
7-8 PPG Output on TO0 ....................................................................................................................... 125
7-9 Intervals of 8-Bit Timer/Counter 1 ...............................................................................................139
7-10 Pulse Width Measurement Range of 8-Bit Timer/Counter 1 ...................................................139
7-11 Intervals of 8-Bit Timer/Counter 2 ...............................................................................................159
7-12 Programmable Square Wave Output Setting Range of 8-Bit Timer/Counter 2 .................... 160
7-13 Pulse Width Measurement Range of 8-Bit Timer/Counter 2 ...................................................160
7-14 Clock Signals That Can Be Applied to 8-Bit Timer/Counter 2 .................................................161
7-15 Timer Output (TO2, TO3) Operation ...........................................................................................180
7-16 TO2 and TO3 Toggle Output ........................................................................................................ 182
7-17 PWM Output on TO2 and TO3 .....................................................................................................183
7-18 PPG Output on TO2 ....................................................................................................................... 186
7-19 Intervals of 8-Bit Timer/Counter 3 ...............................................................................................205
7-20 Maximum Number of Wait States Inserted When Registers Associated with
Timers/Counters Are Accessed ................................................................................................... 215
- xvii -
Contents
Table No. Title, Page
8-1 Modes Generating the INTAD......................................................................................................225
8-2 A/D Conversion Time ....................................................................................................................232
8-3 Conditions to Generate Interrupt Requests in Each A/D Converter Operating Mode .........239
9-1 Causes of Reception Errors .......................................................................................................... 250
9-2 Baud Rate Setting ..........................................................................................................................254
9-3
9-4 Example of Setting the Baud Rate When 8-Bit Timer/Counter 3 Is Used
9-5 Examples of Setting the BRGC When an External Baud Rate Input (ASCK) Is Used ..........258
10-1 Reading/Writing the Contents of the SBIC Register .................................................................263
10-2 Signals in SBI Mode ......................................................................................................................284
10-3 Conditions Governing Release of BUSY ....................................................................................287
11-1 Pins P20 to P26 and Use of Detected Edge ............................................................................... 293
12-1 Interrupt Request Handling Modes .............................................................................................301
12-2 Interrupt Request Sources ...........................................................................................................302
12-3 Flags for Interrupt Request Sources ...........................................................................................305
12-4 Multiple-Interrupt Handling .........................................................................................................313
12-5 Interrupt Request Acceptance Processing Time .......................................................................317
12-6 Macro Service Processing Time ..................................................................................................318
12-7 Interrupts That Can Use a Macro Service .................................................................................. 320
12-8 Interrupt Requests That Can Specify Macro Service and Related SFRs (Type A) ................ 324
12-9 Illegal Write Access Conditions and Corresponding Operations ........................................... 324
12-10 Interrupt Requests That Can Specify Macro Service and SFRs (Type C) ..............................331
12-11 Illegal Write Access Conditions and Corresponding Operations ........................................... 331
12-12 Illegal Write Access Conditions and Corresponding Operations ........................................... 344
Example of Setting the BRGC Register When the Baud Rate Generator for UART Is Used .......
(Asynchronous Serial Interface) .................................................................................................. 257
255
13-1 Conditions and Operations for Illegal Write Access .................................................................350
13-2 System Clock Frequency and Refresh Pulse Output Cycle
When Pseudo Static RAM Is Used ..............................................................................................368
13-3 Conditions and Operations for Illegal Write Access .................................................................373
14-1 Operation States in HALT Mode .................................................................................................379
14-2 Sources for Releasing HALT Mode and Operations Performed After Release ..................... 380
14-3 Release of HALT Mode by a Maskable Interrupt Request ....................................................... 381
14-4 Operation States in STOP Mode .................................................................................................382
15-1 Pin States during Reset and After Reset State Is Released ..................................................... 390
15-2 Hardware States after Reset ........................................................................................................391
17-1 Operating Modes for PROM Programming ...............................................................................399
18-1 8-Bit Instructions for Each Addressing Type .............................................................................416
18-2 16-Bit Instructions for Each Addressing Type ........................................................................... 417
18-3 Bit Manipulation Instructions for Each Addressing Type ........................................................ 418
18-4 Call Instructions and Branch Instructions for Each Addressing Type....................................419
- xviii -
CHAPTER 1 GENERAL
The µPD78214 sub-series is part of the 78K/II series of eight-bit single-chip microcomputers capable of accessing
an expanded memory space of 1 megabyte. This sub-series consists of the following products.
The µPD78214 offers a 16-KB masked ROM, 512-byte RAM, highly functional timers/counters, a high-precision A/
D converter, and two independent serial interfaces.
The µPD78212 is the same as the µPD78214 except that it offers an 8-KB ROM and 384-byte RAM.
The µPD78213 is the same as the µPD78214 except that it has no built-in ROM.
The µPD78P214 is the PROM version (used in place of masked ROM) of the µPD78214.
•µPD78P214DW: Programs can be written repeatedly (suitable for evaluating an application system).
• Others : A program can be written once (suitable for application systems produced in small lots).
The µPD78212(A), µPD78213(A), µPD78214(A), and µPD78P214(A) are the special quality versions of the µPD78212,
µ
PD78213, µPD78214, and µPD78P214, respectively.
PD78P214
µ
PD78P214(A)
µ
PROM 16K
RAM 512
PD78214
µ
PD78214(A)
µ
ROM 16K
RAM 512
PD78213
µ
PD78213(A)
µ
ROM-less
RAM 512
1
PD78212
µ
PD78212(A)
µ
This sub-series can be applied to the following:
Standard-quality products
°
• Printers
• Electronic typewriters
• Electronic cash registers (ECRs)
• Plain paper copiers (PPCs)
• Electronic musical instruments
• Air conditioners
• Cellular phones
• Cameras
Special-quality products
°
• Vehicle-mounted electrical equipment
• Combustion control
ROM 8K
RAM 384
1
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