NEC PD78081, PD78082 Service Manual

DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD78081(A), 78082(A)
8-BIT SINGLE-CHIP MICROCONTROLLER

DESCRIPTION

The µPD78081(A) and 78082(A) are members of the µPD78083 Subseries of the 78K/0 Series microcontrollers.
µ
These products are produced with a more stringent quality assurance program than that of the 78082 (standard models) (NEC classifies these products as “special products” by quality grade).
Besides a high-speed, high-performance CPU, these microcontrollers have on-chip ROM, RAM, I/O ports,
8-bit resolution A/D converter, timer, serial interface, interrupt control, and other peripheral hardware.
µ
PD78P083(A) including a one-time PROM version which can operate in the same power supply voltage
The
range as a mask ROM version, and various development tools are available.
PD78081 and
The details of the functions are described in the following User’s Manuals. Be sure to read the documents before starting design.
µ
PD78083 Subseries User’s Manual : IEU-1407
78K/0 Series User’s Manual Instructions : IEU-1372

FEATURES

Internal ROM and RAM
Item
Part Number
µ
PD78081(A) 8 Kbytes 256 bytes 44-pin plastic QFP (10 × 10 mm)
µ
PD78082(A) 16 Kbytes 384 bytes
Minimum instruction execution time can be changed from high-speed (0.4
Program Memory Data Memory
(ROM) (Internal High-speed RAM)
Package
µ
s) to low-speed (12.8 µs)
I/O ports: 33
8-bit resolution A/D converter : 8 channels
Serial interface : 1 channel
3-wire serial I/O/UART
mode : 1 channel
Timer : 3 channels
Supply voltage : VDD = 1.8 to 5.5 V

APPLICATION FIELDS

Controllers for automobile electronic control systems, gas detector circuit-breakers, various types of safety equipment, etc.
µ
In addition to the specified, however, the products, and their descriptions also apply to the
Document No. U12436EJ1V0DS00 (1st edition) Date Published July 1997 N Printed in Japan
PD78081(A) and 78082(A), this Data Sheet also describes the µPD78081(A2). Unless otherwise
µ
PD78081(A) and 78082(A) are used throughout this Data Sheet as the representative
µ
PD78081(A2).
The information in this document is subject to change without notice.
©
1997

ORDERING INFORMATION

Part Number Package
µ
PD78081GB(A)-×××-3B4 44-pin plastic QFP (10 × 10 mm)
µ
PD78081GB(A)-×××-3BS-MTX
µ
PD78082GB(A)-×××-3B4 44-pin plastic QFP (10 × 10 mm)
µ
PD78082GB(A)-×××-3BS-MTX
µ
PD78081GB(A2)-×××-3B4 44-pin plastic QFP (10 × 10 mm)
Note Under planning
Note
44-pin plastic QFP (10 × 10 mm)
Note
44-pin plastic QFP (10 × 10 mm)
µ
PD78081(A), 78082(A)
Caution
µ
PD78081GB(A) and 78082GB(A) have two kinds of package (Refer to 11. PACKAGE DRAWINGS).
Please consult NEC’s sales representative for the available package.
Remark ××× indicates ROM code suffix.

QUALITY GRADE

Special
Please refer to “Quality Grades on NEC Semiconductor Devices” (Document No. C11531E) published by NEC Corporation to know the specification of quality grade on the devices and its recommended applications.
DIFFERENCES BETWEEN µPD78081 AND 78082, AND µPD78081(A) AND 78082(A)
Part Number Item Quality grade Standard Special Package • 42-pin plastic shrink DIP (600 mil) 44-pin plastic QFP (10 × 10 mm)
• 44-pin plastic QFP (10 × 10 mm)
µ
PD78081, 78082
µ
PD78081(A), 78082(A)
DIFFERENCES BETWEEN µPD78081(A) AND 78081(A2)
Part Number Item Supply voltage VDD = 1.8 to 5.5 V VDD = 5 V ±10% Minimum instruction execution 0.4 µs (at 5 MHz) 0.57 µs (at 7 MHz)
time Operating ambient temperature TA = –40 to 85˚C TA = –40 to +125˚C
Remark In addition to the above parameters, the supply current also differs. For details, refer to 10. ELECTRICAL
SPECIFICATIONS.
µ
PD78081(A)
µ
PD78081(A2)
2
µ
PD78014
PD78002 PD78083
PD78002Y
100-pin
100-pin
100-pin
64-pin 64-pin 64-pin
42/44-pin
Control
Y subseries products are compatible with I
2
C bus.
A timer was added to the PD78054, and the external interface function was enhanced.
EMI noise reduction version of the PD78078.
ROM-less versions of the PD78078.
An A/D converter and 16-bit timer were added to the PD78002. An A/D converter was added to the PD78002. Basic subseries for control.
On-chip UART, capable of operating at a low voltage (1.8 V).
PD780018AY
100-pin Serial I/O of the PD78078Y was enhanced, and only selected functions are provided.
PD78078 PD78070A
PD78075B
PD78070AY
µ
µ
µµ
µ
µµ µ µµ
µ
µ
µ
µ
µ
µ
Inverter control
PD78096464-pin
µ
An A/D converter of the PD780924 was enhanced.
PD78078Y
µ
µ
PD78075BY
PD78018F
PD780001
PD78018FY PD78014Y
80-pin 80-pin
64-pin
78K/0
Series
Products in mass production
Products under development
EMI noise reduction version of the PD78054. UART and D/A converter were added to the PD78014, and I/O was enhanced.
Low-voltage (1.8 V) operation versions of the PD78014 with several ROM and RAM capacities available.
An A/D converter of the PD780024 was enhanced.
EMI noise reduction version of the PD78018F.
On-chip inverter control circuit and UART, EMI noise reduction version.
Serial I/O of the PD78018F was enhanced, EMI noise reduction version.
Serial I/O of the PD78054 was enhanced, EMI noise reduction version.
PD78005880-pin
µ
µµ
PD780034 PD780024
PD78014H
PD780034Y PD780024Y
64-pin 64-pin 64-pin
µµ µµ
µ
µ
µ
µ
µ
µ
µ
µ
µ
FIPTM drive
PD78044F
100-pin
80-pin 80-pin
µ
µ
The I/O and FIP C/D of the PD78044F were enhanced, Display output total: 53 The I/O and FIP C/D of the PD78044H were enhanced, Display output total: 48 N-ch open-drain input/output was added to the PD78044F, Display output total: 34 Basic subseries for driving FIP, Display output total: 34
µ µ
100-pin
PD78092464-pin
µ
PD780308 PD78064B PD78064
100-pin 100-pin 100-pin
µ
µ
SIO of the PD78064 was enhanced, and ROM and RAM were expanded. EMI noise reduction version of the PD78064. Basic subseries for driving LCDs, On-chip UART.
µ
PD780308Y
µ
PD78064Y
µ
LCD drive
µ
µ
LV
PD78P0914
64-pin
µ
On-chip PWM output, LV digital code decoder, Hsync counter.
PD78054
µ
PD78054Y
µ
PD78058FY
µ
PD780058Y
Note
µ
PD78058F
µ
PD78044H
µ
µ
PD780228
PD780208
µ
µ
µ
IEBusTM supported
PD78098B80-pin
µ
EMI noise reduction version of the PD78098. The IEBus controller was added to the PD78054.
PD7809880-pin
µ
µ
Meter control
PD780973
80-pin
µ
On-chip automobile meter driving controller/driver.
PD78081(A), 78082(A)

78K/0 SERIES DEVELOPMENT

The following shows the 78K/0 Series products development. Subseries names are shown inside frames.
Note Under planning
3
The following table shows the differences among subseries functions.
µ
PD78081(A), 78082(A)
Function ROM Timer 8-bit
Subseries Name
ControlµPD78075B
µ
PD78078
µ
PD78070A 61 2.7 V
µ
PD780058
µ
PD78058F
µ
PD78054
µ
PD780034
µ
PD780024 8ch
µ
PD78014H 2ch 53
µ
PD78018F
µ
PD78014
µ
PD780001 8 K 1ch 39
µ
PD78002
µ
PD78083 8ch 1ch (UART: 1ch) 33 1.8 V – InverterµPD780964 controlµPD780924 8ch – FIP drive
LCD drive
IEBus supportedµPD78098 Meter control LV
µ
PD780208
µ
PD780228
µ
PD78044H
µ
PD78044F
µ
PD780308
µ
PD78064B 32 K 2ch (UART: 1ch)
µ
PD78064
µ
PD78098B
µ
PD780973
µ
PD78P0914
Capacity 8-bit 16-bit Watch WDT A/D A/D D/A
32 K to 40 K 48 K to 60 K
24 K to 60 K 48 K to 60 K 16 K to 60 K 8 K to 32 K
8 K to 60 K 8 K to 32 K
8 K to 16 K
8 K to 32 K
32 K to 60 K 48 K to 60 K 32 K to 48 K 16 K to 40 K 48 K to 60 K
16 K to 32 K 40 K to 60 K 32 K to 60 K
24 K to 32 K 32 K 6ch 1ch 8ch – 2ch 54 4.5 V
4ch 1ch 1ch 1ch 8ch 2ch 3ch (UART: 1ch) 88 1.8 V
2ch 2ch
1ch 53
3ch Note 1ch 8ch 2ch (UART: 2ch) 47 2.7 V
2ch 1ch 1ch 1ch 8ch – 2ch 74 2.7 V – 3ch 1ch 72 4.5 V 2ch 1ch 1ch 68 2.7 V
2ch 1ch 1ch 1ch 8ch
2ch 1ch 1ch 1ch 8ch 2ch 3ch (UART: 1ch) 69 2.7 V
3ch 1ch 1ch 1ch 5ch – 2ch (UART: 1ch) 56 4.5 V
10-bit
8ch 3ch (UART: 1ch, 51 1.8 V
8-bit Serial Interface I/O VDD
3ch (time-division UART: 1ch) 3ch (UART: 1ch) 69 2.7 V
time-division 3-wire: 1ch)
2ch 3ch (time-division UART: 1ch)
MIN.
Value
68 1.8 V
2.0 V
2.7 V
57 2.0 V
External
Expansion
Available
Available
Available
Available
Available
Note 10-bit timer: 1 channel
4

OVERVIEW OF FUNCTION

µ
PD78081(A), 78082(A)
Part Number
Item
Internal memory
Memory space General registers Minimum instruction execution time
Instruction set
I/O ports
A/D converter Serial interface
Timer
Timer output Clock output
Buzzer output Vectored
interrupt sources
Supply voltage Operating ambient temperature Package
ROM Internal high-speed RAM
Maskable Non-maskable Software
µ
µ
PD78081(A)
8 Kbytes 256 bytes 64 Kbytes 8 bits × 32 registers (8 bits × 8 registers × 4 banks) On-chip minimum instruction execution time selective function
0.4 µs/0.8 µs/1.6 µs/3.2 µs/6.4 µs/12.8 µs (at main system clock of 5.0 MHz)
• 16-bit operation
• Multiply/divide (8 bits × 8 bits,16 bits ÷ 8 bits)
• Bit manipulation (set, reset, test, boolean operation)
• BCD adjustment, etc. Total : 33
• CMOS input : 01
• CMOS I/O : 32
8-bit resolution × 8 channels 3-wire serial I/O/UART mode selectable : 1 channel
• 8-bit timer/event counter : 2 channels
• Watchdog timer : 1 channel
2 (8-bit PWM output)
19.5 kHz, 39.1 kHz, 78.1 kHz, 156 kHz, 313 kHz, 625 kHz, 1.25 MHz, 2.5 MHz,
5.0 MHz (at main system clock of 5.0 MHz)
1.2 kHz, 2.4 kHz, 4.9 kHz, 9.8 kHz (at main system clock of 5.0 MHz)
Internal : 8, external : 3 Internal : 1 1
DD = 1.8 to 5.5 V
V
A = –40 to +85°C
T 44-pin plastic QFP (10 × 10 mm)
16 Kbytes 384 bytes
PD78082(A)
Caution The supply voltage and other parameters of the µPD78081(A2) differ from those of the other models.
µ
For details, refer to “DIFFERENCES BETWEEN
PD78081(A) AND 78081(A2)”.
5
µ
PD78081(A), 78082(A)
CONTENTS
1. PIN CONFIGURATION (Top View) ................................................................................................... 7
2. BLOCK DIAGRAM ............................................................................................................................. 9
3. PIN FUNCTIONS .............................................................................................................................. 10
3.1 Port Pins................................................................................................................................................... 10
3.2 Non-port Pins .......................................................................................................................................... 11
3.3 Pin I/O Circuits and Recommended Connection of Unused Pins ................................................... 12
4. MEMORY SPACE............................................................................................................................. 14
5. PERIPHERAL HARDWARE FUNCTIONS ...................................................................................... 15
5.1 Ports..........................................................................................................................................................15
5.2 Clock Generator ......................................................................................................................................16
5.3 Timer/Event Counter...............................................................................................................................16
5.4 Clock Output Control Circuit................................................................................................................. 18
5.5 Buzzer Output Control Circuit .............................................................................................................. 18
5.6 A/D Converter .......................................................................................................................................... 19
5.7 Serial Interface ........................................................................................................................................ 20
6. INTERRUPT FUNCTIONS ............................................................................................................... 21
7. STANDBY FUNCTION ..................................................................................................................... 24
8. RESET FUNCTION........................................................................................................................... 24
9. INSTRUCTION SET.......................................................................................................................... 25
10. ELECTRICAL SPECIFICATIONS.................................................................................................... 28
11. PACKAGE DRAWINGS ................................................................................................................... 49
12. RECOMMENDED SOLDERING CONDITIONS .............................................................................. 51
APPENDIX A. DEVELOPMENT TOOLS .............................................................................................. 52
APPENDIX B. RELATED DOCUMENTS .............................................................................................. 54
6

1. PIN CONFIGURATION (Top View)

44-pin plastic QFP (10 × 10 mm)
µ
PD78081GB(A)-×××-3B4
µ
PD78081GB(A)-×××-3BS-MTX
µ
PD78082GB(A)-×××-3B4
µ
PD78082GB(A)-×××-3BS-MTX
µ
PD78081GB(A2)-×××-3B4
P12/ANI2 P13/ANI3 P14/ANI4 P15/ANI5 P16/ANI6 P17/ANI7
P72/ASCK/SCK2
P71/T
X
D/SO2
X
D/SI2
P70/R P101/TI6/TO6 P100/TI5/TO5
Note
Note
P11/ANI1
44 43 42 41 40 39 38 37 36 35 34
1 2 3 4 5 6 7 8 9 10 11
12 13 14 15 16 17 18 19 20 21 22
SSAVREFAVDD
P10/ANI0
AV
VDDX1
X2ICRESET
NC
33 32 31 30 29 28 27 26 25 24 23
µ
PD78081(A), 78082(A)
P03/INTP3 P02/INTP2 P01/INTP1 P00 P37 P36/BUZ P35/PCL P34 P33 P32 NC
SS
P50
P51
P52
P53
P54
V
P55
P56
Note Under planning
Cautions 1. Connect IC (Internally Connected) pin directly to V
2. Connect AV
3. Connect AV
4. Connect NC (Non-connection) pin to V
DD pin to VDD. SS pin to VSS.
SS for noise protection (It can be left open).
P57
SS.
P30
P31
7
µ
PD78081(A), 78082(A)
ANI0 to ANI7 : Analog Input P100, P101 : Port10 ASCK : Asynchronous Serial Clock PCL : Programmable Clock
DD : Analog Power Supply RESET : Reset
AV
REF : Analog Reference Voltage RxD : Receive Data
AV
SS : Analog Ground SCK2 : Serial Clock
AV BUZ : Buzzer Clock SI2 : Serial Input IC : Internally Connected SO2 : Serial Output INTP1 to INTP3 : Interrupt from Peripherals TI5, TI6 : Timer Input NC : Non-connection TO5, TO6 : Timer Output P00 to P03 : Port0 TxD : Transmit Data P10 to P17 : Port1 V P30 to P37 : Port3 V
DD : Power Supply SS : Ground
P50 to P57 : Port5 X1, X2 : Crystal (Main System Clock) P70 to P72 : Port7
8

2. BLOCK DIAGRAM

µ
PD78081(A), 78082(A)
P100/TI5/TO5
P101/TI6/TO6
SI2/R
XD/P70 XD/P71
SO2/T
SCK2/ASCK/P72
ANI0/P10 to
ANI7/P17
AV
AVSS
AVREF
INTP1/P01 to
INTP3/P03
BUZ/P36
PCL/P35
8-bit TIMER/ EVENT COUNTER 5
8-bit TIMER/ EVENT COUNTER 6
WATCHDOG TIMER
SERIAL
INTERFACE 2
DD
A/D CONVERTER
INTERRUPT CONTROL
BUZZER OUTPUT
CLOCK OUTPUT CONTROL
78K/0
CPU
CORE
RAM
VDD VSS
ROM
IC
PORT 0
PORT 1
PORT 3
PORT 5
PORT 7
PORT 10
SYSTEM
CONTROL
P00 P01 to P03
P10 to P17
P30 to P37
P50 to P57
P70 to P72
P100, P101
RESET X1 X2
Remark The internal ROM and internal high-speed RAM capacities depend on the product.
9
µ
PD78081(A), 78082(A)

3. PIN FUNCTIONS

3.1 Port Pins

Pin Name Input/Output Function After Reset Shared by: P00 Input Port 0 Input only Input — P01 Input/output 4-bit input/output port Input/output is specifiable Input INTP1 P02 bit-wise. When used as the INTP2 P03 input port, it is possible to INTP3
connect a pull-up resistor by software.
P10 to P17 Input/output Port 1 Input ANI0 to ANI7
8-bit input/output port Input/output is specifiable bit-wise. When used as the input port, it is possible to connect
a pull-up resistor by software. P30 to P34 Input/output Port 3 Input — P35 8-bit input/output port PCL P36 Input/output is specifiable bit-wise. BUZ P37 When used as the input port, it is possible to connect
a pull-up resistor by software. P50 to P57 Input/output Port 5 Input
8-bit input/output port
Can drive up to seven LEDs directly.
Input/output is specifiable bit-wise.
When used as the input port, it is possible to connect
a pull-up resistor by software. P70 Input/output Port 7 Input SI2/RxD P71 3-bit input/output port SO2/TxD P72 Input/output is specifiable bit-wise. SCK2/ASCK
When used as the input port, it is possible to connect
a pull-up resistor by software. P100 Input/output Port 10 Input TI5/TO5 P101 2-bit input/output port TI6/TO6
Input/output is specifiable bit-wise.
When used as the input port, it is possible to connect
a pull-up resistor by software.
Note
Note When P10/ANI0 to P17/ANI7 pins are used as the analog inputs for the A/D converter, set the port 1 to the
input mode. The on-chip pull-up resistor is automatically disabled.
10
µ
PD78081(A), 78082(A)

3.2 Non-port Pins

Pin Name Input/Output Function After Reset Shared by: INTP1 Input External interrupt request input by which the active edge Input P01 INTP2 (rising edge, falling edge, or both rising and falling edges) can P02 INTP3 be specified. P03 SI2 Input Serial interface serial data input. Input P70/RxD SO2 Output Serial interface serial data output. Input P71/TxD SCK2 Input/Output Serial interface serial clock input/output. Input P72/ASCK RxD Input Asynchronous serial interface serial data input. Input P70/SI2 TxD Output Asynchronous serial interface serial data output. Input P71/SO2 ASCK Input Asynchronous serial interface serial clock input. Input P72/SCK2 TI5 Input External count clock input to 8-bit timer (TM5). Input P100/TO5 TI6 External count clock input to 8-bit timer (TM6). P101/TO6 TO5 Output 8-bit timer (TM5) output. Input P100/TI5 TO6 8-bit timer (TM6) output. P101/TI6 PCL Output Clock output. (for main system clock trimming) Input P35 BUZ Output Buzzer output. Input P36 ANI0 to ANI7 Input A/D converter analog input. Input P10 to P17 AV
REF Input A/D converter reference voltage input.
AV
DD A/D converter analog power supply. Connected to VDD.——
AV
SS A/D converter ground potential. Connected to VSS.—
RESET Input System reset input. — X1 Input Main system clock oscillation crystal connection. — X2 —— V
DD Positive power supply.
V
SS Ground potential.
IC Internal connection. Connect directly to V NC Does not internally connected. Connect to V
(It can be left open)
SS.—
SS.—
11
µ
PD78081(A), 78082(A)

3.3 Pin I/O Circuits and Recommended Connection of Unused Pins

The input/output circuit type of each pin and recommended connection of unused pins are shown in Table 3-1. For the input/output circuit configuration of each type, refer to Figure 3-1.
Table 3-1. Input/Output Circuit Type of Each Pin
Pin Name I/O Recommended Connection for Unused Pins
P00 2 Input Connect to VSS. P01/INTP1 8-A Input/output Connect to VSS via a resistor individually. P02/INTP2 P03/INTP3 P10/ANI0 to P17/ANI7 11 Input/output Connect to VDD or VSS via a resistor individually. P30 to P32 5-A P33, P34 8-A P35/PCL 5-A P36/BUZ P37 P50 to P57 5-A P70/SI2/RxD 8-A P71/SO2/TxD 5-A P72/SCK2/ASCK 8-A P100/TI5/TO5 8-A P101/TI6/TO6 RESET 2 Input — AVREF Connect to VSS. AVDD Connect to VDD. AVSS Connect to VSS. IC Connect directly to VSS. NC Connect to VSS (It can be left open).
Input/Output Circuit Type
12
Figure 3-1. Pin Input/Output Circuits
µ
PD78081(A), 78082(A)
Type 2
IN
Schmitt-triggered input with hysteresis characteristic
V
Type 5-A
pullup enable
V
data
output disable
DD
P-ch
DD
P-ch
N-ch
input enable
IN/OUT
Type 8-A
pullup enable
data
output disable
Type 11
pullup
enable
data
output disable
Comparator
input enable
P-ch
+
V
N-ch
REF
(threshold voltage)
V
DD
P-ch
N-ch
V
V
P-ch
N-ch
DD
P-ch
DD
V
IN/OUT
DD
P-ch
IN/OUT
13

4. MEMORY SPACE

The memory map of the µPD78081(A) and 78082(A) is shown in Figure 4-1.
Figure 4-1. Memory Map
FFFFH
Special function registers
(SFR) 256 × 8 bits
FF00H
Data memory space
mmmmH – 1
Program memory space
FEFFH
FEE0H FEDFH
mmmmH
nnnnH + 1
nnnnH
0000H
General-purpose registers
32 × 8 bits
Internal high-speed RAM
Use prohibited
Internal ROM
Note
Note
nnnnH
1000H
0FFFH
0800H
07FFH
0080H 007FH
0040H 003FH
0000H
µ
PD78081(A), 78082(A)
Program area
CALLF entry area
Program area
CALLT table area
Vector table area
Note The internal ROM and internal high-speed RAM capacities depend on the product (See the following table).
Part Number
µ
PD78081(A) 1FFFH FE00H
µ
PD78082(A) 3FFFH FD80H
Internal ROM Last Address Internal High-speed RAM Start Address
nnnnH mmmmH
14

5. PERIPHERAL HARDWARE FUNCTIONS

5.1 Ports

Input/output ports are classified into two types.
• CMOS input (P00) : 1
• CMOS input/output (P01 to P03, Port 1, Port 3, Port 5, Port 7, Port 10) : 32 Total : 33
Table 5-1. Functions of Ports
Port Name Pin Name Function
Port 0 P00 Input only.
P01 to P03 Input/output port. Input/output can be specified bit-wise.
When used as an input port, on-chip pull-up resistor can be used by software.
Port 1 P10 to P17 Input/output port. Input/output can be specified bit-wise.
When used as an input port, on-chip pull-up resistor can be used by software.
Port 3 P30 to P37 Input/output port. Input/output can be specified bit-wise.
When used as an input port, on-chip pull-up resistor can be used by software.
Port 5 P50 to P57 Input/output port. Input/output can be specified bit-wise.
When used as an input port, on-chip pull-up resistor can be used by software. LED can be driven directly up to 7 pins.
Port 7 P70 to P72 Input/output port. Input/output can be specified bit-wise.
When used as an input port, on-chip pull-up resistor can be used by software.
Port 10 P100, P101 Input/output port. Input/output can be specified bit-wise.
When used as an input port, on-chip pull-up resistor can be used by software.
µ
PD78081(A), 78082(A)
15

5.2 Clock Generator

Main system clock generator is incorporated. It is possible to change the minimum instruction execution time.
µ
• 0.4
s/0.8 µs/1.6 µs/3.2 µs/6.4 µs/12.8 µs (at main system clock frequency of 5.0 MHz)
Figure 5-1. Clock Generator Block Diagram
X1
X2
Main system clock oscillator
STOP
fX
Division circuit
fXX
Selector
fX 2
Prescaler
f
XX
XX
f
2
2
2
µ
PD78081(A), 78082(A)
Prescaler
Clock to peripheral
XX
f
f
XX
3
4
2
2
Standby control circuit
Selector
hardware
CPU clock (f
CPU)

5.3 Timer/Event Counter

There are the following three timer/event counter channels:
• 8-bit timer/event counter : 2 channels
• Watchdog timer : 1 channel
Table 5-2. Types and Functions of Timer/Event Counters
8-bit Timer/Event Counter 5, 6 Watchdog Timer
Type Interval timer 2 channels 1 channel
External event counter 2 channels
Function Timer output 2 outputs
PWM output 2 outputs — Square wave output 2 outputs — Interrupt request 2 1
16
µ
f
XX
f
XX
5
f
XX
6
f
XX
7
2
f
XX
8
2
f
XX
9
2
f
XX
11
2
INTWDT maskable interrupt request
RESET
INTWDT non-maskable interrupt request
Prescaler
Selector
Control
circuit
4
22 2
8-bit counter
f
XX
3
2
PD78081(A), 78082(A)
Figure 5-2. 8-Bit Timer/Event Counter 5, 6 Block Diagram
Internal bus
8-bit compare register
(CRn0)
2fXX to fXX/2
fXX/2
TI5/P100/TO5,
TI6/P101/TO6
n = 5, 6
Match
9
11
8-bit timer register n
(TMn)
OVF
Output control circuit
INTTMn
TO5/P100/TI5, TO6/P101/TI6
Selector
Clear
Internal bus
Figure 5-3. Watchdog Timer Block Diagram
17
µ
PD78081(A), 78082(A)

5.4 Clock Output Control Circuit

This circuit can output clocks of the following frequencies:
• 19.5 kHz/39.1 kHz/78.1 kHz/156 kHz/313 kHz/625 kHz/1.25 MHz/2.5 MHz/5.0 MHz (at main system clock frequency of 5.0 MHz)
Figure 5-4. Clock Output Control Circuit Block Diagram
fXX
fXX/2
2
f
XX/2
3
fXX/2 fXX/2 fXX/2 fXX/2 fXX/2
4
5
6
7
Selector
Synchronization circuit
Output control circuit
PCL/P35

5.5 Buzzer Output Control Circuit

This circuit can output clocks of the following frequencies that can be used for driving buzzers:
• 1.2 kHz/2.4 kHz/4.9 kHz/9.8 kHz (at main system clock frequency of 5.0 MHz)
f
XX/2
fXX/2 fXX/2
Figure 5-5. Buzzer Output Control Circuit Block Diagram
9
10
11
Selector
Output control circuit
BUZ/P36
18
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