PRELIMINARY DATA SHEET
N-CHANNEL GaAs MES FET
NES1823P-50
50 W L-BAND PUSH-PULL POWER GaAs MES FET
DESCRIPTION
The NES1823P-50 is a 50 W push-pull type GaAs MES FET designed for high power transmitter applications for
PCS, DCS, PHS, and IMT2000 base station systems. It is capable of delivering 50 W of output power (CW) with high
linear gain, high efficiency and excellent distortion. Its primary band is 1.8 to 2.3 GHz, however with different
matching, 60 MHz or less of instantaneous bandwidth can be achieved anywhere from 0.8 to 2.3 GHz. The device
employs 0.9 µm Tungsten Silicide gates, via holes, plated heat sink, and silicon dioxide passivation for superior
performance, thermal characteristics, and reliability.
Reliability and performance uniformity are assured by NEC’s stringent quality and control procedures.
FEATURES
• Push-pull type N-channel GaAs MES FET
• High output power: P
• High linear gain: GL = 10.5 dB TYP.
• High power added efficiency:
out
= 50 W TYP.
η
add
= 40 % TYP. @ VDS = 10.0 V, I
ORDERING INFORMATION (PLAN)
Part Number Package Supplying Form
NES1823P-50 T-86 ESD protective envelope
Remark
To order evaluation samples, consult your NEC sales representative.
Dset
= 4.0 A (total), f = 2.20 GHz
Caution Please handle this device at static-free workstation, because this is an electrostatic
sensitive device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P14996EJ1V0DS00 (1st edition)
Date Published July 2000 NS CP(K)
Printed in Japan
2000
ABSOLUTE MAXIMUM RATINGS (Unless otherwise specified, TA = +25 °°°°C)
Operation in excess of any one of these parameters may result in permanent damage.
Parameter Symbol Ratings Unit
NES1823P-50
Drain to Source Voltage V
Gate to Source Voltage V
Gate to Drain Voltage V
Drain Current I
Gate Current I
Total Power Dissipation
Channel Temperature T
Storage Temperature T
C
= +25 °C
T
Note
DS
GSO
GDO
D
G
Note
tot
P
ch
stg
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Test Conditions MIN. TYP. MAX. Unit
Drain to Source Voltage V
Gain Compression Gcomp
Channel Temperature T
Set Drain Current I
Gate Resistance
DS
ch
Dset
VDS = 10.0 V, RF OFF
Note
g
R
15 V
−
7V
−
18 V
30 A
200 mA
110 W
175
−
65 to +175
°
C
°
C
−−
−−
−−
−
4.0 7.0 A
−−
10.0 V
3.0 dB
+150
20
°
C
Ω
g
is the series resistance between the gate supply and the FET gate.
R
Note
ELECTRICAL CHARACTERISTICS (TA = +25 °°°°C)
Parameter Symbol Test Conditions MIN. TYP. MAX. Unit
Saturated Drain Current I
Pinch-off Voltage V
Thermal Resistance R
Output Power P
Drain Current I
Power Added Efficiency
Linear Gain
3rd Order Intermodulation Distortion IM
Dset
= 2.0 A each drain
Notes 1.
I
Pin = 22 dBm
2.
DSS
VDS = 2.5 V, VGS = 0 V
p
VDS = 2.5 V, ID = 130 mA
th
Channel to Case
out
f = 2.20 GHz, VDS = 10.0 V, 46.0 47.0
D
Pin = 39.5 dBm, Rg = 20 Ω,
Dset
I
η
add
Note 2
L
G
3
= 4.0 A Total (RF OFF)
∆
f = 5 MHz,
out
P
= 39 dBm (2 tones total)
Note 1
−
−
4.0
−
−
−
30.0
−
2.6
1.0 1.5
12.5 16.0 A
40
9.5 10.5
−−36−
−
−
−
−
−
A
V
°
C/W
dBm
%
dB
dBc
2
Preliminary Data Sheet P14996EJ1V0DS00
TYPICAL CHARACTERISTICS (TA = +25 °°°°C)
NES1823P-50
OUTPUT POWER, POWER ADDED
EFFICIENCY vs. INPUT POWER
50
45
40
(dBm)
out
35
30
Output Power P
25
20
Remark
2015 25 30 35 40 45
The graphs indicate nominal characteristics.
P
out
η
add
VDS = 10.0 V
f = 2.20 GHz (1 tone)
Dset
= 4.0 A (RF OFF)
I
g
= 20 Ω
R
Input Power Pin (dBm)
70
60
(%)
add
η
50
(A)
D
40
30
Drain Current I
20
Power Added Efficiency
10
DRAIN CURRENT, GATE CURRENT
vs. INPUT POWER
14
VDS = 10.0 V
f = 2.20 GHz (1 tone)
12
Dset
= 4.0 A (RF OFF)
10
I
g
= 20 Ω
R
8
6
4
2
0
2015 25 30 35 40 45
Input Power Pin (dBm)
D
I
I
G
80
60
40
20
0
–20
–40
–60
(mA)
G
Gate Current I
Preliminary Data Sheet P14996EJ1V0DS00
3