MXIC MX23L8100PC-15, MX23L8100RC-15, MX23L8100TI-10, MX23L8100YC-10, MX23L8100MC-10 Datasheet
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MX23L8100
NC
A16
A15
A14
A13
A12
A11
A10
A9
A8
NC
VSS
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
VSS
VSS
D15
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
NC
D11
D3
D10
D2
D9
D1
D8
D0
OE
VSS
VSS
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
MX23L8100
(Normal T ype)
8M-BIT MASK ROM(8/16 BIT OUTPUT)
FEATURES
• Bit organization
- 1M x 8 (byte mode)
- 512K x 16 (word mode)
• Fast access time
- Random access: 100ns (max.)
• Current
- Operating: 20mA
- Standby: 5uA
• Supply voltage
- 3.3V±10%
• Package
- 44 pin SOP (500mil)
- 42 pin PDIP (600mil)
- 48 pin TSOP (type 1)
- 44 pin TSOP (type 2)
ORDER INFORMATION
Part No. Access Time Package
MX23L8100MC-10 100ns 44 pin SOP
MX23L8100MC-12 120ns 44 pin SOP
MX23L8100MC-15 150ns 44 pin SOP
MX23L8100PC-10 100ns 42 pin PDIP
MX23L8100PC-12 120ns 42 pin PDIP
MX23L8100PC-15 150ns 42 pin PDIP
MX23L8100TC-10 100ns 48 pin TSOP*
MX23L8100TC-12 120ns 48 pin TSOP
MX23L8100TC-15 150ns 48 pin TSOP
MX23L8100RC-10 100ns 48 pin RTSOP*
MX23L8100RC-12 120ns 48 pin RTSOP
MX23L8100RC-15 150ns 48 pin RTSOP
MX23L8100YC-10 100ns 44 pin TSOP
MX23L8100YC-12 120ns 44 pin TSOP
MX23L8100TI-10 100ns 48 pin TSOP*
Note: 1.48-TSOP and 48-RTSOP support word mode only,
PIN CONFIGURATION
not for byte mode.
2.MX23L8100TI-10 is for industrial grade, temperature -40~85°C
44 SOP/44TSOP
NC
2
A18
3
A17
4
A7
5
A6
6
A5
7
A4
8
A3
9
A2
10
A1
11
A0
12
CE
13
VSS
14
OE
15
D0
16
D8
17
D1
18
D9
19
D2
20
D10
21
D3
22
D11
P/N:PM0464 REV. 1.7,AUG. 20, 2001
44
43
42
41
40
39
38
37
36
35
34
33
32
MX23L8100
31
30
29
28
27
26
25
24
23
NC
NC
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
42 PDIP
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
VSS
OE
D0
D8
D1
D9
D2
D10
D3
D11
48 TSOP (for wor d mode only)
NC
MX23L8100
42
A8
41
A9
40
A10
39
A11
38
A12
37
A13
36
A14
35
A15
34
A16
33
BYTE
32
VSS
31
D15/A-1
30
D7
29
D14
28
D6
27
D13
26
D5
25
D12
24
D4
23
VCC
22
48 Reverse TSOP (for wo rd mode only)
48
VSS
47
VSS
46
D15
45
D7
44
D14
43
D6
42
D13
41
D5
40
D12
39
D4
38
VCC
VCC
D11
D10
VSS
VSS
37
36
NC
35
34
D3
33
32
D2
31
D9
30
D1
29
D8
28
D0
27
OE
26
25
MX23L8100
(Reverse Type)
1
NC
2
A16
3
A15
4
A14
5
A13
6
A12
7
A11
8
A10
9
A9
10
A8
11
NC
12
VSS
13
NC
14
A18
15
A17
16
A7
17
A6
18
A5
19
A4
20
A3
21
A2
22
A1
23
A0
24
CE
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
MX23L8100
PIN DESCRIPTION
Symbol Pin Function
A0~A18 Address Inputs
D0~D14 Data Outputs
D15/A-1 D15(Word Mode)/LSB Address (Byte
Mode)
CE Chip Enable Input
OE Output Enab le Input
Byte Word/Byte Mode Selection
VCC Po wer Supply Pin
VSS Ground Pin
NC No Connection
BLOCK DIAGRAM
A0
A18
Address
Buffer
Memory
Array
MODE SELECTION
CE OE Byte D15/A-1D0~D7 D8~D15 Mode Power
H X X X High Z High Z - Stand-by
L H X X High Z High Z - Active
L L H Output D0~D7 D8~D15 Word Active
L L L Input D0~D7 High Z Byte Active
Page
Buffer
Word/
Byte
Output
Buffer
D0
D15/(D7)
CE
BYTE
OE
ABSOLUTE MAXIMUM RATINGS
Item Symbol Ratings
V oltage on any Pin Relativ e to VSS VIN -1.3V to VCC+2.0V (Note)
Ambient Operating Temperature T opr 0°C to 70°C
Storage T emperature Tstg -65°C to 125°C
Note: Minimum DC v oltage on input or I/O pins is -0.5V.
During voltage transitions, inputs may undershoot VSS
to -1.3V for periods of up to 20ns. Maximum DC voltage
on input or I/O pins is VCC+0.5V. During v oltage transitions, input may overshoot VCC to VCC+2.0V for periods of up to 20ns.
P/N:PM0464
REV. 1.7, AUG. 20, 2001
2
MX23L8100
Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
DOUT
C<100pF
IOL (load)=1.6mA
IOH (load)=-0.4mA
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.3V±10%)
Item Symbol MIN. MAX. Conditions
Output High Voltage VOH 24V - IOH = -0.4mA
Output Low Voltage VOL - 0.4V IOL = 1.6mA
Input High Voltage VIH 2.2V VCC+0.3V
Input Low Voltage VIL -0.3V 0.8V
Input Leakage Current ILI - 5uA 0V, VCC
Output Leakage Current ILO - 5uA 0V , VCC
Operating Current ICC1 - 20mA f=10MHz, all output open
Standby Current (TTL) ISTB1 - 1mA CE=VIH
Standby Current (CMOS) ISTB2 - 5uA CE> VCC - 0.2V
Input Capacitance CIN - 10pF Ta = 25°C, f = 1MHZ
Output Capacitance COUT - 10pF Ta = 25°C, f = 1MHZ
AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.3V±10%)
Item Symbol 23L8100-10 23L8100-12 23L8100-15
MIN. MAX. MIN. MAX. MIN. MAX.
Read Cycle Time tRC 100ns - 120ns - 150ns Address Access Time tAA - 100ns - 120ns - 150ns
Chip Enable Access Time tACE - 100ns - 120ns - 150ns
Output Enable Time tOE - 50ns - 60ns - 70ns
Output Hold After Address tOH 0ns - 0ns - 0ns Output High Z Delay tHZ - 20ns - 20ns - 20ns
Note:Output high-impedance delay (tHZ) is measured
from OE or CE going high, and this parameter guaranteed by design over the full v oltage and temperature operating range - not tested.
AC T est Conditions
Input Pulse Levels 0.4V~2.4V
Input Rise and Fall Times 10ns
Input Timing Level 1.4V
Output Timing Level 1.4V
Output Load See Figure
P/N:PM0464
REV. 1.7, AUG. 20, 2001
3
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