FEA TURES
MX23L3222
32M-BIT MASK ROM (16/32 BIT OUTPUT)
• Bit organization
- 2M x 16 (word mode)
- 1M x 32 (double word mode)
• Fast access time
- Random access: 100ns (max.)
- Page access: 30ns (max.)
• Page
- 8 double words per page
PIN CONFIGURATION
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
MX23L3222
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
VCC
D16
D17
VSS
VCC
D18
D19
D20
D21
VSS
VCC
D22
D23
VSS
A10
A11
A12
A0
2
A1
3
A2
4
A3
5
A4
6
A5
7
8
D0
9
10
D1
11
12
13
14
D2
15
16
D3
17
18
D4
19
20
D5
21
22
23
24
D6
25
26
D7
27
28
29
A6
30
A7
31
A8
32
A9
33
34
35
NC
NC
NC
WORD
OE
CE
VSS
D31/A-1
D15
D30
D14
VSS
VCC
D29
D13
D28
D12
D27
D11
D26
D10
VSS
VCC
D25
D9
D24
D8
VCC
A19
A18
A17
A16
A15
A14
A13
• Current
- Operating:60mA
- Standby:50uA
• Supply voltage
- 3.3V±10%
• Package
- 70 pin SSOP (500mil)
PIN DESCRIPTION
Symbol Pin Function
A0~A19 Address Inputs
D0~D30 Data Outputs
D31/A-1 D15 (Word Mode)/ LSB Address
(Byte Mode)
CE Chip Enable Input
OE Output Enab le Input
WORD Double W ord/ Word Mode Selection
VCC Po wer Supply Pin
VSS Ground Pin
NC No Connection
ORDER INFORMATION
Part No. Access Page Access Package
Time Time
MX23L3222MC-10 100ns 30ns 70 pin SSOP
MX23L3222MC-12 120ns 45ns 70 pin SSOP
P/N:PM0396 REV. 2.0, OCT. 19, 2001
1
MX23L3222
MODE SELECTION
CE OE WORD D31/A-1 D0~D15 D16~D31 Mode Power
H X X X High Z High Z - Stand-by
L H X X High Z High Z - Active
L L H Output D0~D15 D16~D31 Double W ord Active
L L L Input D0~D15 High Z Word Active
BLOCK DIAGRAM
A0/(A-1)
A2
A3
A19
Address
Buffer
Memory
Array
Page
Buffer
Page
Decoder
Word/
Byte
Output
Buffer
D31/(D15)
D0
CE
BYTE
OE
P/N:PM0396
REV. 2.0, OCT. 19, 2001
2