MX23L1611
3.3 Volt 16-Mbit (2M x 8 / 1M x 16) Mask ROM with Page Mode
FEATURES
• Bit organization
- 2M x 8 (byte mode)
- 1M x 16 (word mode)
• Fast access time
- Random access: 100ns (max.)
- Page access: 30ns (max.)
• Page Size
- 8 words per page
• Current
- Operating:40mA
- Standby:15uA
• Supply voltage
- 100ns @3.0V ~ 3.6V
- 120ns @2.7V ~ 3.6V
• Package
- 44 pin SOP (500mil)
- 48 pin TSOP (12mm x 20mm)
PIN CONFIGURATION
44 SOP
NC
A18
A17
CE
VSS
OE
D10
D11
2
3
4
A7
5
A6
6
A5
7
A4
8
A3
9
A2
10
A1
11
A0
12
13
14
15
D0
16
D8
17
D1
18
D9
19
D2
20
21
D3
22
44
43
42
41
40
39
38
37
36
35
34
33
32
MX23L1611
31
30
29
28
27
26
25
24
23
NC
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
ORDER INFORMATION
Part No. AccessPage Access Package
Time Time
MX23L1611MC-10 100ns 30ns 44 pin SOP
MX23L1611MC-12 120ns 50ns 44 pin SOP
MX23L1611MI-12* 120ns 50ns 44 pin SOP
MX23L1611TC-10 100ns 30ns 48 pin TSOP
MX23L1611TC-12 120ns 50ns 48 pin TSOP
MX23L1611TI-12* 120ns 50ns 48 pin TSOP
*Note: Industrial grade's temperature is -40°C~85°C
PIN DESCRIPTION
Symbol Pin Function
A0~A19 Address Inputs
D0~D14 Data Outputs
D15/A-1 D15 (Word Mode)/ LSB Address
(Byte Mode)
CE Chip Enable Input
OE Output Enab le Input
Byte Word/ Byte Mode Selection
VCC Po wer Supply Pin
VSS Ground Pin
NC No Connection
MODE SELECTION
CE OE Byte D15/A-1 D0~D7 D8~D15 Mode Power
H X X X High Z High Z - Stand-by
L H X X High Z High Z - Active
L L H Output D0~D7 D8~D15 Word Active
L L L Input D0~D7 High Z Byte Active
P/N:PM0449 REV. 1.8, JUL. 18, 2001
1
48 TSOP (Normal T ype)
MX23L1611
BYTE
VSS
BLOCK DIAGRAM
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
MX23L1611
(Normal T ype)
48
VSS
47
VSS
46
D15/A-1
45
D7
44
D14
43
D6
42
D13
41
D5
40
D12
39
D4
38
VCC
37
VCC
36
NC
35
D11
34
D3
33
D10
32
D2
31
D9
30
D1
29
D8
28
D0
27
OE
26
VSS
25
VSS
A0/(A-1)
A2
A3
Address
Buffer
Memory
Array
Page
Buffer
Page
Decoder
Word/
Byte
A19
CE
BYTE
OE
Note: Chip Enable active low input activates the chip's control logic, Address buffer and Page buffer.
Output
Buffer
D0
D15/(D7)
P/N:PM0449
REV. 1.8, JUL. 18, 2001
2
MX23L1611
ABSOLUTE MAXIMUM RATINGS
Item Symbol Ratings
V oltage on any Pin Relativ e to VSS VIN -1.3V to VCC+2.0V (Note)
Ambient Operating Temperature T opr -40°C to 85°C
Storage T emperature Tstg -65°C to 125°C
Note: Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs ma y undershoot VSS to
-1.3V for periods of up to 20ns. Maximum DC voltage on input or I/O pins is VCC+0.5V. During voltage
transitions, input may ov ershoot VCC to VCC+2.0V for periods of up to 20ns.
DC CHARACTERISTICS (Ta = -10°C ~ 70°C, VCC = 3.0V~3.6V)
Item Symbol MIN. MAX. Conditions
Output High Voltage V OH 2.4V - IOH = -0.4mA
Output Low Voltage VOL - 0.4V IOL = 1.6mA
Input High Voltage VIH 2.2V VCC+0.3V
Input Low Voltage VIL -0.3V 0.2 x VCC
Input Leakage Current ILI - 5uA 0V , VCC
Output Leakage Current ILO - 5uA 0V, VCC
Operating Current ICC1 - 40mA tRC = 100ns, all output open
Standby Current (TTL) ISTB1 - 1mA CE = VIH
Standby Current (CMOS) ISTB2 - 15uA CE>VCC-0.2V
Input Capacitance CIN - 10pF Ta = 25°C, f = 1MHZ
Output Capacitance COUT - 10pF Ta = 25°C, f = 1MHZ
AC CHARACTERISTICS (Ta = -10°C ~ 70°C, VCC = 3.0V~3.6V)
Item Symbol 23L1611-10 23L1611-12
MIN. MAX. MIN. MAX.
Read Cycle Time tRC 100ns - 120ns Address Access Time tAA - 100ns - 120ns
Chip Enable Access Time tACE - 100ns - 120ns
Page Mode Access Time tPA - 30ns - 50ns
Output Enable Time tOE - 30ns - 50ns
Output Hold After Address tOH 0ns - 0ns Output High Z Delay tHZ - 20ns - 20ns
Note:Output high-impedance delay (tHZ) is measured
from OE or CE going high, and this parameter guaranteed by design over the full v oltage and temperature operating range - not tested.
P/N:PM0449
3
REV. 1.8, JUL. 18, 2001