MXIC MX23C8100TC-15, MX23C8100TC-10, MX23C8100PC-15, MX23C8100PC-12, MX23C8100MC-15 Datasheet

MX23C8100

8M-BIT MASK ROM (8/16 BIT OUTPUT)

FEATURES

• Bit organization

- 1M x 8 (byte mode)

- 512K x 16 (word mode)

• Fast access time

- Random access: 100ns (max.)

• Current

- Operating: 60mA

- Standby: 50uA

• Supply voltage

- 5V±10%

• Package

- 44 pin SOP (500mil)

- 42 pin PDIP (600mil)

- 48 pin TSOP (20mm x 12mm)

PIN CONFIGURATION

A18

42 PDIP

CE/CE

OE/OE

A17

VSS

D10

D11

1 2

A7

3

A6

4

A5

5

A4

6

A3

7

A2

8

A1

9

A0

10 11 12 13

D0

14

D8

15

D1

16

D9

17

D2

18 19

D3

20 21

NC

42

A8

41

A9

40

A10

39

A11

38

A12

37

A13

36

A14

35

A15

34

A16

33

BYTE

32

VSS

31

D15/A-1

30

MX23C8100

D7

29

D14

28

D6

27

D13

26

D5

25

D12

24

D4

23

VCC

22

ORDER INFORMATION

Part No. Access Time Package

MX23C8100PC-10 100ns 42 pin PDIP MX23C8100PC-12 120ns 42 pin PDIP MX23C8100PC-15 150ns 42 pin PDIP MX23C8100MC-10 100ns 44 pin SOP MX23C8100MC-12 120ns 44 pin SOP MX23C8100MC-15 150ns 44 pin SOP MX23C8100TC-10 100ns 48 pin TSOP MX23C8100TC-12 120ns 48 pin TSOP MX23C8100TC-15 150ns 48 pin TSOP

Note: 40-TSOP and 48-R TSOP support word mode only , not for byte mode.

PIN DESCRIPTION

Symbol Pin Function

A0~A18 Address Inputs D0~D14 Data Outputs D15/A-1 D15 (Word Mode)/ LSB Address

(Byte Mode) CE/CE Chip Enable Input OE/OE Output Enable Input Byte Word/ Byte Mode Selection VCC Po wer Supply Pin VSS Ground Pin NC No Connection

44 SOP

NC A18 A17

CE/CE

VSS

OE/OE

D0

D8

D1

D9

D2

D10

D3

D11

2 3 4

A7

5

A6

6

A5

7

A4

8

A3

9

A2

10

A1

11

A0

12 13 14 15 16 17 18 19 20 21 22

44

NC

43

NC

42

A8

41

A9

40

A10

39

A11

38

A12

37

A13

36

A14

35

A15

34

A16

33

BYTE

32

MX23C8100

VSS

31

D15/A1

30

D7

29

D14

28

D6

27

D13

26

D5

25

D12

24

D4

23

VCC

48 TSOP (for wor d mode only)

1

NC

2

A16

3

A15

4

A14

5

A13

6

A12

7

A11

8

A10

9

A9

10

A8

11

NC

12

VSS

CE/CE

13

NC

14

A18

15

A17

16

A7

17

A6

18

A5

19

A4

20

A3

21

A2

22

A1

23

A0

24

MX23C8100

48

VSS

47

VSS

46

D15/A-1

45

D7

44

D14

43

D6

42

D13

41

D5

40

D12

39

D4

38

VCC

37

VCC

36

NC

35

D11

34

D3

33

D10

32

D2

31

D9

30

D1

29

D8

28

D0

27

OE/OE

26

VSS

25

VSS

P/N:PM0138 REV. 4.5, JUL. 16, 2001

1

MX23C8100

MODE SELECTION

CE/CE OE/OE Byte D15/A-1 D0~D7 D8~D15 Mode Po wer

L/H X X X High Z High Z - Stand-by H/L L/H X X High Z High Z - Active H/L H/L H Output D0~D7 D8~D15 Word Active H/L H/L L Input D0~D7 High Z Byte Active

BLOCK DIAGRAM

A0/(A-1)

A18

CE

BYTE

OE

Address

Buffer

Memory

Array

Sense

Amplifier

Word/

Byte

ABSOLUTE MAXIMUM RATINGS

Item Symbol Ratings

V oltage on any Pin Relativ e to VSS VCC -0.5V to 7.0V Ambient Operating Temperature T opr 0°C to 70°C Storage T emperature Tstg -65°C to 125°C

Note: minimum DC v oltage on input or I/O pins is -0.5V. During voltage transitions, inputs may undershoot VSS to -2.0V for periods of up to 20ns. Maximum DC voltage on input or I/ O pins is VCC+0.5V. During voltage transitions, input may overshoot VCC to VCC+2.0V for periods of up to 20ns.

Output

Buffer

D0

D15/(D7)

P/N:PM0138

REV. 4.5, JUL. 16, 2001

2

MX23C8100

DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 5V±10%)

Item Symbol MIN. MAX. Conditions

Output High Voltage VOH 2.4V - IOH = -1.0mA Output Low Voltage VOL - 0.4V IOL = 2.1mA Input High Voltage VIH 2.2V VCC+0.3V Input Low Voltage VIL -0.3V 0.8V Input Leakage Current ILI - 10uA 0V, VCC Output Leakage Current ILO - 10uA 0V , VCC Operating Current ICC1 - 60mA tRC=100ns, all output open Standby Current (TTL) ISTB1 - 1mA CE=VIH Standby Current (CMOS) ISTB2 - 50uA CE> VCC - 0.2V Input Capacitance CIN - 10pF Ta = 25°C, f = 1MHZ Output Capacitance COUT - 10pF Ta = 25°C, f = 1MHZ

AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 5V±10%)

Item Symbol 23C8100-10 23C8100-12 23C8100-15

MIN. MAX. MIN. MAX. MIN. MAX.

Read Cycle Time tR C 100ns - 120ns - 150ns Address Access Time tAA - 100ns - 120ns - 150ns Chip Enable Access Time tACE - 100ns - 120ns - 150ns Output Enable Time tOE - 50ns - 60ns - 70ns Output Hold After Address tOH 0ns - 0ns - 0ns Output High Z Delay tHZ - 20ns - 20ns - 20ns

Note:Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by design over the full voltage and temperature operating range not tested.

P/N:PM0138

REV. 4.5, JUL. 16, 2001

3