MX23C4100
4M-BIT [512K x 8/256K x 16] MASK ROM
FEATURES
•Switchable organization
-512K x 8 (byte mode)
-256K x 16 (word mode)
•Single +5V power supply
•Fast access time:100/120/150ns
GENERAL DESCRIPTION
•Totally static operation
•Completely TTL compatible
•Operating current: 60mA
•Standby current: 100uA
•Package
-40 pin DIP (600 mil)
-40 pin SOP
The MX23C4100 is a 5V only, 4M-bit, Read Only Memory. It is organized as 512Kx8 bits (byte mode) or as 256Kx16 bit (word mode) depending on BYTE (pin 31) voltage level. MX23C4100 has a static standby mode, and has an access time of 100/120/150/200ns. It is designed to be compatible with all microprocessors and similar applications in which high performance, large bit storage and simple interfacing are important design considerations.
PIN CONFIGURATION
40 PDIP/SOP
A17 |
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A8 |
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A7 |
2 |
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A9 |
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A6 |
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A10 |
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A5 |
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A11 |
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A4 |
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36 |
A12 |
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A3 |
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35 |
A13 |
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A2 |
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A14 |
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A1 |
8 |
MX23C4100 |
33 |
A15 |
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Q0 |
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28 |
Q7 |
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A0 |
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32 |
A16 |
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CE |
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31 |
BYTE |
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VSS |
11 |
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30 |
VSS |
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12 |
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Q15/A-1 |
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OE |
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Q8 |
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Q14 |
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Q1 |
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Q6 |
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Q9 |
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Q13 |
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Q2 |
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Q5 |
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Q10 |
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Q12 |
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Q3 |
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Q4 |
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Q11 |
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VCC |
P/N:PM0136
1
MX23C4100 offers automatic power-down, with power- down controlled by the chip enable (CE) input. When CE is not selected, the device automatically powers down and remains in a low-power standby mode as long as CE stays in the unselected mode.
The OE input as well as OE input may be programmed active Low.
BLOCK DIAGRAM
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CE |
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OE |
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CONTROL |
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OUTPUT |
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Q0~Q14 |
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BYTE |
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LOGIC |
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BUFFERS |
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Q15/A-1 |
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Y-DECODER |
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Y-DECODER |
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A0~A17 |
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ADDRESS |
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4M BIT |
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INPUTS |
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X-DECODER |
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ROM ARRAY |
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VCC |
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VSS |
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PIN DESCRIPTION |
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Symbol |
Pin Function |
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A0~A17 |
Address Input |
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Q0~Q14 |
Data Output |
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Chip Enable Input |
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CE |
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Output Enable Input |
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OE |
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Word/Byte Selection |
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BYTE |
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Q15/A-1 |
Q15(Word mode)/LSB address(Byte |
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mode) |
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VCC |
Power Supply Pin (+5V) |
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VSS |
Ground Pin |
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REV. 3.6, JUL. 16, 2001
MX23C4100
TRUTH TABLE OF BYTE FUNCTION
BYTE MODE (BYTE=VSS)
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CE |
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OE |
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D15/A-1 |
MODE |
D0-D7 |
SUPPLY CURRENT |
NOTE |
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H |
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X |
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X |
Non selected |
High Z |
Standby (ICC2) |
1 |
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L |
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H |
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X |
Non selected |
High Z |
Operating (ICC1) |
1 |
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L |
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L |
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A-1 input |
Selected |
DOUT |
Operating (ICC1) |
1 |
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WORD MODE |
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(BYTE=VCC) |
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D15/A-1 |
MODE |
D0-D7 |
SUPPLY CURRENT |
NOTE |
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CE |
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OE |
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H |
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X |
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High Z |
Non selected |
High Z |
Standby (ICC2) |
1 |
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L |
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H |
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High Z |
Non selected |
High Z |
Operating (ICC1) |
1 |
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L |
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DOUT |
Selected |
DOUT |
Operating (ICC1) |
1 |
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NOTE1:X=H or L
ABSOLUTE MAXIMUM RATINGS*
RATING |
VALUE |
Ambient Operating Temperature |
0°C to 70°C |
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Storage Temperature |
-65°C to 125°C |
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Applied Input Voltage |
-0.5V to 7.0V |
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Applied Output Voltage |
-0.5V to 7.0V |
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VCC to Ground Potential |
-0.5V to 7.0V |
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Power Dissipation |
1.0W |
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*Note:
Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability.
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 5V±10%)
Item |
Symbol |
MIN. |
MAX. |
Conditions |
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Output High Voltage |
VOH |
2.4V |
- |
IOH = -1.0mA |
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Output Low Voltage |
VOL |
- |
0.4V |
IOL = 2.1mA |
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Input High Voltage |
VIH |
2.2V |
VCC+0.3V |
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Input Low Voltage |
VIL |
-0.3V |
0.8V |
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Input Leakage Current |
ILI |
- |
10uA |
VIN=0 to 5.5V |
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Output Leakage Current |
ILO |
- |
10uA |
VOUT=0 to 5.5V |
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Power-Down Supply Current |
ICC3 |
- |
100uA |
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CE>VCC-0.2V |
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Standby Supply Current |
ICC2 |
- |
1.0mA |
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= VIH |
CE |
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Operating Supply Current |
ICC1 |
- |
60mA |
Note 1 |
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P/N:PM0136 |
REV. 3.6, JUL. 16, 2001 |
2
MX23C4100
CAPACITANCE (Ta = 25°C, f=1.0MHz (Note 2))
Item |
Symbol |
MIN. |
MAX. |
UNIT |
Conditions |
Input Capacitance |
CIN |
- |
10 |
pF |
VIN=0V |
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Output Capacitance |
COUT |
- |
10 |
pF |
VOUT=0V |
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AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 5V±10%)
Item |
Symbol |
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23C4100-10 |
23C4100-12 |
23C4100-15 |
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MIN. |
MAX. |
MIN. |
MAX. |
MIN. |
MAX. |
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Cycle Time |
tCYC |
100ns |
- |
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120ns |
- |
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150ns |
- |
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Address Access Time |
tAA |
- |
100ns |
- |
120ns |
- |
150ns |
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Output Hold Time After |
tOH |
0ns |
- |
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0ns |
- |
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0ns |
- |
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Address Change |
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Chip Enable Access Time |
tACE |
- |
100ns |
- |
120ns |
- |
150ns |
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Output Enable Select |
tAOE |
- |
50ns |
- |
70ns |
- |
80ns |
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Access Time |
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Output High Z Delay |
tHZ |
- |
20ns |
- |
20ns |
- |
20ns |
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Note:
1.Measured with device selected at f=5 MHz and output unloaded.
2.This parameter is periodically sampled and is not 100% teseted.
AC Test Conditions
Input Pulse Levels |
0.4V to 2.4V |
Input Rise and Fall Times |
10ns |
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Input Timing Level |
1.5V |
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Output Timing Level |
0.8V and 2.0V |
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Output Load |
1TLL+100pF |
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P/N:PM0136 |
REV. 3.6, JUL. 16, 2001 |
3