Murata CYW43012 Datasheet
Preliminary Specification Number : SP-9B1LV-N
W-LAN+Bluetooth Combo Module Data Sheet
Cypress Chipset CYW43012
for 802.11a/b/g/n,11ac-friendly + Bluetooth 5.0
Tentative P/N :LBEE59B1LV-TEMP
Preliminary
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
Preliminary Specification Number : SP-9B1LV-N
Revised No.
Revised Date
Note
-
2017.07.07
First Issue
A
2017.10.02
P4. Updated Block Diagram
P6,8. Updated Pin Layout
B
2017.10.10
Cover. Added 11ac-friendly
P4. Added 11ac-friendly on Scope
C
2018.04.04
P35. Added Reference circuit
D
2018.06.01
P10. Updated Supply voltage condition
P25-31. Updated DC/RF characteristics
E
2018.08.02
P4. Updated Wright/MSL information
P31-32. Updated BT output power spec
P34 Updated Reference schematic(Added (*5))
P35 Added Tape and Reel packing information
F
2018.10.25
P4. Added “MAC/BD address are embedded
P5. Updated Marking information
P10. Updated VDDIO_SFL spec(8.OPERATING CONDITION)
P13. Added digital I/O requirements BT/WL_REG_ON
G
2018.12.28
P33. Revised Reference circuit
H
2019.03.26
P5. Corrected Demotions(Added a5,c5)
I
2019.04.24
P40. Updated 18.PRECONDITION TO USE OUR PRODUCTS
J
2019.07.05
P5. Added Certification information
Appendix : Added User manual for Japan certification
K
2019.09.26
P5. Certification information: Added
P6. Dimensions: added e12 number
L
2019.10.17
P10. Dimensions : added pin 80(corrected)
P34. Reference circuit : added pin64(corrected)
M
2019.11.21
Updated based on the latest Cypress IC datasheet (Rev.L).
P7. Pin Layout : Updated
P8. Pin Description: Updated
Removed PCM/I2S interface timing
N
2021.03.25
P5. Corrected marking information.
The revision history of the product specification
1 / 51
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
Preliminary
Preliminary Specification Number : SP-9B1LV-N
2 / 51
TABLE OF CONTENTS
1. SCOPE ..................................................................................................................................................... 3
2. KEY FEATURE ...................................................................................................................................... 3
3. Part Number ........................................................................................................................................... 3
4. RoHS Compliance ................................................................................................................................... 3
5. Block Diagram ........................................................................................................................................ 3
6. Certification Information ....................................................................................................................... 4
6.1. Radio Certification ................................................................................................................... 4
USA ...................................................................................................................................................... 4
Canada ................................................................................................................................................. 4
Europe .................................................................................................................................................. 4
Japan .................................................................................................................................................... 4
6.2. Bluetooth® Qualification .......................................................................................................... 4
7. DIMENSIONS, MARKING AND TERMINAL CONFIGURATIONS ................................................. 5
7.1. Dimensions ............................................................................................................................... 5
7.2. Pin Layout ................................................................................................................................. 6
7.3. Module PIN Descriptions ......................................................................................................... 7
8. ABSOLUTE MAXIMUM RATINGS
9. OPERATING CONDITION
10. External LPO Signal Requirement.................................................................................................. 10
11. POWER ON SEQUENCE ................................................................................................................. 11
*3)
11.1. Power On Sequence for WLAN ON and BT ON ................................................................11
11.2. Power On Sequence for WLAN ON and BT Off ................................................................11
11.3. Power On Sequence for WLAN OFF and BT ON ............................................................. 12
11.4. Power On Sequence for WLAN OFF and BT OFF ........................................................... 12
12. Digital I/O Requirements ................................................................................................................. 13
13. INTERFACE TIMING AND AC CHARACTERISTICS ................................................................. 14
13.1. Bluetooth UART Timing .................................................................................................... 14
13.2. SDIO Timing ....................................................................................................................... 15
13.2.1. SDIO Default Mode Timing ........................................................................................ 15
13.2.2. SDIO High-Speed Mode Timing ................................................................................. 16
13.2.3. SDIO BUS Timing Specifications in SDR Modes ..................................................... 17
14. DC / RF Characteristics.................................................................................................................... 19
14.1. DC/RF Characteristics for IEEE802.11b - 2.4GHz .......................................................... 19
14.2. DC/RF Characteristics for IEEE802.11g - 2.4GHz .......................................................... 20
14.3. DC/RF Characteristics for IEEE802.11n – 2.4GHz ......................................................... 21
14.4. DC/RF Characteristics for IEEE802.11a - 5GHz ............................................................. 22
14.5. DC/RF Characteristics for IEEE802.11n(HT20) - 5GHz ................................................. 23
14.6. DC/RF Characteristics for IEEE802.11ac(VHT20) - 5GHz ............................................. 24
14.7. DC/RF Characteristics for Bluetooth ................................................................................ 25
14.8. DC/RF Characteristics for Bluetooth (LE) ........................................................................ 26
15. LAND PATTERN (TOP VIEW) ........................................................................................................ 27
16. REFERENCE CIRCUIT ................................................................................................................... 28
17. TAPE AND REEL PACKING ........................................................................................................... 29
18. NOTICE ............................................................................................................................................. 32
18.1. Storage Conditions: ............................................................................................................ 32
18.2. Handling Conditions: ......................................................................................................... 32
18.3. Standard PCB Design (Land Pattern and Dimensions): ................................................. 32
18.4. Notice for Chip Placer: ....................................................................................................... 32
18.5. Soldering Conditions: ......................................................................................................... 33
18.6. Cleaning: ............................................................................................................................. 33
18.7. Operational Environment Conditions: .............................................................................. 33
18.8. Input Power Capacity: ........................................................................................................ 34
19. PRECONDITION TO USE OUR PRODUCTS ............................................................................... 35
*2)
................................................................................................. 10
.............................................................................................................. 10
Please be aware that an important notice concerning availability, standard warranty and use in critical applications of
Murata products and disclaimers thereto appears at the end of this specification sheet.
Preliminary
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
Preliminary Specification Number : SP-9B1LV-N
Ordering Part Number
Description
LBEE59B1LV-TEMP
In case of sample order
LBEE59B1LV-TEMP-D
EVK
Sleep Clock
BPF
VBAT
VDDIO
SDIO
UART
Ref Clock
37.4MHz
CYW43012
5G Tx
5G Rx
2.4G Tx(WLAN)
2.4G Rx(WLAN)
BT: Tx
BT: Rx
LC network
For DCDC
DIPLEX
*1)
*1)
3 / 51
1. SCOPE
This specification is applied to the IEEE802.11a/b/g/n,IEEE802.11ac-friendly W-LAN + Bluetooth
5.0 combo module.
*1)IEEE 802.11ac full-compliance requires support for 40 MHz and 80 MHz channel bandwidths. CYW43012 only
supports 20 MHz channel bandwidth however it supports 802.11ac’s 256-QAM for the 20 MHz channels in the 5GHz
band enabling it to offer higher throughput and lower energy per bit than 802.11n only products.
2. KEY FEATURE
- Cypress CYW43012 inside
- Compliant with IEEE802.11a/b/g/n, 11ac-friendly
- Compliant with Bluetooth specification v5.0
- SDIO interface for W-LAN
- Interface support for Bluetooth is Host Controller Interface (HCI)
- Surface mount type 10.0 x 7.2 mm (Typical), H = 1.4 mm (Max)
- MAC/BD address are embedded
- Weight : 0.23g
- MSL : 3
3. Part Number
4. RoHS Compliance
This module is compliant with the RoHS directive.
5. Block Diagram
Preliminary
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
Preliminary Specification Number : SP-9B1LV-N
4 / 51
Preliminary
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
6. Certification Information
6.1. Radio Certification
USA
FCC ID : VPYLBEE59B1LV
Country Code: US/0
*Please follow user/installation manual of Appendix
Canada
IC : 772C-LBEE59B1LV
Country Code: CA/0
*Please follow user/installation manual of Appendix
Europe
EN300328/301893 v2.1.1, EN300440 v2.2.1 conducted test report is prepared.
Country Code: DE/0
Japan
Japanese type certification is prepared.
001-P01338
Country Code: JP/0
*Please follow manual of Appendix
The each country code are defined by Murata Blob/Nvram file.
Murata prepared 4 kinds of Blob files.
• STA/Indoor: US/CA/DE/JP
• STA/Outdoor: US/CA/DE/JP
• AP/Indoor: US/CA/DE/JP
• AP/Outdoor :US/CA/DE
Please ask your contact person from Murata.
6.2. Bluetooth® Qualification
QDID: 125836
Preliminary Specification Number : SP-9B1LV-N
5 / 51
Preliminary
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
7. DIMENSIONS, MARKING AND TERMINAL CONFIGURATIONS
7.1. Dimensions
<TOP VIEW> <BOTTOM VIEW>
(1)
(19)
(20)
(29)
(30)
(48)
(49)
(58)
(59)
(71)
(72)
(76)
(77)
(89)
(90)
(94)
(95)
(96)(97)
(98)
(99)
(100) (101) (102) (103)
(104)
(105)
(106)
a1
b1
e1
b2
c1
e2
a2
e3
b3
e4
a3
e5
e6
e7
c3
c5
e8
c4
e9
e10
a4
e11
a5
e12
c2
L
W
conformal shield
(1)
(19)
(20)
(29)
(30)
(48)
(49)
(58)
(59)
(71)
(72)
(76)
(77)
(89)
(90)
(94)
(95)
(96)(97)
(98)
(99)
(100) (101) (102) (103)
(104)
(105)
(106)
a1
b1
e1
b2
c1
e2
a2
e3
b3
e4
a3
e5
e6
e7
c3
c5
e8
c4
e9
e10
a4
e11
a5
e12
c2
<SIDE VIEW>
T
(unit : mm)
Mark
Dimensions
Mark
Dimensions
Mark
Dimensions
L
10.0 +/- 0.2
W
7.2 +/- 0.2
T
1.4max
a1
0.25+/- 0.1
a2
0.25 +/- 0.1
a3
0.25 +/- 0.1
a4
0.25 +/- 0.1
a5
0.25 +/- 0.1
b1
0.375 +/- 0.2
b2
0.30 +/- 0.2
b3
0.30 +/- 0.2
c1
0.55 +/- 0.1
c2
0.55 +/- 0.1
c3
0.55 +/- 0.1
c4
0.55 +/- 0.1
c5
0.55 +/- 0.1
e1
0.25 +/- 0.1
e2
0.375 +/- 0.1
e3
0.25 +/- 0.1
e4
1.025 +/- 0.1
e5
0.25 +/- 0.1
e6
0.25 +/- 0.1
e7
1.100 +/- 0.1
e8
0.825 +/- 0.1
e9
0.25 +/- 0.1
e10
0.25 +/- 0.1
e11
0.25 +/- 0.1
e12
0.75 +/- 0.1
Marking
Meaning
A
Pin 1 Marking
B
Murata Logo
C
Module Type
D
Inspection Number
Structure
PWB
Substrate
SMD Dip
SPDT
SP3T
CYW43012
Resin
Mold
Shield
012345678
Type1LV
A
B D C
Conformal shield
Conformal shield
Preliminary Specification Number : SP-9B1LV-N
6 / 51
Preliminary
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
7.2. Pin Layout
(1) (19)
(30)
(48)
(49)
(58)
(59) (71)
(72)
(76)
(77)
(89)
(90)
(94)
(95) (96) (97) (98)
(99)
(100)
(101)(102)
(103)
(104)
(105) (106)
No.
Pin name
No.
Pin name
No.
Pin name
No.
Pin name
1
GND
25
SDIO_DATA_3
49
BT_RF_OUT
73
GND 2 GND
26
SDIO_CMD
50
GND
74
SFL_IO0 3 GND
27
GND
51
BT_RF_IN
75
SFL_IO3
4
VDDIO_SFL
28
VDDOUT_VDDIO
52
GND
76
SFL_IO2
5
BT_HOST_WAKE
29
BT_GPIO_0
53
GND
77
SFL_CLK
6
GND
30
GND
54
RF_SW_CTRL_6
78
SFL_IO1
7
WL_HOST_WAKE
31
BT_UART_TXD
55
RF_SW_CTRL_10
79
SFL_CS
8
WL_GPIO_1
32
BT_UART_RXD
56
RF_SW_CTRL_5
80
EXT_LPO
9
BT_REG_ON
33
BT_UART_RTS
57
GND
81
CLK_REQ
10
WL_REG_ON
34
BT_UART_CTS
58
ANT0
82
BT_PCM_OUT
11
GND
35
VDDIO
59
GND
83
BT_PCM_SYNC
12
VOUT_3P3
36
GND
60
GND
84
BT_PCM_IN
13
VBAT
37
P9
61
WL_GPIO_15
85
BT_PCM_CLK
14
VBAT
38
P11
62
WL_GPIO_13
86
BT_I2S_WS
15
GND
39
P13
63
WL_ GPIO_12
87
BT_I2S_CLK
16
RF_SW_CTRL_8
40
P5
64
WL_GPIO_14
88
BT_I2S_DI
17
RF_SW_CTRL_12
41
P6
65
GND
89
BT_I2S_DO
18
RF_SW_CTRL_11
42
P8
66
WL_GPIO_5
90
BT_GPIO_2
19
GND
43
P7
67
WL_GPIO_4
91
BT_GPIO_5
20
GND
44
P12
68
WL_GPIO_3
92
BT_GPIO_4
21
SDIO_DATA_2
45
P0
69
WL_GPIO_2
93
BT_GPIO_3
22
SDIO_DATA_1
46
P1
70
NC
94-106
GND
23
SDIO_DATA_0
47
GND
71
WL_GPIO_6
- - 24
SDIO_CLK
48
GND
72
GND
-
-
Top View
Preliminary Specification Number : SP-9B1LV-N
7 / 51
Preliminary
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
7.3. Module PIN Descriptions
No.
Pin name
Type
Connection to
IC pin name
Description
1
GND
-
GND
Ground
2
GND
-
GND
Ground
3
GND
-
GND
Ground
4
VDDIO_SFL
I
VDDIO_SFL
DC supply voltage for SFLASH I/O
5
BT_HOST_WAKE
O
BT_HOST_WAKE
Bluetooth host wake
6
GND
-
GND
Ground
7
WL_HOST_WAKE
I/O
GPIO_0
WL_HOST_WAKE
8
WL_GPIO_1
I/O
GPIO_1
WLAN general-purpose I/Os
9
BT_REG_ON
I
BT_REG_ON
Used by the PMU to power-up or power-down
the internal regulators used by the Bluetooth
section
10
WL_REG_ON
I
WL_REG_ON
Used by the PMU to power up or power down
the internal regulators used by the WLAN
section
11
GND
-
GND
Ground
12
VOUT_3P3
O
VDDOUT_RF3P3
VDDIO_RF1
Output of 3.3V RF LDO
13
VBAT
I
SR_VDDBAT5
LDO_VDDBAT5
WRF_GENTRAL_VDD_V5P0
Power supply
14
VBAT
WRF_TX_VDD_V5P0
ET_LINREG_VDD_V5P0
ET_SWREG_VDD_V5P0
15
GND
-
GND
Ground
16
RF_SW_CTRL_8
O
RF_SW_CTRL_8
Programmable RF switch-control lines
17
RF_SW_CTRL_12
O
RF_SW_CTRL_12
Programmable RF switch-control lines
18
RF_SW_CTRL_11
O
RF_SW_CTRL_11
Programmable RF switch-control lines
19
GND
-
GND
Ground
20
GND
-
GND
Ground
21
SDIO_DATA_2
I/O
SDIO_DATA_2
SDIO data line 2
22
SDIO_DATA_1
I/O
SDIO_DATA_1
SDIO data line 1
23
SDIO_DATA_0
I/O
SDIO_DATA_0
SDIO data line 0
24
SDIO_CLK
I
SDIO_CLK
SDIO clock
25
SDIO_DATA_3
I/O
SDIO_DATA_3
SDIO data line 3
26
SDIO_CMD
I/O
SDIO_CMD
SDIO command line
27
GND
-
GND
Ground
28
VDDOUT_VDDIO
O
VDDOUT_VDDIO
OTP_VDD1P8
VDDP_RF1
VDDP_SFL
output for 1.8V power switch
29
BT_GPIO_0
I/O
BT_GPIO_0
Bluetooth general-purpose I/Os
30
GND
-
GND
Ground
31
BT_UART_TXD
O
BT_UART_TXD
UART serial output
32
BT_UART_RXD
I
BT_UART_RXD
UART serial input
33
BT_UART_RTS
O
BT_UART_RTS_N
UART request-to-send
34
BT_UART_CTS
I
BT_UART_CTS_N
UART clear-to-send
Preliminary Specification Number : SP-9B1LV-N
8 / 51
Preliminary
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
No.
Pin name
Type
Connection to
IC pin name
Description
35
VDDIO
I
VDDIO
PMU_VDDIOA
PMU_VDDIOP
STRAP_OFF_1P8
VDD18_FLL,BT_VDDO
BT_VDDO_HIB
PAD_ADC_AVDDC
Power supply
36
GND
-
GND
Ground
37
P9
I/O
P9
Programmable LHL/HIB pads
38
P11
I/O
P11
Programmable LHL/HIB pads
39
P13
I/O
P13
Programmable LHL/HIB pads
40
P5
I/O
P5
Programmable LHL/HIB pads
P5 is used as BT_DEV_WAKE
41
P6
I/O
P6
Programmable LHL/HIB pads
42
P8 O P8
Programmable LHL/HIB pads
*Output Only
43
P7
I/O
P7
Programmable LHL/HIB pads
P7 is used as WL_DEV_WAKE
44
P12
I/O
P12
Programmable LHL/HIB pads
45
P0
I/O
P0
Programmable LHL/HIB pads
46
P1
I/O
P1
Programmable LHL/HIB pads
47
GND
-
GND
Ground
48
GND
-
GND
Ground
49
BT_RF_OUT
I/O Bluetooth Antenna
50
GND
-
GND
Ground
51
BT_RF_IN
I/O
(SP3T)
BT/WiFi one antenna: Routed to
BT_RF_OUT
Separate BT/WiFi antenna: connect to
50ohm terminal.
52
GND
-
GND
Ground
53
GND
-
GND
Ground
54
RF_SW_CTRL_6
O
RF_SW_CTRL_6
NC
55
RF_SW_CTRL_10
O
RF_SW_CTRL_10
Programmable RF switch-control lines
56
RF_SW_CTRL_5
O
RF_SW_CTRL_5
NC
57
GND
-
GND
Ground
58
ANT0
I/O
59
GND
-
GND
Ground
60
GND
-
GND
Ground
61
WL_GPIO_15
I/O
GPIO_15
Programmable GPIO lines
62
WL_GPIO_13
I/O
GPIO_13
Programmable GPIO lines
63
WL_GPIO_12
I/O
GPIO_12
Programmable GPIO lines
64
WL_GPIO_14
I/O
GPIO_14
Programmable GPIO lines
65
GND
-
GND
Ground
66
WL_GPIO_5
I/O
GPIO_5
Programmable GPIO lines
67
WL_GPIO_4
I/O
GPIO_4
Programmable GPIO lines
68
WL_GPIO_3
I/O
GPIO_3
Programmable GPIO lines
69
WL_GPIO_2
I/O
GPIO_2
Programmable GPIO lines
70
NC I JTAG_SEL
Wi-Fi JTAG interface is intended to be
used by Cypress's internal teams only
71
WL_GPIO_6
I/O
GPIO_6
Programmable GPIO lines
72
GND
-
GND
Ground
73
GND
-
GND
Ground
74
SFL_IO0
I/O
SFL_IO0
SFLASH data line 0
75
SFL_IO3
I/O
SFL_IO3
SFLASH data line 3
76
SFL_IO2
I/O
SFL_IO2
SFLASH data line 2
77
SFL_CLK
O
SFL_CLK
SFLASH clock
78
SFL_IO1
I/O
SFL_IO1
SFLASH data line 1
79
SFL_CS
O
SFL_CS
SFLASH chip select
No.
Pin name
Type
Connection to
Description
Preliminary Specification Number : SP-9B1LV-N
9 / 51
Preliminary
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
IC pin name
80
EXT_LPO
I
LPO_IN
External sleep-clock input(32.768kHz)
81
CLK_REQ
I/O
CLK_REQ
Reference clock request
82
BT_PCM_OUT
O
BT_PCM_OUT
PCM data output
83
BT_PCM_SYNC
I/O
BT_PCM_SYNC
PCM sync, can be master (output)
or slave (input)
84
BT_PCM_IN
I
BT_PCM_IN
PCM data input
85
BT_PCM_CLK
I/O
BT_PCM_CLK
PCM clock, can be master (output)
or slave (input)
86
BT_I2S_WS
I/O
BT_I2S_WS
I2S serial word select
87
BT_I2S_CLK
I/O
BT_I2S_CLK
I2S serial clock
88
BT_I2S_DI
I
BT_I2S_DI
I2S serial data input
89
BT_I2S_DO
O
BT_I2S_DO
I2S serial data output
90
BT_GPIO_2
I/O
BT_GPIO_2
Bluetooth general-purpose I/Os
91
BT_GPIO_5
I/O
BT_GPIO_5
Bluetooth general-purpose I/Os
92
BT_GPIO_4
I/O
BT_GPIO_4
Bluetooth general-purpose I/Os
93
BT_GPIO_3
I/O
BT_GPIO_3
Bluetooth general-purpose I/Os
94-106
GND
-
GND
Ground
Preliminary Specification Number : SP-9B1LV-N
10 / 51
Preliminary
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
8. ABSOLUTE MAXIMUM RATINGS
*2)
Parameter
min.
max.
Unit
Storage Temperature
-40
85
deg.C
Supply Voltage
VBAT
-0.5
5.0
V
VDDIO
-0.5
2.2
V
VDDIO_SFL
-0.5
4.1
V
*2)
Stresses in excess of the absolute ratings may cause permanent damage. Functional operation
is not implied under these conditions. Exposure to absolute ratings for extended periods of time
may adversely affect reliability. No damage assuming only one parameter is set at limit at a time
with all other parameters are set within operating condition.
9. OPERATING CONDITION
*3)
Parameter
min.
typ.
max.
unit
Operating Temperature
-20
25
+70
deg.C
Supply Voltage
VBAT
3.2 - 4.4
V
VDDIO
1.62
1.8
1.98
V
VDDIO_SFL
1.62/2.97
1.8/3.3
1.98/3.46
V
*3)
Functionality is guaranteed but the specifications require the derating at over-temperatures,
over-voltage condition.
10. External LPO Signal Requirement
Parameter
External LPO Clock
Unit
Nominal input frequency
32.768
kHz
Frequency accuracy
+/-250
ppm
Duty cycle
30-70
%
Input signal amplitude
500 – 1800
mVp-p
Signal type
Square-wave or sine-wave
-
Input impedance*4)
> 100k
ohm
*4)
When power is applied or switch off
Preliminary Specification Number : SP-9B1LV-N
11 / 51
Preliminary
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
11. POWER ON SEQUENCE
-VBAT should not rise 10%-90%faster than 40 microsecond.
-VBAT should be up before or at the same time as VDDIO. VDDIO should NOT be present first or be
held high before VBAT is high.
11.1. Power On Sequence for WLAN ON and BT ON
32.768kHz Sleep Clock
VBAT
VDDIO
WL_REG_ON
BT_REG_ON
90% of VH
~2 Sleep cycle
11.2. Power On Sequence for WLAN ON and BT Off
32.768kHz Sleep Clock
VBAT
VDDIO
WL_REG_ON
BT_REG_ON
90% of VH
~2 Sleep cycle
VDDIO
VDDIO
Preliminary Specification Number : SP-9B1LV-N
12 / 51
Preliminary
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
11.3. Power On Sequence for WLAN OFF and BT ON
32.768kHz Sleep Clock
VBAT
VDDIO
WL_REG_ON
BT_REG_ON
90% of VH
~2 Sleep cycle
11.4. Power On Sequence for WLAN OFF and BT OFF
32.768kHz Sleep Clock
VBAT
VDDIO
WL_REG_ON
BT_REG_ON
VDDIO
VDDIO
Preliminary Specification Number : SP-9B1LV-N
13 / 51
Preliminary
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
12. Digital I/O Requirements
Digital I/O Pins
Sym
min.
typ.
max.
unit
For VDDIO=1.8V:
Input high voltage
VIH
0.65xVDDIO
- - V
Input low voltage
VIL - -
0.35xVDDIO
V
Output high voltage@2mA
VOH
VDDIO-0.45
- - V
Output low voltage@2mA
VOL - -
0.45
V
BT/WL_REG_ON
Sym
min.
typ.
max.
unit
Input high voltage
VIH 1 -
4.4
V
Input low voltage
VIL
VSS
-
0.3
V
Pull-down resistance(internal)
RPD
-
50
-
k
Leakage discharged Current
ILEAK_DIS
-
28
-
nA
REG OFF time
TREG_OFF
2 - -
ms
Preliminary Specification Number : SP-9B1LV-N
14 / 51
Preliminary
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
13. INTERFACE TIMING AND AC CHARACTERISTICS
13.1. Bluetooth UART Timing
BT_UART_CTS_N
BT_UART_TXD
BT_UART_RXD
BT_UART_RTS_N
Midpoint of STOP bit
3
1
Midpoint of STOP bit
2
Reference
Description
Min
Typ
Max
Unit
1
Delay time, UART_CTS low to UART_TXD valid
- - 1.5
Bit periods
2
Setup time, UART_CTS high before midpoint of stop bit
- - 0.5
Bit periods
3
Delay time, midpoint of stop bit to UART_RTS high
- - 0.5
Bit periods
Preliminary Specification Number : SP-9B1LV-N
15 / 51
Preliminary
< Specification may be changed by Murata without notice >
Murata Manufacturing Co., Ltd.
13.2. SDIO Timing
13.2.1. SDIO Default Mode Timing
CLK
Output
Input
fPPtWHt
ISUtIH
t
ODLY
(min)
tWLt
THLtTLH
t
ODLY
(max)
SDIO Bus Timing
(a)
parameters (default Mode)
Parameter
Symbol
Min
Typ
Max
Unit
SDIO CLK (All values are referred to minimum VIH and maximum VIL
(b)
Frequency-Data Transfer Mode
fPP 0 -
25
MHz
Frequency-Identification Mode
fOD
0 - 400
kHz
Clock Low Time
tWL
10 - -
ns
Clock High Time
tWH
10 - -
ns
Clock Rise Time
tTLH
- - 10
ns
Clock low Time
tTHL
- - 10
ns
Inputs: CMD, DAT (referenced to CLK)
Input Setup Time
tISU
5 - -
ns
Input Hold Time
tIH 5 - - ns
Outputs: CMD, DAT (referenced to CLK)
Output Delay time-Data Transfer Mode
tODLY
0 - 14
ns
Output Delay time-Identification Mode
tODLY
0 - 50
ns
(a). Timing is based on CL < 40pF load on CMD and Data.
(b). Min (Vih) = 0.7*VDDIO and max (Vil) = 0.2*VDDIO.
SDIO_
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