Power Sequence Circuit to ensure SMPS_EN is released after
+12V_BUS and +3.3V_BUS are both in regulation.
Pull-up may or may not be required on SMPS_EN signal depending
on SMPS design.
Node 1 When +12V ramps above min Vbe, SMPS_EN will be helt low
When +3.3V gets close to regulation, one of the two
Node 2
conditions of releasing SMPS_EN is active
Target ~ 900mV when +3.3 at min regulation (worse case)
Typical trigger when +3.3V ramps above 2.2V (650mV)
Node 3 When +12V gets close to regulation, one of the two
conditions of releasing SMPS_EN is active
Target ~ 1.25V when +12 at min regulation (worse case)
Typical trigger when +12V ramps above 10V (1.1V)
5
www.vinafix.vn
4
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
(905) 882-2600
Title
RV530/RV515 256MB DDR3-136 Dual 2xDVI VIVO FH
Size Docum e n t N u mb erRe v
C
3
Date:Sheet
2
105-A671xx-00
SYMBOL LEGEND
DNI
DO NOT
INSTALL
#
ACTIVE
LOW
DIGITAL
GROUND
ANALOG
GROUND
120Saturday, O ctober 08, 2005
1
2
of
5
DD
4
3
2
1
NOTE: some of the PCIE testpoints will
be available trought via on traces.
PETp0_GFXRp0(1)
PETn0_GFXRn0(1)
PETp1_GFXRp1(1)
PETn1_GFXRn1(1)
PETp2_GFXRp2(1)
PETn2_GFXRn2(1)
PETp3_GFXRp3(1)
PETn3_GFXRn3(1)
PETp4_GFXRp4(1)
PETn4_GFXRn4(1)
PETp5_GFXRp5(1)
PETn5_GFXRn5(1)
PETp6_GFXRp6(1)
CC
BB
PETn6_GFXRn6(1)
PETp7_GFXRp7(1)
PETn7_GFXRn7(1)
PETp8_GFXRp8(1)
PETp9_GFXRp9(1)
PETn9_GFXRn9(1)
PETp10_GFXRp10(1)
PETn10_GFXRn10(1)
PETp11_GFXRp11(1)
PETn11_GFXRn11(1)
PETp12_GFXRp12(1)
PETn12_GFXRn12(1)
PETp13_GFXRp13(1)
PETn13_GFXRn13(1)
PETp14_GFXRp14(1)
PETn14_GFXRn14(1)
PETp15_GFXRp15(1)
PETn15_GFXRn15(1)
PCIE_REFCLKP(1)
PCIE_REFCLKN(1)
DNIDNI
R13
51R
402402
PERST#_buf(1,13,16)
R14
51R
For Tektronix LA only
Place close
to ASIC
TP11
TP12
TP13
TP14
TP19
TP20
TP21
TP27
TP28
R11
4.7K
402
TP7
TP8
TP9
TP10
TP15
TP16
TP17
TP18
TP23TP22
TP24
TP25
TP26
+3.3V
DNI
U1A
AJ31
PCIE_RX0P
AH31
PCIE_RX0N
AH30
PCIE_RX1P
AG30
PCIE_RX1N
AG32
PCIE_RX2P
AF32
PCIE_RX2N
AF31
PCIE_RX3P
AE31
PCIE_RX3N
AE30
PCIE_RX4P
AD30
PCIE_RX4N
AD32
PCIE_RX5P
AC32
PCIE_RX5N
AC31
PCIE_RX6P
AB31
PCIE_RX6N
AB30
PCIE_RX7P
AA30
PCIE_RX7N
AA32
PCIE_RX8P
Y32
PCIE_RX8N
Y31
PCIE_RX9P
W31
PCIE_RX9N
W30
PCIE_RX10P
V30
PCIE_RX10N
V32
PCIE_RX11P
U32
PCIE_RX11N
U31
PCIE_RX12P
T31
PCIE_RX12N
T30
PCIE_RX13P
R30
PCIE_RX13N
R32
PCIE_RX14P
P32
PCIE_RX14N
P31
PCIE_RX15P
N31
PCIE_RX15N
AL28
PCIE_REFCLKP
AK28
PCIE_REFCLKN
AG24
PERSTB
AA24
PCIE_TEST
AF24
NC
RV530 Unfused LF A11
Clock
PART 1 OF 7
P
C
I
E
X
P
R
E
S
S
I
N
T
E
R
F
A
C
E
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
Calibration
PCIE_CALRN
PCIE_CALRP
PCIE_CALI
AK27
AJ27
AJ25
AH25
AH28
AG28
AG27
AF27
AF25
AE25
AE28
AD28
AD27
AC27
AC25
AB25
AB28
AA28
AA27
Y27
Y25
W25
W28
V28
V27
U27
U25
T25
T28
R28
R27
P27
AE24
AD24
AB24
GFXTp0_PERp0 (1)
GFXTn0_PERn0 (1)
GFXTp1_PERp1 (1)
GFXTn1_PERn1 (1)
GFXTp2_PERp2 (1)
GFXTn2_PERn2 (1)
GFXTp3_PERp3 (1)
GFXTn3_PERn3 (1)
GFXTp4_PERp4 (1)
GFXTn4_PERn4 (1)
GFXTp5_PERp5 (1)
GFXTn5_PERn5 (1)
GFXTp6_PERp6 (1)
GFXTn6_PERn6 (1)
GFXTp7_PERp7 (1)
GFXTn7_PERn7 (1)
GFXTp8_PERp8 (1)
GFXTn8_PERn8 (1)PETn8_GFXRn8(1)
GFXTp9_PERp9 (1)
GFXTn9_PERn9 (1)
GFXTp10_PERp10 (1)
GFXTn10_PERn10 (1)
GFXTp11_PERp11 (1)
GFXTn11_PERn11 (1)
GFXTp12_PERp12 (1)
GFXTn12_PERn12 (1)
GFXTp13_PERp13 (1)
GFXTn13_PERn13 (1)
GFXTp14_PERp14 (1)
GFXTn14_PERn14 (1)
GFXTp15_PERp15 (1)
GFXTn15_PERn15 (1)
+PCIE
402
R82.0K
402
R9562R
402
R101.47K
AA
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
(905) 882-2600
Title
RV530/RV515 256MB DDR3-136 Dual 2xDVI VIVO FH
Size Docum e n t N u mb erRe v
C
5
4
www.vinafix.vn
3
2
Date:Sheet
105-A671xx-00
1
2
of
220Saturday, O ctober 08, 2005
5
4
3
2
1
DD
CC
I2C DEVICE ADDRESS' ON DDC3
DEVICE
LM63
BB
Place close to ASIC
T2XCM(13)
T2XCP(13)
T2X0M(13)
T2X0P(13)
T2X1M(13)
T2X1P(13)
T2X2M(13)
T2X2P(13)
T2X3M(15)
T2X3P(15)
T2X4M(15)
T2X4P(15)
T2X5M(15)
T2X5P(15)
LF RESIST OR 324R 1% 1/ 16W EIA (0402)
+T2XVDDR
C225
NS19NS_VIA
10uF
12
GND_T2XVSSR
CAP CER 10UF 10% 6.3V X5R
(0805)1.4MM MAX THICK
ADDRESS
x100 1100
CRT3DDCDATA(13,17)
CRT3DDCCLK(1,13,17)
TESTEN(1)
402
R101324R
R102324R
R103324R
R104324R
R105324R
R106324R
R107324R
NS15NS_VIA
12
C224
1uF_6.3V
+3.3V
+T2PVDD
1uF_6.3V
R33
4.7K
402402
+3.3V
+3.3V
C227
1uF_6.3V
GND_T2PVSS
C223
C222
1uF_6.3V
CRT1DDCDATA(1,14)
R34
CRT2DDCDATA(15)
4.7K
MR2410K
R2410K
Overlap Footprints
R25499R
R26499R
CRT1DDCCLK(1,14)
CRT2DDCCLK(15)
C226
1uF_6.3V
C221
1uF_6.3V
GPU_DPLUS(17)
GPU_DMINUS(17)
HPD1(14)
T2XCM
T2XCP
T2X0M
T2X0P
T2X1M
T2X1P
T2X2M
T2X2P
T2X3M
T2X3P
T2X4M
T2X4P
T2X5M
T2X5P
TP30
TESTEN
VREFG
XTALIN
XTALOUT
U1B
AL18
T2XCM
AM18
T2XCP
AK19
T2X0M
AL19
T2X0P
AL20
T2X1M
AM20
T2X1P
AL21
T2X2M
AM21
T2X2P
AK18
T2X3M
AJ18
T2X3P
AH18
T2X4M
AG18
T2X4P
AJ20
T2X5M
AK20
T2X5P
AE19
T2PVDD
AE18
T2PVSS
AF20
T2XVDDR_1
AE20
T2XVDDR_2
AF19
T2XVDDR_3
AC21
T2XVDDR_4
AC22
T2XVDDR_5
AD22
T2XVDDR_6
AE21
T2XVDDR_7
AD21
T2XVDDR_8
AE22
T2XVDDR_9
AF22
T2XVSSR_1
AF17
T2XVSSR_2
AF21
T2XVSSR_3
AK17
T2XVSSR_4
AJ19
T2XVSSR_5
AF18
T2XVSSR_6
AH17
T2XVSSR_7
AG17
T2XVSSR_8
AG19
T2XVSSR_9
AH19
T2XVSSR_10
AH22
DDC1DATA
AH23
DDC1CLK
AH13
DDC2DATA
AG13
DDC2CLK
AE12
DDC3DATA
AF12
DDC3CLK
AF11
HPD1
AE13
SDA
AF13
SCL
AG12
DPLUS
AH12
DMINUS
AG14
PLLTEST
AG22
TESTEN
AC8
VREFG
AL26
XTALIN
AM26
XTALOUT
RV530 Unfused LF A11
Integrated
TMDS2
Monitor
Interfa ce
MMI2C
Thermal
Diode
Test
XTAL
PART 2 OF 7
V
I
D
E
O
&
M
U
L
T
I
M
E
D
I
A
Integrated
TMDS
TXVDDR_1
TXVDDR_2
TXVDDR_3
TXVDDR_4
TXVSSR_1
TXVSSR_2
TXVSSR_3
TXVSSR_4
TXVSSR_5
DAC / CRT
DAC2 (TV/CRT2)
A2VSSN_1
A2VSSN_2
NC_A2VDDQ
TXCM
TXCP
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TX3M
TX3P
TX4M
TX4P
TX5M
TX5P
TPVDD
TPVSS
HSYNC
VSYNC
RSET
AVDD_1
AVDD_2
AVSSQ
AVSSN_1
AVSSN_2
VDD1DI
VSS1DI
H2SYNC
V2SYNC
COMP
R2SET
A2VDD_1
A2VDD_2
A2VSSQ
VDD2DI
VSS2DI
AL9
AM9
AK10
AL10
AL11
AM11
AL12
AM12
AK9
AJ9
AK11
AJ11
AK12
AJ12
AM8
AL8
AJ6
AK6
AL6
AM6
AJ7
AK7
AL7
AM7
AK8
AK24
R
AM24
G
AL24
B
AJ23
AJ22
RSET
AL22
+AVDD
AL25
AM25
GND_AVSSQ
AK23
AK25
AJ24
+VDD1DI
AM23
AL23
AK15
R2
AM15
G2
AL15
B2
AF15
AG15
AJ15
Y
AJ13
C
AH15
R2SETGND_A2VSSQ
AK14
+A2VDD
AM16
AL16
C56
AM17
10nF
AL17
AK13
+VDD2DI
AJ16
C59
AJ17
10nF
AL14
C246
C247
1uF_6.3V
1uF_6.3V
+TXVDDR
C250
C249
1uF_6.3V
1uF_6.3V
A_R_DAC1 (14)
A_G_DAC1 (14)
A_B_DAC1 (14)
A_HSYNC_DAC1 (1,7,14)
A_VSYNC_DAC1 (1,7,14)
R31499R
R32715R
GND_AVSSQ
RESISTOR, 499R 1% 1/16W E IA(0402)
C62
C63
100nF
10nF
10V X5R
10V X7R
402 10%
402 10%
C54
C53
100nF
10nF
A_R_DAC2 (15)
A_G_DAC2 (15)
A_B_DAC2 (15)
A_HSYNC_DAC2 (7,15)
A_VSYNC_DAC2 (7,15)
DAC2_Y (16)
DAC2_C (16)
DAC2_COMP (16)
C57
C58
100nF
1uF_6.3V
C60
1uF_6.3V
+TPVDD
NS14 NS_VIA
12
GND_TPVSS
CAP CER 10UF 10% 6.3V X5R
(0805)1.4MM MAX THICK
C251
NS13 NS_VIA
10uF
GND_TXVSSR
C64
1uF_6.3V
6.3V X5R
402 10%
C55
1uF_6.3V
12
NS5 NS_VIA
GND_AVSSQ
NS6 NS_VIA
GND_AVSSN
NS7 NS_VIA
GND_VSS1DI
NS8 NS_VIA
GND_A2VSSN
NS9 NS_VIA
GND_A2VSSQ
NS10 NS_VIA
GND_VSS2DI
Place close to ASIC
TjXCM
TjXCP
TjX0M
TjX0P
TjX1M
TjX1P
TjX2M
TjX2P
TjX3M
TjX3P
TjX4M
TjX4P
TjX5M
TjX5P
12
12
12
12
12
12
R136324R
R132324R
R133324R
R134324R
R135324R
R131324R
R130324R
LF RESIST OR 324R 1% 1/ 16W EIA (0402)
TjXCM ( 14)
TjXCP (14)
TjX0M (14)
TjX0P (14)
TjX1M (14)
TjX1P (14)
TjX2M (14)
TjX2P (14)
TjX3M (14)
TjX3P (14)
TjX4M (14)
TjX4P (14)
TjX5M (14)
TjX5P (14)
XTALIN_S
MR8182R
R8182R
R82
51.1R
R830R
MR830R
XTALIN
C82
Y82
22pF
27_MHZ
XTALOUT
4
www.vinafix.vn
CRYSTA L 27MHZ 30P PM F UND H C49SMT
21
Change to 10ppm/10ppm p/n 5028270000G
C83
22pF
XTALIN_S
XTALOUT_S
3
R_RTCLK
R850R
MR850R
R84
1M
MR860R
R86330R
Place R_RTCLK close to XTAL so the
main clock line has shortest stub
XTALIN
XTALOUT
RTXTALIN (16)
RTXTALOUT (16)
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
(905) 882-2600