MSI MS-V086 Schematic 1.1

Page 1
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
ASSEMBLYNVPNVARIANT
B 1 2
SKU
3 4 5 6
12 13 14
7 8
9 10 11
15
P407-A01: G84M/G86M MXM-II
256/512MB 128-BIT GDDR2 LVDS, DVI-A, DVI-B, TV-OUT, VGA SLI, HDMI, HDCP
Table of Contents
Page 1: Cover Page Page 2: PCI EXPRESS Interface Page 3: Frame Buffer GPU Interface Page 4: Frame Buffer Partition A Memories Page 5: Frame Buffer Partition C Memories Page 6: Memory Decoupling Caps Page 7: DACs, Clock-Generation Page 8: LVDS, TMDS GPU Interface Page 9: MXM Connector, IO-Section Page 10: GPIOs. JTAG, Thermal Senser Page 11: Spread Spectrum, VBIOS and HDCP ROM Page 12: MIOA(SLI), MIOB Page 13: NVVDD Power Supply Page 14: FBVDDQ, PEX1V2 and DAC_Vref Power Supply Page 15: STRAPS, MOUNTING HOLE
P407 A00 to A01 change list:
BASE SKU0001 SKU0002 SKU0003 SKU0004 <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED>
600-10407-9998-200 600-10407-0001-200 600-10407-0002-200 600-10407-0003-200 600-10407-0004-200 <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED>
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL. G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. G84M-600 450/400 512MB 128bit GDDR2 32Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. G84M-700 TBD/400 512MB 128bit GDDR2 32Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. G86M_770 500/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED>
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. Cover Page
www.vinafix.vn
There is no circuit change between A00 version and A01 version. Only some components value been changed in A01 version, and add TTP support.
P407 A01 to A02 change list:
There is no circuit change between A00 version and A01 version. Remove TTP support and change the thermal stiffner same as A00 used
600-10407-0001-200 A
p407_a02 myan
1 OF 18
30-NOV-2006
Page 2
OUT
IN
1/14 PCI_EXPRESS
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
VDD VDD
PEX_IOVDD PEX_IOVDD PEX_IOVDD
PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ
VDD
VDD VDD
VDD
VDD
VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD
VDD
VDD VDD
VDD VDD
VDD VDD
VDD
VDD
VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDD_LP VDD_LP VDD_LP VDD_LP
VDD33 VDD33
VDD33
VDD33
VDD33
VDD33
VDD33 VDD33 VDD33 VDD33
VDD33
VDD_LP VDD_LP
VDD_SENSE GND_SENSE
VDD33
VDD33
PEX_PLLGND
PEX_PLLDVDD
PEX_PLLAVDD
SPDIF
PEX_RST
RFU
RFU
PEX_RX1
PEX_TX1
PEX_TX1
PEX_RX0
PEX_RX0
PEX_TX0
PEX_TX0
PEX_REFCLK
PEX_REFCLK
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
PEX_RX1 PEX_TX2
PEX_RX4 PEX_RX4
PEX_RX3 PEX_RX3
PEX_TX4 PEX_TX4
PEX_TX3
PEX_TX3
PEX_RX2
PEX_RX2
PEX_TX2
PEX_TX5 PEX_TX5
PEX_RX5
PEX_TX8
PEX_TX8
PEX_RX7
PEX_RX7
PEX_TX7
PEX_TX7
PEX_RX6
PEX_RX6
PEX_TX6
PEX_TX6
PEX_RX5
PEX_RX8 PEX_RX8
PEX_TX9 PEX_TX9
PEX_TX11 PEX_TX11
PEX_RX11 PEX_RX11
PEX_RX10
PEX_RX10
PEX_TX10
PEX_TX10
PEX_RX9
PEX_RX9
PEX_TX12 PEX_TX12
PEX_RX12 PEX_RX12
PEX_TX15
PEX_TX15
PEX_RX14
PEX_RX14
PEX_TX14
PEX_TX14
PEX_RX13
PEX_RX13
PEX_TX13
PEX_TX13
PEX_RX15
PEX_RX15
1/2 PCI-Express, Power
PEX_RST
CLK_REQ
PEX_REFCLK
PEX_TX2
PEX_RX2 PEX_RX2
PEX_TX1
PEX_TX1
PEX_RX1
PEX_TX0
PEX_TX0
PEX_RX1
PEX_RX0
PEX_REFCLK
PEX_RX0
PEX_TX2
PEX_RX6
PEX_TX5
PEX_TX5
PEX_RX6
PEX_TX4
PEX_TX4
PEX_RX5
PEX_RX5
PEX_TX3
PEX_RX4
PEX_RX4
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX6
PEX_TX6
PEX_RX11
PEX_RX10
PEX_RX10
PEX_TX10 PEX_TX10
PEX_RX13
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_RX11 PEX_TX11
PEX_TX11
PEX_RX13
PRSNT2
PRSNT1
PEX_TX15
PEX_RX15
PEX_RX15
PEX_TX15
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX13 PEX_TX13
3V3RUN (1.5A)
(3.5A)
1V8RUN
(0.5A)
2V5RUN
(4A)
PWR_SRC
(0.5A)
5VRUN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND GND
GND
GND
GND
GND GND GND
GND GND
GND
GND
GND GND
GND
GND
GND
GND GND
GND
GND GND
GND GND
GND
GND GND
GND
GND GND
GND GND
GND GND GND
GND
GND
GND GND GND
GND
GND
GND
GND
GND
GND
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
G1 G84-600-A1 BGA820 CHANGED
SNN_GPU_AG12 SNN_GPU_AH13
NV_CRITICAL_NET
.1UF
6.3V 10% X7R COMMON
.1UF
6.3V 10% X7R COMMON
.1UF
6.3V 10% X7R COMMON
.1UF
6.3V 10% X7R COMMON
.1UF
6.3V 10% X7R COMMON
.1UF
6.3V 10% X7R COMMON
.1UF
6.3V 10% X7R COMMON
.1UF
6.3V 10% X7R COMMON
.1UF
6.3V 10% X7R COMMON
.1UF
6.3V 10% X7R COMMON
.1UF
6.3V 10% X7R COMMON
6.3V 10% X7R COMMON
.1UF
6.3V 10% X7R COMMON
.1UF
6.3V 10% X7R COMMON
.1UF
6.3V 10% X7R COMMON
.1UF
6.3V 10% X7R COMMON
NV_IMPEDANCE
100DIFF 1
100DIFF 1
100DIFF 1
100DIFF
100DIFF 1 100DIFF 1
100DIFF 1
100DIFF 1 100DIFF 1
100DIFF
100DIFF 1
100DIFF 1
100DIFF 1
100DIFF 1
100DIFF 1
1100DIFF
1 1
1100DIFF
1 1
1100DIFF
1 1
1100DIFF 1
1 1
1 1
1100DIFF
1 1
1100DIFF 1100DIFF
1 1
1 1
1100DIFF 1100DIFF
1 1
1100DIFF 1
1 1
1100DIFF
1 1
1100DIFF 1100DIFF
1 1
1100DIFF 1100DIFF100DIFF
1 1
1100DIFF
1 1
1100DIFF
1 1
1100DIFF
1 1
1100DIFF
1 1
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. PCI EXPRESS Interface
200 COMMON
1%
C632 0402
C625 0402
C615 0402
C607 0402
C596 0402
C584 0402
C571 0402
C565 0402
C560 0402
C558 0402
C554 0402
0402
C550 0402
C543 0402
C538 0402
C536 0402
NET_NAMEDIFF_PAIR
PEX_TSTCLK PEX_TSTCLK
PEX_RCLK PEX_RCLK
PEX_TX0 PEX_TX0
PEX_RX0 PEX_RX0
PEX_TX1 PEX_TX1
PEX_RX1 PEX_RX1
PEX_TX2 PEX_TX2
PEX_RX2 PEX_RX2
PEX_TX3 PEX_TX3
PEX_RX3 PEX_RX3
PEX_TX4 PEX_TX4
PEX_RX4 PEX_RX4
PEX_TX5 PEX_TX5
PEX_RX5 PEX_RX5
PEX_TX6 PEX_TX6
PEX_RX6 PEX_RX6
PEX_TX7 PEX_TX7
PEX_RX7 PEX_RX7
PEX_TX8 PEX_TX8
PEX_RX8 PEX_RX8
PEX_TX9 PEX_TX9
PEX_RX9 PEX_RX9
PEX_TX10 PEX_TX10
PEX_RX10 PEX_RX10
PEX_TX11 PEX_TX11 PEX_TX11* AJ24
PEX_RX11 PEX_RX11
PEX_TX12 PEX_TX12
PEX_RX12 PEX_RX12
PEX_TX13 PEX_TX13
PEX_RX13 PEX_RX13
PEX_TX14 PEX_TX14
PEX_RX14 PEX_RX14
PEX_TX15 PEX_TX15
PEX_RX15 PEX_RX15
PEX_TSTCLK PEX_TSTCLK*
PEX_RCLK PEX_RCLK*
PEX_TX0
PEX_RX0 PEX_RX0*
PEX_TX1 PEX_TX1*
PEX_RX1 PEX_RX1*
PEX_TX2 PEX_TX2*
PEX_RX2 PEX_RX2*
PEX_TX3 PEX_TX3*
PEX_RX3 PEX_RX3*
PEX_TX4 PEX_TX4*
PEX_RX4 PEX_RX4*
PEX_TX5 PEX_TX5*
PEX_RX5 PEX_RX5*
PEX_TX6 PEX_TX6*
PEX_RX6 PEX_RX6*
PEX_TX7 PEX_TX7*
PEX_RX7 PEX_RX7*
PEX_TX8 PEX_TX8*
PEX_RX8 PEX_RX8*
PEX_TX9 PEX_TX9*
PEX_RX9 PEX_RX9*
PEX_TX10 PEX_TX10*
PEX_RX10 PEX_RX10*
PEX_TX11
PEX_RX11 PEX_RX11*
PEX_TX12 PEX_TX12*
PEX_RX12 PEX_RX12*
PEX_TX13 PEX_TX13*
PEX_RX13 PEX_RX13*
PEX_TX14 PEX_TX14*
PEX_RX14 PEX_RX14*
PEX_TX15 PEX_TX15*
PEX_RX15*
www.vinafix.vn
AH15PEX_RST
AG12 AH13
AM12 AM11
AH14 AJ14
AJ15 AK15PEX_TX0*
AK13 AK14
AH16 AG16
AM14 AM15
AG17 AH17
AL15 AL16
AG18 AH18
AK16 AK17
AK18 AJ18
AL17 AL18
AJ19 AH19
AM18 AM19
AG20 AH20
AK19 AK20
AG21 AH21
AL20 AL21
AK21 AJ21
AM21 AM22
AJ22 AH22
AK22 AK23
AG23 AH23
AL23 AL24
AK24
AM24 AM25
AJ25 AH25
AK25 AK26
AH26 AG26
AL26 AL27
AK27 AJ27
AM27 AM28
AJ28 AH27
AL28PEX_RX15 AL29
DIFF_PAIRNET_NAME
PEX_TX0_C PEX_TX0_C
PEX_TX1_C PEX_TX1_C
PEX_TX2_C PEX_TX2_C
PEX_TX3_C PEX_TX3_C
PEX_TX4_C PEX_TX4_C
PEX_TX5_C PEX_TX5_C
PEX_TX6_C PEX_TX6_C
PEX_TX7_C PEX_TX7_C
PEX_TX8_C PEX_TX8_C
PEX_TX9_C PEX_TX9_C
PEX_TX10_C PEX_TX10_C
PEX_TX11_C PEX_TX11_CPEX_TX11_C*
PEX_TX12_C PEX_TX12_C
PEX_TX13_C PEX_TX13_C
PEX_TX14_C PEX_TX14_C
PEX_TX15_C PEX_TX15_C
NV_CRITICAL_NET
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
NV_IMPEDANCE 100DIFF
100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
STAFF FOR PEX TEST
R34
0402
.1UF
C640
6.3V0402 10% X7R COMMON
.1UF
C629
6.3V
0402
10% X7R COMMON
.1UF
C620
6.3V
0402
10% X7R COMMON
.1UF
C612
6.3V
0402
10% X7R COMMON
.1UF
C603
6.3V
0402
10% X7R COMMON
.1UF
C590
6.3V
0402
10% X7R COMMON
.1UF
C582
6.3V
0402
10% X7R COMMON
.1UF
C566
6.3V0402 10% X7R COMMON
.1UF
C563
6.3V
0402
10% X7R COMMON
.1UF
C559
6.3V
0402
10% X7R COMMON
.1UF
C557
6.3V
0402
10% X7R COMMON
.1UF
C553 0402 6.3V .1UFC552
10% X7R COMMON
.1UF
C551
6.3V
0402
10% X7R COMMON
.1UF
C546
6.3V
0402
10% X7R COMMON
.1UF
C540
6.3V
0402
10% X7R COMMON
.1UF
C537
6.3V
0402
10% X7R COMMON
PAGE 2) MXM-II GOLDEN EDGE, PCI EXPRESS INTERFACE
3V3RUN
1V8RUN
PWR_SRC
2V5RUN
5VRUN
GND
C1 .1UF
6.3V 10% X7R 0402 COMMON
GND
C533 .1UF
6.3V 10% X7R 0402 COMMON
GND
C47 .1UF 50V 10% X7R 0603 COMMON
GND
C34 .1UF
6.3V 10% X7R 0402 COMMON
GND
C3 .1UF
6.3V 10% X7R 0402 COMMON
238
2
1
234
18
17 20 41 44 47 50 53 56 59 62 65 68 71 74 77 80 83 86 89 92 95
98 101 104 107 110 113 116 119 122 125 128 131 138 142 146 150 154 158 164 176 182 188 194 199 200 205 206 211 212 218 223 229 235 236 241
GND
CN1 CON_MXM_X16_EDGE (NPHY,NONPHY)-X16(_SLI) NPHY-X16_SLI NO STUFF
137
GND
139
135 133
PEX_TX0_C129 PEX_TX0_C*
127
132 130
PEX_TX1_C
123
PEX_TX1_C*
121
126 124
PEX_TX2_C
117
PEX_TX2_C*
115
120 118
PEX_TX3_C
111
PEX_TX3_C*
109
114 112
PEX_TX4_C
105
PEX_TX4_C*
103
108 106
PEX_TX5_C
99
PEX_TX5_C*
97
102 100
PEX_TX6_C
93
PEX_TX6_C*
91
96 94
PEX_TX7_C
87
PEX_TX7_C*
85
90 88
PEX_TX8_C
81
PEX_TX8_C*
79
84 82
PEX_TX9_C
75
PEX_TX9_C*
73
78 76
PEX_TX10_C
69
PEX_TX10_C*
67
72 70
PEX_TX11_C
63 61
66 64
PEX_TX12_C
57
PEX_TX12_C*
55
60 58
PEX_TX13_C
51
PEX_TX13_C*
49
54 52
PEX_TX14_C
45
PEX_TX14_C*
43
48 46
PEX_TX15_C
39
PEX_TX15_C*
37
42 40
134 38
GND
AD23 AF23 AF24 AF25 AG24 AG25
AC16 AC17 AC21 AC22 AE18 AE21 AE22 AF12 AF18 AF21 AF22
K16 K17 N13 N14 N16 N17 N19 P13 P14 P16 P17 P19 R16 R17 T13 T14 T15 T18 T19 U13
U14 U15 U18 U19 V16 V17 W13 W14 W16 W17 W19 Y13 Y14 Y16 Y17 Y19 Y20
P20 T20 T23 U20 U23 W20
N20 M21
AC11 AC12 AC24 AD24 AE11 AE12 H7 J7 K7 L10 L7 L8 M10
AF15 AE15 AE16
PEX1V2
C541 1UF
6.3V 10% X5R 0402 COMMON
C564 1UF
6.3V 10% X5R 0402 COMMON
NVVDD
<<place on bottom north of GPU
GND
<<place on bottom east of GPU
GND
<<place on bottom south of GPU
GND
<<place on bottom west of GPU
GND
PEX1V2
GND
GND
LB502
220R@100MHz
COMMON
C586 .1UF
6.3V 10% X7R 0402 COMMON
C594 .1UF
6.3V 10% X7R 04020402 COMMON
C623 1UF
6.3V 10% X5R 0402 COMMON
C570 1UF
6.3V 10% X5R 04020402 COMMON
C618 1UF
6.3V 10% X5R 0402 COMMON
C637 1UF
6.3V 10% X5R 0402 COMMON
3V3RUN
GND
GND
C581 .1UF
6.3V 10% X7R 0402 COMMON
C644 .1UF
6.3V 10% X7R
COMMON
C635 .1UF
6.3V 10% X7R 0402 COMMON
C622 .1UF
6.3V 10% X7R
COMMON
C589 .1UF
6.3V 10% X7R 0402 COMMON
C652 .1UF
6.3V 10% X7R 0402 COMMON
BEAD_0603
C617
4.7UF
6.3V 10% X5R 0603 COMMON
GND
C562 .1UF
6.3V 10% X7R 0402 COMMON
C611 .1UF
6.3V 10% X7R 0402 COMMON
C609 .1UF
6.3V 10% X7R 0402 COMMON
C631 .1UF
6.3V 10% X7R 0402 COMMON
C591 .1UF
6.3V 10% X7R 0402 COMMON
C650 .1UF
6.3V 10% X7R 0402 COMMON
13.3G<
C674 .01UF 16V 10% X7R 0402 COMMON
C569 .1UF
6.3V 10% X7R 0402 COMMON
1.2V
C633 .1UF
6.3V 10% X7R 0402 COMMON
9.1G> 9.4B>
12MIL
C597 .01UF 16V 10% X7R 0402 COMMON
C604 .01UF 16V 10% X7R 0402 COMMON
C636 .1UF
6.3V 10% X7R 0402 COMMON
C638 .1UF
6.3V 10% X7R 04020402 COMMON
C614 .1UF
6.3V 10% X7R 0402 COMMON
C578 .1UF
6.3V 10% X7R 0402 COMMON
C658 .01UF 16V 10% X7R 0402 COMMON
C673 .1UF
6.3V 10% X7R 0402 COMMON
C641 .1UF
6.3V 10% X7R 04020402 COMMON
C585 .01UF 16V 10% X7R 0402 COMMON
C627 .01UF 16V 10% X7R 0402 COMMON
C599 .1UF
6.3V 10% X7R 0402 COMMON
C588 .1UF
6.3V 10% X7R 0402 COMMON
C601 .1UF
6.3V 10% X7R 0402 COMMON
C613 .1UF
6.3V 10% X7R 0402 COMMON
NVVDD_SENSE SNN_GND_SENSE
C665 .01UF 16V 10% X7R 0402 COMMON
C655 .1UF
6.3V 10% X7R 0402 COMMON
GND
SPDIF_INJ6
PEX_PLLDVDD
C626 .01UF 16V 10% X7R 0402 COMMON
C572 .01UF 16V 10% X7R 0402 COMMON
C600 .01UF 16V 10% X7R 0402 COMMON
C621 .1UF
6.3V 10% X7R 0402 COMMON
C608 .1UF
6.3V 10% X7R
COMMON
C639 .1UF
6.3V 10% X7R 0402 COMMON
C648 .1UF
6.3V 10% X7R 0402 COMMON
C643 .01UF 16V 10% X7R 0402 COMMON
C647 .1UF
6.3V 10% X7R 0402 COMMON
C619 .01UF 16V 10% X7R
COMMON
600-10407-0001-200 A
p407_a02 myan
2 OF 18
30-NOV-2006
Page 3
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUTBIOUT
OUTBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
OUT
3/14 FBC
FBVTT FBVTT FBVTT FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT
FBC_CMD0
FBC_CMD4
FBC_CMD3
FBC_CMD2
FBC_CMD1
FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8
FBC_CMD9 FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26
FBC_PLLAVDD
FBC_PLLVDD
FBC_DEBUG
FBC_CLK1
FBC_CLK1
FBC_CLK0
FBC_CLK0
FBC_CMD28
FBC_CMD27
FBCAL_TERM_GND
FBCAL_PU_GND
FBCAL_PD_VDDQ
FBC_PLLGND
FBCD10 FBCD11 FBCD12 FBCD13 FBCD14 FBCD15
FBCD0 FBCD1 FBCD2 FBCD3 FBCD4 FBCD5 FBCD6 FBCD7 FBCD8 FBCD9
FBCD16 FBCD17 FBCD18 FBCD19 FBCD20 FBCD21 FBCD22 FBCD23 FBCD24 FBCD25 FBCD26 FBCD27 FBCD28 FBCD29 FBCD30 FBCD31 FBCD32 FBCD33 FBCD34 FBCD35 FBCD36 FBCD37 FBCD38 FBCD39 FBCD40 FBCD41 FBCD42 FBCD43 FBCD44 FBCD45 FBCD46 FBCD47 FBCD48 FBCD49 FBCD50 FBCD51 FBCD52 FBCD53 FBCD54 FBCD55 FBCD56 FBCD57 FBCD58 FBCD59 FBCD60 FBCD61 FBCD62 FBCD63
FBCDQM0 FBCDQM1 FBCDQM2 FBCDQM3 FBCDQM4 FBCDQM5 FBCDQM6 FBCDQM7
FBCDQS_WP0 FBCDQS_WP1 FBCDQS_WP2 FBCDQS_WP3 FBCDQS_WP4 FBCDQS_WP5 FBCDQS_WP6 FBCDQS_WP7
FBCDQS_RN0 FBCDQS_RN1 FBCDQS_RN2 FBCDQS_RN3 FBCDQS_RN4
FBCDQS_RN7
FBCDQS_RN6
FBCDQS_RN5
FB_VREF2
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUTBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIOUT
2/14 FBA
FBVDD FBVDD FBVDD FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD
FBVDDQ FBVDDQ FBVDDQ
FBVDDQ
FBVDDQ FBVDDQ FBVDDQ
FBVDDQ FBVDDQ
FBVDDQ FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ FBVDDQ FBVDDQ FBVDDQ
FBVDDQ FBVDDQ FBVDDQ FBVDDQ
FBA_CMD0
FBA_CMD2
FBA_CMD3
FBVDDQ
FBA_CMD1
FBA_CMD4
FBA_CMD5
FBA_CMD7
FBA_CMD8
FBA_CMD9 FBA_CMD11 FBA_CMD13 FBA_CMD15
FBA_CMD16
FBA_CMD19 FBA_CMD21
FBA_CMD22 FBA_CMD24
FBA_CMD25
FBA_CMD20
FBA_CMD17
FBA_CMD14
FBA_CMD10
FBA_CMD6
FBA_CMD12
FBA_CMD18
FBA_CMD23
FBA_CMD26
FBA_DEBUG
FBA_CLK0
FBA_PLLAVDD
H_PLLAVDD
FBA_CLK1
FBA_CLK1
FBA_CLK0
FBA_CMD28
FBA_CMD27
NC1 NC2
FBA_PLLGND
FBAD10 FBAD11 FBAD12 FBAD13 FBAD14 FBAD15
FBAD0 FBAD1 FBAD2 FBAD3 FBAD4 FBAD5 FBAD6 FBAD7 FBAD8 FBAD9
FBAD16 FBAD17 FBAD18 FBAD19 FBAD20 FBAD21 FBAD22 FBAD23 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 FBAD32 FBAD33 FBAD34 FBAD35 FBAD36
FBAD44
FBAD47 FBAD49 FBAD51
FBAD37 FBAD38 FBAD39 FBAD40 FBAD41 FBAD42 FBAD43
FBAD45 FBAD46
FBAD48 FBAD50 FBAD52
FBAD53 FBAD54 FBAD55 FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63
FBADQM0 FBADQM1 FBADQM2 FBADQM3 FBADQM4 FBADQM5 FBADQM6 FBADQM7
FBADQS_WP0 FBADQS_WP1 FBADQS_WP2 FBADQS_WP3 FBADQS_WP4 FBADQS_WP5 FBADQS_WP6 FBADQS_WP7
FBADQS_RN0 FBADQS_RN1 FBADQS_RN2 FBADQS_RN3 FBADQS_RN4
FBADQS_RN7
FBADQS_RN6
FBADQS_RN5
FB_VREF1
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
4.4F<
4.4F<
4.4F<
4.5F<
4.5F<
4.4F<
4.4F<
4.4F<
4.4F<
4.5F<
4.4F<
4.4F<
4.4F<
4.4F<
COMMON
0 NO STUFF 0 COMMON
0
0 COMMON
C606 .1UF
6.3V 10% X7R 0402 COMMON
C547 .1UF
6.3V 10% X7R 040204020402 04020402 COMMON
C670 .1UF
6.3V 10% X7R 0402 COMMON
C681 .1UF
6.3V 10% X7R 0402 COMMON
C624 1UF
6.3V 10% X5R 0402 COMMON
PEX1V2
LB501
FBA_ODT
FBC_ODTNO STUFF
C605 .1UF
6.3V 10% X7R 0402 COMMON
C587 .1UF
6.3V 10% X7R
COMMON
C602 .1UF
6.3V 10% X7R 0402 COMMON
C583 .1UF
6.3V 10% X7R 0402 COMMON
C573 1UF
6.3V 10% X5R 0402 COMMON
FBVDDQ
GND
GND
GND
GND
GND
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. Frame Buffer GPU Interface
5.4A<> 5.5F<>
5.5F< 5.4A<
4.5F< 4.2A<
5.5F< 5.2A<
www.vinafix.vn
FBCD<63..0>
FBCDQM<7..0>
5.4F<>
5.4F<>
5.4F<>
5.4F<>
5.4F<>
5.4F<>
5.4F<>
5.4F<>
5.4F<>
5.4F<>
5.4F<>
5.4F<>
5.4F<>
5.4F<>
5.4F<>
5.4F<>
FBVDDQ
R533
1K
1%
0402
NO STUFF
FB_VREF2 R543
1K
1%
0402
NO STUFF
GND
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 551 56 57 58 59 60 61 62 63
0 1 2 3 4 5 6 7
FBCD<0> FBCD<1> FBCD<2> FBCD<3> FBCD<4> FBCD<5> FBCD<6> FBCD<7> FBCD<8> FBCD<9> FBCD<10> FBCD<11> FBCD<12>
FBCD<14> E8 FBCD<15> FBCD<16> FBCD<17> FBCD<18> FBCD<19> FBCD<20> FBCD<21> FBCD<22> FBCD<23> FBCD<24> FBCD<25> FBCD<26> FBCD<27> FBCD<28> FBCD<29> FBCD<30> FBCD<31> FBCD<32> FBCD<33> FBCD<34> FBCD<35> FBCD<36> FBCD<37> FBCD<38> FBCD<39> FBCD<40> FBCD<41> FBCD<42> FBCD<43> FBCD<44> FBCD<45> FBCD<46> FBCD<47> FBCD<48> FBCD<49> FBCD<50> FBCD<51> FBCD<52> FBCD<53> FBCD<54> FBCD<55> B22 FBCD<56> FBCD<57> FBCD<58> FBCD<59> FBCD<60> FBCD<61> FBCD<62> FBCD<63>
FBCDQM<0> FBCDQM<1> FBCDQM<2> FBCDQM<3> FBCDQM<4> FBCDQM<5> FBCDQM<6> FBCDQM<7>
FBCDQS0 FBCDQS1 FBCDQS2 FBCDQS3 FBCDQS4 FBCDQS5 FBCDQS6 FBCDQS7
FBCDQS0* FBCDQS1* FBCDQS2* FBCDQS3* FBCDQS4* FBCDQS5* FBCDQS6* FBCDQS7*
12MIL
C561 .1UF
6.3V 10% X7R 0402 COMMON
FBA_A<3> FBA_A<0> FBA_A<2> FBA_A<1> FBB_A<3> FBB_A<4> FBB_A<5> FBA_BA2 FBA_CS0* FBA_WE* FBA_BA0 FBA_CKE FBA_RESET FBB_A<2> FBA_A<12> FBA_RAS* FBA_A<11> FBA_A<10> FBA_BA1 FBA_A<8> FBA_A<9> FBA_A<6> FBA_A<5> FBA_A<7> FBA_A<4> FBA_CAS*
SNN_FBA_CMD26 SNN_FBA_CMD27 SNN_FBA_CMD28
FBA_CLK0 FBA_CLK0* FBA_CLK1 FBA_CLK1*
FBA_PLLAVDD_GPU
GND
SNN_FBA_NC1_D31 SNN_FBA_NC1_D32
FBA_ODT_GPU
3 0 2
12
11 10
8 9 6 5 7 4
C634 .1UF
6.3V 10% X7R 0402 COMMON
C575 .1UF
6.3V 10% X7R
COMMON
C610 .1UF
6.3V 10% X7R 0402 COMMON
C579 .1UF
6.3V 10% X7R 0402 COMMON
C661 1UF
6.3V 10% X5R 0402 COMMON
FBB_A<5..2>
FBA_A<12..0>
12MIL
C577 .01UF 16V 10% X7R 0402 COMMON
FBA_RESET
FBA_ODT_GPU
FBC_RESET
FBC_ODT_GPU
C642 .1UF
6.3V 10% X7R 0402 COMMON
C576 .1UF
6.3V 10% X7R
COMMON
C645 .1UF
6.3V 10% X7R 0402 COMMON
C654 .1UF
6.3V 10% X7R 0402 COMMON
C598 1UF
6.3V 10% X5R 0402 COMMON
3 4 5
2
PLACE CLOSE TO BALLS
C568 470PF 16V 10% X7R 0402 COMMON
PLACE THESE RESISTORS AT GPU SIDE
1.2V
C548 .1UF
6.3V 10% X7R 0402 COMMON
C593 .1UF
6.3V 10% X7R
COMMON
C545 .1UF
6.3V 10% X7R 0402 COMMON
C616 .1UF
6.3V 10% X7R 0402 COMMON
C574 1UF
6.3V 10% X5R 0402 COMMON
4.1A<
4.1A<
4.2A<
4.1A<
4.1A<
4.2A<
4.2A<
4.1A<
4.2A<
4.1A<
4.3A<
4.3C<
4.3C<
4.3E<
220R@100MHz
BEAD_0603
C539
4.7UF
6.3V 10% X5R 0603 COMMON
GND
ODT OPTION
R535 0402
5% R537 0402
5% R545
0402
5% R547 0402
5%
PAGE 3) GPU MEMORY INTERFACE
4.5F<> 4.4A<>
4.5F< 4.4A<
FBAD<63..0>
FBADQM<7..0>
4.4F<>
4.4F<>
4.4F<>
4.4F<>
4.4F<>
4.4F<>
4.4F<>
4.4F<>
4.4F<>
4.4F<>
4.4F<>
4.4F<>
4.4F<>
4.4F<>
4.4F<>
4.4F<>
FBVDDQ
FB_VREF1
GND
G1 G84-600-A1 BGA820 CHANGED
AD29 AE29 AD28 AC28 AB29 AA30
AB30 AM30 AF30 AJ31 AJ30 AJ32
AM31 AL30 AE32 AE30 AE31 AD30 AC31 AC32 AB32
AG27 AF28 AH28 AG28 AG29 AD27 AF27 AE28
AA29 AK30 AC30 AG30
AB28 AL32 AF32 AH30
AA28 AL31 AF31 AH29
N27 M27 N28 L29
K28 J29 J28 P30 N31 N30 N32 L31 L30
L32 H30 K30 H31 F30 H32 E31 D30 E30 H28 H29 E29 J27 F27 E27 E28 F28
Y28
M29 M30 G30 F29
L28 K31 G32 G28
K32 G31 G27
E32
FBAD<0>
0
FBAD<1>
1
FBAD<2>
2
FBAD<3>
3
FBAD<4> K27
4
FBAD<5>
5
FBAD<6>
6
FBAD<7>
7
FBAD<8>
8
FBAD<9>
9
FBAD<10>
10
FBAD<11>
11
FBAD<12>
12
FBAD<13>
13
FBAD<14> J30
14
FBAD<15>
15
FBAD<16>
16
FBAD<17>
17
FBAD<18>
18
FBAD<19>
19
FBAD<20>
20
FBAD<21>
21
FBAD<22>
22
FBAD<23>
23
FBAD<24>
24
FBAD<25>
25
FBAD<26>
26
FBAD<27>
27
FBAD<28>
28
FBAD<29>
29
FBAD<30>
30
FBAD<31>
31
FBAD<32>
32
FBAD<33>
33
FBAD<34>
34
FBAD<35>
35
FBAD<36>
36
FBAD<37>
37
FBAD<38>
38
FBAD<39>
39
FBAD<40>
40
FBAD<41>
41
FBAD<42>
42
FBAD<43>
43
FBAD<44>
44
FBAD<45> AK29
45
FBAD<46>
46
FBAD<47>
47
FBAD<48>
48
FBAD<49>
49
FBAD<50>
50
FBAD<51>
51
FBAD<52>
52
FBAD<53>
53
FBAD<54>
54
FBAD<55> AB31 U30
55
FBAD<56>
56
FBAD<57>
57
FBAD<58>
58
FBAD<59>
59
FBAD<60>
60
FBAD<61>
61
FBAD<62>
62
FBAD<63>
63
FBADQM<0>
0
FBADQM<1>
1
FBADQM<2>
2
FBADQM<3>
3
FBADQM<4>
4
FBADQM<5>
5
FBADQM<6>
6
FBADQM<7>
7
FBADQS0 FBADQS1 FBADQS2 FBADQS3 FBADQS4 FBADQS5 FBADQS6 FBADQS7
FBADQS0* M28 FBADQS1* FBADQS2* FBADQS3* FBADQS4* FBADQS5* FBADQS6* FBADQS7*
R527
1K
1%
0402
NO STUFF
12MIL
R529 C542
.1UF
6.3V 10% X7R 0402 COMMON
1K 1%
0402
NO STUFF
A12 A18 A21 A24 A27 A3 A30 A6 A9 AA32 AD32 AG32 AK32 C32 F32 J32 M32 R32
AA25 AA26 AB25 AB26 G11 G12 G15 G18 G21 G22 H11 H12 H15 H18 H21 H22 L25 L26 M25 M26 R25 R26 V25 V26
P32 U27 P31
Y31 W32 W31 T32 V27 T28 T31 U32 W29 W30 T27 V28 V30 U31 R27 V29 T30 W28 R29 R30 P29 U28 Y32 Y30 V32
P28 R28 Y27 AA27
AC27
G23
G25
G24
D31 D32
B7 A7 C7 A2 B2 C4 A5 B5
F9 F10 D12
D9 E12 D11FBCD<13>
D8
E7
F7
D6
D5
D3
E4
C3
B4 C10 B10
C8 A10 C11 C12 A11 B11 B28 C27 C26 B26 C30 B31 C29 A31 D28 D27 F26 D24 E23 E26 E24 F23 B23 A23 C25 C23 A22 C22 C21
E22 D22 D21 E21 E18 D19 D18 E19
A4 E11
F5
C9 C28 F24 C24 E20
C5 E10
E5
B8 A29 D25 B25 F20
C6
E9
E6
A8 B29 E25 A25 F21
A28
G1 G84-600-A1 BGA820 CHANGED
AA23 AB23 H16 H17 J10 J23 J24 J9 K11 K12 K21 K22 K24 K9 L23 M23 T25 U25
C13 A16 A13
B20 A19 B19 B14 E16 A14 C15 B16 F17 C19 D15 C17 A17 C16 D14 F16 C14 C18 E14 B13 E15 F15 A20 C20 A15
E13 F13 F18 E17
F12
G8
G10
G9
K26
H26
SNN_FBVTT_AA23 SNN_FBVTT_AB23 SNN_FBVTT_H16 SNN_FBVTT_H17 SNN_FBVTT_J10 SNN_FBVTT_J23 SNN_FBVTT_J24 SNN_FBVTT_J9 SNN_FBVTT_K11 SNN_FBVTT_K12 SNN_FBVTT_K21 SNN_FBVTT_K22 SNN_FBVTT_K24 SNN_FBVTT_K9 SNN_FBVTT_L23 SNN_FBVTT_M23 SNN_FBVTT_T25 SNN_FBVTT_U25
FBC_A<3> FBC_A<0> FBC_A<2> FBC_A<1>B17 FBD_A<3> FBD_A<4> FBD_A<5> FBC_BA2 FBC_CS0* FBC_WE* FBC_BA0 FBC_CKE FBC_RESET FBD_A<2> FBC_A<12> FBC_RAS* FBC_A<11> FBC_A<10> FBC_BA1 FBC_A<8> FBC_A<9> FBC_A<6> FBC_A<5> FBC_A<7> FBC_A<4> FBC_CAS* SNN_FBC_CMD26 SNN_FBC_CMD27 SNN_FBC_CMD28
FBC_CLK0 FBC_CLK0* FBC_CLK1 FBC_CLK1*
FBC_ODT_GPU
SNN_FBC_PLLVDD
FBC_PLLAVDD
GND
FBCAL_PD
FBCAL_PU
FBCAL_TERMJ26
FBA_RESET
FBA_ODT_GPU
FBC_RESET
FBC_ODT_GPU
FBD_A<5..2>
FBC_A<12..0>
3 0 2
1 3 4 5
2
12
11 10
8
9
6
5
7
4
5.2A<
5.1A<
5.1A<
5.2A<
5.2A<
5.1A<
5.2A<
5.1A<
5.3A<
5.3B<
5.3C<
5.3E<
5.1A<
5.1A<
5.4F<
5.5F<
5.5F<
5.4F<
5.4F<
5.5F<
5.4F<
5.5F<
5.3F<
5.4F<
5.4F<
5.4F<
5.4F<
5.4F<
PLACE CLOSE TO BALLS
12MIL
FBVDDQ
40.2
R539
COMMON
0402
1%
40.2R541 COMMON
0402
1%
40.2
R534
NO STUFF
0402
1%
GND
1.2V
C660 470PF 16V 10% X7R 0402 COMMON
600-10407-0001-200 A
p407_a02 myan
BEAD_0603
220R@100MHzLB503
GND
NV_CRITICAL_NETNV_IMPEDANCENET
C646
4.7UF
6.3V 10% X5R 0603 COMMON
COMMON
3 OF 18
30-NOV-2006
50OHM 2
50OHM 2
C659 .01UF 16V 10% X7R 0402 COMMON
250OHM
250OHM
PEX1V2
Page 4
PAGE 4) MEMORY PARTITION A
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
ININININININININBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIINININININININININININBIIN
IN
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
IN
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
IN
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
INININININININININININ
IN
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
INBIIN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
R528 10K 5% 0402 COMMON
0 1 2 3 4 5 6 7 8 9 10 11 12
GND
FBB_A<5..2> FBA_A<12..0>
FBA_RAS* FBA_CAS* FBA_WE* FBA_CS0*
FBA_A<0> FBA_A<1> FBA_A<2> FBA_A<3> FBA_A<4> FBA_A<5> FBA_A<6> FBA_A<7> FBA_A<8> FBA_A<9> FBA_A<10> FBA_A<11> FBA_A<12> SNN_R8_M1 SNN_R3_M1 SNN_R7_M1
FBA_BA0 FBA_BA1 FBA_BA2
FBA_CKE FBA_CLK0 FBA_CLK0*
FBA_ODT
SNN_A2_M1 SNN_E2_M1
M501 16MX16DDR2-2.5
K7 L7 K3 L8
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 R3 R7
L2 L3 L1
K2 J8 K8
K9
A2 E2
BGA84 CHANGED
FBVDDQ
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
J2
FBA_VREF1
GND
R504
0402
COMMON
R505
0402
COMMON
1K 1%
1K 1%
FBVDDQ
C506 .1UF
6.3V 10% X7R 0402 COMMON
GND
0 1 2 3 4 5 6 7 8 9 10 11 12
FBA_RAS* FBA_CAS* FBA_WE* FBA_CS0*
FBA_A<0> FBA_A<1> FBA_A<2> FBA_A<3> FBA_A<4> FBA_A<5> FBA_A<6> FBA_A<7> FBA_A<8> FBA_A<9> FBA_A<10> FBA_A<11>
FBA_A<12> SNN_R8_M2 SNN_R3_M2 SNN_R7_M2
FBA_BA0
FBA_BA1
FBA_BA2
FBA_CKE
FBA_CLK0
FBA_CLK0*
FBA_ODT
SNN_A2_M2 SNN_E2_M2
M3 16MX16DDR2-2.5
K7 L7 K3 L8
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 R3 R7
L2 L3 L1
K2 J8 K8
K9
A2 E2
BGA84 CHANGED
FBVDDQ
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
J2
FBA_VREF3
GND
0402
COMMON
0402
COMMON
FBVDDQ
R39
1K 1%
R40
1K 1%
C37 .1UF
6.3V 10% X7R 0402 COMMON
GND
FBA_RAS* FBA_CAS* FBA_WE* FBA_CS0*
FBA_A<0>
0
FBA_A<1>
1
FBB_A<2>
2
FBB_A<3>
3
FBB_A<4>
4
FBB_A<5>
5
FBA_A<6>
6
FBA_A<7>
7
FBA_A<8>
8
FBA_A<9>
9
FBA_A<10>
10
FBA_A<11>
11
FBA_A<12>
12
SNN_R8_M3 SNN_R3_M3 SNN_R7_M3
FBA_BA0 FBA_BA1 FBA_BA2
FBA_CKE FBA_CLK1 FBA_CLK1*
FBA_ODT
SNN_A2_M3 SNN_E2_M3
M4 16MX16DDR2-2.5
K7 L7 K3 L8
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 R3 R7
L2 L3 L1
K2 J8 K8
K9
A2 E2
BGA84 CHANGED
FBVDDQ
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
J2
FBA_VREF2
GND
FBVDDQ
R46
1K 1%
0402
COMMON
C61 .1UF
6.3V 10% X7R 0402 COMMON
GND
0402
COMMON
R48
1K 1%
FBA_RAS* FBA_CAS* FBA_WE* FBA_CS0*
FBA_A<0>
0
FBA_A<1>
1
FBB_A<2>
2
FBB_A<3>
3
FBB_A<4>
4
FBB_A<5>
5
FBA_A<6>
6
FBA_A<7>
7
FBA_A<8>
8
FBA_A<9>
9
FBA_A<10>
10
FBA_A<11>
11
FBA_A<12>
12
SNN_R8_M4 SNN_R3_M4 SNN_R7_M4
FBA_BA0 FBA_BA1 FBA_BA2
FBA_CKE
FBA_CLK1 FBA_CLK1*
FBA_ODT
SNN_A2_M4 SNN_E2_M4
M502
16MX16DDR2-2.5
K7 L7 K3 L8
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 R3 R7
L2 L3 L1
K2 J8 K8
K9
A2 E2
BGA84 CHANGED
FBVDDQ
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
J2
FBA_VREF4
GND
R520
0402
COMMON
R524
0402
COMMON
1K 1%
1K 1%
FBVDDQ
GND
C528 .1UF
6.3V 10% X7R 0402 COMMON
3.3D>
4.4F<
3.3D>
4.4F<
3.3D>
4.4F<
3.4D>
4.5F<
3.3D>
4.5F<
3.3D>
4.4F<
4.5F<
4.4F<
4.4F<
4.4F<
3.3D>
3.3D>
3.3D>
3.3D>
3.5D>
4.5F<
R530 10K 5% 0402 COMMON
GND
FBVDDQ
R47
0402
R49
0402
NO STUFF
60.4 COMMON
1%
0
5%
0 1 2 3 4 5 6 7
32 33 34 35 36 37 38 39
FBA_CLK0_TERM
0402 C68
.01UF 16V 10% X7R 0402 COMMON
GND
FBAD<0> H9
FBAD<3> FBAD<4> FBAD<5> FBAD<6> FBAD<7>
FBADQM<0> FBADQS0 FBADQS0*
FBAD<32> FBAD<33> FBAD<34> FBAD<35> FBAD<36> FBAD<37> FBAD<38> FBAD<39>
FBADQM<4> FBADQS4 FBADQS4*
R50
H7FBAD<1>
G8 H1 G2 F1 F9
F3 F7 E8
F9 G2 F1 G8 H9 H3 H1 H7
F3 F7 E8
60.4 COMMON
1%
M3 16MX16DDR2-2.5 BGA84 CHANGED
M4 16MX16DDR2-2.5 BGA84 CHANGED
FBA_CLK0
FBAD<63..0>
FBADQM<7..0>
4.5F<>
4.5F< 3.3A>
3.4D> 4.4F<
3.1A<>
CLOCK TERMINATIONS
FBA_CLK0*
4.4F< 3.4D>
8
FBAD<9>
9
FBAD<10>FBAD<2> H3 G8
10
FBAD<11>
11
FBAD<12>
12
FBAD<13>
13
FBAD<14>
14
FBAD<15>
15
FBADQM<1> FBADQS1 FBADQS1*
FBAD<40>
40
FBAD<41>
41
FBAD<42>
42
FBAD<43>
43
FBAD<44>
44
FBAD<45>
45
FBAD<46>
46
FBAD<47>
47
FBADQM<5> FBADQS5 FBADQS5*
M501 16MX16DDR2-2.5 BGA84
CHANGED H1FBAD<8> H7
H9 F1 H3 G2 F9
F3 F7 E8
M502 16MX16DDR2-2.5 BGA84
CHANGED D9 D1 C2 D3 B1 B9 D7 C8
B3 B7 A8
4.4F< 3.4D>
FBA_CLK1
FBAD<16>
16
FBAD<17>
17
FBAD<18> C2 FBAD<19>
19
FBAD<20>
20
FBAD<21>
21
FBAD<22>
22
FBAD<23>
23
FBADQM<2> FBADQS2 FBADQS2*
FBAD<48>
48
FBAD<49>
49
FBAD<50>
50
FBAD<51>
51
FBAD<52>
52
FBAD<53>
53
FBAD<54>
54
FBAD<55>
55
FBADQM<6> FBADQS6 FBADQS6*
FBVDDQ
R503
0
5%
0402
R502 0402
NO STUFF
1%
60.4 COMMON
FBA_CLK1_TERM
M3 16MX16DDR2-2.5 BGA84
CHANGED D3 D1
B9 B1 D7 D9 C8
B3 B7 A8
F9 F1 G2 H1 H3 G8 H7 H9
F3 F7 E8
M502 16MX16DDR2-2.5 BGA84 CHANGED
R501 0402
C502 .01UF 16V 10% X7R 0402 COMMON
GND
FBA_CLK1*
60.4 COMMON
1%
FBAD<24>
24
FBAD<25>
25
FBAD<26> D3
2618
FBAD<27>
27
FBAD<28>
28
FBAD<29>
29
FBAD<30>
30
FBAD<31>
31
FBADQM<3> FBADQS3 FBADQS3*
FBAD<56>
56
FBAD<57>
57
FBAD<58>
58
FBAD<59>
59
FBAD<60>
60
FBAD<61>
61
FBAD<62>
62
FBAD<63>
63
FBADQM<7> FBADQS7 FBADQS7*
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. Frame Buffer Partition A Memories
www.vinafix.vn
3.4D> 4.4F<
M501 16MX16DDR2-2.5 BGA84
CHANGED C8 B9
D9 D7 B1 D1 C2
B3 B7 A8
M4
16MX16DDR2-2.5
BGA84
CHANGED D1 C8 C2 D3 D9 B1 D7 B9
B3 B7 A8
4.4A<>
4.4A<
4.3A<
4.3C<
4.3C<
4.3E<
4.1A<
4.1A<
4.2A<
4.2A<
4.2A<
4.2A<
4.1A<
4.1A<
4.1A<
4.1A<
4.2A<
3.4D>
3.4D>
3.4D>
3.4D>
3.3A<>
3.4A<>
3.4A<>
3.4A<>
3.4A<>
3.4A<>
3.4A<>
3.4A<>
3.4A<>
3.4A<>
3.4A<>
3.4A<>
3.4A<>
3.4A<>
3.4A<>
3.4A<>
3.3D>
3.3D>
3.3D>
3.3D>
3.3D>
3.3D>
3.3D>
3.4D>
3.3D>
3.3D>
3.1A<>
3.3A>
3.5D>
NET
FBA_VREF1 FBA_VREF2 FBA_VREF3 FBA_VREF4
FBA_CLK0
FBA_CLK0* FBA_CLK1 FBA_CLK1*
FBADQS0 FBADQS0* FBADQS1 FBADQS1* FBADQS2 FBADQS2* FBADQS3 FBADQS3* FBADQS4 FBADQS4* FBADQS5 FBADQS5* FBADQS6 FBADQS6* FBADQS7 FBADQS7*
FBA_A<12..0>
FBB_A<5..2>
FBA_BA0
FBA_BA1
FBA_CKE FBA_BA2
FBA_RAS*
FBA_CAS*
FBA_WE*
FBA_CS0*
FBA_CS1*
FBAD<63..0>
FBADQM<7..0>
FBA_ODT
MIN_LINE_WIDTH
16MIL 16MIL 16MIL
DIFFPAIRNET FBA_CLK0
FBA_CLK0 FBA_CLK1 FBA_CLK1 FBADQS0 FBADQS0 FBADQS1 FBADQS1 FBADQS2 FBADQS2 FBADQS3 FBADQS3 FBADQS4 FBADQS4 FBADQS5 FBADQS5 FBADQS6 FBADQS6 FBADQS7 FBADQS7
16MIL
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2
2 2 2 2
2 2 2 2 2
2 2
2
600-10407-0001-200 A
p407_a02 myan
VOLTAGE
0.9V
0.9V
0.9V
0.9V
IMPEDANCECRITICAL
100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF
56OHM 56OHM
56OHM 56OHM 56OHM 56OHM
56OHM 56OHM 56OHM 56OHM 56OHM
50OHM 50OHM
56OHM
4 OF 18
30-NOV-2006
Page 5
PAGE 5) MEMORY PARTITION C
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
INININININBIINININBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIININININININININININBIININ
IN
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
IN
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
IN
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
1/2
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VDDQ
VSS
VSS
VSS VSS VSS
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
VSSQ
VSSQ VSSQ
VSSQ
VSSQ
Vref
VSSL
A<0>
A<3> A<4>
A<2>
A<1>
CS
RAS WE
CAS
A<5>
A<11>
A<9>
NC/A<13>
A<10> A<12> NC/A<14>
A<6> A<7> A<8>
NC/A<15>
NC/BA<2>
BA<1>
BA<0>
CKE CLK
CLK
ODT
NC NC
INININININININININININ
IN
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
2/2
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<0> DQ<1> DQ<2>
DQ<7> DQM
DQS DQS
INBIIN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
GND
0 1 2 3 4 5 6 7 8 9 10 11 12
FBD_A<5..2> FBC_A<12..0>
FBC_RAS* FBC_CAS* FBC_WE* FBC_CS0*
FBC_A<0> FBC_A<1> FBC_A<2> FBC_A<3> FBC_A<4> FBC_A<5> FBC_A<6> FBC_A<7> FBC_A<8> FBC_A<9> FBC_A<10> FBC_A<11>
FBC_A<12> SNN_R8_M5 SNN_R3_M5 SNN_R7_M5
FBC_BA0
FBC_BA1
FBC_BA2
FBC_CKE
FBC_CLK0
FBC_CLK0*
FBC_ODT
SNN_A2_M5 SNN_E2_M5
M504 16MX16DDR2-2.5
K7 L7 K3 L8
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 R3 R7
L2 L3 L1
K2 J8 K8
K9
A2 E2
BGA84 CHANGED
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
J2
FBVDDQ
FBC_VREF1
R558
0402
COMMON
R559
0402
COMMON
FBVDDQ
1K 1%
1K 1%
M1 16MX16DDR2-2.5
FBC_RAS* FBC_CAS* FBC_WE* FBC_CS0*
FBC_A<0>
0
FBC_A<1>
1
FBC_A<2>
2
FBC_A<3>
3
FBC_A<4>
4
FBC_A<5>
5
FBC_A<6>
6
FBC_A<7>
7
FBC_A<8>
8
FBC_A<9>
9
FBC_A<10>
10
FBC_A<11>
11
FBC_A<12>
12
SNN_R8_M6 SNN_R3_M6 SNN_R7_M6
FBC_BA0 FBC_BA1 FBC_BA2
GND
C678 .1UF
6.3V 10% X7R 0402 COMMON
GND
FBC_CKE FBC_CLK0 FBC_CLK0*
FBC_ODT K9
SNN_E2_M6
K7 L7 K3 L8
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 R3 R7
L2 L3 L1
K2 J8 K8
A2SNN_A2_M6 E2
BGA84 CHANGED
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
J2
FBVDDQ
FBC_VREF3
0402
COMMON
0402
COMMON
R30
R27
1K 1%
1K 1%
GND
FBVDDQ
FBC_RAS* FBC_CAS* FBC_WE* FBC_CS0*
2 3 4 5
FBC_A<0> FBC_A<1> FBD_A<2> FBD_A<3> FBD_A<4> FBD_A<5> FBC_A<6> FBC_A<7> FBC_A<8> FBC_A<9> FBC_A<10> FBC_A<11>
FBC_A<12> SNN_R8_M7 SNN_R3_M7 SNN_R7_M7
FBC_BA0
FBC_BA1
FBC_BA2 L1
FBC_CKE
FBC_CLK1K8J8
FBC_CLK1*
FBC_ODT K9
SNN_A2_M7E2A2 SNN_E2_M7
0 1
6 7 8 9 10 11 12
C16 .1UF
6.3V 10% X7R 0402 COMMON
GND
M2 16MX16DDR2-2.5
K7 L7 K3 L8
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 R3 R7
L2 L3
K2
BGA84 CHANGED
FBVDDQ
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
J2
FBC_VREF2
GND
0402
COMMON
0402
COMMON
R35
R36
1K 1%
1K 1%
FBVDDQ
0 1
6 7 8 9 10 11 12
GND
2 3 4 5
C25 .1UF
6.3V 10% X7R 0402 COMMON
FBC_RAS* FBC_CAS* FBC_WE* FBC_CS0*
FBC_A<0> FBC_A<1> FBD_A<2> FBD_A<3> FBD_A<4> FBD_A<5> FBC_A<6> FBC_A<7> FBC_A<8> FBC_A<9> FBC_A<10> FBC_A<11>
FBC_A<12> SNN_R8_M8 SNN_R3_M8 SNN_R7_M8
FBC_BA0
FBC_BA1
FBC_BA2 L1
FBC_CKE
FBC_CLK1
FBC_ODT K9
SNN_A2_M8 SNN_E2_M8
K7 L7 K3 L8
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 R3 R7
L2 L3
K2 J8 K8FBC_CLK1*
A2 E2
M503 16MX16DDR2-2.5
BGA84 CHANGED
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
J1
A3 E3 J3 N1 P9
A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
J2
FBVDDQ
FBC_VREF4
R532
0402
COMMON
1K 1%
GND
FBVDDQ
1K
1%
0402 COMMON
GND
R542
C567 .1UF
6.3V 10% X7R 0402 COMMON
3.3H>
5.4F<
3.3H>
5.4F<
3.3H>
5.5F<
3.4H>
5.5F<
3.3H>
5.5F<
3.3H>
5.5F<
3.3H>
5.4F<
3.3H>
5.4F<
3.3H>
5.4F<
3.3H>
5.4F<
3.5D>
5.5F<
R546 10K 5%
COMMON
R544 10K 5% 04020402 COMMON
GND
FBVDDQ
R28
0
5%
0402
5.5F<>
3.4H> 5.3F<
3.1E<>
3.3E> 5.5F<
FBC_CLK0
FBCD<63..0>
FBCDQM<7..0>
0402
R29
NO STUFF
1%
60.4 COMMON
FBC_CLK0_TERM
0 1 2 3 4 5 6 7
32 33 34 35 36 37 38 39
R32
0402
1%
C18 .01UF 16V 10% X7R 0402 COMMON
GND
FBCD<0> FBCD<1> FBCD<2> FBCD<3> FBCD<11> G2D1 FBCD<4> FBCD<5> FBCD<6> FBCD<7>
FBCDQM<0> FBCDQS0 FBCDQS0*
FBCD<32> FBCD<33> FBCD<34> FBCD<35> FBCD<36> FBCD<37> FBCD<38> FBCD<39>
FBCDQM<4> FBCDQS4
60.4 COMMON
M504 16MX16DDR2-2.5 BGA84
CHANGED B9 D7 D9
B1 C2 D3 C8
B3 B7 A8
M2
16MX16DDR2-2.5
BGA84
CHANGED C8 B9 D9 D7 D1 B1 D3 C2
B3 B7 A8FBCDQS4*
CLOCK TERMINATIONS
FBC_CLK0*
5.4F< 3.4H>
FBCD<8>
8
FBCD<9>
9
FBCD<10>
10 11
FBCD<12>
12
FBCD<13>
13
FBCD<14>
14
FBCD<15>
15
FBCDQM<1> FBCDQS1 FBCDQS1*
FBCD<40>
40
FBCD<41>
41
FBCD<42>
42
FBCD<43>
43
FBCD<44>
44
FBCD<45>
45
FBCD<46>
46
FBCD<47>
47
FBCDQM<5> FBCDQS5
5.4F< 3.4H>
M1 16MX16DDR2-2.5 BGA84
CHANGED H1 G8 H7
H9 H3 F9 F1
F3 F7 E8
M503
16MX16DDR2-2.5
BGA84
CHANGED C8 D7 B9 C2 B1 D3 D9 D1
B3 B7 A8FBCDQS5*
FBC_CLK1
16 17 18 19 20 21 22 23
48 49 50 51 52 53 54 55
FBCDQM<6> FBCDQS6 FBCDQS6*
FBVDDQ
R531
0
5%
0402
NO STUFF
60.4
R536
COMMON
0402
1%
FBCD<17> FBCD<18> FBCD<19> D3 FBCD<20> FBCD<21> FBCD<22> FBCD<23>
FBCDQM<2> FBCDQS2 FBCDQS2*
FBCD<48> FBCD<49> FBCD<50> FBCD<51> FBCD<52> FBCD<53> FBCD<54> FBCD<55>
www.vinafix.vn
FBC_CLK1_TERM
M1 16MX16DDR2-2.5 BGA84
CHANGED D1FBCD<16> C2 B1
D9 B9 C8 D7
B3 B7 A8
M2
16MX16DDR2-2.5
BGA84
CHANGED G2 F9 F1 H3 H9 G8 H1 H7
F3 F7 E8
R540
COMMON
0402
1%
C580 .01UF 16V 10% X7R 0402 COMMON
GND
24
FBCD<25>
25
FBCD<26>
26
FBCD<27> G8
27
FBCD<28>
28
FBCD<29>
29
FBCD<30>
30
FBCD<31>
31
FBCDQM<3> FBCDQS3 FBCDQS3*
FBCD<56>
56
FBCD<57>
57
FBCD<58>
58
FBCD<59>
59
FBCD<60>
60
FBCD<61>
61
FBCD<62>
62
FBCD<63>
63
FBCDQM<7> FBCDQS7 FBCDQS7*
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. Frame Buffer Partition C Memories
3.4H> 5.4F<
M504 16MX16DDR2-2.5 BGA84
CHANGED F9FBCD<24> G2 F1
H9 H1 H7 H3
F3 F7 E8
M503
16MX16DDR2-2.5
BGA84
CHANGED F9 G2 G8 F1 H1 H9 H7 H3
F3 F7 E8
FBC_CLK1*
60.4
5.4A<>
5.4A<
5.1A<
5.1A<
5.2A<
5.2A<
5.2A<
5.2A<
5.1A<
5.1A<
5.1A<
5.1A<
5.3A< 3.4H>
3.4H>
5.3B<
3.4H>
5.3C<
3.4H>
5.3E<
3.3E<>
3.4E<>
3.4E<>
3.4E<>
3.4E<>
3.4E<>
3.4E<>
3.4E<>
3.4E<>
3.4E<>
3.4E<>
3.4E<>
3.4E<>
3.4E<>
3.4E<>
3.4E<>
3.3H>
3.3H>
3.3H>
3.3H>
3.3H>
3.3H>
3.3H>
3.4H>
3.3H>
3.3H>
3.1E<>
3.3E>
3.5D> 5.2A<
NET
FBC_VREF1 FBC_VREF2 FBC_VREF3 FBC_VREF4
FBC_CLK0 FBC_CLK0 FBC_CLK0* FBC_CLK1
FBC_CLK1* FBCDQS0 FBCDQS0* FBCDQS1 FBCDQS1* FBCDQS2 FBCDQS2* FBCDQS3 FBCDQS3* FBCDQS4 FBCDQS4* FBCDQS5 FBCDQS5* FBCDQS6 FBCDQS6* FBCDQS7 FBCDQS7*
FBC_A<12..0>
FBD_A<5..2>
FBC_BA0 FBC_BA1 FBC_CKE
FBC_BA2
FBC_RAS* FBC_CAS* FBC_WE* FBC_CS0* FBC_CS1*
FBCD<63..0> FBCDQM<7..0>
FBC_ODT
DIFFPAIRNET
FBC_CLK0 FBC_CLK1 FBC_CLK1 FBCDQS0 FBCDQS0 FBCDQS1 FBCDQS1 FBCDQS2 FBCDQS2 FBCDQS3 FBCDQS3 FBCDQS4 FBCDQS4 FBCDQS5 FBCDQS5 FBCDQS6 FBCDQS6 FBCDQS7 FBCDQS7
MIN_LINE_WIDTH
16MIL 16MIL 16MIL 16MIL
600-10407-0001-200 A
p407_a02 myan
CRITICAL
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2
2
2 2 2 2
2 2 2 2 2
2 2
2
VOLTAGE
0.9V
0.9V
0.9V
0.9V
IMPEDANCE
100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF 100DIFF
56OHM
56OHM
56OHM 56OHM 56OHM 56OHM
56OHM 56OHM 56OHM 56OHM 56OHM
50OHM 50OHM
56OHM
5 OF 18
30-NOV-2006
Page 6
PAGE 6) MEMORY DECOUPLING CAPS
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
DECOUPLING CAPS FOR MEMORYS (PARTION A AND PARTION C)
FBVDDQ
C595 .1UF
6.3V 10% X7R 0402 COMMON
NVVDD
C13 .1UF
6.3V 10% X7R 0402 COMMON
C30 .1UF
6.3V 10% X7R 0402 COMMON
C628 .1UF
6.3V 10% X7R 0402 COMMON
C630 .1UF
6.3V 10% X7R 0402 COMMON
GND
C9 .1UF
6.3V 10% X7R 0402 COMMON
C31 .1UF
6.3V 10% X7R 0402 COMMON
NVVDD TRANSITION CAP NEAR BY PARTION A
FBVDDQ
FBVDDQ
C508 .1UF
6.3V 10% X7R 0402 COMMON
C691 .1UF
6.3V 10% X7R 0402 COMMON
C592 .1UF
6.3V 10% X7R 0402 0402 COMMON
C527 .1UF
6.3V 10% X7R 0402 COMMON
C690 .1UF
6.3V 10% X7R 0402 COMMON
C555 .1UF
6.3V 10% X7R
COMMON
C510 .1UF
6.3V 10% X7R 0402 COMMON
C692 .1UF
6.3V 10% X7R 0402 COMMON
C544
C556
.1UF .1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C509
C530
.1UF .1UF
6.3V 6.3V 10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C653
C657
.1UF .1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
GND
C549
4.7UF
6.3V 10% X5R 0603 COMMON
C501
4.7UF
6.3V 10% X5R 0603 COMMON
C694
4.7UF
6.3V 10% X5R 0603 COMMON
FBVDDQ
FBVDDQ
FBVDDQ
C36 .1UF
6.3V 10% X7R 0402 COMMON
C23 .1UF
6.3V 10% X7R 0402 COMMON
C60 .1UF
6.3V 10% X7R 0402 COMMON
C58 .1UF
6.3V 10% X7R 0402 COMMON
C24 .1UF
6.3V 10% X7R 0402 COMMON
C39 .1UF
6.3V 10% X7R 0402 COMMON
C54 .1UF
6.3V 10% X7R 0402 COMMON
C28 .1UF
6.3V 10% X7R 0402 COMMON
C63 .1UF
6.3V 10% X7R 0402 COMMON
C38
C59
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C26
C29
.1UF
.1UF
6.3V 6.3V 10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C62
C40
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
GND
C64
4.7UF
6.3V 10% X5R 0603 COMMON
C22
4.7UF
6.3V 10% X5R 0603 COMMON
C69
4.7UF
6.3V 10% X5R 0603 COMMON
NVVDD
C55 .1UF
6.3V 10% X7R 0402 COMMON
C46 .1UF
6.3V 10% X7R 0402 COMMON COMMON
C65 .1UF
6.3V 10% X7R 0402
C512 .1UF
6.3V 10% X7R 0402 COMMON
GND
C519 .1UF
6.3V 10% X7R 0402 COMMON
NVVDD TRANSITION CAP NEAR BY PARTION C
C529 .1UF
6.3V 10% X7R 0402 COMMON
GND
FBVDDQ
C525 .1UF
6.3V 10% X7R X7R 0402 COMMON
C505 .1UF
6.3V 10%
0402 COMMON
C513 .1UF
6.3V 10% X7R 0402 COMMON
C526 .1UF
6.3V 10% X7R 0402 COMMON
C507 .1UF
6.3V 10% X7R 0402 COMMON
C504
4.7UF
6.3V 10% X5R 0603 COMMON
FBVDDQ
C15 .1UF
6.3V 10% X7R 0402 COMMON
C14 .1UF
6.3V 10% X7R 0402 COMMON
C21 .1UF
6.3V 10% X7R 0402 COMMON
GND
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. Memory Decoupling Caps
www.vinafix.vn
C19 .1UF
6.3V 10% X7R 0402 COMMON
C8 .1UF
6.3V 10% X7R 0402 COMMON
GND
GND
C11
4.7UF
6.3V 10% X5R 0603 COMMON
600-10407-0001-200 A
p407_a02 myan
6 OF 18
30-NOV-2006
Page 7
IN
OUTININ
OUTBIOUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUTBIOUT
4/14 DACA
DACA_VSYNC
DACA_HSYNC
I2CA_SDA
I2CA_SCL
DACA_IDUMP
DACA_BLUE
DACA_GREEN
DACA_RED
DACA_RSET
DACA_VREF
DACA_VDD
5/14 DACB(TV)
DACB_CSYNC
DACB_RED
DACB_GREEN
DACB_BLUE
DACB_IDUMP
DACB_RSET
DACB_VREF
DACB_VDD
6/14 DACC
DACC_VSYNC
DACC_HSYNC
I2CB_SDA
I2CB_SCL
DACC_IDUMP
DACC_BLUE
DACC_GREEN
DACC_RED
DACC_RSET
DACC_VREF
DACC_VDD
13/14 XTAL_PLL
XTALOUTBUFF
XTALOUT
PLLGND
VID_PLLVDD
PLLAVDD
XTALIN
XTALSSIN
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
DAC A
I2CA_SCL
K2
I2CA_SDA
J3
DACA_HSYNC
AF10
DACA_VSYNC
AK10
DACA_RED
AH11
DACA_GREEN
AJ12
DACA_BLUE
AH12
AG9
GND
R586 0402
5%
NV_IMPEDANCE
50OHM
50OHM
50OHM
33 COMMON
R587 0402
5%
33 COMMON
3V3RUN
R597
2.2K 5% 0402 COMMON
NV_CRITICAL
R554 150 150 1% 0402 COMMON
R550 1%
0402 COMMON
1
1
1
3V3RUN
R598
2.2K 5% 0402 COMMON
R549 150 1% 0402 COMMON
I2CA_SCL_R I2CA_SDA_R
Place close to GPU
9.3B<
9.3B<>
9.3B<
9.3B<
9.3B<
9.3B<
9.3B<
C676 470PF
0402 COMMON
12MIL
12MIL
12MIL
G1 G84-600-A1 BGA820 CHANGED
DACA_VDD
DACA_VREF
DACA_RSET
R564 124 1%
10%16V
0402X7R COMMON
AD10
AH10
AH9
PAGE 7) DAC_A, DAC_B, DAC_C, PLL, CRYSTAL
3V3RUN
C656 .1UF
0402 COMMON
3.3V
10%6.3V
C669 .01UF 16V X7R 0402 COMMON
10%
LB506
BEAD_0603
220R@100MHz
COMMON
GND
C701
4.7UF 10%6.3V
X5R X7R 0603 COMMON
G1
3V3RUN
12MIL
DACB_VDD
12MIL
DACB_VREF
12MIL
R561
C689
124
470PF
1%
10%
16V
0402
X7R
COMMON
0402 COMMON
12MIL
DACC_VDD
1K COMMON
1%
12MIL
C649 470PF 16V 10% X7R 0402 COMMON
SNN_DACC_VREF
PLLVDD
SSFOUT
C6 18PF 50V 5% C0G 0402 COMMON
GND
C667 .1UF
6.3V X7R 0402 COMMON
3.3V
10%
C668 .01UF 16V X7R 0402 COMMON
R566 0402
10%
LB511
BEAD_0603
220R@100MHz
COMMON
C699
4.7UF 10%
6.3V
X5R 0603 COMMON
GND
GND
PEX1V2
10%
7.5G<
1.2V
C662 .01UF 16V 10% X7R 0402 COMMON
COMMONBEAD_0603
GND
220R@100MHz
C651
4.7UF
6.3V X5R 0603 COMMON
11.2E>
LB504
G84-600-A1 BGA820 CHANGED
V8
R5
R7DACB_RSET
G1 G84-600-A1 BGA820 CHANGED
AD7
AH4
AF5SNN_DACC_RSET
G1 G84-600-A1 BGA820 CHANGED
T9
T10
U10
GND
T1
U1XTALIN
DAC B
SNN_DACB_CSYNC
U5
DACB_REDR6
DACB_GREEN
T5
DACB_BLUET6
V7
GND
DAC C
H4
I2CB_SCL
J4 I2CB_SDA
SNN_DACC_HSYNC
AG7
SNN_DACC_VSYNC
AG5
SNN_DACC_RED
AF6
SNN_DACC_GREEN
AG6
SNN_DACC_BLUE
AE5
AG4
GND
CRYSTAL AND PLL
BXTALOUTT2
XTALOUT
U2
XTAL_4PIN
27 MHZ
Y1
1
3
10 PPM
H10SSMD
COMMON
GND
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. DACs, Clock-Generation
www.vinafix.vn
C2 18PF 50V 5% C0G 0402 COMMON
NV_IMPEDANCE
50OHM
50OHM 50OHM
R578 0402
5%
150OHM
GND
R577 0402
33 COMMON
R17 10K 5% 0402 COMMON INTERNAL SS : STUFF EXTERNAL SS : NO STUFF
GND
GND
GND
NV_CRITICAL
1
1
1
R556
R567
R563 150 1% 0402 COMMON
GND
33 COMMON
5%
150 1% 0402 COMMON
150
Place close to GPU
1% 0402 COMMON
3V3RUN
GNDGND
R593
2.2K 5% 0402 COMMON
3V3RUN
R596
2.2K 5% 0402 COMMON
9.2B<
9.2B<
9.3B<
I2CB_SCL_R I2CB_SDA_R
9.2B<
9.2B<>
DAC V_REFERENCE OPTION
5%
5%
0 NO STUFF
0 NO STUFF
DACA_VREF
DACB_VREF
NV_CRITICAL_NETNV_IMPEDANCENV_NET_NAME
1 1
1 1
7 OF 18
0402
14.4H>
DAC_VREF
R552 0402
0402
R25
THESE 2 RESISTOR SHOULD BE PLACED NEAR TO GPU
XTALOUTBUFF
22
R13
NO STUFF
5%
11.2B< 7.5G>
11.2B< 7.4F>
11.2E> 7.4C<
XTALOUT XTALIN
XTALOUTBUFF SSFOUT
50OHM 50OHM
50OHM 50OHM
600-10407-0001-200 A
p407_a02 myan 30-NOV-2006
Page 8
PAGE 8) LVDS(LINK A/B), TMDS(LINK C/D)
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
7/14 IFPAB
IFPA_TXC IFPA_TXC
IFPA_TXD0 IFPA_TXD0
IFPA_TXD1 IFPA_TXD1
IFPA_TXD2 IFPA_TXD2
IFPA_TXD3
IFPA_TXD3
IFPB_TXC IFPB_TXC
IFPB_TXD4 IFPB_TXD4
IFPB_TXD5 IFPB_TXD5
IFPB_TXD6 IFPB_TXD6
IFPB_TXD7
IFPB_TXD7
IFPAB_PLLGND
IFPAB_PLLVDD
IFPAB_RSET
IFPAB_VPROBE
IFPB_IOVDD
IFPA_IOVDD
8/14 IFPCD
IFPC_TXC IFPC_TXC
IFPC_TXD0
IFPC_TXD2
IFPC_TXD2
IFPC_TXD1
IFPC_TXD1
IFPC_TXD0
IFPD_TXC IFPD_TXC
IFPD_TXD4
IFPD_TXD6
IFPD_TXD6
IFPD_TXD5
IFPD_TXD5
IFPD_TXD4
IFPCD_PLLGND
IFPCD_PLLVDD
IFPCD_RSET
IFPCD_VPROBE
IFPD_IOVDD
IFPC_IOVDD
S
D
G
IN
D
S
G
D
S
G
S
D
G
IN
S
D
G
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
G1 G84-600-A1 BGA820 CHANGED
C664 470PF 16V 10% X7R 0402 COMMON
C671 .01UF 16V 10% X7R 0402 COMMON
AM4
AL5IFPABRSET
AD9
AF9
AF8
1K
R569
COMMON
0402
1V8RUN
LB505
220R@100MHz
COMMON
220R@100MHz
COMMONBEAD_0603
GND
C686
4.7UF
6.3V 10% X5R 0603 COMMON
GND
LB508
BEAD_0603
C702
4.7UF
6.3V 10% X5R 0603
16MIL
COMMON
GND
1.8V
C712
4.7UF
6.3V 10% X5R 0603 COMMON
GND
1V8RUN
14.2A>
LVDS POWER SEQUENCE
FB_PWRGOOD
1G1D1S
GND
1
C706 .1UF
6.3V 10% X7R 0402 COMMON
3
Q512 RTR040N03 SOT23_1G1D1S COMMON
LVDS_IOVDD
2
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=4A@25C [email protected] MAX_CURRENT=16A MAX_WATTAGE=1W@25C V_BE_GS=12V
1%
GND
1.8V
C698
4.7UF
6.3V 10% X5R 0603 COMMON
1.8V
C687 .1UF
6.3V 10% X7R 0402 COMMON
12MIL
12MIL
12MIL
C663 .01UF 16V 10% X7R 0402 COMMON
C677 .01UF 16V 10% X7R 0402 COMMON
SNN_IFPABVPROBE
IFPABPLLVDD AC9
IFPABIOVDD
LVDS
NET NAME
AJ9 AK9
AJ6 AH6
AH7 AH8
AK8 AJ8
AH5 AJ5
AL4 AK4
AM5 AM6
AL7 AM7
AK5 AK6
AL8 AK7
IFPATXC* IFPATXC
IFPATXD0* IFPATXD0
IFPATXD1* IFPATXD1
IFPATXD2* IFPATXD2
IFPATXD3* IFPATXD3
IFPBTXC* IFPBTXC
IFPBTXD4* IFPBTXD4
IFPBTXD5* IFPBTXD5
IFPBTXD6* IFPBTXD6
IFPBTXD7* IFPBTXD7
IFPATXC 1
IFPATXD1
IFPATXD2 IFPATXD2
IFPATXD3 IFPATXD3
IFPBTXC IFPBTXC
IFPBTXD4 IFPBTXD4
IFPBTXD5 IFPBTXD5
IFPBTXD6 IFPBTXD6
IFPBTXD7 IFPBTXD7
1IFPATXC
1IFPATXD0 1IFPATXD0
1IFPATXD1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
NV_IMPEDANCENV_CRITICAL_NETDIFFPAIR
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
9.4G<
9.4G<
9.4G<
9.4G<
9.4G<
9.4G<
9.4G<
9.4G<
9.4G<
9.4G<
9.4G<
9.4G<
9.3G<
9.3G<
9.3G<
9.3G<
9.4G<
9.4G<
9.4G<
9.4G<
G1 G84-600-A1 BGA820 CHANGED
C666C683 470PF 16V 10% X7R 0402 COMMON
AK3
AH3
AA10
AB10
AD6
AE7
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. LVDS, TMDS GPU Interface
1K
R568
COMMON
GND
GND
220R@100MHz COMMON
220R@100MHz COMMON
C711
4.7UF
6.3V 10% X5R 0603 COMMON
C695
4.7UF
6.3V 10% X5R 0603 COMMON
C697
4.7UF
6.3V 10% X5R 0603 COMMON
0402
1%
1.8V
3.3V
3.3V
1V8RUN
BEAD_0603
R605 0 5% 0603 NO STUFF
LB510
BEAD_0603
COMMON
LB507
C708 .1UF
6.3V 10% X7R 0402 COMMON
220R@100MHz
LB512
BEAD_0603
TMDS BACKDRIVE PREVENTION
RUNPWROK*
1RUNPWROK
1
3
Q1 RHU002N06 SOT323_1G1D1S COMMON
2
MAX_VOLTAGE=60V CONTINUOUS_CURRENT=200mA R_DS_ON=4R MAX_CURRENT=800mA MAX_WATTAGE=200mW V_BE_GS=+/-20V
GND
DVI_B_EN*
3
Q3 RHU002N06 SOT323_1G1D1S COMMON
2
MAX_VOLTAGE=60V CONTINUOUS_CURRENT=200mA R_DS_ON=4R MAX_CURRENT=800mA MAX_WATTAGE=200mW V_BE_GS=+/-20V
GND
1G1D1S
14.4C< 13.2B< 11.2B< 9.4A>
1G1D1S
10.3F>
GPIO1_DVI_B_HPD
1G1D1S
0402
3V3RUN
3
Q2 SI2305DS
SOT23_1G1D1S
COMMON
1
MAX_VOLTAGE=-8V CONTINUOUS_CURRENT=-2.8A@70C
2
R_DS_ON=52mR MAX_CURRENT=-6A MAX_WATTAGE=0.8W@70C V_BE_GS=+/-8V
TMDS_IOVDD
10K
R4
COMMON
R616 0402
5%
1K COMMON
1%
DVIB_EN*
C710
.1UF
6.3V X7R 10% 0402 COMMON
REDUCE INRUSH CURRENT
1
1G1D1S
Q508 SI2305DS
SOT23_1G1D1S COMMON
V_BE_GS=+/-8V MAX_WATTAGE=0.8W@70C MAX_CURRENT=-6A R_DS_ON=52mR CONTINUOUS_CURRENT=-2.8A@70C MAX_VOLTAGE=-8V
3.3V
R617
0402
2
TMDSD_IOVDD
3
12MIL
16MIL
10K COMMON
5%
3.3V
SNN_IFPCDVPROBE
12MIL
IFPCDBRSET
12MIL
IFPCDPLLVDD
.01UF 16V 10% X7R 0402 COMMON
12MIL
IFPC_IOVDD
C688 .1UF
6.3V 10% X7R 0402 COMMON
12MIL
C682 .1UF
6.3V 10% X7R 0402 COMMON
C685 .01UF 16V 10% X7R 0402 COMMON
GND
IFPD_IOVDD
C675 .01UF 16V 10% X7R 0402 COMMON
GND
www.vinafix.vn
TMDS
NV_IMPEDANCENV_CRITICAL_NETDIFFPAIRNET NAME
AM3 AM2
AE1 AE2
AF2 AF1
AH1 AG1
AH2 AG3
AJ1 AK1
AL1 AL2
AJ3 AJ2
IFPCTXC* IFPCTXC
IFPCTXD0* IFPCTXD0
IFPCTXD1* IFPCTXD1
IFPCTXD2* IFPCTXD2
IFPDTXC* IFPDTXC
IFPDTXD3* IFPDTXD3
IFPDTXD4* IFPDTXD4
IFPDTXD5* IFPDTXD5
IFPCTXC IFPCTXC
IFPCTXD0 IFPCTXD0
IFPCTXD1 IFPCTXD1
IFPCTXD2 IFPCTXD2
IFPDTXC IFPDTXC
IFPDTXD3 IFPDTXD3
IFPDTXD4 IFPDTXD4
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1IFPDTXD5 1IFPDTXD5
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
100DIFF 100DIFF
9.2G<
9.2G<
9.2G<
9.2G<
9.2G<
9.2G<
9.2G<
9.2G<
9.3G<
9.3G<
9.2G<
9.2G<
9.2G<
9.2G<
9.2G<
9.2G<
600-10407-0001-200 A
p407_a02 myan
8 OF 18
30-NOV-2006
Page 9
PAGE 9) MXM CONNECTOR
OUT
OUTBIININININININININININININININININBIBIBIBIBIININININININININININININININININININININ
SLI
DVI-A
DVI-B
2/2 IO - LVDS,DVI,VGA,TV
HDTVSDTV
DVI_A_CLK
DVI_B_TX2
DVI_A_TX2
DVI_A_TX2
DVI_A_TX1 DVI_A_TX1
DVI_A_TX0 DVI_A_TX0
DVI_A_CLK
DVI_B_TX2
DR_D8
DR_SWAP_RDY
DVI_B_TX1
DVI_B_TX1
DVI_B_TX0
DVI_B_TX0
DR_D3
DR_D2
DR_D1
DR_D0
DR_RASTER_SYNC
DR_D6
DR_D5
DR_D4
DR_D9
DR_D7
DR_D10
LVDS_UTX0
LVDS_UTX0
LVDS_UTX2 LVDS_UTX2
LVDS_UTX3
LVDS_UTX1
LVDS_UTX1
DR_CLK
DR_REFCLK
DR_D14 DR_CMD
DR_D11 DR_D13
DR_D12GND
LVDS_UTX3 LVDS_UCLK
LVDS_UCLK
LVDS_LTX0
LVDS_LTX0
LVDS_LTX1 LVDS_LTX1
LVDS_LTX2
LVDS_LTX3
LVDS_LTX2
LVDS_LCLK
LVDS_LTX3
LVDS_LCLK
DVI_B_CLK DVI_B_CLK
DVI_B_TX1
DVI_B_TX1
DVI_B_TX2
DVI_B_TX0
DVI_B_TX0
DVI_B_TX2
DVI_B_HPD
DVI_A_HPD
DDCB_SDATA
DDCB_SCLK
HDTV_Y
HDTV_Pb
HDTV_PrTV_C
TV_CVBS
TV_Y
HSYNC
VSYNC
VGA_BLU
VGA_GRN
VGA_RED
DDCA_SCLK DDCA_SDATA
DDCC_SDATA
LVDS_BLEN
DDCC_SCLK
LVDS_PPEN LVDS_BL_BRGHT
SPDIF
RUNPWROK AC/BATT*
THERM
SMB_DAT SMB_CLK
OUTINBI
OUTININININININININBIINININININBIBI
OUTINOUT
OUT
OUT
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
3V3RUN
1V8RUN
2V5RUN
5VRUN
PWR_SRC
3V3RUN
1V8RUN
2V5RUN
5VRUN
PWR_SRC
GND
3.3V
1.8V
2.5V
5V
22V
0V
12MIL
12MIL
12MIL
16MIL
16MIL
12MIL
1.5A
3.5A
0.5A
0.5A
4A
50A
3V3RUN
1V8RUN
2V5RUN
5VRUN
PWR_SRC
NV_NET_MAX_CURRENTMIN_WIDTH_LINEVOLTAGENET
8.4A< 13.2B< 11.2B< 14.4C<
RUNPWROK
GND
50OHM
50OHM
10.3F<>
11.4C<>
2V5RUN
R18 10K 5% 0402 COMMON
SPDIF
SPDIF_IN
MXM CONNECTOR
CN1 CON_MXM_X16_EDGE (N,NON)PHY(-X16,-HE)_SLI NPHY-X16_SLI NO STUFF
219
10.3H<
7.3G>
7.3G<>
10.3H<
7.2F>
7.2F>
7.3F>
7.1F>
7.1F>
7.1F>
7.1F>
7.2F>
7.1F>
7.1F<>
10.3F>
10.3F>
10.3F>
10.3F>
11.2B<
10.3F<>
11.2B<>
10.2A<>
10.2A<
1K
R38
COMMON
0402
1%
C33 1000PF 50V 10% X7R 0402 COMMON
GND
MOSFET GatesESD Protection for
10.2F>
10.3F<
2.5G<
9.1G>
SPDIF_IN
DVI_A_HPD
I2CB_SCL_R I2CB_SDA_R
DVI_B_HPD
DACB_GREEN
DACB_RED
DACB_BLUE
DACA_VSYNC DACA_HSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
I2CA_SCL_R I2CA_SDA_R
GPIO3_PPEN GPIO4_BLEN GPIO2_BL_PWM
I2CC_SCL_R I2CC_SDA_R
SMB_DAT SMB_CLK
THERM_ALERT*
RUNPWROK_IN GPIO_AC_BATT*
R565 0402
1%
49.9 COMMON
SPDIF
217
232 230
193
140
136
144
153 151
152
156
155 157
224 228 226
222 220
145 147
149
16
169
170
221
237 239
231 233
225 227
201 203
207 209
213 215
189 191
185 183 181 179
175 173 167 165 163 161 159 187 195 197 143 141 171
186 184
180 178
174 172
168 166
162 160
216 214
210 208
204
198 196
192 190
IFPCTXC* IFPCTXC
IFPCTXD0* IFPCTXD0
IFPCTXD1* IFPCTXD1
IFPCTXD2* IFPCTXD2
IFPDTXD5* IFPDTXD5
IFPDTXD4* IFPDTXD4
IFPDTXD3* IFPDTXD3
IFPDTXC* IFPDTXC
SLI_D<0> SLI_D<1> SLI_D<2> SLI_D<3> SLI_D<4>148 177 SLI_D<5> SLI_D<6> SLI_D<7> SLI_D<8> SLI_D<9> SLI_D<10> SLI_D<11> SLI_D<12>
SLI_D<13> SLI_D<14> SLI_DE SLI_REFCLK
SLI_CLKOUT
IFPBTXD4 IFPBTXD4*
IFPBTXD5 IFPBTXD5*
IFPBTXD6 IFPBTXD6*
IFPBTXD7 IFPBTXD7*
IFPBTXC IFPBTXC*
IFPATXD0 IFPATXD0*
IFPATXD1 IFPATXD1*
IFPATXD2 IFPATXD2*202
IFPATXD3 IFPATXD3*
IFPATXC IFPATXC*
10 11 12 13 14
0 1 2 3 4 5 6 7 8 9
SLI_D<14..0>
12.1F<>
15.4B>
8.3H>
8.3H>
8.3H>
8.3H>
8.3H>
8.3H>
8.4H>
8.4H>
8.4H>
8.4H>
8.4H>
8.4H>
8.4H>
8.4H>
8.4H>
8.4H>
GPIO_SLI_SYNC
1K
R16
COMMON
0402
1%
0402
1%
PLACE THESE COMPONENTS TO ISOLATE 2 TYPE SIGNALS AND BALANCE THE LOAD OF THE DIFF PAIR
1KR15 COMMON
12.2F<>
12.4F<>
12.2F<>
8.2H>
8.2H>
8.2H>
8.2H>
8.2H>
8.2H>
8.2H>
8.2H>
8.2H>
8.2H>
8.1H>
8.1H>
8.1H>
8.1H>
8.2H>
8.2H>
8.2H>
8.2H>
8.1H>
8.1H>
SLI_SWAP_OUT
2V5RUN
2.5G<
9.4B>
R24 10K 5% 0402 COMMON
GND
1
1
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. MXM Connector, IO-Section
www.vinafix.vn
600-10407-0001-200 A
p407_a02 myan
9 OF 18
30-NOV-2006
Page 10
PAGE 10) GPIO, JTAG, TEMP SENSOR
OUTINININOUTBIOUT
OUT
OUT
OUTBIOUTINOUT
S
D
G
S
DGS
D
G
VDD
THERM ALERT
GND
D+ D-
SDA
SCL
IN
BI
9/14 MISC1
CLAMP
GPIO1
GPIO0
I2CC_SDA
I2CC_SCL
I2CS_SDA
I2CS_SCL
GPIO2
GPIO9
GPIO8
GPIO7
GPIO3 GPIO4 GPIO5 GPIO6
GPIO13
GPIO12
DRA_SYNC/GPIO11
GPIO10
DRB_SYNC/GPIO14
JTAG_TCK
THERMALSENSOR_OBS
THERMDN THERMDP
JTAG_TMS
JTAG_TRST
JTAG_TDO
JTAG_TDI
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
3V3RUN
47.5K
R600
NO STUFF
0402
1%
47.5K
R612
NO STUFF
0402
1%
9.4B<>
9.4B>
SMB_DAT
SMB_CLK
I2CC_SCL_R
I2CC_SDA_R
TEMP SENSER I2C ADDRESS: 0X98H
FOR PEX COMPLIANCE TEST
TP502 TP505 TP501 TP503 TP504
R595 0402 R604 0402
R594 0402 R607 0402
0402
0402
0402
0402
1%
1%
5%
5%
R7
5%
R2
5%
R3
5%
R5
5%
47.5K NO STUFF
47.5K NO STUFF
0
COMMON
0
COMMON
0
NO STUFF
0
NO STUFF
0
NO STUFF
0
NO STUFF
3V3RUN
3V3RUN3V3RUN
R553 R548 R557
10K
10K
5%
5%
0402
0402
COMMON
NO STUFF
10K 5% 0402 COMMON
3V3RUN
TEMP SENSER
U2 MAX6649MUA SO8_122MIL
AJ11 AK11 AK12 AL12 AL13
2 3
8 7
V6
J1
K1
NO STUFF
G1 G84-600-A1 BGA820 CHANGED
THERM_VDD
1
M_THERM_ALERT*
4
M_GPIO8_SLOWDOWN*
6
5
GND
10MIL 10MIL
THERM_SCL THERM_SDA
C7
1000PF X7R COMMON
50V 10% 0402
SNN_THERMAL
THERM*
THERM
JTAG_TCLK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST
R551
R555
10K
10K
5%
5%
0402
0402
COMMON
COMMON
GND
GND
3.3V 12MIL
GND
R10 200 1% 0402 NO STUFF
C5 .1UF
6.3V 10% X7R 0402 NO STUFF
0402
R603
R614
0
5%
NO STUFF
0
5%
NO STUFF0402
F6
C1 B1
G2 G1
K3 H1 K5 G5 E2 J5 G6 K6 E1 D2 H5 F4 E3 U3 U4
GPIO
SNN_CLAMP_F6
SMB_CLK_GPU SMB_DATA_GPU
I2CC_SCL I2CC_SDA
GPIO0_DVI_A_HPD GPIO1_DVI_B_HPD GPIO2_BL_PWM GPIO3_PPEN_GPU GPIO4_BLEN_GPU GPIO5_NVVDDCTL0 GPIO6_NVVDDCTL1 SNN_GPIO7
GPIO8_THERM_ALERT* SNN_GPIO9 SNN_GPIO10 GPIO_SLI_SYNC
GPIO_AC_BATT* SNN_GPIO13 SNN_GPIO14
3V3RUN
R611
47.5K 1% 0402 COMMON
0402
R22 0402
3V3RUN
335%R21
33
R602
47.5K 1% 0402 COMMON
COMMON
5%
COMMON
THERM_ALERT*
1G1D1S
1
RHU002N06
SOT323_1G1D1S
COMMON
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_VOLTAGE=60V
3
2
Q511
1G1D1S
3
RHU002N06
Q509
V_BE_GS=+/-20V
MAX_WATTAGE=200mW
MAX_CURRENT=800mA
1
2
COMMON
R_DS_ON=4R
SOT323_1G1D1S
MAX_VOLTAGE=60V
MAX_WATTAGE=200mW
MAX_CURRENT=800mA
CONTINUOUS_CURRENT=200mA
R610 10K 5% 0402 COMMON
GND
V_BE_GS=+/-20V
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
1
1G1D1S
2
R608
2.2K 5% 0402 COMMON
GND
R6R23 10K 5% 0402 COMMON
3
RHU002N06
Q510
COMMON
R_DS_ON=4R
SOT323_1G1D1S
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R8 10K 5% 0402 COMMON
GND
3V3RUN
R613
2.2K 5% 0402 COMMON
10K 5% 0402 COMMON
GND
NV_PWRGOOD
GPIO3_PPEN GPIO4_BLEN
9.4B<
9.4B<
9.4B<>
8.4A<
9.3B<
9.3B<
9.3B<
13.4B<
13.4B<
9.3H<>
9.4B>
14.2A< 13.2B>
11.2B<
11.2B<>
3V3RUN
2 2
D503 BAV99 SOT23
70V
215MA
COMMON
1
GND
2.2K
R601
COMMON
0402
5%
3V3RUN
D502 BAV99 SOT23
215MA
COMMON
3
70V
1
GND
GND
3
R615
47.5K 1% 0402 COMMON
GND
R571 0402
R570
47.5K 1% 0402 COMMON
2.2K COMMON
5%
DVI_A_HPD DVI_B_HPD
9.2B>
9.2B>
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. GPIOs. JTAG, Thermal Senser
www.vinafix.vn
600-10407-0001-200 A
p407_a02 myan
10 OF 18
30-NOV-2006
Page 11
PAGE 11) SPREAD SPECTRUM, VBIOS, HDCP BIOS, GPU GND
14/14 _GND_
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND
GND GND
GND
GND GND GND GND GND
GND GND
GND
GND
GND
GND GND GND GND GND
GND GND
GND
GND
GND
GND GND GND GND GND
GND GND GND
GND
GND GND GND GND GND GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND GND
GND
GND GND GND
GND GND
GND
GND GND GND GND GND
GND GND
GND
GND
GND
GND GND GND GND GND
GND GND
GND
GND
GND
GND GND GND GND GND
GND GND GND
GND
GND GND GND GND GND GND
GND GND
GND
GND
GND GND GND GND GND GND
GND GND GND
GND
GND GND GND GND GND
GND GND
GND
GND
GND
GND GND GND GND GND GND
GND GND GND GND GND GND GND GND GND
GND
GND
GND
GND
GND GND GND GND GND GND GND
OUT
VCC
GND
HOLD WP CS
SI SCK
SO
IN
BI
VCC VCC
GND
GND
SCL SDA
NC
SDA
VDD
FS_IN0
CLKOUT/
REFOUT/
FS_IN1
GND
CLKIN
PD
SDATA
SCLK
INININ
BI
10/14 MISC2
ROMCS
I2CH_SDA
I2CH_SCL
ROM_SCLK
ROM_SO
ROM_SI
TESTMODE
TESTMEMCLK
SWAPRDY_A
STEREO
BUFRST
MEMSTRAPSEL0 MEMSTRAPSEL1 MEMSTRAPSEL2 MEMSTRAPSEL3
STRAP
RFU
RFU RFU
RFU
RFU
RFU
RFU
RFU
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
SPREAD SPECTRUM
3V3RUN
R9 10K
U1 ICS91730BM SO8 NO STUFF
14.4C<
SNN_MSTRAPSEL0 SNN_MSTRAPSEL1 SNN_MSTRAPSEL2 SNN_MSTRAPSEL3
SNN_G3_RFU9 SNN_G3_RFU10 SNN_G3_RFU11 SNN_G3_RFU12 SNN_G3_RFU13 SNN_G3_RFU14 SNN_G3_RFU15 SNN_G3_RFU16
AE26 AD26 AH31 AH32
AC26
F1SNN_STRAP
V3
V4 AM8 AM9 B32
U6
D1
7.4F>
7.5G>
9.4B<
10.3F>
9.4B<>
10.3F<>
SPREAD SPECTRUM CLOCK I2C ADDRESS: 0XD4H
G1 G84-600-A1 BGA820 CHANGED
8.4A<
9.4A>
13.2B<
RUNPWROK
XTALOUTBUFF
I2CC_SCL_R I2CC_SDA_R
8
1
7 6
ROMCS*
AA4
ROM_SI
W2
ROM_SO
AA6
ROM_SCLK
AA7
I2CH_SCL
G3
I2CH_SDA
H3
SNN_BUFRST*
F3
SNN_STEREO
T3
SLI_SWAP_OUT
M6
TESTMCLK
A26
TESTMODE
H2
5% 0402 NO STUFF
2
SS_OUT
4
SS_REF
5
12MIL
3
R606 10K 5% 0402
CLK_VDD
1
50OHM
R11 10K 5% 0402
INTERNAL SS : STUFF EXTERNAL SS : NO STUFF
COMMON
VBIOS AND HDCP ROM
15.4B>
9.3H<>
GNDGND
R538 10K 5% 0402 COMMONCOMMON
R574
2.2K 0402
COMMON
0
R14
CHANGED
0402
5%
Place close to ICS91720
12MIL
C704
4.7UF
6.3V 10% X5R 0603 NO STUFF
3V3RUN
5%
GND
SNN_HDCP_ROM 2
C709
4.7UF
6.3V 10% X5R X7R 0603 NO STUFF
R575 10K 5% 0402 COMMON
6
5 3
www.vinafix.vn
SSFOUT
3.3V
C707 .1UF
6.3V 10%
0402 NO STUFF
U4 HDCP_KEYROM_PROGD_V2 SO8 COMMON
7.5G< 7.4C<
3V3RUN
4.7
R609
NO STUFF
0402
5%
C705 470PF 16V 10% X7R 0402 NO STUFF
GND
3V3RUN
3V3RUN
R12 10K 5% 0402 COMMON
3V3RUN
8 7
4 1
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. Spread Spectrum, VBIOS and HDCP ROM
C696 .1UF
6.3V 10% X7R 0402 COMMON
GNDGND
7 3 1
5 2 6
U3 SST25VF512 SO8 SO8 COMMON
3V3RUN
8
4
G1 G84-600-A1 BGA820 CHANGED
AA12
AA2 AA21 AA31 AB27
AB6 AC10 AC23 AC29
AC4 AD16 AD17
AD2 AD31 AE17 AE27
AE6 AF11 AF26 AF29
AF4
AF7 AG10 AG11 AG14 AG15 AG19
AG2 AG22 AG31
AG8 AH24 AJ10 AJ13 AJ16 AJ17 AJ20 AJ23 AJ26 AJ29
AJ4
AJ7
AK2 AK28 AK31 AL11 AL14 AL19 AL22 AL25
AL3
AL6
AL9 AM13 AM16 AM17 AM20 AM23 AM26 AM29
B12
B15
B18
B21
B24
B27
C4 .1UF
6.3V 10% X7R 0402 COMMON
GND
B3
B30
B6 B9
C2 C31 D10 D13 D16 D17 D20 D23 D26 D29
D4
D7 F11 F14 F19
F2 F22 F25 F31
F8 G26 G29
G4
G7 H27
H6 J16 J17
J2 J31
GND
K10 K23 K29 K4 L27 L6 M12 M2 M31 N15 N18 N29 N4 P15 P18 P27 P6 R13 R14 R15
R18 R19 R2 R20 R31 T16 T17 T24 T29 T4 U16 U17 U24 U29 U8 V13 V14 V15 V18 V19
V2 V20 V31 W15 W18 W27 W6 Y15 Y18 Y29 Y4 AL10 AM10 AG13
GND
600-10407-0001-200 A
p407_a02 myan
11 OF 18
30-NOV-2006
Page 12
PAGE 12) MIOA(SLI), MIOB
BIBIBIININININININ
BI
MIODR
11/14 DRA/MIOA
MIOAD1 MIOAD3
MIOAD0 MIOAD2 MIOAD4
MIOAD10
MIOAD9
MIOAD11
MIOAD8
MIOAD7
MIOAD6
MIOAD5DRA_D5
DRA_D2
DRA_D0
DRA_D3
DRA_D6 DRA_D7 DRA_D8
DRA_D1
DRA_D4
DRA_D10
DRA_D9
DRA_D11
MIOA_CTL3
RFU
MIOA_DE
MIOA_CLKOUT
MIOA_CLKOUT
MIOA_VSYNC
MIOA_HSYNC
NC
DRA_CLK
DRA_CMD
DRA_D14
DRA_D12 DRA_D13
MIOACAL_PU_GND
MIOACAL_PD_VDDQ
MIOA_VDDQ MIOA_VDDQ MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOA_VREF
MIO
DR
12/14 DRB/MIOB
MIOBD3
MIOBD1 MIOBD2
MIOBD0
MIOBD4
MIOBD7
MIOBD6
MIOBD5
MIOBD11
MIOBD10
MIOBD9
MIOBD8
RFU
RFU
DRB_D0
DRB_D7
DRB_D6
DRB_D2
DRB_D1
DRB_D8
DRB_D9 DRB_D10 DRB_D11
DRB_D5
DRB_D4
DRB_D3
RFU
RFU RFU
RFU
RFU
RFU
MIOB_CTL3
MIOB_DE
MIOB_HSYNC MIOB_VSYNC
MIOB_CLKOUT
MIOB_CLKIN
MIOB_CLKOUT
DRB_D13
DRB_D12 DRB_D14
DRB_CMD
DRB_CLK
NC
DR_REFCLK
MIOBCAL_PD_VDDQ MIOBCAL_PU_GND
MIOB_VDDQ MIOB_VDDQ MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ
MIOB_VREF
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
G1 G84-600-A1
M7 M8 R8 T8 U9
L1
L3
L2
AA8 AB7 AB8 AC6 AC7
Y1
Y3
Y2
BGA820 CHANGED
G1 G84-600-A1 BGA820 CHANGED
2V5RUN
LB509
220R@100MHz
COMMONBEAD_0603
GND
GND
12MIL
2.5V
C672
C679
C703
4.7UF .1UF .01UF
6.3V 10% X5R 0603 COMMON
R585 0402
1% R580 0402
1%
GND
R592 1K 1% 0402 COMMON
R579 1K 1% 0402 COMMON
6.3V 10% X7R 0402 COMMON
49.9 COMMON
49.9 COMMON
C700 .1UF
6.3V 10% X7R 0402 COMMON
SNN_MIOBCAL_PD_VDDQ
SNN_MIOBCAL_PU_GND
SNN_MIOB_VREF
16V 10% X7R 0402 COMMON
12MIL
12MIL
12MIL
3V3RUN
MIOA_VDDQ
MIOACAL_PD_VDDQ
MIOACAL_PU_GND
MIOA_VREF
C684 .1UF
6.3V 10% X7R 0402 COMMON
GND
C680 .01UF 16V 10% X7R 0402 COMMON
MIOA(SLI)
MIOB
SLI_D<0>P2 SLI_D<1>
N2
SLI_D<2>
N1
SLI_D<3>
N3
SLI_D<4>
M1
SLI_D<5>
M3
SLI_D<6>
P5
SLI_D<7>
N6
SLI_D<8>
N5
SLI_D<9>
M4
SLI_D<10>
L4
SLI_D<11>
L5
SLI_D<12>
P3
SLI_D<13>
R3
SLI_D<14>
R1 P1
R4
SNN_MIOACLKOUTR*
P4
SNN_MIOA_M5
M5
AC3 AC1 AC2 AB2 AB1 AA1 AB3 AA3 AC5 AB5
AA5 W3 V1 Y5 W1
W4 W5 V5 Y6
AD3 AF3 AE3 AD1
AD4
AE4
SNN_MIOBD<2> SNN_MIOBD<3> SNN_MIOBD<4> SNN_MIOBD<5> SNN_MIOBD<6> SNN_MIOBD<7>
SNN_ROM_TYPE_0AB4
SNN_G3_RFU1 SNN_G3_RFU2 SNN_G3_RFU3 SNN_G3_RFU4
SNN_G3_RFU5 SNN_G3_RFU6 SNN_G3_RFU7 SNN_G3_RFU8
SNN_MIOB_HSYNC SNN_MIOB_VSYNC SNN_MIOB_DE
SNN_MIOB_CLKOUT SNN_MIOB_CLKOUT*AD5
NV_CRITICALNET
0 1 2 3 4 5 6 7 8
9 10 11
1SLI_D<14..0>
NV_IMPEDANCE
50OHM
15.4B> 9.3F<>
12 13 14
NET
RAMCFG0 RAMCFG1
RAMCFG2 RAMCFG3
PCI_DEVID3
MIOB_CTL3
1SLI_DE
1SLI_CLKOUT
NV_IMPEDANCENV_CRITICAL
50OHM
50OHM
15.3B>
15.4B>
15.4B>
15.4B>
15.4B>
15.4B>
9.3G<>
9.3G<>
SLI_REFCLK
9.3G<>
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. MIOA(SLI), MIOB
www.vinafix.vn
600-10407-0001-200 A
p407_a02 myan
12 OF 18
30-NOV-2006
Page 13
PAGE 13) NVVDD POWER SUPPLY
IN
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
VIN
BOOT
PHASE
UG
ISEN
PGND
LG
VO FB
GND(PAD)
PVCC
VCC
FCCM
EN
PGOOD
FSET
COMP
OUTININ
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
NV_NET_MAX_CURRENTMIN_WIDTH_LINEVOLTAGENET
NVVDD
NVVDD
30A12MIL1V
NVVDD
U501 ISL6269CRZ
5V
16MIL
R508 0402
12
16
TP
1%
2
3
4
7
5
100K
COMMON
VR_SW=0.6V MLFP16 MLFP16 COMMON
5VRUN
STUFF FOR ISL6269A
GND
14.2A< 10.2F<
14.4C< 11.2B< 9.4A> 8.4A<
NV_PWRGOOD
RUNPWROK
C520 1UF
6.3V 10% X5R 0402 COMMON
R506 0402
5%
GND
4.7 NO STUFF
R44
47.5K 1% 0402 COMMON
R507 10K 5% 0402 COMMON
NV_FSET 12MIL
NV_VCC
C49 .01UF 16V 10% X7R 0402 COMMON
C511 1UF
6.3V 10% X5R 0402 COMMON
GND
SET TO 350KHZ
DEM USED
NV_COMP 12MIL
VOUT = ((RT +RB)/RB) X 0.6 = 0.9
GPIO5
GPIO6_NVVDDCTL1
GPIO5_NVVDDCTL0
High Low
0402
1.1V
RTop RBotG84M
3.01K
4.42K || 19.6K
4.42K3.01K1.0V
10.3F>
10.3F>
R526 10K 5% 0402 COMMON
NVVDD SWITCHER POWER SUPPLY
1
14 NV_DH
20MIL NV_BOOT
12MIL
15
NV_PHASE 16MIL
913NV_ISEN
12MIL NV_DL11
20MIL
10
8
6
.01UF
C518NV_COMP1
R519
5%
NVVDDCTL1
C523 0402
10K NO STUFF
16V0402 10% X7R COMMON
NO STUFF 12MIL NVCTL1_R
1G1D1S
1
.01UF 16V 10% X7R NO STUFF
R518
8.87K 0402
1%
R523
5%
12MIL
C515 0402
10K NO STUFF
0402
R560 10K 5% 0402 COMMON
33PF 50V 5% C0G COMMON
0
R514
COMMON
0402
5%
R513 0402
5%
3
Q505 RHU002N06 SOT323_1G1D1S NO STUFF
2
MAX_VOLTAGE=60V CONTINUOUS_CURRENT=200mA R_DS_ON=4R MAX_CURRENT=800mA MAX_WATTAGE=200mW V_BE_GS=+/-20V
GND
NVVDDCTL0
.01UF
C534
16V
0402
10% X7R NO STUFF
4.7K COMMON
NV_BOOTC
12MIL
NVCTL0_R
1G1D1S
1
C535 1000PF 50V 10% X7R 0402 NO STUFF
Rbot0Rbot1
19.6K
NO STUFF
12MIL
R517
0402
COMMON
CONNECT TO R-TOP
1%
3
Q506 RHU002N06 SOT323_1G1D1S NO STUFF
2
4
C521
.1UF
0603
50V 10% X7R
LFPAK
5
Q507 BSC032N03S LFPAK
4
COMMON
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=50A
2
R_DS_ON=3.2mR MAX_CURRENT=200A
3
MAX_WATTAGE=2.8W V_BE_GS=+/-20V
NV_FB 12MIL
MAX_VOLTAGE=60V CONTINUOUS_CURRENT=200mA R_DS_ON=4R MAX_CURRENT=800mA MAX_WATTAGE=200mW V_BE_GS=+/-20V
PWR_SRC
LFPAK
5
Q502 BSC059N03S LFPAK COMMON
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=50A
2
R_DS_ON=5.5mR MAX_CURRENT=200A
3
MAX_WATTAGE=2.8W V_BE_GS=+/-20V
R511
3.01K 1% 0402 COMMON
Rtop
R512
4.42K 1% 0402 COMMON
Rbot
GND
4
C522 1000PF 50V 10% X7R 0402 NO STUFF
LFPAK
5
Q503 BSC032N03S LFPAK COMMON
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=50A
2
R_DS_ON=3.2mR MAX_CURRENT=200A
3
MAX_WATTAGE=2.8W V_BE_GS=+/-20V
GND
C56
4.7UF 25V 10% X5R 1206 COMMON
GND
R515 0 5% 0402 NO STUFF
FOR NVVDD OUTPUT SIDE SENSE
0
R516
COMMON
0402
5%
FOR GPU REMOTE SIDE SENSE
NVVDD=1V APPROX. 20A @ 500MHZ INPUT CURRENT RMS = 6.8A @ 7.5V INPUT OUTPUT PEAK TO PEAK CURRENT = 3A @ 22V INPUT SWITCHING FREQ. = 275KHZ
C43 330UF
COMMON 20%
2.5V POSCAP 3900MA@100KHZ,45C 9MOHM SMD_7343
GND
NVVDD_SENSE
12MIL
C51 330UF
COMMON 20%
2.5V POSCAP 3900MA@100KHZ,45C 9MOHM SMD_7343
GND
2.3G>
NVVDD
C35
4.7UF
6.3V 10% X5R 0603 COMMON
GND
C27
4.7UF
6.3V 10% X5R 0603 COMMON
GND
1.0uH COMMON
C53
4.7UF 25V 10% X5R 1206 COMMON
GND
C67
4.7UF 25V 10% X5R 1206 COMMON
GND
CONTINUOUS_CURRENT=24A MAX_CURRENT=40A DC_RESISTANCE=0.0035R HEIGHT=3.5MM NV_PN=131-0148-000 131-0057-000 CAN BE THE ALTERNATIVE
L1
SMD_520X508
C32 1000PF 50V 10% X7R 0402 COMMON
NVVDD_SENSE_FB 12MIL
16MIL
C66
4.7UF 25V 10% X5R 1206 COMMON
GND
R37 1 5% 1206 COMMON
GND
GND
1
2
GND
C57
4.7UF 25V 10% X5R 1206 COMMON
D1 RSX201L-30 SMA 30V 2A COMMON
NV_SNUBBER
C514 .1UF 50V 10% X7R 0603 COMMON
GND
30A
GND
GND
GND
www.vinafix.vn
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. NVVDD Power Supply
600-10407-0001-200 A
p407_a02 myan
13 OF 18
30-NOV-2006
Page 14
PAGE 14) FBVDDQ AND PEX1V2 POWER SUPPLY
OUT
S
D
G
S
DGVOUT
VOUT
FB
VCNTL
GND
VIN VIN
EN POK
IN
VIN
BOOT
PHASE
UG
ISEN
PGND
LG
VO FB
GND(PAD)
PVCC
VCC
FCCM
EN
PGOOD
FSET
COMP
OUT
IN
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
PEX1V2
FBVDDQ
PEX1V2
FBVDDQ
1.8V
12MIL1.2V
12MIL
NV_NET_MAX_CURRENTMIN_WIDTH_LINEVOLTAGENET 2A
10A
PEX1V2
FBVDDQ
FBVDDQ SWITCHER POWER SUPPLY
U502 ISL6269CRZ
5VRUN
STUFF FOR ISL6269A
R521 0402
5%
C517 1UF
6.3V 10% X5R 0402 COMMON
8.2A<
10.2F< 13.2B>
GND
GND
4.7 NO STUFF
R43 33K 5% 0402 COMMON
FB_FSET
12MIL
FB_VCC
R522 10K 5% 0402 COMMON
FB_PWRGOOD
NV_PWRGOOD
C524 1UF
6.3V 10% X5R 0402 COMMON
GND
SET TO 500KHZ
C44 .01UF 16V 10% X7R 0402 COMMON
16MIL
DEM USED
FB_COMP 12MIL
VR_SW=0.6V MLFP16 MLFP16 COMMON
12
5V
2
3
16
4
7
TP
5
FB_COMP1
75KR525 COMMON
0402
1%
12MIL
C531 0402
33PF 50V 5% C0G COMMON
0402
1
FB_BOOT
12MIL
FB_ISEN
12MIL
FB_DH 20MIL
R510 0402
FB_PHASE
16MIL
FB_DL 20MIL
12MIL
FB_FB 12MIL
.1UF
COMMON
04026.3V 10% X7R
C52 1000PF 50V 10% X7R 0402 NO STUFF
FB_BOOTC
0
COMMON
5%
8.2K
R509
COMMON
0402
5%
C516
14
13
15
9
11
10
8
6
.01UFC532 16V 10% X7R COMMON
Vout = Vref * (1 + Rtop / Rbot)
1.804V = 0.6V * (1 + 3.01K/1.5K)
PWR_SRC
2.2UH COMMON
C41
4.7UF 25V 10% X5R 1206 COMMON
GND
R41
3.01K 1% 0402 COMMON Rtop
R42
1.5K 1% 0402 COMMON Rbot
GND
FBVDDQ=1.8V
APPROX. 5A @ 400MHZ INPUT CURRENT RMS = 2.15A @ 7.5V INPUT OUTPUT PEAK TO PEAK CURRENT = 1.51A @ 22V INPUT SWITCHING FREQ = 500KHZ
FBVDDQ
C45 330UF
COMMON 20%
2.5V POSCAP 3900MA@100KHZ,45C 9MOHM SMD_7343
GND
C50
4.7UF
6.3V 10% X5R 0603 COMMON
GND
C42
50V 10% X7R
LFPAK
5
Q504 BSC119N03S LFPAK
4
COMMON
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=30A
2
[email protected] MAX_CURRENT=120A
3
MAX_WATTAGE=2.8W V_BE_GS=+/-20V
LFPAK
5
Q501 BSC032N03S LFPAK
4
COMMON
1
MAX_VOLTAGE=30V CONTINUOUS_CURRENT=50A
2
R_DS_ON=3.2mR MAX_CURRENT=200A
3
MAX_WATTAGE=2.8W V_BE_GS=+/-20V
GND
16MIL
FB_SNUBBER
10A
C503 1000PF 50V 10% X7R 0402 COMMON
R45 1 5% 1206 COMMON
GND
0603 COMMON
GND
1
2
GND
CONNECT TO R-TOP
C48
4.7UF
.1UF
25V 10% X5R 1206 COMMON
GND
CONTINUOUS_CURRENT=8A MAX_CURRENT=14A DC_RESISTANCE=.018R HEIGHT=3MM NV_PN=131-0055-000 131-0131-000 CAN BE THE ALTERNATIVE
L2
SMD_6X6
D501 BAT43 SOD323 40V 400MA COMMON
PEX1V2 LINEAR SUPPLY
U5 APL5913
5VRUN1V8RUN
RUNPWROK SNN_POK
6.3V
0402
COMMON
C12 1UF
10% X5R
GND
C10 1UF
6.3V 10% X5R 0402 COMMON
GND
9.4A> 8.4A<
11.2B<
13.2B<
SOP8 COMMON
HEIGHT=1.75MM MAX_WATTAGE=3W MAX_CURRENT=3A
6 5 9
8 7
1
GND
Vout = Vref * (1 + Rtop / Rbot)
1.209V = 0.8V * (1 + 511 /1.02k)
APPROX. MAX OUTPUT CURRENT = 2A
3 4
PEX1V2_FB
2
12MIL
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. FBVDDQ, PEX1V2 and DAC_Vref Power Supply
C20 470PF 16V 10% X7R 0402 COMMON
Rtop R33
511 1% 0402 COMMON
Rbot R31
1K 1% 0402 COMMON
GND
www.vinafix.vn
PEX1V2
GND
C17
4.7UF
6.3V 10% X5R 0603 COMMON
DAC V_REFERENCE SUPPLY
3V3RUN
R26 511 1% 0402 NO STUFF
SC431L
VR=1.240V
SOT23 SOT23
NO STUFF
DAC_VREF
U503
2
DAC_REF_FB
1
3
STUFF Rbot TO GET 1.25V Vref
GND
Rtop
12MIL
Rbot
12MIL1.24V
R582 150 1% 0402 NO STUFF
R591
18.2K 1% 0402 NO STUFF
C693 .1UF
6.3V 10% X7R 0402 NO STUFF
600-10407-0001-200 A
p407_a02 myan
7.4G<
14 OF 18
30-NOV-2006
Page 15
PAGE 15) STRAPS, MOUNTING HOLES
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
3V3RUN
STRAP REG'BIT LOGIC 0
R589
10K
0402
NO STUFF
R590
R584 0402
0402
R588 0402
R599 0402
5%
5%
5%
5%
5%
10K NO STUFF
10K COMMON
10K COMMON
2.2K COMMON
0'2
0'3
0'4
0'5
0'13
RAMCFG0
RAMCFG1
RAMCFG2
RAMCFG3
PCI_DEVID3
0'17
0'28
1'12
0402
0402
R20
2.2K COMMON
5%
R1
2.2K COMMON
5%
MIOB_CTL3
ROM_SI
LOGIC 1
R573 0402
R583 0402
R576 0402
R572 0402
R562 0402
R19
0402
5%
5%
5%
5%
5%
5%
10K COMMON
10K COMMON
10K NO STUFF
10K NO STUFF
2.2K NO STUFF
2.2K NO STUFF
2V5RUN
RAM_CFG_0
RAM_CFG_1
RAM_CFG_2
RAM_CFG_3
PCI_DEVID_3
PEX_PLL_EN_TERM100
PCI_DEVID_EXT
MIOA_EN_3.3V
RAM_CFG[3:0] MS_0000: 16Mx16 DDR2 128bit SDRAM, ELPIDA.
MS_0001: 16Mx16 DDR2 128bit SDRAM, SAMSUNG, MICRON. MS_0010: 16Mx16 DDR2 128bit SDRAM. INFINEON. MS_0011: 16Mx16 DDR2 128bit SDRAM, HYNIX. MS_0100: 32Mx16 DDR2 128bit SDRAM, ELPIDA. MS_0101: 32Mx16 DDR2 128bit SDRAM, SAMSUNG, MICRON. MS_0110: 32Mx16 DDR2 128bit SDRAM. INFINEON. MS_0111: 32Mx16 DDR2 128bit SDRAM, HYNIX.
MS_0: DEVICE ID = 0x0407, G84M-600. MS_1: DEVICE ID = 0x0408: G84M-700 MS_1: DEVICE ID = 0x0428: G86M-700
MIOB_EN_3.3V
1'15
GND
SLI_D<13>
R581 0402
2.2K COMMON
5%
SLOT CLOCK CONFIGURATION
12.3F<
12.3F<
12.3F<
12.3F<
12.4F<
12.4F<
12.1F<>
9.3F<>
11.3C<
RAMCFG0
RAMCFG1
RAMCFG2
RAMCFG3
MIOB_CTL3
PCI_DEVID3
SLI_D<14..0>
ROM_SI
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. STRAPS, MOUNTING HOLE
www.vinafix.vn
1
2
3
4
1
2
GND
MEC2 MXM_I_II_BACKPLATE_HOLES X4 NO STUFF
MEC2 MXM_I_II_BACKPLATE_HOLES X4 NO STUFF
MEC2 MXM_I_II_BACKPLATE_HOLES X4 NO STUFF
MEC2 MXM_I_II_BACKPLATE_HOLES X4 NO STUFF
MEC1 MXM_II_MOUNTING_HOLES X2 NO STUFF
MEC1 MXM_II_MOUNTING_HOLES X2 NO STUFF
600-10407-0001-200 A
p407_a02 myan
15 OF 18
30-NOV-2006
Page 16
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Title: Basenet Report Design: p407_a02 Date: Nov 30 11:00:17 2006
Base nets and synonyms for p407_lib.P407_A02(@p407_lib.p407_a02(sch _1)) Base Signal Location([Zone][dir])
1V8RUN 9.1G 2V5RUN 9.1G 3V3RUN 9.1G 5VRUN 9.1G BXTALOUT 7.4D CLK_VDD 11.2C DACA_BLUE 7.2F> 9.3B< DACA_GREEN 7.1F> 9.3B< DACA_HSYNC 7.1F> 9.3B< DACA_RED 7.1F> 9.3B< DACA_RSET 7.1C DACA_VDD 7.1C DACA_VREF 7.1C 7.4H DACA_VSYNC 7.1F> 9.3B< DACB_BLUE 7.3F> 9.3B< DACB_GREEN 7.2F> 9.2B< DACB_RED 7.2F> 9.2B< DACB_RSET 7.2C DACB_VDD 7.2C DACB_VREF 7.2C 7.4H DACC_VDD 7.3C DAC_REF_FB 14.4G DAC_VREF 7.4G< 14.4H> DVIB_EN* 8.4B DVI_A_HPD 9.2B> 10.3H< DVI_B_EN* 8.4B DVI_B_HPD 9.2B> 10.3H< FBAD<0> 3.1A 4.4B FBAD<63..0> 3.1A<> 4.4A<> 4.5F<> FBAD<1> 3.1A 4.4B FBAD<2> 3.1A 4.4B FBAD<3> 3.1A 4.4B FBAD<4> 3.1A 4.4B FBAD<5> 3.1A 4.4B FBAD<6> 3.1A 4.4B FBAD<7> 3.1A 4.4B FBAD<8> 3.1A 4.4C
FBAD<10> 3.1A 4.4C FBAD<11> 3.1A 4.4C FBAD<12> 3.1A 4.4C FBAD<13> 3.1A 4.4C FBAD<14> 3.1A 4.4C FBAD<15> 3.1A 4.4C FBAD<16> 3.1A 4.4D FBAD<17> 3.2A 4.4D FBAD<18> 3.2A 4.4D FBAD<19> 3.2A 4.4D FBAD<20> 3.2A 4.4D FBAD<21> 3.2A 4.4D FBAD<22> 3.2A 4.4D FBAD<23> 3.2A 4.4D FBAD<24> 3.2A 4.4D FBAD<25> 3.2A 4.4D FBAD<26> 3.2A 4.4D FBAD<27> 3.2A 4.4D FBAD<28> 3.2A 4.4D FBAD<29> 3.2A 4.4D FBAD<30> 3.2A 4.4D FBAD<31> 3.2A 4.4D FBAD<32> 3.2A 4.5B FBAD<33> 3.2A 4.5B FBAD<34> 3.2A 4.5B FBAD<35> 3.2A 4.5B FBAD<36> 3.2A 4.5B FBAD<37> 3.2A 4.5B FBAD<38> 3.2A 4.5B FBAD<39> 3.2A 4.5B FBAD<40> 3.2A 4.5C FBAD<41> 3.2A 4.5C FBAD<42> 3.2A 4.5C FBAD<43> 3.2A 4.5C FBAD<44> 3.2A 4.5C FBAD<45> 3.2A 4.5C FBAD<46> 3.2A 4.5C FBAD<47> 3.3A 4.5C FBAD<48> 3.3A 4.5D FBAD<49> 3.3A 4.5D FBAD<50> 3.3A 4.5D FBAD<51> 3.3A 4.5D FBAD<52> 3.3A 4.5D FBAD<53> 3.3A 4.5D FBAD<54> 3.3A 4.5D FBAD<55> 3.3A 4.5D FBAD<56> 3.3A 4.5D FBAD<57> 3.3A 4.5D FBAD<58> 3.3A 4.5D
FBAD<59> 3.3A 4.5D FBAD<60> 3.3A 4.5D FBAD<61> 3.3A 4.5D FBAD<62> 3.3A 4.5D FBAD<63> 3.3A 4.5D FBADQM<0> 3.3A 4.4B FBADQM<7..0> 3.3A> 4.4A< 4.5F< FBADQM<1> 3.3A 4.4C FBADQM<2> 3.3A 4.4D FBADQM<3> 3.3A 4.4D FBADQM<4> 3.3A 4.5B FBADQM<5> 3.3A 4.5C FBADQM<6> 3.3A 4.5D FBADQM<7> 3.3A 4.5D FBADQS0 3.3A<> 4.4B 4.4F<> FBADQS0* 3.4A<> 4.4B 4.4F<> FBADQS1 3.4A<> 4.4C 4.4F<> FBADQS1* 3.4A<> 4.4C 4.4F<> FBADQS2 3.4A<> 4.4D 4.4F<> FBADQS2* 3.4A<> 4.4D 4.4F<> FBADQS3 3.4A<> 4.4D 4.4F<> FBADQS3* 3.4A<> 4.4D 4.4F<> FBADQS4 3.4A<> 4.4F<> 4.5B FBADQS4* 3.4A<> 4.4F<> 4.5B FBADQS5 3.4A<> 4.4F<> 4.5C FBADQS5* 3.4A<> 4.4F<> 4.5C FBADQS6 3.4A<> 4.4F<> 4.5D FBADQS6* 3.4A<> 4.4F<> 4.5D FBADQS7 3.4A<> 4.4F<> 4.5D FBADQS7* 3.4A<> 4.4F<> 4.5D FBA_A<0> 3.3C 4.1A 4.1C 4.1E
4.1G FBA_A<12..0> 3.3D> 4.1A< 4.4F< FBA_A<1> 3.3C 4.1A 4.1C 4.1E
4.1G FBA_A<2> 3.3C 4.1A 4.1C FBA_A<3> 3.3C 4.1A 4.1C FBA_A<4> 3.3C 4.1A 4.1C FBA_A<5> 3.3C 4.1A 4.1C FBA_A<6> 3.3C 4.1A 4.1C 4.1E
4.1G FBA_A<7> 3.3C 4.1A 4.1C 4.1E
4.1G FBA_A<8> 3.3C 4.1A 4.1C 4.1E
4.1G FBA_A<9> 3.3C 4.2A 4.2C 4.2E
4.2G FBAD<9> 3.1A 4.4C FBA_A<10> 3.3C 4.2A 4.2C 4.2E
4.2G FBA_A<11> 3.3C 4.2A 4.2C 4.2E
4.2G FBA_A<12> 3.3C 4.2A 4.2C 4.2E
4.2G FBA_BA0 3.3D> 4.2A< 4.2C 4.2E
4.2G 4.4F< FBA_BA1 3.3D> 4.2A< 4.2C 4.2E
4.2G 4.4F< FBA_BA2 3.3D> 4.2A< 4.2C 4.2E
4.2G 4.4F< FBA_CAS* 3.4D> 4.1A< 4.1C 4.1E
4.1G 4.5F< FBA_CKE 3.3D> 4.2A< 4.2C 4.2E
4.2G 4.4F< FBA_CLK0 3.4D> 4.2A 4.2C 4.3A<
4.4F< FBA_CLK0* 3.4D> 4.2A 4.2C 4.3C<
4.4F< FBA_CLK0_TERM 4.3B FBA_CLK1 3.4D> 4.2E 4.2G 4.3C<
4.4F< FBA_CLK1* 3.4D> 4.2E 4.2G 4.3E<
4.4F< FBA_CLK1_TERM 4.3D FBA_CS0* 3.3D> 4.1A< 4.1C 4.1E
4.1G 4.5F< FBA_CS1* 4.5F< FBA_ODT 3.5D> 4.2A< 4.2C 4.2E
4.2G 4.5F< FBA_ODT_GPU 3.1G> 3.4C 3.5C FBA_PLLAVDD_GPU 3.4C FBA_RAS* 3.3D> 4.1A< 4.1C 4.1E
4.1G 4.4F< FBA_RESET 3.1G> 3.3C 3.5C FBA_VREF1 4.2B 4.3F< FBA_VREF2 4.2F 4.3F< FBA_VREF3 4.2D 4.3F< FBA_VREF4 4.2H 4.3F< FBA_WE* 3.3D> 4.1A< 4.1C 4.1E
4.1G 4.5F< FBB_A<2> 3.3C 4.1E 4.1G FBB_A<5..2> 3.3D> 4.1A< 4.4F< FBB_A<3> 3.3C 4.1E 4.1G FBB_A<4> 3.3C 4.1E 4.1G FBB_A<5> 3.3C 4.1E 4.1G FBCAL_PD 3.4G FBCAL_PU 3.4G
FBCAL_TERM 3.5G FBCD<0> 3.1E 5.4B FBCD<63..0> 3.1E<> 5.4A<> 5.5F<> FBCD<1> 3.1E 5.4B FBCD<2> 3.1E 5.4B FBCD<3> 3.1E 5.4B FBCD<4> 3.1E 5.4B FBCD<5> 3.1E 5.4B FBCD<6> 3.1E 5.4B FBCD<7> 3.1E 5.4B FBCD<8> 3.1E 5.4C FBCD<9> 3.1E 5.4C FBCD<10> 3.1E 5.4C FBCD<11> 3.1E 5.4C FBCD<12> 3.1E 5.4C FBCD<13> 3.1E 5.4C FBCD<14> 3.1E 5.4C FBCD<15> 3.1E 5.4C FBCD<16> 3.1E 5.4D FBCD<17> 3.2E 5.4D FBCD<18> 3.2E 5.4D FBCD<19> 3.2E 5.4D FBCD<20> 3.2E 5.4D FBCD<21> 3.2E 5.4D FBCD<22> 3.2E 5.4D FBCD<23> 3.2E 5.4D FBCD<24> 3.2E 5.4D FBCD<25> 3.2E 5.4D FBCD<26> 3.2E 5.4D FBCD<27> 3.2E 5.4D FBCD<28> 3.2E 5.4D FBCD<29> 3.2E 5.4D FBCD<30> 3.2E 5.4D FBCD<31> 3.2E 5.4D FBCD<32> 3.2E 5.5B FBCD<33> 3.2E 5.5B FBCD<34> 3.2E 5.5B FBCD<35> 3.2E 5.5B FBCD<36> 3.2E 5.5B FBCD<37> 3.2E 5.5B FBCD<38> 3.2E 5.5B FBCD<39> 3.2E 5.5B FBCD<40> 3.2E 5.5C FBCD<41> 3.2E 5.5C FBCD<42> 3.2E 5.5C FBCD<43> 3.2E 5.5C FBCD<44> 3.2E 5.5C FBCD<45> 3.2E 5.5C FBCD<46> 3.2E 5.5C FBCD<47> 3.3E 5.5C FBCD<48> 3.3E 5.5D FBCD<49> 3.3E 5.5D FBCD<50> 3.3E 5.5D FBCD<51> 3.3E 5.5D FBCD<52> 3.3E 5.5D FBCD<53> 3.3E 5.5D FBCD<54> 3.3E 5.5D FBCD<55> 3.3E 5.5D FBCD<56> 3.3E 5.5D FBCD<57> 3.3E 5.5D FBCD<58> 3.3E 5.5D FBCD<59> 3.3E 5.5D FBCD<60> 3.3E 5.5D FBCD<61> 3.3E 5.5D FBCD<62> 3.3E 5.5D FBCD<63> 3.3E 5.5D FBCDQM<0> 3.3E 5.4B FBCDQM<7..0> 3.3E> 5.4A< 5.5F< FBCDQM<1> 3.3E 5.4C FBCDQM<2> 3.3E 5.4D FBCDQM<3> 3.3E 5.4D FBCDQM<4> 3.3E 5.5B FBCDQM<5> 3.3E 5.5C FBCDQM<6> 3.3E 5.5D FBCDQM<7> 3.3E 5.5D FBCDQS0 3.3E<> 5.4B 5.4F<> FBCDQS0* 3.4E<> 5.4B 5.4F<> FBCDQS1 3.4E<> 5.4C 5.4F<> FBCDQS1* 3.4E<> 5.4C 5.4F<> FBCDQS2 3.4E<> 5.4D 5.4F<> FBCDQS2* 3.4E<> 5.4D 5.4F<> FBCDQS3 3.4E<> 5.4D 5.4F<> FBCDQS3* 3.4E<> 5.4D 5.4F<> FBCDQS4 3.4E<> 5.4F<> 5.5B FBCDQS4* 3.4E<> 5.4F<> 5.5B FBCDQS5 3.4E<> 5.4F<> 5.5C FBCDQS5* 3.4E<> 5.4F<> 5.5C FBCDQS6 3.4E<> 5.4F<> 5.5D FBCDQS6* 3.4E<> 5.4F<> 5.5D FBCDQS7 3.4E<> 5.4F<> 5.5D FBCDQS7* 3.4E<> 5.4F<> 5.5D FBC_A<0> 3.3G 5.1A 5.1C 5.1E
5.1G FBC_A<12..0> 3.3H> 5.1A< 5.4F< FBC_A<1> 3.3G 5.1A 5.1C 5.1E
5.1G
FBC_A<2> 3.3G 5.1A 5.1C FBC_A<3> 3.3G 5.1A 5.1C FBC_A<4> 3.3G 5.1A 5.1C FBC_A<5> 3.3G 5.1A 5.1C FBC_A<6> 3.3G 5.1A 5.1C 5.1E
5.1G FBC_A<7> 3.3G 5.1A 5.1C 5.1E
5.1G FBC_A<8> 3.3G 5.1A 5.1C 5.1E
5.1G FBC_A<9> 3.3G 5.1A 5.1C 5.1E
5.1G FBC_A<10> 3.3G 5.1A 5.1C 5.1E
5.1G FBC_A<11> 3.3G 5.1A 5.1C 5.1E
5.1G FBC_A<12> 3.3G 5.2A 5.2C 5.2E
5.2G FBC_BA0 3.3H> 5.2A< 5.2C 5.2E
5.2G 5.4F< FBC_BA1 3.3H> 5.2A< 5.2C 5.2E
5.2G 5.4F< FBC_BA2 3.3H> 5.2A< 5.2C 5.2E
5.2G 5.4F< FBC_CAS* 3.4H> 5.1A< 5.1C 5.1E
5.1G 5.5F< FBC_CKE 3.3H> 5.2A< 5.2C 5.2E
5.2G 5.4F< FBC_CLK0 3.4H> 5.2A 5.2C 5.3A<
5.3F< FBC_CLK0* 3.4H> 5.2A 5.2C 5.3B<
5.4F< FBC_CLK0_TERM 5.3B FBC_CLK1 3.4H> 5.2E 5.2G 5.3C<
5.4F< FBC_CLK1* 3.4H> 5.2E 5.2G 5.3E<
5.4F< FBC_CLK1_TERM 5.3D FBC_CS0* 3.3H> 5.1A< 5.1C 5.1E
5.1G 5.5F< FBC_CS1* 5.5F< FBC_ODT 3.5D> 5.2A< 5.2C 5.2E
5.2G 5.5F< FBC_ODT_GPU 3.1G> 3.4G 3.5C FBC_PLLAVDD 3.4G FBC_RAS* 3.3H> 5.1A< 5.1C 5.1E
5.1G 5.5F< FBC_RESET 3.1G> 3.3G 3.5C FBC_VREF1 5.2B 5.3F< FBC_VREF2 5.2F 5.3F< FBC_VREF3 5.2D 5.3F< FBC_VREF4 5.2H 5.3F< FBC_WE* 3.3H> 5.1A< 5.1C 5.1E
5.1G 5.5F< FBD_A<2> 3.3G 5.1E 5.1G FBD_A<5..2> 3.3H> 5.1A< 5.4F< FBD_A<3> 3.3G 5.1E 5.1G FBD_A<4> 3.3G 5.1E 5.1G FBD_A<5> 3.3G 5.1E 5.1G FBVDDQ 14.1G FB_BOOT 14.2C FB_BOOTC 14.2D FB_COMP 14.3B FB_COMP1 14.3C FB_DH 14.2C FB_DL 14.2C FB_FB 14.3D FB_FSET 14.2B FB_ISEN 14.2C FB_PHASE 14.2C FB_PWRGOOD 8.2A< 14.2A> FB_SNUBBER 14.2E FB_VCC 14.2B FB_VREF1 3.5A FB_VREF2 3.5E GPIO0_DVI_A_HPD 10.3D GPIO1_DVI_B_HPD 8.4A< 10.3F> GPIO2_BL_PWM 9.3B< 10.3F> GPIO3_PPEN 9.3B< 10.3F> GPIO3_PPEN_GPU 10.3D GPIO4_BLEN 9.3B< 10.3F> GPIO4_BLEN_GPU 10.3D GPIO5_NVVDDCTL0 10.3F> 13.4B< GPIO6_NVVDDCTL1 10.3F> 13.4B< GPIO8_THERM_ALERT* 10.3D GPIO_AC_BATT* 9.4B> 10.3F< GPIO_SLI_SYNC 9.3H<> 10.3F<> I2CA_SCL 7.1D I2CA_SCL_R 7.1F> 9.3B< I2CA_SDA 7.1D I2CA_SDA_R 7.1F<> 9.3B<> I2CB_SCL 7.3D I2CB_SCL_R 7.3G> 9.2B< I2CB_SDA 7.3D I2CB_SDA_R 7.3G<> 9.2B<> I2CC_SCL 10.3D
I2CC_SCL_R 9.4B< 10.3F> 11.2B< I2CC_SDA 10.3D I2CC_SDA_R 9.4B<> 10.3F<>
11.2B<> I2CH_SCL 11.4C I2CH_SDA 11.4C IFPABIOVDD 8.2D IFPABPLLVDD 8.1D IFPABRSET 8.1D IFPATXC 8.1H> 9.4G< IFPATXC* 8.1H> 9.4G< IFPATXD0 8.1H> 9.4G< IFPATXD0* 8.1H> 9.4G< IFPATXD1 8.1H> 9.4G< IFPATXD1* 8.1H> 9.4G< IFPATXD2 8.2H> 9.4G< IFPATXD2* 8.2H> 9.4G< IFPATXD3 8.2H> 9.4G< IFPATXD3* 8.2H> 9.4G< IFPBTXC 8.2H> 9.4G< IFPBTXC* 8.2H> 9.4G< IFPBTXD4 8.2H> 9.3G< IFPBTXD4* 8.2H> 9.3G< IFPBTXD5 8.2H> 9.3G< IFPBTXD5* 8.2H> 9.3G< IFPBTXD6 8.2H> 9.4G< IFPBTXD6* 8.2H> 9.4G< IFPBTXD7 8.2H> 9.4G< IFPBTXD7* 8.2H> 9.4G< IFPCDBRSET 8.3D IFPCDPLLVDD 8.3D IFPCTXC 8.3H> 9.2G< IFPCTXC* 8.3H> 9.2G< IFPCTXD0 8.3H> 9.2G< IFPCTXD0* 8.3H> 9.2G< IFPCTXD1 8.3H> 9.2G< IFPCTXD1* 8.3H> 9.2G< IFPCTXD2 8.4H> 9.2G< IFPCTXD2* 8.4H> 9.2G< IFPC_IOVDD 8.4D IFPDTXC 8.4H> 9.3G< IFPDTXC* 8.4H> 9.3G< IFPDTXD3 8.4H> 9.2G< IFPDTXD3* 8.4H> 9.2G< IFPDTXD4 8.4H> 9.2G< IFPDTXD4* 8.4H> 9.2G< IFPDTXD5 8.4H> 9.2G< IFPDTXD5* 8.4H> 9.2G< IFPD_IOVDD 8.4D JTAG_TCLK 10.3B JTAG_TDI 10.3B JTAG_TDO 10.3B JTAG_TMS 10.3B JTAG_TRST 10.3B LVDS_IOVDD 8.2B MIOACAL_PD_VDDQ 12.2C MIOACAL_PU_GND 12.2C MIOA_VDDQ 12.1C MIOA_VREF 12.2C MIOB_CTL3 12.4F< 15.2C 15.4B> M_GPIO8_SLOWDOWN* 10.2C M_THERM_ALERT* 10.2C NVCTL0_R 13.4D NVCTL1_R 13.4D NVVDD 13.1G NVVDDCTL0 13.4D NVVDDCTL1 13.4C NVVDD_SENSE 2.3G> 13.3G< NVVDD_SENSE_FB 13.3F NV_BOOT 13.2C NV_BOOTC 13.2D NV_COMP 13.2C NV_COMP1 13.3C NV_DH 13.2C NV_DL 13.2C NV_FB 13.3D NV_FSET 13.2B NV_ISEN 13.2C NV_PHASE 13.2C NV_PWRGOOD 10.2F< 13.2B> 14.2A< NV_SNUBBER 13.2F NV_VCC 13.2B PCI_DEVID3 12.4F< 15.2C 15.4B> PEX1V2 14.1G PEX1V2_FB 14.4D PEX_PLLDVDD 2.4F PEX_RCLK 2.2E PEX_RCLK* 2.2E PEX_RST 2.1D PEX_RX0 2.2E PEX_RX0* 2.2E PEX_RX1 2.2E PEX_RX1* 2.2E PEX_RX2 2.2E PEX_RX2* 2.2E PEX_RX3 2.3E
PEX_RX3* 2.3E PEX_RX4 2.3E PEX_RX4* 2.3E PEX_RX5 2.3E PEX_RX5* 2.3E PEX_RX6 2.3E PEX_RX6* 2.3E PEX_RX7 2.3E PEX_RX7* 2.3E PEX_RX8 2.4E PEX_RX8* 2.4E PEX_RX9 2.4E PEX_RX9* 2.4E PEX_RX10 2.4E PEX_RX10* 2.4E PEX_RX11 2.4E PEX_RX11* 2.4E PEX_RX12 2.4E PEX_RX12* 2.4E PEX_RX13 2.5E PEX_RX13* 2.5E PEX_RX14 2.5E PEX_RX14* 2.5E PEX_RX15 2.5E PEX_RX15* 2.5E PEX_TSTCLK 2.2E PEX_TSTCLK* 2.2E PEX_TX0 2.2E PEX_TX0* 2.2E PEX_TX0_C 2.2B PEX_TX0_C* 2.2B PEX_TX1 2.2E PEX_TX1* 2.2E PEX_TX1_C 2.2B PEX_TX1_C* 2.2B PEX_TX2 2.2E PEX_TX2* 2.2E PEX_TX2_C 2.2B PEX_TX2_C* 2.2B PEX_TX3 2.3E PEX_TX3* 2.3E PEX_TX3_C 2.3B PEX_TX3_C* 2.3B PEX_TX4 2.3E PEX_TX4* 2.3E PEX_TX4_C 2.3B
PEX_TX5 2.3E PEX_TX5* 2.3E PEX_TX5_C 2.3B PEX_TX5_C* 2.3B PEX_TX6 2.3E PEX_TX6* 2.3E PEX_TX6_C 2.3B PEX_TX6_C* 2.3B PEX_TX7 2.3E PEX_TX7* 2.3E PEX_TX7_C 2.3B PEX_TX7_C* 2.3B PEX_TX8 2.4E PEX_TX8* 2.4E PEX_TX8_C 2.4B PEX_TX8_C* 2.4B PEX_TX9 2.4E PEX_TX9* 2.4E PEX_TX9_C 2.4B PEX_TX9_C* 2.4B PEX_TX10 2.4E PEX_TX10* 2.4E PEX_TX10_C 2.4B PEX_TX10_C* 2.4B PEX_TX11 2.4E PEX_TX11* 2.4E PEX_TX11_C 2.4B PEX_TX11_C* 2.4B PEX_TX12 2.4E PEX_TX12* 2.4E PEX_TX12_C 2.4B PEX_TX12_C* 2.4B PEX_TX13 2.5E PEX_TX13* 2.5E PEX_TX13_C 2.5B PEX_TX13_C* 2.5B PEX_TX14 2.5E PEX_TX14* 2.5E PEX_TX14_C 2.5B PEX_TX14_C* 2.5B PEX_TX15 2.5E PEX_TX15* 2.5E PEX_TX15_C 2.5B PEX_TX15_C* 2.5B PLLVDD 7.4C PWR_SRC 9.1G RAMCFG0 12.3F< 15.1C 15.3B> RAMCFG1 12.3F< 15.2C 15.4B> RAMCFG2 12.3F< 15.2C 15.4B>
RAMCFG3 12.3F< 15.2C 15.4B> ROMCS* 11.3C ROM_SCLK 11.3C ROM_SI 11.3C< 15.3C 15.4B> ROM_SO 11.3C RUNPWROK 8.4A< 9.4A> 11.2B<
13.2B< 14.4C< RUNPWROK* 8.4B RUNPWROK_IN 9.4C SLI_CLKOUT 9.3G<> 12.2F<> SLI_D<0> 9.3E 12.1E SLI_D<14..0> 9.3F<> 12.1F<> 15.4B> SLI_D<1> 9.3E 12.1E SLI_D<2> 9.3E 12.1E SLI_D<3> 9.3E 12.1E SLI_D<4> 9.3E 12.2E SLI_D<5> 9.3E 12.2E SLI_D<6> 9.3E 12.2E SLI_D<7> 9.3E 12.2E SLI_D<8> 9.3E 12.2E SLI_D<9> 9.3E 12.2E SLI_D<10> 9.3E 12.2E SLI_D<11> 9.3E 12.2E SLI_D<12> 9.3E 12.2E SLI_D<13> 9.3E 12.2E 15.3C SLI_D<14> 9.3E 12.2E SLI_DE 9.3G<> 12.2F<> SLI_REFCLK 9.3G<> 12.4F<> SLI_SWAP_OUT 9.3H<> 11.4C<> SMB_CLK 9.4B> 10.2A< SMB_CLK_GPU 10.3D SMB_DAT 9.4B<> 10.2A<> SMB_DATA_GPU 10.3D SNN_A2_M1 4.2A SNN_A2_M2 4.2C SNN_A2_M3 4.2E SNN_A2_M4 4.2G SNN_A2_M5 5.2A SNN_A2_M6 5.2C SNN_A2_M7 5.2E SNN_A2_M8 5.2G SNN_BUFRST* 11.4C SNN_CLAMP_F6 10.3D SNN_DACB_CSYNC 7.2D SNN_DACC_BLUE 7.3D SNN_DACC_GREEN 7.3D SNN_DACC_HSYNC 7.3D PEX_TX4_C* 2.3B SNN_DACC_RED 7.3D SNN_DACC_RSET 7.3C SNN_DACC_VREF 7.3C SNN_DACC_VSYNC 7.3D SNN_E2_M1 4.2A SNN_E2_M2 4.2C SNN_E2_M3 4.2E SNN_E2_M4 4.2G SNN_E2_M5 5.2A SNN_E2_M6 5.2C SNN_E2_M7 5.2E SNN_E2_M8 5.2G SNN_FBA_CMD26 3.4C SNN_FBA_CMD27 3.4C SNN_FBA_CMD28 3.4C SNN_FBA_NC1_D31 3.5C SNN_FBA_NC1_D32 3.5C SNN_FBC_CMD26 3.4G SNN_FBC_CMD27 3.4G SNN_FBC_CMD28 3.4G SNN_FBC_PLLVDD 3.4G SNN_FBVTT_AA23 3.1G SNN_FBVTT_AB23 3.1G SNN_FBVTT_H16 3.1G SNN_FBVTT_H17 3.1G SNN_FBVTT_J9 3.1G SNN_FBVTT_J10 3.1G SNN_FBVTT_J23 3.1G SNN_FBVTT_J24 3.1G SNN_FBVTT_K9 3.1G SNN_FBVTT_K11 3.1G SNN_FBVTT_K12 3.1G SNN_FBVTT_K21 3.1G SNN_FBVTT_K22 3.1G SNN_FBVTT_K24 3.1G SNN_FBVTT_L23 3.1G SNN_FBVTT_M23 3.1G SNN_FBVTT_T25 3.1G SNN_FBVTT_U25 3.2G SNN_G3_RFU1 12.4E SNN_G3_RFU2 12.4E SNN_G3_RFU3 12.4E SNN_G3_RFU4 12.4E SNN_G3_RFU5 12.4E SNN_G3_RFU6 12.4E SNN_G3_RFU7 12.4E SNN_G3_RFU8 12.4E SNN_G3_RFU9 11.4A SNN_G3_RFU10 11.4A
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. <edit here to insert page detail>
www.vinafix.vn
600-10407-0001-200 A
p407_a02 myan
16 OF 18
30-NOV-2006
Page 17
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
SNN_G3_RFU11 11.4A SNN_G3_RFU12 11.4A SNN_G3_RFU13 11.4A SNN_G3_RFU14 11.4A SNN_G3_RFU15 11.4A SNN_G3_RFU16 11.4A SNN_GND_SENSE 2.3F SNN_GPIO7 10.3D SNN_GPIO9 10.3D SNN_GPIO10 10.3D SNN_GPIO13 10.3D SNN_GPIO14 10.3D SNN_GPU_AG12 2.1D SNN_GPU_AH13 2.2D SNN_HDCP_ROM 11.4D SNN_IFPABVPROBE 8.1D SNN_IFPCDVPROBE 8.3D SNN_MIOACLKOUTR* 12.2E SNN_MIOA_M5 12.2E SNN_MIOBCAL_PD_VDD 12.3C Q SNN_MIOBCAL_PU_GND 12.3C SNN_MIOBD<2> 12.3E SNN_MIOBD<3> 12.3E SNN_MIOBD<4> 12.3E SNN_MIOBD<5> 12.3E SNN_MIOBD<6> 12.3E SNN_MIOBD<7> 12.3E SNN_MIOB_CLKOUT 12.4E SNN_MIOB_CLKOUT* 12.4E SNN_MIOB_DE 12.4E SNN_MIOB_HSYNC 12.4E SNN_MIOB_VREF 12.4C SNN_MIOB_VSYNC 12.4E SNN_MSTRAPSEL0 11.3A SNN_MSTRAPSEL1 11.3A SNN_MSTRAPSEL2 11.3A SNN_MSTRAPSEL3 11.3A SNN_POK 14.4C SNN_R3_M1 4.2A SNN_R3_M2 4.2C SNN_R3_M3 4.2E SNN_R3_M4 4.2G SNN_R3_M5 5.2A SNN_R3_M6 5.2C SNN_R3_M7 5.2E SNN_R3_M8 5.2G SNN_R7_M1 4.2A SNN_R7_M2 4.2C SNN_R7_M3 4.2E SNN_R7_M4 4.2G SNN_R7_M5 5.2A SNN_R7_M6 5.2C SNN_R7_M7 5.2E SNN_R7_M8 5.2G SNN_R8_M1 4.2A SNN_R8_M2 4.2C SNN_R8_M3 4.2E SNN_R8_M4 4.2G SNN_R8_M5 5.2A SNN_R8_M6 5.2C SNN_R8_M7 5.2E SNN_R8_M8 5.2G SNN_ROM_TYPE_0 12.3E SNN_STEREO 11.4C SNN_STRAP 11.3A SNN_THERMAL 10.3B SPDIF 9.1G> 9.4C SPDIF_IN 2.5G< 9.1G> 9.4B> SSFOUT 7.4C< 7.5G< 11.2E> SS_OUT 11.2C SS_REF 11.2C TESTMCLK 11.4C TESTMODE 11.4C THERM 10.3B THERM* 10.3B THERM_ALERT* 9.4B< 10.2F> THERM_SCL 10.2B THERM_SDA 10.2B THERM_VDD 10.2C TMDSD_IOVDD 8.4C TMDS_IOVDD 8.4B XTALIN 7.4C 7.5G< XTALOUT 7.4D 7.5G> XTALOUTBUFF 7.4F> 7.5G> 11.2B<
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. <edit here to insert page detail>
www.vinafix.vn
600-10407-0001-200 A
p407_a02 myan
17 OF 18
30-NOV-2006
Page 18
2
3
4
5
1
HGF
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
CB
2
1
A
5
4
3
HFD GEBA C
Title: Cref Part Report Design: p407_a02 Date: Nov 30 11:00:17 2006
C1 [2.1A] C2 [7.5E] C3 [2.3A] C4 [11.3F] C5 [10.2D] C6 [7.5C] C7 [10.2B] C8 [6.4F] C9 [6.2B] C10 [14.4C] C11 [6.4F] C12 [14.4C] C13 [6.2A] C14 [6.4E] C15 [6.4E] C16 [5.2E] C17 [14.4E] C18 [5.3B] C19 [6.4E] C20 [14.4E] C21 [6.4E] C22 [6.2F] C23 [6.2E] C24 [6.2E] C25 [5.2G] C26 [6.2E] C27 [13.2H] C28 [6.2E] C29 [6.2F] C30 [6.2A] C31 [6.2B] C32 [13.2F] C33 [9.4B] C34 [2.3A] C35 [13.2H] C36 [6.2E] C37 [4.3E] C38 [6.2E] C39 [6.3E]
C41 [14.2F] C42 [14.2E] C43 [13.2G] C44 [14.3B] C45 [14.2F] C46 [6.2G] C47 [2.2A] C48 [14.2E] C49 [13.2B] C50 [14.2G] C51 [13.2G] C52 [14.2D] C53 [13.1F] C54 [6.2E] C55 [6.2F] C56 [13.1F] C57 [13.1E] C58 [6.2E] C59 [6.2F] C60 [6.3E] C61 [4.3G] C62 [6.3E] C63 [6.3E] C64 [6.2F] C65 [6.2G] C66 [13.1F] C67 [13.1F] C68 [4.3B] C69 [6.3F] C501 [6.2D] C502 [4.3D] C503 [14.2E] C504 [6.4D] C505 [6.4C] C506 [4.3C] C507 [6.4D] C508 [6.2C] C509 [6.2D] C510 [6.2D] C511 [13.2C] C512 [6.2G] C513 [6.4D] C514 [13.1E] C515 [13.3C] C516 [14.2D] C517 [14.2B] C518 [13.3C] C519 [6.2G] C520 [13.2B]
C521 [13.2D] C522 [13.2E] C523 [13.4C] C524 [14.2B] C525 [6.4C] C526 [6.4D] C527 [6.2C] C528 [4.3H] C529 [6.2H] C530 [6.2D] C531 [14.3C] C532 [14.3C] C533 [2.2A] C534 [13.4D] C535 [13.2D] C536 [2.5D] C537 [2.5C] C538 [2.5D] C539 [3.4D] C540 [2.5C] C541 [2.1H] C542 [3.5A] C543 [2.5D] C544 [6.2D] C545 [3.2D] C546 [2.5C] C547 [3.1D] C548 [3.1D] C549 [6.2D] C550 [2.4D] C551 [2.4C] C552 [2.4D] C553 [2.4C] C554 [2.4D] C555 [6.2D] C556 [6.2D] C557 [2.4C] C558 [2.4D] C559 [2.4C] C560 [2.4D] C561 [3.5E] C562 [2.1G] C563 [2.4C] C564 [2.1H] C565 [2.3D] C566 [2.3C]
C568 [3.4C] C569 [2.4G] C570 [2.2H] C571 [2.3D] C572 [2.1G] C573 [3.2D] C574 [3.2D] C575 [3.1C] C576 [3.1C] C577 [3.4C] C578 [2.2G] C579 [3.2C] C580 [5.3D] C581 [2.1G] C582 [2.3C] C583 [3.2D] C584 [2.3D] C585 [2.1G] C586 [2.1H] C587 [3.1D] C588 [2.2G] C589 [2.2G] C590 [2.3C] C591 [2.2G] C592 [6.2C] C593 [3.1D] C594 [2.1H] C595 [6.2C] C596 [2.3D] C597 [2.1G] C598 [3.2C] C599 [2.2G] C600 [2.1G] C601 [2.2G] C602 [3.2D] C603 [2.3C] C604 [2.1G] C605 [3.1D] C606 [3.1D] C607 [2.3D] C608 [2.2G] C609 [2.2G] C610 [3.2C] C611 [2.1G] C612 [2.3C] C613 [2.2G] C614 [2.2G] C615 [2.2D] C616 [3.2D]
C617 [2.4G] C618 [2.2H] C619 [2.4G] C620 [2.2C] C621 [2.2G] C622 [2.2G] C623 [2.2H] C624 [3.2D] C625 [2.2D] C626 [2.4G] C627 [2.1G] C628 [6.2B] C629 [2.2C] C630 [6.2B] C631 [2.2G] C632 [2.2D] C633 [2.4G] C634 [3.1C] C635 [2.2G] C636 [2.2G] C637 [2.2H] C638 [2.2G] C639 [2.2G] C640 [2.2C] C641 [2.4G] C642 [3.1C] C643 [2.3G] C644 [2.1G] C645 [3.2C] C646 [3.4H] C647 [2.4G] C648 [2.2G] C649 [7.4C] C650 [2.2G] C651 [7.4B] C652 [2.2G] C653 [6.3D] C654 [3.2C] C655 [2.4G] C656 [7.1B] C657 [6.3D] C658 [2.3G] C659 [3.4H] C660 [3.4H] C661 [3.2C] C662 [7.4C] C663 [8.2D] C567 [5.2H] C40 [6.3F] C664 [8.2D] C665 [2.3G] C666 [8.4D] C667 [7.2B] C668 [7.2C] C669 [7.1C] C670 [3.2D] C671 [8.2D] C672 [12.1C] C673 [2.4G] C674 [2.3G] C675 [8.4D] C676 [7.1C] C677 [8.2D] C678 [5.2C] C679 [12.1C] C680 [12.1C] C681 [3.2D] C682 [8.4D] C683 [8.4D] C684 [12.3C] C685 [8.4D] C686 [8.2C] C687 [8.2C] C688 [8.4D] C689 [7.2C] C690 [6.3C] C691 [6.3C] C692 [6.3D] C693 [14.4G] C694 [6.3D] C695 [8.4C] C696 [11.4E] C697 [8.4C] C698 [8.2D] C699 [7.2B] C700 [12.2C] C701 [7.1B] C702 [8.2C] C703 [12.1B] C704 [11.2D] C705 [11.2E] C706 [8.2B] C707 [11.2D] C708 [8.4C] C709 [11.2D] C710 [8.4C] C711 [8.4C] C712 [8.2C]
CN1 [2.3B] CN1 [9.3D] D1 [13.2E] D501 [14.2E] D502 [10.3G] D503 [10.3G] G1 [2.3F] G1 [3.3B 3.3F] G1 [7.1D 7.2D 7.4D
7.3D] G1 [8.4E 8.2E] G1 [10.3C] G1 [11.4B 11.3G] G1 [12.4D 12.2D] L1 [13.2F] L2 [14.2E] LB501 [3.4D] LB502 [2.4H] LB503 [3.4H] LB504 [7.4B] LB505 [8.2C] LB506 [7.1B] LB507 [8.4C] LB508 [8.1C] LB509 [12.1B] LB510 [8.4C] LB511 [7.2B] LB512 [8.3C] M1 [5.4D 5.4C
5.2D] M2 [5.2F 5.5B
5.5D] M3 [4.2D 4.4D
4.4B] M4 [4.2F 4.5B
4.5E] M501 [4.2B 4.4C
4.4E] M502 [4.5C 4.2H
4.5D] M503 [5.5E 5.2G
5.5C] M504 [5.4B 5.2B
5.4E] MEC1 [15.4F 15.4F] MEC2 [15.4F 15.4F
15.3F 15.4F] Q1 [8.4B] Q2 [8.4B] Q3 [8.4B] Q501 [14.2D] Q502 [13.2E] Q503 [13.2E] Q504 [14.2D] Q505 [13.4D] Q506 [13.4D] Q507 [13.2D] Q508 [8.4C] Q509 [10.2E] Q510 [10.2E] Q511 [10.2F] Q512 [8.2B] R1 [15.3C] R2 [10.2B] R3 [10.2B] R4 [8.4B] R5 [10.2B] R6 [10.3E] R7 [10.2B] R8 [10.3E] R9 [11.2C] R10 [10.2D] R11 [11.2C] R12 [11.3E] R13 [7.4F] R14 [11.2D] R15 [9.3G] R16 [9.3G] R17 [7.4E] R18 [9.3G] R19 [15.2D] R20 [15.2C] R21 [10.3D] R22 [10.3D] R23 [10.3E] R24 [9.3G] R25 [7.4H] R26 [14.4G] R27 [5.2D] R28 [5.3B] R29 [5.3A] R30 [5.2D] R31 [14.5E] R32 [5.3B] R33 [14.4E] R34 [2.2D]
R35 [5.2F] R36 [5.2F] R37 [13.2F] R38 [9.4B] R39 [4.2E] R40 [4.3E] R41 [14.3F] R42 [14.3F] R43 [14.3B] R44 [13.2B] R45 [14.2E] R46 [4.2F] R47 [4.3B] R48 [4.3F] R49 [4.3A] R50 [4.3B] R501 [4.3D] R502 [4.3D] R503 [4.3D] R504 [4.2C] R505 [4.3C] R506 [13.2B] R507 [13.2B] R508 [13.3C] R509 [14.2D] R510 [14.2D] R511 [13.3E] R512 [13.3E] R513 [13.2D] R514 [13.2D] R515 [13.2F] R516 [13.3G] R517 [13.4D] R518 [13.4D] R519 [13.4C] R520 [4.2H] R521 [14.2B] R522 [14.2B] R523 [13.4C] R524 [4.3H] R525 [14.3C] R526 [13.4C] R527 [3.5A] R528 [4.2A] R529 [3.5A] R530 [4.2A]
R532 [5.2H] U501 [13.2C] R533 [3.5E] R534 [3.5G] R535 [3.5D] R536 [5.3D] R537 [3.5D] R538 [11.4C] R539 [3.4G] R540 [5.3D] R541 [3.4G] R542 [5.2H] R543 [3.5E] R544 [5.2A] R545 [3.5D] R546 [5.2A] R547 [3.5D] R548 [10.3B] R549 [7.2F] R550 [7.2F] R551 [10.3B] R552 [7.4H] R553 [10.3B] R554 [7.2E] R555 [10.3B] R556 [7.3F] R557 [10.3B] R558 [5.2C] R559 [5.2C] R560 [13.4C] R561 [7.2C] R562 [15.2D] R563 [7.3E] R564 [7.1C] R565 [9.4C] R566 [7.3C] R567 [7.3F] R568 [8.3D] R569 [8.1D] R570 [10.4G] R571 [10.3G] R572 [15.2D] R573 [15.2D] R574 [11.4D] R575 [11.4D] R576 [15.2D] R577 [7.3E] R578 [7.3E] R579 [12.2C] R580 [12.2C]
R581 [15.3D] R582 [14.4G] R583 [15.2D] R584 [15.2C] R585 [12.2C] R586 [7.1E] R587 [7.1E] R588 [15.2C] R589 [15.2C] R590 [15.2C] R591 [14.4G] R592 [12.2C] R593 [7.3F] R594 [10.2B] R595 [10.2B] R596 [7.3F] R597 [7.1F] R598 [7.1F] R599 [15.2C] R600 [10.2A] R601 [10.3G] R602 [10.2D] R603 [10.2D] R604 [10.2B] R605 [8.4C] R606 [11.4C] R607 [10.2B] R608 [10.3E] R609 [11.2E] R610 [10.3E] R611 [10.2D] R612 [10.2A] R613 [10.3E] R614 [10.2D] R615 [10.4G] R616 [8.4B] R617 [8.4C] TP501 [10.3B] TP502 [10.3B] TP503 [10.3B] TP504 [10.3B] TP505 [10.3B] U1 [11.2C] U2 [10.2C] U3 [11.3F] U4 [11.4D] U5 [14.4D] R531 [5.3D]
U502 [14.2C] U503 [14.4G] Y1 [7.5D]
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM-II, HDCP. <edit here to insert page detail>
www.vinafix.vn
600-10407-0001-200 A
p407_a02 myan
18 OF 18
30-NOV-2006
Loading...