Page 1
8
7
6
5
4
3
2
1
+12V_BUS
C1
CAP CER 10UF 20% 16V X5R
10UFC110UF
(1206)1.8MM H MAX
+12V_BUS
+12V_BUS
C3
C3
+3.3V_BUS
+3.3V_BUS
C2
150nF_16VC2150nF_16V
C4
10uFC410uF
C5
1uF_6.3VC51uF_6.3V
Place these caps last,
ideally as close to the bus
connector as possible
150nF_16V
150nF_16V
LF CAP CER 150NF 10% 16V X7R (0603)
LF CAP CER 150NF 10% 16V X7R (0603)
CAP CER 10UF 10% 6.3V X5R
(0805)1.4MM MAX THICK
+3.3V_BUS
C6
1uF_6.3VC61uF_6.3V
R6 0R R6 0R
R5 0R R5 0R
A_HSYNC_DAC1 (3,7,16)
PETp10_GFXRp10 (2)
PETn10_GFXRn10 (2)
PETp11_GFXRp11 (2)
PETn11_GFXRn11 (2)
PETp12_GFXRp12 (2)
PETn12_GFXRn12 (2)
PETp13_GFXRp13 (2)
PETn13_GFXRn13 (2)
PETp14_GFXRp14 (2)
PETn14_GFXRn14 (2)
PETp15_GFXRp15 (2)
PETn15_GFXRn15 (2)
R4 0R R4 0R
TP6TP6
TP5TP5
PETn0_GFXRn0 (2)
PETp1_GFXRp1 (2)
PETn1_GFXRn1 (2)
PETp2_GFXRp2 (2)
PETn2_GFXRn2 (2)
PETp3_GFXRp3 (2)
PETn3_GFXRn3 (2)
PETp4_GFXRp4 (2)
PETn4_GFXRn4 (2)
PETp5_GFXRp5 (2)
PETn5_GFXRn5 (2)
PETp6_GFXRp6 (2)
PETn6_GFXRn6 (2)
PETp7_GFXRp7 (2)
PETn7_GFXRn7 (2)
PETp8_GFXRp8 (2)
PETn8_GFXRn8 (2)
PETp9_GFXRp9 (2)
PETn9_GFXRn9 (2)
PRESENCE
D D
C C
B B
PCI-EXPRESS EDGE CONNECTOR
+12V_BUS +3.3V_BUS +3.3V_BUS +12V_BUS
x16 PCIe
x16 PCIe
PRSNT1#A1
+12V#A2
+12V#A3
GND#A4
JTAG2
JTAG3
JTAG4
JTAG5
+3.3V#A9
+3.3V#A10
PERST#
GND#A12
REFCLK+
REFCLKGND#A15
PERp0
PERn0
GND#A18
RSVD#A19
GND#A20
PERp1
PERn1
GND#A23
GND#A24
PERp2
PERn2
GND#A27
GND#A28
PERp3
PERn3
GND#A31
RSVD#A32
RSVD#A33
GND#A34
PERp4
PERn4
GND#A37
GND#A38
PERp5
PERn5
GND#A41
GND#A42
PERp6
PERn6
GND#A45
GND#A46
PERp7
PERn7
GND#A49
RSVD#A50
GND#A51
PERp8
PERn8
GND#A54
GND#A55
PERp9
PERn9
GND#A58
GND#A59
PERp10
PERn10
GND#A62
GND#A63
PERp11
PERn11
GND#A66
GND#A67
PERp12
PERn12
GND#A70
GND#A71
PERp13
PERn13
GND#A74
GND#A75
PERp14
PERn14
GND#A78
GND#A79
PERp15
PERn15
GND#A82
MPCIE1
MPCIE1
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
No JTAG
JTAG
JTAG
TESTEN_GND
JTAG_TRST#
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
+12V#B1
+12V#B2
+12V#B3
GND#B4
SMCLK
SMDAT
GND#B7
+3.3V#B8
JTAG1
3.3Vaux
WAKE#
RSVD#B12
GND#B13
PETp0
PETn0
GND#B16
PRSNT2#B17
GND#B18
PETp1
PETn1
GND#B21
GND#B22
PETp2
PETn2
GND#B25
GND#B26
PETp3
PETn3
GND#B29
RSVD#B30
PRSNT2#B31
GND#B32
PETp4
PETn4
GND#B35
GND#B36
PETp5
PETn5
GND#B39
GND#B40
PETp6
PETn6
GND#B43
GND#B44
PETp7
PETn7
GND#B47
PRSNT2#B48
GND#B49
PETp8
PETn8
GND#B52
GND#B53
PETp9
PETn9
GND#B56
GND#B57
PETp10
PETn10
GND#B60
GND#B61
PETp11
PETn11
GND#B64
GND#B65
PETp12
PETn12
GND#B68
GND#B69
PETp13
PETn13
GND#B72
GND#B73
PETp14
PETn14
GND#B76
GND#B77
PETp15
PETn15
GND#B80
PRSNT2#B81
RSVD#B82
Mechanical Key
Mechanical Key
PERp0
PERn0
PERp1
PERn1
PERp2
PERn2
PERp3
PERn3
PERp4
PERn4
PERp5
PERn5
PERp6
PERn6
PERp7
PERn7
PERp8
PERn8
PERp9
PERn9
PERp10
PERn10
PERp11
PERn11
PERp12
PERn12
PERp13
PERn13
PERp14
PERn14
PERp15
PERn15
PRESENCE
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
R2 0R R2 0R
C7
100nFC7100nF
C9
100nFC9100nF
C11
C11
100nF
100nF
C13
C13
100nF
100nF
C15
C15
100nF
100nF
C17
C17
100nF
100nF
C19
C19
100nF
100nF
C21
C21
100nF
100nF
C23
C23
100nF
100nF
C25
C25
100nF
100nF
C27
C27
100nF
100nF
C29
C29
100nF
100nF
C31
C31
100nF
100nF
C33
C33
100nF
100nF
C35
C35
100nF
100nF
C37
C37
100nF
100nF
PERST#
C8
100nFC8100nF
C10
C10
100nF
100nF
C12
C12
100nF
100nF
C14
C14
100nF
100nF
C16
C16
100nF
100nF
C18
C18
100nF
100nF
C20
C20
100nF
100nF
C22
C22
100nF
100nF
C24
C24
100nF
100nF
C26
C26
100nF
100nF
C28
C28
100nF
100nF
C30
C30
100nF
100nF
C32
C32
100nF
100nF
C34
C34
100nF
100nF
C36
C36
100nF
100nF
C38
C38
100nF
100nF
No JTAG
8 1
7 2
6 3
5 4
R1 0R R1 0R
JTAG
TP1TP1
RP1A 0R RP1A 0R
RP1B 0R RP1B 0R
RP1C 0R RP1C 0R
RP1D 0R RP1D 0R
PCIE_REFCLKP (2)
PCIE_REFCLKN (2) PETp0_GFXRp0 (2)
GFXTp0_PERp0 (2)
GFXTn0_PERn0 (2)
GFXTp1_PERp1 (2)
GFXTn1_PERn1 (2)
GFXTp2_PERp2 (2)
GFXTn2_PERn2 (2)
GFXTp3_PERp3 (2)
GFXTn3_PERn3 (2)
GFXTp4_PERp4 (2)
GFXTn4_PERn4 (2)
GFXTp5_PERp5 (2)
GFXTn5_PERn5 (2)
GFXTp6_PERp6 (2)
GFXTn6_PERn6 (2)
GFXTp7_PERp7 (2)
GFXTn7_PERn7 (2)
GFXTp8_PERp8 (2)
GFXTn8_PERn8 (2)
GFXTp9_PERp9 (2)
GFXTn9_PERn9 (2)
GFXTp10_PERp10 (2)
GFXTn10_PERn10 (2)
GFXTp11_PERp11 (2)
GFXTn11_PERn11 (2)
GFXTp12_PERp12 (2)
GFXTn12_PERn12 (2)
GFXTp13_PERp13 (2)
GFXTn13_PERn13 (2)
GFXTp14_PERp14 (2)
GFXTn14_PERn14 (2)
GFXTp15_PERp15 (2)
GFXTn15_PERn15 (2)
TP3TP3
TP2TP2
TP4TP4
A_VSYNC_DAC1 (3,7,16)
CRT1DDCDATA (3,16)
CRT3DDCCLK (3,19) TESTEN (3)
CRT1DDCCLK (3,16)
+3.3V
5 3
1
2
R_RST
R3 0R R3 0R
Place R_RST in U_RST
C39
C39
100nF
100nF
4
U5
U5
NC7SZ08P5X_NL
NC7SZ08P5X_NL
PERST#_buf (2,18)
+12V_BUS +3.3V_BUS +12V_BUS
SMPS_EN1 SMPS_EN2
R45
R45
4.7K
4.7K
402
Node 1
R41
R41
475R
475R
402
1%
A A
R42
R42
200R
200R
402
1%
R43
R43
1.62K
1.62K
402
1%
VMON2
Node 3
VMON1
Node 2
R44
R44
200R
200R
402
1%
8
5%
Q41
Q41
1
MMBT3904
MMBT3904
2 3
Q42
Q42
1
MMBT3904
MMBT3904
2 3
R460RR46
0R
402
DNI
Q43
Q43
1
MMBT3904
MMBT3904
2 3
5mA
7
SMPS_EN1 (8,9) SMPS_EN2 (10,12)
Q44
Q44
1
MMBT3904
C43
C43
100nF
100nF
MMBT3904
2 3
C44
C44
100nF
100nF
6
POWER SEQUENCING
Power Sequence Circuit to ensure SMPS_EN is released after
+12V_BUS and +3.3V_BUS are both in regulation.
Pull-up may or may not be required on SMPS_EN signal depending
on SMPS design.
Node 1 When +12V ramps above min Vbe, SMPS_EN will be helt low
When +3.3V gets close to regulation, one of the two
Node 2
conditions of releasing SMPS_EN is active
Target ~ 900mV when +3.3 at min regulation (worse case)
Typical trigger when +3.3V ramps above 2.2V (650mV)
Node 3 When +12V gets close to regulation, one of the two
conditions of releasing SMPS_EN is active
Target ~ 1.25V when +12 at min regulation (worse case)
Typical trigger when +12V ramps above 10V (1.1V)
5
www.vinafix.vn
4
SYMBOL LEGEND
DNI
DO NOT
INSTALL
#
ACTIVE
LOW
DIGITAL
GROUND
ANALOG
GROUND
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
3
Date: Sheet
2
105-B067xx-00
105-B067xx-00
105-B067xx-00
2
2
2
of
of
of
12 2 Friday, November 24, 2006
12 2 Friday, November 24, 2006
12 2 Friday, November 24, 2006
1
Page 2
5
D D
4
3
2
1
NOTE: some of the PCIE testpoints will
be available trought via on traces.
PETp0_GFXRp0 (1)
PETn0_GFXRn0 (1)
PETp1_GFXRp1 (1)
PETn1_GFXRn1 (1)
PETp2_GFXRp2 (1)
PETn2_GFXRn2 (1)
PETp3_GFXRp3 (1)
PETn3_GFXRn3 (1)
PETp4_GFXRp4 (1)
PETn4_GFXRn4 (1)
PETp5_GFXRp5 (1)
PETn5_GFXRn5 (1)
PETp6_GFXRp6 (1)
C C
B B
PCIE_REFCLKP (1)
PCIE_REFCLKN (1)
PETn6_GFXRn6 (1)
PETp7_GFXRp7 (1)
PETn7_GFXRn7 (1)
PETp8_GFXRp8 (1)
PETp9_GFXRp9 (1)
PETn9_GFXRn9 (1)
PETp10_GFXRp10 (1)
PETn10_GFXRn10 (1)
PETp11_GFXRp11 (1)
PETn11_GFXRn11 (1)
PETp12_GFXRp12 (1)
PETn12_GFXRn12 (1)
PETp13_GFXRp13 (1)
PETn13_GFXRn13 (1)
PETp14_GFXRp14 (1)
PETn14_GFXRn14 (1)
PETp15_GFXRp15 (1)
PETn15_GFXRn15 (1)
DNI DNI
R13
R13
51R
51R
402 402
R14
R14
51R
51R
PERST#_buf (1,18)
For Tektronix LA only
Place close
to ASIC
TP11TP11
TP12TP12
TP13TP13
TP14TP14
TP19TP19
TP20TP20
TP21TP21
TP22TP22
TP27TP27
TP28TP28
R11
R11
4.7K
4.7K
402
TP7TP7
TP8TP8
TP9TP9
TP10TP10
TP15TP15
TP16TP16
TP17TP17
TP18TP18
TP23TP23
TP24TP24
TP25TP25
TP26TP26
+3.3V
DNI
AJ31
AH31
AH30
AG30
AG32
AF32
AF31
AE31
AE30
AD30
AD32
AC32
AC31
AB31
AB30
AA30
AA32
AL28
AK28
AG24
AA24
AF24
Y32
Y31
W31
W30
V30
V32
U32
U31
T31
T30
R30
R32
P32
P31
N31
U1A
U1A
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
Clock
Clock
PCIE_REFCLKP
PCIE_REFCLKN
PERSTB
PCIE_TEST
NC
PART 1 OF 7
PART 1 OF 7
P
P
C
C
I
I
-
E
E
X
X
P
P
R
R
E
E
S
S
S
S
I
I
N
N
T
T
E
E
R
R
F
F
A
A
C
C
E
E
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
Calibration
Calibration
PCIE_CALRN
PCIE_CALRP
PCIE_CALI
AK27
AJ27
AJ25
AH25
AH28
AG28
AG27
AF27
AF25
AE25
AE28
AD28
AD27
AC27
AC25
AB25
AB28
AA28
AA27
Y27
Y25
W25
W28
V28
V27
U27
U25
T25
T28
R28
R27
P27
AE24
AD24
AB24
GFXTp0_PERp0 (1)
GFXTn0_PERn0 (1)
GFXTp1_PERp1 (1)
GFXTn1_PERn1 (1)
GFXTp2_PERp2 (1)
GFXTn2_PERn2 (1)
GFXTp3_PERp3 (1)
GFXTn3_PERn3 (1)
GFXTp4_PERp4 (1)
GFXTn4_PERn4 (1)
GFXTp5_PERp5 (1)
GFXTn5_PERn5 (1)
GFXTp6_PERp6 (1)
GFXTn6_PERn6 (1)
GFXTp7_PERp7 (1)
GFXTn7_PERn7 (1)
GFXTp8_PERp8 (1)
GFXTn8_PERn8 (1) PETn8_GFXRn8 (1)
GFXTp9_PERp9 (1)
GFXTn9_PERn9 (1)
GFXTp10_PERp10 (1)
GFXTn10_PERn10 (1)
GFXTp11_PERp11 (1)
GFXTn11_PERn11 (1)
GFXTp12_PERp12 (1)
GFXTn12_PERn12 (1)
GFXTp13_PERp13 (1)
GFXTn13_PERn13 (1)
GFXTp14_PERp14 (1)
GFXTn14_PERn14 (1)
GFXTp15_PERp15 (1)
GFXTn15_PERn15 (1)
+PCIE
402
R8 2.0K R8 2.0K
402
R9 562R R9 562R
402
R10 1.47K R10 1.47K
A A
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
5
4
www.vinafix.vn
3
2
Date: Sheet
105-B067xx-00
105-B067xx-00
105-B067xx-00
1
2
2
2
of
of
of
22 2 Friday, November 24, 2006
22 2 Friday, November 24, 2006
22 2 Friday, November 24, 2006
Page 3
5
Recommended caps:
(see BOM for qualified values/vendors)
10uF , X5R, 10%, 0805, 6.3V, 1.4MM MAX THICK
1uF, X6S, 10%, 0402, 6.3V
100nF, X7R, 10%, 0402
10nF , X7R, 10%, 0402
D D
C C
B B
R87 and XTALOUT_S net
is done for ease of layout
Place R87 close to Y81
XTALOUT_S
+3.3V
R87 0R R87 0R
C81
C81
1uF_6.3V
A A
1uF_6.3V
T2XCM (17)
T2XCP (17)
T2X0M (17)
T2X0P (17)
T2X1M (17)
T2X1P (17)
T2X2M (17)
T2X2P (17)
T2X3M (17)
T2X3P (17)
T2X4M (17)
T2X4P (17)
T2X5M (17)
T2X5P (17)
1 2
GND_T2PVSS
GND_T2XVSSR
I2C DEVICE ADDRESS' ON DDC3
DEVICE
LM63
CRT3DDCDATA (19)
XTAL
Y81
Y81
4
VCC
OUT
2
GND
E/D
27.000MHz
27.000MHz
XTAL_EN
5
Place close to ASIC
R101 100R R101 100R
R102 100R R102 100R
R103 100R R103 100R
R104 100R R104 100R
R105 100R R105 100R
R106 100R R106 100R
R107 100R R107 100R
+T2PVDD
NS15 NS_VIA NS15 NS_VIA
+T2XVDDR
C224
C224
C225
C225
1uF_6.3V
1uF_6.3V
10uF
10uF
6.3V X6S
402 10%
CAP CER 10UF 10% 6.3V X5R
(0805)1.4MM MAX THICK
+3.3V
ADDRESS
x100 1100
CRT3DDCCLK (1,19)
Overlap
TESTEN (1)
RTCLK (18)
XTALIN_S
3
1
R88 0R R88 0R
MR88 0R MR88 0R
Share one pad, put
close to OSC.
C228
C228
10uF
10uF
C223
C223
1uF_6.3V
1uF_6.3V
6.3V X6S
402 10%
R33
R33
R34
R34
4.7K
4.7K
4.7K
4.7K
402 402
+3.3V
MR24 10K MR24 10K
R24 10K R24 10K
+3.3V
R25 499R R25 499R
R26 499R R26 499R
C61 100nF C61 100nF
MR81 110R MR81 110R
R81 110R R81 110R
1uF_6.3V
1uF_6.3V
6.3V X6S
402 10%
1uF_6.3V
1uF_6.3V
6.3V X6S
402 10%
C227
C227
C222
C222
CRT1DDCDATA (1,16)
CRT1DDCCLK (1,16)
CRT2DDCDATA (17)
CRT2DDCCLK (17)
GPU_DPLUS (19)
GPU_DMINUS (19)
R82
R82
68.1R
68.1R
GENERICA (7)
GENERICB (7)
C226
C226
100nF
100nF
C221
C221
100nF
100nF
T2XCM
T2XCP
T2X0M
T2X0P
T2X1M
T2X1P
T2X2M
T2X2P
T2X3M
T2X3P
T2X4M
T2X4P
T2X5M
T2X5P
X7R
10% 402
X7R
10% 402
HPD1 (16)
R83 0R R83 0R
MR83 0R MR83 0R
TP30TP30
4
TESTEN
VREFG
XTALIN
XTALOUT
4
AL18
AM18
AK19
AL19
AL20
AM20
AL21
AM21
AK18
AJ18
AH18
AG18
AJ20
AK20
AE19
AE18
AF20
AE20
AF19
AC21
AC22
AD22
AE21
AD21
AE22
AF22
AF17
AF21
AK17
AJ19
AF18
AH17
AG17
AG19
AH19
AH22
AH23
AH13
AG13
AE12
AF12
AF11
AE13
AF13
AG12
AH12
AG14
AG22
AL26
AM26
AC8
U1B
U1B
T2XCM
T2XCP
T2X0M
T2X0P
T2X1M
T2X1P
T2X2M
T2X2P
T2X3M
T2X3P
T2X4M
T2X4P
T2X5M
T2X5P
T2PVDD
T2PVSS
T2XVDDR_1
T2XVDDR_2
T2XVDDR_3
T2XVDDR_4
T2XVDDR_5
T2XVDDR_6
T2XVDDR_7
T2XVDDR_8
T2XVDDR_9
T2XVSSR_1
T2XVSSR_2
T2XVSSR_3
T2XVSSR_4
T2XVSSR_5
T2XVSSR_6
T2XVSSR_7
T2XVSSR_8
T2XVSSR_9
T2XVSSR_10
DDC1DATA
DDC1CLK
DDC2DATA
DDC2CLK
DDC3DATA
DDC3CLK
HPD1
SDA
SCL
DPLUS
DMINUS
PLLTEST
TESTEN
VREFG
XTALIN
XTALOUT
Integrated
Integrated
TMDS2
TMDS2
Monitor
Monitor
Interface
Interface
MMI2C
MMI2C
Thermal
Thermal
Diode
Diode
Test
Test
XTAL
XTAL
XTALIN
XTALOUT
3
PART 2 OF 7
PART 2 OF 7
Integrated
Integrated
TMDS
TMDS
V
V
I
I
D
D
E
E
O
O
&
&
M
M
U
U
L
L
T
T
I
I
M
M
E
E
D
D
I
I
A
A
DAC / CRT
DAC / CRT
DAC2 (TV/CRT2)
DAC2 (TV/CRT2)
www.vinafix.vn
AL9
TXCM
AM9
TXCP
AK10
TX0M
AL10
TX0P
AL11
TX1M
AM11
TX1P
AL12
TX2M
AM12
TX2P
AK9
TX3M
AJ9
TX3P
AK11
TX4M
AJ11
TX4P
AK12
TX5M
AJ12
TX5P
AM8
TPVDD
AL8
TPVSS
AJ6
TXVDDR_1
AK6
TXVDDR_2
AL6
TXVDDR_3
AM6
TXVDDR_4
AJ7
TXVSSR_1
AK7
TXVSSR_2
AL7
TXVSSR_3
AM7
TXVSSR_4
AK8
TXVSSR_5
AK24
R
AM24
G
AL24
B
AJ23
HSYNC
AJ22
VSYNC
RSET
AL22
RSET
AVDD_1
AVDD_2
AVSSQ
AVSSN_1
AVSSN_2
VDD1DI
VSS1DI
H2SYNC
V2SYNC
COMP
R2SET
A2VDD_1
A2VDD_2
A2VSSN_1
A2VSSN_2
A2VSSQ
VDD2DI
VSS2DI
NC_A2VDDQ
C82
C82
22pF
22pF
Change to 10ppm/10ppm p/n 5028270000G
C83
C83
22pF
22pF
+AVDD
AL25
AM25
GND_AVSSQ
AK23
AK25
AJ24
+VDD1DI
AM23
AL23
AK15
R2
AM15
G2
AL15
B2
AF15
AG15
AJ15
Y
AJ13
C
AH15
R2SET GND_A2VSSQ
AK14
+A2VDD
AM16
AL16
AM17
AL17
AK13
+VDD2DI
AJ16
AJ17
AL14
Y82
Y82
27_MHZ
27_MHZ
2 1
C246
C246
100nF
100nF
X7R
402 10%
C249
C249
100nF
100nF
X7R
402 10%
R31 499R R31 499R
R32 715R R32 715R
C56
C56
10nF
10nF
X7R
10% 402
C59
C59
10nF
10nF
X7R
10% 402
XTALIN_S
XTALOUT_S
3
C248
C248
C247
C247
10uF
10uF
1uF_6.3V
1uF_6.3V
6.3V
X6S
402 10%
+TXVDDR
C251
C251
C250
C250
10uF
10uF
1uF_6.3V
1uF_6.3V
6.3V
X6S
402 10%
A_R_DAC1 (16)
A_G_DAC1 (16)
A_B_DAC1 (16)
A_HSYNC_DAC1 (1,7,16)
A_VSYNC_DAC1 (1,7,16)
GND_AVSSQ
C63
C63
C62
C62
100nF
100nF
10nF
10nF
X7R
X7R
402 10%
402 10%
C53
C53
C54
C54
100nF
100nF
10nF
10nF
X7R
X7R
402 10%
10% 402
A_R_DAC2 (17)
A_G_DAC2 (17)
A_B_DAC2 (17)
A_HSYNC_DAC2 (7,17)
A_VSYNC_DAC2 (7,17)
DAC2_Y (18)
DAC2_C (18)
DAC2_COMP (18)
C57
C57
C58
C58
100nF
100nF
1uF_6.3V
1uF_6.3V
6.3V
X6S
X7R
402 10%
402 10%
C60
C60
1uF_6.3V
1uF_6.3V
6.3V
X6S
402 10%
R841MR84
1M
Place R_RTCLK close to XTAL so the
main clock line has shortest stub
+TPVDD
NS14 NS_VIA NS14 NS_VIA
GND_TPVSS
CAP CER 10UF 10% 6.3V X5R
(0805)1.4MM MAX THICK
GND_TXVSSR
C64
C64
1uF_6.3V
1uF_6.3V
6.3V X6S
402 10%
C55
C55
1uF_6.3V
1uF_6.3V
6.3V
X6S
402 10%
R_RTCLK
R85 0R R85 0R
MR85 0R MR85 0R
MR86 0R MR86 0R
R86 330R R86 330R
Place close to ASIC
TjXCM
TjXCP
TjX0M
TjX0P
TjX1M
TjX1P
TjX2M
TjX2P
TjX3M
TjX3P
TjX4M
TjX4P
TjX5M
TjX5P
1 2
NS5 NS_VIA NS5 NS_VIA
GND_AVSSQ
NS6 NS_VIA NS6 NS_VIA
GND_AVSSN
NS7 NS_VIA NS7 NS_VIA
GND_VSS1DI
NS8 NS_VIA NS8 NS_VIA
GND_A2VSSN
NS9 NS_VIA NS9 NS_VIA
GND_A2VSSQ
NS10 NS_VIA NS10 NS_VIA
GND_VSS2DI
1 2
1 2
1 2
1 2
1 2
1 2
XTALIN
XTALOUT
RTXTALIN (18)
RTXTALOUT (18)
2
R136 182R R136 182R
R132 182R R132 182R
R133 182R R133 182R
R134 182R R134 182R
R135 182R R135 182R
R131 182R R131 182R
R130 182R R130 182R
2
1
TjXCM (16)
TjXCP (16)
TjX0M (16)
TjX0P (16)
TjX1M (16)
TjX1P (16)
TjX2M (16)
TjX2P (16)
TjX3M (16)
TjX3P (16)
TjX4M (16)
TjX4P (16)
TjX5M (16)
TjX5P (16)
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
105-B067xx-00
105-B067xx-00
105-B067xx-00
1
2
2
2
of
of
of
32 2 Friday, November 24, 2006
32 2 Friday, November 24, 2006
32 2 Friday, November 24, 2006
Page 4
C302
C302
1uF_6.3V
1uF_6.3V
C312
C312
1uF_6.3V
1uF_6.3V
C322
C322
1uF_6.3V
1uF_6.3V
C342
C342
10uF
10uF
5
+3.3V
C303
C303
1uF_6.3V
1uF_6.3V
C313
C313
1uF_6.3V
1uF_6.3V
C326
C326
1uF_6.3V
1uF_6.3V
C343
C343
10uF
10uF
+MVDD
NS12 NS_VIA NS12 NS_VIA
1 2
GND_PVSS
C304
C304
C305
C305
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C315
C315
C314
C314
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C328
C328
C327
C327
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C344
C344
C345
C345
10uF
10uF
10uF
10uF
NS16 NS_VIA NS16 NS_VIA
1 2
GND_VSSRH0
+3.3V
+VDDR_DVP
C306
C306
1uF_6.3V
1uF_6.3V
C316
C316
1uF_6.3V
1uF_6.3V
C329
C329
1uF_6.3V
1uF_6.3V
B54 BLM15BD121SN1 B54 BLM15BD121SN1
B55 BLM15BD121SN1 B55 BLM15BD121SN1
C231
C231
1uF_6.3V
1uF_6.3V
C242
C242
C241
C241
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C237
C237
C236
C236
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
+PVDD
C69
C69
10nF
10nF
C307
C307
1uF_6.3V
1uF_6.3V
C317
C317
1uF_6.3V
1uF_6.3V
C330
C330
1uF_6.3V
1uF_6.3V
C232
C232
1uF_6.3V
1uF_6.3V
NS17 NS_VIA NS17 NS_VIA
C243
C243
1uF_6.3V
1uF_6.3V
C238
C238
1uF_6.3V
1uF_6.3V
C70
C70
100nF
100nF
C308
C308
C309
C309
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C319
C319
C318
C318
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1 2
GND_VSSRH1
C244
C244
1uF_6.3V
1uF_6.3V
CAP CER 10UF 10%
6.3V X5R (0805)1.4MM
MAX THICK
C239
C239
1uF_6.3V
1uF_6.3V
C71
C71
1uF_6.3V
1uF_6.3V
Recommended caps:
(see BOM for qualified values/vendors)
10uF , X5R, 10%, 0805, 6.3V, 1.4MM MAX THICK
1uF, X6S, 10%, 0402, 6.3V
100nF, X7R, 10%, 0402
10nF , X7R, 10%, 0402
+MVDD
C301
C301
1uF_6.3V
1uF_6.3V
D D
C C
B B
C311
C311
1uF_6.3V
1uF_6.3V
C321
C321
1uF_6.3V
1uF_6.3V
C341
C341
10uF
10uF
CAP CER 10UF 10% 6.3V X5R
(0805)1.4MM MAX THICK
C233
C233
1uF_6.3V
1uF_6.3V
C310
C310
1uF_6.3V
1uF_6.3V
C320
C320
1uF_6.3V
1uF_6.3V
C245
C245
10uF
10uF
4
C234
C234
1uF_6.3V
1uF_6.3V
+PVDD
GND_PVSS
AB10
AC19
AD18
AC20
AD19
AD20
AH14
3
U1E
U1E
C1
VDDR1_1
J1
VDDR1_2
M1
VDDR1_3
R1
VDDR1_4
V1
VDDR1_5
AA1
VDDR1_6
A3
VDDR1_7
P9
VDDR1_8
J10
VDDR1_9
N9
VDDR1_10
P10
VDDR1_11
A9
VDDR1_12
Y10
VDDR1_13
P8
VDDR1_14
R9
VDDR1_15
Y9
VDDR1_16
J11
VDDR1_17
A21
VDDR1_18
M10
VDDR1_20
N10
VDDR1_21
Y8
VDDR1_22
J18
VDDR1_23
J19
VDDR1_24
K21
VDDR1_25
A12
VDDR1_26
H13
VDDR1_27
A15
VDDR1_28
J20
VDDR1_29
J13
VDDR1_30
K11
VDDR1_31
K19
VDDR1_32
A18
VDDR1_33
L23
VDDR1_34
K20
VDDR1_35
K24
VDDR1_36
L24
VDDR1_37
H19
VDDR1_38
A24
VDDR1_39
K13
VDDR1_40
J32
VDDR1_41
A30
VDDR1_42
C32
VDDR1_43
F32
VDDR1_45
L32
VDDR1_46
A27
VDDRH0
F1
VDDRH1
A28
VSSRH0
E1
VSSRH1
AB9
VDDR3_1
VDDR3_2
AA9
VDDR3_3
VDDR3_4
VDDR3_5
VDDR3_6
VDDR3_7
VDDR3_8
AJ5
VDDR4_1
AM5
VDDR4_2
AL5
VDDR4_3
AK5
VDDR4_4
AE2
VDDR5_1
AE3
VDDR5_2
AE4
VDDR5_3
AE5
VDDR5_4
AJ14
PVDD
PVSS
PART 5 OF 7
PART 5 OF 7
Memory I/O
Memory I/O
P
P
O
O
W
W
E
E
R
R
Memory I/O Clock
Memory I/O Clock
DVO I/O
DVO I/O
Selected PLL's
Selected PLL's
PCIE_PVDD_12_1
PCIE_PVDD_12_2
PCIE_PVDD_12_3
PCIE_PVDD_12_4
PCIE_VDDR_12_1
PCIE_VDDR_12_2
PCIE_VDDR_12_3
PCIE_VDDR_12_4
PCIE_VDDR_12_5
PCIE_VDDR_12_6
PCIE_VDDR_12_7
PCIE_VDDR_12_8
PCIE_VDDR_12_9
PCIE_VDDR_12_10
PCI-Express
PCI-Express
PCIE_VDDR_12_11
PCIE_VDDR_12_12
PCIE_VDDR_12_13
PCIE_VDDR_12_14
Core
Core
I/O Internal
I/O Internal
PCIE_PVSS
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
VDDC_33
VDDC_34
VDDC_35
VDDC_36
VDDC_37
VDDC_38
VDDC_39
VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4
VDDCI_6
VDDCI_7
VDDCI_8
VDD25_1
VDD25_2
VDD25_3
VDD25_4
VDD25_5
VDD25_6
MPVDD
MPVSS
VDDPLL
V23
N23
P23
U23
W23
N29
N28
N27
N26
N25
AL31
AM31
AM30
AL32
AL30
AM28
AL29
AM29
AM27
AC11
AC12
P14
U15
W14
W15
R17
R15
V15
V16
T16
U16
T17
U17
V14
R18
T18
V18
P18
P19
R19
W19
AD11
N13
N14
N19
N20
P13
P20
W13
W20
Y13
Y14
Y19
Y20
AC14
M23
V10
K18
W10
T14
W17
P16
T23
K14
U19
AC13
AC16
AC18
L10
K22
AA10
A6
A5
AC15
+MPVDD
GND_MPVSS
+VDDPLL
C214
C214
1uF_6.3V
1uF_6.3V
C201
C201
1uF_6.3V
1uF_6.3V
C191
C191
1uF_6.3V
1uF_6.3V
C161
C161
1uF_6.3V
1uF_6.3V
C171
C171
1uF_6.3V
1uF_6.3V
C151
C151
1uF_6.3V
1uF_6.3V
C215
C215
1uF_6.3V
1uF_6.3V
C211
C211
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C202
C202
1uF_6.3V
1uF_6.3V
C192
C192
1uF_6.3V
1uF_6.3V
C162
C162
1uF_6.3V
1uF_6.3V
C172
C172
1uF_6.3V
1uF_6.3V
C152
C152
1uF_6.3V
1uF_6.3V
C67
C67
C212
C212
1uF_6.3V
1uF_6.3V
C206
C206
1uF_6.3V
1uF_6.3V
C203
C203
1uF_6.3V
1uF_6.3V
C193
C193
1uF_6.3V
1uF_6.3V
C163
C163
1uF_6.3V
1uF_6.3V
C173
C173
1uF_6.3V
1uF_6.3V
C216
C216
1uF_6.3V
1uF_6.3V
C207
C207
1uF_6.3V
1uF_6.3V
C66
C66
100nF
100nF
+PCIE
B56
B56
BLM15BD121SN1
BLM15BD121SN1
+PCIE
C204
C204
1uF_6.3V
1uF_6.3V
GND_PCIE_PVSS
C194
C194
1uF_6.3V
1uF_6.3V
C164
C164
1uF_6.3V
1uF_6.3V
C174
C174
1uF_6.3V
1uF_6.3V
C208
C208
1uF_6.3V
1uF_6.3V
C65
C65
10nF
10nF
NS18 NS_VIA NS18 NS_VIA
C195
C195
1uF_6.3V
1uF_6.3V
C165
C165
1uF_6.3V
1uF_6.3V
C175
C175
1uF_6.3V
1uF_6.3V
+VDDCI
C213
C213
10uF
10uF
C209
C209
1uF_6.3V
1uF_6.3V
+MPVDD
1 2
C196
C196
1uF_6.3V
1uF_6.3V
C166
C166
1uF_6.3V
1uF_6.3V
C176
C176
1uF_6.3V
1uF_6.3V
C68
C68
22uF_16V
22uF_16V
2
+VDDC_CT
GND_MPVSS
C197
C197
1uF_6.3V
1uF_6.3V
C167
C167
1uF_6.3V
1uF_6.3V
C177
C177
1uF_6.3V
1uF_6.3V
C210
C210
10uF
10uF
NS11 NS_VIA NS11 NS_VIA
1 2
C198
C198
1uF_6.3V
1uF_6.3V
C168
C168
1uF_6.3V
1uF_6.3V
C178
C178
1uF_6.3V
1uF_6.3V
+PCIE
C200
C200
C199
C199
10uF
10uF
10uF
10uF
CAP CER 10UF 10% 6.3V X5R
(0805)1.4MM MAX THICK
C169
C169
C170
C170
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C179
C179
C180
C180
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
1
+VDDC
C181
C181
10uF
10uF
C183
C183
C182
C182
10uF
10uF
10uF
10uF
CAP CER 10UF 10% 6.3V X5R
(0805)1.4MM MAX THICK
A A
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
5
4
www.vinafix.vn
3
2
Date: Sheet
105-B067xx-00
105-B067xx-00
105-B067xx-00
1
2
2
2
of
of
of
42 2 Friday, November 24, 2006
42 2 Friday, November 24, 2006
42 2 Friday, November 24, 2006
Page 5
5
4
3
2
1
+MVDD
R161
R161
100R
100R
402
1%
R162
R162
100R
100R
402
1%
M_MDA[63..0] (14)
U1C
MVREF_0
C351
C351
100nF
100nF
M_MDA0
M_MDA1
M_MDA2
M_MDA3
M_MDA4
M_MDA5
M_MDA6
M_MDA7
M_MDA8
M_MDA9
M_MDA10
M_MDA11
M_MDA12
M_MDA13
M_MDA14
M_MDA15
M_MDA16
M_MDA17
M_MDA18
M_MDA19
M_MDA20
M_MDA21
M_MDA22
M_MDA23
M_MDA24
M_MDA25
M_MDA26
M_MDA27
M_MDA28
M_MDA29
M_MDA30
M_MDA31
M_MDA32
M_MDA33
M_MDA34
M_MDA35
M_MDA36
M_MDA37
M_MDA38
M_MDA39
M_MDA40
M_MDA41
M_MDA42
M_MDA43
M_MDA44
M_MDA45
M_MDA46
M_MDA47
M_MDA48
M_MDA49
M_MDA50
M_MDA51
M_MDA52
M_MDA53
M_MDA54
M_MDA55
M_MDA56
M_MDA57
M_MDA58
M_MDA59
M_MDA60
M_MDA61
M_MDA62
M_MDA63
C352
C352
10nF
10nF
U1C
M31
DQA_0
M30
DQA_1
L31
DQA_2
L30
DQA_3
H30
DQA_4
G31
DQA_5
G30
DQA_6
F31
DQA_7
M27
DQA_8
M29
DQA_9
L28
DQA_10
L27
DQA_11
J27
DQA_12
H29
DQA_13
G29
DQA_14
G27
DQA_15
M26
DQA_16
L26
DQA_17
M25
DQA_18
L25
DQA_19
J25
DQA_20
G28
DQA_21
H27
DQA_22
H26
DQA_23
F26
DQA_24
G26
DQA_25
H25
DQA_26
H24
DQA_27
H23
DQA_28
H22
DQA_29
J23
DQA_30
J22
DQA_31
E23
DQA_32
D22
DQA_33
D23
DQA_34
E22
DQA_35
E20
DQA_36
F20
DQA_37
D19
DQA_38
D18
DQA_39
B19
DQA_40
B18
DQA_41
C17
DQA_42
B17
DQA_43
C14
DQA_44
B14
DQA_45
C13
DQA_46
B13
DQA_47
D17
DQA_48
E18
DQA_49
E17
DQA_50
F17
DQA_51
E15
DQA_52
E14
DQA_53
F14
DQA_54
D13
DQA_55
H18
DQA_56
H17
DQA_57
G18
DQA_58
G17
DQA_59
G15
DQA_60
G14
DQA_61
H14
DQA_62
J14
DQA_63
C31
MVREFD_0
C30
MVREFS_0
Part 3 of 7
Part 3 of 7
MEMORY INTERFACE A
MEMORY INTERFACE A
DDR1 DDR2 DDR3
DDR1 DDR2 DDR3
bidir. differential strobe
bidir. differential strobe
Not usedbidir. strobe
Not usedbidir. strobe
write stroberead strobe
write stroberead strobe
For DDR2
For DDR2
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_15
DQMAb_0
DQMAb_1
DQMAb_2
DQMAb_3
DQMAb_4
DQMAb_5
DQMAb_6
DQMAb_7
QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6
QSA_7
QSA_0B
QSA_1B
QSA_2B
QSA_3B
QSA_4B
QSA_5B
QSA_6B
QSA_7B
ODTA0
ODTA1
CLKA0
CLKA0b
CKEA0
RASA0b
CASA0b
WEA0b
CSA0b_0
CSA0b_1
CLKA1
CLKA1b
CKEA1
RASA1b
CASA1b
WEA1b
CSA1b_0
CSA1b_1
M_MAA0
D26
M_MAA1
F28
M_MAA2
D28
M_MAA3
D25
M_MAA4
E24
M_MAA5
E26
M_MAA6
D27
M_MAA7
F25
M_MAA8
C26
M_MAA9
B26
M_MAA10
D29
M_MAA11
B27
M_MAA12
E27
E29
M_MAA14
B25
M_MAA15
C25
M_DQMA#0
H31
M_DQMA#1
J29
M_DQMA#2
J26
M_DQMA#3
G23
M_DQMA#4
E21
M_DQMA#5
B15
M_DQMA#6
D14
M_DQMA#7
J17
M_QSA0
J31
M_QSA1
K29
M_QSA2
K25
M_QSA3
F23
M_QSA4
D20
M_QSA5
B16
M_QSA6
D16
M_QSA7
H15
K31
K28
K26
G24
D21
C16
D15
J15
F29
ODTA0 (14)
D24
D31
CLKA0 (14)
E31
CLKA#0 (14)
B30
CKEA0 (14)
B28
RASA#0 (14)
C29
CASA#0 (14)
B31
WEA#0 (14)
B29
CSA#0_0 (14)
C28
B20
CLKA1 (14)
C19
CLKA#1 (14)
C22
CKEA1 (14)
B24
RASA#1 (14)
B22
CASA#1 (14)
B21
WEA#1 (14)
B23
CSA#1_0 (14)
C23
M_MAA[12..0] (14)
M_MAA[15..14] (14)
M_DQMA#[7..0] (14)
M_QSA[7..0] (14)
+MVDD
R165
R165
100R
100R
402
1%
R166
R166
100R
100R
402
1%
D D
C C
B B
MVREF_1
C355
C355
100nF
100nF
C356
C356
10nF
10nF
M_MDB[63..0] (15)
U1D
R172
R172
4.7K
4.7K
R171
R171
4.7K
4.7K
M_MDB0
M_MDB1
M_MDB2
M_MDB3
M_MDB4
M_MDB5
M_MDB6
M_MDB7
M_MDB8
M_MDB9
M_MDB10
M_MDB11
M_MDB12
M_MDB13
M_MDB14
M_MDB15
M_MDB16
M_MDB17
M_MDB18
M_MDB19
M_MDB20
M_MDB21
M_MDB22
M_MDB23
M_MDB24
M_MDB25
M_MDB26
M_MDB27
M_MDB28
M_MDB29
M_MDB30
M_MDB31
M_MDB32
M_MDB33
M_MDB34
M_MDB35
M_MDB36
M_MDB37
M_MDB38
M_MDB39
M_MDB40
M_MDB41
M_MDB42
M_MDB43
M_MDB44
M_MDB45
M_MDB46
M_MDB47
M_MDB48
M_MDB49
M_MDB50
M_MDB51
M_MDB52
M_MDB53
M_MDB54
M_MDB55
M_MDB56
M_MDB57
M_MDB58
M_MDB59
M_MDB60
M_MDB61
M_MDB62
M_MDB63
R170
R170
4.7K
4.7K
R169
R169
243R
243R
B12
C12
B11
C11
C8
C7
F12
D12
E11
F11
D8
D7
G12
G11
H12
H11
H9
G8
G6
G7
H8
N5
N6
R4
R2
W3
W2
R5
W5
W6
R8
R7
W7
W8
W9
C3
AA3
AA5
AA2
AA7
B7
B6
F9
F7
E7
F8
J8
K8
L8
K9
L9
K5
L4
K4
L5
P4
P2
T3
T2
Y3
Y2
T4
T5
T6
V5
Y4
T8
T7
V7
B3
U1D
DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63
MVREFD_1
MVREFS_1
DRAM_RST
TEST_MCLK
TEST_YCLK
MEMTEST
Part 4 of 7
Part 4 of 7
MEMORY INTERFACE B
MEMORY INTERFACE B
DDR1 DDR2 DDR3
DDR1 DDR2 DDR3
read strobe
read strobe
Not usedbidir. strobe
Not usedbidir. strobe
bidir. differential strobe
bidir. differential strobe
write strobe
write strobe
For DDR2
For DDR2
MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14
MAB_15
DQMBb_0
DQMBb_1
DQMBb_2
DQMBb_3
DQMBb_4
DQMBb_5
DQMBb_6
DQMBb_7
QSB_0
QSB_1
QSB_2
QSB_3
QSB_4
QSB_5
QSB_6
QSB_7
QSB_0B
QSB_1B
QSB_2B
QSB_3B
QSB_4B
QSB_5B
QSB_6B
QSB_7B
ODTB0
ODTB1
CLKB0
CLKB0b
CKEB0
RASB0b
CASB0b
WEB0b
CSB0b_0
CSB0b_1
CLKB1
CLKB1b
CKEB1
RASB1b
CASB1b
WEB1b
CSB1b_0
CSB1b_1
M_MAB0
G4
M_MAB1
E6
M_MAB2
E4
M_MAB3
H4
M_MAB4
J5
M_MAB5
G5
M_MAB6
F4
M_MAB7
H6
M_MAB8
G3
M_MAB9
G2
M_MAB10
D4
M_MAB11
F2
M_MAB12
F5
D5
M_MAB14
H2
M_MAB15
H3
M_DQMB#0
B8
M_DQMB#1
D9
M_DQMB#2
G9
M_DQMB#3
K7
M_DQMB#4
M5
M_DQMB#5
V2
M_DQMB#6
W4
M_DQMB#7
T9
M_QSB0
B9
M_QSB1
D10
M_QSB2
H10
M_QSB3
K6
M_QSB4
N4
M_QSB5
U2
M_QSB6
U4
M_QSB7
V8
B10
E10
G10
J7
M4
U3
V4
V9
D6
ODTB0 (15)
J4
B4
CLKB0 (15)
B5
CLKB#0 (15)
C2
CKEB0 (15)
E2
RASB#0 (15)
D3
CASB#0 (15)
B2
WEB#0 (15)
D2
CSB#0_0 (15)
E3
N2
CLKB1 (15)
P3
CLKB#1 (15)
L3
CKEB1 (15)
J2
RASB#1 (15)
L2
CASB#1 (15)
M2
WEB#1 (15)
K2
CSB#1_0 (15)
K3
M_MAB[12..0] (15)
M_MAB[15..14] (15)
M_DQMB#[7..0] (15)
M_QSB[7..0] (15)
A A
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
5
4
www.vinafix.vn
3
2
Date: Sheet
105-B067xx-00
105-B067xx-00
105-B067xx-00
1
2
2
2
of
of
of
52 2 Friday, November 24, 2006
52 2 Friday, November 24, 2006
52 2 Friday, November 24, 2006
Page 6
5
D D
C C
B B
A A
5
4
U1F
U1F
AH27
PCIE_VSS_1
AC23
PCIE_VSS_2
AL27
PCIE_VSS_3
R23
PCIE_VSS_4
P25
PCIE_VSS_5
R25
PCIE_VSS_6
T26
PCIE_VSS_7
U26
PCIE_VSS_8
W26
PCIE_VSS_9
Y26
PCIE_VSS_10
AB26
PCIE_VSS_11
AC26
PCIE_VSS_12
AD25
PCIE_VSS_13
AE26
PCIE_VSS_14
AF26
PCIE_VSS_15
AD26
PCIE_VSS_16
AG25
PCIE_VSS_17
AH26
PCIE_VSS_18
AC28
PCIE_VSS_19
Y28
PCIE_VSS_20
U28
PCIE_VSS_21
P28
PCIE_VSS_22
AH29
PCIE_VSS_23
AF28
PCIE_VSS_24
V29
PCIE_VSS_25
AC29
PCIE_VSS_26
W27
PCIE_VSS_27
AB27
PCIE_VSS_28
V26
PCIE_VSS_29
AJ26
PCIE_VSS_30
AJ32
PCIE_VSS_31
AK29
PCIE_VSS_32
P26
PCIE_VSS_33
P29
PCIE_VSS_34
R29
PCIE_VSS_35
T29
PCIE_VSS_36
U29
PCIE_VSS_37
W29
PCIE_VSS_38
Y29
PCIE_VSS_39
AA29
PCIE_VSS_40
AB29
PCIE_VSS_41
AD29
PCIE_VSS_42
AE29
PCIE_VSS_43
AF29
PCIE_VSS_44
AG29
PCIE_VSS_45
AJ29
PCIE_VSS_46
AK26
PCIE_VSS_47
AK30
PCIE_VSS_48
AG26
PCIE_VSS_49
N30
PCIE_VSS_50
R31
PCIE_VSS_51
AF30
PCIE_VSS_52
AC30
PCIE_VSS_53
V31
PCIE_VSS_54
P30
PCIE_VSS_55
AA31
PCIE_VSS_56
U30
PCIE_VSS_57
AD31
PCIE_VSS_58
AK32
PCIE_VSS_59
AJ28
PCIE_VSS_60
Y30
PCIE_VSS_61
AJ30
PCIE_VSS_62
AK31
PCIE_VSS_63
AA23
PCIE_VSS_64
AG31
PCIE_VSS_65
N24
PCIE_VSS_66
AB23
PCIE_VSS_69
P24
PCIE_VSS_70
R24
PCIE_VSS_71
T24
PCIE_VSS_72
U24
PCIE_VSS_73
V24
PCIE_VSS_74
W24
PCIE_VSS_75
Y24
PCIE_VSS_76
AC24
PCIE_VSS_77
AH24
PCIE_VSS_78
V25
PCIE_VSS_79
AA25
PCIE_VSS_80
R26
PCIE_VSS_81
AA26
PCIE_VSS_82
T27
PCIE_VSS_83
AE27
PCIE_VSS_84
B1
VSS_1
H1
VSS_2
L1
VSS_3
P1
VSS_4
U1
VSS_5
Y1
VSS_6
AD7
VSS_7
AE8
VSS_8
AL1
VSS_9
A2
VSS_10
AM2
VSS_11
AD10
VSS_12
E8
VSS_13
H5
VSS_14
K10
VSS_15
M8
VSS_16
T10
VSS_17
E12
VSS_18
AC9
VSS_19
AF14
VSS_20
AD8
VSS_21
C5
VSS_22
F10
VSS_23
J3
VSS_24
L6
VSS_25
M6
VSS_26
P6
VSS_27
AA4
VSS_28
AG11
VSS_29
V3
VSS_30
AG16
VSS_31
R3
VSS_32
C6
VSS_33
C9
VSS_34
F6
VSS_35
H7
VSS_36
J6
VSS_37
M7
VSS_38
L7
VSS_39
4
Part 6 of 7
Part 6 of 7
CORE GND
CORE GND
www.vinafix.vn
3
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
PCI-Express GND
PCI-Express GND
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VEFUSE
3
M9
M3
P5
P7
AA6
AD16
Y23
AD17
AH11
A8
U7
C10
E9
F3
J9
N7
N3
Y5
AM13
AC10
Y6
U6
E5
AL13
A11
U8
U9
U10
R6
AD6
V6
AD14
AD13
D11
J12
K12
K15
A13
F13
E13
F15
K16
J21
H16
T15
V17
C15
C4
U14
P15
A16
E16
G13
G16
P17
R16
AC17
R14
W16
C18
F16
W18
U18
AE16
AE17
A19
H32
F19
G19
N8
Y7
R10
T19
V19
G21
C21
F21
AE14
AK16
U5
F22
F18
K30
AH16
C24
F24
M24
A25
D30
E25
G25
G20
G22
F27
E28
H21
C27
E32
H28
J30
K17
K27
M32
A22
C20
E19
H20
J24
M28
J28
J16
F30
AD15
L29
A31
B32
E30
AE15
AG23
AD9
AF16
AH10
AJ10
K23
2
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
2
Date: Sheet
1
105-B067xx-00
105-B067xx-00
105-B067xx-00
1
2
2
2
of
of
of
62 2 Friday, November 24, 2006
62 2 Friday, November 24, 2006
62 2 Friday, November 24, 2006
Page 7
5
D D
STV/HDTV#_OUT_DET (18)
C C
4
U1G
U1G
VID_[7..0] (18)
VPCLK0 (18)
VHAD_0 (18)
VHAD_1 (18)
VPHCTL (18)
VIPCLK (18)
DVPCNTL_0
VID_0
VID_1
VID_2
VID_3
VID_4
VID_5
VID_6
VID_7
AF10
AG10
AE10
AH9
AJ8
AH8
AG9
AH7
AG8
AF7
AE9
AG7
AF9
AG1
AF2
AF1
AF3
AG2
AG3
AH2
AH3
AJ2
AJ1
AK2
AK1
AK3
AL2
AL3
AM3
AE6
AF4
AF5
AG4
AJ3
AH4
AJ4
AG5
AH5
AF6
AE7
AG6
VID_0
VID_1
VID_2
VID_3
VID_4
VID_5
VID_6
VID_7
VPCLK0
VHAD_0
VHAD_1
VPHCTL
VIPCLK
DVPCLK
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
VIP
VIP
Capture
Capture
VIP
VIP
Host
Host
PART 7 OF 7
PART 7 OF 7
Zoom Video Port
Zoom Video Port
GPIO_0
GPIO_1
General
General
GPIO_2
Purpose
Purpose
GPIO_3
I/O
I/O
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GENERICA
GENERICB
GENERICC
GENERICD
DVALID
PSYNC
ROMCSb
RSVD1
RSVD2
No Connect
No Connect
DVP_MVP_CNTL_0
DVP_MVP_CNTL_1
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
3
GPIO_0
AD4
GPIO_1
AD2
GPIO_2
AD1
GPIO_3
AD3
GPIO_4
AC1
GPIO_5
AC2
GPIO_6
AC3
GPIO_7
AB2
GPIO_8
AC6
GPIO_9
AC5
GPIO_10
AC4
GPIO_11
AB3
GPIO_12
AB4
GPIO_13
AB5
AD5
AB8
AA8
AB7
AK22
AF23
AE23
AD23
AH6
AF8
AC7
AE11
AD12
AB6
AJ21
AK21
AH21
AG21
AG20
AH20
AK4
AL4
GPIO_15
GPIO_16
GENERICA
GENERICB
GENERICC
GENERICD
DVALID
PSYNC
ROMCSb
HPD2 (17)
GPIO_15 (11)
GPIO_16 (8)
ThermINT (8,19)
TP39TP39
TP40TP40
TP41TP41
Placed to be easily accessible
With near by ground test points
2
GPIO PIN STRAP ALTERNATE USE
GPIO_0 YES VIDB_0 (OUTPUT)
GPIO_1 YES VIDB_1 (OUTPUT)
GPIO_2 YES VIDB_2 (OUTPUT)
GPIO_3 YES VIDB_3 (OUTPUT)
GPIO_4 YES VIDB_4 (OUTPUT)
GPIO_5 YES VIDB_5 (OUTPUT)
GPIO_6 YES LDAC (OUTPUT)
GPIO_7 NO PAL/NTSC TV (INPUT)
GPIO_8 YES GPIO_9 YES FLOW_CNTL_EN (OUTPUT)
GPIO_10 NO TESTOUT(8) (OUTPUT)
GPIO_11 YES TESTOUT(9) (OUTPUT)
GPIO_12 YES TESTOUT(10) (OUTPUT)
GPIO_13 YES TESTOUT(11 (OUTPUT))
GPIO_14 NO HPD_DVI1 (HPD2) (INPUT)
GPIO_15 NO VIDA#/B (OUTPUT)
GPIO_16 NO 12VEXT_DETECT (INPUT)
GPIO_17 NO T_INT#(INPUT) & 12VEXT_DETECT# (INPUT)
1
GENERICA (3)
These are test clock
sources for ASIC
debugging
GENERICB (3)
+3.3V
PIN BASED STRAPS
B B
A_VSYNC_DAC1 (1,3,16)
A_HSYNC_DAC1 (1,3,16)
A_VSYNC_DAC2 (3,17)
A_HSYNC_DAC2 (3,17)
A A
5
GPIO_0
GPIO_1
GPIO_3
GPIO_2
GPIO_4
GPIO_6
GPIO_5
GPIO_8
GPIO_9
GPIO_13
GPIO_12
GPIO_11
A_VSYNC_DAC1
A_HSYNC_DAC1
A_VSYNC_DAC2
A_HSYNC_DAC2
GENERICC
GPIO_15
DVPCNTL_0
PSYNC
GPIO_7
GENERICD
4
DNI
DNI
DNI
DNI
DNI
HDCPb
HDCP
DNI
DNI
DNI
DNI
VGA_DIS
NTSC
R52 10K R52 10K
R53 10K R53 10K
R54 10K R54 10K
R55 10K R55 10K
R56 10K R56 10K
R57 10K R57 10K
R58 10K R58 10K
R59 10K R59 10K
R60 10K R60 10K
R61 10K R61 10K
R62 10K R62 10K
R64 10K R64 10K
R65 10K R65 10K
R66 10K R66 10K
R67 10K R67 10K
R68 10K R68 10K
R71 10K R71 10K
R69 10K R69 10K
R70 10K R70 10K
R72 10K R72 10K
MR51 10K MR51 10K R51 10K R51 10K
MR52 10K MR52 10K
MR53 10K MR53 10K
MR54 10K MR54 10K
MR55 10K MR55 10K
MR56 10K MR56 10K
MR57 10K MR57 10K
MR58 10K MR58 10K
MR59 10K MR59 10K
MR60 10K MR60 10K
MR61 10K MR61 10K
MR62 10K MR62 10K
MR63 10K MR63 10K R63 10K R63 10K
MR64 10K MR64 10K
MR65 10K MR65 10K
MR66 10K MR66 10K
MR67 10K MR67 10K
MR68 10K MR68 10K
MR71 10K MR71 10K
MR69 10K MR69 10K
MR70 10K MR70 10K
MR72 10K MR72 10K
www.vinafix.vn
DNI
GPIO(0) - TX_PWRS_ENB (Transmitter Power Savings Enable)
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)
DNI
GPIO(1) - TX_DEEMPH_EN (Transmitter De-emphasis Enable)
0: Tx de-emphasis disabled for mobile mode
1: Tx de-emphasis enabled (Default setting for Desktop)
GPIO(3:2) - Miscellaneous PCI-Express Modes
00: Halt impedance calibration before transmitter is enabled and enable receiver detection (Default
setting for Desktop)
01: Allow impedance calibration to continue on in the background AFTER transmitter has
been enabled and enable receive detection.
10: Bypass common-mode detection & receiver detection and halt impedance calibration before TX_EN.
11: Short-circuit internal loopback and halt impedance calibration before TX_EN and enable
receiver detection.
GPIO(4) - DEBUG_ACCESS: 0 for normal operation, 1 for debug mode
DNI
GPIO(6:5) - PLL_IBIAS_RD (Reduced mirror bias setting for PHY PLL)
Provide 4 different IBIAS settings - Set to 00 for R520
GPIO(8) - FORCE_COMPLIANCE: 0 for Normal operation, 1 for Force into Compliance Mode
DNI
GPIO(9,13:11) - ROMIDCFG[3..0]
HDCP
1001 - 1M AT25F1024 ROM (Atmel)
1010 - 1M AT45DB011 ROM (Atmel)
1011 - 1M M25P10 ROM (ST)
HDCPb
1100 - 512K M25P05 ROM (ST) (ATI default)
1101 - 1M SST45LF010 ROM (SST), 1M W45B512 ROM (WinBond), 512K W45B012 ROM (WinBond)
HDCPb HDCP
1110 - 1M SST25VF010 ROM (SST), 512K SST25VF512 ROM (SST)
1111 - 1M NX25F011B ROM (NexFlash)
VSYNC - VIP_DEVICE
0: Slave VIP host port devices present (use if Theater is populated)
1: No slave VIP host port devices reporting presence during reset (use for configurations without video-in)
DNI
HSYNC - DWNGRD
This straps allow a Workstation bonded part to be downgraded to a normal part on a board. This
allow inventory management to better balance demand.
0 - Device remain a Workstation grade part
1 - Part is downgraded to a Normal part
H2SYNC, V2SYNC, GENERICC - Star Memory System repair mode
000 - Default
Memory Vendor Straps for DDR2 16Mx16 and 32Mx16: ------------->
VGA DISABLE : 1 for disable (set to 0 for normal operation)
PAL
TV OUT STANDARD (Jumper position overwrite resistor settings)
0 - PAL TVO (Jumper position 2-3)
1 - NTSC TVO (Jumper position 1-2)
NOT USED.
ATI Feature I
ATI Board Feature I
3
ATI PCIE FEATURE I
ATI PCIE FEATURE II
ATI PCIE FEATURE III
ATI Feature II
GPIO_8
GPIO_9
GPIO_10
ROMCSb
[31:24]@ MEMTYPE[1:0]
___________________________________________________________________
22h [ 1 : 0 ] Infineon 16Mx16 1.8V
28h [ 0 : 0 ] Common 32Mx16
2Fh [ 1 : 1 ] Reserved
MC_MISC_0 [DVPCNTL_0:GPIO_15] Memory
20h [ 0 : 0 ] Common and Infineon 16Mx16 2.0V
21h [ 0 : 1 ] Samsung 16Mx16
23h [ 1 : 1 ] Hynix 16Mx16
24h [ 0 : 0 ] Micron 16Mx16
25h [ 0 : 1 ] Elpida 16Mx16
26h [ 1 : 0 ] Reserved
27h [ 1 : 1 ] Reserved
29h [ 0 : 1 ] Samsung 32Mx16
2Ah [ 1 : 0 ] Infineon 32Mx16
2Bh [ 1 : 1 ] Hynix 32Mx16
2Ch [ 0 : 0 ] Micron 32Mx16
2Dh [ 0 : 1 ] Elpida 32Mx16
2Eh [ 1 : 0 ] Reserved
2
+3.3V
+3.3V
R35
R35
10K
10K
U2
U2
D
C
S
HOLD
W
VCC
VSS
M25P05-AVNM6P
M25P05-AVNM6P
105-B067xx-00
105-B067xx-00
105-B067xx-00
2
Q
4
1
5
6
1
+3.3V
7
R36
R36
10K
10K
MR36
MR36
10K
10K
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
3
8
C51
C51
100nF
100nF
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
BIOS1
BIOS1
BIOS
BIOS
113-XXXXXX-XXX
113-XXXXXX-XXX
VIDEO BIOS
FIRMWARE
72 2 Friday, November 24, 2006
72 2 Friday, November 24, 2006
72 2 Friday, November 24, 2006
2
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Page 8
8
+3.3V_BUS
R673
R673
3.65K
3.65K
SMPS_EN1 (1,9)
D D
Vocp = 0.6 * 60K/(2K+Rs) * DCR * Iocp / 2
Assume Iocp = 45A, Rs = 221R, DCR = 2.1mR Vocp ~= 0.77
Assume Iocp = 55A, Rs = 221R, DCR = 2.1mR Vocp ~= 0.94
Assume Iocp = 60A, Rs = 221R, DCR = 2.1mR Vocp ~= 1
Rocp = Vocp / (Vref - Vocp) * 100k
Frequency
Fs(kHz)= 18600000 / RT
Fs = 364KHz
Soft Start
tss = 4096 / fs
for 364kHz; tss ~= 11.25ms
C C
Overlap the footprints for
each pair of caps below:
+VDDC_Source
C621
C621
10UF
10UF
B B
16V
X5R
CAP CER 10UF 20% 16V X5R
(1206)1.8MM H MAX
The net sharing (SW1)
is for ease of layout with
other SMPS solutions
This symbol is
used for 132
SMPS p/n.
A A
VDDC1
VDDC1
RV560 Socket
RV560 Socket
Rocp > 92K
Iocp = 45A
Rocp > 141K Iocp = 55A
Rocp > 177K Iocp = 60A
Iocp = 60A Rocp > 550K
VDDC_FB (11)
8 1
C622
C622
MC621
MC621
10UF
10UF
5.6uF_25V
5.6uF_25V
16V
X5R
SW1 (9)
Actual Vendor TBD
Actual Vendor TBD Actual Vendor TBD
8
402
Trigger [2.7V ~ 2.9V]
R6741KR674
EN threshold = 0.6V
1K
402
Vref = 1.6V
for DCR = 2.1mR
for DCR = 2.7mR due to Temp rise
+VDDC
Remote Sensing
RFB1
R651
R651
10K
10K
402
RFB2
R650
R650
20K
20K
2 3
1
Q661
Q661
MMBT3906
MMBT3906
L621
L621
IND_0.47uH_7A
IND_0.47uH_7A
6 3
7 2
5 4
RP621B 0R RP621B 0R
RP621A 0R RP621A 0R
RP621C 0R RP621C 0R
RP621D 0R RP621D 0R
MC622
MC622
5.6uF_25V
5.6uF_25V
LGD1_R LGD2_R LGD2_R
MQ601
MQ601
BSC119N03SG
BSC119N03SG
HGD1_R HGD1_R
SW1
MQ603
MQ603
BSC119N03SG
BSC119N03SG
LGD1_R LGD1_R
402
R662 1K R662 1K
+12V_BUS
C629
C629
100uF_16V
100uF_16V
C623
C623
MC623
MC623
10UF
10UF
5.6uF_25V
5.6uF_25V
1206 1206 1206 1206
16V
X5R
2 3
1
+VDDC_Source +VDDC_ExtSource
678
9
Pad
Pad
Thermal
Thermal
123
4 5
678
9
Pad
Pad
Thermal
Thermal
123
4 5
7
+5V_SMPS
R670 10R R670 10R
ENBUS
Trigger [9.5V, 10.2V]
ENBUS threshold = 1.6V
R_12V = 5.11K
TP602
TP602
TP_32mil_SM_top
TP_32mil_SM_top
+1.6V_VREF
X7R
MC624
MC624
5.6uF_25V
5.6uF_25V
HGD1_R HGD1_R
Q601
Q601
LGD1_R
MQ602
MQ602
MQ604
MQ604
7
R654 150R R654 150R
R656 10K R656 10K
OVP Trip @ 0.96V
Trigger
[1.55V, 1.65V]
Type II compensation
1
1
9
Pad
Pad
Thermal
Thermal
9
Pad
Pad
Thermal
Thermal
Current loop
compensation
R653
R653
2.67K
2.67K
402
C653
C653
2.2nF
2.2nF
402 50V
1.8nF preferred
Type III
compensation
402
Superworld SWDH1813-R47MF
Chilisin SSL0503HCA-R47T-N Chilisin SSL0503HCA-R47T-N
0.47uH, 6.5mRmax,
7Arms/9.5Asat, 8.89x6.1x5mm
Coilcraft DO1813H=331ML
0.33uH, 4mRmax,
7Arms/10Asat, 8.89x6.1x5mm
Delta
0.39uH, 5.8mRmax,
6Arms/8Asat, 8.6x5.84x4mm
C624
C624
10UF
10UF
16V
2 3
X5R
1
IRFR3711TRPBF
IRFR3711TRPBF
Actual Vendor TBD
Q603
Q603
IRFR3711TRPBF
IRFR3711TRPBF
Actual Vendor TBD Actual Vendor TBD
BSC119N03SG
BSC119N03SG
Actual Vendor TBD Actual Vendor TBD
BSC119N03SG
BSC119N03SG
+5V_SMPS_F
402
C670
C670
1uF_6.3V
1uF_6.3V
402
6.3V
Y5V
C671
C671
100nF
100nF
402
10V
X5R
C673
C673
100nF
100nF
402
10V
X5R
C659
C659
1nF
1nF
402
50V
+3.3V_BUS
5.6nF preferred
R652
R652
3.65K
3.65K
402
C651
C651
10nF
10nF
402
8.2nF preferred
MRP622D 0R MRP622D 0R
MRP622C 0R MRP622C 0R
MRP622B 0R MRP622B 0R
MRP622A 0R MRP622A 0R
2 3
Q602
Q602
IRFR3711TRPBF
IRFR3711TRPBF
Actual Vendor TBD Actual Vendor TBD Actual Vendor TBD
2 3
678
4 5
678
4 5
X7R
R655
R655
51.1K
51.1K
R675
R675
402
10K
10K
402
C658
C658
R658
R658
100nF
100nF
402
100K
100K
X5R
402
10V
R659
R659
Rocp
590K
590K
402
560nF preferred
C654 470nF C654 470nF
6.3V 402 402
X5R
C655 6.8nF C655 6.8nF
402 25V
X7R
402
R657
R657
C656
C656
15K
15K
1nF
1nF
402
402
X7R
50V
C652
C652
220pF_50V
220pF_50V
402
X7R
10V
p/n 5260035900G
5 4
6 3
7 2
8 1
1 2
1 2
Rs
Q604
Q604
IRFR3711TRPBF
IRFR3711TRPBF
123
123
1 2
PCMB104T-R45MS
PCMB104T-R45MS
1/10W
R604
R604
0603
221R
221R
Delta HAH1030-R47-R
0.47uH, 2.1mRmax, 20Adc/26Asat,
10.7x10x3mm
Cyntec PCMC063T-R47MN
Vishay/Dale IHLP2525CZ-01-0.47uH
0.47uH, 4mRtyp/4.2mRmax, 17.5Adc/26Asat,
6.5x6.9x3mm
Cyntec PCMC133ER68MF p/n 5260032900G
0.68uH, 2.3mRtyp/2.5mRmax, 28Adc/49Asat,
12.6x13.8x3.5mm
0.47uH, 1.3mRtyp/1.45mRmax, 20Adc/25Asat,
11.7x10.3x6.5mm
Cyntec PCMB104T-R45MS (KL601, KL611)
0.45uH, 1.1mRtyp/1.3mRmax, 25Adc/27Asat,
11.5x10.3x4mm
Vcc threshold = 4V
U601
U601
31
VCC
29
ENBUS
30
EN
4
VP
2
RT
28
PGOOD
1
VREF
8
OCP
11
ICOMP
3
PGSEN
5
FB
6
COMP
32
AGND
33
THM#33
7 2
8 1
RP622A 0R RP622A 0R
ML601 ML601
L601
L601
0.47uH_17.5A
0.47uH_17.5A
NL601
NL601
HC1018
HC1018
KL601
KL601
CS+1
RP622B 0R RP622B 0R
6 3
5 4
RP622C 0R RP622C 0R
C625
C625
10UF
10UF
16V
X5R
CS-1
RP622D 0R RP622D 0R
C604
C604
1UF_16V
1UF_16V
X7R
R605
R605
221R
221R
6
NX2415
NX2415
L622
L622
IND_0.47uH_7A
IND_0.47uH_7A
+VDDC
6
PVCC1
HDRV1
LDRV1
PGND1
PVCC2
HDRV2
LDRV2
PGND2
DROOP
MC625
MC625
5.6uF_25V
5.6uF_25V
C614
C614
1UF_16V
1UF_16V
X7R
R615
R615
221R
221R
p/n 5260026100G
BST1
SW1
CS+1
CS-1
BST2
SW2
CS+2
CS-2
IOUT
NC
23
24
25
26
22
21
9
10
18
17
16
15
19
20
12
13
7
14
27
+12V_EXT
C630
C630
100uF_16V
100uF_16V
Overlap the footprints for each pair of caps below:
C626
C626
5.6uF_25V
5.6uF_25V
10UF
10UF
16V
X5R
ML611 ML611
L611
L611
0.47uH_17.5A
0.47uH_17.5A
NL611
NL611
HC1018
HC1018
KL611
KL611
PCMB104T-R45MS
PCMB104T-R45MS
CS+2
CS-2
p/n 5260036400G
p/n 5260035400G
p/n 5260039500G FALCO HC1018 (NL601, NL611)
p/n 5260039400G
+5V_SMPS
C601
C601
1uF_6.3V
1uF_6.3V
402
Y5V
6.3V
U601_HGD1
U601_SW1_R
U601_LGD1
C603
C603
1nF
1nF
402 50V
C611
C611
1uF_6.3V
1uF_6.3V
402
Y5V
6.3V
U601_HGD2
U601_SW2_R
U601_LGD2
C613
C613
402
1nF
1nF
R663
R663
100K
100K
Rdroop
C657
C657
1nF
1nF
402
MC626
MC626
R614
R614
221R
221R
3
1
C602
C602
1uF
1uF
R601 0R R601 0R
R603 0R R603 0R
X7R
+5V_SMPS
3
1
C612
C612
1uF
1uF
R611 0R R611 0R
R613 0R R613 0R
X7R
50V
X5R
10V
Superworld SWDH1813-R47MF
0.47uH, 6.5mRmax,
7Arms/9.5Asat, 8.89x6.1x5mm
Coilcraft DO1813H=331ML
0.33uH, 4mRmax,
7Arms/10Asat, 8.89x6.1x5mm
Delta
0.39uH, 5.8mRmax,
6Arms/8Asat, 8.6x5.84x4mm
MC627
MC627
C627
C627
5.6uF_25V
5.6uF_25V
10UF
10UF
1206 1206 1206 1206
16V
X5R
1 2
1 2
1 2
1/10W
0603
5
D601
D601
BAT54A
BAT54A
2
1206
16V
1206 for ease of layout
X7R 10%
HGD1_R
R602 2R2 R602 2R2
1 2
LGD1_R
CS+1
CS-1
D611
D611
BAT54A
BAT54A
2
1206
16V
1206 for ease of layout
X7R
10%
HGD2_R
R612 2R2 R612 2R2
1 2
LGD2_R
CS+2
CS-2
Droop setting
Assume 2.1mR DCR
Rdroop ~ 100K 1.8mR load line
3% VDDC @ 20A step
Rdroop ~ 58K 3mR load line
5% VDDC @ 20A step
VDDC_IOUT (13)
p/n 5260035900G
MC628
MC628
C628
C628
5.6uF_25V
5.6uF_25V
10UF
10UF
16V
2 3
X5R
Q611
Q611
1
IRFR3711TRPBF
IRFR3711TRPBF
2 3
Q613
Q613
1
IRFR3711TRPBF
IRFR3711TRPBF
Actual Vendor TBD Actual Vendor TBD
MQ611
MQ611
BSC119N03SG
BSC119N03SG
678
9
Thermal
Thermal
Pad
Pad
123
4 5
HGD2_R
MQ613
MQ613
BSC119N03SG
BSC119N03SG
678
9
Thermal
Thermal
Pad
Pad
123
4 5
5
4
SW1
5%
D602
D602
MBR0540T1G
MBR0540T1G
SW2
5%
D612
D612
MBR0540T1G
MBR0540T1G
NX2415 Controller Area Component Placement.
The numbers are based on the priorities.
1-Place the bypass capacitors for Vcc and Pvcc as well as Boost caps as close to
the controller as possible. They are as follows; C670, C601, C611, C602 and C612.
2-Current Sense amplifier input caps, Error amp and Current Amp HF feedback
caps. They are C603, C613, C652 and C655.
3-Vref, Vp , Iout caps and Rt resistor. These are C659, C658, C657, and R655.
4-Voltage and Current amplifier compensation network.
J1601
J1601
6P_HDER
6P_HDER
1
+12V_1
2
+12V_2
3
+12V_3
GND_1
GND_2
Sense
CAP CER 10UF 20% 16V X5R
(1206)1.8MM H MAX
HGD2_R HGD2_R
4
6
5
+VDDC_ExtSource
2 3
Q612
Q612
1
IRFR3711TRPBF
IRFR3711TRPBF
2 3
Q614
Q614
1
IRFR3711TRPBF
IRFR3711TRPBF
678
123
4 5
678
123
4 5
C1601
C1601
220pF
220pF
12V_EXT_DETb
SW2 SW1
MQ612
MQ612
BSC119N03SG
BSC119N03SG
Actual Vendor TBD
9
Thermal
Thermal
Pad
Pad
HGD2_R
SW2
MQ614
MQ614
BSC119N03SG
BSC119N03SG
9
Actual Vendor TBD Actual Vendor TBD
Thermal
Thermal
Pad
Pad
LGD2_R LGD2_R
4
3
I_BIAS = I_VCC + QG (Fsw)
= 10mA + 2(15nC+40nC)(400kHz)
I_BIAS < 55mA < I_BIASmax ~= 56mA
R_BIAS = (VINmin-Vcc)/I_BIAS
R_BIAS = 5V/55mA = 90R
P(R_BIAS) = (Imax)^2 * R_BIAS
P(R_BIAS) = (100mA)^2 * 90R = 900mW 1206
SMPS_EN1 (1,9)
R3
MR653
MR653
249R
249R
1%
C3
MC653
MC653
Type III
compensation
2.2nF
2.2nF
10%
402
50V X7R
If Rs and Rp dividers for
differential amplifier is
not populated
+12V_EXT
+3.3V
C1602
C1602
220pF
220pF
C1604
C1604
C1603
C1603
10uF
10uF
10uF
10uF
MR660
MR660
10K
10K
12V_EXT_DETb
Pull-up to 3.3V when external connector is not plugged in
Grounded by external cable when plugged in
+VDDC +VDDC
MC645
MC645
5.6uF_25V
5.6uF_25V
C645
C645
Y5V
10uf
10uf
6.3V
1206
+VDDC +VDDC
MC647
MC647
5.6uF_25V
5.6uF_25V
C647
C647
Y5V
10uf
10uf
6.3V
1206
+VDDC +VDDC
***
C641
C641
1500uF_2.5V
1500uF_2.5V
***
POLY
Overlap
+VDDC
***
C642
C642
1500uF_2.5V
1500uF_2.5V
Overlap
***
POLY
+12V_BUS
R_BIAS
MR681
MR681
MR682
MR682
360R
360R
360R
360R
1206
1206
5%
5%
1/4W
1/4W
+MU601_VCC
MC670
MC670
1uF_6.3V
1uF_6.3V
402
Y5V
6.3V
MR678 0R MR678 0R
C1
R1
MC651 1.5nF_50V MC651 1.5nF_50V
R2
MR651
MR651
MR652
MR652
10K
10K
402
30.1K
30.1K
1%
402
Type II compensation
RFB2
MR650
MR650
20K
20K
402
1%
Rfs
MR665
MR665
69.8K
69.8K
402
R660
R660
10K
10K
When 12V is > 10V
ENBUS
EN threshold = 0.65V
10%
402
X7R 50V
MC665 100nF MC665 100nF
402 X5R
tss=(Css*Vref)/Iss
tss=(Css*0.6V)/22uA
tss~=2.7ms with Css=100nF
Rfs=10^(10.61-(1.035*log(Fsw)))
Rfs~=87K for 300kHz
Rfs~=74.5K for 350kHz
Rfs~=65K for 400kHz
R_12V
EN1 > 3V
GPIO_16 (7)
Overlap the footprints for each pair of caps below:
MC646
MC646
5.6uF_25V
5.6uF_25V
C646
C646
Y5V
10uf
10uf
6.3V
1206
MC648
MC648
C648
C648
Y5V
5.6uF_25V
5.6uF_25V
10uf
10uf
6.3V
1206
+VDDC
+VDDC
***
MC641
MC641
1000uF_5mR
1000uF_5mR
***
POSCAP
***
MC642
MC642
1000uF_5mR
1000uF_5mR
***
POSCAP
***
NC641
NC641
470uF_10V
470uF_10V
***
TH
+VDDC
***
NC642
NC642
470uF_10V
470uF_10V
***
TH
3
C2
MC652
MC652
220pF_50V
220pF_50V
402
10V
+12V_BUS
MR683
MR683
360R
360R
5% 5%
1/4W
MC671
MC671
1uF_6.3V
1uF_6.3V
402
Y5V
6.3V
5%
50V NPO
+12V_EXT
R671
R671
2.21K
2.21K
402
1% 1%
Ri1 Rx1
R6721KR672
1K
402
1% 1%
+VDDC
2
MR684
MR684
360R
360R
1206
1/4W
MU601
MU601
8
VCC
15
PVCC
7
VREG
24
REFTRK
3
MON
9
EN
4
VDIFF
6
ISL6567
ISL6567
COMP
5
FB
23
SS
22
FS
21
PGOOD
25
GND
R676
R676
2.21K
2.21K
402
R6771KR677
1K
402
Rx2 Ri2
R696
R696
300R
300R
805
R669 10K R669 10K
R668 10K R668 10K
MR6771KMR677
1K
R678 0R R678 0R
External Detection Circuit and Indication
Cases
External cable not plugged in 12V_EXT_DETb = X
+12V_BUS not in regulation EN1 -> "0" (by Ri2)
External cable not plugged in
+12V_BUS in regulation EN1 -> 3V (by Ri1 and Ri2)
External cable plugged in
+12V_XXX not in regulation
External cable plugged in 12V_EXT_DETb = "0"
+12V_XXX in regulation
SMPS01 NX2415 & ISL6567 Specifications
Vin 12V (power stage) +/-8% PCIe ATX12V ver. 2.2 +/-5%
Vout 1.2V
Vout ripple (DC) 50mVpp
Iout
Step load 20Amax
Protections
2
R_ISEN=(Rds(ON)*Iout)/50uA
Iout=15Atyp, 18Amax
R_ISEN~=900R for Rds(ON)=2.5mR (5mR/MOSFET)
R_ISEN~=1440R for Rds(ON)=4mR (8mR/MOSFET)
20
BOOT1
19
UGATE1
18
PHASE1
17
ISEN1
16
LGATE1
10
BOOT2
11
UGATE2
12
PHASE2
13
ISEN2
14
LGATE2
2
VSEN
1
RGND
Rs = R(Vout/Vref)
R ~= 2kR
Rs ~= 4kR for Vout of 1.2V
Rs ~= 4.6kR for Vout of 1.4V
Rp = R(Vout)/(Vout-Vref)
Rp ~= 4kR for Vout of 1.2V
Rp ~= 3.5kR for Vout of 1.4V
EN1
1
R_NO_EXT_POWER
402
Nominal Value Adjustable range / Notes
42Aavg, 46Adc_max
21Aavg/phase, 24Adc_max/phase
+/-10% or 120mVpp @ 20A step load Vout ripple (AC)
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1206
16V 1206 for ease of layout
MC611
MC611
X7R 10%
1uF
1uF
MU601_HGD1
MR601 0R MR601 0R
R_ISEN1
MR602 1K MR602 1K
MR603 0R MR603 0R
1206
16V
MC612
MC612
X7R 10%
1uF
1uF
MU601_HGD2
MR611 0R MR611 0R
R_ISEN2
MR612 1K MR612 1K
MU601_LGD2
MR613 0R MR613 0R
Rs
MR661 4.12K MR661 4.12K
Rp
MR663 0R MR663 0R
MR662
MR662
3.92K
3.92K
402
+3.3V_BUS +3.3V_BUS
ThermINT (7,19)
2 3
MMBT3906
MMBT3906
Q676
Q676
ENb1
R667 10K R667 10K
R679
R679
100K
100K
402
1%
Behaviour
ENb1 -> 3.3V
ENBUS = "0"
ENb1 = 0V
ENBUS = "1"
12V_EXT_DETb = "0"
EN1 < 3V (due to low 12V)
ENb1 = 3.3V
ENBUS = "0"
EN1 -> 3V
ENb1 = 0V
ENBUS = "1"
;
Tolerance
;
+2%/-2%
;
~365kHz Switching Freq. TBD
105-B067xx-00
105-B067xx-00
105-B067xx-00
1
1
HGD1_R
402
SW1
402 1%
LGD1_R MU601_LGD1
402
1206 for ease of layout
HGD2_R
402
SW2
402 1%
LGD2_R
402
+VDDC
402
VDDC_FB (11)
402
Remote
Sensing
DNI
R665 10K R665 10K
R666
R666
10K
10K
ENBUS
Q677
Q677
MMBT3904
MMBT3904
2 3
Notifications
VDDC disabled
VDDC enabled 12V_EXT_DETb = "1"
External Power Missing
VDDC disabled
VDDC enabled
Normal Operation
0.8V ~ 1.5V
82 2 Friday, November 24, 2006
82 2 Friday, November 24, 2006
82 2 Friday, November 24, 2006
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www.vinafix.vn
Page 9
8
D D
+12V_BUS
VC625
VC625
Y5V
1uF
1uF
16V
805
+80%/-20%
I_OUTRIPL
(Constant peak-to-peak current ripple amplitude)
I_OUTRIPL=Ki*(V_BIAS/R_RIPL)+(Vin*50ns)/L
I_OUTRIPL=250000*(1.24V/51.1K)+(12V*50ns)/120nH
I_OUTRIPL=11A
I_MAX
(Maximum average output current)
I_MAX=Ki*V_BIAS/R_MAX
I_MAX=250000*1.24V/8.06K
R_MAX=Ki*V_BIAS/I_MAX
R_MAX=250000*1.24V/(35A*120%)
R_MAX=250000*1.24V/(30A*120%)
C C
B B
R_FB for Voltage Droop
V_Droop=(R_FB/Ki)*Iout
V_Droop=(100R/250000)*30A
V_Droop=12mV
R_NoDr
Shorted: Droop enabled
Open: Droop disabled
C_FB
1nF to compensate EA
Power Good Detection
R_PG=(Vtol/I_PG)-1k=((Vref-Vout)/I_PG)-1k
R_PG=(120mV/10uA)-1k
R_PG=11k
Soft Start Filter (C_DES and R_DES)
10*R_REF*C_REF < R_DES*C_DES
5*R_REF > R_DES > 10*R_REF
C_DES >= 0.1uF
10*10K*1nF= 0.1ms < 75K*100nF = 7.5ms
5*10K=50K > 75K > 10*10K=100K
V Reference
V_REF=124uA*(R_REF+R_SENSE-)
V_REF=124uA*(9.09K+649R)
V_REF~=1.208V
R_REF
VDDC
1.2V
1.3V
1.4V
ATI p/n
I_MAX=38.5A
R_MAX<=7381R
R_MAX<=8611R
VC626
VC626
Y5V
1uF
1uF
16V 805
+80%/-20%
+VDDC
SENSE+
Different Voltage Sensing
SENSE-
7
VC627
VC627
1uF
1uF
805
+80%/-20%
Y5V
16V
VC628
VC628
Y5V
1uF
1uF
16V 805
+80%/-20%
SMPS_EN1 (1,8)
R_FB
VR611 100R VR611 100R
R_PG
VR612 11K VR612 11K
R_SENSE-
VR614 649R VR614 649R
VC621
VC621
10UF
10UF
402
402 0.5%
402
VR673
VR673
10K
10K
402
1%
1%
VC622
VC622
10UF
10UF
C_DES
VC615
VC615
100nF
100nF
402
X5R
10V
VT_SENSE-
6
VC623
VC623
VC624
VC624
10UF
10UF
10UF
10UF
1206
X5R
C_VDDL
C_VDDL
VC683
VC683
VC684
VC684
22uF
22uF
1uF_6.3V
1uF_6.3V
402
1206
6.3V
20%
Y5V
X5R
C_AVDD C_AVDD
VC681
VC681
VC682
VC682
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
402
6.3V
Y5V
Y5V
R_RIPL
51.1K
51.1K
402
VR617
VR617
R_MAX
8.06K
8.06K
402
VR616
VR616
R_BIAS
10K
10K
402
VR618
VR618
C_FB
VC611
VC611
1nF
1nF
402
C_PG
R_DES
VC612
VC612
VR615
VR615
220pF
220pF
75K
75K
402
402
R_REF C_REF
VR613
VR613
VC613
VC613
9.09K
9.09K
1nF
1nF
402
4021%1%
16V
6.3V
6.3V 402
1%
1%
1%
50V
10%
X7R
50V
5%
NPO
50V
10%
X7R
VT_VDDL
VT_AVDD
VR619
VR619
10K
10K
402
VT_IRIPL
VT_IMAX
VT_BIAS
VT_VDES
VT_VREF
F6
F5
F4
F3
F2
F1
E8
E1
1%
A3
B2
A1
B4
B5
D7
C3
E3
C8
B7
A8
A6
C6
D4
D5
E6
D2
C1
VU601
VU601
VDDH6
VDDH5
VDDH4
VDDH3
VDDH2
VDDH1
VDDL
AVDD
STAT
EN
IRIPL
VT238WF
VT238WF
IMAX
BIAS
RES1
RES2
RES3
VFB
VDES
PGIN
VREF
NC1
NC2
NC3
NC4
NODR
AGND
Isolated ball from power gound balls.
Trace to AVDD bypass caps
(C_AVDD), then to ground plane
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
5
VX10
VX11
VX12
VX13
VX14
VX15
VX16
VX17
VX18
VX19
VX20
VX21
VX22
VX23
VX24
VX25
VX26
VX27
VX28
4
F7
BST
G1
VX1
G2
VX2
G3
VX3
G4
VX4
G5
VX5
G6
VX6
G7
VX7
J1
VX8
J2
VX9
J3
J4
J5
J6
J7
L1
L2
L3
L4
L5
L6
L7
N1
N2
N3
N4
N5
N6
N7
H1
H2
H3
H4
H5
H6
H7
K1
K2
K3
K4
K5
K6
K7
M1
M2
M3
M4
M5
M6
M7
X7R5%603
VC601
VC601
16V
100nF
100nF
VL601 VL601
SW1
1 2
SW1 (8)
The net sharing (SW2)
is for ease of layout with
other SMPS solutions
VC651
VC651
470uF_5mR
470uF_5mR
VC652
VC652
470uF_5mR
470uF_5mR
VC661
VC661
10UF
10UF
VC662
VC662
10UF
10UF
VC663
VC663
10UF
10UF
3
2
1
+VDDC
VC664
VC664
10UF
10UF
VC665
VC665
10UF
10UF
VC666
VC666
10UF
10UF
VC671
VC671
10UF
10UF
VC667
VC667
10UF
10UF
VC672
VC672
10UF
10UF
VC668
VC668
10UF
10UF
VC673
VC673
10UF
10UF
VC669
VC669
10UF
10UF
VC674
VC674
10UF
10UF
1206
16V
X5R
VC675
VC675
10UF
10UF
SMPS01 Volterra Specifications
Vin 12V (power stage) +/-8% PCIe ATX12V ver. 2.2 +/-5%
Vout 1.2V
Vout ripple (DC) 50mVpp
A A
Iout
Step load 20Amax
Protections UVLO
Nominal Value Adjustable range / Notes
+/-10% or 120mVpp @ 20A step load Vout ripple (AC)
OVLO
OTP [120degCj 150degCj]
OCP/SCP IMAX
8
;
Tolerance
;
;
+2%/-2%
0.8V ~ 1.5V
30Aavg, 35Adc_max
1MHz Switching Freq. 100ns on time minimum
[9.5V, 10.1V]
[13.4V, 14.1V]
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
7
6
5
4
3
Date: Sheet
2
105-B067xx-00
105-B067xx-00
105-B067xx-00
2
2
92 2 Friday, November 24, 2006
92 2 Friday, November 24, 2006
92 2 Friday, November 24, 2006
1
2
of
of
of
www.vinafix.vn
Page 10
8
7
6
5
4
3
2
1
+12V_BUS
MVDDC_EN
402
U701
U701
1
2
3
4
5
6
7
List of supported foodprint
The following ICs are not necessarily evaluated by
ATI, please refer to BOM for evaluation status
ANPEC APW7074 (12V)
CAT CAT7522/CAT7523
INTERSIL ISL6522/ISL6535
RICHTEK RT9232/RT9232A/RT9232B
+MVDDC_B
1
2
3
List of supported foodprint
The following ICs are not necessarily evaluated by
ATI, please refer to BOM for evaluation status
ANPEC APW7120/APW7065 (12V)
CAT CAT7583 (12V)
INTERSIL ISL6545
NEXSEM NX2114/2307
RICHTEK RT9214/RT8101
OnSemi ON1582
RT
OCSET
SS
COMP
FB
EN
GND
ISL6522CB
ISL6522CB
U703
U703
BOOT
UGATE
GND
LGATE4VCC
APW7065
APW7065
PHASE
COMP
LGATE
PGND
BOOT
UGATE
PHASE
FB
PVCC
VCC
8
7
6
5
14
13
12
11
10
9
8
+PW_MVDDC_M
MVDDC_EN +PW_MVDDC_HGD
MVDDC_FB
+MVDD_VCC
C704
0.22uF
0.22uF
+MVDDC_B
R708 20K R708 20K
+MVDD_VCC
+PW_MVDDC_LGD
+PW_MVDDC_HGD
+PW_MVDDC_M
C703
C703
0.22uF
0.22uF
402
402
402
R701 10K R701 10K
MVDDC_RT
402
X7R 10V
MVDDC_OCS
MVDDC_SS
MVDDC_COMP
MVDDC_FB
+PW_MVDDC_LGD
+MVDDC_S
D D
C C
B B
1-Position the controller (U703) such that LGate(pin4) is the closet to gate
of the MOSFETs. You can place the gate resistors R721 and R722 next to the gate
of the MOSFETs. Make the gate drive traces(PW MVDDC LGD and PW MVDDC HGD) as
short and as wide as possible to reduce the trace inductance.
2-Place the bypass capacitors for Vcc as well as Boost caps as close to the
controller as possible. They are as follows;
Vcc bypass cap is C703, and Boost cap is C705.
3-Voltage amplifier compensation network. Place C714 close to the pin 7. Place
the rest of the compensation network close to the pins 7 and 6. These are R710,
R711, R713, C713 and R712, C711 and C712.
R702 30.1K R702 30.1K
C702 1nF C702 1nF C704
R703 2.37K R703 2.37K
C701
C701
22nF
22nF
603
Layout guideline for Nexsem NX2114/2307
COMPENSATION CIRCUIT FILTERED SMPS VCC BOOT CIRCUIT
MR7080RMR708
0R
C711
C711
15nF
15nF
402
R712
R712
2.94K
2.94K
402
1%
402
C712
C712
390pF
390pF
603
10V
NPO X7R
10%
A A
MVDDC_EN
MVDDC_COMP
C714
C714
100nF
100nF
402
10V
50V
X5R
5%
10%
MVDDC_FB
8
+MVDD_VCC
+12V_BUS
+5V
R707
R707
MR707
MR707
2.2R
2.2R
2.2R
2.2R
603
X7R
C707
C707
5%
100nF
100nF
7
1
C705
C705
100nF
100nF
603 X7R
5%
6
MVDD_EN (1,12)
SMPS_EN2 (1,12)
3
2
16V
D701
D701
BAT54A
BAT54A
+12V_BUS
+MVDDC_B
MR7060RMR706
0R
402
C706
C706
150nF_16V
150nF_16V
+5V
R7060RR706
0R
402
+PW_MVDDC_M
+PW_MVDDC_HGD
+PW_MVDDC_M
+PW_MVDDC_LGD
+PW_MVDDC_HGDR
MQ701
MQ701
Thermal
Thermal
Pad
Pad
4 5
3
2
1
FDS7096N3
FDS7096N3
+PW_MVDDC_M
5
Thermal
Thermal
Pad
Pad
9
6
7
8
Thermal
Thermal
Pad
Pad
9
6
7
8
+PW_MVDDC_LGDR
MQ702
MQ702
Thermal
Thermal
4 5
3
2
1
FDS7096N3
FDS7096N3
+MVDDC_S
Pad
Pad
Q701
Q701
QH
+PW_MVDDC_HGDR
R721 0R R721 0R
402
+PW_MVDDC_LGDR
R722 0R R722 0R
402
+MVDDC_S
9
6
7
8
This symbol is used for 132 SMPS p/n.
MVDD1
MVDD1
RV560 Socket
RV560 Socket
4 5
3
2
1
BSC119N03SG
BSC119N03SG
Q702
Q702
QL
4 5
3
2
1
BSC119N03SG
BSC119N03SG
4
CAP CER 10UF 20% 16V X5R
(1206)1.8MM H MAX
*** ***
C715
C715
MC715
MC715
10UF
10UF
5.6uF_25V
5.6uF_25V
***
L701 2.2uH_13A L701 2.2uH_13A
1 2
Rs
R719
R719
33MOHM
33MOHM
1210
1%
C708
C708
10nF_25V
10nF_25V
Cs
402
X7R
25V
Place Rs and Cs across QL
MVDDC_FB
9
6
7
8
Overlap the footprints for each pair of caps below:
MC716
MC716
C716
C716
5.6uF_25V
5.6uF_25V
10UF
10UF
***
C713
C713
3.9nF
3.9nF
402
10%
R713
R713
3.65K
3.65K
402
5%
RFB1
R711
R711
4.99K
4.99K
402
1%
Place R1 and
R4 close to
RFB2
PWM and
R710
R710
routed with
3.24K
3.24K
separate
402
20mil trace to
1%
the ASIC
RC snubber values shown
are for reference only,
tuning is required
MULTI FOOTPRINT
16V
X7R
0.8V Ref
R4 = (R1 x 0.8V) / (Vout1 - 0.8V)
***
C725
C725
470uF_10V
470uF_10V
***
Part RFB2 RFB1
0.8V Ref
SMPS02 Specifications
Vin 12V (power stage) +/-8% PCIe ATX12V ver. 2.2 +/-5%
Vout 2V
Vout ripple (DC) 50mVpp
Iout 6Aavg, 8Adc_max
Step load 3Amax
Protections
3
B701
B701
60R
60R
***
C718
C717
C717
10UF
10UF
1206
***
MC725
MC725
470uF_6.3V
470uF_6.3V
***
ALT
POLY
DUAL FOOTPRINT
MC717
MC717
5.6uF_25V
5.6uF_25V
C718
150nF_16V
150nF_16V
603
+MVDD
*** ***
C723
C723
100uF_6.3V
100uF_6.3V
1210 1210
*** ***
C724
C724
100uF_6.3V
100uF_6.3V
SMPS02- Regulator for MVDD
Vout = 1.8V ~ 2.85V
Vout
2.03V
(1.98V~2.08V)
2
4.99K
p/n 3160499100G
Nominal Value Adjustable range / Notes
+/-10% or 200mVpp @ 3A step load Vout ripple (AC)
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Tolerance
;
;
+2%/-2%
;
~300kHz Switching Freq. TBD
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
105-B067xx-00
105-B067xx-00
105-B067xx-00
+12V_BUS
3.24K
p/n 3160324100G
1.8V ~ 2.85V
2
2
10 22 Friday, November 24, 2006
10 22 Friday, November 24, 2006
10 22 Friday, November 24, 2006
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Page 11
8
D D
C C
7
Option for Dynamic VDDC
6
GPIO_15 (7)
+3.3V
R694
R694
10K
10K
402
R695
R695
10K
10K
402
5
+5V
C699
C699
100nF
100nF
R697 0R
R697 0R
2 4
U699
U699
NC7SZ04M5
NC7SZ04M5
3 5
4
VDDC-Dyn_ALT
VDDC-Dyn_ALT
VDDC_FB (8)
Install a 0 Ohm resistor for
Rx for regular operation
R699
R699
301R
301R
402
VCORE_PLAY
Rx
R698
R698
75R
75R
402
3
3 2
2N7002E
2N7002E
Q699
Q699
1
2
1
B B
Optional Regulator for +VDDCI
Vout = 1.2V ~ 1.4V
+MVDD +VDDCI +5V
C808
C808
1uF_6.3V
1uF_6.3V
A A
8
7
U801_VCNTL
U801_VIN
+2.5V_REF
C806
C806
C807
C807
10uF
10uF
10uF
10uF
CAP CER 10UF 10% 6.3V X5R
(0805)1.4MM MAX THICK
6
R801
R801
1.07K
1.07K
R8021KR802
1K
U801_REFEN
C804
C804
1uF_6.3V
1uF_6.3V
+VDDC +VDDCI
B801 26R_600mA B801 26R_600mA
B802 26R_600mA B802 26R_600mA
B803 26R_600mA B803 26R_600mA
U801_VOUT
C803
R8031KR803
1K
C803
22uF_16V
22uF_16V
5
C801
C801
C802
C802
10uF
10uF
10uF
10uF
CAP CER 10UF 10%
6.3V X5R (0805)1.4MM
MAX THICK
U801_VIN
U801_REFEN
U801_VOUT
+3.3V +VDDCI
MU801
MU801
R807
U801
U801
1
2
3
APL5331
APL5331
Supported footprint:
RT9173C/RT9199
APL5331
8
VIN
NC#8
7
GND
NC#7
U801_VCNTL
6
VREF
VCNTL
5
VOUT4NC
9
THM
Note: Alternate partnumbers are provided as possible choices only.
See BOM for qualified regulators/vendors. Not all combinations are tested.
4
+MVDD
R807
10K
10K
1
POK
402
2
EN
1%
3
VIN
CNTL4NC
uPI7701U8
uPI7701U8
3
GND#8
VOUT
GND#9
R804
R804
1.07K
8
7
FB
6
R806 1K R806 1K
5
9
1.07K
402
1%
R8051KR805
1K
402
1%
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
2
105-B067xx-00
105-B067xx-00
105-B067xx-00
11 22 Friday, November 24, 2006
11 22 Friday, November 24, 2006
11 22 Friday, November 24, 2006
of
of
of
1
2
2
2
www.vinafix.vn
Page 12
8
+PCIE_SOURCE
D D
+3.3V +2.5V
C C
7
Optional regulator for +PCIE
Vout = 1.2V ~1.25V
+5V
U951_VCNTL
U951_VIN
+2.5V_REF
R951
R951
1.07K
R961
R961
1.07K
1.07K
1.07K
R9521KR952
1K
+5V
MR961
MR961
4.75K
4.75K
R9621KR962
1K
DNI
C958
1uF_6.3V
1uF_6.3V
Optional regulator for +2.5V
Vout = 2.5V
C968
C968
1uF_6.3V
1uF_6.3V
10uF
10uF
10uF
10uF
CAP CER 10UF 10% 6.3V X5R
(0805)1.4MM MAX THICK
+5V
U961_VCNTL
U961_VIN
+2.5V_REF
C966
C966
C967
C967
10uF
10uF
10uF
10uF
CAP CER 10UF 10% 6.3V X5R
(0805)1.4MM MAX THICK
C956
C956
C957
C957
C958
U951_REFEN
C954
C954
1uF_6.3V
1uF_6.3V
U961_REFEN
C964
C964
1uF_6.3V
1uF_6.3V
6
+VDDC +PCIE
RP951A 0R RP951A 0R
8 1
RP951B 0R RP951B 0R
7 2
RP951C 0R RP951C 0R
6 3
RP951D 0R RP951D 0R
5 4
RP952A 0R RP952A 0R
8 1
RP952B 0R RP952B 0R
7 2
RP952C 0R RP952C 0R
6 3
RP952D 0R RP952D 0R
5 4
+PCIE
U951_VOUT
C953
R9531KR953
1K
R9631KR963
1K
C953
22uF_16V
22uF_16V
U961_VOUT
C951
C951
C952
C952
10uF
10uF
10uF
10uF
CAP CER 10UF 10%
6.3V X5R (0805)1.4MM
MAX THICK
C961
C961
10uF
10uF
CAP CER 10UF 10%
6.3V X5R (0805)1.4MM
MAX THICK
5
RT9199 p/n 2480054800G (480mR RdsON Max)
RT9173C (250mR RdsON Max)
APL5331 p/n 2480054200G (350mR MAX for 2A)
U951
U951_VIN
U951_REFEN U951_VCNTL
U951_VOUT
U961_VIN
U961_REFEN
U961_VOUT
U951
1
VIN
2
GND
3
VREF
VCNTL
VOUT4NC
APL5331
APL5331
Supported footprint:
RT9173C/RT9199
APL5331
U961
U961
1
VIN
2
GND
3
VREF
VCNTL
VOUT4NC
APL5331
APL5331
Supported footprint:
RT9173C/RT9199
APL5331
NC#8
NC#7
NC#8
NC#7
8
7
6
5
9
THM
8
7
U961_VCNTL
6
5
9
THM
4
Note: Alternate partnumbers are provided as possible choices only.
See BOM for qualified regulators/vendors. Not all combinations are tested.
MRP951A 0R MRP951A 0R
8 1
MRP951B 0R MRP951B 0R
7 2
MRP951C 0R MRP951C 0R
6 3
MRP951D 0R MRP951D 0R
5 4
3
+3.3V
R957
R957
10K
10K
+PCIE_SOURCE +VDDC
402
1%
+3.3V +2.5V
R967
R967
10K
10K
402
1%
MU951
MU951
1
POK
2
EN
3
VIN
CNTL4NC
uPI7701U8
uPI7701U8
MU961
MU961
1
POK
2
EN
3
VIN
CNTL4NC
uPI7701U8
uPI7701U8
GND#8
VOUT
GND#9
GND#8
VOUT
GND#9
2
+PCIE
R954
R954
1.07K
8
7
FB
6
R956 1K R956 1K
5
9
8
7
FB
6
R966 1K R966 1K
5
9
1.07K
402
1%
R9551KR955
1K
402
1%
R964
R964
1.07K
1.07K
402
1%
R9651KR965
1K
402
1%
1
C971
C971
10uF
10uF
U971_VIN
U971_REFEN
U971_VOUT
MR9900RMR990
0R
ALT
+VDDC_CT
R987 5.1K R987 5.1K
5
RP972A 0R RP972A 0R
RP972B 0R RP972B 0R
RP972C 0R RP972C 0R
RP972D 0R RP972D 0R
U971
U971
1
VIN
2
GND
3
VREF
VCNTL
VOUT4NC
APL5331
APL5331
Supported footprint:
RT9173C/RT9199
APL5331
Q993
Q993
1
MMBT3904
MMBT3904
402
5%
2 3
8 1
7 2
6 3
5 4
8
NC#8
7
NC#7
6
5
9
THM
MVDD_EN (1,10)
Optional Regulator for +VDDC_CT
Vout = 2.5V ~ 2.85V
+3.3V +VDDC_CT
B B
A A
+2.5V +AVDD +A2VDD
B922
B922
BLM15BD121SN1
BLM15BD121SN1
8
+VDD1DI +VDD2DI +PVDD +TPVDD +TXVDDR
B923
B923
BLM15BD121SN1
BLM15BD121SN1
+5V
C978
C978
C977
C977
1uF_6.3V
1uF_6.3V
10uF
10uF
CAP CER 10UF 10% 6.3V X5R
(0805)1.4MM MAX THICK
C979
C979
1uF_6.3V
1uF_6.3V
402
B925
B924
B924
BLM15BD121SN1
BLM15BD121SN1
B925
BLM15BD121SN1
BLM15BD121SN1
7
C976
C976
10uF
10uF
+VDDC
U971_VCNTL
U971_VIN
R9811KR981
1K
402
1%
1
R982
R982
2.0K
2.0K
402
1%
DNI
+5V
+12V_BUS
R983
R983
5.1K
5.1K
402
5%
Q991
Q991
MMBT3904
MMBT3904
2 3
B926
B926
BLM15BD121SN1
BLM15BD121SN1
R971
R971
4.75K
4.75K
R972
R972
6.34K
6.34K
U971_VOUT
U971_REFEN
C974
C974
1uF_6.3V
1uF_6.3V
R986 5.1K R986 5.1K
B927
B927
BLM15BD121SN1
BLM15BD121SN1
R9731KR973
1K
CAP CER 10UF 10%
6.3V X5R (0805)1.4MM
MAX THICK
+12V_BUS +5V_SMPS +5V
R989
R989
R9990RR999
10K
10K
0R
3 2
1
C969
C969
100nF
100nF
R990
R990
402
100K
100K
Q992
Q992
2 3
MMBT3904
MMBT3904
B928
B928
BLM15BD121SN1
BLM15BD121SN1
6
X5R
10V
+T2PVDD +T2XVDDR
B929
B929
BLM15BD121SN1
BLM15BD121SN1
1
402
5%
Q996
Q996
2N7002_NL
2N7002_NL
B930
B930
BLM15BD121SN1
BLM15BD121SN1
USE 0R
U971_VCNTL
R998 5.1K R998 5.1K
+2.5V
+3.3V +VDDC_CT
MU971
MU971
R977
R977
10K
10K
1
402
2
1%
3
uPI7701U8
uPI7701U8
+3.3V_BUS +PCIE_SOURCE
R988 5.1K R988 5.1K
+12V_BUS
R984
R984
10K
10K
Q995_G
Q994
Q994
1
MMBT3904
MMBT3904
402
5%
2 3
3
5V_EN (13)
Q1000
R1000 5.1K R1000 5.1K
402
5%
RTAVDD_ENb (18)
4
Q1000
1
MMBT3904
MMBT3904
402
5%
2 3
POK
GND#8
EN
VIN
CNTL4NC
GND#9
C992
C992
10uf
10uf
1206
Y5V
6.3V
C991
C991
100NF
100NF
402
X5R
16V
FB
VOUT
Q995
Q995
IRF7413TRPBF
IRF7413TRPBF
8
7
6
5
9
R976 1K R976 1K
678
4 5
R974
R974
1.07K
1.07K
402
1%
R9751KR975
1K
402
1%
+3.3V
R991
R991
R992
R992
4.7R
4.7R
4.7R
4.7R
B992
B992
60R
60R
ALT
123
R985
R985
100K
100K
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
2
1/4W 1/4W 1/4W 1/4W 1/4W 1/4W
Req ~= 0.78R
Vdrop_max = 0.95V @ 1.2A
+PCIE_SOURCE ~= 2.35V
For 1.2A, each resistor (250mW
rated) dissipates 0.2A or 190mW
105-B067xx-00
105-B067xx-00
105-B067xx-00
R993
R993
4.7R
4.7R
R994
R994
4.7R
4.7R
R995
R995
4.7R
4.7R
of
of
of
12 22 Friday, November 24, 2006
12 22 Friday, November 24, 2006
12 22 Friday, November 24, 2006
1
R996
R996
4.7R
4.7R
2
2
2
www.vinafix.vn
Page 13
8
D D
+12V_BUS
Place caps very
close to power pin
C902
C902
100nF
R9131KR913
1K
1%
DNI
3
2
100nF
603
X7R
4 11
+
+
-
-
U901A
U901A
LM324M
LM324M
R912 0R R912 0R
1
+2.5V_REF
+VDDC
MR911 1K MR911 1K
R911 1K R911 1K
R918 1K R918 1K
C C
C903
C903
100nF
100nF
603
X7R
R910 0R R910 0R
C917
C917
10nF
10nF
7
REG901
REG901
TL431C
TL431C
1
+3.3V_BUS
R901
R901
33R
33R
402
4
NC
NC
1
NC
NC
2
5 3
+3.3V
Q911
Q911
MMBT3904
MMBT3904
200mA, SOT-23
2 3
CMPT3904: 40V 200mA
R914
R914
4.99R
4.99R
+2.5V_REF
C901
C901
10uF
10uF
C916
C916
10uF
10uF
CAP CER 10UF 10% 6.3V X5R
(0805)1.4MM MAX THICK
+MPVDD
C911
C911
10uF
10uF
6
5
+2.5V_REF
R931 1K R931 1K
4
U901C_9
R9331KR933
1K
1%
10
+
+
9
-
-
R932 1K R932 1K
3
Alt regulator for +MPVDD
Vout = 1.2V (not tracking to VDDC)
Iout = 10mA MAX
+MPVDD
R915
R915
75R
75R
REG911
Req = 120.7R
8
U901C
U901C
LM324M
LM324M
REG911
AS432S
AS432S
3 2
R930 0R R930 0R
C939
C939
10nF
10nF
1%
1
1
R916
R916
681R
681R
1%
R917
R917
1.5K
1.5K
1%
R934
R934
845R
845R
1206
1/4 W
1%
Q931
Q931
MMBT3904
MMBT3904
200mA, SOT-23
2 3
CMPT3904: 40V 200mA
2
Rt1
+VDDC +3.3V
B911
B911
BLM15BD121SN1
BLM15BD121SN1
ALT
Possible alternate
5150005600G
Rt1
402
Rt2
402
R935
R935
845R
845R
1206
1/4 W
1%
4
NC
NC
1
NC
NC
2
GND_MPVSS
R936
R936
845R
845R
1206
1/4 W
1%
5 3
+5V_VESA
MREG911
MREG911
SC431LC5SK-1
SC431LC5SK-1
R937
R937
845R
845R
1206
1/4 W
1%
1.61V 432R
1.69V
1.718V
1.75V
R938
R938
R939
R939
845R
845R
845R
845R
1206
1206
1/4 W
1/4 W
1%
1%
R940
R940
845R
845R
1206
1/4 W
1%
3240432000 1.52V 432R
3160432000 3160215100
3240432000
3240432000 432R
562R
3240562000
3160604000 604R
3160604000 604R 1.8V
+12V_BUS
C936
C937
C937
100nF
100nF
603
C936
10UF
10UF
C938
C938
100nF
100nF
603
16V 16V
X7R X7R
CAP CER 10UF 20% 16V X5R
(1206)1.8MM H MAX
1
Rt2
2.15K
1.5K
3230015200
1.5K 3160150100
3240121100
1.21K
3230015200 1.5K
1.5K 3160150100
3230015200 1.5K
1.5K 3160150100
3160137100 1.37K
Multi-footprint
C931
C931
MC931
MC931
10uF
10uF
4.7uF
4.7uF
10x Buffered VDDC Output Current Monitoring
VDDC_IOUT (8)
C921
C921
10uF
10uF
100nF
100nF
C927
C927
603
+12V_BUS
+5V_SMPS
10UF
10UF
C926
C926
CAP CER 10UF 20% 16V X5R
(1206)1.8MM H MAX
C922
C922
100nF
100nF
+5V_SMPS
5V
115mA MAX
5
B B
5V_EN (12)
+2.5V_REF
R921 1K R921 1K
A A
8
5
+
+
6
-
-
U901B
U901B
LM324M
LM324M
R922 1K R922 1K
R9231KR923
1K
1%
Req = 45R
~ 5V Drop MAX
<192mW/R for 115mA
R920 0R R920 0R
7
C929
C929
10nF
10nF
R924 0R R924 0R
1%
7
R926
R926
15R
15R
1206
1/4 W
1%
Q921
Q921
1
MMBT3904
MMBT3904
200mA, SOT-23
2 3
CMPT3904: 40V 200mA
R927
R927
15R
15R
1206
1/4 W
1%
R928
R928
15R
15R
1206
1/4 W
1%
1
Q922
Q922
MMBT3904
MMBT3904
200mA, SOT-23
2 3
CMPT3904: 40V 200mA
6
100nF
100nF
C928
C928
603
16V 16V
X7R X7R
MR941 100K MR941 100K
+2.5V_REF
R941 1K R941 1K
For debugging purposes only
Install: MR941 C942
DNI: R941 R942
10V
X5R
C942
C942
402
1nF
1nF
J601
J601
header_1x2_2mm_smt
header_1x2_2mm_smt
2 1
12
+
+
13
-
-
U901D
U901D
LM324M
LM324M
R9431KR943
1K
1%
4
MR942
R925
14
C949
C949
10nF
10nF
1%
R942 1K R942 1K
R929
Q941
TP603
TP603
TP_32mil_SM_top
TP_32mil_SM_top
R925 0R R925 0R
MR942
MR942
9.09K
9.09K
Req = 120.7R
1
2 3
R946
R944
R944
845R
845R
1206
1/4 W
1%
Q941
Q941
MMBT3904
MMBT3904
200mA, SOT-23
CMPT3904: 40V 200mA
R946
R945
R945
845R
845R
845R
845R
1206
1206
1/4 W
1/4 W
1%
1%
3
R947
R947
845R
845R
1206
1/4 W
1%
+5V_VESA2
Multi-footprint
C941
C941
10uF
10uF
R948
R948
845R
845R
1206
1/4 W
1%
R949
R949
845R
845R
1206
1/4 W
1%
MC941
MC941
4.7uF
4.7uF
+12V_BUS
C946
C947
C947
100nF
100nF
603
C946
10UF
10UF
105-B067xx-00
105-B067xx-00
105-B067xx-00
1
C948
C948
R950
R950
100nF
100nF
845R
845R
603
1206
16V 16V
1/4 W
X7R X7R
1%
CAP CER 10UF 20% 16V X5R
(1206)1.8MM H MAX
+5V_VESA
R9290RR929
0R
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
2
2
2
2
of
of
of
13 22 Friday, November 24, 2006
13 22 Friday, November 24, 2006
13 22 Friday, November 24, 2006
www.vinafix.vn
Page 14
8
7
6
5
4
3
2
1
CHANNEL A: 128MB/256MB DDR2
M_DQMA#[7..0] (5)
D D
M_MDA[63..0] (5)
M_MAA[15..14] (5)
M_MAA[12..0] (5)
C C
VREF_A0
+MVDD +MVDD +MVDD
R201
R201
4.99K
4.99K
R202
B B
R202
4.99K
4.99K
M_DQMA#0
M_DQMA#1
M_DQMA#2
M_DQMA#3
M_DQMA#4
M_DQMA#5
M_DQMA#6
M_DQMA#7
M_MAA14
M_MAA15
M_MAA12
M_MAA11
M_MAA10
M_MAA9
M_MAA8
M_MAA7
M_MAA6
M_MAA5
M_MAA4
M_MAA3
M_MAA2
M_MAA1
M_MAA0
CLKA#0 (5)
CLKA0 (5)
CKEA0 (5)
CSA#0_0 (5)
WEA#0 (5)
RASA#0 (5)
CASA#0 (5)
M_DQMA#2
M_DQMA#3
ODTA0 (5)
M_QSA2
R211 10R R211 10R
M_QSA3
R212 10R R212 10R
VREF_U20
C413
C413
100nF_6.3V
100nF_6.3V
L2
L3
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
K8
J8
K2
L8
K7
L7
F3
B3
K9
F7
E8
B7
A8
J2
A2
E2
L1
R3
R7
R8
U201
U201
BA0
BA1
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CK
CK
CKE
CS
WEK3VDDQ10
RAS
CAS
LDM
UDM
ODT
LDQS
LDQS
UDQS
UDQS
VREF
VSSQ10
NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8
HY5PS561621F-25
HY5PS561621F-25
M_QSA[7..0] (5)
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDD1
VDD2
VDD3
VDD4
VDD5
VDDL
VSSDL
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSS1
VSS2
VSS3
VSS4
VSS5
M_QSA0
M_QSA1
M_QSA2
M_QSA3
M_QSA4
M_QSA5
M_QSA6
M_QSA7
U204
U203
U202
M_MDA27
B9
M_MDA29
B1
M_MDA24
D9
M_MDA30
D1
M_MDA31
D3
M_MDA25
D7
M_MDA28
C2
DQ9
M_MDA26
C8
DQ8
M_MDA19
F9
DQ7
M_MDA20
F1
DQ6
M_MDA16
H9
DQ5
M_MDA23
H1
DQ4
M_MDA21
H3
DQ3
M_MDA17
H7
DQ2
M_MDA22
G2
DQ1
M_MDA18
G8
DQ0
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
M9
R1
J1
J7
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
+MVDD
+MVDD
B201
B201
120R_300mA
120R_300mA
Possible alternate 5150005600G Possible alternate 5150005600G Possible alternate 5150005600G Possible alternate 5150005600G
C411
C411
C412
C412
100nF_6.3V
100nF_6.3V
1uF_6.3V
1uF_6.3V
VREF_A0
M_MAA14
M_MAA15
M_MAA12
M_MAA11
M_MAA10
M_MAA9
M_MAA8
M_MAA7
M_MAA6
M_MAA5
M_MAA4
M_MAA3
M_MAA2
M_MAA1
M_MAA0
CLKA#0 (5)
CLKA0 (5)
CKEA0 (5)
CSA#0_0 (5)
WEA#0 (5)
RASA#0 (5)
CASA#0 (5)
M_DQMA#0
M_DQMA#1
ODTA0 (5) ODTA0 (5) ODTA0 (5)
M_QSA0 M_QSA5
R213 10R R213 10R
M_QSA1
R214 10R R214 10R
R203
R203
4.99K
4.99K
VREF_U21
C438
C438
R204
R204
100nF_6.3V
100nF_6.3V
4.99K
4.99K
U202
L2
BA0
L3
BA1
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS
WEK3VDDQ10
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
L1
NC#L1
R3
NC#R3
R7
NC#R7
R8
NC#R8
HY5PS561621F-25
HY5PS561621F-25
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDD1
VDD2
VDD3
VDD4
VDD5
VDDL
VSSDL
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSS1
VSS2
VSS3
VSS4
VSS5
M_MDA12
B9
M_MDA11
B1
M_MDA15
D9
M_MDA9
D1
M_MDA8
D3
M_MDA14
D7
M_MDA10
C2
DQ9
M_MDA13
C8
DQ8
M_MDA4
F9
DQ7
M_MDA3
F1
DQ6
M_MDA7
H9
DQ5
M_MDA0
H1
DQ4
M_MDA1
H3
DQ3
M_MDA6
H7
DQ2
M_MDA2
G2
DQ1
M_MDA5
G8
DQ0
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
B202
B202
M9
120R_300mA
120R_300mA
R1
J1
J7
C436
C436
100nF_6.3V
100nF_6.3V
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
C437
C437
1uF_6.3V
1uF_6.3V
+MVDD
+MVDD
VREF_A1
M_MAA14
M_MAA15
M_MAA12
M_MAA11
M_MAA10
M_MAA9
M_MAA8
M_MAA7
M_MAA6
M_MAA5
M_MAA4
M_MAA3
M_MAA2
M_MAA1
M_MAA0
CLKA#1 (5)
CLKA1 (5)
CKEA1 (5)
CSA#1_0 (5)
WEA#1 (5)
RASA#1 (5)
CASA#1 (5)
M_DQMA#7 M_DQMA#4
R215 10R R215 10R
M_QSA7
R216 10R R216 10R
R205
R205
4.99K
4.99K
VREF_U22
C463
C463
R206
R206
100nF_6.3V
100nF_6.3V
4.99K
4.99K
U203
L2
BA0
L3
BA1
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS
WEK3VDDQ10
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
L1
NC#L1
R3
NC#R3
R7
NC#R7
R8
NC#R8
HY5PS561621F-25
HY5PS561621F-25
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDD1
VDD2
VDD3
VDD4
VDD5
VDDL
VSSDL
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSS1
VSS2
VSS3
VSS4
VSS5
R217 10R R217 10R
R218 10R R218 10R
R207
R207
4.99K
4.99K
VREF_U23
R208
R208
4.99K
4.99K
M_MAA14
M_MAA15
M_MAA12
M_MAA11
M_MAA10
M_MAA9
M_MAA8
M_MAA7
M_MAA6
M_MAA5
M_MAA4
M_MAA3
M_MAA2
M_MAA1
M_MAA0
CLKA#1 (5)
CLKA1 (5)
CKEA1 (5)
CSA#1_0 (5)
WEA#1 (5)
RASA#1 (5)
CASA#1 (5)
M_DQMA#6 M_DQMA#5
M_QSA6
M_QSA4
C448
C448
100nF_6.3V
100nF_6.3V
M_MDA61
B9
M_MDA59
B1
M_MDA63
D9
M_MDA56
D1
M_MDA58
D3
M_MDA62
D7
M_MDA57
C2
DQ9
M_MDA60
C8
DQ8
M_MDA45
F9
DQ7
M_MDA43
F1
DQ6
M_MDA46
H9
DQ5
M_MDA40
H1
DQ4
M_MDA41
H3
DQ3
M_MDA47
H7
DQ2
M_MDA42
G2
DQ1
M_MDA44
G8
DQ0
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
B203
B203
M9
120R_300mA
120R_300mA
R1
J1
J7
C461
C461
100nF_6.3V
100nF_6.3V
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
C462
C462
1uF_6.3V
1uF_6.3V
+MVDD
+MVDD
VREF_A1
+MVDD
U204
L2
BA0
L3
BA1
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS
WEK3VDDQ10
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
L1
NC#L1
R3
NC#R3
R7
NC#R7
R8
NC#R8
HY5PS561621F-25
HY5PS561621F-25
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDD1
VDD2
VDD3
VDD4
VDD5
VDDL
VSSDL
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSS1
VSS2
VSS3
VSS4
VSS5
M_MDA35
B9
M_MDA36
B1
M_MDA32
D9
M_MDA39
D1
M_MDA38
D3
M_MDA34
D7
M_MDA37
C2
DQ9
M_MDA33
C8
DQ8
M_MDA51
F9
DQ7
M_MDA52
F1
DQ6
M_MDA49
H9
DQ5
M_MDA55
H1
DQ4
M_MDA54
H3
DQ3
M_MDA48
H7
DQ2
M_MDA53
G2
DQ1
M_MDA50
G8
DQ0
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
M9
R1
J1
J7
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
B204
B204
120R_300mA
120R_300mA
C446
C446
100nF_6.3V
100nF_6.3V
C447
C447
1uF_6.3V
1uF_6.3V
+MVDD
+MVDD
+MVDD
C477
C477
C478
C476
C476
1uF_6.3V
1uF_6.3V
402 402 402
+MVDD
C481
C481
1uF_6.3V
1uF_6.3V
402
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
2
C478
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C484
C482
C482
1uF_6.3V
1uF_6.3V
402 402 402 402
C484
C483
C483
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
105-B067xx-00
105-B067xx-00
105-B067xx-00
C485
C485
1uF_6.3V
1uF_6.3V
1
14 22 Friday, November 24, 2006
14 22 Friday, November 24, 2006
14 22 Friday, November 24, 2006
of
of
of
2
2
2
C499
C499
10nF
10nF
C500
C500
10nF
10nF
+MVDD
C428
C426
C426
1uF_6.3V
1uF_6.3V
402 402 402
+MVDD
C431
C431
1uF_6.3V
1uF_6.3V
402 402
C428
C427
C427
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C432
C432
C433
C433
C434
1uF_6.3V
1uF_6.3V
402 402 402 402
C434
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
+MVDD +MVDD
R209
R209
4.99K
4.99K
VREF_A0 VREF_A1
R210
R210
4.99K
4.99K
5
C435
C435
1uF_6.3V
1uF_6.3V
R219
R219
4.99K
4.99K
R220
R220
4.99K
4.99K
+MVDD
C403
C401
C401
1uF_6.3V
1uF_6.3V
+MVDD
C406
C406
1uF_6.3V
1uF_6.3V
402
A A
8
C403
C402
C402
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
402 402 402
C407
C407
C408
C408
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
402 402 402
7
C409
C409
1uF_6.3V
1uF_6.3V
C410
C410
1uF_6.3V
1uF_6.3V
402
CLKA0 (5)
CLKA#0 (5)
CLKA1 (5)
CLKA#1 (5)
R221
R221
56R
56R
402
R222
R222
56R
56R
402 402
R223
R223
56R
56R
402
R224
R224
56R
56R
402 402
6
+MVDD
C451
C451
C452
C452
C453
1uF_6.3V
1uF_6.3V
402 402 402
+MVDD
C456
C456
1uF_6.3V
1uF_6.3V
4
C453
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C458
C458
C457
C457
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
402 402 402
C459
C459
1uF_6.3V
1uF_6.3V
C460
C460
1uF_6.3V
1uF_6.3V
402
3
www.vinafix.vn
Page 15
8
7
6
5
4
3
2
1
CHANNEL B: 128MB/256MB DDR2
M_DQMB#[7..0] (5)
D D
M_MDB[63..0] (5)
M_MAB[15..14] (5)
M_MAB[12..0] (5)
C C
R311 10R R311 10R
VREF_B0
R312 10R R312 10R
+MVDD
R301
R301
4.99K
4.99K
VREF_U24 VREF_U25 VREF_U26 VREF_U27
R302
R302
4.99K
4.99K
B B
M_MAB14
M_MAB15
M_MAB12
M_MAB11
M_MAB10
M_MAB9
M_MAB8
M_MAB7
M_MAB6
M_MAB5
M_MAB4
M_MAB3
M_MAB2
M_MAB1
M_MAB0
CLKB#0 (5)
CLKB0 (5)
CKEB0 (5)
CSB#0_0 (5)
WEB#0 (5)
RASB#0 (5)
CASB#0 (5)
M_DQMB#2
M_DQMB#3
ODTB0 (5)
M_QSB2
M_QSB3
C513
C513
100nF_6.3V
100nF_6.3V
M_DQMB#0
M_DQMB#1
M_DQMB#2
M_DQMB#3
M_DQMB#4
M_DQMB#5
M_DQMB#6
M_DQMB#7
U301
U301
L2
BA0
L3
BA1
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS
WEK3VDDQ10
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
L1
NC#L1
R3
NC#R3
R7
NC#R7
R8
NC#R8
HY5PS561621F-25
HY5PS561621F-25
+MVDD
C501
C501
1uF_6.3V
1uF_6.3V
402 402 402
+MVDD
C506
C506
1uF_6.3V
1uF_6.3V
402
M_QSB[7..0] (5)
M_MDB27
B9
DQ15
M_MDB28
B1
DQ14
M_MDB24
D9
DQ13
M_MDB31
D1
DQ12
M_MDB29
D3
DQ11
M_MDB25
D7
DQ10
M_MDB30
C2
DQ9
M_MDB26
C8
DQ8
M_MDB19
F9
DQ7
M_MDB20
F1
DQ6
M_MDB16
H9
DQ5
H1
DQ4
M_MDB22
H3
DQ3
M_MDB17
H7
DQ2
M_MDB21
G2
DQ1
M_MDB18
G8
DQ0
A9
VDDQ1
C1
VDDQ2
C3
VDDQ3
C7
VDDQ4
C9
VDDQ5
E9
VDDQ6
G1
VDDQ7
G3
VDDQ8
G7
VDDQ9
G9
A1
VDD1
E1
VDD2
J9
VDD3
M9
VDD4
R1
VDD5
J1
VDDL
J7
VSSDL
A7
VSSQ1
B2
VSSQ2
B8
VSSQ3
D2
VSSQ4
D8
VSSQ5
E7
VSSQ6
F2
VSSQ7
F8
VSSQ8
H2
VSSQ9
H8
VSSQ10
A3
VSS1
E3
VSS2
J3
VSS3
N1
VSS4
P9
VSS5
C502
C502
C503
C503
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
C508
C508
C507
C507
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
402 402 402
M_QSB0
M_QSB1
M_QSB2
M_QSB3
M_QSB4
M_QSB5
M_QSB6
M_QSB7
U302
M_MAB14
M_MAB15
M_MAB12
M_MAB11
M_MAB10
M_MAB9
M_MAB8
M_MAB7
M_MAB6
M_MAB5
M_MAB4
M_MAB3
M_MAB2
M_MAB1
M_MAB0
+MVDD
C510
C510
1uF_6.3V
1uF_6.3V
C512
C512
1uF_6.3V
1uF_6.3V
+MVDD
VREF_B0
+MVDD
B301
B301
120R_300mA
120R_300mA
Possible alternate 5150005600G Possible alternate 5150005600G Possible alternate 5150005600G Possible alternate 5150005600G
C511
C511
100nF_6.3V
100nF_6.3V
C509
C509
1uF_6.3V
1uF_6.3V
CLKB#0 (5)
CLKB0 (5)
CKEB0 (5)
CSB#0_0 (5)
WEB#0 (5)
RASB#0 (5)
CASB#0 (5)
M_DQMB#0
M_DQMB#1
ODTB0 (5) ODTB0 (5) ODTB0 (5)
M_QSB0 M_QSB5
R313 10R R313 10R
M_QSB1
R314 10R R314 10R
R303
R303
4.99K
4.99K
C538
C538
R304
R304
100nF_6.3V
100nF_6.3V
4.99K
4.99K
U302
L2
BA0
L3
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
K8
J8
K2
L8
K7
L7
F3
B3
K9
F7
E8
B7
A8
J2
A2
E2
L1
R3
R7
R8
HY5PS561621F-25
HY5PS561621F-25
+MVDD +MVDD
DQ15
DQ14
BA1
DQ13
DQ12
A12
DQ11
A11
DQ10
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CK
VDDQ1
CK
VDDQ2
VDDQ3
CKE
VDDQ4
VDDQ5
VDDQ6
VDDQ7
CS
VDDQ8
VDDQ9
WEK3VDDQ10
RAS
VDD1
VDD2
CAS
VDD3
VDD4
LDM
VDD5
UDM
VDDL
VSSDL
ODT
LDQS
VSSQ1
LDQS
VSSQ2
VSSQ3
VSSQ4
VSSQ5
UDQS
VSSQ6
UDQS
VSSQ7
VSSQ8
VREF
VSSQ9
VSSQ10
NC#A2
VSS1
NC#E2
VSS2
NC#L1
VSS3
NC#R3
VSS4
NC#R7
VSS5
NC#R8
C526
C526
C527
C527
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
402 402 402
C531
C531
C532
C532
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
M_MDB12
B9
M_MDB11
B1
M_MDB15
D9
M_MDB9 M_MDB56
D1
M_MDB8
D3
M_MDB14
D7
M_MDB10
C2
DQ9
M_MDB13 M_MDB60
C8
DQ8
F9
DQ7
M_MDB3
F1
DQ6
M_MDB7
H9
DQ5
M_MDB0 M_MDB23
H1
DQ4
M_MDB1
H3
DQ3
M_MDB6
H7
DQ2
M_MDB2
G2
DQ1
M_MDB5
G8
DQ0
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
M9
R1
J1
J7
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
C528
C528
1uF_6.3V
1uF_6.3V
C533
C533
1uF_6.3V
1uF_6.3V
C534
C534
1uF_6.3V
1uF_6.3V
B302
B302
120R_300mA
120R_300mA
C536
C536
100nF_6.3V
100nF_6.3V
C537
C537
1uF_6.3V
1uF_6.3V
C535
C535
1uF_6.3V
1uF_6.3V
+MVDD
+MVDD
VREF_B1
+MVDD
M_MAB14
M_MAB15
M_MAB12
M_MAB11
M_MAB10
M_MAB9
M_MAB8
M_MAB7
M_MAB6
M_MAB5
M_MAB4
M_MAB3
M_MAB2
M_MAB1
M_MAB0
CLKB#1 (5)
CLKB1 (5)
CKEB1 (5)
CSB#1_0 (5)
WEB#1 (5)
RASB#1 (5)
CASB#1 (5)
M_DQMB#7 M_DQMB#4
R315 10R R315 10R
M_QSB7
R316 10R R316 10R R318 10R R318 10R
R305
R305
4.99K
4.99K
R306
R306
C563
C563
100nF_6.3V
100nF_6.3V
4.99K
4.99K
U303
U303
L2
BA0
L3
BA1
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS
WEK3VDDQ10
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
L1
NC#L1
R3
NC#R3
R7
NC#R7
R8
NC#R8
HY5PS561621F-25
HY5PS561621F-25
+MVDD
C551
C551
1uF_6.3V
1uF_6.3V
402
+MVDD
C556
C556
1uF_6.3V
1uF_6.3V
402 402
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDD1
VDD2
VDD3
VDD4
VDD5
VDDL
VSSDL
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSS1
VSS2
VSS3
VSS4
VSS5
C552
C552
1uF_6.3V
1uF_6.3V
C557
C557
1uF_6.3V
1uF_6.3V
402 402 402 402 402 402 402 402 402 402
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
M9
R1
J1
J7
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
C553
C553
1uF_6.3V
1uF_6.3V
C558
C558
1uF_6.3V
1uF_6.3V
M_MDB61
M_MDB59
M_MDB62
M_MDB57
M_MDB63
M_MDB58
M_MDB44
M_MDB43
M_MDB47
M_MDB40
M_MDB41
M_MDB46
M_MDB42
M_MDB45
C559
C559
1uF_6.3V
1uF_6.3V
402
B303
B303
120R_300mA
120R_300mA
C561
C561
100nF_6.3V
100nF_6.3V
C562
C562
1uF_6.3V
1uF_6.3V
C560
C560
1uF_6.3V
1uF_6.3V
+MVDD
+MVDD
VREF_B1
+MVDD
R317 10R R317 10R
R307
R307
4.99K
4.99K
R308
R308
4.99K
4.99K
M_MAB14
M_MAB15
M_MAB12
M_MAB11
M_MAB10
M_MAB9
M_MAB8
M_MAB7
M_MAB6
M_MAB5
M_MAB4
M_MAB3
M_MAB2
M_MAB1
M_MAB0
CLKB#1 (5)
CLKB1 (5)
CKEB1 (5)
CSB#1_0 (5)
WEB#1 (5)
RASB#1 (5)
CASB#1 (5)
M_DQMB#6 M_DQMB#5
M_QSB6
M_QSB4
C587
C587
100nF_6.3V
100nF_6.3V
U304
U304
L2
BA0
L3
BA1
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS
WEK3VDDQ10
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
L1
NC#L1
R3
NC#R3
R7
NC#R7
R8
NC#R8
HY5PS561621F-25
HY5PS561621F-25
+MVDD +MVDD
C576
C576
1uF_6.3V
1uF_6.3V
402 402 402 402
C580
C580
1uF_6.3V
1uF_6.3V
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDD1
VDD2
VDD3
VDD4
VDD5
VDDL
VSSDL
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSS1
VSS2
VSS3
VSS4
VSS5
C577
C577
1uF_6.3V
1uF_6.3V
402
C581
C581
1uF_6.3V
1uF_6.3V
M_MDB35
B9
M_MDB37
B1
M_MDB32
D9
M_MDB39
D1
M_MDB38
D3
M_MDB34
D7
M_MDB36
C2
DQ9
M_MDB33
C8
DQ8
M_MDB51 M_MDB4
F9
DQ7
M_MDB52
F1
DQ6
M_MDB49
H9
DQ5
M_MDB55
H1
DQ4
M_MDB54
H3
DQ3
M_MDB48
H7
DQ2
M_MDB53
G2
DQ1
M_MDB50
G8
DQ0
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
M9
R1
J1
J7
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
C578
C578
1uF_6.3V
1uF_6.3V
C582
C582
1uF_6.3V
1uF_6.3V
B304
B304
120R_300mA
120R_300mA
C585
C585
100nF_6.3V
100nF_6.3V
C583
C583
1uF_6.3V
1uF_6.3V
+MVDD
+MVDD
C586
C586
1uF_6.3V
1uF_6.3V
C584
C584
1uF_6.3V
1uF_6.3V
402
CLKB0 (5)
A A
8
7
6
CLKB#0 (5)
CLKB1 (5)
CLKB#1 (5)
5
R321
R321
56R
56R
402
R322
R322
56R
56R
402 402
R323
R323
56R
56R
402
R324
R324
56R
56R
402 402
C599
C599
10nF
10nF
C600
C600
10nF
10nF
+MVDD +MVDD
R309
R309
4.99K
4.99K
VREF_B0 VREF_B1
R310
R310
4.99K
4.99K
4
R319
R319
4.99K
4.99K
R320
R320
4.99K
4.99K
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
3
Date: Sheet
2
105-B067xx-00
105-B067xx-00
105-B067xx-00
2
2
15 22 Friday, November 24, 2006
15 22 Friday, November 24, 2006
15 22 Friday, November 24, 2006
1
2
of
of
of
www.vinafix.vn
Page 16
8
7
6
5
4
3
2
1
C1009
C1009
3.3pF_50V
3.3pF_50V
L1009
L1009
82nH
82nH
805 805 805
TjX2M (3)
TjX2P (3)
TjX4M (3)
TjX4P (3)
TjX1M (3)
TjX1P (3)
TjX3M (3)
TjX3P (3)
TjX0M (3)
TjX0P (3)
TjX5M (3)
TjX5P (3)
TjXCP (3)
TjXCM (3)
+5V_VESA
D1002
D1002
4
5
6
CM1213-04
CM1213-04
DDCCLK_DAC1_R
DDCDATA_DAC1_R
A_VSYNC_DAC1_R
HPD_DVI1
A_R_DAC1_F
A_G_DAC1_F
A_B_DAC1_F
A_HSYNC_DAC1_R
CH3
Vp
CH4
2
Vn
1
CH1
+5V_VESA
C1010
C1010
68pF
68pF
603 603 603 603
DB15 pin
Standard VGA
DDC1 Host
Monitor ID bit 0
11
12
4
15
9
Hardware
Support
Based on VESA Display Data Channel (DDC) Standard Ver. 3 Dec. 15, 1997
+5V_VESA
Monitor ID bit 0
Monitor ID bit 1
Data from display
Monitor ID bit 2
Monitor ID bit 2
Monitor ID bit 3
Open
+5V
N/C
50mA min
Mechanical Key
1A max
No Yes Yes No Yes
J1001
J1001
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
C1
C2
C3
C4
C5
C6
26
27
28
29
30
DVI CONNECTOR
DVI CONNECTOR
1
2
3
11
12
4
15
9
13
14
5
6
7
8
10
16
17
CASE
TMDS Data2-
TMDS Data2+
TMDS Data2/4 Shield
TMDS Data4TMDS Data4+
DDC Clock
DDC Data
Analog VSYNC
TMDS Data1TMDS Data1+
TMDS Data1/3 Shield
TMDS Data3TMDS Data3+
+5V Power
GND (for +5V)
Hot Plug Detect
TMDS Data0TMDS Data0+
TMDS Data0/5 Shield
TMDS Data5TMDS Data5+
TMDS Clock Shield
TMDS Clock+
TMDS Clock-
Analog Red
Analog Green
Analog Blue
Analog HYNC
Analog GND
Analog GND#C6
CASE#26
CASE#27
CASE#28
CASE#29
CASE#30
MJ1001
MJ1001
R
G
B
MS0
MS1
MS2
MS3
NC
HS
VS
VSS
VSS#6
VSS#7
VSS#8
VSS#10
CASE
CASE#17
G3179C219-005
G3179C219-005
DDC2B or
DDC2B+ Host
Monitor ID bit 0
SDA
Monitor ID bit 2
SCL
+5V
50mA min
1A max
DDC2_MONID0
DDC2_MONID1(SDA)
DDC2_MONID2
DDC2_MONID3(SCL)
DDC2AB Host
Monitor ID bit 0
SDA
Monitor ID bit 2
SCL
+5V
300mA min
1A max
DDC1/2 Display
Optional
SDA
Optional
SCL
Optional
3
CH2
+3.3V
D1001
D1001
4
CH3
5
Vp
6
CH4
CM1213-04
CM1213-04
A_R_DAC1_F
A_G_DAC1_F
A_B_DAC1_F
DDCDATA_DAC1_R
DDCCLK_DAC1_R
A_HSYNC_DAC1_R
A_VSYNC_DAC1_R
+3.3V
Q1021
Q1021
MMBT3904
MMBT3904
2 3
R1023
R1023
10K
10K
1
R1022 10K R1022 10K
C1007
C1007
3.3pF_50V
3.3pF_50V
L1007
L1007
82nH
82nH
C1001
C1001
15pF
15pF
A_R_DAC1_M
A_G_DAC1_M
A_B_DAC1_M
D D
C C
B B
A_R_DAC1 (3)
A_G_DAC1 (3)
A_B_DAC1 (3)
C1004
R1001 75R R1001 75R
R1002 75R R1002 75R
R1003 75R R1003 75R
402
RGB should be routed from the ASIC to the display connector without switching reference plane or running over split plane
CRT1DDCDATA (1,3)
CRT1DDCCLK (1,3)
C1999 100nF C1999 100nF
A_HSYNC_DAC1 (1,3,7)
A_VSYNC_DAC1 (1,3,7)
SYNC and DDC should be routed from the ASIC to the display connector without switching reference plane or running over split plane
C1004
8.0pF
8.0pF
+3.3V
R1004
R1004
4.7K
4.7K
402
+3.3V +5V
R1007
R1007
4.7K
4.7K
402 402
+5V
14
2 3
U1999A
U1999A
74AHCT125
74AHCT125
1
7
4
74AHCT125
74AHCT125
U1999B
U1999B
5 6
L1001 68nH_300mA L1001 68nH_300mA
L1002 68nH_300mA L1002 68nH_300mA
C1006
C1006
C1005
C1005
8.0pF
8.0pF
8.0pF
8.0pF
402 402 402
+5V
1
1
A_HSYNC_DAC1_B
A_VSYNC_DAC1_B
R1005
R1005
6.8K
6.8K
402
DDCDATA_DAC1_5V DDCDATA_DAC1_R
3 2
BSH111
BSH111
Q1001
Q1001
R1008
R1008
6.8K
6.8K
402
DDCCLK_DAC1_5V
3 2
BSH111
BSH111
Q1002
Q1002
C1002
C1002
15pF
15pF
402 402 402
R1006 33R R1006 33R
R1009 33R R1009 33R
R1010
R1010
R1011
R1011
L1004 56nH L1004 56nH
L1005 56nH L1005 56nH
L1006 56nH L1006 56nH L1003 68nH_300mA L1003 68nH_300mA
C1003
C1003
15pF
15pF
402
DDCCLK_DAC1_R
402
A_HSYNC_DAC1_R
10R
10R
402
A_VSYNC_DAC1_R
10R
10R
HPD1 (3)
CH2
Vn
CH1
C1008
C1008
3.3pF_50V
3.3pF_50V
L1008
L1008
82nH
82nH
3
2
1
A A
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
8
7
6
5
4
3
Date: Sheet
2
105-B067xx-00
105-B067xx-00
105-B067xx-00
2
2
16 22 Friday, November 24, 2006
16 22 Friday, November 24, 2006
16 22 Friday, November 24, 2006
1
2
of
of
of
www.vinafix.vn
Page 17
8
7
6
5
4
3
2
1
C2009
C2009
3.3pF_50V
3.3pF_50V
L2009
L2009
82nH
82nH
805 805 805
+5V_VESA2
D2002
D2002
4
CH3
5
Vp
6
CH4
CM1213-04
CM1213-04
TX2M_DVI2 (3)
TX2P_DVI2 (3)
TX4M_DVI2 (3)
TX4P_DVI2 (3)
TX1M_DVI2 (3)
TX1P_DVI2 (3)
TX3M_DVI2 (3)
TX3P_DVI2 (3)
TX0M_DVI2 (3)
TX0P_DVI2 (3)
TX5M_DVI2 (3)
TX5P_DVI2 (3)
TXCP_DVI2 (3)
TXCM_DVI2 (3)
3
CH2
Vn
CH1
DDCCLK_DAC2_R
DDCDATA_DAC2_R
A_VSYNC_DAC2_R
HPD_DVI2
A_R_DAC2_F
A_G_DAC2_F
A_B_DAC2_F
A_HSYNC_DAC2_R
3
2
1
+5V_VESA2
C2010
C2010
68pF
68pF
603 603 603 603
DB15 pin
Standard VGA
DDC1 Host
Monitor ID bit 0
11
12
4
15
9
Hardware
Support
Based on VESA Display Data Channel (DDC) Standard Ver. 3 Dec. 15, 1997
2
Monitor ID bit 0
Monitor ID bit 1
Data from display
Monitor ID bit 2
Monitor ID bit 2
Monitor ID bit 3
Open
+5V
N/C
50mA min
Mechanical Key
1A max
No Yes Yes No Yes
+5V_VESA2
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
C1
C2
C3
C4
C5
C6
26
27
28
29
30
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
MJ2001
MJ2001
1
R
2
G
3
B
11
MS0
12
MS1
4
MS2
15
MS3
9
NC
13
HS
14
VS
5
VSS
6
VSS#6
7
VSS#7
8
VSS#8
10
VSS#10
16
CASE
17
CASE#17
G3179C219-005
G3179C219-005
DDC2B or
DDC2B+ Host
Monitor ID bit 0
SDA
Monitor ID bit 2
SCL
+5V
50mA min
1A max
J2001
J2001
CASE
TMDS Data2-
TMDS Data2+
TMDS Data2/4 Shield
TMDS Data4TMDS Data4+
DDC Clock
DDC Data
Analog VSYNC
TMDS Data1TMDS Data1+
TMDS Data1/3 Shield
TMDS Data3TMDS Data3+
+5V Power
GND (for +5V)
Hot Plug Detect
TMDS Data0TMDS Data0+
TMDS Data0/5 Shield
TMDS Data5TMDS Data5+
TMDS Clock Shield
TMDS Clock+
TMDS Clock-
Analog Red
Analog Green
Analog Blue
Analog HYNC
Analog GND
Analog GND#C6
CASE#26
CASE#27
CASE#28
CASE#29
CASE#30
DVI CONNECTOR
DVI CONNECTOR
105-B067xx-00
105-B067xx-00
105-B067xx-00
DDC2_MONID0
DDC2_MONID1(SDA)
DDC2_MONID2
DDC2_MONID3(SCL)
DDC2AB Host
Monitor ID bit 0
SDA
Monitor ID bit 2
SCL
+5V
300mA min
1A max
17 22 Friday, November 24, 2006
17 22 Friday, November 24, 2006
17 22 Friday, November 24, 2006
1
DDC1/2 Display
Optional
SDA
Optional
SCL
Optional
of
of
2
2
2
+3.3V
D2001
D2001
4
CH3
5
Vp
6
CH4
CM1213-04
CM1213-04
C2001
C2001
15pF
15pF
A_R_DAC2_M
A_G_DAC2_M
A_B_DAC2_M
C2002
C2002
15pF
15pF
402 402 402
D D
C C
B B
A A
A_R_DAC2 (3)
A_G_DAC2 (3)
A_B_DAC2 (3)
C2004
R2001 75R R2001 75R
R2002 75R R2002 75R
R2003 75R R2003 75R
402
RGB should be routed from the ASIC to the display connector without switching reference plane or running over split plane
CRT2DDCDATA (3)
CRT2DDCCLK (3)
A_HSYNC_DAC2 (3,7)
A_VSYNC_DAC2 (3,7)
SYNC and DDC should be routed from the ASIC to the display connector without switching reference plane or running over split plane
8
C2004
8.0pF
8.0pF
+3.3V
R2004
R2004
4.7K
4.7K
402
+3.3V +5V
R2007
R2007
4.7K
4.7K
402 402
9 8
U1999C
U1999C
74AHCT125
74AHCT125
10
13
74AHCT125
74AHCT125
U1999D
U1999D
12 11
L2001 68nH_300mA L2001 68nH_300mA
L2002 68nH_300mA L2002 68nH_300mA
L2003 68nH_300mA L2003 68nH_300mA
C2005
C2005
C2006
C2006
8.0pF
8.0pF
8.0pF
8.0pF
402 402 402
+5V
1
1
A_HSYNC_DAC2_B
A_VSYNC_DAC2_B
7
R2005
R2005
6.8K
6.8K
402
DDCDATA_DAC2_5V DDCDATA_DAC2_R
3 2
BSH111
BSH111
Q2001
Q2001
R2008
R2008
6.8K
6.8K
402
DDCCLK_DAC2_5V
3 2
BSH111
BSH111
Q2002
Q2002
C2003
C2003
15pF
15pF
R2006 33R R2006 33R
R2009 33R R2009 33R
R2010
R2010
R2011
R2011
6
L2004 56nH L2004 56nH
L2005 56nH L2005 56nH
L2006 56nH L2006 56nH
402
DDCCLK_DAC2_R
402
A_HSYNC_DAC2_R
33R
33R
402
A_VSYNC_DAC2_R
33R
33R
HPD2 (7)
5
A_R_DAC2_F
A_G_DAC2_F
A_B_DAC2_F
DDCDATA_DAC2_R
DDCCLK_DAC2_R
A_HSYNC_DAC2_R
A_VSYNC_DAC2_R
+3.3V
Q2021
Q2021
MMBT3904
MMBT3904
4
R2022 10K R2022 10K
1
2 3
R2023
R2023
10K
10K
T2X0M (3)
T2X0P (3) TX0P_DVI2 (3)
T2X1M (3)
T2X1P (3)
T2X2M (3)
T2X2P (3)
T2X3M (3)
T2X3P (3)
T2X4M (3)
T2X4P (3)
T2X5M (3)
T2X5P (3)
T2XCM (3)
T2XCP (3)
C2007
C2007
3.3pF_50V
3.3pF_50V
L2007
L2007
82nH
82nH
TX0M_DVI2 (3)
TX1M_DVI2 (3)
TX1P_DVI2 (3)
TX2M_DVI2 (3)
TX2P_DVI2 (3)
TX3M_DVI2 (3)
TX3P_DVI2 (3)
TX4M_DVI2 (3)
TX4P_DVI2 (3)
TX5M_DVI2 (3)
TX5P_DVI2 (3)
TXCM_DVI2 (3)
TXCP_DVI2 (3)
CH2
Vn
CH1
C2008
C2008
3.3pF_50V
3.3pF_50V
L2008
L2008
82nH
82nH
3
2
1
www.vinafix.vn
Page 18
8
D D
+RTAVDD
1 2
C3222
C3222
22uF_16V
22uF_16V
R3222
R3222
10R
10R
402
C3221
C3221
100nF
100nF
402
L3202 3.3uH_50mA L3202 3.3uH_50mA
1 2
1206
L3201 3.3uH_50mA L3201 3.3uH_50mA
1 2
1206
L3203 3.3uH_50mA L3203 3.3uH_50mA
1 2
1206
RTXTALIN (3)
R3206
R3206
C3206
C3206
75R
75R
330pF_50V
330pF_50V
402
402
C3204
C3204
R3204
R3204
330pF_50V
330pF_50V
75R
75R
402
402
C3205
C3205
R3205
R3205
330pF_50V
330pF_50V
75R
75R
402
402
As close as possible to
pin 56 of Rage Theater
PERST#_buf (1,2)
CompIn_R
LumaIn_R
C C
ChromaIn_R
L3221
L3221
3.3uH_50mA
3.3uH_50mA
B B
7
+RTAVDD
1 2
R3223
R3223
10R
10R
L3223
L3223
3.3uH_50mA
3.3uH_50mA
402
C3225
C3225
100nF
100nF
402
C3224
C3224
22uF_16V
22uF_16V
C1106
C1106
1 2
VADCFILTER VADCFILTER
22nF
22nF
L3225
L3225
3.3uH_50mA
3.3uH_50mA
GND_VIN
1 2
R3225
R3225
10R
10R
C3226
C3226
22uF_16V
22uF_16V
C3209 100nF C3209 100nF
C1105
C1105
68nF_25V
68nF_25V
NS3201 NS_VIA NS3201 NS_VIA
C3207 2.2uF_16V C3207 2.2uF_16V
C3208 2.2uF_16V C3208 2.2uF_16V
402
C3223
C3223
100nF
100nF
402
VADCFILTER
VADCFILTER
R3221
R3221
4.7K
4.7K
402
5%
6
47
49
48
66
60
61
33
34
35
36
37
38
39
40
27
28
58
59
57
56
55
43
45
44
46
50
51
52
53
54
69
70
73
74
67
68
VAGCVDD
VAGCVSS#49
VAGCVSS
VDACVDD
VDACBVSS
VDACJVSS
VIND0
VIND1
VIND2
VIND3
VIND4
VIND5
VIND6
VIND7
VINGATEA
VINGATEB
CF
CR
VAGCCAP
VIDEOGNDSENSE
VCLAMPCAP
VADCDVDD
VADCAVDD
VADCDVSS
VADCAVSS
COMP0
COMP1
COMP2
YF_COMP3
YR_COMP4
XTALIN
XTALOUT
TESTEN
RESETB
PLLVDD
PLLVSS
18
VSSC
26
VSSC#26
VSSC#77
77
83
71
81
29
VDDR1VDDC
VDDR#71
VDDR#29
VSSR#2
VSSC#100
VSSC#83
2
12
100
C3231
C3231
1uF_6.3V
1uF_6.3V
25
76
VDDR#81
VSSR#72
VSSR#12
VSSR#3030VSSR#32
82
72
99
VDDC#99
VDDC#76
VSSR
VSSR#90
90
5
C3232
C3232
1uF_6.3V
1uF_6.3V
41
31
VDDC#41
VDDR#31
DS_VIPCLK
AS_HCTL
SRDY_IRQB
C_GREEN
COMP_BLUE
CLKOUT0_GPIO0
CLKOUT1_GPIO1
CLKOUT2_GPIO2
VSSC#42
42
32
Rage Theater 1 A43 RH
Rage Theater 1 A43 RH
C3233
C3233
1uF_6.3V
1uF_6.3V
U3201
U3201
SAD0
SAD1
SAD2
SAD3
SAD4
SAD5
SAD6
SAD7
HAD0
HAD1
ADIO
BITCLK
SPDIF
BYTCLK
SYNC
Y_RED
RSET
GPIO3
GPIO4
GPIO5
GPIO6
PDATA0
PDATA1
PDATA2
PDATA3
PDATA4
PDATA5
PDATA6
PDATA7
PCLK
C3234
C3234
1uF_6.3V
1uF_6.3V
402 402 402 402 402 402 402 402
91
92
93
94
95
96
97
98
88
87
86
84
85
15
SDA
16
SCL
22
ADO
24
23
WS
21
19
89
75
62
63
64
65
78
79
20
13
14
17
80
4
5
6
7
8
9
10
11
3
C3235
C3235
C3236
C3236
1uF_6.3V
1uF_6.3V
1uF_6.3V
1uF_6.3V
RP3223C 33R RP3223C 33R
RP3223A 33R RP3223A 33R
RP3223B 33R RP3223B 33R
RP3223D 33R RP3223D 33R
5%
6 3
R3321 383R R3321 383R
402
1%
8 1
7 2
6 3
5 4
8 1
7 2
6 3
5 4
5%
R3322
R3322
8 1
7 2
5 4
Please close to RT
33R
33R
R3228 47K R3228 47K
C3237
C3237
1uF_6.3V
1uF_6.3V
5%
RP3221A 33R RP3221A 33R
RP3221B 33R RP3221B 33R
RP3221C 33R RP3221C 33R
RP3221D 33R RP3221D 33R
RP3222A 33R RP3222A 33R
RP3222B 33R RP3222B 33R
RP3222C 33R RP3222C 33R
RP3222D 33R RP3222D 33R
5%
+3.3V
4
R3324
R3324
10K
10K
402
1%
C3238
C3238
1uF_6.3V
1uF_6.3V
VID_0
VID_1
VID_2
VID_3
VID_4
VID_5
VID_6
VID_7
+3.3V
R3325
R3325
4.7K
4.7K
R3326
R3326
10K
10K
402 402
1% 5%
VIPCLK (7)
VPHCTL (7)
VHAD_0 (7)
VHAD_1 (7)
RTCLK (3)
VID_[7..0] (7)
VPCLK0 (7)
3
CompIn_R
LumaIn_R
ChromaIn_R
2
J3201
PIN6
DAC2_Y_DIN
DAC2_C_DIN
C3202
C3202
330pF_50V
330pF_50V
DAC2_COMP_DIN
C3201
C3201
330pF_50V
330pF_50V
L3001 470nH_250mA L3001 470nH_250mA
C3001
C3001
47pF_50V
47pF_50V
L3002 470nH_250mA L3002 470nH_250mA
C3002
C3002
47pF_50V
47pF_50V
L3003 470nH_250mA L3003 470nH_250mA
C3003
C3003
47pF_50V
47pF_50V
R3001
R3001
75R
75R
R3002
R3002
75R
75R
R3003
R3003
75R
75R
CompIn
LumaIn
ChromaIn
R3203 0R R3203 0R
R3201 0R R3201 0R
R3202 0R R3202 0R
DAC2_Y (3)
DAC2_C (3)
DAC2_COMP (3) RTXTALOUT (3)
6
3
4
7
5
1
2
11
12
8
9
10
Overlap with Rpin5
C3203
C3203
330pF_50V
330pF_50V
C3004
C3004
47pF_50V
47pF_50V
C3005
C3005
47pF_50V
47pF_50V
C3006
C3006
47pF_50V
47pF_50V
J3201
HDTV_OUT_DET#
Y-OUT
C-OUT
Comp-out
Comp-in
GND
GND#2
Luma-in
Chroma-in
CASE
CASE#9
CASE#10
GA1042C219-019F
GA1042C219-019F
1
DAC2_Y_F
DAC2_C_F
DAC2_COMP_F
Install for Dell
DNI for Dell
STV/HDTV#_OUT_DET (7)
402
402
402
402
+3.3V
DAC2_Y_DIN DAC2_Y_F
DAC2_C_DIN
DAC2_COMP_DIN
The 7-pin MiniDIN footprint allows one of the two MiniDINs:
- 7-pin Svideo/Composite MiniDIN P/N 6071001500G
- 4-pin Svideo MiniDIN P/N 6070001000G
Install for Dell
R3010 0R R3010 0R
R3008
R3008
10K
10K
402 402
R3009 0R R3009 0R
C3007
C3007
C3008
C3008
C3009
82pF
82pF
3
C3009
82pF
82pF
82pF
82pF
402 402 402
402
R30070RR3007
0R
402
DNI for Dell
Install for Dell only when it's needed for EMI
C3010
C3010
82pF
82pF
402
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
2
TV Out
J3001
J3001
PIN6
6
HDTV_OUT_DET#
3
Y-OUT
4
C-OUT
7
Comp_out
CompIn
5
SYNC
1
GND
2
GND#2
8
Rpin5
CASE
9
CASE#9
10
CASE#10
Conn_DIN_Mini_Circular_7_Pin_with_O_Ring
Conn_DIN_Mini_Circular_7_Pin_with_O_Ring
105-B067xx-00
105-B067xx-00
105-B067xx-00
of
of
of
18 22 Friday, November 24, 2006
18 22 Friday, November 24, 2006
18 22 Friday, November 24, 2006
1
2
2
2
R3011 0R R3011 0R
Regulator for +RTAVDD
Vout = 3.3V
+12V_BUS
C3101
C3101
C3103
C3103
10UF
10UF
150nF_16V
150nF_16V
5%
CAP CER 10UF 20% 16V X5R
603
REG3101
RTAVDD_ENb (12)
A A
VIN5VOUT#3
4
EN
AP1118D33LA
AP1118D33LA
8
NC
2
VOUT#6
3
6
1
GND
**
C3105
C3105
MC3105
MC3105
10uF
10uF
22uF_16V
22uF_16V
**
ALT
DUAL FOOTPRINT
CAP CER 10UF 10% 6.3V X5R
(0805)1.4MM MAX THICK
7
REG3101
(1206)1.8MM H MAX
**
MC3106
MC3106
22uF_16V
22uF_16V
**
ALT
+RTAVDD
C3106
C3106
10uF
10uF
DUAL FOOTPRINT
6
www.vinafix.vn
5
Place near connector
0R leaves footprint for Ferrite
Beads if req'd for EMI
DAC2_C_F
DAC2_COMP_F
4
R3004 0R R3004 0R
R3005 0R R3005 0R
R3006 0R R3006 0R
Page 19
8
7
6
5
4
3
2
1
+3.3V
CAP CER 10UF 10% 6.3V X5R
INTERFACE INFO: SMBUS SLAVE
Clock: Min 10kHz - Max 100kHz
7 bit address: 100 1100
SCL_R
SDA_R
Tach
C4005
C4005
56pF_50V
56pF_50V
402
NPO
402
(0805)1.4MM MAX THICK
C4006
C4006
56pF_50V
56pF_50V
402
NPO
MMBT3906
MMBT3906
Q4002
Q4002
2 3
1
R4010 0R R4010 0R
C4007
C4007
1uF
1uF
805
16V
Y5V
R4003
R4003
R4004
R4004
10K
10K
10K
10K
D D
CRT3DDCCLK (1,3)
CRT3DDCDATA (3)
PWM
H1A
H1A
HEATSINK
HEATSINK
2345678
1
H1D
H1D
HEATSINK
C C
B B
HEATSINK
25262728293031
H1B
H1B
HEATSINK
HEATSINK
9
10111213141516
H1C
H1C
HEATSINK
HEATSINK
17181920212223
MR40050RMR4005
0R
402
R40050RR4005
0R
402
24
1
32
SCL_R
PWM
R4001 100R R4001 100R
R4002 100R R4002 100R
R4015 0R R4015 0R
R4017
R4017
R4028
R4028
10K
10K
10K
10K
NR4027 0R NR4027 0R
MR4027 100K MR4027 100K
402
R4027 0R R4027 0R R4008 100K R4008 100K
402
Q4001
Q4001
MMBT3904
MMBT3904
2 3
1
Q4021
Q4021
MMBT3906
MMBT3906
+12V_BUS
2 3
402
402
R4006
R4006
2.61K
2.61K
402
1%
R40071KR4007
1K
402
1%
Rx can overlap QxQxRx
+3.3V
R4009
R4009
100K
100K
402 402
1
2 3
DNI
C4001
C4001
10uF
10uF
U4001
U4001
8
SMBCLK
7
SMBDAT
6
ALERT
GND5PWM
LM63CIMAX
LM63CIMAX
R4011
R4011
100K
100K
Q4003
Q4003
MMBT3904
MMBT3904
R4012 10K R4012 10K
R4013
R4013
1.47K
1.47K
402
C4002
C4002
1uF_6.3V
1uF_6.3V
402 402
6.3V
X6S
VDD
1
402
C4003
C4003
100pF_50V
100pF_50V
50V
NPO
1
2
D+
3
D-
4
3 2
R4026 0R R4026 0R
PWM
Q4004
Q4004
MJD45H11
MJD45H11
GPU_DPLUS
C4004
C4004
2.2nF_50V
2.2nF_50V
402
GPU_DMINUS
50V
X7R
3 2
MQ4004
MQ4004
1
2SB1188
2SB1188
1
4
3 2
NQ4004
NQ4004
BCP68
BCP68
+12V_BUS
GPU_DPLUS (3)
GPU_DMINUS (3) ThermINT (7,8)
B4001
B4001
26R_600mA
26R_600mA
R40140RR4014
0R
402
DNI
C4008
C4008
1uF
1uF
805
16V
Y5V
JU4001 JU4001
1
2
Tach
MJU4001
MJU4001
1
2
3
Header_1X3
Header_1X3
A A
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
8
7
6
5
www.vinafix.vn
4
3
Date: Sheet
2
105-B067xx-00
105-B067xx-00
105-B067xx-00
2
2
2
of
of
of
19 22 Friday, November 24, 2006
19 22 Friday, November 24, 2006
19 22 Friday, November 24, 2006
1
Page 20
5
DVI/DVI SCREWS with top tab
ASSY-SCREW2
ASSY-SCREW1
ASSY-SCREW1
SCREW
SCREW
JACKSCREW
JACKSCREW
<3rd part field>
<3rd part field>
7020000800G
7020000800G
ASSY-SCREW3
ASSY-SCREW3
SCREW
SCREW
JACKSCREW
JACKSCREW
D D
<3rd part field>
<3rd part field>
7020000800G
7020000800G
ASSY1
ASSY1
ANTISTATIC
ANTISTATIC
BAG
BAG
6_X_11
6_X_11
C C
ASSY-SCREW2
SCREW
SCREW
JACKSCREW
JACKSCREW
<3rd part field>
<3rd part field>
7020000800G
7020000800G
ASSY-SCREW4
ASSY-SCREW4
SCREW
SCREW
JACKSCREW
JACKSCREW
<3rd part field>
<3rd part field>
7020000800G
7020000800G
ASSY-SCREW5
ASSY-SCREW5
SCREW
SCREW
PAN_HEAD
PAN_HEAD
7020001700G
7020001700G
BKT1
BKT1
BRACKET
BRACKET
8020042500G
8020042500G
4
MT1
MT1
MT_Hole_0.136_in.
MT_Hole_0.136_in.
DNI
SK1
SK1
RV560 Socket
RV560 Socket
PCB1
PCB1
PCB
PCB
109-B06731-00
109-B06731-00
MT2
MT2
MT_Hole_0.136_in_6VIA
MT_Hole_0.136_in_6VIA
3
2
1
B B
A A
<Variant Name>
<Variant Name>
<Variant Name>
5
4
www.vinafix.vn
3
2
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
105-B067xx-00
105-B067xx-00
105-B067xx-00
1
of
of
of
20 22 Friday, November 24, 2006
20 22 Friday, November 24, 2006
20 22 Friday, November 24, 2006
2
2
2
Page 21
5
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH Friday, November 24, 2006
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH Friday, November 24, 2006
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH Friday, November 24, 2006
REVISION HISTORY
REVISION HISTORY
REVISION HISTORY
D D
Sch
Sch
Sch
Rev
Rev
Rev
PCB
PCB
PCB
Rev
Rev
Rev
0
00A
1
00B
Date
Date
Date
06/07/25
06/08/11
Design based on 105/109-A880xx-00E
Replacing GDDR3 memory config to DDR2
(pg 19) Removing +1.8V regulator - not required
(pg 11) Removing linear regulator for +MVDD (not used) to facilitate PCB design
Remove CrossFire support
(pg 08) Renaming net label BUSEN to ENBUS
4
NOTE:
NOTE:
NOTE:
3
Schematic No.
Schematic No.
Schematic No.
105-B067xx-00
105-B067xx-00
105-B067xx-00
This schematic represents the PCB, it does not represent any specific SKU.
This schematic represents the PCB, it does not represent any specific SKU.
This schematic represents the PCB, it does not represent any specific SKU.
For Stuffing options (component values, DNI , ? please consult the product specific BOM.
For Stuffing options (component values, DNI , ? please consult the product specific BOM.
For Stuffing options (component values, DNI , ? please consult the product specific BOM.
Please contact ATI representative to obtain latest BOM closest to the application desired.
Please contact ATI representative to obtain latest BOM closest to the application desired.
Please contact ATI representative to obtain latest BOM closest to the application desired.
REVISION DESCRIPTION
REVISION DESCRIPTION
REVISION DESCRIPTION
2
Date:
Date:
Date:
1
Rev
Rev
Rev
2
2
2
00 2
C C
B B
06/09/20 (pg 19) Updating H1 symbols
(Layout) Addressing DFM issues
(pg 08) Changing MQ601, MQ602, MQ603, MQ604, MQ611, MQ612, MQ613, MQ614 from p-tdson-8 to SO8_PowerPak (dual footprint)
(pg 10) Changing Q701 and Q702 from p-tdson-8 to SO8_PowerPak (dual footprint)
A A
5
4
www.vinafix.vn
3
2
1
Page 22
5
4
3
2
1
MEMORY CHANNEL A
4pcs DDR2 16M/32Mx16
D D
External 12V
Header
External Power Detection
POWER REGULATORS
From +12V
VDDC, MVDD
VDDCI (Linear from MVDD)
C C
From +12V LINEAR:
+5V, +5V_VESA,
+5V_VESA2, RageTheater
From +12V DIRECT:
FAN
From +3.3V LINEAR:
VDDC_CT, MPVDD, PVDD,
TPVDD, T2PVDD, TXVDDR,
T2XVDDR, AVDD, A2VDD,
VDD1DI, VDD2DI,
PCIE, VDDR3, VDDR4,
VDDR5, VDDRH
FAN
Straps
BIOS
Speed control
& temperature
sense
INTERRUPT
Temp. Sensing
Dynamic VDDC
POWER DELIVERY
+PCIE_SOURCE
B B
+3.3V
3.3V_BUS
delayed circuit
SMPS Enable
Circuit
+12V_BUS
MEMA MEMB
GPIO16
TMDS2
DL TMDS2
DAC2
H/V2Sync
GPIO
ROM
XTALIN/OUT
Thermal
DDC3
GPIO17
D+/D-
GPIO15
Capture
DVPCNTL_1
TMDS1
DL TMDS1
DAC1
RV560
H/VSync
PCI-Express
GPIO14
CRT2
DDC2
TVO
XTAL
MPP
VIP
STV/HDTV#_OUT_DET
HPD1
CRT1
DDC1
MEMORY CHANNEL B
4pcs DDR2 16M/32Mx16
TMDS matching
Oscillator
TMDS matching
RBG Filters
TVO Filters
XTALIN/OUT
CLKOUT
RageTheater
RBG Filters
HPD2
Slim-VGA
Connector
TVO/VIVO
Connector
HPD
DVI-I
Slim-VGA
Connector
& DVI-I
&
+3.3V_BUS
+12V_BUS
A A
5
PCI-Express Bus
4
DUAL DL-DVI-I VIVO 6L FH
REV 2
www.vinafix.vn
3
ATI Technologies Inc.
ATI Technologies Inc.
ATI Technologies Inc.
1 Commerce Valley Drive East
1 Commerce Valley Drive East
1 Commerce Valley Drive East
Markham, Ontario
Markham, Ontario
Markham, Ontario
Canada, L3T 7X6
Canada, L3T 7X6
Canada, L3T 7X6
(905) 882-2600
(905) 882-2600
(905) 882-2600
Title
Title
Title
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
RH PCIE RV560 512MB DDR2 DUAL DL-DVI-I VIVO 6L FH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
2
Date: Sheet
105-B067xx-00
105-B067xx-00
105-B067xx-00
1
2
2
2
of
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22 22 Friday, November 24, 2006
22 22 Friday, November 24, 2006
22 22 Friday, November 24, 2006
RH PCIE RV560 512MB DDR2