MSI MS-9154 Schematics

A B C

Dell Controlled Print

D

REVISIONS

1

2

3

REV

A00-00

A01-00

A02-00

A03-00

ECO161177

ECO168386

ECO168401

ECO173798

DESCRIPTIONECO DATE

RELEASE FOR P1355 TO J9621 CAPACITOR CHANGE

TABLE OF CONTENTS

Page 1.
Page 2.
Page 3.
Page 4.
Page 5.
Page 6.
Page 7.
Page 8.
Page 9.
Page 10.
Page 11.
Page 12.
Page 13.
Page 14.
Page 15.
Page 16.
Page 17.
Page 18.
Page 19.
Page 20.
Page 21.
Page 22.
Page 23.
Page 24.
Page 25.
Page 26.
Page 27.
Page 28.
Page 29.
Page 30.
Page 31.
Page 32.
Page 33.
Page 34.
Page 35.
Page 36.
Page 37.
Page 38.
Page 39.
Page 40.
Page 41.
Page 42.
Page 43.
Page 44.
Page 45.
Page 46.
Page 47.
Page 48.
Page 49.
Page 50.
Page 51.
Page 52.
Page 53.
Page 54.
Page 55. FWH
Page 56.
Page 57.
Page 58.
Page 59.

BLOCK DIAGRAM
CLOCK DIAGRAM
Clock Synth.
Differential Buffer DB800
System CPLD
Voltage Regulators
VRD
VRD
VRD

---blank--­Processors
Processors
Processors

---blank--­ITP 32 & Level Translation Circuits
MCH, memory
MCH, GTL, Exp, Hub-link
MCH, power
Decoupling Caps
DDR2
DDR2
DDR2, routing diagram
DDR2, VRef
Gigabit Ethernet
Gigabit Ethernet
Gigabit Ethernet
PXH
PXH
PXH
PXH
Connectors
Connectors
ICH5
ICH5
Keyboard, Mouse, COM Ports, I2C MUX/Table
Radeon Video
Radeon Video
Radeon Video
Radeon Video
Super I/O, 373
Battery / Intrusion Detect / RAID Key / VAux Pwrgood
Fans and fan LED's
Parallel Port / ID Button / Rear Cyclops / Speaker
BMC
BMC
BMC
BMC
BMC, Serial Port Muxing
BMC - Serial Port MUXing Diagram
RAC

1.2V Vtt generation
Fan PWM Controllers
MicroVu
VAux reset

USB / Buttons
Spares / Coupons / Hardware
PCI bus p/u's / PCI Debug Slot
Debug Features

06/23/2004RELEASE FOR PRODUCTION

10/21/2004RELEASE Q4/2004 BLOCK

12/17/2004

APPROVED

JIM HUNT

JIM HUNT

1

2

3

4

1U PWA assembly

2U/5U PWA assembly

P# D8266
P# H1754

XLBOM Build Options

1U, Production
2U/5U Production

0
1
21U, Debug

2U/5U Debug

EXPORT RESTRICTION:

THE EXPORT OF THE INFORMATION, SCHEMATICS AND OTHER TECHNICAL DATA CONTAINED IN THIS DOCUMENT
IS CONTROLLED BY THE U.S. GOVERNMENT. THE EXPORT, DEEMED EXPORT OR OTHER TRANSFER OF THIS DATA
TO CERTAIN COUNTRIES AND INDIVIDUALS IS RESTRICTED. ANY TRANSFER, EXPORT OR REEXPORT, MUST BE
IN COMPLIANCE WITH THE U.S. EXPORT ADMINISTRATION REGULATIONS.

3

PWB/Silk Color

Red White
Blue x01

White

x00

Clear White x02
Green Yellow x03

White x03Green

Green White a00

Big Bend, Kobuk, Corvette

PWA: H1754

PWB:

SCHEM:

ASSY DWG:

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY
OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN
WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC.
UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE
OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED
FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE
LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

D1656
D1660
D1657

PROPRIETARY NOTE

UNIPLANAR

aka LINDY PLANAR

DRAWN

Uniplanar Team:

DESIGNED

CHECKED

APPROVED

-Shawn Dube

APPROVED

-Jinsaku Masuyama

APPROVED

-Garnett Thompson

APPROVED

-TJ Thompson

RELEASED

XLBOM Build option table

0 Production Build
9 Prototype Build

A CURRENT ISSUE OF THIS DRAWING MUST
INCLUDE A COPY OF THE FOLLOWING
ECO'S:
ECO

ECO
ECO
ECO
ECO
ECO
ECO
ECO

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

DATE
DATE
DATE
DATE
DATE
DATE
DATE
DATE

INC.

D1660

DATE

12/16/2004 1 OF 60

4

ROUND ROCK,TEXAS

REV.

A03-00

SHEET

DCBA

B D

CA

CLOCK DISTRIBUTION

BLOCK DIAGRAM

12-16-2004_19:50

1

1

2

2

3

3

4 4

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

2 OF 60

DC

A B

B D

V_3P3_CLK

3

21

CA

12-16-2004_19:50

1

+3.3V

1 2

C1093

BLM18BD601SN1

BLM18BD601SN1

0.1uF 16V

L103

L105

R1476

R1420

21

4,35

4,35

21

V_3P3_CLK

3

21

21

1 2

C1094

0.1uF 16V

C1209

C1103

10uF 6.3V

1 2

0.1uF 16V

1 2

C1102

C1101

0.1uF 16V

1 2

0.1uF 16V

1 2

C1100

C1104

0.1uF 16V

1 2

0.1uF 16V

1 2

C1099

1 2

C1098

0.1uF 16V

C1096

0.1uF 16V

1 2

0.1uF 16V

1 2

C1097

0.1uF 16V

ICH_SEG2_SDA

ICH_SEG2_SCL

0-5%

R1421

1 2

0-5%

ICH_SEG2_409_SDA

ICH_SEG2_409_SCL

4.7K

NP*

R1477

4.7K

1 2

NP*

3

ECAD Note:

VCC routing should be from plane, through high-f cap, to pin

3

1

2

3

U1084
300 ohm, 25%, 300mA, 1206

Vishay ILB1206RK301V
KOA CZB2BFL-301P

3

May need to tune caps during UT

V_3P3_CLK

C757

21

0.1uF 16V

50V-10%

27pF

x03_tj_121503

NP

2 1

C1090

R606

21

2.2-5%

X10

1 2

14.31818MHz

R947

2 1

1M-5%

X

50V-10%

C756

27pF

21

0.1uF 16V

12

C759

C1091

21

+3.3V

1 2

C1105

0.1uF 16V

10uF 6.3V

x00_tj_050503

SUB*_U1084

L129

1 2

ILB_1206

300OHM, 300 mA

5

CK_FSB

5

1 2

C1092

V_3P3_CLK_VDD48

CK_FSA

V_3P3_CLK_VDDA

C758

1 2

0.1uF 16V

PROPAGATION_DELAY=L:S::1000

NET_PHYSICAL_TYPE=50MIL

10uF 6.3V

R1419

21

0-5%

R1002

R1022

1 2

0-5%

4,5,59

12

475-1%

IREF = 2.32mA

x02_sd

21

R46

PROPAGATION_DELAY=L:S::1000
NET_PHYSICAL_TYPE=50MIL

5,59

4.7K

R1008

1 2

CK_VTT_PWRGD_N
CK_PWRDWN_N

21

C1326

X

0.1uF 16V

NP*

4.7K

R1018

1 2

NP*

R1007

x00_tj_051203

R1475

4.7K
1 2

3
3

21

1K-1%

C778

1 2

PART_NUMBER=79015

4.7K

21

C779

PART_NUMBER=79015

CK_XTAL_IN
CK_XTAL_OUT

CK_FSA_R
CK_FSB_R
CK_IREF

ICH_SEG2_409_SDA
ICH_SEG2_409_SCL

C777

1000pF

50V-10%

1000pF

50V-10%

PART_NUMBER=79015

C780

21

1000pF

50V-10%

3
10
16
24
55
34
42
48
36

1000pF

1 2

PART_NUMBER=79015

50V-10%

4

5

51
56
52
35
21

30
28

6
11
17
25
39
33
53
45
54

x00_tj_052003

CK409B

VDD_REF
VDD_PCI_1
VDD_PCI_2
VDD_3V66
VDD_ANLG
VDD_48MHZ
VDD_CPU_1
VDD_CPU_2
VDD_SRC

XTALIN
XTALOUT

FS_A
FS_B
IREF
VTT_PWRGD
PWR_DOWN

SDATA
SCLK

GND_REF
GND_PCI_1
GND_PCI_2
GND_3V66
GND_SRC
GND_48MHZ
GND_IREF
GND_CPU
GND_ANLG

CK409 - TSSOP56

SMBus address = D2h

SUB*_W7296

x00c4_tj_090304

REF0
REF1

PCI_F0
PCI_F1
PCI_F2

PCI0
PCI1
PCI2
PCI3
PCI4
PCI5
PCI6

USB
DOT

SRC_P
SRC_N

3V66_0
3V66_1
3V66_2
3V66_3

3V66_4/VCH

CPU_P0
CPU_N0
CPU_P1
CPU_N1
CPU_P2
CPU_N2
CPU_P3
CPU_N3

1
2

7
8
9
12
13
14
15
18
19
20

31
32

38
37

22
23
26
27
29

41
40
44
43
47
46
50
49

CK_14M_ICHS_R
CK_14M_SIO_R

CK_33M_ICHS_R
CK_33M_SIO_R
CK_33M_FWH_R
CK_33M_SLOT3_R
CK_33M_PCI0_DEBUG_R
CK_33M_BMC_R
CK_33M_CPLD_R
CK_33M_DBG_LPC_R
CK_33M_VIDEO_R
CK_33M_RAC_R

CK_48M_USB_ICHS_R
CK_48M_SIO_R

CK_66M_MCH_R
CK_66M_ICH_R
CK_66M_3V66_2
CK_66M_LAI_R

CK_167M_CPU1_P_R
CK_167M_CPU1_N_R
CK_167M_CPU2_P_R
CK_167M_CPU2_N_R
CK_167M_MCH_P_R
CK_167M_MCH_N_R
CK_167M_ITP_P_R
CK_167M_ITP_N_R

CK_100M_DB800_P_R
CK_100M_DB800_N_R

1 2

R1017

21

1K-1%

R1417

1K-1%

R956

1 2

33-5%

R957

1 2

33-5%

R1361

1 2

33-5%

+3.3V

NP*

R593

1K-1%

R964

CK_14M_ICHS

CK_14M_SIO

33

40

33-5%

R955

33-5%

R954

33-5%

R1362

1 2

33-5%

R949

33-5%

R1416

21

21

21

21

21

CK_33M_ICHS

CK_33M_SIO

CK_33M_FWH

CK_33M_SLOT1

CK_33M_PCI0_DEBUG

55

33

40

x00_tj_051503

31

58

2

1K-1%
R1363

33-5%

R959

21

NC_CK_48M_SIO

R962

21

33-5%

R963

21

33-5%

21

CK-409 support
Place close to ICH

21

R1429

1 2

33-5%

21

R1712

49.9-1%

CK_100M_DB800_P
CK_100M_DB800_N

49.9-1%

33-5%

R965

33-5%

R966

33-5%

R967

33-5%

CK_48M_USB_ICHS

R960

33-5%

R961

21

R952

33-5%

21

R968

33-5%

21

R969

33-5%

21

R1036

21

21

21

21

21

49.9-1%

33

4
4

21

R1039

49.9-1%

21

21

21

R1038

49.9-1%

21

R1364

1 2

33-5%

R1366

33-5%

R1367

1 2

33-5%

33-5%

R38

NP*

21

21

21

CK_33M_BMC

CK_33M_CPLD

CK_33M_SMARTVU

CK_33M_VIDEO

CK_33M_RAC

CK_66M_MCH

CK_66M_ICH

CK_167M_CPU1_P

CK_167M_CPU1_N

CK_167M_CPU2_P

CK_167M_CPU2_N

CK_167M_MCH_P

CK_167M_MCH_N

44

5,59

59

36

50

To CPLD and Mictor header

17

33

11

11

11

11

17

17

3

Spread spectrum Controlled through I2C

CK409B / CK409 Operation

FSA

FSB SPEEDFSB

All clk _R nets have a hidden prop-delay max of 500mil

R1473

1 2

4.7K

POP01

R1474

4.7K

POP01

CPU_STOP#

PCI_STOP#

Pop 33ohm, 49.9ohm if CK409B used

NP01

Populate with CK409B (ITP diferential pair)

Differential pair routing guideline:

6 mil traces / 14 mil spacing

Spacing to other traces: 5W

NP01

R950

33-5%

R1034

1 2

R1040

49.9-1%

49.9-1%

CK_167M_ITP_P

CK_167M_ITP_N

15

15

R1037

49.9-1%

R951

21

33-5%

21

NP01

R1035

49.9-1%

21

R1033

49.9-1%

NP01

0

1

0

10

0

11

100 MHz

200 MHz

133 MHz

166 MHz

4 4

ROOM=CLOCK1

Freq. latched on VTT_PWRGD

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

REV.

A03-00

SHEET

3 OF 60

subsys done

Clock CK409B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

A B

DC

B D

CA

12-16-2004_19:50

1

3,35

3,35

ICH_SEG2_SDA

ICH_SEG2_SCL

R1423

0-5%

R1422

1 2

0-5%

4

21

ICH_SEG2_800_SDA

ICH_SEG2_800_SCL

V_3P3_SRC

21

R1479

4.7K

NP*

R1478

1 2

1

4.7K

NP*

4

4

2

3

V_3P3_SRC

4

DB800_OE0

4

DB800_OE4

4

DB800_OE5

4
4,31
4,31

x00_sd_051703

SLOT7_PWRGD
SLOT6_PWRGD

21

R111

NP

R100

X

1 2

21

R112

8.2K-5%

NP

21

R101

1K-1%

X

R113

8.2K-5%
1 2

NP

R103

1K-1%

X

1 2

21

R114

8.2K-5%

NP

21

R105

1K-1%

X

4

R115

8.2K-5%
1 2

NP

R107

1K-1%

X

1 2

V_3P3_SRC

8.2K-5%1K-1%

4

V_3P3_SRC

21

R592

+3.3V

1 2

C1114

R996

R591

8.2K-5%
1 2

0.1uF 16V

x00_tj_051203

21

10K-1%

21

R590

8.2K-5%

L108

BLM18BD601SN1

L107

BLM18BD601SN1

R999

10K-1%

1 2

8.2K-5%

21

21

R998

1 2

NP*

1 2

C1111

21

R997

10K-1%

X

C1327

21

0.1uF 16V

0.1uF 16V

NP

R1480

X

10K-1%

1 2

3,5,59

21

C1210

4.7K

x00_sd_051703

10uF 6.3V

1 2

C1110

CK_100M_DB800_N

3

CK_100M_DB800_P

3

ICH_SEG2_800_SCL

4

ICH_SEG2_800_SDA

4

CK_PWRDWN_N

DB800_OE0

4

DB800_OE4

4

DB800_OE5

4
4,31
4,31

SLOT7_PWRGD
SLOT6_PWRGD

1 2

C1109

0.1uF 16V

SRC_BYPASS/PLL

SRC_PLL_LOW_BW

SRC_STOP_N
SRC_DIV2_N

NC_SRC_LOCK

C1108

0.1uF 16V

1 2

0.1uF 16V

1 2

C1112

0.1uF 16V

1 2

C1113

C784

0.1uF 16V
PART_NUMBER=79015

DB800

5

SRC_IN

4

SRC_IN

23

SCLK

24

SDATA

22

BYPASS/PLL

28

PLL_BW

27

SRC_STOP

1

SRC_DIV2

26

PWRDWN

45

LOCK

6

OE_0

14

OE_1

15

OE_2

7

OE_3

43

OE_4

35

OE_5

36

OE_6

44

OE_7

3

GND_3

10

GND_10

18

GND_18

25

GND_25

32

GND_32

40

OE_INV/GND

47

GNDA

ICS9DB108

SMBus address = DCh

21

1000pF

50V-10%

x00_tj_051203

C786

1000pF

1 2

PART_NUMBER=79015

50V-10%

DIF_0
DIF_0

DIF_1
DIF_1

DIF_2
DIF_2

DIF_3
DIF_3

DIF_4
DIF_4

DIF_5
DIF_5

DIF_6
DIF_6

DIF_7
DIF_7

IREF

VDD_2
VDD_11
VDD_19
VDD_31
VDD_39

VDDA

8
9

12
13

16
17

20
21

30
29

34
33

38
37

42
41

46

2
11
19
31
39

48

Note: If clock ordering changes, BIOS requirements must change

V_3P3_SRC

CK_100M_SATA_P_R
CK_100M_SATA_N_R

CK_100M_MCH_P_R
CK_100M_MCH_N_R

CK_100M_PXH_PLANAR_P_R
CK_100M_PXH_PLANAR_N_R

CK_100M_DOBSON_P_R
CK_100M_DOBSON_N_R

CK_100M_PXH_P_R
CK_100M_PXH_N_R

CK_100M_EXP_LAI_P_R
CK_100M_EXP_LAI_N_R

CK_100M_SLOT1_P_R
CK_100M_SLOT1_N_R

CK_100M_SLOT2_P_R
CK_100M_SLOT2_N_R

R1003

1 2

475-1%

V_3P3_SRC

DB800_VDDA

21

0.1uF 16V

C1202

10uF 6.3V

4

4

x00_tj_050103

SUB*_U1084

1 2

ILB_1206

300OHM, 300 mA

C1107

12

L130

IREF = 2.32mA

+3.3V

0.1uF 16V

12

NP

1 2

33-5%

R977

1 2

33-5%

R980

1 2

33-5%

R975

1 2

33-5%

1 2

33-5%

1 2

33-5%

R1368

33-5%

R1370

33-5%

C1106

R976

R973

R971

X

NP

21

21

R978

1 2

X

33-5%

R979

1 2

33-5%

R981

1 2

33-5%

R974

1 2

33-5%

R972

1 2

33-5%

R970

1 2

33-5%

R1369

33-5%

R1371

21

33-5%

2

CK_100M_SATA_P

CK_100M_SATA_N

CK_100M_MCH_P

CK_100M_MCH_N

CK_100M_PXH_PLANAR_P

CK_100M_PXH_PLANAR_N

CK_100M_DOBSON_P

CK_100M_DOBSON_N

CK_100M_PXH_P

CK_100M_PXH_N

CK_100M_EXP_SPARE_P

CK_100M_EXP_SPARE_N

CK_100M_SLOT7_P

21

CK_100M_SLOT7_N

CK_100M_SLOT6_P

CK_100M_SLOT6_N

33

33

17

17

27

27

31

31

31

31

31

31

31

31

31

31

3

R1051

1 2

49.9-1%

R1052

1 2

R1050

1 2

49.9-1%

49.9-1%

R1049

1 2

R1048

1 2

49.9-1%

49.9-1%

R1047

1 2

R1046

1 2

49.9-1%

49.9-1%

R1045

1 2

R1044

1 2

49.9-1%

49.9-1%

R1043

1 2

R1042

1 2

49.9-1%

49.9-1%

R1041

1 2

21

R1434

49.9-1%

R1433

49.9-1%

21

21

R1432

49.9-1%

49.9-1%

21

R1431

49.9-1%

PROPAGATION_DELAY=L:S::500
NET_PHYSICAL_TYPE=50MIL

U1084
300 ohm, 25%, 300mA, 1206

Vishay ILB1206RK301V
KOA CZB2BFL-301P

1U Prod 2U/5U Prod 1U Proto 2U/5U Proto

SATAOE0

XXXX

OE1 MCH

X X X X

OE2

Planar PXH

X X X X

OE3

Dobson

X X

4 4

OE4
OE5

PXH
LAI

X X

ROOM=CLOCK2

X X

OE6

Slot1 ***Note--BIOS should disable for 2U

X X

OE7

Slot2

***Note--BIOS should disable for 2U

DB800 Differential buffer

INC.

ROUND ROCK,TEXAS

TITLE

subsys done

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

DC

REV.

A03-00

SHEET

4 OF 60

1

2

3

5,59

5,59

5,59

5,59

5,59

5,59

46

SYSTEM_PWRGOOD_PXH_R

5

5

5

5

5

5,59

PCI_RST_RAC_N_R

5

PCI_RST_MCH_N_R

5

PCI_RST_PLANAR_N_R

5

PCI_RST_RISER_N_R

5

PCI_RST_BACKPLANE_N_R

5

SHIFTY_RISER_CLK_R

PROPAGATION_DELAY=L:S::2000

SHIFTY_RISER_LATCH_R

PROPAGATION_DELAY=L:S::2000

SHIFTY_RISER_DATA_DN_R

PROPAGATION_DELAY=L:S::2000

SHIFTY_BCKPLN_CLK_R

PROPAGATION_DELAY=L:S::2200

SHIFTY_BCKPLN_LATCH_R

PROPAGATION_DELAY=L:S::2200

SHIFTY_BCKPLN_DATA_DN_R

PROPAGATION_DELAY=L:S::2200

SHIFTY_BMC_CLK_R

5

PROPAGATION_DELAY=L:S::2200

SHIFTY_BMC_LATCH_R

5

PROPAGATION_DELAY=L:S::2200

SHIFTY_BMC_DATA_DN_R

5

PROPAGATION_DELAY=L:S::2200

SHIFTY_BMC_DATA_UP_R

PROPAGATION_DELAY=L:S::2200

PROPAGATION_DELAY=L:S::2000

SYSTEM_PWRGOOD_NIC_R

PROPAGATION_DELAY=L:S::2000

SYSTEM_PWRGOOD_FETS_R

PROPAGATION_DELAY=L:S::2000

SYSTEM_PWRGOOD_BACKPLANE_R

PROPAGATION_DELAY=L:S::2000

SYSTEM_PWRGOOD_RISER_R

PROPAGATION_DELAY=L:S::2000

SYSTEM_PWRGOOD_CHIPSET_R

PROPAGATION_DELAY=L:S::2000

PROPAGATION_DELAY=L:S::2000

PROPAGATION_DELAY=L:S::2000

PROPAGATION_DELAY=L:S::2000

PROPAGATION_DELAY=L:S::2000

PROPAGATION_DELAY=L:S::2000

PCI_RST_PLANAR_N_R

5

PROPAGATION_DELAY=L:S::2000

PCI_RST_PLANAR_N_R

5

PROPAGATION_DELAY=L:S::2000

1 2

x03_GT_012604

1 2

33-5%

33-5%

1 2

33-5%

1 2

33-5%

33-5%

R6016

1 2

33-5%

R6017

1 2

33-5%

R1541

R1542

R1543

R1545

R1544

R1546

R6003

R6004

R6002

R6005

33-5%

1 2

33-5%

1K-5%

1 2

33-5%

33-5%

1 2

33-5%

R1381

R1377

21

R1378

R1379

R1380

21

50V-10%

470pF

33-5%

1 2

33-5%

33-5%

1 2

33-5%

33-5%

1 2

33-5%

33-5%

1 2

33-5%

33-5%

1 2

33-5%

R129

21

R1376

R1353

R1375

R1374

21

R1373

50V-10%

470pF

50V-10%

21

C1345

x03_GT_012604

x03b_GT_012204

PCI_RST_PXH_N

PCI_RST_DEBUG_N

21

SHIFTY_RISER_CLK

SHIFTY_RISER_LATCH

21

SHIFTY_RISER_DATA_DN

SHIFTY_BCKPLN_CLK

21

SHIFTY_BCKPLN_LATCH

SHIFTY_BCKPLN_DATA_DN

21

SHIFTY_BMC_CLK

SHIFTY_BMC_LATCH

21

SHIFTY_BMC_DATA_DN

SHIFTY_BMC_DATA_UP

point-to-point, no cap needed

50V-10%

470pF

21 C900

470pF

21 C1341

point-to-point, no cap needed

point-to-point, no cap needed

50V-10%

470pF

21

C1346

50V-10%

470pF

50V-10%

470pF

21

C1347

50V-10%

21 C1342

21

470pF

C1349

27

58,59

50V-10%

470pF

21 C1343

31

31

31

32

32

32

46

46

46

5

21 C1344

PCI_RST_RAC_N

PCI_RST_MCH_N

PCI_RST_SIO_FWH_N

PCI_RST_RISER_N

PCI_RST_BACKPLANE_N

x02_sd

SYSTEM_PWRGOOD_PXH

SYSTEM_PWRGOOD_NIC

SYSTEM_PWRGOOD_FETS

SYSTEM_PWRGOOD_BACKPLANE

SYSTEM_PWRGOOD_RISER

SYSTEM_PWRGOOD_CHIPSET

50

17

x03b_GT_012204

40,55

31

32

PROG-PART SPEC 14967
DISK PROG
BLANK PART

27,28

24,25

24,35,41

32

31

17,33

B D

todo check ich_pme will be driven or floated high in time

x02_tj_092203

+3.3V_AUX

1K-5%

SYSTEM_PWRGOOD_ESM
SYSTEM_PWRGOOD_NIC_R

5

SYSTEM_PWRGOOD_FETS_R

5

SYSTEM_PWRGOOD_BACKPLANE_R

5

SYSTEM_PWRGOOD_RISER_R

5

SYSTEM_PWRGOOD_CHIPSET_R
SYSTEM_PWRGOOD_PXH_R

5

PCI_RST_MCH_N_R

5

PCI_RST_PLANAR_N_R

5

PCI_RST_RISER_N_R

5

PCI_RST_BACKPLANE_N_R

5

PCI_RST_RAC_N_R

5

BACKPLANE_PRES_N
RISER_PRES_N
SHIFTY_RISER_DATA_UP
CK_FSA

3

SHIFTY_RISER_DATA_DN_R
SHIFTY_RISER_CLK_R
SHIFTY_RISER_LATCH_R
CK_FSB

3

BUF_CK_CPLD

5

CK_33M_CPLD
INTRUSION_COVER_VAUX_N

41

CK_32K_VAUX_SYSCPLD

33

SHIFTY_BMC_DATA_UP

5

SHIFTY_BMC_DATA_DN_R

5

CPLD_DDR2_RESET

3.3VAUX_PWRGOOD

41

H2_PROCHOT_3V

15

H1_PROCHOT_3V

15

H2_THERMTRIP_3V
H1_THERMTRIP_3V
H2_IERR_3V
H1_IERR_3V
ITP_DBR_N

15

SHIFTY_BMC_CLK_R

5

SHIFTY_BMC_LATCH_R

5

ICH_THRMTRIP

5

SHIFTY_BCKPLN_CLK_R
SHIFTY_BCKPLN_LATCH_R
SHIFTY_BCKPLN_DATA_DN_R
SHIFTY_BCKPLN_DATA_UP
5V_PWRGOOD
5V_RISER_PWRGOOD

6

RISER_PWRGOOD
DC2DC_CPUVTT_EN
DC2DC_1V5_EN
DC2DC_1V8_EN
DC2DC_3V3_EN
DC2DC_5V_EN

21

0.1uF 16V

C13

1 2

C14

0.1uF 16V

NC_SC_NC18
NC_SC_NC20
NC_SC_NC31
NC_SC_NC33
NC_SC_NC34
NC_SC_NC42
NC_SC_NC44
NC_SC_NC46
NC_SC_NC48
NC_SC_NC66
NC_SC_NC75
NC_SC_NC106
NC_SC_NC107
NC_SC_NC114

0.1uF 16V
C16

21

P3975SYSTEM_CPLD

P3976
1Y852

x00_sd_051903
x00_sd_051903

just for dumbview
just for dumbview

+3.3V_AUX

22uF 6.3V

C742

21

44,46,50

5,59

5,32,46

5,31

31,59

5,59
5,59
5,59

3,59

x03b_sd

5,59

15,46
15,46
15,46
15,46

5,59
5,59
5,59

32,59

6,59

31,59

6,51,59

6,59
6,59
6,59

6,42,59

0.1uF 16V

1 2

C15

1 2

R1382

1uF 6.3V

21

17
16
15
14
13
12
11
10

9
7
6
5

19
21
22
23
24
25
26
28
30
32
35
38

4
3

2
143
140
138
136
134
133
132
131
130
129

39
40
41
43
45
49
50
51
52
53
54
56
57

18
20
31
33
34
42
44
46
48
66

75
106
107
114

29

36

47

62

72

89

90

99
108
123
144

1uF 6.3V

C277

IO_1_1
IO_1_2
IO_1_3
IO_1_4
IO_1_5
IO_1_6
IO_1_11
IO_1_12
IO_1_13
IO_1_14
IO_1_15_GTS1
IO_1_16_GTS0

IO_2_1
IO_2_2
IO_2_3
IO_2_4
IO_2_5
IO_2_6
IO_2_11
IO_2_12
IO_2_13_GCK0
IO_2_14_GCK1
IO_2_15_CDRST
IO_2_16_GCK2

IO_3_1
IO_3_2_GTS3
IO_3_3_GTS2
IO_3_4_GSR
IO_3_5
IO_3_6
IO_3_7
IO_3_11
IO_3_12
IO_3_13
IO_3_14
IO_3_15
IO_3_16

IO_4_1_DGE
IO_4_2
IO_4_3
IO_4_4
IO_4_5
IO_4_6
IO_4_7
IO_4_11
IO_4_12
IO_4_13
IO_4_14
IO_4_15
IO_4_16

NC_18
NC_20
NC_31
NC_33
NC_34
NC_42
NC_44
NC_46
NC_48
NC_66
NC_75
NC_106
NC_107
NC_114

GND_29
GND_36
GND_47
GND_62
GND_72
GND_89
GND_90
GND_99
GND_108
GND_123
GND_144

1uF 6.3V

1 2

C278

21

1uF 6.3V

C279

SYSTEM_CPLD

XC2C128 TQFP144

SUB*_P3975

256 macrocell flavor

1 2

C659

IO_5_1
IO_5_2
IO_5_3
IO_5_4
IO_5_5
IO_5_6

IO_5_7
IO_5_11
IO_5_12
IO_5_13
IO_5_14
IO_5_15
IO_5_16

IO_6_1

IO_6_2

IO_6_3

IO_6_4

IO_6_5

IO_6_6
IO_6_11
IO_6_12
IO_6_13
IO_6_14
IO_6_15
IO_6_16

IO_7_1

IO_7_2

IO_7_3

IO_7_4

IO_7_5

IO_7_6

IO_7_7
IO_7_11
IO_7_12
IO_7_13
IO_7_14
IO_7_15
IO_7_16

IO_8_1

IO_8_2

IO_8_3

IO_8_4

IO_8_5

IO_8_6
IO_8_11
IO_8_12
IO_8_13
IO_8_14
IO_8_15
IO_8_16

TCK
TDI
TDO
TMS

VCC_JTAG

VCC_1
VCC_37
VCC_84

VCCIO1_27
VCCIO1_55
VCCIO1_73
VCCIO1_93

VCCIO2_109
VCCIO2_127
VCCIO2_141

NC_135
NC_137
NC_139
NC_142

94
95
96
97
98
100
101
102
103
104
105
110
111

92
91
88
87
86
85
83
82
81
80
79
78

112
113
115
116
117
118
119
120
121
124
125
126
128

77
76
74
71
70
69
68
64
61
60
59
58

67
63
122
65
8

1
37
84

27
55
73
93

109
127
141

135
137
139
142

CPLD_TCK
CPLD_TDI
CPLD_TD1
CPLD_TMS

NC_SC_NC135
NC_SC_NC137
NC_SC_NC139
NC_SC_NC142

PS1_PWRGOOD

PS2_PWRGOOD
DEBUG_JUMPER_1
DEBUG_JUMPER_0

DEBUG_LED_3

DEBUG_LED_2

DEBUG_LED_1

DEBUG_LED_0

ICH_PWRBTN_N

ICH_PME_N

PFAULT_LATCH_N_R

PFAULT_RESET

RISER_EXP_PME_N

VRD1_THERMTRIP_N

PCI_RST_ICH_N

VCORE_EN_R VCORE_EN
VCORE1_PWRGOOD
VCORE2_PWRGOOD
CPLD_H_FORCEPR

VRD2_THERMTRIP_N

ICH_PWR_ON_REQ

RESET_BTN_N
PS1_ENABLE_N
PS2_ENABLE_N

B_1U_2U5U

LPC_LFRAME_N

LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0

CPLD_H_VID_PWRGOOD_N

PME_NIC_CPLD_N

H2_CPU_PRES_N
H1_CPU_PRES_N

H2_VTT_EN
H1_VTT_EN

RISER_PCI_PME_N

CK_VTT_PWRGD_N

DC2DC_5V_RISER_EN

H1_BSEL0_3V_N
H1_BSEL1_3V_N
H2_BSEL0_3V_N
H2_BSEL1_3V_N

CPU_VTT_PWRGOOD

1V5_PWRGOOD

1V8_PWRGOOD

3V3_PWRGOOD

CK_PWRDWN_N

5,40,46
5,40
46
5,31,32,40,46

CA

44,46

31,59
31,59
59
59
59
59
59
59
33,41,44,56,59
33
5
5

x03b_sd

31

9,46
33,59

7,59
8,59
5
9,46
33,40,41,44,59
56
31,59
31,59

33,40,44,55,59
33,40,44,55,59
33,40,44,55,59
33,40,44,55,59
33,40,44,55,59
5,59
28
5,12,46
5,12,46
5,12
5,12
31
3,59

6

15
15
15
15
6,51
6,59
6,59
6,59
3,4,59

33-5%

x02_sd

x03b_sd

+3.3V_AUX

+3.3V_AUX

PFAULT_LATCH_N_R

5

x00_sd_52903 - removed 2 leds

1 2

R1790

1 2

21

R1791

PROPAGATION_DELAY=L:S::2000

PFAULT_RESET_R

PROPAGATION_DELAY=L:S::2500

21

R1865

+3.3V_AUX

1 2

8.2K-5%

8.2K-5%

R1920

0-5%

R1921

0-5%

2

8.2K-5%8.2K-5%

NP*

NP*

R1769

R1770

21

1 2

NP*

21

NP*

GND

TPS72118DBV

7,8,59

NP13

NP02

R6021

0-5%

+3.3V

1 2

33-5%

U64

x02_sd

1 2

ICH_THRMTRIP

5

X04_GT_032904

I2C_SEG2_VAUX_SDA
I2C_SEG2_VAUX_SCL

R1922

51

OUTIN

43

NCEN

R6006

33-5%
R6007

21

33-5%

21

C559

1000pF

PART_NUMBER=79015

SHUNT_1V5_N

NET_PHYSICAL_TYPE=PWR

+1.8V_AUX

0.1uF 16V
C1624

21

PFAULT_LATCH_N

+3.3V_AUX

142U38

1

R575

1 2

100-1%

50V-10%

1 2

2.7K-5%

28

44,45,59
44,45,59

10V-10%

1uF

21

PFAULT_RESET

R92

0.1uF 16V

C1625

21

44,46

5

Q104

3904

1

C1626

+3.3V_AUX

CK_CPLD

3

RC = 0.1 us

F = 2.0MHz

ICH_THRMTRIP_N

3

2

todo....need to check that 3904 has drive strength and gain

x00_tj_042803

5,12,46
5,12,46

5,12
5,12

ROOM=SYSCPLD

144U38

VHC14VHC14

5,59

5,59

H2_CPU_PRES_N
H1_CPU_PRES_N
H2_VTT_EN
H1_VTT_EN

CPLD_H_VID_PWRGOOD_N

CPLD_H_FORCEPR

5

BUF_CK_CPLD

CPLD_DDR2_RESET

33

+3.3V_AUX

7

8

RN87

2

1

12-16-2004_19:50

1

5

todo, consider slew rate limiting

+1.8V

1 2

R1439

1 2

2.7K-5%

R1438

2.7K-5%

R426

1 2

2.7K-5%

301-1%

Q66

3904

1

R583

21

2.7K-5%

Q65

3904

21

1

Q84

3904

1

3

2

3

2

3

2

R1359

301-1%

Q11

3904

1

H_VTT_PWRGOOD

+1.8V

R1

21

3

2

H_FORCEPR_N

DDR2_RESET_N_1

DDR2_RESET_N_2

12

+3.3V_AUX

20,21

20,21

2

11,12

3

5

6

4.7K

21

R1835

4.7K

4.7K

4

3

5,32,46

5,31

BACKPLANE_PRES_N
RISER_PRES_N

x00_sd_052203
x00_tj_052903

R1834

1 2

+3.3V_AUX

J14

1

5,40,46
5,32,40

5,40

4 4

5,31,32,40,46

CPLD_TCK
CPLD_TDO
CPLD_TDI
CPLD_TMS

2
3
4
5
6

SIO

Header

CPLD_TDI CPLD_TD1 CPLD_TD2

CPLD JTAG Chain

Planar ESM Riser Backplane

CPLD_TD3

Gated by ~SPG Gated by ~SPG

Jumper

NP*

CPLD_TD0

CPLD_BYPASS

p/u for TCK at SIO

31,46

CPLD_TD2

1 2

NP*

CPLD_TDO

5,32,40

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL

subsys done

AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

5 OF 60

A B

DC

B D

CA

12-16-2004_19:51

1

2

TYPE
INPUT
OUTPUT
DESTINATION

ROOM=DC2DC_1P8V

+12V

R73

8.2K-5%

1 2

C1805

12

+

1V8_PWRGOOD

1 2

0.1uF 16V

270uF

16V-20%

R132

1 2

+12V

+

2 1

X04_GT_031904

+1.8V

3.01K-1%

C606

270uF

16V-20%

5,59

Enable is driven to required state
from CPLD at all times.

C605

70W VERTICAL
+12V
+1.8V
DDR II, MCH

+1.8V DC2DC

x04_tj_031904

SUB=SUB*_0K260

R290

1 2

422-1%

442-1%

DC2DC_1V8_EN

C588

NP

1 2

R463

1 2

0-5%

R546

0-5%

5,59

R547

0-5%

1 2

NC_DC2DC_1P8V_2

+1.8V

21

1000pF

50V-10%

PART_NUMBER=79015

+12V

DC2DC_1P8V

1

+RS

2

RSVD

3

-RS

4

PWRGD

5

PWRGD_SET

K

7

VSS_0

8

VSS_1

9

OUTEN

10

-SENCE

11

+SENSE

12

12V_IN_0

13

12V_IN_1

14

12V_IN_2

15

VOUT_0

16

VOUT_1

17

VSS_2

18

VOUT_2

19

VSS_3

20

VOUT_3

21

VSS_4

22

VOUT_4

23

VSS_5

24

VOUT_5

MH1

GND_MH1

MH2

GND_MH2

DC/DC CONVERTER

MOD., 24 PIN, 72W, VERTICAL

x00_gt_062603

+1.8V

16V-10%

4.7uF

21

+1.8V

12

C268

C600

+

16V-10%

4.7uF

680uF

6.3V-20%

C601

21

C269

25V-20%

.1uF

21

x00_tj_051203

x02_tj_121503

12

+

680uF

C611

C270

6.3V-20%

TYPE
INPUT
OUTPUT
DESTINATION

ROOM=DC2DC_3P3V

100W HORIZONTAL
+12V
+3.3V
RISER's

TYPE
INPUT
OUTPUT
DESTINATION

ROOM=DC2DC_5V

+12V

100W VERTICAL
+12V
+5V
BACKPLANE

+5V DC2DC

1

DC2DC_5V

+RS

K

-RS
PWRGD
RSVD_1
RSVD_2
VSS_0
VSS_1
OUTEN

-SENCE
+SENSE
12V_IN_0
12V_IN_1
12V_IN_2
VOUT_0
VOUT_1
VSS_2
VOUT_2
VSS_3
VOUT_3
VSS_4
VOUT_4
VSS_5
VOUT_5

GND_MH1
GND_MH2

DC/DC CONVERTER

MOD. 073_20821_03

VCC

16V-10%

4.7uF

VCC

C271

VCC

NP

C604

21

12

+

DC2DC_5V_1U

16V-10%

4.7uF

680uF

6.3V-20%

x00_tj_051203

25V-20%

C607

.1uF

21

12

+

C272

C620

21

680uF

6.3V-20%

2

+12V

R74

8.2K-5%

1 2

todo should this really be NC? -shawn

5,6,59

X04_GT_031904

3V3_PWRGOOD

R133

3.01K-1%

1 2

3P3V_RISER_SENSE

31

x00_sd_051703

Enable is driven to required state
from CPLD at all times.

RISER

+3.3V DC2DC

R1572

1 2

21.5K-1%

+3.3V

5,59

R1580

21

2-1%

R1430

1 2

2-1%

+3.3V

DC2DC_3V3_EN

21

R301

0-5%

NC_DC2DC_3P3V_6

+3.3V

C1501

1 2

1000pF

50V-10%

PART_NUMBER=79015

NP

R1488

10K-1%

21

+12V

DC2DC_3P3V

1

+RS

K

3

-RS

4

PWRGD

5

PWRGD_SET

6

RESERVED

7

VSS_7

8

VSS_8

9

OUTEN

10

-SENSE

11

+SENSE

12

12VIN_12

13

12VIN_13

14

12VIN_14

15

VCC_15

16

VCC_16

17

VSS_17

18

VCC_18

19

VSS_19

20

VCC_20

21

VSS_21

22

VCC_22

23

VSS_23

24

VCC_24

100W-25A DC-DC

MOD.-25 pin, HORIZONTAL

+3.3V

16V-10%

4.7uF

21

C602

16V-10%

4.7uF

21

25V-20%

C603

x00_tj_051203

.1uF

C619

21

X04_GT_031904

5,6,59

X04_GT_031904

SENSE_5V_BACKPLANE_1U

32

SENSE_5V_BACKPLANE_2U5U

32

VCC

1 2

5V_PWRGOOD

R1752

20-1%

R562

0-5%

R75

1 2

Enable is driven to required state
from CPLD at all times.

R134

1.5K-5% 4.75K-1%

1 2

x03b_sd

NP13

R1750

1 2

0-5%

R1751

1 2

20-1%

R273

0-5%

21

511-1%

VCC

1 2

R274

10K-1%

21

x03_sd_sense

21

R275

5,6,42,59

NP*

DC2DC_5V_SENSE_GND

R462

12

0-5%

NC_DC2DC_5V_6

DC2DC_5V_EN

DC2DC_5V_SENSE_GND

6

DC2DC_5V_SENSE

6

C590

NP

DC2DC_5V_SENSE

21

1000pF

6

6

R466

1 2

0-5%

VCC

50V-10%

+12V

1

3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

MH1
MH2

SUB=SUB*_G6740

BACKPLANE

1

VCC_1

+12V

U24

+12V

1 2

C1627

12

+

680uF

6.3V-20%

C1568

+

270uF

2 1

16V-20%

X00_GT_052203

0.1uF 16V

VCC

GND

DS1818

2

RESET

3

SUB=SUB*_Y1351

1

3V3_PWRGOOD

5,6,59

+3.3V

4V-20%

820uF

x04b_tj_032404

12

+

1 2

C287

+

4V-20%

820uF

+

1 2

C288

C610

270uF

16V-20%

1 2

C1650

0.1uF 16V

Sub to DS1811R-5 (+5V, 5% part)

DS1818

2

VCC

GND

3

U59

RESET

1

SUB=SUB*_1F826

5V_PWRGOOD

5,6,59

NP

R1848

X

1 2

5,6,42,59

5,6,59

309-1%

+12V

DC2DC_5V_EN

5V_PWRGOOD

NP

R1849

1 2

X

0-5%

2

VCC_2

3

VCC_3

4

TRIM

5

OUTEN

6

PWRGD

7

VSS_7

8

VSS_8

9

PWRGD_SET

10

X

12VIN_10

11

12VIN_11

40W-15A DC-DC

SIP11

X00_GT_061203

3

TYPE
INPUT
OUTPUT
DESTINATION

ROOM=DC2DC_CPU_VTT

Enable is driven to required state
from CPLD at all times.

+12V

NP

R1137

X

1 2

CPU_VTT_PWRGOOD

NP

R1148

X

1 2

ECAD: Place 1 560uF cap by each CPU

+12V

NP

16V-20%

270uF

5,51

x04b_tj_032404

1 2

C138

+

40W VERTICAL
+12V
+1.2V
CPU1, CPU2, MCH

8.2K-5%2.7K-5%

5,51,59

DC2DC_CPUVTT_EN

NP*

R543

1 2

x02_tj_091903

+12V

27.4K-1%

& one by regulator

+CPU_VTT

CPU VTT

R225

NP*

1 2

26.7-1%

X

NP

DC2DC_CPUVTT

1

VCC_1

2

VCC_2

3

VCC_3

4

TRIM

5

OUTEN

6

PWRGD

7

VSS_7

8

VSS_8

9

PWRGD_SET

10

X

12VIN_10

11

12VIN_11

40W-15A DC-DC

SIP11

+CPU_VTT

.1uF

C349

2 1

+

2 1

10V-10%

+CPU_VTT

16V-10%

C591

560uF

4V-20%

4.7uF

21

C350

C608

+

2 1

560uF

4V-20%

TYPE

40W HORIZONTAL
INPUT +12V
OUTPUT
DESTINATION

+1.5V

MCH, ICH5

ROOM=DC2DC_1P5V

Enable is driven to required state
from CPLD at all times.

+12V

R77

8.2K-5%

1 2

5,59

1V5_PWRGOOD

R136

3.01K-1%

1 2

Substitute from 3.92K to 3.74K to tweak 1.5V to 1.514V

x03_tj_010904
x03b_tj_012604

+12V

16V-20%

270uF

5,59

X04_GT_031904

1 2

+

C1566

DC2DC_1V5_EN

R70

1 2

+12V

3.74K-1%

+1.5V DC2DC

+1.5V

R1489

21

26.7K-1%

SUB*_5N443

Substitute 26.1K, 1%

DC2DC_1P5V

1

VCC_1

2

VCC_2

3

VCC_3

4

TRIM

5

OUTEN

6

PWRGD

7

VSS_7

8

VSS_8

9

PWRGD_SET

10

12VIN_10

11

12VIN_11

40W-15A DC-DC

MOD.-13 pin, HORIZONTAL

+1.5V

4V-20%

820uF

TYPE
INPUT
OUTPUT
DESTINATION

40W HORIZONTAL
+12V
+5V
MCH, ICH5

ROOM=DC2DC_RISER5V

5V DC2DC

Enable is driven to required state

+5.0V Riser

from CPLD at all times.

U34

+5.0V Riser

+12V

DC2DC_RISER5V

1 2

C1651

X04_GT_031904

5,6

+12V

16V-20%

270uF

+

1 2

C1497

+

10V-10%

.1uF

2 1

16V-10%

C1575

4.7uF

C1585

21

5V_RISER_PWRGOOD

X04_GT_031904

1 2

C1569

R76

1 2

5

R135

1 2

4.75K-1%

DC2DC_5V_RISER_EN

1.5K-5%

R32

+12V

309-1%

1 2

R106

1 2

0-5%

1

VCC_1

2

VCC_2

3

VCC_3

4

TRIM

5

OUTEN

6

PWRGD

7

VSS_7

8

VSS_8

9

PWRGD_SET

10

12VIN_10

11

12VIN_11

40W-15A DC-DC

MOD.-13 pin, HORIZONTAL

Sub to DS1811R-5 (+5V, 5% part)

0.1uF 16V

VCC

GND

DS1818

2

3

RESET

+5.0V Riser

1

5V_RISER_PWRGOOD

SUB=SUB*_1F826

12

+

C633

680uF

6.3V-20%

10V-10%

.1uF

2 1

16V-10%

C1576

5,6

4.7uF

C1586

21

3

4 4

INC.

ROUND ROCK,TEXAS

TITLE

DC2DC REGULATORS

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL

subsys done

AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

A B

DWG NO.

DATE

DC

D1660

12/16/2004

REV.

A03-00

SHEET

6 OF 60

B D

+12V +12V

SUB=SUB*_J9621

CA

12-16-2004_20:22

SUB=SUB*_J9621

1

7

7

VRD BOM Changes:

X02_TJ_081803

VRD1_PWM3A

VRD1_PWM4A

+3.3V

8.2K-5%
R4502

21

X02_TJ_081803

VCORE1_PWRGOOD

21

R1972

220K

21

R1973

VRD1_VCC

220K

5,7,59

7

X03_GT_011804

X02_TJ_110503

x00c4_tj_090804

SUB*_16155

Q86

3

FT2N7002LT1

1

2

7
7

SUB=SUB*_G7300

5.1-5%

2 1

R260

R1985

1 2

1K-5%

1N914

2-1%

VRD1_PWM1A

DRV1_OD

.22uF 25V

20%

X03_GT_012604

1 3

D9

R240

21

1
2
3
4

C484

21

.22uF 25V

20%

BST
IN
OD
VCC

Phase 1

ROOM = VRD1_PHASE1

1 2

50V-10%

C491

VRD1_DRV1

ADP3418

VRD1_PHASE1B_SENSE

7

x03_sd

1000pF

C852

NP*

21

C466

21

.1uF

25V-20%

8

DRVH

7

SW

6

PGND

5

DRVL

R433

VRD1_UGATE1

VRD1_LGATE1

4.7K

1 2

R451

1 2

4.7K

Q41

4

3

2

1

9

G

S

FDS7096N3

SUB*_N1930

D

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

Q21

4

3

2

1

9

D

G

S

NC

FDS7066SN3

SUB*_T1564

25V-20%

.1uF

21

.22uF 25V

1 2

20%

5

6

7

8

PKG_TYPE=SO8_P9DR_FRCHLD

C488

25V-20%

C1680

.1uF

16V-10%

4.7uF

C1682

21

21

C1681

Q24

4

3

2

1

9

G

S

FDS7096N3

SUB*_N1930

Q20

4

3

2

1

FDS7066SN3

D

G

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

9

D

S

SUB*_T1564

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

.22uF 25V

20%

25V-20%

.1uF

C489

21

A03_121704_GT

C1683

21

25V-20%

.1uF

C336

16V-10%

4.7uF

C1684

21

SUB*_16155

12

16V-10%

+

560uF

4V-20%

4.7uF

2 1

C303

X02_TJ_110503

Q88

3

FT2N7002LT1

1

2

R1986

1 2

1K-5%

Phase 2

ROOM = VRD1_PHASE2

VRD1_PHASE2B_SENSE

7

A03_121704_GT

C343

16V-10%

12

+

560uF

4V-20%

4.7uF

2 1

C308

X03_GT_012604

21

C1685

+CPU_VID1

0.6uH, 27Amp

Q36

9

D

G

S

NC

5

6

7

8

20%

16V-10%

.22uF 25V

1 2

C581

4.7uF

2 1

C1686

25V-20%

.1uF

25V-20%

.1uF

2 1

C1687

2 1

C1688

SUB=SUB*_N1453

1N914

.22uF 25V

1 2

20%

1 3

D11

C579

C471

50V-10%

1000pF

21

x03_sd

C853

NP*

4

3

2

1

21

FDS7096N3

L3

2-1%

12

7
7

R244

21

VRD1_PWM2A

DRV1_OD

1

BST

2

IN

3

OD

4

VCC

.1uF

25V-20%

VRD1_PHASE2

DRVH

SW
PGND
DRVL

SUB*_N1930

PKG_TYPE=SO8_P9DR_FRCHLD

8
7
6
5

Q27

4

3

2

1

9

G

S

FDS7096N3

SUB*_N1930

D

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

.22uF 25V

20%

16V-10%

C580

21

4.7uF

2 1

C1689

25V-20%

.1uF

25V-20%

.1uF

2 1

C1690

2 1

C1691

1

+CPU_VID1

L2

0.6uH, 27Amp

1 2

SUB=SUB*_N1453

SUB=SUB*_G7300

ADP3418

Q26

4

3

2

1

9

D

G

S

FDS7066SN3

SUB*_T1564

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

R163

C281

3-5%

1 2

1 2

.001UF

50V-10%

R152

C276

Q37

4

3

2

3-5%

VRD1_LGATE2

5.1-5%

1 2

2 1

1

R258

.22uF 25V

1 2

.001UF

50V-10%

20%

C482

21

R434

1 2

4.7K

R454

1 2

4.7K

FDS7066SN3

9

D

G

S

SUB*_T1564

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

+12V

+12V

SUB=SUB*_J9621

SUB=SUB*_J9621

2

DRV1_OD_R

7

PWM Control Circuitry

ROOM = VRD1_CTRL

X04_GT_031904

H1_VSSSENSE

12

VRD1_VSSSENSE_MID

3

x00_sd_061603 - providing sensing

0-5%

R1851

21

SUB=SUB*_4053P

SUB=SUB*_75EEC

R304

1 2

1K-5%

DRV1_OD_R

7

X04_GT_031904

C1728

1 2

5,8,59

R1820

1 2

0-5%

VRD1_VSSSENSE

50V-10%

1000pF

1uF

25V-10%

VCORE_EN

C1727

21

R1980

220K

100-5%

X03_GT_011804

21

C1807

1 2

R1846

21

5,7,59

DRV1_OD

x03b_GT_012204

27pF

50V-10%

21

C462

VCORE1_PWRGOOD

.1uF

7

25V-20%

15

7

11

10

12

VRD1_VCC

EN

PWRGD

ILIMIT

DELAY

X02_TJ_110503

VRD1_CTRL

SUB*_16155

+12V

1 2

10-5%

RAMPADJ

R13

VCC

RT

PWM1

Q87

3

FT2N7002LT1

2

28

14
13

27
26

1

7
7

5.1-5%

2 1

R261

1 2

487K-1%

R271

VRD1_PWM1A

VRD1_PWM2A

R1987

1 2

1K-5%

X03_GT_012604

1 3

1N914

1 2

2-1%

VRD1_PWM3A

DRV1_OD

R299

1 2

200K-1%

.22uF 25V

20%

D7

R243

SUB=SUB*_G7300

16V-10%

.47uF

21

7

50V-10%

C490

21

C467

.1uF

25V-20%

VRD1_DRV3

C9

Phase 3

ROOM = VRD1_PHASE3

x03_sd

1000pF

21

1
2
3
4

C854

NP*

21

VRD1_PHASE3B_SENSE

7

BST
IN
OD
VCC

DRVH

SW
PGND
DRVL

ADP3418

.22uF 25V

1 2

20%

C483

X00_GT_062103
Redraw Only- NEED INDEPENDENT CHECK before MODEM!

A03_121704_GT

C338

12

+

16V-10%

4.7uF

2 1

C305

A03_121704_GT

C337

SUB*_16155

12

+

X02_TJ_110503

560uF

4V-20%

Q89

3

FT2N7002LT1

1

2

R1988

1 2

1K-5%

Phase 4

ROOM = VRD1_PHASE4

VRD1_PHASE4B_SENSE

7

X03_GT_012604

.22uF 25V

Q38

4

3

2

1

9

D

G

S

NC

5

6

7

8

.22uF 25V

16V-10%

1 2

20%

4.7uF

C481

2 1

C1692

25V-20%

.1uF

25V-20%

2 1

C1693

.1uF

2 1

C1694

FDS7096N3

SUB*_N1930

PKG_TYPE=SO8_P9DR_FRCHLD

8

VRD1_UGATE3

Redraw Only- NEED INDEPENDENT CHECK before MODEM!

Q39

4

3

2

1

9

G

S

FDS7096N3

D

SUB*_N1930

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

.22uF 25V

20%

16V-10%

C487

21

4.7uF

2 1

C1695

25V-20%

.1uF

25V-20%

2 1

C1696

.1uF

2 1

C1697

+CPU_VID1

L1

1 2

SUB=SUB*_N1453

0.6uH, 27Amp

1N914

D10

31

1 2

7
7

2-1%

VRD1_PWM4A

DRV1_OD

R236

SUB=SUB*_G7300

20%

1

VRD1_UGATE4

BST

2

IN

3

OD

4

VCC

21

7

50V-10%

C578

C465

1 2

.1uF

25V-20%

VRD1_DRV4

ADP3418

1000pF

21

DRVH

PGND
DRVL

C855

x03_sd

SW

NP*

8
7
6
5

VRD1_LGATE4

6
5

VRD1_LGATE3

R457

1 2

4.7K

R437

4.7K

1 2

Q40

4

3

2

1

9

D

G

S

FDS7066SN3

SUB*_T1564

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

Q25

4

3

2

1

9

D

G

S

FDS7066SN3

SUB*_T1564

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

R171

C282

5.1-5%

12

R257

3-5%

1 2

21

.001UF

50V-10%

.22uF 25V

20%

C8

21

21

R430

4.7K

21

R428

4.7K

Q34

4

3

2

1

9

G

S

FDS7096N3

SUB*_N1930

D

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

4

3

2

1

FDS7066SN3

.22uF 25V

20%

Q33

G

SUB*_T1564

16V-10%

1 2

9

D

S

NC

PKG_TYPE=SO8_P9DR_FRCHLD

4.7uF

C485

5

6

7

8

2 1

C1698

25V-20%

.1uF

25V-20%

.1uF

C1699

12

C1700

12

Q35

4

3

2

1

9

G

S

FDS7096N3

SUB*_N1930

D

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

Q32

4

3

2

1

9

D

G

S

NC

FDS7066SN3

SUB*_T1564

16V-10%

4.7uF

.22uF 25V

20%

C486

21

5

6

7

8

PKG_TYPE=SO8_P9DR_FRCHLD

2 1

C1701

25V-20%

.1uF

25V-20%

.1uF

C1702

12

C1703

12

FDS7066N3 is local. Waiting on library symbol.

16V-10%

560uF

4V-20%

2 1

4.7uF

C302

+CPU_VID1

L4

1 2

21

R153

21

C280

SUB=SUB*_N1453

0.6uH, 27Amp

3-5%

.001UF

50V-10%

2

3

VID Termination

R303

0-5%

75K-1%

1 2

4700pF

7
7
7

1 2

21

75K-1%

R291

21

X04_GT_031904

C710

1 2

29.4K-1%

R306

1 2

0-5%15.8K-1%

R315

0-5%

R85

75K-1%

R286

21

X04_GT_031904

R314

21

0-5%

75K-1%

R284

21

R81

75K-1%

X04_GT_031904

R285

21

NP

21

VRD1_PHASE1B_SENSE

VRD1_PHASE2B_SENSE

VRD1_PHASE3B_SENSE

VRD1_PHASE4B_SENSE

X04_GT_031904

3

D

1

X

2

G

S

7

VRD1_PWM1A

7

7

7

+CPU_VID1

7

X04_GT_032204

1 2

C6007

.01uF 16V

R407

1 2

0-5%

C334

NP

1 2

21

X

X

ALT_LLINE

7,8

2N7002

NP

Q7

.047uF

16V-10%

R484

4.7K

If this FET is populated, you must verify Vgs(th) is met!

X03_GT_011904

R1717

NP

1 2

68K-5%

R1718

NP

68K-5%

GPO_ALT_LLINE_N

33

X

21

X

VRD1_PWM3A

VRD1_PWM4A

U61

7

7

+3.3V_AUX

14

13

VHC14

x00_sd_052903

12

ALT_LLINE

7,8

x04b_tj_032404

Input Filtering

+12V

A03_121704_GT

SUB=SUB*_J9621

C582

12

C725

12

+

560uF

x04b_tj_032404

4V-20%

C2

.1uF

1 2

50V-20%

+

270uF

16V-20%

C3

21

.1uF

SUB=SUB*_4053P

50V-20%

C21

1uF

1 2

25V-10%

C12

1 2

SUB=SUB*_4053P

INTEGRATED VRD 10.1 VOLTAGE

REGULATOR FOR PROC_1

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

1uF

25V-10%

+CPU_VTT

R28

1 2

499-1%

R27

1 2

499-1%

R26

1 2

499-1%

R25

1 2

499-1%

R16

1 2

499-1%

R15

1 2

499-1%

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

SHEET

H1_VID0

H1_VID1

H1_VID2

H1_VID3

H1_VID4

H1_VID5

7 OF 60

7,12

7,12

7,12

7,12

7,12

7,12

REV.

A03-00

CSSUM
CSREF

CSCOMP

300-5%

NP

50V-10%

1000pF

X

PWM2

25

PWM3

24

PWM4

23

SW1

22

SW2

21

SW3

20

SW4

17
16
18

8

FB

X04_GT_031904

NP

C1810

100-5%

21

X

50V-10%

1 2

R1992

VRD1_PWM3A

VRD1_PWM4A

R310

1 2

0-5%

1 2

2700pF

SUB*_1U388

R147

C720

50V-10%

21

THERMISTOR

.047uF 25V

1 2

20%

C714

4 4

+CPU_VID1

1 2

249K-1%

R255

1 2

127K-1%

R233

X04_GT_031904

7,12
7,12
7,12
7,12
7,12
7,12

C300

100pF 50V

R250

2 1

10.7K-1% 680pF 50V

X04_GT_031904

H1_VID0

H1_VID1

H1_VID2

H1_VID3

H1_VID4

H1_VID5

12

X04_GT_031904

100K-1%

21

C708

12

VRD1_VSSSENSE

R289

NP*

X04_GT_032204

NP

(1.33K)

SUB=NP

9

COMP

7

FBRTN

5

VID0

4

VID1

3

VID2

2

VID3

1

VID4

6

VID5

19

GND

C479

12

680pF 50V

R278

1 2

1.3K-1%

R288

1 2

ADP3168

SUB*_H5002

X04_GT_031904

X

NP

R305

X

X04_GT_031904

SUB*_X5828

1 2

R311

X

12

H1_VCCSENSE

1 2

1K-5%

R1821

1 2

VRD1_VCCSENSE

X04_GT_031904

100K-1%

R6019

1 2

0-5% 0-5%

X04_GT_031904

X04_GT_031904

A B

DC

+12V

B D

CA

SUB=SUB*_J9621

1

8

8

VRD BOM Changes:

VRD2_PWM3A

VRD2_PWM4A

+3.3V

8.2K-5%

X02_TJ_081803

R1970

R4503

21

21

220K

X02_TJ_081803

21

R1971

VRD2_VCC

220K

+12V

Q92

3

FT2N7002LT1

2

SUB=SUB*_J9621

A03_121704_GT

C440

C1715

12

+

Phase 2

R1990

1

1 2

1K-5%

X03_GT_012604

VRD2_PHASE2B_SENSE

8

.22uF 25V

20%

1 3

1N914

2-1%

D38

R249

ROOM = VRD2_PHASE2

x03_sd

C857

NP*

21

1 2

50V-10%

C650

C478

.1uF

25V-20%

1000pF

Q52

4

3

2

1

9

G

S

FDS7096N3

SUB*_N1930

D

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

.22uF 25V

20%

16V-10%

1 2

C652

4.7uF

2 1

C1710

25V-20%

.1uF

25V-20%

.1uF

2 1

C1711

2 1

C1712

Q47

4

3

2

1

9

G

S

FDS7096N3

SUB*_N1930

D

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

.22uF 25V

20%

21

16V-10%

4.7uF

C651

2 1

C1713

25V-20%

.1uF

25V-20%

.1uF

2 1

C1714

2 1

560uF

4V-20%

16V-10%

4.7uF

2 1

+CPU_VID2

C333

1

.1uF

C1708

A03_121704_GT

2 1

C1709

12

+

C344

+CPU_VID2

0.6uH, 27Amp

16V-10%

560uF

4V-20%

12

4.7uF

L17

2 1

C326

SUB=SUB*_N1453

SUB*_16155

X02_TJ_110503

Q90

SUB*_16155

X02_TJ_110503

8

3

FT2N7002LT1

1

2

R1989

1 2

1K-5%

1N914

2-1%

VRD2_PWM1A

X03_GT_012604

8

1 3

D25

20%

R247

21

1

BST

2

ROOM = VRD2_PHASE1

VRD2_PHASE1B_SENSE

.22uF 25V

1 2

VRD2_DRV1

C648

50V-10%

1000pF

DRVH

Phase 1

x03_sd

C856

NP*

21

C476

21

.1uF

25V-20%

8

VRD2_UGATE1

7

Q70

4

3

2

1

9

G

S

FDS7096N3

SUB*_N1930

D

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

.22uF 25V

20%

16V-10%

1 2

C624

4.7uF

2 1

C1704

25V-20%

.1uF

25V-20%

.1uF

2 1

C1705

2 1

C1706

Q44

4

3

2

1

9

G

S

FDS7096N3

D

SUB*_N1930

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

.22uF 25V

20%

16V-10%

1 2

C646

4.7uF

2 1

C1707

25V-20%

.1uF

25V-20%

2 1

L16

x00c4_tj_090804

8

DRV2_OD

8

SUB=SUB*_G7300

5.1-5%

2 1

R264

.22uF 25V

20%

C599

21

IN

3

OD

4

VCC

ADP3418

SW
PGND
DRVL

6
5

VRD2_LGATE1

Q43

4

3

2

1

9

D

G

S

NC

5

6

7

8

FDS7066SN3

SUB*_T1564

Q42

4

3

2

1

9

D

G

S

FDS7066SN3

SUB*_T1564

NC

5

6

7

8

R172

3-5%

1 2

5.1-5%

2 1

PKG_TYPE=SO8_P9DR_FRCHLD

C283

1 2

R263

.001UF

50V-10%

R487

1 2

4.7K

R494

1 2

4.7K

PKG_TYPE=SO8_P9DR_FRCHLD

21

VRD2_PWM2A

8

DRV2_OD

8

SUB=SUB*_G7300

.22uF 25V

20%

C595

21

VRD2_DRV2

1

BST

2

IN

3

OD

4

VCC

ADP3418

DRVH

SW
PGND
DRVL

8
7
6
5

Q56

9

D

G

S

SUB*_T1564

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

R490

1 2

VRD2_LGATE2

4.7K

R495

1 2

4

3

2

1

FDS7066SN3

4.7K

Q46

4

3

2

1

9

D

G

S

FDS7066SN3

SUB*_T1564

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

R179

C285

0.6uH, 27Amp

1 2

3-5%

1 2

1 2

.001UF

SUB=SUB*_N1453

50V-10%

VCORE2_PWRGOOD

5,8,59

+12V

A03_121704_GT

SUB=SUB*_J9621

2

+12V

Q91

2

SUB=SUB*_J9621

3

H2_VSSSENSE

12

R318

1 2

1K-5%

SUB=SUB*_4053P

8

DRV2_OD_R

8

X04_GT_031904

X04_GT_031904

C1729

DRV2_OD_R

X03_GT_011804

R1981

21

DRV2_OD

220K

x03b_GT_012204

21

C1808

27pF

50V-10%

PWM Control Circuitry

ROOM = VRD2_CTRL

0-5%

21

VCORE_EN

C1730

1 2

100-5%

R1847

C473

5,8,59

21

.1uF

VCORE2_PWRGOOD

VRD2_VSSSENSE

1uF

1 2

5,7,59

1 2

50V-10%

1000pF

25V-10%

R1822

PART_NUMBER=79015

25V-20%

SUB*_16155

X02_TJ_110503

8

3

FT2N7002LT1

1

2

R6018

1 2

1K-5%

1N914

2-1%

X03_GT_012604

8

1 3

D12

20%

1 2

R248

Phase 3

ROOM = VRD2_PHASE3

VRD2_PHASE3B_SENSE

.22uF 25V

C647

21

50V-10%

1000pF

C477

.1uF

25V-20%

x03_sd

C858

NP*

21

21

Q62

4

3

2

1

9

G

S

FDS7096N3

SUB*_N1930

D

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

.22uF 25V

20%

1 2

16V-10%

4.7uF

C594

2 1

C1732

25V-20%

.1uF

25V-20%

.1uF

2 1

C1722

2 1

C1723

Q63

4

3

2

1

9

G

S

FDS7096N3

D

SUB*_N1930

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

.22uF 25V

20%

16V-10%

C623

21

4.7uF

2 1

C1724

25V-20%

.1uF

25V-20%

.1uF

2 1

C1725

2 1

12

C424

C1726

+

VRD2_DRV3

15

11

10

EN

PWRGD

ILIMIT

VRD2_VCC

8

VRD2_CTRL

VCC

RAMPADJ

RT

28

14
13

27

+12V

10-5%

1 2

R14

487K-1%

VRD2_PWM1A

VRD2_PWM2A

8
8

SUB=SUB*_G7300

5.1-5%

2 1

R267

1 2

R272

R300

1 2

200K-1%

8

VRD2_PWM3A

DRV2_OD

16V-10%

.47uF

1

BST

2

IN

3

OD

4

VCC

ADP3418

.22uF 25V

1 2

20%

C598

C11

21

DRVH

SW
PGND
DRVL

8
7
6
5

VRD2_UGATE3

VRD2_LGATE3

R500

1 2

4.7K

R493

1 2

4.7K

Q67

4

3

2

1

9

D

G

S

FDS7066SN3

SUB*_T1564

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

Q45

4

3

2

1

9

D

G

S

FDS7066SN3

SUB*_T1564

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

16V-10%

560uF

4V-20%

2 1

4.7uF

C328

+CPU_VID2

L5

1 2

R182

1 2

21

C299

SUB*_16155

X02_TJ_110503

0.6uH, 27Amp

3-5%

.001UF

SUB=SUB*_N1453

50V-10%

Q93

3

FT2N7002LT1

1

2

5.1-5%

R262

R1991

1 2

1K-5%

X03_GT_012604

20%

1N914

D34

31

1 2

8
8

2-1%

VRD2_PWM4A

DRV2_OD

R246

SUB=SUB*_G7300

12

.22uF 25V

20%

C10

21

.22uF 25V

C649

21

1

BST

2

IN

3

OD

4

VCC

Phase 4

ROOM = VRD2_PHASE4

VRD2_PHASE4B_SENSE

8

50V-10%

1000pF

VRD2_DRV4

ADP3418

x03_sd

C859

21

C475

1 2

.1uF

25V-20%

NP*21

DRVH

SW
PGND
DRVL

8
7
6
5

21

R486

VRD2_LGATE4

R485

4.7K

Q50

4

3

2

1

9

G

S

FDS7096N3

D

SUB*_N1930

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

.22uF 25V

20%

1 2

16V-10%

4.7uF

C617

2 1

C1716

25V-20%

.1uF

25V-20%

.1uF

C1717

12

12

C1718

Q51

4

3

2

1

9

G

S

FDS7096N3

D

SUB*_N1930

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

.22uF 25V

20%

16V-10%

C618

21

4.7uF

A03_121704_GT

2 1

C1719

25V-20%

.1uF

25V-20%

.1uF

C1720

12

12

C425

C1721

12

+

16V-10%

560uF

4V-20%

2 1

4.7uF

C309

+CPU_VID2

L18

SUB=SUB*_N1453

0.6uH, 27Amp

1 2

VRD2_UGATE4

Q49

4

3

2

1

9

D

G

S

NC

5

6

7

8

21

FDS7066SN3

4.7K

SUB*_T1564

PKG_TYPE=SO8_P9DR_FRCHLD

Q48

4

3

2

1

9

D

G

S

FDS7066SN3

SUB*_T1564

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

R178

C284

21

3-5%

21

.001UF

50V-10%

3

VID Termination

R316

0-5%

1 2

8
8
8

R350

1 2

21

75K-1%

0-5%

R298

75K-1%

21

C721

50V-10%

SUB*_1U388

1 2

4700pF

C711

R148

21

15.8K-1% 0-5%

THERMISTOR

R349

0-5%

21

75K-1%

R295

R293

21

X04_GT_031904

R87

1 2

29.4K-1%

R332

1 2

21

75K-1%

21

X04_GT_031904

X04_GT_031904

VRD2_PHASE1B_SENSE

VRD2_PHASE2B_SENSE

VRD2_PHASE3B_SENSE

VRD2_PHASE4B_SENSE

R294

R86

75K-1%

X03_GT_011904

+CPU_VTT

R1715

NP

1 2

68K-5%

R1716

NP

68K-5%

7

X

21

X

VRD2_PWM3A

VRD2_PWM4A

8

FDS7066N3 is local. Waiting on library symbol.

R79

1 2

8

Input Filtering

499-1%

H2_VID0

8,12

R78

+12V

C583

1 2

499-1%

SUB=SUB*_J9621

A03_121704_GT

+

270uF

2 1

16V-20%

C820

12

+

560uF

4V-20%

C6

.1uF

1 2

50V-20%

C7

21

.1uF

50V-20%

C23

1uF

1 2

25V-10%

C22

1uF

1 2

25V-10%

R72

1 2

499-1%

R71

1 2

499-1%

H2_VID1

H2_VID2

H2_VID3

8,12

8,12

8,12

R69

SUB*_4053P

SUB*_4053P

1 2

499-1%

H2_VID4

8,12

R68

1 2

H2_VID5

8,12

499-1%

NP

3

X

2

8

8

8

8

VRD2_PWM1A

+CPU_VID2

8

X04_GT_032204

1 2

C6008

.01uF 16V

R418

1 2

0-5%

D

Q8

2N7002

R501

1

G

S

NP

4.7K

21

X

NP

C335

1 2

.047uF

16V-10%

X

ALT_LLINE

21

INTEGRATED VRD 10.1 VOLTAGE

INC.

ROUND ROCK,TEXAS

If this FET is populated, you must verify Vgs(th) is met!

TITLE

REGULATOR FOR PROC_2

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

8 OF 60

SUB*_75EEC

.047uF 25V

20%

12

DELAY

1 2

C715

249K-1%

R256

1 2

1 2

127K-1%

R235

8,12
8,12
8,12
8,12
8,12
8,12

VRD2_VSSSENSE

H2_VID0

H2_VID1

H2_VID2

H2_VID3

H2_VID4

H2_VID5

100K-1%

X04_GT_031904 X04_GT_031904

C301

21

12

100pF 50V

R297

NP*

19

9

7

5
4
3
2
1
6

COMP

FBRTN

VID0
VID1
VID2
VID3
VID4
VID5

GND

ADP3168

NP

680pF 50V

C480

12

X

X04_GT_031904

X04_GT_032204

R252

2 1

C709

12

R279

1 2

PWM1

26

PWM2

25

PWM3

24

PWM4

23

SW1

22

SW2

21

SW3

20

SW4

FB

17
16
18

8

CSSUM
CSREF

CSCOMP

SUB*_H5002
X04_GT_031904

NP

R328

X

1 2

X04_GT_031904

X04_GT_031904

300-5%

VRD2_PWM3A

VRD2_PWM4A

R347

1 2

0-5%

50V-10%

2700pF

4 4

(1.33K)

NP

R1993

1.3K-1%

R296

1 2

100K-1%

X

SUB*_X5828

50V-10%

1000pF

NP

X

21

NP

C1811

100-5%

X

1 2

R1994

+CPU_VID2

12

H2_VCCSENSE

X00_GT_052203

10.7K-1% 680pF 50V

X04_GT_031904

X04_GT_031904

R348

1 2

1K-5%

VRD2_VCCSENSE

X04_GT_031904

R1823

1 2

0-5% 0-5%

1 2

X04_GT_031904

subsys done

A B

DC

B D

CA

12-16-2004_19:51

1

1

+12V

R427

1 2

+3.3V

100-1%

2

100K-5%

T

Locate near hot component in P1 core regulator.

R90

21

10K-1%

0.1uF 16V

1 2

R104

21

C719

0.1uF 16V

1 2

C716

10K-1%

3.32K-1%

R102

21

21

R281

1 2

1K-1%

R183

.22uF 25V

20%

10K-1% 25.5K-1%

1 2

C653

U17

3

V+

V-

LM339

2

12

5

+

4

-

21

21

R140

R254

8.2K-5%

U17

3

V+

V-

LM339

14

12

9

+

8

-

21

R1704

VRD1_THERMTRIP_N

5,46

2

3

100K-5%

T

1 2

10K-1%

1 2

R89

0.1uF 16V

1 2

R141

0.1uF 16V

C718

1 2

C717

10K-1%

3.32K-1%

R149

21

1 2

1K-1%

R192

R280

U17

21

7

6

3

V+

V-

LM339

1

12

+

-

1 2

10K-1% 25.5K-1%

R142

1 2

R253

11

10

+3.3V

8.2K-5%

U17

3

V+

V-

LM339

13

12

+

-

21

R1705

VRD2_THERMTRIP_N

5,46

3

Locate near hot component in P2 core regulator.

VRD Over Temperature Detect Circuit

ROOM=VRD_THERM

4 4

INC.

VRD THERMTRIP

TITLE

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL

subsys done

AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

9 OF 60

DC

A B

B D

CA

12-16-2004_19:51

1

1

2

2

3

3

4 4

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

10 OF 60

DC

A B

B D

CA

12-16-2004_19:51

1

2

3

x00_tj_061403

Alternate PLL filter circuit recommended by Intel until
on-die version validated.

+1.5V

R1583NP

1 2

X

0-5%

2.5V-20%-2STACK

680uF

NP

1 2

+

X

C1588

NP

C1570

X

1 2

4.7uF

C1371

6.3V-10%

NP

X

+CPU_VTT

1 2

0.1uF 16V

R1556

1 2

220

R1558

1 2

220

R1562

1 2

220

R1563

1 2

220

R1506

51

R1493

51

R1497

51

R1499

51

R1501

51

R1503

51

R1494

NP

1 2

51

R1508

1 2

100-5%

x00_GT_010704

x04_tj_031604

V_1P5_H1_VCCPLL

NP

21

X

C1370

0.1uF 16V

ROOM=PROC_1

ROOM=PROC_2

TO DO - MECHANICAL ADD'S NOT CORRECT

Heat Sink Clips

Heat Sink RM

PROC_1

A22
A20
B18
C18
A19
C17
D17
A13
B16
B14
B13
A12
C15
C14
D16
D15
F15
A10
B10
B11
C12
E14
D13

A9

B8
E13
D12
C11

B7

A6

A7

C9

C8

E10

D9

D19
F17
F14

B19
B21
C21
C20
B22

D20
F12
E11
D10

F20
D23
A17
F11

E21
D22
F21

C6
E19

A23
E22
C23

F27
C27
E27
C26

E5

D7

AE6

D4

Y8

D6

B24
G23

Y4

W5

A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35

AP0
AP1

ADS
ADSTB0
ADSTB1

REQ0
REQ1
REQ2
REQ3
REQ4

BR0
BR1
BR2
BR3

BNR
BPRI
LOCK
BINIT

RS0
RS1
RS2
RSP
TRDY

HITM
HIT
DEFER

A20M
SMI
FERR/PBE
IGNNE
IERR
MCERR

SLP
STPCLK
RESET
INIT

LINT0
LINT1

BCLK0
BCLK1

NOCONA 667MHz / 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 1 OF 4

DSTBN0
DSTBN1
DSTBN2
DSTBN3

DSTBP0
DSTBP1
DSTBP2
DSTBP3

DBI0
DBI1
DBI2
DBI3
DBSY
DRDY

11

15

3
3

H_A3_N
H_A4_N
H_A5_N
H_A6_N
H_A7_N
H_A8_N
H_A9_N
H_A10_N
H_A11_N
H_A12_N
H_A13_N
H_A14_N
H_A15_N
H_A16_N
H_A17_N
H_A18_N
H_A19_N
H_A20_N
H_A21_N
H_A22_N
H_A23_N
H_A24_N
H_A25_N
H_A26_N
H_A27_N
H_A28_N
H_A29_N
H_A30_N
H_A31_N
H_A32_N
H_A33_N
H_A34_N
H_A35_N

H_AP0_N
H_AP1_N

H_ADS_N
H_ADSTB0_N
H_ADSTB1_N

H_REQ0_N
H_REQ1_N
H_REQ2_N
H_REQ3_N
H_REQ4_N

H_BREQ0_N
H_BREQ1_N
H1_BREQ23_N

H_BNR_N
H_BPRI_N
H_LOCK_N
H_BINIT_N

H_RS0_N
H_RS1_N
H_RS2_N
H_RSP_N
H_TRDY_N

H_HITM_N
H_HIT_N
H_DEFER_N

H_A20M_N
H_SMI_N
H_FERR_N
H_IGNNE_N
H1_IERR_N
H_MCERR_N

H_SLP_N
H_STPCLK_N
H_RST_N
H_INIT_N

H_INTR
H_NMI

CK_167M_CPU1_P
CK_167M_CPU1_N

Place @ CPU1 Place @ CPU2

R1559

R1557

1 2

R1560

1 2

R1561

1 2

R1504

1 2

R1505

1 2

21

R1496

21

301-1%

21

R1498

21

R1500

21

R1502

21

R1495

NP

1 2

220

220

220

220

51

51

51

R1554

51

51

51

51

21

21

21

21

21

21

X

H_A20M_N

H_SLP_N

H_NMI

H_INTR

H_SMI_N

H_INIT_N

H_IGNNE_N

H_STPCLK_N

H_FERR_N

H_BREQ0_N

H_BREQ1_N

H1_BREQ23_N

H1_ODTEN

H_PWRGOOD

H1_TESTHI0

H1_TESTHI1

H1_TESTHI2

H1_TESTHI3

H1_TESTHI4

H1_TESTHI5

H1_TESTHI6

H1_TESTHI7

H1_TESTHI8

11,33

11,33

11,33

11,33

11,33

11,33,55

11,33

11,33

11,33

11,17

11,17

11

12

12,33

12

12

12

12

12

12

12

12

12

X

R1492

NP

1 2

X

51

NP*

H1_BOOTSEL

H_RST_N

12

12

11,15,17

11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17

11,17
11,17

11,17
11,17
11,17

11,17
11,17
11,17
11,17
11,17

11,17
11,17

11,17
11,17
11,17
11,17

11,17
11,17
11,17
11,17
11,17

11,17
11,17
11,17

11,33
11,33
11,33
11,33

11,15,17

11,33

11,33
11,15,17
11,33,55

11,33

11,33

SUB=SUB*_4M319

10 - 12 mil traces

Heat Sink RM screws

Y26

D0

AA27

D1

Y24

D2

AA25

D3

AD27

D4

Y23

D5

AA24

D6

AB26

D7

AB25

D8

AB23

D9

AA22

D10

AA21

D11

AB20

D12

AB22

D13

AB19

D14

AA19

D15

AE26

D16

AC26

D17

AD25

D18

AE25

D19

AC24

D20

AD24

D21

AE23

D22

AC23

D23

AA18

D24

AC20

D25

AC21

D26

AE22

D27

AE20

D28

AD21

D29

AD19

D30

AB17

D31

AB16

D32

AA16

D33

AC17

D34

AE13

D35

AD18

D36

AB15

D37

AD13

D38

AD14

D39

AD11

D40

AC12

D41

AE10

D42

AC11

D43

AE9

D44

AD10

D45

AD8

D46

AC9

D47

AA13

D48

AA14

D49

AC14

D50

AB12

D51

AB13

D52

AA11

D53

AA10

D54

AB10

D55

AC8

D56

AD7

D57

AE7

D58

AC6

D59

AC5

D60

AA8

D61

Y9

D62

AB6

D63

AC18

DP0

AE19

DP1

AC15

DP2

AE17

DP3

Y21
Y18
Y15
Y12

Y20
Y17
Y14
Y11

AC27
AD22
AE12
AB9
F18
E18

H_D0_N
H_D1_N
H_D2_N
H_D3_N
H_D4_N
H_D5_N
H_D6_N
H_D7_N
H_D8_N

H_D9_N
H_D10_N
H_D11_N
H_D12_N
H_D13_N
H_D14_N
H_D15_N
H_D16_N
H_D17_N
H_D18_N
H_D19_N
H_D20_N
H_D21_N
H_D22_N
H_D23_N
H_D24_N
H_D25_N
H_D26_N
H_D27_N
H_D28_N
H_D29_N
H_D30_N
H_D31_N
H_D32_N
H_D33_N
H_D34_N
H_D35_N
H_D36_N
H_D37_N
H_D38_N
H_D39_N
H_D40_N
H_D41_N
H_D42_N
H_D43_N
H_D44_N
H_D45_N
H_D46_N
H_D47_N
H_D48_N
H_D49_N
H_D50_N
H_D51_N
H_D52_N
H_D53_N
H_D54_N
H_D55_N
H_D56_N
H_D57_N
H_D58_N
H_D59_N
H_D60_N
H_D61_N
H_D62_N
H_D63_N

H_DP0_N
H_DP1_N
H_DP2_N
H_DP3_N

H_DSTBN0_N
H_DSTBN1_N
H_DSTBN2_N
H_DSTBN3_N

H_DSTBP0_N
H_DSTBP1_N
H_DSTBP2_N
H_DSTBP3_N

H_DBI0_N
H_DBI1_N
H_DBI2_N
H_DBI3_N
H_DBSY_N
H_DRDY_N

11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17

11,17
11,17
11,17
11,17

11,17
11,17
11,17
11,17

11,17
11,17
11,17
11,17

11,17
11,17
11,17
11,17
11,17
11,17

Swizzled

11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17

11,17
11,17

11,17
11,17
11,17

11,17
11,17
11,17
11,17
11,17

11,17
11,17

11

11,17
11,17
11,17
11,17

11,17
11,17
11,17
11,17
11,17

11,17
11,17
11,17

11,33
11,33
11,33
11,33

15

11,15,17

11,33

11,33
11,15,17
11,33,55

11,33

11,33

H_A3_N
H_A4_N
H_A5_N
H_A6_N
H_A7_N
H_A8_N
H_A9_N
H_A10_N
H_A11_N
H_A12_N
H_A13_N
H_A14_N
H_A15_N
H_A16_N
H_A17_N
H_A18_N
H_A19_N
H_A20_N
H_A21_N
H_A22_N
H_A23_N
H_A24_N
H_A25_N
H_A26_N
H_A27_N
H_A28_N
H_A29_N
H_A30_N
H_A31_N
H_A32_N
H_A33_N
H_A34_N
H_A35_N

H_AP0_N
H_AP1_N

H_ADS_N
H_ADSTB0_N
H_ADSTB1_N

H_REQ0_N
H_REQ1_N
H_REQ2_N
H_REQ3_N
H_REQ4_N

H_BREQ1_N
H_BREQ0_N
H2_BREQ23_N

H_BNR_N
H_BPRI_N
H_LOCK_N
H_BINIT_N

H_RS0_N
H_RS1_N
H_RS2_N
H_RSP_N
H_TRDY_N

H_HITM_N
H_HIT_N
H_DEFER_N

H_A20M_N
H_SMI_N
H_FERR_N
H_IGNNE_N
H2_IERR_N
H_MCERR_N

H_SLP_N
H_STPCLK_N
H_RST_N
H_INIT_N

H_INTR
H_NMI

CK_167M_CPU2_P

3

CK_167M_CPU2_N

3

SUB=SUB*_4M319

A22
A20
B18
C18
A19
C17
D17
A13
B16
B14
B13
A12
C15
C14
D16
D15
F15
A10
B10
B11
C12
E14
D13

A9

B8
E13
D12
C11

B7

A6

A7

C9

C8

E10

D9

D19
F17
F14

B19
B21
C21
C20
B22

D20
F12
E11
D10

F20
D23
A17
F11

E21
D22
F21

C6
E19

A23
E22
C23

F27
C27
E27
C26

E5

D7

AE6

D4

Y8

D6

B24
G23

Y4

W5

PROC_2

A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35

AP0
AP1

ADS
ADSTB0
ADSTB1

REQ0
REQ1
REQ2
REQ3
REQ4

BR0
BR1
BR2
BR3

BNR
BPRI
LOCK
BINIT

RS0
RS1
RS2
RSP
TRDY

HITM
HIT
DEFER

A20M
SMI
FERR/PBE
IGNNE
IERR
MCERR

SLP
STPCLK
RESET
INIT

LINT0
LINT1

BCLK0
BCLK1

NOCONA 667MHz / 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 1 OF 4

D0
D1
D2
D3
D4
D5
D6
D7
D8

D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63

DP0
DP1
DP2
DP3

DSTBN0
DSTBN1
DSTBN2
DSTBN3

DSTBP0
DSTBP1
DSTBP2
DSTBP3

DBI0
DBI1
DBI2
DBI3
DBSY
DRDY

Y26
AA27
Y24
AA25
AD27
Y23
AA24
AB26
AB25
AB23
AA22
AA21
AB20
AB22
AB19
AA19
AE26
AC26
AD25
AE25
AC24
AD24
AE23
AC23
AA18
AC20
AC21
AE22
AE20
AD21
AD19
AB17
AB16
AA16
AC17
AE13
AD18
AB15
AD13
AD14
AD11
AC12
AE10
AC11
AE9
AD10
AD8
AC9
AA13
AA14
AC14
AB12
AB13
AA11
AA10
AB10
AC8
AD7
AE7
AC6
AC5
AA8
Y9
AB6

AC18
AE19
AC15
AE17

Y21
Y18
Y15
Y12

Y20
Y17
Y14
Y11

AC27
AD22
AE12
AB9
F18
E18

H_D0_N
H_D1_N
H_D2_N
H_D3_N
H_D4_N
H_D5_N
H_D6_N
H_D7_N
H_D8_N

H_D9_N
H_D10_N
H_D11_N
H_D12_N
H_D13_N
H_D14_N
H_D15_N
H_D16_N
H_D17_N
H_D18_N
H_D19_N
H_D20_N
H_D21_N
H_D22_N
H_D23_N
H_D24_N
H_D25_N
H_D26_N
H_D27_N
H_D28_N
H_D29_N
H_D30_N
H_D31_N
H_D32_N
H_D33_N
H_D34_N
H_D35_N
H_D36_N
H_D37_N
H_D38_N
H_D39_N
H_D40_N
H_D41_N
H_D42_N
H_D43_N
H_D44_N
H_D45_N
H_D46_N
H_D47_N
H_D48_N
H_D49_N
H_D50_N
H_D51_N
H_D52_N
H_D53_N
H_D54_N
H_D55_N
H_D56_N
H_D57_N
H_D58_N
H_D59_N
H_D60_N
H_D61_N
H_D62_N
H_D63_N

H_DP0_N
H_DP1_N
H_DP2_N
H_DP3_N

H_DSTBN0_N
H_DSTBN1_N
H_DSTBN2_N
H_DSTBN3_N

H_DSTBP0_N
H_DSTBP1_N
H_DSTBP2_N
H_DSTBP3_N

H_DBI0_N
H_DBI1_N
H_DBI2_N
H_DBI3_N
H_DBSY_N
H_DRDY_N

11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17
11,17

11,17
11,17
11,17
11,17

11,17
11,17
11,17
11,17

11,17
11,17
11,17
11,17

11,17
11,17
11,17
11,17
11,17
11,17

+CPU_VTT

+CPU_VTT

R1570

1 2

39-5%

R1566

1 2

39-5%

R1569

1 2

39-5%

R1567

1 2

39-5%

R1568

1 2

39-5%

R1518

1 2

R1516

1 2

R1514

1 2

R1512

1 2

R1520

R1511

NP

R1509

51

51

51

51

51

51

51

1 2

1 2

1 2

1 2

21

21

X

21

C1448

47pF

50V-5%

C1444

1 2

47pF

50V-5%

C1445

2 1

47pF

50V-5%

C1446

47pF

50V-5%

C1447

47pF

50V-5%

R1521

51

R1517

51

R1515

51

R1513

51

R1519

51

R1565

51

ECAD: Route trace from L128 to pin AB4

Route trace from L127 to pin AD4

ECAD: Route trace from L125 to pin AB4

Route trace from L126 to pin AD4

21

12

12

21

21

H_BINIT_N

H_BNR_N

H_HIT_N

H_HITM_N

H_MCERR_N

H2_BREQ23_N

H2_TESTHI0

H2_TESTHI1

H2_TESTHI2

H2_TESTHI3

H2_TESTHI4

H2_TESTHI5

H2_TESTHI6

H2_TESTHI7

H2_TESTHI8

H_FORCEPR_N

H2_BOOTSEL

H_TEST_BUS

11,17

11,17

11,17

11,17

11,15,17

11

12

12

12

12

12

12

12

12

12

5,12

12

12

775mV

x04_sd

775mV

x04_sd

754mV

754mV

+CPU_VTT

21

R1592

R370

1 2

+CPU_VTT

21

R1593

21

R371

+CPU_VTT

21

R1594

R372

1 2

+CPU_VTT

21

R1595

21

R373

+CPU_VTT

L136

10uH 165MA

to pin AD4

L137

1 2

10uH 165MA

to pin AB4

+CPU_VTT

L138

1 2

10uH 165MA

to pin AD4

L139

10uH 165MA

to pin AB4

CPU1 GTL VREF

ECAD: Route <1.5" trace.
ECAD: Place 220pf caps under CPU

49.9-1%

NET_PHYSICAL_TYPE=50MIL

C1451

90.9-1%90.9-1%

ECAD: Route <1.5" trace.
ECAD: Place 220pf caps under CPU

49.9-1%

NET_PHYSICAL_TYPE=50MIL

C1454

1uF

1 2

1 2

10V-10%

1uF

10V-10%

CPU2 GTL VREF

ECAD: Route <1.5" trace.
ECAD: Place 220pf caps under CPU

49.9-1%49.9-1%
NET_PHYSICAL_TYPE=50MIL

1 2

C1452

1 2

1uF

10V-10%

1uF

10V-10%

84.5-1%

NET_PHYSICAL_TYPE=50MIL

84.5-1%

C1453

ECAD: Route <1.5" trace.
ECAD: Place 220pf caps under CPU

X02_tj_091603

X03_tj_121503

21

21

R1824

1 2

0-5%

R1825 NET_PHYSICAL_TYPE=50MIL

1 2

0-5%

R1826

1 2

1 2

ROOM=PROC_1

V_VTT_H1_VCCA

cap between AB4 and AA5

C1492

1 2

22uF 6.3V22uF 6.3V

V_VTT_H1_VSSA

V_VTT_H2_VCCA

21

C1491

NET_PHYSICAL_TYPE=50MIL

C1581

NET_PHYSICAL_TYPE=50MIL

0-5%

R1827

0-5%

cap between AB4 and AA5

V_VTT_H2_VSSA

21

220pF

50V-10%

NC_H1_GTLREF01

21

C1579

NC_H1_GTLREF23

NET_PHYSICAL_TYPE=50MIL

NET_PHYSICAL_TYPE=50MIL

C1578

NET_PHYSICAL_TYPE=50MIL

NET_PHYSICAL_TYPE=50MIL

C1583

NET_PHYSICAL_TYPE=50MIL

220pF

21

220pF

NC_H2_GTLREF01

21

220pF

NC_H2_GTLREF23

21

C1582

C1580

50V-10%

C1577

50V-10%

C1584

50V-10%

220pF

50V-10%

21

21

21

220pF

50V-10%

220pF

50V-10%

220pF

50V-10%

12

12

12

12

H1_GTLREF01

2 1

750-1%

H1_GTLREF23

750-1%

H2_GTLREF01

750-1%

H2_GTLREF23

750-1%

1

12

2

R323

NP01

12

R321

12

NP01

12

3

R319

12

NP01

12

2 1

R320

NP01

Retention Screws

ADD1=ADD*_89JJP_RETSCRW1
ADD2=ADD*_89JJP_RETSCRW2
ADD3=ADD*_89JJP_RETSCRW3

Dangling 750 ohm resistors are there to help fine-tune
VREF's using a variable powr supply during margin testing

ADD4=ADD*_89JJP_RETSCRW4
ADD5=ADD*_89JJP_RETSCRW5

+1.5V

4 4

ADD6=ADD*_89JJP_RETSCRW6
ADD7=ADD*_89JJP_RETSCRW7

R1522

1 2

51

H2_ODTEN

12

ADD8=ADD*_89JJP_RETSCRW8

R1584NP

PROCESSORS 1 & 2

21

X

0-5%

2.5V-20%-2STACK

680uF

1 2

+

X

NP

C1587

NP

21

C1571

X

4.7uF

C1372

6.3V-10%

NP

21

X

NP

X

C1373

0.1uF 16V

V_1P5_H2_VCCPLL

1 2

0.1uF 16V

x00_sd_061703

12

NC_ST1_2

RETENTION SUPPORT, W/CLIP

NC_ST2_2

RETENTION SUPPORT, W/CLIP

x03b_tj_012004

SUB*_X4108

ST1

1

GND

2

NC

GROUND, BRACKET

ST2

1

GND

2

NC

GROUND, BRACKET

SUB*_X4108

1U Bottom Support Bracket

2U/5U Bottom Support Bracket

proc heatsink RM boat

two of the boats are represented here

ADD7=ADD02_Y1255_BRKT1
ADD8=ADD02_Y1255_BRKT2

ADD1=ADD13_W1578_BRKT3
ADD2=ADD13_W1578_BRKT4

ADD3=ADD*_X4108_RETMOD1
ADD4=ADD*_X4108_RETMOD2
ADD5=ADD*_X4108_RETMOD3

ADD1=ADD*_H3668_RMCLIP1
ADD2=ADD*_H3668_RMCLIP2

ADD3=ADD*_H3668_RMCLIP3
ADD4=ADD*_H3668_RMCLIP4

ADD5=ADD*_X4108_RETMOD5
ADD6=ADD*_X4108_RETMOD6
ADD7=ADD*_X4108_RETMOD7

proc heatsink RM clip

x03b_tj_012004

proc heatsink RM boat

x03b_tj_012004

PROCESSOR 1 & 2

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

INC.

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

ROUND ROCK,TEXAS

REV.

A03-00

SHEET

11 OF 60

subsys done

A B

DC

B D

CA

12-16-2004_19:51

1

2

3

SUB=SUB*_4M319

A5
A11
A21
A27
A29
A31

B2

B9
B15
B17
B23
B28
B30

C7
C13
C19
C25
C29
C31

D2

D5
D11
D21
D27
D28
D30

E9
E15
E17
E23
E29
E31

F2

F7
F13
F19
F25
F28
F30

G1

G3

G5

G9
G25
G27
G29
G31

H2

H4

H6

H8
H24
H26
H28
H30

J1

J3

J5

J7

J9
J23
J25
J27
J29
J31

K2

K4

K6

K8
K24
K26
K28
K30

L1

L3

L5

L7

L9
L23
L25
L27
L29
L31

M2

M4

M6

M8
M24
M26
M28
M30

N2

N4

PROC_1

VSS_A5
VSS_A11
VSS_A21
VSS_A27
VSS_A29
VSS_A31
VSS_B2
VSS_B9
VSS_B15
VSS_B17
VSS_B23
VSS_B28
VSS_B30
VSS_C7
VSS_C13
VSS_C19
VSS_C25
VSS_C29
VSS_C31
VSS_D2
VSS_D5
VSS_D11
VSS_D21
VSS_D27
VSS_D28
VSS_D30
VSS_E9
VSS_E15
VSS_E17
VSS_E23
VSS_E29
VSS_E31
VSS_F2
VSS_F7
VSS_F13
VSS_F19
VSS_F25
VSS_F28
VSS_F30
VSS_G1
VSS_G3
VSS_G5
VSS_G9
VSS_G25
VSS_G27
VSS_G29
VSS_G31
VSS_H2
VSS_H4
VSS_H6
VSS_H8
VSS_H24
VSS_H26
VSS_H28
VSS_H30
VSS_J1
VSS_J3
VSS_J5
VSS_J7
VSS_J9
VSS_J23
VSS_J25
VSS_J27
VSS_J29
VSS_J31
VSS_K2
VSS_K4
VSS_K6
VSS_K8
VSS_K24
VSS_K26
VSS_K28
VSS_K30
VSS_L1
VSS_L3
VSS_L5
VSS_L7
VSS_L9
VSS_L23
VSS_L25
VSS_L27
VSS_L29
VSS_L31
VSS_M2
VSS_M4
VSS_M6
VSS_M8
VSS_M24
VSS_M26
VSS_M28
VSS_M30
VSS_N2
VSS_N4

NOCONA 667MHz / 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 4 OF 4

VSS_N6

VSS_N8
VSS_N24
VSS_N26
VSS_N28
VSS_N30

VSS_P1

VSS_P3

VSS_P5

VSS_P7

VSS_P9
VSS_P23
VSS_P25
VSS_P27
VSS_P29
VSS_P31

VSS_R2

VSS_R4

VSS_R6

VSS_R8
VSS_R24
VSS_R26
VSS_R28
VSS_R30

VSS_T1

VSS_T3

VSS_T5

VSS_T7

VSS_T9
VSS_T23
VSS_T25
VSS_T27
VSS_T29
VSS_T31

VSS_U2

VSS_U4

VSS_U6

VSS_U8
VSS_U24
VSS_U26
VSS_U28
VSS_U30

VSS_V1

VSS_V3

VSS_V5

VSS_V7

VSS_V9
VSS_V23
VSS_V25
VSS_V27
VSS_V29
VSS_V31

VSS_W2

VSS_W4
VSS_W24
VSS_W26
VSS_W28
VSS_W30

VSS_Y1

VSS_Y5

VSS_Y7
VSS_Y13
VSS_Y19
VSS_Y25
VSS_Y31
VSS_AA2
VSS_AA9

VSS_AA15
VSS_AA17
VSS_AA23
VSS_AA30

VSS_AB1
VSS_AB5

VSS_AB11
VSS_AB21
VSS_AB27
VSS_AB31

VSS_AC2
VSS_AC7

VSS_AC13
VSS_AC19
VSS_AC25

VSS_AD3
VSS_AD9

VSS_AD15
VSS_AD17
VSS_AD23
VSS_AD31

VSS_AE2

VSS_AE11
VSS_AE21
VSS_AE27

N6
N8
N24
N26
N28
N30
P1
P3
P5
P7
P9
P23
P25
P27
P29
P31
R2
R4
R6
R8
R24
R26
R28
R30
T1
T3
T5
T7
T9
T23
T25
T27
T29
T31
U2
U4
U6
U8
U24
U26
U28
U30
V1
V3
V5
V7
V9
V23
V25
V27
V29
V31
W2
W4
W24
W26
W28
W30
Y1
Y5
Y7
Y13
Y19
Y25
Y31
AA2
AA9
AA15
AA17
AA23
AA30
AB1
AB5
AB11
AB21
AB27
AB31
AC2
AC7
AC13
AC19
AC25
AD3
AD9
AD15
AD17
AD23
AD31
AE2
AE11
AE21
AE27

SUB=SUB*_4M319

A5
A11
A21
A27
A29
A31

B2

B9
B15
B17
B23
B28
B30

C7
C13
C19
C25
C29
C31

D2

D5
D11
D21
D27
D28
D30

E9
E15
E17
E23
E29
E31

F2

F7
F13
F19
F25
F28
F30

G1

G3

G5

G9
G25
G27
G29
G31

H2

H4

H6

H8
H24
H26
H28
H30

J1

J3

J5

J7

J9
J23
J25
J27
J29
J31

K2

K4

K6

K8
K24
K26
K28
K30

L1

L3

L5

L7

L9
L23
L25
L27
L29
L31

M2

M4

M6

M8
M24
M26
M28
M30

N2

N4

PROC_2

VSS_A5
VSS_A11
VSS_A21
VSS_A27
VSS_A29
VSS_A31
VSS_B2
VSS_B9
VSS_B15
VSS_B17
VSS_B23
VSS_B28
VSS_B30
VSS_C7
VSS_C13
VSS_C19
VSS_C25
VSS_C29
VSS_C31
VSS_D2
VSS_D5
VSS_D11
VSS_D21
VSS_D27
VSS_D28
VSS_D30
VSS_E9
VSS_E15
VSS_E17
VSS_E23
VSS_E29
VSS_E31
VSS_F2
VSS_F7
VSS_F13
VSS_F19
VSS_F25
VSS_F28
VSS_F30
VSS_G1
VSS_G3
VSS_G5
VSS_G9
VSS_G25
VSS_G27
VSS_G29
VSS_G31
VSS_H2
VSS_H4
VSS_H6
VSS_H8
VSS_H24
VSS_H26
VSS_H28
VSS_H30
VSS_J1
VSS_J3
VSS_J5
VSS_J7
VSS_J9
VSS_J23
VSS_J25
VSS_J27
VSS_J29
VSS_J31
VSS_K2
VSS_K4
VSS_K6
VSS_K8
VSS_K24
VSS_K26
VSS_K28
VSS_K30
VSS_L1
VSS_L3
VSS_L5
VSS_L7
VSS_L9
VSS_L23
VSS_L25
VSS_L27
VSS_L29
VSS_L31
VSS_M2
VSS_M4
VSS_M6
VSS_M8
VSS_M24
VSS_M26
VSS_M28
VSS_M30
VSS_N2
VSS_N4

NOCONA 667MHz / 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 4 OF 4

VSS_N6

VSS_N8
VSS_N24
VSS_N26
VSS_N28
VSS_N30

VSS_P1

VSS_P3

VSS_P5

VSS_P7

VSS_P9
VSS_P23
VSS_P25
VSS_P27
VSS_P29
VSS_P31

VSS_R2

VSS_R4

VSS_R6

VSS_R8
VSS_R24
VSS_R26
VSS_R28
VSS_R30

VSS_T1

VSS_T3

VSS_T5

VSS_T7

VSS_T9
VSS_T23
VSS_T25
VSS_T27
VSS_T29
VSS_T31

VSS_U2

VSS_U4

VSS_U6

VSS_U8
VSS_U24
VSS_U26
VSS_U28
VSS_U30

VSS_V1

VSS_V3

VSS_V5

VSS_V7

VSS_V9
VSS_V23
VSS_V25
VSS_V27
VSS_V29
VSS_V31

VSS_W2

VSS_W4
VSS_W24
VSS_W26
VSS_W28
VSS_W30

VSS_Y1

VSS_Y5

VSS_Y7
VSS_Y13
VSS_Y19
VSS_Y25
VSS_Y31
VSS_AA2
VSS_AA9

VSS_AA15
VSS_AA17
VSS_AA23
VSS_AA30

VSS_AB1
VSS_AB5

VSS_AB11
VSS_AB21
VSS_AB27
VSS_AB31

VSS_AC2
VSS_AC7

VSS_AC13
VSS_AC19
VSS_AC25

VSS_AD3
VSS_AD9

VSS_AD15
VSS_AD17
VSS_AD23
VSS_AD31

VSS_AE2

VSS_AE11
VSS_AE21
VSS_AE27

N6
N8
N24
N26
N28
N30
P1
P3
P5
P7
P9
P23
P25
P27
P29
P31
R2
R4
R6
R8
R24
R26
R28
R30
T1
T3
T5
T7
T9
T23
T25
T27
T29
T31
U2
U4
U6
U8
U24
U26
U28
U30
V1
V3
V5
V7
V9
V23
V25
V27
V29
V31
W2
W4
W24
W26
W28
W30
Y1
Y5
Y7
Y13
Y19
Y25
Y31
AA2
AA9
AA15
AA17
AA23
AA30
AB1
AB5
AB11
AB21
AB27
AB31
AC2
AC7
AC13
AC19
AC25
AD3
AD9
AD15
AD17
AD23
AD31
AE2
AE11
AE21
AE27

11
12
11
12

5,46

15
15

12
12
12
12

11
11
11
11
11
11
11
11
11

11

11

45
45

15

5,11,12

15

12,15
12,15
12,15
12,15
12,15
12,15

12,15

15

15
12,15
12,15

H1_ODTEN
H1_SLEW_CTRL
H1_BOOTSEL
H1_OPTIMIZED

H1_CPU_PRES_N
H1_BSEL0
H1_BSEL1

H1_COMP0
H1_COMP1
H1_COMP2
H1_COMP3

H1_TESTHI0
H1_TESTHI1
H1_TESTHI2
H1_TESTHI3
H1_TESTHI4
H1_TESTHI5
H1_TESTHI6
H1_TESTHI7
H1_TESTHI8

H1_GTLREF01

H1_GTLREF23

H1_THRM_AN
H1_THRM_CA
NC_H1_PKG_ID

H1_PROCHOT_N
H_FORCEPR_N
H1_THERMTRIP_N

H_BPM0_N
H_BPM1_N
H_BPM2_N
H_BPM3_N
H_BPM4_N
H_BPM5_N

ITP_TCK
ITP_TDI_H1
ITP_TDO_H1
ITP_TMS
ITP_TRST_N

+CPU_VTT

+CPU_VTT

SUB=SUB*_4M319

Place @ CPU1

R1526

1 2

51

1 2

R1528

R1530

1 2

R1601

100-1%

R1597

49.9-1%

R60

301-1%

51

51

21

1 2

21

1 2

49.9-1%

21

21

H_VTT_PWRGOOD

R1531

51

R1527

51

R1529

51

R1600

100-1%

R1596

PROC_1

B5

ODTEN

AC30

AD16

AC28

21

21

SLEW_CTRL

G7

BOOT_SELECT

C1

OPTIMIZED/COMPAT

A3

SKTOCC

AA3

BSEL0

AB3

BSEL1

COMP0

E16

COMP1
COMP2

D25

COMP3

W6

TESTHI0

W7

TESTHI1

W8

TESTHI2

Y6

TESTHI3

AA7

TESTHI4

AD5

TESTHI5

AE5

TESTHI6

A26

TESTHI7

Y29

TESTHI8

W23

GTLREF0

W9

GTLREF1

F23

GTLREF2

F9 AA28

GTLREF3 NC_AA28

Y27

THERMDA

Y28

THERMDC

AE4

SMB_PRT

B25

PROCHOT

A15

FORCEPR

F26

THRMTRIP

F6

BPM0

F8

BPM1

E7

BPM2

F5

BPM3

E8

BPM4

E4

BPM5

E24

TCK

C24

TDI

E25

TDO

A25

TMS

F24

TRST

NOCONA 667MHz/ 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 2 OF 4

H_BPM0_N

H_BPM1_N

H_BPM2_N

H_BPM3_N

H_BPM4_N

H_BPM5_N

H1_COMP2

H1_COMP3

H1_COMP0

H1_COMP1

5,12

12,15

12,15

12,15

12,15

12,15

12,15

12

12

12

12

12

12

VID0
VID1
VID2
VID3
VID4
VID5

VCCPLL

VCCIOPLL

VCCA
VSSA

VCCSENSE
VSSSENSE

PWRGOOD

RSVD_A16

RSVD_W3
RSVD_Y3

RSVD_AC1
RSVD_AE15
RSVD_AE16
RSVD_AE28
RSVD_AE29

NC_AA29
NC_AB28
NC_AB29
NC_AC29
NC_AD28
NC_AD29

VTTEN

VIDPWRGD

VTT_A4
VTT_B4

VTT_B12

VTT_C5
VTT_C10
VTT_E12
VTT_F10
VTT_Y10

VTT_AA12
VTT_AC10
VTT_AD12

H1_SLEW_CTRL

H1_OPTIMIZED

F3
E3
D3
C3
B3
A1

AD1
AD4

AB4
AA5

B27
D26

AB7

A16
W3
Y3
AC1
AE15
AE16
AE28
AE29

AA29
AB28
AB29
AC29
AD28
AD29

E1
B1

A4
B4
B12
C5
C10
E12
F10
Y10
AA12
AC10
AD12

H1_VID0
H1_VID1
H1_VID2
H1_VID3
H1_VID4
H1_VID5

V_1P5_H1_VCCPLL

V_VTT_H1_VCCA
V_VTT_H1_VSSA

H1_VCCSENSE
H1_VSSSENSE

H_PWRGOOD

H_TEST_BUS
NC_H1_W3
NC_H1_Y3
NC_H1_AC1
NC_H1_AE15
NC_H1_AE16
NC_H1_AE28
NC_H1_AE29

NC_H1_AA28
NC_H1_AA29
NC_H1_AB28
NC_H1_AB29
NC_H1_AC29
NC_H1_AD28
NC_H1_AD29

H1_VTT_EN
H_VTT_PWRGOOD

+CPU_VTT

+CPU_VTT

51

0-5%

NP

21

R1524

X

NP

21

R1525

X

NP

21

R1523

X

NP

21

R1585

X

5151

7
7
7
7
7
7

11

11
11

X00_GT_052203

7

X00_TJ_061803

7

X00_GT_052203

11,12,33

11,12

5
5,12

11
12
11
12

5,46

15
15

12
12
12
12

11
11
11
11
11
11
11
11
11

11

11

45
45

15

5,11,12

15

12,15
12,15
12,15
12,15
12,15
12,15

12,15

15

15
12,15
12,15

+CPU_VTT

H2_ODTEN
H2_SLEW_CTRL
H2_BOOTSEL
H2_OPTIMIZED

H2_CPU_PRES_N
H2_BSEL0
H2_BSEL1

H2_COMP0
H2_COMP1
H2_COMP2
H2_COMP3

H2_TESTHI0
H2_TESTHI1
H2_TESTHI2
H2_TESTHI3
H2_TESTHI4
H2_TESTHI5
H2_TESTHI6
H2_TESTHI7
H2_TESTHI8

H2_GTLREF01

H2_GTLREF23

H2_THRM_AN
H2_THRM_CA
NC_H2_PKG_ID

H2_PROCHOT_N
H_FORCEPR_N
H2_THERMTRIP_N

H_BPM0_N
H_BPM1_N
H_BPM2_N
H_BPM3_N
H_BPM4_N
H_BPM5_N

ITP_TCK
ITP_TDI_H2
ITP_TDO_H2
ITP_TMS
ITP_TRST_N

SUB=SUB*_4M319

Place @ CPU2

R1602

1 2

100-1%

R1599

1 2

49.9-1%

100-1%

49.9-1%

R1603

R1598

21

21

B5

AC30

G7
C1

A3
AA3
AB3

AD16

E16

AC28

D25

W6

W7

W8

Y6
AA7
AD5
AE5
A26
Y29

W23

W9
F23

Y27
Y28
AE4

B25
A15
F26

F6

F8

E7

F5

E8

E4

E24
C24
E25
A25
F24

PROC_2

ODTEN
SLEW_CTRL
BOOT_SELECT
OPTIMIZED/COMPAT

SKTOCC
BSEL0
BSEL1

COMP0
COMP1
COMP2
COMP3

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8

GTLREF0
GTLREF1
GTLREF2
GTLREF3 NC_AA28

THERMDA
THERMDC
SMB_PRT

PROCHOT
FORCEPR
THRMTRIP

BPM0
BPM1
BPM2
BPM3
BPM4
BPM5

TCK
TDI
TDO
TMS
TRST

NOCONA 667MHz/ 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 2 OF 4

H2_COMP2

H2_COMP3

H2_COMP0

H2_COMP1

12

12

12

12

VID0
VID1
VID2
VID3
VID4
VID5

VCCPLL

VCCIOPLL

VCCA
VSSA

VCCSENSE
VSSSENSE

PWRGOOD

RSVD_A16

RSVD_W3
RSVD_Y3

RSVD_AC1
RSVD_AE15
RSVD_AE16
RSVD_AE28
RSVD_AE29

NC_AA29
NC_AB28
NC_AB29
NC_AC29
NC_AD28
NC_AD29

VTTEN

VIDPWRGD

VTT_A4
VTT_B4

VTT_B12

VTT_C5
VTT_C10
VTT_E12
VTT_F10
VTT_Y10

VTT_AA12
VTT_AC10
VTT_AD12

12

12

F3
E3
D3
C3
B3
A1

AD1
AD4

AB4
AA5

B27
D26

AB7

A16
W3
Y3
AC1
AE15
AE16
AE28
AE29

AA28F9
AA29
AB28
AB29
AC29
AD28
AD29

E1
B1

A4
B4
B12
C5
C10
E12
F10
Y10
AA12
AC10
AD12

H2_SLEW_CTRL

H2_OPTIMIZED

H2_VID0
H2_VID1
H2_VID2
H2_VID3
H2_VID4
H2_VID5

V_1P5_H2_VCCPLL

V_VTT_H2_VCCA
V_VTT_H2_VSSA

H2_VCCSENSE
H2_VSSSENSE

H_PWRGOOD

H_TEST_BUS
NC_H2_W3
NC_H2_Y3
NC_H2_AC1
NC_H2_AE15
NC_H2_AE16
NC_H2_AE28
NC_H2_AE29

NC_H2_AA28
NC_H2_AA29
NC_H2_AB28
NC_H2_AB29
NC_H2_AC29
NC_H2_AD28
NC_H2_AD29

H2_VTT_EN
H_VTT_PWRGOOD

+CPU_VTT

+CPU_VTT

NP

R1540

X

1 2

R1586

1 2

51

0-5%

NP

R1539

X

1 2

NP

R1538

X

1 2

8
8
8
8
8
8

11

11
11

X00_GT_052203

8

X00_TJ_061803

8

X00_GT_052203

11,12,33

11,12

5
5,12

51 51

1

2

3

4 4

INC.

ROUND ROCK,TEXAS

PROCESSOR 1 & 2

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL

ECAD: place resistor near processor

AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

12 OF 60

DC

subsys done

A B

B D

+CPU_VID1

CA

+CPU_VID1

ROOM=PROC_1

12-16-2004_19:51

x00_tj_041003

1

2

3

+CPU_VID1

SUB=SUB*_4M319

A2

A8
A14
A18
A24
A28
A30

B6
B20
B26
B29
B31

C2

C4
C16
C22
C28
C30

D1

D8
D14
D18
D24
D29
D31

E2

E6
E20
E26
E28
E30

F1

F4
F16
F22
F29
F31

G2

G4

G6

G8
G24
G26
G28
G30

H1

H3

H5

H7

H9
H23
H25
H27
H29
H31

J2

J4

J6

J8
J24
J26
J28
J30

K1

K3

K5

K7

K9
K23
K25
K27
K29
K31

L2

L4

L6

L8
L24
L26
L28
L30

M1

M3

M5

M7

M9
M23
M25
M27
M29
M31

PROC_1

VCC_A2
VCC_A8
VCC_A14
VCC_A18
VCC_A24
VCC_A28
VCC_A30
VCC_B6
VCC_B20
VCC_B26
VCC_B29
VCC_B31
VCC_C2
VCC_C4
VCC_C16
VCC_C22
VCC_C28
VCC_C30
VCC_D1
VCC_D8
VCC_D14
VCC_D18
VCC_D24
VCC_D29
VCC_D31
VCC_E2
VCC_E6
VCC_E20
VCC_E26
VCC_E28
VCC_E30
VCC_F1
VCC_F4
VCC_F16
VCC_F22
VCC_F29
VCC_F31
VCC_G2
VCC_G4
VCC_G6
VCC_G8
VCC_G24
VCC_G26
VCC_G28
VCC_G30
VCC_H1
VCC_H3
VCC_H5
VCC_H7
VCC_H9
VCC_H23
VCC_H25
VCC_H27
VCC_H29
VCC_H31
VCC_J2
VCC_J4
VCC_J6
VCC_J8
VCC_J24
VCC_J26
VCC_J28
VCC_J30
VCC_K1
VCC_K3
VCC_K5
VCC_K7
VCC_K9
VCC_K23
VCC_K25
VCC_K27
VCC_K29
VCC_K31
VCC_L2
VCC_L4
VCC_L6
VCC_L8
VCC_L24
VCC_L26
VCC_L28
VCC_L30
VCC_M1
VCC_M3
VCC_M5
VCC_M7
VCC_M9
VCC_M23
VCC_M25
VCC_M27
VCC_M29
VCC_M31

NOCONA 667MHz / 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 3 OF 4

VCC_N23
VCC_N25
VCC_N27
VCC_N29
VCC_N31

VCC_P24
VCC_P26
VCC_P28
VCC_P30

VCC_R23
VCC_R25
VCC_R27
VCC_R29
VCC_R31

VCC_T24
VCC_T26
VCC_T28
VCC_T30

VCC_U23
VCC_U25
VCC_U27
VCC_U29
VCC_U31

VCC_V24
VCC_V26
VCC_V28
VCC_V30

VCC_W25
VCC_W27
VCC_W29
VCC_W31

VCC_Y16
VCC_Y22
VCC_Y30
VCC_AA1
VCC_AA4

VCC_AA6
VCC_AA20
VCC_AA26
VCC_AA31

VCC_AB2

VCC_AB8
VCC_AB14
VCC_AB18
VCC_AB24
VCC_AB30

VCC_AC3

VCC_AC4
VCC_AC16
VCC_AC22
VCC_AC31

VCC_AD2

VCC_AD6
VCC_AD20
VCC_AD26
VCC_AD30

VCC_AE3

VCC_AE8
VCC_AE14
VCC_AE18
VCC_AE24

VCC_N1
VCC_N3
VCC_N5
VCC_N7
VCC_N9

VCC_P2
VCC_P4
VCC_P6
VCC_P8

VCC_R1
VCC_R3
VCC_R5
VCC_R7
VCC_R9

VCC_T2
VCC_T4
VCC_T6
VCC_T8

VCC_U1
VCC_U3
VCC_U5
VCC_U7
VCC_U9

VCC_V2
VCC_V4
VCC_V6
VCC_V8

VCC_W1

VCC_Y2

N1
N3
N5
N7
N9
N23
N25
N27
N29
N31
P2
P4
P6
P8
P24
P26
P28
P30
R1
R3
R5
R7
R9
R23
R25
R27
R29
R31
T2
T4
T6
T8
T24
T26
T28
T30
U1
U3
U5
U7
U9
U23
U25
U27
U29
U31
V2
V4
V6
V8
V24
V26
V28
V30
W1
W25
W27
W29
W31
Y2
Y16
Y22
Y30
AA1
AA4
AA6
AA20
AA26
AA31
AB2
AB8
AB14
AB18
AB24
AB30
AC3
AC4
AC16
AC22
AC31
AD2
AD6
AD20
AD26
AD30
AE3
AE8
AE14
AE18
AE24

+CPU_VID1

+CPU_VID2 +CPU_VID2

PROC_2

N1
N3
N5
N7
N9
N23
N25
N27
N29
N31
P2
P4
P6
P8
P24
P26
P28
P30
R1
R3
R5
R7
R9
R23
R25
R27
R29
R31
T2
T4
T6
T8
T24
T26
T28
T30
U1
U3
U5
U7
U9
U23
U25
U27
U29
U31
V2
V4
V6
V8
V24
V26
V28
V30
W1
W25
W27
W29
W31
Y2
Y16
Y22
Y30
AA1
AA4
AA6
AA20
AA26
AA31
AB2
AB8
AB14
AB18
AB24
AB30
AC3
AC4
AC16
AC22
AC31
AD2
AD6
AD20
AD26
AD30
AE3
AE8
AE14
AE18
AE24

SUB=SUB*_4M319

A2

A8
A14
A18
A24
A28
A30

B6
B20
B26
B29
B31

C2

C4
C16
C22
C28
C30

D1

D8
D14
D18
D24
D29
D31

E2

E6
E20
E26
E28
E30

F1

F4
F16
F22
F29
F31

G2

G4

G6

G8
G24
G26
G28
G30

H1

H3

H5

H7

H9
H23
H25
H27
H29
H31

J2

J4

J6

J8
J24
J26
J28
J30

K1

K3

K5

K7

K9
K23
K25
K27
K29
K31

L2

L4

L6

L8
L24
L26
L28
L30

M1

M3

M5

M7

M9
M23
M25
M27
M29
M31

VCC_A2
VCC_A8
VCC_A14
VCC_A18
VCC_A24
VCC_A28
VCC_A30
VCC_B6
VCC_B20
VCC_B26
VCC_B29
VCC_B31
VCC_C2
VCC_C4
VCC_C16
VCC_C22
VCC_C28
VCC_C30
VCC_D1
VCC_D8
VCC_D14
VCC_D18
VCC_D24
VCC_D29
VCC_D31
VCC_E2
VCC_E6
VCC_E20
VCC_E26
VCC_E28
VCC_E30
VCC_F1
VCC_F4
VCC_F16
VCC_F22
VCC_F29
VCC_F31
VCC_G2
VCC_G4
VCC_G6
VCC_G8
VCC_G24
VCC_G26
VCC_G28
VCC_G30
VCC_H1
VCC_H3
VCC_H5
VCC_H7
VCC_H9
VCC_H23
VCC_H25
VCC_H27
VCC_H29
VCC_H31
VCC_J2
VCC_J4
VCC_J6
VCC_J8
VCC_J24
VCC_J26
VCC_J28
VCC_J30
VCC_K1
VCC_K3
VCC_K5
VCC_K7
VCC_K9
VCC_K23
VCC_K25
VCC_K27
VCC_K29
VCC_K31
VCC_L2
VCC_L4
VCC_L6
VCC_L8
VCC_L24
VCC_L26
VCC_L28
VCC_L30
VCC_M1
VCC_M3
VCC_M5
VCC_M7
VCC_M9
VCC_M23
VCC_M25
VCC_M27
VCC_M29
VCC_M31

NOCONA 667MHz / 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 3 OF 4

VCC_AA20
VCC_AA26
VCC_AA31

VCC_AB14
VCC_AB18
VCC_AB24
VCC_AB30

VCC_AC16
VCC_AC22
VCC_AC31

VCC_AD20
VCC_AD26
VCC_AD30

VCC_AE14
VCC_AE18
VCC_AE24

VCC_N1
VCC_N3
VCC_N5
VCC_N7

VCC_N9
VCC_N23
VCC_N25
VCC_N27
VCC_N29
VCC_N31

VCC_P2

VCC_P4

VCC_P6

VCC_P8
VCC_P24
VCC_P26
VCC_P28
VCC_P30

VCC_R1

VCC_R3

VCC_R5

VCC_R7

VCC_R9
VCC_R23
VCC_R25
VCC_R27
VCC_R29
VCC_R31

VCC_T2

VCC_T4

VCC_T6

VCC_T8
VCC_T24
VCC_T26
VCC_T28
VCC_T30

VCC_U1

VCC_U3

VCC_U5

VCC_U7

VCC_U9
VCC_U23
VCC_U25
VCC_U27
VCC_U29
VCC_U31

VCC_V2

VCC_V4

VCC_V6

VCC_V8
VCC_V24
VCC_V26
VCC_V28
VCC_V30

VCC_W1
VCC_W25
VCC_W27
VCC_W29
VCC_W31

VCC_Y2
VCC_Y16
VCC_Y22
VCC_Y30
VCC_AA1
VCC_AA4
VCC_AA6

VCC_AB2
VCC_AB8

VCC_AC3
VCC_AC4

VCC_AD2
VCC_AD6

VCC_AE3
VCC_AE8

X00_GT_052803

12

+

C536

+CPU_VID2

12

C294

ECAD: Place 7 caps on each side of the each CPU

+CPU_VID1

+CPU_VID2

+CPU_VTT

SUB*_K1098

560uF

4V-20%

SUB*_K1098

+

560uF

4V-20%

SUB*_D2341

10uF 6.3V

21

10uF 6.3V

1 2

10uF 6.3V

21

SUB*_D2341

10uF 6.3V

21

10uF 6.3V

21

10uF 6.3V

21

C537

C547

C1526

C1546

C1539

C1510

C1540

C1545

SUB*_K1098

12

+

12

+

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

12

+

SUB*_K1098

4V-20%

C540

560uF

12

+

560uF

4V-20%

C538

SUB*_K1098

12

+

560uF

4V-20%

C539

ROOM=PROC_2

SUB*_K1098

560uF

ECAD: Place on back side of planar

10uF 6.3V

C548

4V-20%

SUB*_D2341

C1520

21

ECAD: Place these 12 caps in CPU socket cavity

C1547

1 2

ECAD: Place on back side of planar

C1538

21

SUB*_D2341

C1509

21

ECAD: Place these 12 caps in CPU socket cavity

C1534

21

ECAD: Place on back side of planar

C1516

21

ECAD: Place on back side of planar

SUB*_K1098

12

+

560uF

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

C542

4V-20%

SUB*_D2341

C1525

21

C1548

1 2

C1528

21

SUB*_D2341

C1508

21

C1535

21

C1517

21

SUB*_K1098

12

+

560uF

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

C543

4V-20%

SUB*_D2341

C1521

21

C1549

1 2

C1529

21

SUB*_D2341

C1507

21

C1541

21

C1518

21

12

+

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

SUB*_K1098

560uF

SUB*_K1098

560uF

21

21

21

21

C545

4V-20%

4V-20%

SUB*_D2341

C1522

21

C1519

C1506

SUB*_D2341

C1530

C1536

C1515

1 2

SUB*_K1098

12

+

12

+

C549

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

21

10uF 6.3V

12

C546

560uF

4V-20%

SUB*_K1098

4V-20%

C1527

C1544

C1502

C1531

C1537

C1511

C544

560uF

SUB*_D2341

21

21

21

SUB*_D2341

21

1 2

SUB*_K1098

+

560uF

4V-20%

SUB*_K1098

12

+

560uF

SUB*_D2341

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

C1523

21

10uF 6.3V

21

21

SUB*_D2341

21

C1556

21

10uF 6.3V

1 2

C550

4V-20%

C1550

C1505

C1532

C1514

SUB*_K1098

12

+

12

+

C541

10uF 6.3V

21

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

21

10uF 6.3V

4V-20%

4V-20%

C1524

C1551

C1542

C1533

C1557

C1512

C551

C552

560uF

SUB*_K1098

560uF

SUB*_D2341

21

21

SUB*_D2341

21

1 2

SUB*_K1098

12

+

560uF

4V-20%

SUB*_K1098

12

+

560uF

4V-20%

SUB*_D2341

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

C732

21

10uF 6.3V

21

C1504

21

SUB*_D2341

C737

21

C1558

21

10uF 6.3V

1 2

X00_GT_052203

C290

12

+

C553

10uF 6.3V

C1552

C1513

10uF 6.3V

X00_GT_052203

10uF 6.3V

10uF 6.3V

10uF 6.3V

10uF 6.3V

SUB*_K1098

12

+

560uF

4V-20%

SUB*_K1098

560uF

4V-20%

SUB*_D2341

C733

21

C1553

21

C1503

21

SUB*_D2341

C738

21

C1559

21

C1543

1 2

C292

12

+

C297

10uF 6.3V

10uF 6.3V

10uF 6.3V

SUB*_D2341

10uF 6.3V

21

10uF 6.3V

21

10uF 6.3V

SUB*_K1098

12

+

560uF

4V-20%

SUB*_K1098

12

C296

560uF

4V-20%

SUB*_D2341

C734

21

C1554

21

C500

21

C739

C1560

21

10uF 6.3V

C511

12

+

C291

SUB*_K1098

+

560uF

4V-20%

SUB*_D2341

10uF 6.3V

21

10uF 6.3V

21

10uF 6.3V

21

SUB*_D2341

10uF 6.3V

C736

21

C1561

21

10uF 6.3V

21

SUB*_K1098

560uF

C735

C1555

C499

C507

C289

4V-20%

12

+

C295

10uF 6.3V

10uF 6.3V

10uF 6.3V

21

10uF 6.3V

SUB*_K1098

12

+

SUB*_K1098

560uF

4V-20%

C1656

21

C497

21

C1657

C508

21

560uF

4V-20%

C293

12

+

C298

10uF 6.3V

21

10uF 6.3V

SUB*_K1098

12

+

560uF

4V-20%

SUB*_K1098

560uF

4V-20%

C498

21

10uF 6.3V

C509

C496

21

10uF 6.3V

1 2

C506

10uF 6.3V

C492

21

10uF 6.3V

1 2

C502

10uF 6.3V

C495

21

10uF 6.3V

1 2

C505

10uF 6.3V

C501

21

10uF 6.3V

1 2

C503

10uF 6.3V

C494

21

10uF 6.3V

1 2

C504

4.0V-20%

4.0V-20%

10uF 6.3V

C493

21

10uF 6.3V

1 2

1 2

330uF

+

+CPU_VID2

330uF

+

21

C510

C413

C428

4.0V-20%
330uF

+

4.0V-20%
330uF

+

4.0V-20%

C414

21

330uF

1 2

C415

+

1

1 2

C516

4.0V-20%
330uF

+

C517

21

2

3

21

4 4

C1496

1 2

C1495

22uF 6.3V

SUB*_C5127

x03b_tj_011903

C1494

1 2

22uF 6.3V

21

C1493

22uF 6.3V

22uF 6.3V

21

C286

C1450

22uF 6.3V

1 2

C1449

1uF 6.3V

1 2

C1391

1uF 6.3V

1 2

21

C1374

0.1uF 16V

0.1uF 16V

C1785

21

0.1uF 16V

X00_GT_062003

INC.

ROUND ROCK,TEXAS

TITLE

PROCESSOR 1 & 2

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL

subsys done

AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

A B

DWG NO.

DATE

DC

D1660

12/16/2004

REV.

A03-00

SHEET

13 OF 60

B D

CA

12-16-2004_19:51

1

1

2

2

3

3

4 4

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

14 OF 60

DC

A B

1

+CPU_VTT

C76

1 2

C304

1 2

0.1uF 16V

1uF

10V-10%

x00_GT_010704

R1913

1 2

100-5%

21

R568

x00_tj_051203

R550

40.2-0.5%

1 2

21

R219

40.2-0.5%

R220

40.2-0.5%

1 2

21

R221

40.2-0.5%

ITP PORT

R222

40.2-0.5%

40.2-0.5%

1 2

a00_tj_052604

ITP_CONN

NP

ROOM=ITP

21

R218

40.2-0.5%

R367

1 2

R4

1.5K-5%
1 2

x00_tj_051203

+3.3V_AUX

75-1%

R1756

1 2

B D

CA

ITP_TDI_H1

FOR JTDO:

+CPU_VTT

Install 1-2 for TWO processor system
Install 2-3 for UNI processor system

x00_tj_091603

21

150-5%

R6001

150-5%

(UNI-PROCESSOR IS WITH PROC_1 INSTALLED ONLY!)

12-16-2004_19:51

ROOMS COMPLETE

1

11,17

H_RST_N

x02_tj_081803

R80

1 2

0-5%

H_BPM0_N

12

H_BPM1_N

12

H_BPM2_N

12

H_BPM3_N

12

H_BPM4_N

12

H_BPM5_N

12

H_RST_ITP_N

CK_167M_ITP_P

3

CK_167M_ITP_N

3

(BPM5DR#)

x00_tj_060403

(FBO)

1
3 4
5 6
7 8

9
11 12
13 14
15 16
17 18
19

X

21 22
23
25

2MM SMT

KEY 26

2

10

20

24
26

K

21

R125

ITP_PWR

680-5%

R160

1 2

27.4-1%

NC_ITP_DBA_N

ITP_DBR_N

ITP_TDI_H1

ITP_TMS

ITP_TRST_N

ITP_TCK

NC_ITP_FBI

ITP_TDO_H2

NC_ITP_26_KEY

12
12
12
12

12,15

PROC_1 PROC_2

ITP_TDO_H1

5

ITP_TDI_H2

TDITDI

JTDO

1

2

3

2

a00_tj_052604

ITP_JPR

NP

1
2
3

X

+CPU_VTT

R126

x00_tj_060403

150-5%

1 2

ITP_TDI_H2
ITP_TDO_H1
ITP_TDO_H2

12
12
12,15

TDO

ITP_TD0_H2

TDO

2

ITP ROUTING DRAWING

H1_THERMTRIP_N

12

+CPU_VTT

21

R277

51

R554

2.7K-5%

x02_tj_092203

Q28

3904

1

21

+3.3V_AUX

21

R374

3

2

1K-1%

H1_THERMTRIP_3V

ROOM=PROC_1

5,46

12

H1_PROCHOT_N

+CPU_VTT

R308

1 2

51

R556

2.7K-5%

+3.3V

+CPU_VTT

21

21

R266

R419

2.7K-5%

Q68

3904

1

21

R376

1K-1%

H1_PROCHOT_3V

Q30

3904

1

21

3

2

5

H1_IERR_N

11

51

+3.3V

21

R415

1K-1%

H1_IERR_3V

3

2

11,17

5,46

H_MCERR_N

NP*

R423

1 2

2.7K-5%

NP*

Q71

3904

1

NP*

+3.3V

R417

1 2

R586

1K-1%

NC_H_MCERR_3V

3

x03b_sd

2

12

H1_BSEL0

511-1%

1 2

R603

2.7K-5%

ROOM = PROC_1

+CPU_VTT +3.3V+CPU_VTT +3.3V

21

R595

Q61

3904 3904

1

21

1K-1%

H1_BSEL0_3V_N

3

2

5

H1_BSEL1

12

R585

1 2

511-1%

R602

2.7K-5%

21

R594

Q53

1

21

1K-1%

H1_BSEL1_3V_N

3

2

5

3

H2_THERMTRIP_N

12

ECAD: the components within each circuit need to stay clumped

+CPU_VTT

ROOM=PROC_2

x02_tj_092203

+CPU_VTT

R292

1 2

51

R555

1 2

2.7K-5%

Q29

3904

1

+3.3V_AUX

R375

1 2

3

2

1K-1%

H2_THERMTRIP_3V

5,46

H2_PROCHOT_N

12

51

R1510

21

R557

1 2

2.7K-5%

Q31

3904

1

+3.3V

R377

1K-1%

1 2

H2_PROCHOT_3V

3

2

3

+CPU_VTT

+3.3V

ROOM=PROC_2

21

51

R312

5

H2_IERR_N

11

1 2

Q69

R420

2.7K-5%

3904

21

R416

1

1K-1%

H2_IERR_3V

3

2

5,46

R588

1 2

511-1%

ROOM = PROC_2

21

R597

1K-1%

H2_BSEL0_3V_N

5

+CPU_VTT +3.3V+CPU_VTT +3.3V

R587

1 2

511-1%

21

R596

1K-1%

H2_BSEL1_3V_N

5

12

H2_BSEL0

R605

2.7K-5%

Q102

1

21

3

R604

H2_BSEL1

12

2.7K-5%

2

Q64

39043904

1

21

3

2

INVERTING LEVEL TRANSLATION

4 4

INC.

ROUND ROCK,TEXAS

TITLE

ITP & GTL LEVEL TRANSLATION

subsys done

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

DC

REV.

A03-00

SHEET

15 OF 60

B D

CA

+1.8V

19

ROOM = DDR_TERM

21
21

C360

21

.1uF

10V-10%

C359

1

RN28

2
3

71.5

4

8
7
6
5

DDR2B_A0

DDR2B_A0
DDR2B_A10
DDR2B_A10

16,21
16,21
16,21
16,21

1%

1

1

RN29

2
3

71.5

4

8
7
6
5

DDR2B_A1

DDR2B_A1

DDR2B_A2

DDR2B_A2

16,21
16,21
16,21
16,21

1%

1

RN30

2
3

71.5

4

8
7
6
5

DDR2B_A5

DDR2B_A5

DDR2B_A6

DDR2B_A6

16,21
16,21
16,21
16,21

1%

1

RN31

2
3

71.5

4

8
7
6
5

DDR2B_A7

DDR2B_A7

DDR2B_A8

DDR2B_A8

16,21
16,21
16,21
16,21

1%

1

RN32

2
3

71.5

4

8
7
6
5

DDR2B_A4

DDR2B_A4

DDR2B_A3

DDR2B_A3

16,21
16,21
16,21
16,21

1%

1

RN33

2
3

71.5

4

8
7
6
5

DDR2B_A11
DDR2B_A11

DDR2B_A9

DDR2B_A9

16,21
16,21
16,21
16,21

1%

1

RN36

2
3

71.5

4

8
7
6
5

DDR2B_BA2
DDR2B_BA2
DDR2B_A12
DDR2B_A12

16,21
16,21
16,21
16,21

1%

1

RN34

2
3

71.5

4

8
7
6
5

DDR2B_BA1
DDR2B_BA1
DDR2B_BA0
DDR2B_BA0

16,21
16,21
16,21
16,21

1%

2

1

RN35

2
3

71.5

4

8
7
6
5

DDR2B_CS0_N
DDR2B_CS0_N

DDR2B_CAS_N
DDR2B_CAS_N

16,21
16,21

16,21
16,21

1%

1

RN39

2
3

71.5

4

8
7
6
5

DDR2B_RAS_N
DDR2B_RAS_N

DDR2B_A13
DDR2B_A13

16,21
16,21
16,21
16,21

1%

DDR2B_CS3_N
DDR2B_CS3_N
DDR2B_CS2_N
DDR2B_CS2_N

x00_tj_061903

DDR2B_CS7_N
DDR2B_CS7_N

DDR2B_WE_N
DDR2B_WE_N

16,21
16,21
16,21
16,21

16,21
16,21

16,21
16,21

x00_tj_051203

x00_tj_051203

1

RN37

2
3

71.5

4

8
7
6
5

1%

1

RN38

2
3

71.5

4

8
7
6
5

1%

1

RN43

2
3

71.5

4

8
7
6
5

DDR2B_CS1_N
DDR2B_CS1_N
DDR2B_CS6_N
DDR2B_CS6_N

16,21
16,21
16,21
16,21

1%

x00_tj_051203

1

RN42

2
3

71.5

4

8
7
6
5

DDR2B_CS5_N
DDR2B_CS5_N
DDR2B_CS4_N
DDR2B_CS4_N

16,21
16,21
16,21
16,21

1%

1

RN41

2
3

71.5

4

8
7
6
5

DDR2_CKE4
DDR2_CKE4
DDR2_CKE2
DDR2_CKE2

16,20
16,20
16,20
16,20

1%

DDR2_CKE6
DDR2_CKE6
DDR2_CKE0
DDR2_CKE0

16,20
16,20
16,20
16,20

3

1

RN40

2
3

71.5

4

8
7
6
5

1%

R380

1 2

100-1%

R382

1 2

100-1%

R385

1 2

100-1%

R387

1 2

100-1%

R389

R381

21

100-1%

R383

21

100-1%

R386

21

100-1%

R388

21

100-1%

1 2

NP*

NP*

R390

100-1%

R392

100-1%

R394

100-1%

R396

100-1%

21

21

21

NP*

21

NP*

100-1%

R391

1 2

100-1%

R393

1 2

100-1%

R395

1 2

100-1%

4 4

CK_200M_DIMMB3_P

CK_200M_DIMMB3_P

CK_200M_DIMMB3_N

CK_200M_DIMMB3_N

CK_200M_DIMMB1_P

CK_200M_DIMMB1_P

CK_200M_DIMMB1_N

CK_200M_DIMMB1_N

CK_200M_DIMMB2_P

CK_200M_DIMMB2_P

CK_200M_DIMMB2_N

CK_200M_DIMMB2_N

CK_200M_DIMMB0_P

CK_200M_DIMMB0_P

CK_200M_DIMMB0_N

CK_200M_DIMMB0_N

16,21

16,21

16,21

16,21

16,21

16,21

16,21

16,21

16,21

16,21

16,21

16,21

16

16

16

16

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

RN59

71.5
1%

RN58

71.5
1%

RN57

71.5
1%

RN56

71.5
1%

RN55

71.5
1%

RN54

71.5
1%

RN53

71.5
1%

RN52

71.5
1%

RN51

71.5
1%

RN44

71.5
1%

RN45

71.5
1%

RN46

71.5
1%

RN47

71.5
1%

RN50

71.5
1%

RN49

71.5
1%

RN48

71.5
1%

R397

100-1%

R399

100-1%

R401

100-1%

R403

100-1%

R405

100-1%

R409

100-1%

R411

100-1%

R413

100-1%

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

21

1 2

21

1 2

21

1 2

21

1 2

21

1 2

21

1 2

21

NP*

1 2

21

NP*

1 2

R398

100-1%

R400

100-1%

R402

100-1%

R404

100-1%

R408

100-1%

R410

100-1%

R412

100-1%

R414

100-1%

NP*

NP*

DDR2A_A10
DDR2A_A10

DDR2A_A0
DDR2A_A0

DDR2A_A2
DDR2A_A2
DDR2A_A1
DDR2A_A1

DDR2A_A6
DDR2A_A6
DDR2A_A5
DDR2A_A5

DDR2A_A8
DDR2A_A8
DDR2A_A7
DDR2A_A7

DDR2A_A3
DDR2A_A3
DDR2A_A4
DDR2A_A4

DDR2A_A9

DDR2A_A9
DDR2A_A11
DDR2A_A11

DDR2A_A12
DDR2A_A12
DDR2A_BA2
DDR2A_BA2

DDR2A_BA0
DDR2A_BA0
DDR2A_BA1
DDR2A_BA1

DDR2A_CAS_N
DDR2A_CAS_N
DDR2A_CS0_N
DDR2A_CS0_N

DDR2A_WE_N

DDR2A_WE_N
DDR2A_RAS_N
DDR2A_RAS_N

DDR2A_CS3_N
DDR2A_CS3_N
DDR2A_CS2_N
DDR2A_CS2_N

DDR2A_CS7_N
DDR2A_CS7_N

DDR2A_A13
DDR2A_A13

DDR2A_CS6_N
DDR2A_CS6_N

DDR2A_CS1_N
DDR2A_CS1_N

DDR2A_CS5_N
DDR2A_CS5_N
DDR2A_CS4_N
DDR2A_CS4_N

DDR2_CKE1
DDR2_CKE1
DDR2_CKE7
DDR2_CKE7

DDR2_CKE5
DDR2_CKE5
DDR2_CKE3
DDR2_CKE3

CK_200M_DIMMA3_P

CK_200M_DIMMA3_P

CK_200M_DIMMA3_N

CK_200M_DIMMA3_N

CK_200M_DIMMA1_P

CK_200M_DIMMA1_P

CK_200M_DIMMA1_N

CK_200M_DIMMA1_N

CK_200M_DIMMA2_P

CK_200M_DIMMA2_P

CK_200M_DIMMA2_N

CK_200M_DIMMA2_N

CK_200M_DIMMA0_P

CK_200M_DIMMA0_P

CK_200M_DIMMA0_N

CK_200M_DIMMA0_N

16,20
16,20
16,20
16,20

16,20
16,20
16,20
16,20

16,20
16,20
16,20
16,20

16,20
16,20
16,20
16,20

16,20
16,20
16,20
16,20

16,20
16,20
16,20
16,20

16,20
16,20
16,20
16,20

16,20
16,20
16,20
16,20

16,20
16,20
16,20
16,20

16,20
16,20
16,20
16,20

16,20
16,20
16,20
16,20

16,20
16,20

16,20
16,20

16,20
16,20

16,20
16,20

16,20
16,20
16,20
16,20

16,21
16,21
16,21
16,21

16,21
16,21
16,21
16,21

16,20

16,20

16,20

16,20

16,20

16,20

16,20

16,20

16,20

16,20

16,20

16,20

16

16

16

16

21

.1uF

10V-10%

C364

21

.1uF

10V-10%

C357

21

.1uF

10V-10%

C355

21

.1uF

10V-10%

C353

21

.1uF

10V-10%

C418

21

.1uF

10V-10%

C313

21

.1uF

10V-10%

C351

21

.1uF

10V-10%

C341

21

.1uF

10V-10%

C339

21

.1uF

10V-10%

C322

21

.1uF

10V-10%

C325

21

.1uF

10V-10%

C316

21

.1uF

10V-10%

C369

1 2

.1uF

10V-10%

C371

1 2

.1uF

10V-10%

C373

1 2

.1uF

10V-10%

C375

1 2

.1uF

10V-10%

C374

1 2

.1uF

10V-10%

C366

21

.1uF

10V-10%

CAD Notes:

1) Place one cap near every 2 signals

2) Place 10uF caps at each end of row

C358

.1uF

10V-10%

C361

.1uF

10V-10%

C362

.1uF

10V-10%

C356

.1uF

10V-10%

C354

.1uF

10V-10%

C352

.1uF

10V-10%

C419

.1uF

10V-10%

C312

.1uF

10V-10%

C342

.1uF

10V-10%

C340

.1uF

10V-10%

C321

.1uF

10V-10%

C363

.1uF

10V-10%

C323

.1uF

10V-10%

C315

.1uF

10V-10%

C370

1 2

.1uF

10V-10%

C372

1 2

.1uF

10V-10%

C314

1 2

.1uF

10V-10%

C368

1 2

.1uF

10V-10%

C365

1 2

.1uF

10V-10%

C367

1 2

.1uF

10V-10%

21

x00_tj_060503

C73

21

1 2

10uF 6.3V

21

C79

21

21

10uF 6.3V

21

21

21

21

21

21

21

21

21

21

16,21
16,21
16,21
16,21
16,21
16,21

21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21

16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21

16,21
16,21
16,21

16,21
16,21
16,21

16,20
16,21
16,20
16,21

16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21

16
16

23

2U/5U Heatsink assembly

DDR2B_DQS0_P
DDR2B_DQS0_N
DDR2B_DQS1_P
DDR2B_DQS1_N
DDR2B_DQS2_P
DDR2B_DQS2_N
DDR2B_DQS3_P
DDR2B_DQS3_N
DDR2B_DQS4_P
DDR2B_DQS4_N
DDR2B_DQS5_P
DDR2B_DQS5_N
DDR2B_DQS6_P
DDR2B_DQS6_N
DDR2B_DQS7_P
DDR2B_DQS7_N
DDR2B_DQS8_P
DDR2B_DQS8_N
DDR2B_DQS9_P
DDR2B_DQS9_N
DDR2B_DQS10_P
DDR2B_DQS10_N
DDR2B_DQS11_P
DDR2B_DQS11_N
DDR2B_DQS12_P
DDR2B_DQS12_N
DDR2B_DQS13_P
DDR2B_DQS13_N
DDR2B_DQS14_P
DDR2B_DQS14_N
DDR2B_DQS15_P
DDR2B_DQS15_N
DDR2B_DQS16_P
DDR2B_DQS16_N
DDR2B_DQS17_P
DDR2B_DQS17_N

DDR2B_A0
DDR2B_A1
DDR2B_A2
DDR2B_A3
DDR2B_A4
DDR2B_A5
DDR2B_A6
DDR2B_A7
DDR2B_A8
DDR2B_A9
DDR2B_A10
DDR2B_A11
DDR2B_A12
DDR2B_A13

DDR2B_BA0
DDR2B_BA1
DDR2B_BA2

DDR2B_WE_N
DDR2B_CAS_N

DDR2B_RAS_N

DDR2_CKE4
DDR2_CKE5

DDR2_CKE6
DDR2_CKE7

DDR2B_CS0_N
DDR2B_CS1_N
DDR2B_CS2_N
DDR2B_CS3_N
DDR2B_CS4_N
DDR2B_CS5_N
DDR2B_CS6_N
DDR2B_CS7_N

CK_200M_DIMMB1_P
CK_200M_DIMMB1_N
CK_200M_DIMMB2_P
CK_200M_DIMMB2_N
CK_200M_DIMMB3_P
CK_200M_DIMMB3_N
CK_200M_DIMMB0_P
CK_200M_DIMMB0_N

DDR2B_MCH_VREF

SUB=SUB*_R7626

1U Heatsink assembly

AM28
AN29
AM22
AN23
AK17
AL17
AK11
AL11

AG2
AH2
AA3
AB4

P1
R2
H3

H1
AK5
AK6

AK29
AL29
AK23
AL23
AN18
AN17
AN12
AN11

AJ1
AH1
AB2
AB1

T2

R3

J3

J2
AM6
AN6

AF7

AE14
AN14
AK14
AD15
AH16
AG17
AD18
AL20
AJ21

AC4

AH22
AH23

U4

AA8
AE7

AM25

W4

W1

Y9

AH26
AJ27
AJ28
AH28

V9

V2

T7

P6

N4

M2

M6

L3

AH7
AJ6
AH6
AG6
AG8
AE8
AK9
AL8

AN4

B_DQS0_P
B_DQS0_N
B_DQS1_P
B_DQS1_N
B_DQS2_P
B_DQS2_N
B_DQS3_P
B_DQS3_N
B_DQS4_P
B_DQS4_N
B_DQS5_P
B_DQS5_N
B_DQS6_P
B_DQS6_N
B_DQS7_P
B_DQS7_N
B_DQS8_P
B_DQS8_N
B_DQS9_P
B_DQS9_N
B_DQS10_P
B_DQS10_N
B_DQS11_P
B_DQS11_N
B_DQS12_P
B_DQS12_N
B_DQS13_P
B_DQS13_N
B_DQS14_P
B_DQS14_N
B_DQS15_P
B_DQS15_N
B_DQS16_P
B_DQS16_N
B_DQS17_P
B_DQS17_N

B_MA0
B_MA1
B_MA2
B_MA3
B_MA4
B_MA5
B_MA6
B_MA7
B_MA8
B_MA9
B_MA10
B_MA11
B_MA12
B_MA13

B_BA0
B_BA1
B_BA2

B_WE
B_CAS
B_RAS

CKE4
CKE5
CKE6
CKE7

B_CS0
B_CS1
B_CS2
B_CS3
B_CS4
B_CS5
B_CS6
B_CS7

B_CMDCLK0_P
B_CMDCLK0_N
B_CMDCLK1_P
B_CMDCLK1_N
B_CMDCLK2_P
B_CMDCLK2_N
B_CMDCLK3_P
B_CMDCLK3_N

B_VREF

INTEL LINDENHURST MCH V0P21

x02_tj_041003
x03_tj_121503
x03b_tj_012004

x00c4_tj_090304

MCH

B_DQ0
B_DQ1
B_DQ2
B_DQ3
B_DQ4
B_DQ5
B_DQ6
B_DQ7

B_DQ8

B_DQ9
B_DQ10
B_DQ11
B_DQ12
B_DQ13
B_DQ14
B_DQ15

B_DQ16
B_DQ17
B_DQ18
B_DQ19
B_DQ20
B_DQ21
B_DQ22
B_DQ23

B_DQ24
B_DQ25
B_DQ26
B_DQ27
B_DQ28
B_DQ29
B_DQ30
B_DQ31

B_DQ32
B_DQ33
B_DQ34
B_DQ35
B_DQ36
B_DQ37
B_DQ38
B_DQ39

B_DQ40
B_DQ41
B_DQ42
B_DQ43
B_DQ44
B_DQ45
B_DQ46
B_DQ47

B_DQ48
B_DQ49
B_DQ50
B_DQ51
B_DQ52
B_DQ53
B_DQ54
B_DQ55

B_DQ56
B_DQ57
B_DQ58
B_DQ59
B_DQ60
B_DQ61
B_DQ62
B_DQ63

B_CB0

B_CB1

B_CB2

B_CB3

B_CB4

B_CB5

B_CB6

B_CB7

HETERO 3 OF 7

ADD=ADD02_W1549_MCHHTSNK1

ADD1=ADD13_X1306_MCHHTSNK2

AM30
AN30
AN27
AM27
AK30
AM31
AL28
AK27

AM24
AN24
AN21
AM21
AL25
AK24
AL22
AK21

AK18
AM18
AN15
AM15
AL19
AM19
AM16
AL16

AK12
AM12
AN9
AM9
AL13
AM13
AM10
AL10

AJ3
AJ4
AF1
AF4
AK3
AK2
AG3
AF3

AC3
AC1
Y3
Y4
AD2
AD3
AA2
Y1

T4
T1
N1
N2
U3
U1
P3
P4

K2
K1
F2
E1
L1
K4
G1
G2

AM7
AL7
AM4
AL4
AN8
AK8
AN5
AL5

x00_tj_041003

DDR2B_SD0_0
DDR2B_SD0_1
DDR2B_SD0_2
DDR2B_SD0_3
DDR2B_SD0_4
DDR2B_SD0_5
DDR2B_SD0_6
DDR2B_SD0_7

DDR2B_SD1_0
DDR2B_SD1_1
DDR2B_SD1_2
DDR2B_SD1_3
DDR2B_SD1_4
DDR2B_SD1_5
DDR2B_SD1_6
DDR2B_SD1_7

DDR2B_SD2_0
DDR2B_SD2_1
DDR2B_SD2_2
DDR2B_SD2_3
DDR2B_SD2_4
DDR2B_SD2_5
DDR2B_SD2_6
DDR2B_SD2_7

DDR2B_SD3_0
DDR2B_SD3_1
DDR2B_SD3_2
DDR2B_SD3_3
DDR2B_SD3_4
DDR2B_SD3_5
DDR2B_SD3_6
DDR2B_SD3_7

DDR2B_SD4_0
DDR2B_SD4_1
DDR2B_SD4_2
DDR2B_SD4_3
DDR2B_SD4_4
DDR2B_SD4_5
DDR2B_SD4_6
DDR2B_SD4_7

DDR2B_SD5_0
DDR2B_SD5_1
DDR2B_SD5_2
DDR2B_SD5_3
DDR2B_SD5_4
DDR2B_SD5_5
DDR2B_SD5_6
DDR2B_SD5_7

DDR2B_SD6_0
DDR2B_SD6_1
DDR2B_SD6_2
DDR2B_SD6_3
DDR2B_SD6_4
DDR2B_SD6_5
DDR2B_SD6_6
DDR2B_SD6_7

DDR2B_SD7_0
DDR2B_SD7_1
DDR2B_SD7_2
DDR2B_SD7_3
DDR2B_SD7_4
DDR2B_SD7_5
DDR2B_SD7_6
DDR2B_SD7_7

DDR2B_CB0
DDR2B_CB1
DDR2B_CB2
DDR2B_CB3
DDR2B_CB4
DDR2B_CB5
DDR2B_CB6
DDR2B_CB7

ROOM = MCH

21
21
21
21
21
21
21
21

21
21
21
21
21
21
21
21

21
21
21
21
21
21
21
21

21
21
21
21
21
21
21
21

21
21
21
21
21
21
21
21

21
21
21
21
21
21
21
21

21
21
21
21
21
21
21
21

21
21
21
21
21
21
21
21

21
21
21
21
21
21
21
21

16,20
16,20
16,20
16,20
16,20
16,20

16
16

23

20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20

16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20

16,20
16,20
16,20

16,20
16,20
16,20

16,20
16,21
16,20
16,21

16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20

DDR2A_DQS0_P
DDR2A_DQS0_N
DDR2A_DQS1_P
DDR2A_DQS1_N
DDR2A_DQS2_P
DDR2A_DQS2_N
DDR2A_DQS3_P
DDR2A_DQS3_N
DDR2A_DQS4_P
DDR2A_DQS4_N
DDR2A_DQS5_P
DDR2A_DQS5_N
DDR2A_DQS6_P
DDR2A_DQS6_N
DDR2A_DQS7_P
DDR2A_DQS7_N
DDR2A_DQS8_P
DDR2A_DQS8_N
DDR2A_DQS9_P
DDR2A_DQS9_N
DDR2A_DQS10_P
DDR2A_DQS10_N
DDR2A_DQS11_P
DDR2A_DQS11_N
DDR2A_DQS12_P
DDR2A_DQS12_N
DDR2A_DQS13_P
DDR2A_DQS13_N
DDR2A_DQS14_P
DDR2A_DQS14_N
DDR2A_DQS15_P
DDR2A_DQS15_N
DDR2A_DQS16_P
DDR2A_DQS16_N
DDR2A_DQS17_P
DDR2A_DQS17_N

DDR2A_A0
DDR2A_A1
DDR2A_A2
DDR2A_A3
DDR2A_A4
DDR2A_A5
DDR2A_A6
DDR2A_A7
DDR2A_A8
DDR2A_A9
DDR2A_A10
DDR2A_A11
DDR2A_A12
DDR2A_A13

DDR2A_BA0
DDR2A_BA1
DDR2A_BA2

DDR2A_WE_N
DDR2A_CAS_N
DDR2A_RAS_N

DDR2_CKE0
DDR2_CKE1
DDR2_CKE2
DDR2_CKE3

DDR2A_CS0_N
DDR2A_CS1_N
DDR2A_CS2_N
DDR2A_CS3_N
DDR2A_CS4_N
DDR2A_CS5_N
DDR2A_CS6_N
DDR2A_CS7_N

CK_200M_DIMMA1_P
CK_200M_DIMMA1_N
CK_200M_DIMMA2_P
CK_200M_DIMMA2_N
CK_200M_DIMMA3_P
CK_200M_DIMMA3_N
CK_200M_DIMMA0_P
CK_200M_DIMMA0_N

DDR2A_MCH_VREF

ROOM=MCH

AJ30
AJ31
AJ24
AJ25
AH19
AH20
AG14
AG15

AC6
AD6

W7
V8
N7
P7
G4

H4
AF9
AG9

AL32
AL31
AF25
AF24
AE20
AE19
AH14
AJ13

AD8
AC7

Y7

Y6
P10
N10

J6

H6
AH8
AJ7

AH5

AD14
AL14
AK15
AJ16
AH17
AF18
AN20
AK20
AJ22

AE4

AF22
AG23

U6

AB5
AF6

AE25

Y10

W8
AA6

AE26
AN26
AL26
AK26

W2

V3

T8
T10

N5

M5

M3

L4

AF13
AF12
AH11
AJ12
AH13
AG12
AC10

AD9
AM3

A_DQS0_P
A_DQS0_N
A_DQS1_P
A_DQS1_N
A_DQS2_P
A_DQS2_N
A_DQS3_P
A_DQS3_N
A_DQS4_P
A_DQS4_N
A_DQS5_P
A_DQS5_N
A_DQS6_P
A_DQS6_N
A_DQS7_P
A_DQS7_N
A_DQS8_P
A_DQS8_N
A_DQS9_P
A_DQS9_N
A_DQS10_P
A_DQS10_N
A_DQS11_P
A_DQS11_N
A_DQS12_P
A_DQS12_N
A_DQS13_P
A_DQS13_N
A_DQS14_P
A_DQS14_N
A_DQS15_P
A_DQS15_N
A_DQS16_P
A_DQS16_N
A_DQS17_P
A_DQS17_N

A_MA0
A_MA1
A_MA2
A_MA3
A_MA4
A_MA5
A_MA6
A_MA7
A_MA8
A_MA9
A_MA10
A_MA11
A_MA12
A_MA13

A_BA0
A_BA1
A_BA2

A_WE
A_CAS
A_RAS

CKE0
CKE1
CKE2
CKE3

A_CS0
A_CS1
A_CS2
A_CS3
A_CS4
A_CS5
A_CS6
A_CS7

A_CMDCLK0_P
A_CMDCLK0_N
A_CMDCLK1_P
A_CMDCLK1_N
A_CMDCLK2_P
A_CMDCLK2_N
A_CMDCLK3_P
A_CMDCLK3_N

A_VREF

INTEL LINDENHURST MCH V0P21

MCH

HETERO 4 OF 7

A_DQ0
A_DQ1
A_DQ2
A_DQ3
A_DQ4
A_DQ5
A_DQ6
A_DQ7

A_DQ8

A_DQ9
A_DQ10
A_DQ11
A_DQ12
A_DQ13
A_DQ14
A_DQ15

A_DQ16
A_DQ17
A_DQ18
A_DQ19
A_DQ20
A_DQ21
A_DQ22
A_DQ23

A_DQ24
A_DQ25
A_DQ26
A_DQ27
A_DQ28
A_DQ29
A_DQ30
A_DQ31

A_DQ32
A_DQ33
A_DQ34
A_DQ35
A_DQ36
A_DQ37
A_DQ38
A_DQ39

A_DQ40
A_DQ41
A_DQ42
A_DQ43
A_DQ44
A_DQ45
A_DQ46
A_DQ47

A_DQ48
A_DQ49
A_DQ50
A_DQ51
A_DQ52
A_DQ53
A_DQ54
A_DQ55

A_DQ56
A_DQ57
A_DQ58
A_DQ59
A_DQ60
A_DQ61
A_DQ62
A_DQ63

A_CB0

A_CB1

A_CB2

A_CB3

A_CB4

A_CB5

A_CB6

A_CB7

AK32
AH31
AH29
AF28
AJ33
AK33
AG30
AG29

AG27
AG26
AD24
AD23
AE28
AF27
AH25
AG24

AF21
AG21
AF19
AG18
AE22
AD21
AJ18
AG20

AF16
AF15
AE13
AD12
AE17
AJ15
AE16
AD17

AH4
AG5
AB8
AB7
AB10
AA9
AE5
AD5

U9
AA5
V6
U7
W10
U10
W5
V5

R6
R5
L7
L6
P9
T5
N8
M9

K5
J5
K8
K10
L9
L10
K7
H7

AJ9
AG11
AE11
AD11
AJ10
AH10
AF10
AE10

DDR2A_SD0_0
DDR2A_SD0_1
DDR2A_SD0_2
DDR2A_SD0_3
DDR2A_SD0_4
DDR2A_SD0_5
DDR2A_SD0_6
DDR2A_SD0_7

DDR2A_SD1_0
DDR2A_SD1_1
DDR2A_SD1_2
DDR2A_SD1_3
DDR2A_SD1_4
DDR2A_SD1_5
DDR2A_SD1_6
DDR2A_SD1_7

DDR2A_SD2_0
DDR2A_SD2_1
DDR2A_SD2_2
DDR2A_SD2_3
DDR2A_SD2_4
DDR2A_SD2_5
DDR2A_SD2_6
DDR2A_SD2_7

DDR2A_SD3_0
DDR2A_SD3_1
DDR2A_SD3_2
DDR2A_SD3_3
DDR2A_SD3_4
DDR2A_SD3_5
DDR2A_SD3_6
DDR2A_SD3_7

DDR2A_SD4_0
DDR2A_SD4_1
DDR2A_SD4_2
DDR2A_SD4_3
DDR2A_SD4_4
DDR2A_SD4_5
DDR2A_SD4_6
DDR2A_SD4_7

DDR2A_SD5_0
DDR2A_SD5_1
DDR2A_SD5_2
DDR2A_SD5_3
DDR2A_SD5_4
DDR2A_SD5_5
DDR2A_SD5_6
DDR2A_SD5_7

DDR2A_SD6_0
DDR2A_SD6_1
DDR2A_SD6_2
DDR2A_SD6_3
DDR2A_SD6_4
DDR2A_SD6_5
DDR2A_SD6_6
DDR2A_SD6_7

DDR2A_SD7_0
DDR2A_SD7_1
DDR2A_SD7_2
DDR2A_SD7_3
DDR2A_SD7_4
DDR2A_SD7_5
DDR2A_SD7_6
DDR2A_SD7_7

DDR2A_CB0
DDR2A_CB1
DDR2A_CB2
DDR2A_CB3
DDR2A_CB4
DDR2A_CB5
DDR2A_CB6
DDR2A_CB7

20
20
20
20
20
20
20
20

20
20
20
20
20
20
20
20

20
20
20
20
20
20
20
20

20
20
20
20
20
20
20
20

20
20
20
20
20
20
20
20

20
20
20
20
20
20
20
20

20
20
20
20
20
20
20
20

20
20
20
20
20
20
20
20

1

2

20
20
20
20
20
20
20
20

3

subsys done

These can be left floating

But BIOS must turn them off

A B

MCH & DDR TERM

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

INC.

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

DC

ROUND ROCK,TEXAS

REV.

A03-00

SHEET

16 OF 60

B D

CA

1

2

3

LINDENHURST MCH
MCH REFDES = MCH

MCH_HDACVREF

17

CK_167M_MCH_N

3

CK_167M_MCH_P

3

11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11

11
11

11
11

11

11
11

11
11
11
11
11
11

11
11
11
11

11
11
11
11
11

11

11
11

11,15

MCH_HCRES0

17

MCH_HODTCRES

17

MCH_HSLWCRES

17

H_ADS_N
H_A3_N
H_A4_N
H_A5_N
H_A6_N
H_A7_N
H_A8_N
H_A9_N
H_A10_N
H_A11_N
H_A12_N
H_A13_N
H_A14_N
H_A15_N
H_A16_N
H_A17_N
H_A18_N
H_A19_N
H_A20_N
H_A21_N
H_A22_N
H_A23_N
H_A24_N
H_A25_N
H_A26_N
H_A27_N
H_A28_N
H_A29_N
H_A30_N
H_A31_N
H_A32_N
H_A33_N
H_A34_N
H_A35_N

H_ADSTB0_N
H_ADSTB1_N

H_AP0_N
H_AP1_N

H_BPRI_N

H_BINIT_N
H_BNR_N

H_DRDY_N
H_DBSY_N
H_DEFER_N
H_HIT_N
H_HITM_N
H_LOCK_N

H_RS0_N
H_RS1_N
H_RS2_N
H_RSP_N

H_REQ0_N
H_REQ1_N
H_REQ2_N
H_REQ3_N
H_REQ4_N

H_TRDY_N

H_BREQ0_N
H_BREQ1_N

H_MCERR_N

ROOM=MCH

J11
K11
B27
K22
J20
G23
G22
H21
K19
H19
G19
E22
E21
F18
E19
F21
F20
D26
C26
A26
D22
B22
A25
B25
D25
C24
A22
B21
D23
A23
B24
A20
D19
C20
C21
D20

G20
C23

G25
H25

A28

G26
B31

B30
H27
B28
E30
D28
C30

F29
D31
G28
J26

K20
J21
J23
H22
K23

A30

F24
D29

H24

C27
E27
F26

E13
D13
F23

BCLKN
BCLKP
ADS
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35

ADSTB0
ADSTB1

AP0
AP1

BPRI

BINIT
BNR

DRDY
DBSY
DEFER
HIT
HITM
LOCK

RS0
RS1
RS2
RSP

HREQ0
HREQ1
HREQ2
HREQ3
HREQ4

TRDY

BREQ0
BREQ1

MCERR

HCRES0
H0DTCRES
HSLWCRES

HDVREF1
HDVREF0
HACVREF

INTEL LINDENHURST MCH V0P21

MCH

HETERO 1 OF 7

D0
D1
D2
D3
D4
D5
D6
D7
D8

D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63

DP0
DP1
DP2
DP3

DBINV0
DBINV1
DBINV2
DBINV3

DSTBN0
DSTBP0
DSTBN1
DSTBP1
DSTBN2
DSTBP2
DSTBN3
DSTBP3

C18
B19
C14
A17
A19
B16
C17
B18
D17
A16
B13
A14
A13
D14
C12
B12
E18
J18
H18
F17
G17
K17
E16
J17
J14
F14
F15
G16
K16
H16
G14
K14
E12
C11
H13
F11
G13
D11
E9
F12
G10
D8
H10
F8
J12
G11
K13
H12
B10
A10
A11
C9
B9
C8
B6
B7
E7
B4
A4
B3
D5
C6
D7
C5

C29
E28
E25
F27

D16
E15
F9
A5

B15
C15
H15
J15
D10
E10
A8
A7

H_DBI0_N
H_DBI1_N
H_DBI2_N
H_DBI3_N

H_DSTBN0_N
H_DSTBP0_N
H_DSTBN1_N
H_DSTBP1_N
H_DSTBN2_N
H_DSTBP2_N
H_DSTBN3_N
H_DSTBP3_N

H_D0_N
H_D1_N
H_D2_N
H_D3_N
H_D4_N
H_D5_N
H_D6_N
H_D7_N
H_D8_N

H_D9_N
H_D10_N
H_D11_N
H_D12_N
H_D13_N
H_D14_N
H_D15_N
H_D16_N
H_D17_N
H_D18_N
H_D19_N
H_D20_N
H_D21_N
H_D22_N
H_D23_N
H_D24_N
H_D25_N
H_D26_N
H_D27_N
H_D28_N
H_D29_N
H_D30_N
H_D31_N
H_D32_N
H_D33_N
H_D34_N
H_D35_N
H_D36_N
H_D37_N
H_D38_N
H_D39_N
H_D40_N
H_D41_N
H_D42_N
H_D43_N
H_D44_N
H_D45_N
H_D46_N
H_D47_N
H_D48_N
H_D49_N
H_D50_N
H_D51_N
H_D52_N
H_D53_N
H_D54_N
H_D55_N
H_D56_N
H_D57_N
H_D58_N
H_D59_N
H_D60_N
H_D61_N
H_D62_N
H_D63_N

H_DP0_N
H_DP1_N
H_DP2_N
H_DP3_N

11
11
11
11

11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11

11
11
11
11

11
11
11
11
11
11
11
11

ROOM = MCH

17
17
17
17
17

ITP_TMS_MCH
ITP_TDI_MCH
ITP_TDO_MCH
ITP_TRST_MCH_N
ITP_TCK1_MCH

+1.5V

R1313

1 2

43.2-1%

PROPAGATION_DELAY=L:S::750

+CPU_VTT

72

RN76

RN76

1K-5%

1K-5%

1 8

54

680-5%

RN76

R180

21

x00_tj_052003

1K-5%

EXP_A_UP_0P

31

EXP_A_UP_0N

31

EXP_A_UP_1P

31

EXP_A_UP_1N

31

EXP_A_UP_2P

31

EXP_A_UP_2N

31

EXP_A_UP_3P

31

EXP_A_UP_3N

31

EXP_A_UP_4P

31

EXP_A_UP_4N

31

EXP_A_UP_5P

31

EXP_A_UP_5N

31

EXP_A_UP_6P

31

EXP_A_UP_6N

31

EXP_A_UP_7P

31

EXP_A_UP_7N

31

EXP_B_UP_0P

31

EXP_B_UP_0N

31

EXP_B_UP_1P

31

EXP_B_UP_1N

31

EXP_B_UP_2P

31

EXP_B_UP_2N

31

EXP_B_UP_3P

31

EXP_B_UP_3N

31

EXP_B_UP_4P

29

EXP_B_UP_4N

29

EXP_B_UP_5P

29

EXP_B_UP_5N

29

EXP_B_UP_6P

29

EXP_B_UP_6N

29

EXP_B_UP_7P

29

EXP_B_UP_7N

29

EXP_C_UP_0P

31

EXP_C_UP_0N

31

EXP_C_UP_1P

31

EXP_C_UP_1N

31

EXP_C_UP_2P

31

EXP_C_UP_2N

31

EXP_C_UP_3P

31

EXP_C_UP_3N

31

EXP_C_UP_4P

31

EXP_C_UP_4N

31

EXP_C_UP_5P

31

EXP_C_UP_5N

31

EXP_C_UP_6P

31

EXP_C_UP_6N

31

EXP_C_UP_7P

31

EXP_C_UP_7N

31

RN76

3 6

1K-5%

11,15

33

33

33
33

18

18

5,33

17
17

CK_100M_MCH_P

4

CK_100M_MCH_N

4

NC_MCH_TESTIN_N
PCI_RST_MCH_N

5

H_RST_N

MCH_PME_N

MCH_GPE_N

HLA_STBS
HLA_STBF

HLA_MCH_SWING
CK_66M_MCH

3

HIRCOMP_MCH

HLA_MCH_VREF

SYSTEM_PWRGOOD_CHIPSET

ICH_SEG0_MCH_SCL
ICH_SEG0_MCH_SDA

ITP_TMS_MCH

17

ITP_TDI_MCH

17

ITP_TDO_MCH

17

ITP_TCK1_MCH

17

ITP_TRST_MCH_N

17

DDRCRES1

18

DDRCRES2

18

NC_MCH_AF30
NC_MCH_AE23
NC_MCH_AD20
NC_MCH_AJ19
NC_MCH_R10
NC_MCH_R9
NC_MCH_R8
NC_MCH_M8

ROOM=MCH

MCH

R33

EXP_A_RXP_0

P33

EXP_A_RXN_0

N28

EXP_A_RXP_1

N29

EXP_A_RXN_1

L31

EXP_A_RXP_2

L30

EXP_A_RXN_2

J33

EXP_A_RXP_3

J32

EXP_A_RXN_3

R26

EXP_A_RXP_4

R27

EXP_A_RXN_4

N25

EXP_A_RXP_5

N26

EXP_A_RXN_5

M27

EXP_A_RXP_6

M26

EXP_A_RXN_6

K29

EXP_A_RXP_7

K28

EXP_A_RXN_7

AG33
AF33

AE32
AD32

AC30
AD30

AC31
AB31
AD29

AE29

AC25
AC24

AB26
AB25

AA30
AA29

AF30
AE23
AD20
AJ19

EXP_B_RXP_0
EXP_B_RXN_0

EXP_B_RXP_1
EXP_B_RXN_1

EXP_B_RXP_2
EXP_B_RXN_2

EXP_B_RXP_3
EXP_B_RXN_3

EXP_B_RXP_4
EXP_B_RXN_4

EXP_B_RXP_5
EXP_B_RXN_5

EXP_B_RXP_6
EXP_B_RXN_6

Y25

EXP_B_RXP_7

Y24

EXP_B_RXN_7

Y28

EXP_C_RXP_0

Y27

EXP_C_RXN_0

Y30

EXP_C_RXP_1

Y31

EXP_C_RXN_1

EXP_C_RXP_2
EXP_C_RXN_2

V33

EXP_C_RXP_3

V32

EXP_C_RXN_3

T32

EXP_C_RXP_4

T31

EXP_C_RXN_4

R30

EXP_C_RXP_5

R29

EXP_C_RXN_5

V27

EXP_C_RXP_6

V26

EXP_C_RXN_6

V24

EXP_C_RXP_7

U24

EXP_C_RXN_7

T23 U33

EXP_CLK_P EXP_COMP0

R24

EXP_CLK_N

L12

TESTIN

C2

RESET_IN

J24

CPURST

M24

PME

L25

GPE

E31

HI_STBS

D32

HI_STBF

H31

HISWING

L24

HICLK

K25

HIRCOMP

F32

HIVREF

E3

PWRGOOD

C3

SMBCLK

D4

F3
G5
G6
D2
J9

AE2
AE1

R10

R9
R8
M8

SMBDATA

TMS
TDI
TDO
TCK
TRST

DDR_RES1
DDR_RES2
RESERVED_AF30
RESERVED_AE23
RESERVED_AD20
RESERVED_AJ19
RESERVED_R10
RESERVED_R9
RESERVED_R8
RESERVED_M8

3.3V

INTEL LINDENHURST MCH V0P21

HETERO 2 OR 7

EXP_A_TXP_0
EXP_A_TXN_0

EXP_A_TXP_1
EXP_A_TXN_1

EXP_A_TXP_2
EXP_A_TXN_2

EXP_A_TXP_3
EXP_A_TXN_3

EXP_A_TXP_4
EXP_A_TXN_4

EXP_A_TXP_5
EXP_A_TXN_5

EXP_A_TXP_6
EXP_A_TXN_6

EXP_A_TXP_7
EXP_A_TXN_7

EXP_B_TXP_0
EXP_B_TXN_0

EXP_B_TXP_1
EXP_B_TXN_1

EXP_B_TXP_2
EXP_B_TXN_2

EXP_B_TXP_3
EXP_B_TXN_3

EXP_B_TXP_4
EXP_B_TXN_4

EXP_B_TXP_5
EXP_B_TXN_5

EXP_B_TXP_6
EXP_B_TXN_6

EXP_B_TXP_7
EXP_B_TXN_7

EXP_C_TXP_0
EXP_C_TXN_0

EXP_C_TXP_1
EXP_C_TXN_1

EXP_C_TXP_2
EXP_C_TXN_2

EXP_C_TXP_3
EXP_C_TXN_3

EXP_C_TXP_4
EXP_C_TXN_4

EXP_C_TXP_5
EXP_C_TXN_5

EXP_C_TXP_6
EXP_C_TXN_6

EXP_C_TXP_7
EXP_C_TXN_7

EXP_COMP1

EXPHPINTR_N

VCCBGEXP
VSSBGEXP

V3REF

DDRSLWCRES

DDRCRES0

DDRIMPCRES

PLLSEL[1]
PLLSEL[0]

HI11
HI10

HI9
HI8
HI7
HI6
HI5
HI4
HI3
HI2
HI1
HI0

DEBUG7
DEBUG6
DEBUG5
DEBUG4
DEBUG3
DEBUG2
DEBUG1
DEBUG0

TDIOCATHODE

TDIOANODE

RESERVED_AA24

RESERVED_R32
RESERVED_L33

P30
P31

N31
N32

M33
M32

K32
K31

P24
P25

P27
P28

M30
M29

L28
L27

AG32
AH32

AF31
AE31

AC33
AD33

AB32
AA32

AD27
AD26

AC27
AC28

AB29
AB28

AA27
AA26

W26
W25

W28
W29

Y33
AA33

W32
W31

U31
U30

V30
V29

T29
T28

T26
T25

U25
E6
U27
U28

H33
AK1
AC9
AL2
A29
C31

G32
J29
E33
F30
J27
K26
H28
G29
G31
C32
H30
J30

D1
L11
D3
B2
H9
G8
G7
J8

F33
D33
AA24
R32
L33

(MCH_VSSBGEXP)

MCH_PLLSTRAP_1
MCH_PLLSTRAP_0

HLA_11
HLA_10

HLA_9
HLA_8
HLA_7
HLA_6
HLA_5
HLA_4
HLA_3
HLA_2
HLA_1
HLA_0

NC_ITP_MCH_DEBUG7
NC_ITP_MCH_DEBUG6
NC_ITP_MCH_DEBUG5
NC_ITP_MCH_DEBUG4
NC_ITP_MCH_DEBUG3
NC_ITP_MCH_DEBUG2
NC_ITP_MCH_DEBUG1
NC_ITP_MCH_DEBUG0

NC_MCH_TD_CATHODE

MCH_EXP_COMP

MCH_VCCBGEXP

DDRSLWCRES

DDRCRES0

DDRIMPCRES

33
33
33
33
33
33
33
33
33
33
33
33

NC_MCH_TD_ANODE
NC_MCH_RES_AA24

NC_MCH_RES_R32
NC_MCH_RES_L33

EXP_A_DN_0P_C
EXP_A_DN_0N_C

EXP_A_DN_1P_C
EXP_A_DN_1N_C

EXP_A_DN_2P_C
EXP_A_DN_2N_C

EXP_A_DN_3P_C
EXP_A_DN_3N_C

EXP_A_DN_4P_C
EXP_A_DN_4N_C

EXP_A_DN_5P_C
EXP_A_DN_5N_C

EXP_A_DN_6P_C
EXP_A_DN_6N_C

EXP_A_DN_7P_C
EXP_A_DN_7N_C

EXP_B_DN_0P_C
EXP_B_DN_0N_C

EXP_B_DN_1P_C
EXP_B_DN_1N_C

EXP_B_DN_2P_C
EXP_B_DN_2N_C

EXP_B_DN_3P_C
EXP_B_DN_3N_C

EXP_B_DN_4P_C
EXP_B_DN_4N_C

EXP_B_DN_5P_C
EXP_B_DN_5N_C

EXP_B_DN_6P_C
EXP_B_DN_6N_C

EXP_B_DN_7P_C
EXP_B_DN_7N_C

EXP_C_DN_0P_C
EXP_C_DN_0N_C

EXP_C_DN_1P_C
EXP_C_DN_1N_C

EXP_C_DN_2P_C
EXP_C_DN_2N_C

EXP_C_DN_3P_C
EXP_C_DN_3N_C

EXP_C_DN_4P_C
EXP_C_DN_4N_C

EXP_C_DN_5P_C
EXP_C_DN_5N_C

EXP_C_DN_6P_C
EXP_C_DN_6N_C

EXP_C_DN_7P_C
EXP_C_DN_7N_C

17

18
18
18

x02_tj_091903

+1.5V

NP

R1605

X

1 2

220

21

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

17
17

R1606

1K-5%

+1.5V+3.3V

NP

21

R1082

X

220

+1.5V

R1001

1 2

1K-5%

R1247

21

24.9-1%

4.7K

+3.3V

21

R1604

C1738

1 2

MCH_EXPHPINTR_N

.1uF

10V-10%

+3.3V

R5

2 1

220

D33

31

R12

C1119

EXP_A_DN_0P_C

17

EXP_A_DN_0N_C

17

EXP_A_DN_1P_C

17

EXP_A_DN_1N_C

17

EXP_A_DN_2P_C

17

EXP_A_DN_2N_C

17

EXP_A_DN_3P_C

17

EXP_A_DN_3N_C

17

EXP_A_DN_4P_C

17

EXP_A_DN_4N_C

17

EXP_A_DN_5P_C

17

EXP_A_DN_5N_C

17

EXP_A_DN_6P_C

17

EXP_A_DN_6N_C

17

EXP_A_DN_7P_C

17

EXP_A_DN_7N_C

17

21

.1uF

10V-10%

C1121

21

.1uF

10V-10%

C1126

21

.1uF

10V-10%

C1124

21

.1uF

10V-10%

C1134

21

.1uF

10V-10%

C1132

21

.1uF

10V-10%

C1130

21

.1uF

10V-10%

C1128

21

.1uF

10V-10%

C1120

21

.1uF

10V-10%

C1122

21

.1uF

10V-10%

C1125

21

.1uF

10V-10%

C1123

21

.1uF

10V-10%

C1133

21

.1uF

10V-10%

C1131

21

.1uF

10V-10%

C1129

21

.1uF

10V-10%

C1127

21

EXP_A_DN_0P

EXP_A_DN_0N

EXP_A_DN_1P

EXP_A_DN_1N

EXP_A_DN_2P

EXP_A_DN_2N

EXP_A_DN_3P

EXP_A_DN_3N

EXP_A_DN_4P

EXP_A_DN_4N

EXP_A_DN_5P

EXP_A_DN_5N

EXP_A_DN_6P

EXP_A_DN_6N

EXP_A_DN_7P

EXP_A_DN_7N

31

31

31

31

31

31

1

31

31

31

31

31

31

31

31

31

31

.1uF

10V-10%

C1150

EXP_B_DN_0P_C

17

EXP_B_DN_0N_C

17

EXP_B_DN_1P_C

17

EXP_B_DN_1N_C

17

EXP_B_DN_2P_C

17

EXP_B_DN_2N_C

17

EXP_B_DN_3P_C

17

EXP_B_DN_3N_C

17

EXP_B_DN_4P_C

17

EXP_B_DN_4N_C

17

EXP_B_DN_5P_C

17

EXP_B_DN_5N_C

17

EXP_B_DN_6P_C

17

EXP_B_DN_6N_C

17

EXP_B_DN_7P_C

17

EXP_B_DN_7N_C

17

21

.1uF

10V-10%

C1148

21

.1uF

10V-10%

C1146

21

.1uF

10V-10%

C1144

21

.1uF

10V-10%

C1142

21

.1uF

10V-10%

C1140

21

.1uF

10V-10%

C1138

21

.1uF

10V-10%

C1136

21

.1uF

10V-10%

C1149

21

.1uF

10V-10%

C1147

21

.1uF

10V-10%

C1145

21

.1uF

10V-10%

C1143

21

.1uF

10V-10%

C1141

21

.1uF

10V-10%

C1139

21

.1uF

10V-10%

C1137

21

.1uF

10V-10%

C1135

21

EXP_B_DN_0P

EXP_B_DN_0N

EXP_B_DN_1P

EXP_B_DN_1N

EXP_B_DN_2P

EXP_B_DN_2N

EXP_B_DN_3P

EXP_B_DN_3N

EXP_B_DN_4P

EXP_B_DN_4N

EXP_B_DN_5P

EXP_B_DN_5N

EXP_B_DN_6P

EXP_B_DN_6N

EXP_B_DN_7P

EXP_B_DN_7N

31

31

31

31

31

31

2

31

31

27

27

27

27

27

27

27

27

.1uF

10V-10%

C1151

EXP_C_DN_0P_C

17

EXP_C_DN_0N_C

17

EXP_C_DN_1P_C

17

EXP_C_DN_1N_C

17

EXP_C_DN_2P_C

17

EXP_C_DN_2N_C

17

EXP_C_DN_3P_C

17

EXP_C_DN_3N_C

17

EXP_C_DN_4P_C

17

EXP_C_DN_4N_C

17

EXP_C_DN_5P_C

17

EXP_C_DN_5N_C

17

EXP_C_DN_6P_C

17

EXP_C_DN_6N_C

17

EXP_C_DN_7P_C

17

EXP_C_DN_7N_C

17

21

.1uF

10V-10%

C1153

21

.1uF

10V-10%

C1155

21

.1uF

10V-10%

C1157

21

.1uF

10V-10%

C1159

21

.1uF

10V-10%

C1161

21

.1uF

10V-10%

C1163

21

.1uF

10V-10%

C1165

21

.1uF

10V-10%

C1152

21

.1uF

10V-10%

C1154

21

.1uF

10V-10%

C1156

21

.1uF

10V-10%

C1158

21

.1uF

10V-10%

C1160

21

.1uF

10V-10%

C1162

21

.1uF

10V-10%

C1164

21

.1uF

10V-10%

C1166

21

EXP_C_DN_0P

EXP_C_DN_0N

EXP_C_DN_1P

EXP_C_DN_1N

EXP_C_DN_2P

EXP_C_DN_2N

EXP_C_DN_3P

EXP_C_DN_3N

EXP_C_DN_4P

EXP_C_DN_4N

EXP_C_DN_5P

EXP_C_DN_5N

EXP_C_DN_6P

EXP_C_DN_6N

EXP_C_DN_7P

EXP_C_DN_7N

31

31

31

31

31

31

31

31

31

31

31

31

31

31

31

31

3

.1uF

10V-10%

NET_PHYSICAL_TYPE=PWR
PROPAGATION_DELAY=L:S::1200

R1833

1 2

1 2

1-1%

21

X00_TJ_060403

1K-1%1K-1%

x00_tt_052903

L131

4.7uH 80mA

MCH_VCCBGEXP

17

10uF 6.3V

1 2

C1661

10uF 6.3V

C823

21

0.1uF 16V
1 2

C195

+CPU_VTT

+3.3V

TLV431A

53

4

x00_tj_051203

100K-1%

R2

R181

4 4

12

2.5V Generation

INC.

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

ROUND ROCK,TEXAS

REV.

A03-00

SHEET

17 OF 60

17

17
17

MCH_HCRES0

MCH_HODTCRES
MCH_HSLWCRES

21

R982

49.9-1%

48.7-1%
SUB*_X5575

x04_sdx04_sd

R1057

1 2

549-1%

442-1%

17

SUB*_0K260

MCH_HDACVREF

MRGN_MHDAC

1

1
3 4

TSM 2X2
SMT HDR

R983

1 2

49.9-1%

R1406

775mV

750-1%

21

R1547

C1198

2

2

43

12

NP01

220pF

50V-10%

21

C1191

1uF

10V-10%

R378

1 2

x04_sd

90.9-1%

27,31,35

27,31,35

ICH_SEG0_SDA

ICH_SEG0_SCL

NP*

R1425

1 2

220

R1424

220

x04_tj_031604

ICH_SEG0_MCH_SDA

21

ICH_SEG0_MCH_SCL

1 2

21

R1407

8.2K-5%

NP*

NET_PHYSICAL_TYPE=PWR
PROPAGATION_DELAY=L:S::1200

8.2K-5%

NP*

17

MCH & PCI EXPRESS CAPS

17

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

1 2

subsys done

A B

DC

B D

CA

+CPU_VTT

18

PROPAGATION_DELAY=L:S::700
NET_PHYSICAL_TYPE=50MIL

MCH_VCCA_VCORE

L113

1 2

4.7uH 80mA

X00_TJ_060403

X03b_TJ_011904

MCH_VCCA_VCORE_L

PROPAGATION_DELAY=L:S::200
NET_PHYSICAL_TYPE=50MIL

R1173

1 2

1-1%

+1.5V

LINDENHURST MCH

21

ROOM = MCH

+1.8V

+1.5V

MCH

MCH REFDES = MCH

F1

VDDR_F1

H5

VDDR_H5

K3

MCH

A21

GND-A21

A24

GND-A24

A27

1

2

3

4 4

GND-A27

B5

GND-B5

B8

GND-B8

B11

GND-B11

B14

GND-B14

B17

GND-B17

B20

GND-B20

B23

GND-B23

B26

GND-B26

B29

GND-B29

C1

GND-C1

C4

GND-C4

C7

GND-C7

C10

GND-C10

C13

GND-C13

C16

GND-C16

C19

GND-C19

C22

GND-C22

C25

GND-C25

C28

GND-C28

B32

GND-B32

D6

GND-D6

D9

GND-D9

D12

GND-D12

D15

GND-D15

D18

GND-D18

D21

GND-D21

D24

GND-D24

E2

GND-E2

E5

GND-E5

E24

GND-E24

E26

GND-E26

E29

GND-E29

E32

GND-E32

F4

GND-F4

F7

GND-F7

F10

GND-F10

F13

GND-F13

F16

GND-F16

F19

GND-F19

F22

GND-F22

F25

GND-F25

F28

GND-F28

F31

GND-F31

G3

GND-G3

G9

GND-G9

G12

GND-G12

G15

GND-G15

G18

GND-G18

G21

GND-G21

G24

GND-G24

G27

GND-G27

G30

GND-G30

H2

GND-H2

H8

GND-H8

H11

GND-H11

H14

GND-H14

H17

GND-H17

H20

GND-H20

H32

GND-H32

J1

GND-J1

J4

GND-J4

J7

GND-J7

J10

GND-J10

J22

GND-J22

J25

GND-J25

J28

GND-J28

J31

GND-J31

K6

GND-K6

K12

GND-K12

K15

GND-K15

K18

GND-K18

K21

GND-K21

K24

GND-K24

L2

GND-L2

L5

GND-L5

L8

GND-L8

L14

GND-L14

L16

GND-L16

L18

GND-L18

L20

GND-L20

L22

GND-L22

L26

GND-L26

L29

GND-L29

L32

GND-L32

M4

GND-M4

M10

GND-M10

M11

GND-M11

M13

GND-M13

M15

GND-M15

M17

GND-M17

M19

GND-M19

M21

GND-M21

M23

GND-M23

M25

GND-M25

M31

GND-M31

N3

GND-N3

N6

GND-N6

N9

GND-N9

N12

GND-N12

N14

GND-N14

N16

GND-N16

N18

GND-N18

N20

GND-N20

N22

GND-N22

N24

GND-N24

N27

GND-N27

N30

GND-N30

P2

GND-P2

P8

GND-P8

P11

GND-P11

P13

GND-P13

P15

GND-P15

ROOM=MCH

INTEL LINDENHURST MCH V0P21

HETERO 7 OF 7

GND-P17
GND-P19
GND-P23
GND-P26
GND-P32

GND-R1
GND-R4

GND-R7
GND-R12
GND-R14
GND-R16
GND-R18
GND-R20
GND-R22
GND-R25
GND-R28
GND-R31

GND-T6
GND-T11
GND-T13
GND-T15
GND-T17
GND-T19
GND-T21
GND-T30

GND-U2

GND-U5

GND-U8
GND-U12
GND-U14
GND-U16
GND-U18
GND-U20
GND-U22
GND-U26
GND-U32

GND-V4
GND-V10
GND-V11
GND-V13
GND-V15
GND-V17
GND-V19
GND-V21
GND-V25
GND-V28
GND-V31

GND-W3

GND-W6

GND-W9
GND-W12
GND-W14
GND-W16
GND-W18
GND-W20
GND-W22
GND-W24
GND-W30

GND-Y2

GND-Y8
GND-Y11
GND-Y13
GND-Y15
GND-Y17
GND-Y19
GND-Y21
GND-Y23
GND-Y26
GND-Y32
GND-AA1
GND-AA4
GND-AA7

GND-AA10
GND-AA12
GND-AA14
GND-AA16
GND-AA18
GND-AA20
GND-AA22
GND-AA25
GND-AA28
GND-AA31

GND-AB6

GND-AB11

GND-AB13
GND-AB15
GND-AB17
GND-AB19
GND-AB21
GND-AB23
GND-AB30

GND-AC2
GND-AC5
GND-AC8

GND-AC12
GND-AC14
GND-AC16
GND-AC18
GND-AC20
GND-AC22
GND-AC26
GND-AC32

GND-AD4

GND-AD10
GND-AD13
GND-AD16
GND-AD19
GND-AD22
GND-AD25
GND-AD28
GND-AD31

GND-AE3
GND-AE6
GND-AE9

VSSA_CORE

VSSA_HI

VSSA_EXP

P17
P19
P23
P26
P32
R1
R4
R7
R12
R14
R16
R18
R20
R22
R25
R28
R31
T6
T11
T13
T15
T17
T19
T21
T30
U2
U5
U8
U12
U14
U16
U18
U20
U22
U26
U32
V4
V10
V11
V13
V15
V17
V19
V21
V25
V28
V31
W3
W6
W9
W12
W14
W16
W18
W20
W22
W24
W30
Y2
Y8
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y26
Y32
AA1
AA4
AA7
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AA28
AA31
AB6
AB11

AB13
AB15
AB17
AB19
AB21
AB23
AB30
AC2
AC5
AC8
AC12
AC14
AC16
AC18
AC20
AC22
AC26
AC32
AD4
AD10
AD13
AD16
AD19
AD22
AD25
AD28
AD31
AE3
AE6
AE9

F5
P21
V23

MCH_VSSA_SB
MCH_VSSA_HI
MCH_VSSA_EXP

18
18
18

AE15
AE21
AE27

AF2
AF8

AF11

AF14
AF17
AF20
AF23
AF26
AF29
AF32

AG1
AG4

AG7
AG13
AG19
AG25
AG31

AH9
AH12
AH15
AH18
AH21
AH24
AH27
AH30

AJ2

AJ5
AJ11

ROOM=MCH

MCH

GND-AE15
GND-AE21
GND-AE27
GND-AF2
GND-AF8
GND-AF11

GND-AF14
GND-AF17
GND-AF20
GND-AF23
GND-AF26
GND-AF29
GND-AF32
GND-AG1
GND-AG4
GND-AG7
GND-AG13
GND-AG19
GND-AG25
GND-AG31
GND-AH9
GND-AH12
GND-AH15
GND-AH18
GND-AH21
GND-AH24
GND-AH27
GND-AH30
GND-AJ2
GND-AJ5
GND-AJ11

INTEL LINDENHURST MCH V0P21

HETERO 6 OF 7

GND-AJ17
GND-AJ23
GND-AJ29
GND-AJ32

GND-AK4

GND-AK7
GND-AK10
GND-AK13
GND-AK16
GND-AK19
GND-AK22
GND-AK25
GND-AK28
GND-AK31

GND-AL3

GND-AL9
GND-AL15

GND-AL21
GND-AL27
GND-AL33

GND-AM2

GND-AM5

GND-AM8
GND-AM11
GND-AM14
GND-AM17
GND-AM20
GND-AM23
GND-AM26
GND-AM29
GND-AM32

GND-AN7
GND-AN13
GND-AN19
GND-AN25
GND-AN31

AJ17
AJ23
AJ29
AJ32
AK4
AK7
AK10
AK13
AK16
AK19
AK22
AK25
AK28
AK31
AL3
AL9
AL15

AL21
AL27
AL33
AM2
AM5
AM8
AM11
AM14
AM17
AM20
AM23
AM26
AM29
AM32
AN7
AN13
AN19
AN25
AN31

+1.5V

N11

P12
R11

T12
U11

V12
W11

Y12

AA11

AB3

AB9
AB12
AB14
AB16
AB18
AB20
AB22
AC11
AC13
AC15
AC17
AC19
AC21
AC23

AD1

AD7
AE12
AE18
AE24

AF5
AG10
AG16
AG22
AG28

AH3

AJ8
AJ14
AJ20
AJ26

AL1

AL6
AL12
AL18
AL24
AL30

AN3
AN10
AN16
AN22
AN28

K30

K33

M28

N33

P29

R23

T22

T24

T27

T33

U29

V22

W23

W27

W33

Y22

Y29
AA23
AB24
AB27
AB33
AC29
AE30
AE33
AH33

M1
M7

P5

T3
T9

V1
V7

Y5

VDDR_K3
VDDR_M1
VDDR_M7
VDDR_N11
VDDR_P5
VDDR_P12
VDDR_R11
VDDR_T3
VDDR_T9
VDDR_T12
VDDR_U11
VDDR_V1
VDDR_V7
VDDR_V12
VDDR_W11
VDDR_Y5
VDDR_Y12
VDDR_AA11
VDDR_AB3
VDDR_AB9
VDDR_AB12
VDDR_AB14
VDDR_AB16
VDDR_AB18
VDDR_AB20
VDDR_AB22
VDDR_AC11
VDDR_AC13
VDDR_AC15
VDDR_AC17
VDDR_AC19
VDDR_AC21
VDDR_AC23
VDDR_AD1
VDDR_AD7
VDDR_AE12
VDDR_AE18
VDDR_AE24
VDDR_AF5
VDDR_AG10
VDDR_AG16
VDDR_AG22
VDDR_AG28
VDDR_AH3
VDDR_AJ8
VDDR_AJ14
VDDR_AJ20
VDDR_AJ26
VDDR_AL1
VDDR_AL6
VDDR_AL12
VDDR_AL18
VDDR_AL24
VDDR_AL30
VDDR_AN3
VDDR_AN10
VDDR_AN16
VDDR_AN22
VDDR_AN28

VEXP_K30
VEXP_K33
VEXP_M28
VEXP_N33
VEXP_P29
VEXP_R23
VEXP_T22
VEXP_T24
VEXP_T27
VEXP_T33
VEXP_U29
VEXP_V22
VEXP_W23
VEXP_W27
VEXP_W33
VEXP_Y22
VEXP_Y29
VEXP_AA23
VEXP_AB24
VEXP_AB27
VEXP_AB33
VEXP_AC29
VEXP_AE30
VEXP_AE33
VEXP_AH33

INTEL LINDENHURST MCH V0P21

HETERO 5 OF 7

ROOM=MCH

VCORE_C33
VCORE_G33
VCORE_H29

VCORE_K9
VCORE_K27
VCORE_L23
VCORE_M12
VCORE_M22
VCORE_N13
VCORE_N15
VCORE_N17
VCORE_N19
VCORE_N21
VCORE_N23
VCORE_P14
VCORE_P16
VCORE_P18
VCORE_P22
VCORE_R13
VCORE_R15
VCORE_R17
VCORE_R19
VCORE_R21
VCORE_T14
VCORE_T16
VCORE_T18
VCORE_T20

VCORE-U13
VCORE-U15
VCORE_U17
VCORE_U19
VCORE_U21
VCORE_V14
VCORE_V16
VCORE_V18
VCORE_V20
VCORE_W13
VCORE_W15
VCORE_W17
VCORE_W19
VCORE_W21
VCORE_Y14
VCORE_Y16
VCORE_Y18
VCORE_Y20

VCORE_AA13
VCORE_AA15
VCORE_AA17
VCORE_AA19
VCORE_AA21

VTT_A3
VTT_A6

VTT_A9
VTT_A12
VTT_A15
VTT_A18
VTT_A31
VTT_D27
VTT_D30

VTT_E8
VTT_E11
VTT_E14
VTT_E17
VTT_E20
VTT_E23
VTT_H23
VTT_H26
VTT_J13
VTT_J16
VTT_J19
VTT_L13
VTT_L15
VTT_L17
VTT_L19
VTT_L21
VTT_M14
VTT_M16
VTT_M18
VTT_M20

VCCA_CORE

VCCA_DDR
VCCA_EXP

VCCA_HI

C33
G33
H29
K9
K27
L23
M12
M22
N13
N15
N17
N19
N21
N23
P14
P16
P18
P22
R13
R15
R17
R19
R21
T14
T16
T18
T20

U13
U15
U17
U19
U21
V14
V16
V18
V20
W13
W15
W17
W19
W21
Y14
Y16
Y18
Y20
AA13
AA15
AA17
AA19
AA21

A3
A6
A9
A12
A15
A18
A31
D27
D30
E8
E11
E14
E17
E20
E23
H23
H26
J13
J16
J19
L13
L15
L17
L19
L21
M14
M16
M18
M20

F6
E4
U23
P20

+1.5V

+CPU_VTT

MCH_VCCA_VCORE
MCH_VCCA_DDR
MCH_VCCA_EXP
MCH_VCCA_HI

18
18
18
18

To be placed near hub link on MCH

C636

1 2

MCH POWER

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

21

C1169

21

C401

.01uF 50V

C1170

1 2

0.1uF 16V

C142

0.1uF 16V

1
3 4

1 2

MRGN_MHVS

1
3 4

21

C1171

0.1uF 16V

C637

0.1uF 16V

TSM 2X2
SMT HDR

0.1uF 16V

@MCH

1 2

.01uF 50V

2

2

NP*

+1.5V

R234

1 2

21

R551

2.7K-5%

21

43.2-1%49.9-1%

NP01R582

MCH HLA VREF
& VSWING

R276

1 2

NET_PHYSICAL_TYPE=PWR

NET_PHYSICAL_TYPE=PWR

R537

1 2

24.3-1% 78.7-1%

MRGN_MHVR

1

1
3 4

TSM 2X2
SMT HDR

HLA_MCH_SWING

(804mv)

HLA_MCH_VREF

(353mv)

2.7K-5%

2

2

43

NP*

17

1 2

17

R553

NP01

18

18

PROPAGATION_DELAY=L:S::600
NET_PHYSICAL_TYPE=50MIL

18

PROPAGATION_DELAY=L:S::600
NET_PHYSICAL_TYPE=50MIL

18

PROPAGATION_DELAY=L:S::1200
NET_PHYSICAL_TYPE=50MIL

18

PROPAGATION_DELAY=L:S::1400
NET_PHYSICAL_TYPE=50MIL

18

PROPAGATION_DELAY=L:S::1500
NET_PHYSICAL_TYPE=50MIL

18

PROPAGATION_DELAY=L:S::1500
NET_PHYSICAL_TYPE=50MIL

MCH_VSSA_SB

MCH_VCCA_DDR

MCH_VSSA_SB

MCH_VCCA_EXP

MCH_VSSA_EXP

MCH_VCCA_HI

MCH_VSSA_HI

PROPAGATION_DELAY=L:S::1000

PROPAGATION_DELAY=L:S::1000

1 2

C1589

PROPAGATION_DELAY=L:S::1000

PROPAGATION_DELAY=L:S::1300

PROPAGATION_DELAY=L:S::1000

10uF 6.3V

x00_tj_042903

17

17

C1236

1 2

C1238

21

C1240

1 2

C1242

17

17

17

C1226

10uF 6.3V

C1225

10uF 6.3V

C1227

10uF 6.3V

C1228

10uF 6.3V

DDRCRES2

DDRCRES1

1 2

0.1uF 16V0.1uF 16V

21

21

0.1uF 16V

1 2

0.1uF 16V

DDRIMPCRES

DDRCRES0

DDRSLWCRES

L112

1 2

4.7uH 80mA

X00_TJ_060403

X03b_TJ_011904

L111

4.7uH 80mA

X00_TJ_060403

X03b_TJ_011904

L110

1 2

4.7uH 80mA

X00_TJ_060403

X03b_TJ_011904

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

DATE

23.4mA

MCH_VCCA_DDR_L

PROPAGATION_DELAY=L:S::200
NET_PHYSICAL_TYPE=50MIL

23.4mA

21

MCH_VCCA_EXP_L

PROPAGATION_DELAY=L:S::200
NET_PHYSICAL_TYPE=50MIL

21.3mA

MCH_VCCA_HI_L

PROPAGATION_DELAY=L:S::200
NET_PHYSICAL_TYPE=50MIL

24.7mA

PN 7H671

ESR = 300mohm

Max current = 80mA
Inductance = 4.7uH

R1031

1 2

287-1%

R1004

1 2

1.05K-1%

976-1%

x04_tj_032904

R1573

40.2-0.5%

C1173

1 2

R1574

1 2

40.2-0.5%

21

C1172

0.1uF 16V 0.1uF 16V

MCH Power & Ground

D1660

12/16/2004

21

INC.

x00_tj_051203
x00_tj_052903
x02_tj_100703

x00_tj_052903

1 2

1 2

x00_tj_052903

SUB=SUB*_C6435

+1.8V

ROUND ROCK,TEXAS

SHEET

18 OF 60

R1174

1-1%

R1175

.499-1%

R1176

1-1%

REV.

+1.5V

21

1

+1.5V

+1.5V

2

3

A03-00

subsys done

A B

DC

+1.8V

ROOM = MCH

MCH DDR caps (min of 10)

B D

CA

1

21

C1395

C1408

1 2

21

C1417

C1394

1 2

0.1uF 16V

21

C1409

0.1uF 16V

C1416

1 2

0.1uF 16V

C1392

1 2

0.1uF 16V

21

C1411

0.1uF 16V

C1415

1 2

0.1uF 16V

21

C1393

0.1uF 16V

C1410

1 2

0.1uF 16V

21

C1414

0.1uF 16V

C1396

1 2

0.1uF 16V

21

C1407

0.1uF 16V

C1413

1 2

0.1uF 16V

21

C1397

0.1uF 16V

C1406

1 2

0.1uF 16V

21

C1412

0.1uF 16V

21

C1399

0.1uF 16V

C1404

1 2

0.1uF 16V

16V-20%

100uF

0.1uF 16V

x00_tj_040803
x02_tj_081803

C1398

0.1uF 16V

C1405

0.1uF 16V

+

C761

21

1 2

21

16V-20%

C1400

1 2

0.1uF 16V

21

C1403

0.1uF 16V

1 2

100uF

+

C762

21

C1401

0.1uF 16V

C1402

1 2

0.1uF 16V

0.1uF 16V0.1uF 16V

ECAD Note:

Place 6 0.1uF beneath BGA
Place 20 0.1uF topside edge of BGA

VTT1.2V

3 560uF Al-Polymer 20% 7mohm 4nh 4V

1.8V DDR2
26 .1uF (0603) 200 2
5 100uF (7343) 220 2.3

1.2 6.32X5R22uF Ceramic5

1

2

+1.5V

21

C1421

C1475

1 2

C1420

1 2

0.1uF 16V

21

1uF10uF 6.3V

C1476

10V-10%

MCH EXPRESS caps

21

C1418

1 2

0.1uF 16V

21

1uF

C1477

10V-10%

C1419

0.1uF 16V

1uF

C1478

1 2

10V-10%

0.1uF 16V

1uF

C1422

1 2

C1479

1 2

10V-10%

21

C1423

0.1uF 16V

21

1uF

C1480

10V-10%

21

C1488

0.1uF 16V

1uF

C1481

1 2

10V-10%

1uF

10V-10%

1uF

10V-10%

C1487

1 2

21

C1482

1uF

10V-10%

1uF

10V-10%

C1486

1 2

21

C1483

1uF

C1485

10V-10%

1uF

C1484

10V-10%

1.5V EXP
3 .1uF (0603) 200 2

4 1uf (0805) 200

21

1uF

10V-10%

ECAD Note:

2 10uF (1206) 200 1.9

Place 6 0.1uF beneath BGA
Place remaining 18 1uF caps near 1.5V pins on BGA

1.5V

1uF

1 2

10V-10%

CORE

TBD TBD TBD TBD

2.3

2

21

C1562

+CPU_VTT

1 2

C1563

1 2

C1564

10uF 6.3V

21

21

C1565

10uF 6.3V

10uF 6.3V

MCH FSB caps

21

+

C763

2 1

220uF-6.3V

x00_tj_040803

21

21

3

C767

1 2

C766

22uF 6.3V

C765

1 2

22uF 6.3V

C768

22uF 6.3V

C764

22uF 6.3V

C760

22uF 6.3V

x00_tj_040803

1 2

C448

1uF 6.3V

1 2

C444

1uF 6.3V

1 2

C77

0.1uF 16V

0.1uF 16V

3

4 4

DECOUPLING

INC.

ROUND ROCK,TEXAS

MCH DECOUPLING

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

19 OF 60

DC

subsys done

A B

B D

CA

1

2

3

+3.3V

21

C642

R539

.1uF

10V-10%

1 2

+1.8V

R558

1 2

1K-1%

+3.3V

2

1

C1753

4.7K

+3.3V

R540

1 2

0.1uF 16V

x00_gt_061803

16
16

20,21,35
20,21,35

20,23

1K-1%

16,20
16,20
16,20

DDR2A_BA1
DDR2A_BA0
DDR2A_BA2

NC_DDR2A_DIMM3A_A15
NC_DDR2A_DIMM3A_A14

16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20

DDR2A_A13
DDR2A_A12
DDR2A_A11
DDR2A_A10
DDR2A_A9
DDR2A_A8
DDR2A_A7
DDR2A_A6
DDR2A_A5
DDR2A_A4
DDR2A_A3
DDR2A_A2
DDR2A_A1
DDR2A_A0

DIMM3A_S1_N

16,20
16,20
16,20
16,20

DDR2A_CS4_N
DDR2A_RAS_N
DDR2A_CAS_N
DDR2A_WE_N

CK_200M_DIMMA3_N
CK_200M_DIMMA3_P

DIMM3A_CKE1

16,20

DDR2_CKE4
ICH_SEG1_SDA

ICH_SEG1_SCL

DDR2A_DIMM_VREF

DIMM3A_ODT1

16,20

16,20

16,20

16,20

16,20

16,20

16,20

16,20

16,20

16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20

DDR2A_CS5_N

DDR2A_CB7
DDR2A_CB6
DDR2A_CB5
DDR2A_CB4
DDR2A_CB3
DDR2A_CB2
DDR2A_CB1
DDR2A_CB0

DDR2A_DQS17_P
DDR2A_DQS17_N
DDR2A_DQS16_P
DDR2A_DQS16_N
DDR2A_DQS15_P
DDR2A_DQS15_N
DDR2A_DQS14_P
DDR2A_DQS14_N
DDR2A_DQS13_P
DDR2A_DQS13_N
DDR2A_DQS12_P
DDR2A_DQS12_N
DDR2A_DQS11_P
DDR2A_DQS11_N
DDR2A_DQS10_P
DDR2A_DQS10_N
DDR2A_DQS9_P
DDR2A_DQS9_N
DDR2A_DQS8_P
DDR2A_DQS8_N
DDR2A_DQS7_P
DDR2A_DQS7_N
DDR2A_DQS6_P
DDR2A_DQS6_N
DDR2A_DQS5_P
DDR2A_DQS5_N
DDR2A_DQS4_P
DDR2A_DQS4_N
DDR2A_DQS3_P
DDR2A_DQS3_N
DDR2A_DQS2_P
DDR2A_DQS2_N
DDR2A_DQS1_P
DDR2A_DQS1_N
DDR2A_DQS0_P
DDR2A_DQS0_N

NC_DIMM3A_ERR_OUT_N
NC_DIMM3A_PAR_IN
NC_DIMM3A_TEST

Put one 10uF cap at each end of DIMM

C519

1 2

10uF 6.3V

NC_DIMM3A_CK2_N
NC_DIMM3A_CK2
NC_DIMM3A_CK1_N
NC_DIMM3A_CK1

SUB=SUB*_P0136

C520

21

10uF 6.3V

190

BA1

71

BA0

54

A16/BA2

173

A15

174

A14

196

A13

176

A12

57

A11

70

A10/AP

177

A9

179

A8

58

A7

180

A6

60

A5

61

A4

182

A3

63

A2

183

A1

188

A0

76

S1

193

S0

192

RAS

74

CAS

73

WE

221

CK2

220

CK2

138

CK1

137

CK1

186

CK0

185

CK0

171

CKE1

52

CKE0

119

SDA

120

SCL

101

SA2

240

SA1

239

SA0

238

VDDSPD

1

VREF

77

ODT1

195

ODT0

168

CB7

167

CB6

162

CB5

161

CB4

49

CB3

48

CB2

43

CB1

42

CB0

164

DM8/DQS17/NC

165

DQS17/NC

232

DM7/DQS16

233

DQS16/NC

223

DM6/DQS15

224

DQS15/NC

211

DM5/DQS14

212

DQS14/NC

202

DM4/DQS13

203

DQS13/NC

155

DM3/DQS12

156

DQS12/NC

146

DM2/DQS11

147

DQS11/NC

134

DM1/DQS10

135

DQS10/NC

125

DM0/DQS9

126

DQS9/NC

46

DQS8/NC

45

DQS8/NC

114

DQS7

113

DQS7

105

DQS6

104

DQS6

93

DQS5

92

DQS5

84

DQS4

83

DQS4

37

DQS3

36

DQS3

28

DQS2

27

DQS2

16

DQS1

15

DQS1

7

DQS0

6

DQS0

55

ERR_OUT

68

PAR_IN

102

TEST

x00_tj_060903

21

C1089

.1uF

C75

10V-10%

1 2

1uF 6.3V

DIMM3_A

240 PIN DDR II DIMM

x00_tj_041003

20,23

236

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3

197
189
187
184
178
172
69
67
64
59
53

194
191
181
175
170
78
75
72
62
56
51

DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDD10

VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0

VDDQ10

VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0

19
18

NC

RESET

C376

1 2

1uF 6.3V

DDR2A_DIMM_VREF

NC_DIMM3A_19
DDR2_RESET_N_2

21

C377

1uF 6.3V

DDR2A_SD7_7
DDR2A_SD7_6
DDR2A_SD7_5
DDR2A_SD7_4
DDR2A_SD7_3
DDR2A_SD7_2
DDR2A_SD7_1
DDR2A_SD7_0
DDR2A_SD6_7
DDR2A_SD6_6
DDR2A_SD6_5
DDR2A_SD6_4
DDR2A_SD6_3
DDR2A_SD6_2
DDR2A_SD6_1
DDR2A_SD6_0
DDR2A_SD5_7
DDR2A_SD5_6
DDR2A_SD5_5
DDR2A_SD5_4
DDR2A_SD5_3
DDR2A_SD5_2
DDR2A_SD5_1
DDR2A_SD5_0
DDR2A_SD4_7
DDR2A_SD4_6
DDR2A_SD4_5
DDR2A_SD4_4
DDR2A_SD4_3
DDR2A_SD4_2
DDR2A_SD4_1
DDR2A_SD4_0
DDR2A_SD3_7
DDR2A_SD3_6
DDR2A_SD3_5
DDR2A_SD3_4
DDR2A_SD3_3
DDR2A_SD3_2
DDR2A_SD3_1
DDR2A_SD3_0
DDR2A_SD2_7
DDR2A_SD2_6
DDR2A_SD2_5
DDR2A_SD2_4
DDR2A_SD2_3
DDR2A_SD2_2
DDR2A_SD2_1
DDR2A_SD2_0
DDR2A_SD1_7
DDR2A_SD1_6
DDR2A_SD1_5
DDR2A_SD1_4
DDR2A_SD1_3
DDR2A_SD1_2
DDR2A_SD1_1
DDR2A_SD1_0
DDR2A_SD0_7
DDR2A_SD0_6
DDR2A_SD0_5
DDR2A_SD0_4
DDR2A_SD0_3
DDR2A_SD0_2
DDR2A_SD0_1
DDR2A_SD0_0

C378

1 2

1uF 6.3V

16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20

C379

C1047

+1.8V

C381

21

C382

1uF 6.3V

1 2

21

1uF 6.3V

C521

21

10uF 6.3V

C712

1 2

10uF 6.3V

C775

1 2

.1uF

10V-10%

+3.3V

2

1

1

C1048

0.1uF 16V

2

0.1uF 16V

+3.3V

C641

+3.3V

.1uF

1 2

10V-10%

2

1

C1754

20,23

+1.8V +1.8V

5,20,21

x00_gt_061803

0.1uF 16V

16,20
16,20
16,20

16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20

16,20

16
16,20
16,20
16,20

16
16

16,20

16

20,21,35
20,21,35

DDR2A_DIMM_VREF

16,20

16

16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20

16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20

NC_DIMM2A_ERR_OUT_N
NC_DIMM2A_PAR_IN
NC_DIMM2A_TEST

DIMM2_A

DDR2A_BA1
DDR2A_BA0
DDR2A_BA2

NC_DDR2A_DIMM2A_A15 NC_DDR2A_DIMM1A_A14

NC_DDR2A_DIMM2A_A14
DDR2A_A13
DDR2A_A12
DDR2A_A11
DDR2A_A10
DDR2A_A9
DDR2A_A8
DDR2A_A7
DDR2A_A6
DDR2A_A5
DDR2A_A4
DDR2A_A3
DDR2A_A2
DDR2A_A1
DDR2A_A0

DDR2A_CS4_N

DDR2A_CS2_N
DDR2A_RAS_N
DDR2A_CAS_N
DDR2A_WE_N

NC_DIMM2A_CK2_N
NC_DIMM2A_CK2
NC_DIMM2A_CK1_N
NC_DIMM2A_CK1

CK_200M_DIMMA2_N
CK_200M_DIMMA2_P

DDR2_CKE4
DDR2_CKE2

ICH_SEG1_SDA
ICH_SEG1_SCL

DDR2A_CS5_N

DDR2A_CS3_N

DDR2A_CB7

DDR2A_CB6

DDR2A_CB5

DDR2A_CB4

DDR2A_CB3

DDR2A_CB2

DDR2A_CB1

DDR2A_CB0

DDR2A_DQS17_P
DDR2A_DQS17_N
DDR2A_DQS16_P
DDR2A_DQS16_N
DDR2A_DQS15_P
DDR2A_DQS15_N
DDR2A_DQS14_P
DDR2A_DQS14_N
DDR2A_DQS13_P
DDR2A_DQS13_N
DDR2A_DQS12_P
DDR2A_DQS12_N
DDR2A_DQS11_P
DDR2A_DQS11_N
DDR2A_DQS10_P
DDR2A_DQS10_N
DDR2A_DQS9_P
DDR2A_DQS9_N
DDR2A_DQS8_P
DDR2A_DQS8_N
DDR2A_DQS7_P
DDR2A_DQS7_N
DDR2A_DQS6_P
DDR2A_DQS6_N
DDR2A_DQS5_P
DDR2A_DQS5_N
DDR2A_DQS4_P
DDR2A_DQS4_N
DDR2A_DQS3_P
DDR2A_DQS3_N
DDR2A_DQS2_P
DDR2A_DQS2_N
DDR2A_DQS1_P
DDR2A_DQS1_N
DDR2A_DQS0_P
DDR2A_DQS0_N

190

71

54
173
174
196
176

57

70
177
179

58
180

60

61
182

63
183
188

76
193
192

74

73
221
220
138
137
186
185
171

52

119
120
101
240
239
238

1

77
195

168
167
162
161

49

48

43

42

164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126

46

45
114
113
105
104

93

92

84

83

37

36

28

27

16

15

7
6

55

68
102

BA1
BA0
A16/BA2
A15
A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

S1
S0
RAS
CAS
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
CKE0

SDA
SCL
SA2
SA1
SA0
VDDSPD
VREF
ODT1
ODT0

CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0

DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
DQS8/NC
DQS8/NC
DQS7
DQS7
DQS6
DQS6
DQS5
DQS5
DQS4
DQS4
DQS3
DQS3
DQS2
DQS2
DQS1
DQS1
DQS0
DQS0

ERR_OUT
PAR_IN
TEST

x00_tj_041003

C383

1uF 6.3V

VDDQ10

21

DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDD10

VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0

VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0

NC

RESET

C380

1uF 6.3V

20,23

236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3

197
189
187
184
178
172
69
67
64
59
53

194
191
181
175
170
78
75
72
62
56
51

19
18

1 2

C384

1uF 6.3V

DDR2A_DIMM_VREF

DDR2A_SD7_7
DDR2A_SD7_6
DDR2A_SD7_5
DDR2A_SD7_4
DDR2A_SD7_3
DDR2A_SD7_2
DDR2A_SD7_1
DDR2A_SD7_0
DDR2A_SD6_7
DDR2A_SD6_6
DDR2A_SD6_5
DDR2A_SD6_4
DDR2A_SD6_3
DDR2A_SD6_2
DDR2A_SD6_1
DDR2A_SD6_0
DDR2A_SD5_7
DDR2A_SD5_6
DDR2A_SD5_5
DDR2A_SD5_4
DDR2A_SD5_3
DDR2A_SD5_2
DDR2A_SD5_1
DDR2A_SD5_0
DDR2A_SD4_7
DDR2A_SD4_6
DDR2A_SD4_5
DDR2A_SD4_4
DDR2A_SD4_3
DDR2A_SD4_2
DDR2A_SD4_1
DDR2A_SD4_0
DDR2A_SD3_7
DDR2A_SD3_6
DDR2A_SD3_5
DDR2A_SD3_4
DDR2A_SD3_3
DDR2A_SD3_2
DDR2A_SD3_1
DDR2A_SD3_0
DDR2A_SD2_7
DDR2A_SD2_6
DDR2A_SD2_5
DDR2A_SD2_4
DDR2A_SD2_3
DDR2A_SD2_2
DDR2A_SD2_1
DDR2A_SD2_0
DDR2A_SD1_7
DDR2A_SD1_6
DDR2A_SD1_5
DDR2A_SD1_4
DDR2A_SD1_3
DDR2A_SD1_2
DDR2A_SD1_1
DDR2A_SD1_0
DDR2A_SD0_7
DDR2A_SD0_6
DDR2A_SD0_5
DDR2A_SD0_4
DDR2A_SD0_3
DDR2A_SD0_2
DDR2A_SD0_1
DDR2A_SD0_0

NC_DIMM2A_19
DDR2_RESET_N_2

21

1uF 6.3V

C385

1 2

+1.8V

1uF 6.3V

16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20

SUB=SUB*_P0136

240 PIN DDR II DIMM

2

1

C1044

0.1uF 16V

+1.8V+1.8V

5,20,21

1

2

C1045

0.1uF 16V

+3.3V

C640

Put one 10uF cap at each end of DIMMPut one 10uF cap at each end of DIMM

C391

16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20

+1.8V

21

1uF 6.3V

DDR2A_DIMM_VREF

5,21

+1.8V

+1.8V

2

1

C1046

1

2

C1049

0.1uF 16V

1

0.1uF 16V

2

3

x00_tj_041003

C750

1 2

10uF 6.3V

C755

21

10uF 6.3V

21

C776

.1uF

10V-10%

C387

1 2

1uF 6.3V

C388

21

C389

1uF 6.3V

1 2

C386

1uF 6.3V

21

C390

1uF 6.3V

1 2

1uF 6.3V

+3.3V

20,23

2

x00_gt_061803

1

C1755

+3.3V

21

.1uF

10V-10%

0.1uF 16V

16
16

20,21,35
20,21,35

20,23

16,20
16,20
16,20

DDR2A_BA1
DDR2A_BA0
DDR2A_BA2

NC_DDR2A_DIMM1A_A15

16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20

16

16
16,20
16,20
16,20

DDR2A_A13
DDR2A_A12
DDR2A_A11
DDR2A_A10
DDR2A_A9
DDR2A_A8
DDR2A_A7
DDR2A_A6
DDR2A_A5
DDR2A_A4
DDR2A_A3
DDR2A_A2
DDR2A_A1
DDR2A_A0

DDR2A_CS6_N

DDR2A_CS0_N
DDR2A_RAS_N
DDR2A_CAS_N
DDR2A_WE_N

CK_200M_DIMMA1_N
CK_200M_DIMMA1_P

16
16

DDR2_CKE6
DDR2_CKE0

ICH_SEG1_SDA
ICH_SEG1_SCL

DDR2A_DIMM_VREF

16
16

16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20

16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20

DDR2A_CS7_N

DDR2A_CS1_N

DDR2A_CB7

DDR2A_CB6

DDR2A_CB5

DDR2A_CB4

DDR2A_CB3

DDR2A_CB2

DDR2A_CB1

DDR2A_CB0

DDR2A_DQS17_P
DDR2A_DQS17_N
DDR2A_DQS16_P
DDR2A_DQS16_N
DDR2A_DQS15_P
DDR2A_DQS15_N
DDR2A_DQS14_P
DDR2A_DQS14_N
DDR2A_DQS13_P
DDR2A_DQS13_N
DDR2A_DQS12_P
DDR2A_DQS12_N
DDR2A_DQS11_P
DDR2A_DQS11_N
DDR2A_DQS10_P
DDR2A_DQS10_N
DDR2A_DQS9_P
DDR2A_DQS9_N
DDR2A_DQS8_P
DDR2A_DQS8_N
DDR2A_DQS7_P
DDR2A_DQS7_N
DDR2A_DQS6_P
DDR2A_DQS6_N
DDR2A_DQS5_P
DDR2A_DQS5_N
DDR2A_DQS4_P
DDR2A_DQS4_N
DDR2A_DQS3_P
DDR2A_DQS3_N
DDR2A_DQS2_P
DDR2A_DQS2_N
DDR2A_DQS1_P
DDR2A_DQS1_N
DDR2A_DQS0_P
DDR2A_DQS0_N

NC_DIMM1A_ERR_OUT_N
NC_DIMM1A_PAR_IN
NC_DIMM1A_TEST

NC_DIMM1A_CK2_N
NC_DIMM1A_CK2
NC_DIMM1A_CK1_N
NC_DIMM1A_CK1

190

71

54
173
174
196
176

57

70
177
179

58
180

60

61
182

63
183
188

76
193
192

74

73
221
220
138
137
186
185
171

52

119
120
101
240
239
238

1

77
195

168
167
162
161

49

48

43

42

164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126

46

45
114
113
105
104

93

92

84

83

37

36

28

27

16

15

7
6

55

68
102

BA1
BA0
A16/BA2
A15
A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

S1
S0
RAS
CAS
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
CKE0

SDA
SCL
SA2
SA1
SA0
VDDSPD
VREF
ODT1
ODT0

CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0

DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
DQS8/NC
DQS8/NC
DQS7
DQS7
DQS6
DQS6
DQS5
DQS5
DQS4
DQS4
DQS3
DQS3
DQS2
DQS2
DQS1
DQS1
DQS0
DQS0

ERR_OUT
PAR_IN
TEST

DIMM1_A

DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDD10

VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0

VDDQ10

VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0

NC

RESET

236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3

197
189
187
184
178
172
69
67
64
59
53

194
191
181
175
170
78
75
72
62
56
51

19
18

DDR2A_SD7_7
DDR2A_SD7_6
DDR2A_SD7_5
DDR2A_SD7_4
DDR2A_SD7_3
DDR2A_SD7_2
DDR2A_SD7_1
DDR2A_SD7_0
DDR2A_SD6_7
DDR2A_SD6_6
DDR2A_SD6_5
DDR2A_SD6_4
DDR2A_SD6_3
DDR2A_SD6_2
DDR2A_SD6_1
DDR2A_SD6_0
DDR2A_SD5_7
DDR2A_SD5_6
DDR2A_SD5_5
DDR2A_SD5_4
DDR2A_SD5_3
DDR2A_SD5_2
DDR2A_SD5_1
DDR2A_SD5_0
DDR2A_SD4_7
DDR2A_SD4_6
DDR2A_SD4_5
DDR2A_SD4_4
DDR2A_SD4_3
DDR2A_SD4_2
DDR2A_SD4_1
DDR2A_SD4_0
DDR2A_SD3_7
DDR2A_SD3_6
DDR2A_SD3_5
DDR2A_SD3_4
DDR2A_SD3_3
DDR2A_SD3_2
DDR2A_SD3_1
DDR2A_SD3_0
DDR2A_SD2_7
DDR2A_SD2_6
DDR2A_SD2_5
DDR2A_SD2_4
DDR2A_SD2_3
DDR2A_SD2_2
DDR2A_SD2_1
DDR2A_SD2_0
DDR2A_SD1_7
DDR2A_SD1_6
DDR2A_SD1_5
DDR2A_SD1_4
DDR2A_SD1_3
DDR2A_SD1_2
DDR2A_SD1_1
DDR2A_SD1_0
DDR2A_SD0_7
DDR2A_SD0_6
DDR2A_SD0_5
DDR2A_SD0_4
DDR2A_SD0_3
DDR2A_SD0_2
DDR2A_SD0_1
DDR2A_SD0_0

NC_DIMM1A_19
DDR2_RESET_N_1

SUB=SUB*_P0136

240 PIN DDR II DIMM

I2C Address

AA 1010 (101)0

I2C Address

A6 1010 (011)0

A2 1010 (001)0

I2C Address

4 4

ROOM = DIMM1_A

ROOM = DIMM3_A

ROOM = DIMM2_A

INC.

ROUND ROCK,TEXAS

TITLE

CHANNEL A DIMMS

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

20 OF 60

subsys done

A B

DC

B D

CA

1

2

3

R541

1 2

R542

+1.8V

R5591 2

1 2

1K-1%

+3.3V

C1756

4.7K

+3.3V

1K-1%

2

1

+3.3V

21

C645

0.1uF 16V
x00_gt_061803

16,21
16,21
16,21

16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21

16,21
16,21
16,21
16,21

CK_200M_DIMMB3_N

16

CK_200M_DIMMB3_P

16

16,21

20,21,35
20,21,35

21,23

16,21

16,21
16,21
16,21
16,21
16,21
16,21

.1uF

10V-10%

16,21
16,21

16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21

NC_DIMM3B_ERR_OUT_N
NC_DIMM3B_PAR_IN
NC_DIMM3B_TEST

Put one 10uF cap at each end of DIMM

C770

1 2

10uF 6.3V

DDR2B_BA1
DDR2B_BA0
DDR2B_BA2
NC_DDR2B_DIMM3B_A15
NC_DDR2B_DIMM3B_A14
DDR2B_A13
DDR2B_A12
DDR2B_A11
DDR2B_A10
DDR2B_A9
DDR2B_A8
DDR2B_A7
DDR2B_A6
DDR2B_A5
DDR2B_A4
DDR2B_A3
DDR2B_A2
DDR2B_A1
DDR2B_A0

DIMM3B_S1_N
DDR2B_CS4_N
DDR2B_RAS_N
DDR2B_CAS_N
DDR2B_WE_N

NC_DIMM3B_CK2_N
NC_DIMM3B_CK2
NC_DIMM3B_CK1_N
NC_DIMM3B_CK1

DIMM3B_CKE1
DDR2_CKE5

ICH_SEG1_SDA
ICH_SEG1_SCL

DDR2B_DIMM_VREF
DIMM3B_ODT1
DDR2B_CS5_N

DDR2B_CB7
DDR2B_CB6
DDR2B_CB5
DDR2B_CB4
DDR2B_CB3
DDR2B_CB2
DDR2B_CB1
DDR2B_CB0

DDR2B_DQS17_P
DDR2B_DQS17_N
DDR2B_DQS16_P
DDR2B_DQS16_N
DDR2B_DQS15_P
DDR2B_DQS15_N
DDR2B_DQS14_P
DDR2B_DQS14_N
DDR2B_DQS13_P
DDR2B_DQS13_N
DDR2B_DQS12_P
DDR2B_DQS12_N
DDR2B_DQS11_P
DDR2B_DQS11_N
DDR2B_DQS10_P
DDR2B_DQS10_N
DDR2B_DQS9_P
DDR2B_DQS9_N
DDR2B_DQS8_P
DDR2B_DQS8_N
DDR2B_DQS7_P
DDR2B_DQS7_N
DDR2B_DQS6_P
DDR2B_DQS6_N
DDR2B_DQS5_P
DDR2B_DQS5_N
DDR2B_DQS4_P
DDR2B_DQS4_N
DDR2B_DQS3_P
DDR2B_DQS3_N
DDR2B_DQS2_P
DDR2B_DQS2_N
DDR2B_DQS1_P
DDR2B_DQS1_N
DDR2B_DQS0_P
DDR2B_DQS0_N

21

C769

10uF 6.3V

SUB=SUB*_P0136

190

71

54
173
174
196
176

57

70
177
179

58
180

60

61
182

63
183
188

76
193
192

74

73
221
220
138
137
186
185
171

52

119
120
101
240
239
238

1

77
195

168
167
162
161

49

48

43

42

164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126

46

45
114
113
105
104

93

92

84

83

37

36

28

27

16

15

7
6

55

68
102

21

C787

.1uF

C396

10V-10%

1 2

1uF 6.3V

DIMM3_B

BA1
BA0
A16/BA2
A15
A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

S1
S0
RAS
CAS
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
CKE0

SDA
SCL
SA2
SA1
SA0
VDDSPD
VREF
ODT1
ODT0

CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0

DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
DQS8/NC
DQS8/NC
DQS7
DQS7
DQS6
DQS6
DQS5
DQS5
DQS4
DQS4
DQS3
DQS3
DQS2
DQS2
DQS1
DQS1
DQS0
DQS0

ERR_OUT
PAR_IN
TEST

240 PIN DDR II DIMM

C395

21

x00_tj_041003

C394

1uF 6.3V

236
235

DQ63

230

DQ62

229

DQ61

117

DQ60

116

DQ59

111

DQ58

110

DQ57

227

DQ56

226

DQ55

218

DQ54

217

DQ53

108

DQ52

107

DQ51

99

DQ50

98

DQ49

215

DQ48

214

DQ47

209

DQ46

208

DQ45

96

DQ44

95

DQ43

90

DQ42

89

DQ41

206

DQ40

205

DQ39

200

DQ38

199

DQ37

87

DQ36

86

DQ35

81

DQ34

80

DQ33

159

DQ32

158

DQ31

153

DQ30

152

DQ29

40

DQ28

39

DQ27

34

DQ26

33

DQ25

150

DQ24

149

DQ23

144

DQ22

143

DQ21

31

DQ20

30

DQ19

25

DQ18

24

DQ17

141

DQ16

140

DQ15

132

DQ14

131

DQ13

22

DQ12

21

DQ11

13

DQ10

12

DQ9

129

DQ8

128

DQ7

123

DQ6

122

DQ5

10

DQ4

9

DQ3

4

DQ2

3

DQ1
DQ0

197

VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0

189
187
184
178
172
69
67
64
59
53

194
191
181
175
170
78
75
72
62
56
51

VDD10

VDDQ10

VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0

19
18

NC

RESET

1 2

1uF 6.3V

x00_tj_060903

21,23

DDR2B_SD7_7
DDR2B_SD7_6
DDR2B_SD7_5
DDR2B_SD7_4
DDR2B_SD7_3
DDR2B_SD7_2
DDR2B_SD7_1
DDR2B_SD7_0
DDR2B_SD6_7
DDR2B_SD6_6
DDR2B_SD6_5
DDR2B_SD6_4
DDR2B_SD6_3
DDR2B_SD6_2
DDR2B_SD6_1
DDR2B_SD6_0
DDR2B_SD5_7
DDR2B_SD5_6
DDR2B_SD5_5
DDR2B_SD5_4
DDR2B_SD5_3
DDR2B_SD5_2
DDR2B_SD5_1
DDR2B_SD5_0
DDR2B_SD4_7
DDR2B_SD4_6
DDR2B_SD4_5
DDR2B_SD4_4
DDR2B_SD4_3
DDR2B_SD4_2
DDR2B_SD4_1
DDR2B_SD4_0
DDR2B_SD3_7
DDR2B_SD3_6
DDR2B_SD3_5
DDR2B_SD3_4
DDR2B_SD3_3
DDR2B_SD3_2
DDR2B_SD3_1
DDR2B_SD3_0
DDR2B_SD2_7
DDR2B_SD2_6
DDR2B_SD2_5
DDR2B_SD2_4
DDR2B_SD2_3
DDR2B_SD2_2
DDR2B_SD2_1
DDR2B_SD2_0
DDR2B_SD1_7
DDR2B_SD1_6
DDR2B_SD1_5
DDR2B_SD1_4
DDR2B_SD1_3
DDR2B_SD1_2
DDR2B_SD1_1
DDR2B_SD1_0
DDR2B_SD0_7
DDR2B_SD0_6
DDR2B_SD0_5
DDR2B_SD0_4
DDR2B_SD0_3
DDR2B_SD0_2
DDR2B_SD0_1
DDR2B_SD0_0

NC_DIMM3B_19
DDR2_RESET_N_2

C393

1 2

1uF 6.3V

DDR2B_DIMM_VREF

C392

16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21

+1.8V

21

1uF 6.3V

+1.8V

+1.8V

5,20

1

C135

2

1

2

C136

0.1uF 16V

0.1uF 16V

+3.3V

C644

x00_gt_061803

.1uF

1 2

10V-10%

+3.3V

+3.3V

2

1

C1757

21,23

0.1uF 16V

16,21
16,21
16,21

16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21

16,21

16
16,21
16,21
16,21

16
16

16,21

16

20,21,35
20,21,35

DDR2B_DIMM_VREF

16,21

16

16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21

16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21

NC_DIMM2B_ERR_OUT_N
NC_DIMM2B_PAR_IN
NC_DIMM2B_TEST

21

C772

DDR2B_BA1
DDR2B_BA0
DDR2B_BA2

NC_DDR2B_DIMM2B_A15
NC_DDR2B_DIMM2B_A14

DDR2B_A13
DDR2B_A12
DDR2B_A11
DDR2B_A10
DDR2B_A9
DDR2B_A8
DDR2B_A7
DDR2B_A6
DDR2B_A5
DDR2B_A4
DDR2B_A3
DDR2B_A2
DDR2B_A1
DDR2B_A0

DDR2B_CS4_N

DDR2B_CS2_N
DDR2B_RAS_N
DDR2B_CAS_N
DDR2B_WE_N

NC_DIMM2B_CK2_N
NC_DIMM2B_CK2
NC_DIMM2B_CK1_N
NC_DIMM2B_CK1

CK_200M_DIMMB2_N
CK_200M_DIMMB2_P

DDR2_CKE5
DDR2_CKE3

ICH_SEG1_SDA
ICH_SEG1_SCL

DDR2B_CS5_N

DDR2B_CS3_N

DDR2B_CB7

DDR2B_CB6

DDR2B_CB5

DDR2B_CB4

DDR2B_CB3

DDR2B_CB2

DDR2B_CB1

DDR2B_CB0

DDR2B_DQS17_P
DDR2B_DQS17_N
DDR2B_DQS16_P
DDR2B_DQS16_N
DDR2B_DQS15_P
DDR2B_DQS15_N
DDR2B_DQS14_P
DDR2B_DQS14_N
DDR2B_DQS13_P
DDR2B_DQS13_N
DDR2B_DQS12_P
DDR2B_DQS12_N
DDR2B_DQS11_P
DDR2B_DQS11_N
DDR2B_DQS10_P
DDR2B_DQS10_N
DDR2B_DQS9_P
DDR2B_DQS9_N
DDR2B_DQS8_P
DDR2B_DQS8_N
DDR2B_DQS7_P
DDR2B_DQS7_N
DDR2B_DQS6_P
DDR2B_DQS6_N
DDR2B_DQS5_P
DDR2B_DQS5_N
DDR2B_DQS4_P
DDR2B_DQS4_N
DDR2B_DQS3_P
DDR2B_DQS3_N
DDR2B_DQS2_P
DDR2B_DQS2_N
DDR2B_DQS1_P
DDR2B_DQS1_N
DDR2B_DQS0_P
DDR2B_DQS0_N

10uF 6.3V

C771

SUB=SUB*_P0136

1 2

10uF 6.3V

190

71

54
173
174
196
176

57

70
177
179

58
180

60

61
182

63
183
188

76
193
192

74

73
221
220
138
137
186
185
171

52

119
120
101
240
239
238

1

77
195

168
167
162
161

49

48

43

42

164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126

46

45
114
113
105
104

93

92

84

83

37

36

28

27

16

15

7
6

55

68
102

21

C788

1 2

.1uF

C404

10V-10%

1uF 6.3V

DIMM2_B

BA1
BA0
A16/BA2
A15
A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

S1
S0
RAS
CAS
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
CKE0

SDA
SCL
SA2
SA1
SA0
VDDSPD
VREF
ODT1
ODT0

CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0

DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
DQS8/NC
DQS8/NC
DQS7
DQS7
DQS6
DQS6
DQS5
DQS5
DQS4
DQS4
DQS3
DQS3
DQS2
DQS2
DQS1
DQS1
DQS0
DQS0

ERR_OUT
PAR_IN
TEST

240 PIN DDR II DIMM

C403

1 2

C402

1uF 6.3V

DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDD10

VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0

VDDQ10

VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0

NC

RESET

21

236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3

197
189
187
184
178
172
69
67
64
59
53

194
191
181
175
170
78
75
72
62
56
51

19
18

C405

1uF 6.3V

1 2

DDR2B_SD7_7
DDR2B_SD7_6
DDR2B_SD7_5
DDR2B_SD7_4
DDR2B_SD7_3
DDR2B_SD7_2
DDR2B_SD7_1
DDR2B_SD7_0
DDR2B_SD6_7
DDR2B_SD6_6
DDR2B_SD6_5
DDR2B_SD6_4
DDR2B_SD6_3
DDR2B_SD6_2
DDR2B_SD6_1
DDR2B_SD6_0
DDR2B_SD5_7
DDR2B_SD5_6
DDR2B_SD5_5
DDR2B_SD5_4
DDR2B_SD5_3
DDR2B_SD5_2
DDR2B_SD5_1
DDR2B_SD5_0
DDR2B_SD4_7
DDR2B_SD4_6
DDR2B_SD4_5
DDR2B_SD4_4
DDR2B_SD4_3
DDR2B_SD4_2
DDR2B_SD4_1
DDR2B_SD4_0
DDR2B_SD3_7
DDR2B_SD3_6
DDR2B_SD3_5
DDR2B_SD3_4
DDR2B_SD3_3
DDR2B_SD3_2
DDR2B_SD3_1
DDR2B_SD3_0
DDR2B_SD2_7
DDR2B_SD2_6
DDR2B_SD2_5
DDR2B_SD2_4
DDR2B_SD2_3
DDR2B_SD2_2
DDR2B_SD2_1
DDR2B_SD2_0
DDR2B_SD1_7
DDR2B_SD1_6
DDR2B_SD1_5
DDR2B_SD1_4
DDR2B_SD1_3
DDR2B_SD1_2
DDR2B_SD1_1
DDR2B_SD1_0
DDR2B_SD0_7
DDR2B_SD0_6
DDR2B_SD0_5
DDR2B_SD0_4
DDR2B_SD0_3
DDR2B_SD0_2
DDR2B_SD0_1
DDR2B_SD0_0

NC_DIMM2B_19
DDR2_RESET_N_1

1uF 6.3V

21,23

21

C399

1uF 6.3V

DDR2B_DIMM_VREF

C398

16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21

+1.8V

1 2

1uF 6.3V

+1.8V

+1.8V

5,20,21

1

C131

2

0.1uF 16V

x00_gt_061803

1

C132

2

0.1uF 16V

+3.3V

21

.1uF

C643

10V-10%

+3.3V

+3.3V

C1758

16
16

21,23

2

1

0.1uF 16V

16,21
16,21
16,21

16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21

16

16
16,21
16,21
16,21

CK_200M_DIMMB1_N
CK_200M_DIMMB1_P

16

16

20,21,35
20,21,35

DDR2B_DIMM_VREF

16

16

16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21

16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21

DDR2B_DQS17_P
DDR2B_DQS17_N
DDR2B_DQS16_P
DDR2B_DQS16_N
DDR2B_DQS15_P
DDR2B_DQS15_N
DDR2B_DQS14_P
DDR2B_DQS14_N
DDR2B_DQS13_P
DDR2B_DQS13_N
DDR2B_DQS12_P
DDR2B_DQS12_N
DDR2B_DQS11_P
DDR2B_DQS11_N
DDR2B_DQS10_P
DDR2B_DQS10_N
DDR2B_DQS9_P
DDR2B_DQS9_N
DDR2B_DQS8_P
DDR2B_DQS8_N
DDR2B_DQS7_P
DDR2B_DQS7_N
DDR2B_DQS6_P
DDR2B_DQS6_N
DDR2B_DQS5_P
DDR2B_DQS5_N
DDR2B_DQS4_P
DDR2B_DQS4_N
DDR2B_DQS3_P
DDR2B_DQS3_N
DDR2B_DQS2_P
DDR2B_DQS2_N
DDR2B_DQS1_P
DDR2B_DQS1_N
DDR2B_DQS0_P
DDR2B_DQS0_N

NC_DIMM1B_ERR_OUT_N
NC_DIMM1B_PAR_IN
NC_DIMM1B_TEST

Put one 10uF cap at each end of DIMMPut one 10uF cap at each end of DIMM

C774

1 2

10uF 6.3V

DDR2B_BA1
DDR2B_BA0
DDR2B_BA2

NC_DDR2B_DIMM1B_A15

NC_DDR2B_DIMM1B_A14
DDR2B_A13
DDR2B_A12
DDR2B_A11
DDR2B_A10
DDR2B_A9
DDR2B_A8
DDR2B_A7
DDR2B_A6
DDR2B_A5
DDR2B_A4
DDR2B_A3
DDR2B_A2
DDR2B_A1
DDR2B_A0

DDR2B_CS6_N

DDR2B_CS0_N
DDR2B_RAS_N
DDR2B_CAS_N
DDR2B_WE_N

NC_DIMM1B_CK2_N
NC_DIMM1B_CK2
NC_DIMM1B_CK1_N
NC_DIMM1B_CK1

DDR2_CKE7
DDR2_CKE1

ICH_SEG1_SDA
ICH_SEG1_SCL

DDR2B_CS7_N

DDR2B_CS1_N

DDR2B_CB7

DDR2B_CB6

DDR2B_CB5

DDR2B_CB4

DDR2B_CB3

DDR2B_CB2

DDR2B_CB1

DDR2B_CB0

SUB=SUB*_P0136

C773

21

10uF 6.3V

190

71

54
173
174
196
176

57

70
177
179

58
180

60

61
182

63
183
188

76
193
192

74

73
221
220
138
137
186
185
171

52

119
120
101
240
239
238

1

77
195

168
167
162
161

49

48

43

42

164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126

46

45
114
113
105
104

93

92

84

83

37

36

28

27

16

15

7
6

55

68
102

21

C789

.1uF

C410

10V-10%

1 2

1uF 6.3V

DIMM1_B

BA1
BA0
A16/BA2
A15
A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

S1
S0
RAS
CAS
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
CKE0

SDA
SCL
SA2
SA1
SA0
VDDSPD
VREF
ODT1
ODT0

CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0

DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
DQS8/NC
DQS8/NC
DQS7
DQS7
DQS6
DQS6
DQS5
DQS5
DQS4
DQS4
DQS3
DQS3
DQS2
DQS2
DQS1
DQS1
DQS0
DQS0

ERR_OUT
PAR_IN
TEST

240 PIN DDR II DIMM

C409

21

x00_tj_041003x00_tj_041003

1uF 6.3V

DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDD10

VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0

VDDQ10

VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0

NC

RESET

C408

236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3

197
189
187
184
178
172
69
67
64
59
53

194
191
181
175
170
78
75
72
62
56
51

19
18

1 2

1uF 6.3V

NC_DIMM1B_19
DDR2_RESET_N_1

21

C411

DDR2B_SD7_7
DDR2B_SD7_6
DDR2B_SD7_5
DDR2B_SD7_4
DDR2B_SD7_3
DDR2B_SD7_2
DDR2B_SD7_1
DDR2B_SD7_0
DDR2B_SD6_7
DDR2B_SD6_6
DDR2B_SD6_5
DDR2B_SD6_4
DDR2B_SD6_3
DDR2B_SD6_2
DDR2B_SD6_1
DDR2B_SD6_0
DDR2B_SD5_7
DDR2B_SD5_6
DDR2B_SD5_5
DDR2B_SD5_4
DDR2B_SD5_3
DDR2B_SD5_2
DDR2B_SD5_1
DDR2B_SD5_0
DDR2B_SD4_7
DDR2B_SD4_6
DDR2B_SD4_5
DDR2B_SD4_4
DDR2B_SD4_3
DDR2B_SD4_2
DDR2B_SD4_1
DDR2B_SD4_0
DDR2B_SD3_7
DDR2B_SD3_6
DDR2B_SD3_5
DDR2B_SD3_4
DDR2B_SD3_3
DDR2B_SD3_2
DDR2B_SD3_1
DDR2B_SD3_0
DDR2B_SD2_7
DDR2B_SD2_6
DDR2B_SD2_5
DDR2B_SD2_4
DDR2B_SD2_3
DDR2B_SD2_2
DDR2B_SD2_1
DDR2B_SD2_0
DDR2B_SD1_7
DDR2B_SD1_6
DDR2B_SD1_5
DDR2B_SD1_4
DDR2B_SD1_3
DDR2B_SD1_2
DDR2B_SD1_1
DDR2B_SD1_0
DDR2B_SD0_7
DDR2B_SD0_6
DDR2B_SD0_5
DDR2B_SD0_4
DDR2B_SD0_3
DDR2B_SD0_2
DDR2B_SD0_1
DDR2B_SD0_0

C407

1uF 6.3V

1 2

1uF 6.3V

21,23

16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21

C406

+1.8V

21

1uF 6.3V

DDR2B_DIMM_VREF

+1.8V

5,20,21

+1.8V

1

C134

2

0.1uF 16V

1

C133

2

1

0.1uF 16V

2

3

I2C Address

I2C Address

I2C Address

A4 1010 (010)0

A0 1010 (000)0

A8 1010 (100)0

4 4

ROOM = DIMM3_B

ROOM = DIMM2_B

ROOM = DIMM1_B

INC.

ROUND ROCK,TEXAS

TITLE

CHANNEL B DIMMS

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

21 OF 60

subsys done

A B

DC

B D

CA

1

CS0
CS1

CS2

RANK 4

RANK 2(/3)RANK 3

CS0

CS0

Vtt

Vtt

RANK 1(/4)

CS0

ODT0

CS0

ODT0

Vtt

Vtt

Relative to DIMM PNSignal

CS0 193

BANK 1

1

CS3
CS4
CS5

CS6

CS0

ODT0

CS0

ODT0

ODT0

CS1

ODT1

ODT0

CS1

ODT1

Vtt

Vtt

CS1

CS1

Vtt

Vtt

CS1
CS2
CS3
CS4
CS5
CS6
CS7

BANK 1
BANK 2
BANK 2
BANK 3,2
BANK 3,2
BANK 1
BANK 1

195
193
195
193,76
195,77
76
77

2

CS7

CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
CKE6
CKE7

CKE0

CKE0

CKE1CKE0

CKE0

CKE1

ODT1

CKE0

CKE1

ODT1

CKE0

CKE1

Signal DIMM PNRelative to

CKE0
CKE1
CKE2
CKE3
CKE4
CKE5 52,171

BANK 1
BANK 1
BANK 2
BANK 2
BANK 3,2
BANK 3,2

52
52
52
52
52,171

2

3

CMDCLKP0
CMDCLKN0
CMDCLKP1
CMDCLKN1
CMDCLKP2
CMDCLKN2
CMDCLKP3
CMDCLKN3

p185 p185

p186

p186

p185

p186

p185

p186

p185

p186

p185

p186

CKE6
CKE7

BANK 1
BANK 1

171
171

3

*Separate Channel A and B

for clocks

I2C

AA

A8

A6

A B

A4

A2

A0

A BA B

BANK 2

4 4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

BANK 1BANK 3

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

DATE

D1660

SHEET

12/16/2004

REV.

A03-00

22 OF 60

A B

DC

B D

CA

1

x00c4_tj_090304

+1.8V

SUB*_11307

R1056

1 2

21

SUB*_11307

R1055

49.9-.1%49.9-.1%

1 2

1uF

10V-10%

ROOM = MCH

NET_PHYSICAL_TYPE=PWR

C1117

C1118

1 2

0.1uF 16V

1 2

0.1uF 16V

DDR2B_MCH_VREF

MRGN_DDRMB

1

1

3 4

3 4

TSM 2X2
SMT HDR

2

+1.8V

ROOM = MCH

21

SUB*_11307

R1053

49.9-.1%49.9-.1%49.9-.1%49.9-.1%

16

2 1

750-1%

R325

2

NP01

NP*

SUB*_11307

R1054

1 2

21

C1115

1uF

10V-10%

NET_PHYSICAL_TYPE=PWR

C1116

1 2

0.1uF 16V

1 2

0.1uF 16V

DDR2A_MCH_VREF

MRGN_DDRMA

1

1
3 4

TSM 2X2
SMT HDR

2

16

750-1%

R327

1

2
43

NP*

12

NP01

+1.8V

21

SUB*_11307

R1120

SUB*_11307

R1119

1 2

C1224

49.9-.1% 49.9-.1%

+1.8V

ROOM = DIMM2_B

SUB*_11307

R1121

NET_PHYSICAL_TYPE=PWR

DDR2B_DIMM_VREF

21

21

1uF

C1215

10V-10%

21

0.1uF 16V

C1214

0.1uF 16V

MRGN_DDRB

1

1
3 4

TSM 2X2
SMT HDR

2

750-1%

R324

2
43

NP*

12

NP01

21

1 2

21

SUB*_11307

R1118

C1223

1 2

1uF

10V-10%

ROOM = DIMM2_A

NET_PHYSICAL_TYPE=PWR

21

C1212

0.1uF 16V

21

C1213

0.1uF 16V

DDR2A_DIMM_VREF

MRGN_DDRA

1

1

3 4

3 4

TSM 2X2
SMT HDR

2

20

2 1

750-1%

R326

2

NP01

NP*

2

2

3

3

4 4

INC.

MCH REFERENCES

TITLE

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

23 OF 60

DC

subsys done

A B

B D

CA

1

2

PXH_PCI_A_AD31

27

PXH_PCI_A_AD30

27

PXH_PCI_A_AD29

27

PXH_PCI_A_AD28

27

PXH_PCI_A_AD27

27

PXH_PCI_A_AD26

27

PXH_PCI_A_AD25

27

PXH_PCI_A_AD24

27

24,27

27,30
27,30
27,30
27,30
27,30
27,30
27,30

+3.3V

LAN_A_AUX

X00_GT_052803

A00_GT_061604

R422

2.7K-5%

2 1

Note: Switching to/from Aux done below

5,25

PXH_PCI_A_AD23
PXH_PCI_A_AD22

27

PXH_PCI_A_AD21

27

PXH_PCI_A_AD20

27

PXH_PCI_A_AD19

27

PXH_PCI_A_AD18

27

PXH_PCI_A_AD17

27

PXH_PCI_A_AD16

27

PXH_PCI_A_AD15

27

PXH_PCI_A_AD14

27

PXH_PCI_A_AD13

27

PXH_PCI_A_AD12

27

PXH_PCI_A_AD11

27

PXH_PCI_A_AD10

27

PXH_PCI_A_AD9

27

PXH_PCI_A_AD8

27

PXH_PCI_A_AD7

27

PXH_PCI_A_AD6

27

PXH_PCI_A_AD5

27

PXH_PCI_A_AD4

27

PXH_PCI_A_AD3

27

PXH_PCI_A_AD2

27

PXH_PCI_A_AD1

27

PXH_PCI_A_AD0

27

27
27
27
27

24

27
27
24

27
27
27
27
27

28

PXH_PCI_A_CBE3_N
PXH_PCI_A_CBE2_N
PXH_PCI_A_CBE1_N
PXH_PCI_A_CBE0_N

IDSEL_LOM_A
PXH_PCI_A_FRAME_N
PXH_PCI_A_IRDY_N
PXH_PCI_A_TRDY_N
PXH_PCI_A_DEVSEL_N
PXH_PCI_A_STOP_N
PXH_PCI_A_PERR_N
PXH_PCI_A_SERR_N
PXH_PCI_A_PAR
PXH_PCI_A_PCLKO0
GB_LOMA_CLKRUN_N

PXH_PCI_A_IRQ0_N
PXH_PCI_A_M66EN
PXH_PCI_A_PCIRST_2_N
PXH_PCI_A_GNT0_N
PXH_PCI_A_REQ0_N

SYSTEM_PWRGOOD_NIC
PCI_A_PME_N
GB_LOMA_AUX_PWR

SUB=SUB*_D5541

X00_GT_051503

B8

AD31

A8

AD30

C7

AD29

C6

AD28

B6

AD27

B5

AD26

A5

AD25

B4

AD24

B2

AD23

B1

AD22

C1

AD21

D3

AD20

D2

AD19

D1

AD18

E3

AD17

K1

AD16

L2

AD15

L1

AD14

M3

AD13

M2

AD12

M1

AD11

N2

AD10

N3

AD9

P3

AD8

N4

AD7

P4

AD6

M5

AD5

N5

AD4

P5

AD3

P6

AD2

M7

AD1

N7

AD0

C4

CBE3

F3

CBE2

L3

CBE1

M4

CBE0

A4

IDSEL

F2

FRAME

F1

IRDY

G3

TRDY

H3

DEVSEL

H1

STOP

J2

PERR

A2

SERR

J1

PAR

G1

CLK

C8

CLK_RUN

H2

INTA

C2

M66EN

B9

RST

J3

GNT

C3

REQ

A9

LAN_PWR_GOOD

A6

PME

J12

AUX_PWR

TABOR_1

82541EI

HETERO 1 OF 2

NC_A1

NC_A14

NC_D9

NC_D10

NC_L8
NC_P1

NC_P14
RSVD_NC_C5
RSVD_NC_L7
RSVD_NC_M8

RSVD_NC_N11
RSVD_VSS_D4
RSVD_VSS_E4

IEEE_TEST­IEEE_TEST+

XTAL1
XTAL2

JTAG_TCK
JTAG_TMS

JTAG_TRST

JTAG_TDI
JTAG_TDO

TEST

FLSH_SCK

FLSH_SO/LAN_DISABLE

FLSH_CE
FLSH_SI

SMBCLK

SMBDATA

SMBALERT

EE_MODE

EE_DO
EE_DI
EE_CS
EE_SK

LED0/LINK

LED1/ACT

LED2/LINK100

LED3/LINK1000

CTRL_12
CTRL_18

SDP0
SDP1
SDP2
SDP3

MDIA0-

MDIA0+

MDIA1-

MDIA1+

MDIA2-

MDIA2+

MDIA3-

MDIA3+

A1
A14
D9
D10
L8
P1
P14
C5
L7
M8
N11
D4
E4

D14
B14

K14
J14

L14
L12
L13
M13
M14
A13

N9
P9
M9
M11

A10
C9
B10

J4
N10
P10
P7
M10

A12
C11
B11
B12

P11
B13

N14
P13
N13
M12

C14
C13
E14
E13
F14
F13
H14
H13

NC_A1_82541_1
NC_A14_82541_1
NC_D9_82541_1
NC_D10_82541_1
NC_L8_82541_1
NC_P1_82541_1
NC_P14_82541_1
NC_C5_82541_1
NC_L7_82541_1
NC_M8_82541_1
NC_N11_82541_1

GB_LOMA_TEST­GB_LOMA_TEST+

GB_LOMA_XTAL1
GB_LOMA_XTAL2

GB_LOMA_JTAG_TCK
GB_LOMA_JTAG_TMS
GB_LOMA_JTAG_TRST_N
GB_LOMA_JTAG_TDI
NC_GB_LOMA_JTAG_TDO
GB_LOMA_TEST

NC_GB_LOMA_FLSH_SCK
DISABLE_TABOR_1_N
NC_GB_LOMA_FLSH_CE
NC_GB_LOMA_FLSH_SI

I2C_NICA_SCL_R
I2C_NICA_SDA_R
NIC_ALERT_N

GB_LOMA_EEMODE
GB_LOMA_EEDO
GB_LOMA_EEDI
GB_LOMA_EECS
GB_LOMA_EESK

GB_LOMA_LINK_UP_LED_N
GB_LOMA_ACT_LED_N
GB_LOMA_LINK100_LED_N
NC_GB_LOMA_LINK1000_LED_N

GB_LOMA_CTRL_12
GB_LOMA_CTRL_18

NC_GB_LOMA_SDP0
NC_GB_LOMA_SDP1
NC_GB_LOMA_SDP2
NC_GB_LOMA_SDP3

MDIA0­MDIA0+
MDIA1­MDIA1+
MDIA2­MDIA2+
MDIA3­MDIA3+

21

R122

21

R121

49.9-1%

21

R120

49.9-1%

24

24
24
25,44,45

24

26
26
24

24
24

21

R119

49.9-1%

12

J1

1

RN20

2
3
4

100 Ohm 5%

21

R118

49.9-1%

ROOM = LOM_A

ECAD: Route traces as differential

to connector

NP*

ECAD: Place these components as close

to the GB_LOM as possible

X03_GT_010704

8

21

C423

+3.3V

LAN_A_AUX

2.7K-5%

21

49.9-1%

100

49.9-1%

21

R117

7
6
5

21

R168

1K-1%

24
24
24
24

21

R123

49.9-1%

R116

49.9-1%

1 2

25MHz-30ppm

22pF 50V

2 1

R1794

24
24

X1

GB_LOMA_EECS
GB_LOMA_EEDO

C422

26
26
26
26
26
26
26
26

21

22pF 50V

+3.3V

LAN_A_AUX

X03_GT_010704

GB_LOMA_EEMODE

24

U23

PRELIMINARY SYMBOL

1

CS

2

SO

3

WP

4

GND

ENG MGR APPROVAL NEEDED FOR MODEM

SPI Serial EEPROMs-1024X8

SUB*_M4291

X03_GT_010703

VCC

HOLD

SCK

SI

8
7
6
5

+3.3V

LAN_A_AUX

R282

+3.3V

LAN_A_AUX

0.1uF 16V

C87

12

GB_LOMA_EESK
GB_LOMA_EEDI

2 1

+3.3V

LAN_A_AUX

2.7K-5%

+3.3V

LAN_A_AUX

R1793

1 2

LAN_A_AUX

R109

100K-1%

0-5%

24
24

+1.8V

12

+1.2V

LAN_A_AUX

X00_GT_051503

Sleep mode current limiter

C86

1 2

0.1uF 16V

GB_LOMA_VIO

SUB=SUB*_D5541

X00_GT_051503

A11

K13

P12

J10
J11

K10
K11

L10

E11
E12
G13
H11

D12
J13

D11
G12

G2

VIO

A3

3P3V_A3

A7

3P3V_A7
3P3V_A11

E1

3P3V_E1

K3

3P3V_K3

K4

3P3V_K4
3P3V_K13

N6

3P3V_N6

N8

3P3V_N8

P2

3P3V_P2
3P3V_P12

G5

1P2V_G5

G6

1P2V_G6

H5

1P2V_H5

H6

1P2V_H6

H7

1P2V_H7

H8

1P2V_H8

J5

1P2V_J5

J6

1P2V_J6

J7

1P2V_J7

J8

1P2V_J8

J9

1P2V_J9
1P2V_J10
1P2V_J11

K5

1P2V_K5

K6

1P2V_K6

K7

1P2V_K7

K8

1P2V_K8

K9

1P2V_K9
1P2V_K10
1P2V_K11

L4

1P2V_L4

L5

1P2V_L5

L9

1P2V_L9
1P2V_L10

A1.2V_E11
A1.2V_E12
A1.2V_G13
A1.2V_H11

G4

PLL_1.2V_G4

H4

PLL_1.2V_H4

CLKR_1.8V
XTAL_1.8V

A1.8V_D11
A1.8V_G12

TABOR_1

82541EI

HETERO 2 OF 2

GND_B3
GND_B7

GND_C10

GND_D5
GND_D6
GND_D7
GND_D8
GND_E2
GND_E5
GND_E6
GND_E7
GND_E8
GND_E9

GND_E10

GND_F4
GND_F5
GND_F6
GND_F7
GND_F8
GND_F9

GND_F10

GND_G7
GND_G8
GND_G9

GND_G10

GND_H9

GND_H10

GND_K2
GND_L6

GND_L11

GND_M6
GND_N1

GND_N12

GND_P8

AGND_C12
AGND_D13
AGND_F11
AGND_G11
AGND_G14
AGND_K12

CLKR_CAP

XTAL_CAP

B3
B7
C10
D5
D6
D7
D8
E2
E5
E6
E7
E8
E9
E10
F4
F5
F6
F7
F8
F9
F10
G7
G8
G9
G10
H9
H10
K2
L6
L11
M6
N1
N12
P8

C12
D13
F11
G11
G14
K12

F12

H12

NP

C345

X

1000pF

1 2

PART_NUMBER=79015

50V-10%

24

NP

21

C346

X

1000pF

50V-10%

PART_NUMBER=79015

+3.3V

LAN_A_AUX

25,44,59

25,44,59

24

24

DISABLE_TABOR_1_N

24,27

40

GB_LOMA_LINK100_LED_N

PXH_PCI_A_AD23

DISABLE_ETHERNET_1

I2C_NIC_SDA

I2C_NIC_SCL

GB_LOMA_CLKRUN_N

+3.3V

LAN_A_AUX

R1910

2 1

R442

0-5%

2.7K-5%

21

R443

1 2

0-5%

2.7K-5%

21

R88

NP*

R1828

330-5%

X03_GT_010703

+12V

1 2

2.7K-5%

NP

21

R455

X

12

R1810

NP

R456

4.7K

X

FP_GB_ETH_LED_1

Q141

2N7002

4.7K

1 2

I2C_NICA_SDA_R

I2C_NICA_SCL_R

Q140

3

D

2N7002

1

G

X00_GT_051503

2

S

1

G

1N914

NP*

D

3

S

2

32

R_IDSEL_LOMA

8.2K-5%

1 3

D70

Q81

2N7002

24

24

12

R1811

1

G

1

R1812

2 1

100-5%

IDSEL_LOM_A

24

2

D

3

S

2

x03b_sd

3

+12V

x03_GT_011504

21

Switching for Wake-On-Lan

+3.3V_AUX

+3.3V

NET_PHYSICAL_TYPE=100MIL

C91

1 2

0.1uF 16V

C90

1 2

0.1uF 16V

X00_GT_051503

+3.3V

LAN_AUX

C89

1 2

0.1uF 16V

LAN_A_AUX

C88

+3.3V

1 2

ECAD: Place these termination networks close

0.1uF 16V

LAN_B_AUX

to the LOM IC

GB_LOMA_CTRL_12

24

NET_PHYSICAL_TYPE=25MIL

+3.3V

LAN_AUX

NET_PHYSICAL_TYPE=25MIL

R1950

1 2

0-5%

1

BCP69

Q1

R17

1 2

3

1.33-1%

42

X00_GT_011804

C92

1 2

21

C307

0.1uF 16V

4.7uF

6.3V-10%
+1.2V

LAN_A_AUX

+1.2V

LAN_A_AUX

21

C46

C45

10uF 6.3V

1 2

X00_GT_092303

NP

C47

10uF 6.3V

X

ECAD: Place all decoupling caps close to LOM chip pins

Regulators & Decoupling

1 2

10uF 6.3V

C116

1 2

C112

0.1uF 16V

1 2

C113

0.1uF 16V

+1.8V

LAN_A_AUX

1 2

0.1uF 16V

C114

1 2

0.1uF 16V

C115

1 2

0.1uF 16V

C654

1 2

0.1uF 16V

X00_GT_051503

C655

1 2

C656

0.1uF 16V

X00_GT_051503

1 2

0.1uF 16V

C657

1 2

0.1uF 16V

C658

1 2

0.1uF 16V

C660

+3.3V+3.3V

LAN_A_AUX

1 2

C671

0.1uF 16V

1 2

C678

0.1uF 16V

1 2

0.1uF 16V

C679

1 2

0.1uF 16V

C680

1 2

C843

0.1uF 16V

1 2

0.1uF 16V

C844

1 2

3

0.1uF 16V

5,35,41

x03_GT_011504

SYSTEM_PWRGOOD_FETS

2N7002

Q6

G

R23

3.3K-5%

GB_PS_PWRGOOD_12V

21

Q5

D

3

R24

D

3

1

S

2

2N7002

3.3K-5%
td_on = 20ns

1

G

S

2

td_off = 20ns

R231

1 2

20K-1%

x02_sd

1

S1

2

G1

3

S2

4 5

G2 DRN4

DUAL N & P CHANNEL FETS
12V ON GATE1 ENABLES +3.3V TO DRN PINS
0V ON GATE 2 ENABLES +3.3V_AUX TO DRN PINS

For Everglades inrush issue

Q75

SI4501DY

DRN1
DRN2
DRN3

R4500

8
7
6

22uF 6.3V

C420

21

0.1uF 16V
C838

12

1 2

0-5%

R4501

1 2

0-5%

24

GB_LOMA_CTRL_18

NET_PHYSICAL_TYPE=25MIL

1 2

R1953

0-5%

NP

R1951

X

1 2

NP

R1952

X

1 2

150-1%

0-5%

NET_PHYSICAL_TYPE=25MIL

1

BCP69

Q2

C41

21

C40

10uF 6.3V

1 2

10uF 6.3V

C101

1 2

0.1uF 16V

C104

1 2

0.1uF 16V

C836

1 2

0.1uF 16V

21

C38

1 2

X00_GT_011804

+3.3V

LAN_A_AUX

3

C93

1 2

42

21

C306

0.1uF 16V

4.7uF

6.3V-10%

+1.8V

LAN_A_AUX

21

C37

10uF 6.3V

21

C94

10uF 6.3V

1 2

0.1uF 16V

C107

1 2

0.1uF 16V

C681

1 2

0.1uF 16V

C682

1 2

0.1uF 16V

C845

1 2

0.1uF 16V

C835

1 2

0.1uF 16V

NP

C39

C236

10uF 6.3V

10uF 6.3V

C100

1 2

C102

0.1uF 16V

1 2

C103

0.1uF 16V

1 2

C105

0.1uF 16V

1 2

C106

0.1uF 16V

1 2

C828

0.1uF 16V

1 2

C837

0.1uF 16V

1 2

C829

0.1uF 16V

1 2

C834

0.1uF 16V

1 2

0.1uF 16V

4 4

R1954

X

NP

150-1%

1 2

INC.

ROUND ROCK,TEXAS

R1955

X

1 2

68-1%

Gigabit NIC A- Tabor II

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

24 OF 60

DC

subsys done

A B

B D

CA

1

2

PXH_PCI_B_AD31

27

PXH_PCI_B_AD30

27

PXH_PCI_B_AD29

27

PXH_PCI_B_AD28

27

PXH_PCI_B_AD27

27

PXH_PCI_B_AD26

27

PXH_PCI_B_AD25

27

25,27

27,30
27,30
27,30
27,30
27,30
27,30
27,30

+3.3V

LAN_B_AUX

A00_GT_061604

R429

2 1

Note: Switching to/from Aux on previous page

5,24

2.7K-5%

PXH_PCI_B_AD24
PXH_PCI_B_AD23

27

PXH_PCI_B_AD22

27

PXH_PCI_B_AD21

27

PXH_PCI_B_AD20

27

PXH_PCI_B_AD19

27

PXH_PCI_B_AD18

27

PXH_PCI_B_AD17

27

PXH_PCI_B_AD16

27

PXH_PCI_B_AD15

27

PXH_PCI_B_AD14

27

PXH_PCI_B_AD13

27

PXH_PCI_B_AD12

27

PXH_PCI_B_AD11

27

PXH_PCI_B_AD10

27

PXH_PCI_B_AD9

27

PXH_PCI_B_AD8

27

PXH_PCI_B_AD7

27

PXH_PCI_B_AD6

27

PXH_PCI_B_AD5

27

PXH_PCI_B_AD4

27

PXH_PCI_B_AD3

27

PXH_PCI_B_AD2

27

PXH_PCI_B_AD1

27

PXH_PCI_B_AD0

27

27
27
27
27

25

27
27
25

27
27
27
27
27

28

PXH_PCI_B_CBE3_N
PXH_PCI_B_CBE2_N
PXH_PCI_B_CBE1_N
PXH_PCI_B_CBE0_N

IDSEL_LOM_B
PXH_PCI_B_FRAME_N
PXH_PCI_B_IRDY_N
PXH_PCI_B_TRDY_N
PXH_PCI_B_DEVSEL_N
PXH_PCI_B_STOP_N
PXH_PCI_B_PERR_N
PXH_PCI_B_SERR_N
PXH_PCI_B_PAR
PXH_PCI_B_PCLKO0

GB_LOMB_CLKRUN_N

PXH_PCI_B_IRQ0_N
PXH_PCI_B_M66EN
PXH_PCI_B_PCIRST_2_N
PXH_PCI_B_GNT0_N
PXH_PCI_B_REQ0_N

SYSTEM_PWRGOOD_NIC
PCI_B_PME_N
GB_LOMB_AUX_PWR

SUB=SUB*_D5541

X00_GT_052003

B8

AD31

A8

AD30

C7

AD29

C6

AD28

B6

AD27

B5

AD26

A5

AD25

B4

AD24

B2

AD23

B1

AD22

C1

AD21

D3

AD20

D2

AD19

D1

AD18

E3

AD17

K1

AD16

L2

AD15

L1

AD14

M3

AD13

M2

AD12

M1

AD11

N2

AD10

N3

AD9

P3

AD8

N4

AD7

P4

AD6

M5

AD5

N5

AD4

P5

AD3

P6

AD2

M7

AD1

N7

AD0

C4

CBE3

F3

CBE2

L3

CBE1

M4

CBE0

A4

IDSEL

F2

FRAME

F1

IRDY

G3

TRDY

H3

DEVSEL

H1

STOP

J2

PERR

A2

SERR

J1

PAR

G1

CLK

C8

CLK_RUN

H2

INTA

C2

M66EN

B9

RST

J3

GNT

C3

REQ

A9

LAN_PWR_GOOD

A6

PME

J12

AUX_PWR

TABOR_2

82541EI

HETERO 1 OF 2

NC_A1

NC_A14

NC_D9

NC_D10

NC_L8
NC_P1

NC_P14
RSVD_NC_C5
RSVD_NC_L7
RSVD_NC_M8

RSVD_NC_N11
RSVD_VSS_D4
RSVD_VSS_E4

IEEE_TEST­IEEE_TEST+

XTAL1
XTAL2

JTAG_TCK
JTAG_TMS

JTAG_TRST

JTAG_TDI
JTAG_TDO

TEST

FLSH_SCK

FLSH_SO/LAN_DISABLE

FLSH_CE
FLSH_SI

SMBCLK

SMBDATA

SMBALERT

EE_MODE

EE_DO
EE_DI
EE_CS
EE_SK

LED0/LINK

LED1/ACT

LED2/LINK100

LED3/LINK1000

CTRL_12
CTRL_18

SDP0
SDP1
SDP2
SDP3

MDIA0-

MDIA0+

MDIA1-

MDIA1+

MDIA2-

MDIA2+

MDIA3-

MDIA3+

A1
A14
D9
D10
L8
P1
P14
C5
L7
M8
N11
D4
E4

D14
B14

K14
J14

L14
L12
L13
M13
M14
A13

N9
P9
M9
M11

A10
C9
B10

J4
N10
P10
P7
M10

A12
C11
B11
B12

P11
B13

N14
P13
N13
M12

C14
C13
E14
E13
F14
F13
H14
H13

NC_A1_82541_2
NC_A14_82541_2
NC_D9_82541_2
NC_D10_82541_2
NC_L8_82541_2
NC_P1_82541_2
NC_P14_82541_2
NC_C5_82541_2
NC_L7_82541_2
NC_M8_82541_2
NC_N11_82541_2

GB_LOMB_TEST­GB_LOMB_TEST+

GB_LOMB_XTAL1
GB_LOMB_XTAL2

GB_LOMB_JTAG_TCK
GB_LOMB_JTAG_TMS
GB_LOMB_JTAG_TRST_N
GB_LOMB_JTAG_TDI
NC_GB_LOMB_JTAG_TDO
GB_LOMB_TEST

NC_GB_LOMB_FLSH_SCK
DISABLE_TABOR_2_N
NC_GB_LOMB_FLSH_CE
NC_GB_LOMB_FLSH_SI

I2C_NICB_SCL_R
I2C_NICB_SDA_R
NIC_ALERT_N

GB_LOMB_EEMODE

GB_LOMB_EEDO

GB_LOMB_EEDI
GB_LOMB_EECS
GB_LOMB_EESK

GB_LOMB_LINK_UP_LED_N
GB_LOMB_ACT_LED_N
GB_LOMB_LINK100_LED_N
NC_GB_LOMB_LINK1000_LED_N

GB_LOMB_CTRL_12
GB_LOMB_CTRL_18

NC_GB_LOMB_SDP0
NC_GB_LOMB_SDP1
NC_GB_LOMB_SDP2
NC_GB_LOMB_SDP3

MDIB0­MDIB0+
MDIB1­MDIB1+
MDIB2­MDIB2+
MDIB3­MDIB3+

21

R363

21

R360

49.9-1%

21

R359

49.9-1%

25

25
25
24,44,45

25

26
26
25

25
25

21

R358

49.9-1%

12

J2

1

RN21

2
3
4

100 Ohm 5%

21

R357

49.9-1%

ROOM = LOM_B

ECAD: Route traces as differential

NP*

100

49.9-1%

to connector

X03_GT_010704

8
7
6
5

21

R169

21

R356

1K-1%

25
25
25
25

R364

49.9-1%

21

ECAD: Place these components as close

to the GB_LOM as possible

21

C622

+3.3V

LAN_B_AUX

2.7K-5%

21

R355

49.9-1%

49.9-1%

25MHz-30ppm

22pF 50V

2 1

R1796

X3

1 2

25
25

21

C621

GB_LOMB_EECS
GB_LOMB_EEDO

26
26
26
26
26
26
26
26

22pF 50V

X03_GT_010704

GB_LOMB_EEMODE

25

U25

PRELIMINARY SYMBOL

1

CS

2

SO

3

WP

4

GND

ENG MGR APPROVAL NEEDED FOR MODEM

SPI Serial EEPROMs-1024X8

SUB*_K4600

8

VCC

7

HOLD

6

SCK

5

SI

X03_GT_010703

+3.3V

LAN_B_AUX

+3.3V

LAN_B_AUX

C564

GB_LOMB_EESK
GB_LOMB_EEDI

1 2

+3.3V

LAN_B_AUX

R283

2 1

LAN_B_AUX

0.1uF 16V

2.7K-5%

+3.3V

R1795

1 2

0-5%

25
25

R287

100K-1%

+3.3V

LAN_B_AUX

+1.2V

LAN_B_AUX

+1.8V

LAN_B_AUX

Sleep mode current limiter

C577

12

1 2

0.1uF 16V

GB_LOMB_VIO

X00_GT_051503

G2

VIO

A3

3P3V_A3

A7

3P3V_A7

A11

3P3V_A11

E1

3P3V_E1

K3

3P3V_K3

K4

3P3V_K4

K13

3P3V_K13

N6

3P3V_N6

N8

3P3V_N8

P2

3P3V_P2

P12

3P3V_P12

G5

1P2V_G5

G6

1P2V_G6

H5

1P2V_H5

H6

1P2V_H6

H7

1P2V_H7

H8

1P2V_H8

J5

1P2V_J5

J6

1P2V_J6

J7

1P2V_J7

J8

1P2V_J8

J9

1P2V_J9

J10

1P2V_J10

J11

1P2V_J11

K5

1P2V_K5

K6

1P2V_K6

K7

1P2V_K7

K8

1P2V_K8

K9

1P2V_K9

K10

1P2V_K10

K11

1P2V_K11

L4

1P2V_L4

L5

1P2V_L5

L9

1P2V_L9

L10

1P2V_L10

E11

A1.2V_E11

E12

A1.2V_E12

G13

A1.2V_G13

H11

A1.2V_H11

G4

PLL_1.2V_G4

H4

PLL_1.2V_H4

D12

CLKR_1.8V

J13

XTAL_1.8V

D11

A1.8V_D11

G12

A1.8V_G12

TABOR_2

GND_B3
GND_B7

GND_C10

GND_D5
GND_D6
GND_D7
GND_D8
GND_E2
GND_E5
GND_E6
GND_E7
GND_E8
GND_E9

GND_E10

GND_F4
GND_F5
GND_F6
GND_F7
GND_F8
GND_F9

GND_F10

GND_G7
GND_G8
GND_G9

GND_G10

GND_H9

GND_H10

GND_K2
GND_L6

GND_L11

GND_M6
GND_N1

GND_N12

GND_P8

AGND_C12
AGND_D13
AGND_F11
AGND_G11
AGND_G14
AGND_K12

CLKR_CAP

XTAL_CAP

B3
B7
C10
D5
D6
D7
D8
E2
E5
E6
E7
E8
E9
E10
F4
F5
F6
F7
F8
F9
F10
G7
G8
G9
G10
H9
H10
K2
L6
L11
M6
N1
N12
P8

C12
D13
F11
G11
G14
K12

F12

H12

X00_GT_051503

NP

C347

X

1000pF

1 2

PART_NUMBER=79015

50V-10%

NP

21

C348

X

1000pF

50V-10%

PART_NUMBER=79015

+3.3V

LAN_B_AUX

24,44,59

24,44,59

25

25

25

I2C_NIC_SDA

I2C_NIC_SCL

GB_LOMB_CLKRUN_N

GB_LOMB_LINK100_LED_N

DISABLE_TABOR_2_N

NP

1 2

R548

NP

0-5%

LAN_B_AUX

R549

X

0-5%

2.7K-5%

R127

NP*

+3.3V

R1911

2 1

21

X

21

R642

330-5%

2.7K-5%

X00_GT_051503

R560

1 2

12

X03_GT_010703

R561

4.7K

FP_GB_ETH_LED_2

21

4.7K

I2C_NICB_SDA_R

I2C_NICB_SCL_R

32

25

25

1

2

3

C575

1 2

C574

1 2

0.1uF 16V

25

NET_PHYSICAL_TYPE=25MIL

GB_LOMB_CTRL_12

0.1uF 16V

C573

1 2

C572

1 2

0.1uF 16V

+3.3V

LAN_AUX

NET_PHYSICAL_TYPE=25MIL

R1956

1 2

0-5%

0.1uF 16V

ECAD: Place these termination networks close

to the LOM IC

R22

1.33-1%

1 2

1

BCP69

Q3

3

C570

1 2

0.1uF 16V

42

21

C589

X00_GT_011804

4.7uF

6.3V-10%

+1.2V

LAN_B_AUX

SUB=SUB*_D5541

+1.2V

LAN_B_AUX

C263

1 2

10uF 6.3V

C262

21

X00_GT_092303

NP

C264

10uF 6.3V

X

82541EI

HETERO 2 OF 2

21

10uF 6.3V

C555

1 2

ECAD: Place all decoupling caps close to LOM chip pins

Regulators & Decoupling

C566

0.1uF 16V

1 2

C567

0.1uF 16V

1 2

0.1uF 16V

C568

1 2

0.1uF 16V

C569

1 2

0.1uF 16V

C686

1 2

C687

0.1uF 16V

1 2

X00_GT_051503

C690

0.1uF 16V

1 2

0.1uF 16V

C691

1 2

0.1uF 16V

C694

1 2

0.1uF 16V

+1.8V

LAN_B_AUX

C699

1 2

C700

0.1uF 16V

1 2

C702

0.1uF 16V

1 2

0.1uF 16V

C704

1 2

0.1uF 16V

X00_GT_051503

C705

1 2

C846

0.1uF 16V

1 2

0.1uF 16V

C847

1 2

3

0.1uF 16V

25,27

PXH_PCI_B_AD24

+12V

1 2

2.7K-5%
R1813

Q143

2N7002

3

D

Q142

2N7002

X00_GT_011804

NP

R1957

R1815

R_IDSEL_LOMB

2

S

D71

8.2K-5%

Q82

2N7002

R1814

12

D

1

G

1 3

1N914

NP*

D

3

3

2 1

100-5%

x03b_sd

IDSEL_LOM_B

25

25

GB_LOMB_CTRL_18

NET_PHYSICAL_TYPE=25MIL

X

NP

R1958

X

1 2

1 2

150-1%

0-5%

R1959

1 2

0-5%

NET_PHYSICAL_TYPE=25MIL

1

BCP69

Q4

+3.3V

LAN_B_AUX

3

C571

1 2

42

21

C585

0.1uF 16V

4.7uF

6.3V-10%

+1.8V

LAN_B_AUX

C261

21

C259

10uF 6.3V

21

10uF 6.3V

C576

1 2

C558

0.1uF 16V

1 2

C842

0.1uF 16V

1 2

C562

0.1uF 16V

1 2

C840

0.1uF 16V

1 2

C560

0.1uF 16V

1 2

0.1uF 16V

C258

C841

1 2

21

10uF 6.3V

0.1uF 16V

C257

C563

1 2

1 2

10uF 6.3V

0.1uF 16V

C561

1 2

C556

1 2

0.1uF 16V

0.1uF 16V

C565

+3.3V

LAN_B_AUX

C260

1 2

21

0.1uF 16V

10uF 6.3V

C706

1 2

0.1uF 16V

X00_GT_051503

21

C256

10uF 6.3V

C707

C557

1 2

1 2

0.1uF 16V

C848

0.1uF 16V

1 2

C839

1 2

0.1uF 16V

0.1uF 16V

DISABLE_ETHERNET_2

40

4 4

1

G

S

2

1

G

S

2

NP

R1960

X

1 2

150-1%

INC.

NP

TITLE

ROUND ROCK,TEXAS

Gigabit NIC B- Tabor II

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

DC

REV.

A03-00

SHEET

25 OF 60

subsys done

A B

R1961

X

1 2

68-1%

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

B D

CA

1

ECAD: No digital signals should be routed within

300 mil (7.5mm) of differential pairs

ROOM = LOMA_CONN

Gigabit LOM A

Errata for Tabor B0: Activity LED should be conencted to LINKA100#

ECAD: No digital signals should be routed within

300 mil (7.5mm) of differential pairs

1

ROOM = LOMB_CONN

Gigabit LOM B

Errata for Tabor B0: Activity LED should be conencted to LINKA100#

2

3

+1.8V

LAN_A_AUX

21

C161

0.1uF 16V

L9

1 2

BLM21P600SG

MDIA0+

24

24

24

24

24

MDIA0-

24

24

24

MDIA1+

MDIA1-

MDIA2+

MDIA2-

MDIA3+

MDIA3-

+3.3V

LAN_A_AUX

LOMA_CT_1.8V_FIL

+3.3V

LAN_A_AUX

R66

330-5%

330-5%

R67

24

12

ECAD: Place these capacitors close to the

center tap pins of the mag/conn

NET_PHYSICAL_TYPE=PLANE

2 1

0.1uF 16V

12

21

C1610

470pF

50V-10%

GB_LOMA_ACT_LED_N

21

C1611

C128

0.1uF 16V

470pF

C129

2 1

0.1uF 16V

C137

2 1

C130

2 1

0.1uF 16V

50V-10%

21

C613

R1829

1 2

0-5%

470pF

50V-10%

13

14

16

17
15

ROOM=LOMA_CONN

11

12

10

4

6

5

3

1

2

8

7

9

GREEN

C1

A1

TRD1+

TRCT1

TRD1-

TRD2+

TRCT2

TRD2-

TRD3+

TRCT3

TRD3-

TRD4+

TRCT4

TRD4-

ORANGE

NIC_1_CONN

YELLOW

COMMON

4x75ohms

1000pF 2kV

RJ45 MAGNETIC JACK W/2 LED'S

SUB=SUB*_Y1408

Shield

RJ45

1

2

3

6

4

5

7

8

SH1

SH2

SH1
SH2

+1.8V

LAN_B_AUX

21

C160

0.1uF 16V

25

25

25

25

25

25

25

25

MDIB0+

MDIB0-

MDIB1+

MDIB1-

MDIB2+

MDIB2-

MDIB3+

MDIB3-

+3.3V

LAN_B_AUX

R64

12

330-5%

X00_GT_051303X00_GT_051303

ECAD: Place these capacitors close to the

center tap pins of the mag/conn

L6

1 2

BLM21P600SG

LOMB_CT_1.8V_FIL NET_PHYSICAL_TYPE=PLANE

+3.3V

LAN_B_AUX

330-5%

12

R65

21

C1612

470pF

50V-10%

25

2 1

0.1uF 16V

GB_LOMB_ACT_LED_N

21

C125

C127

C126

2 1

470pF

50V-10%

C1613

C124

2 1

0.1uF 16V

2 1

0.1uF 16V

0.1uF 16V

21

C615

R1830

1 2

0-5%

470pF

50V-10%

13

14

11

12

10

16

17
15

ROOM=LOMB_CONN

4

6

5

3

1

2

8

7

9

GREEN

C1

A1

TRD1+

TRCT1

TRD1-

TRD2+

TRCT2

TRD2-

TRD3+

TRCT3

TRD3-

TRD4+

TRCT4

TRD4-

ORANGE

NIC_2_CONN

YELLOW

COMMON

4x75ohms

1000pF 2kV

RJ45 MAGNETIC JACK W/2 LED'S

SUB=SUB*_Y1408

X00_GT_060203

Shield

RJ45

1

2

3

6

4

5

7

8

SH1

SH2

2

SH1
SH2

3

24

GB_LOMA_LINK_UP_LED_N

C614

21

470pF

50V-10%

X00_GT_052703

25

GB_LOMB_LINK_UP_LED_N

C616

X00_GT_052703

21

470pF

50V-10%

4 4

INC.

ROUND ROCK,TEXAS

GIGABIT LOM Connectors

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

26 OF 60

subsys done

DC

A B

B D

CA

1

ROOM = PXH

VERSION -0.8

12-16-2004_19:51

properties I had to fix when I did the symbol update

CHANGES MADE FOR PLANAR PXH

-Change REF DES to PXH

-Change pxh_pci_a_* to PXH_PCI_A_*

-Change pxh_pci_b_* to PXH_PCI_B_*

-Change pu_nc_pxh* to pu_nc_pxh*

-Change RESET_IN to PCI_RST_PLANAR_N

-Change pxh_pci_a_IRQ(1 to 7) to NC's

-Disconnect extra clocks

-Change strapping to PCI 66MHz

-M66EN OK

-133EN OK

-PCIXCAP, change circuit to pulldown (disable)

-Change powergood signal to SYS_AUX_PWRGOOD_NIC

-Change unused 64bit PCI signals to NC's on both hetero's

X03_GT_011604

+3.3V

R1700

1 2

14.7K-1%

PXH_PCI_A_PME_N

X03_GT_011604

27,28

+3.3V

R1701

1 2

14.7K-1%

PXH_PCI_B_PME_N

+3.3V

NP

R30

X

21

NP

R31

X

8.2K-5%
1 2

27,28

1

8.2K-5%

-Add I2C address

SUB=SUB*_R1493

REFDES=PXH

-Changed & fixed PME net names

-Changed IRDY net names

17,31,35

PXH

ROOM=PXH

PXH_PCI_A_AD0

24

PXH_PCI_A_AD1

24

PXH_PCI_A_AD2

24

PXH_PCI_A_AD3

24

PXH_PCI_A_AD4

24

PXH_PCI_A_AD5

24

PXH_PCI_A_AD6

24

PXH_PCI_A_AD7

24

PXH_PCI_A_AD8

24

PXH_PCI_A_AD9

24

PXH_PCI_A_AD10

24

PXH_PCI_A_AD11

24

PXH_PCI_A_AD12

24

PXH_PCI_A_AD13

24

PXH_PCI_A_AD14

24

PXH_PCI_A_AD15

24

PXH_PCI_A_AD16

24

PXH_PCI_A_AD17

24

PXH_PCI_A_AD18

24

PXH_PCI_A_AD19

24

PXH_PCI_A_AD20

24

PXH_PCI_A_AD21

24

PXH_PCI_A_AD22

2

3

24

PXH_PCI_A_AD23

24

PXH_PCI_A_AD24

24

PXH_PCI_A_AD25

24

PXH_PCI_A_AD26

24

PXH_PCI_A_AD27

24

PXH_PCI_A_AD28

24

PXH_PCI_A_AD29

24

PXH_PCI_A_AD30

24

PXH_PCI_A_AD31

24

PU_NC_PXH_PCI_A_AD32

30

PU_NC_PXH_PCI_A_AD33

30

PU_NC_PXH_PCI_A_AD34

30

PU_NC_PXH_PCI_A_AD35

30

PU_NC_PXH_PCI_A_AD36

30

PU_NC_PXH_PCI_A_AD37

30

PU_NC_PXH_PCI_A_AD38

30

PU_NC_PXH_PCI_A_AD39

30

PU_NC_PXH_PCI_A_AD40

30

PU_NC_PXH_PCI_A_AD41

30

PU_NC_PXH_PCI_A_AD42

30

PU_NC_PXH_PCI_A_AD43

30

PU_NC_PXH_PCI_A_AD44

30

PU_NC_PXH_PCI_A_AD45

30

PU_NC_PXH_PCI_A_AD46

30

PU_NC_PXH_PCI_A_AD47

30

PU_NC_PXH_PCI_A_AD48

30

PU_NC_PXH_PCI_A_AD49

30

PU_NC_PXH_PCI_A_AD50

30

PU_NC_PXH_PCI_A_AD51

30

PU_NC_PXH_PCI_A_AD52

30

PU_NC_PXH_PCI_A_AD53

30

PU_NC_PXH_PCI_A_AD54

30

PU_NC_PXH_PCI_A_AD55

30

PU_NC_PXH_PCI_A_AD56

30

PU_NC_PXH_PCI_A_AD57

30

PU_NC_PXH_PCI_A_AD58

30

PU_NC_PXH_PCI_A_AD59

30

PU_NC_PXH_PCI_A_AD60

30

PU_NC_PXH_PCI_A_AD61

30

PU_NC_PXH_PCI_A_AD62

30

PU_NC_PXH_PCI_A_AD63

30

24
24
24
24
30
30
30
30

24

24

PXH_PCI_A_CBE0_N
PXH_PCI_A_CBE1_N
PXH_PCI_A_CBE2_N
PXH_PCI_A_CBE3_N
PU_NC_PXH_PCI_A_CBE4_N
PU_NC_PXH_PCI_A_CBE5_N
PU_NC_PXH_PCI_A_CBE6_N
PU_NC_PXH_PCI_A_CBE7_N

PXH_PCI_A_REQ0_N
NC_PXH_PCI_A_REQ1_N
NC_PXH_PCI_A_REQ2_N
NC_PXH_PCI_A_REQ3_N
NC_PXH_PCI_A_REQ4_N
NC_PXH_PCI_A_REQ5_N

PXH_PCI_A_GNT0_N
NC_PXH_PCI_A_GNT1_N
NC_PXH_PCI_A_GNT2_N
NC_PXH_PCI_A_GNT3_N
NC_PXH_PCI_A_GNT4_N
NC_PXH_PCI_A_GNT5_N

4 4

AC23

PAAD0

AD23

PAAD1

AC22

PAAD2

AB21

PAAD3

AD21

PAAD4

AC20

PAAD5

AD20

PAAD6

AC19

PAAD7

AB18

PAAD8

AC17

PAAD9

AD17

PAAD10

AC16

PAAD11

AB15

PAAD12

AD15

PAAD13

AD14

PAAD14

AC13

PAAD15

W24

PAAD16

Y23

PAAD17

AA23

PAAD18

Y22

PAAD19

AB22

PAAD20

AA21

PAAD21

Y20

PAAD22

Y19

PAAD23

AB19

PAAD24

W18

PAAD25

AA18

PAAD26

Y17

PAAD27

Y16

PAAD28

AB16

PAAD29

W15

PAAD30

AA15

PAAD31

T22

PAAD32

T21

PAAD33

R24

PAAD34

R23

PAAD35

P23

PAAD36

P22

PAAD37

N22

PAAD38

N21

PAAD39

M23

PAAD40

M21

PAAD41

L23

PAAD42

L20

PAAD43

K24

PAAD44

K22

PAAD45

J23

PAAD46

J21

PAAD47

H23

PAAD48

H22

PAAD49

R20

PAAD50

R18

PAAD51

P19

PAAD52

P17

PAAD53

N19

PAAD54

N17

PAAD55

M18

PAAD56

M17

PAAD57

L19

PAAD58

L17

PAAD59

K18

PAAD60

K17

PAAD61

K19

PAAD62

J17

PAAD63

AD18

PACBE0

AC14

PACBE1

AA24

PACBE2

AA20

PACBE3

H17

PACBE4

J18

PACBE5

H19

PACBE6

H20

PACBE7

W21

PAREQ0

W22

PAREQ1

V18

PAREQ2

N18

PAREQ3

L22

PAREQ4

W13

PAREQ5

W19

PAGNT0

J24

PAGNT1

Y14

PAGNT2

Y13

PAGNT3

AA14

PAGNT4

U23

PAGNT5

x03_tj_121503

SUB*_Y5218

x03b_tj_012004

x04_tj_031904

PBAD0
PBAD1
PBAD2
PBAD3
PBAD4
PBAD5
PBAD6
PBAD7
PBAD8

PBAD9
PBAD10
PBAD11
PBAD12
PBAD13
PBAD14
PBAD15
PBAD16
PBAD17
PBAD18
PBAD19
PBAD20
PBAD21
PBAD22
PBAD23
PBAD24
PBAD25
PBAD26
PBAD27
PBAD28
PBAD29
PBAD30
PBAD31
PBAD32
PBAD33
PBAD34
PBAD35
PBAD36
PBAD37
PBAD38
PBAD39
PBAD40
PBAD41
PBAD42
PBAD43
PBAD44
PBAD45
PBAD46
PBAD47
PBAD48
PBAD49
PBAD50
PBAD51
PBAD52
PBAD53
PBAD54
PBAD55
PBAD56
PBAD57
PBAD58
PBAD59
PBAD60
PBAD61
PBAD62
PBAD63

PBCBE0
PBCBE1
PBCBE2
PBCBE3
PBCBE4
PBCBE5
PBCBE6
PBCBE7

PBREQ0
PBREQ1
PBREQ2
PBREQ3
PBREQ4
PBREQ5

PBGNT0
PBGNT1
PBGNT2
PBGNT3
PBGNT4
PBGNT5

PXH MCH INTERFACE

HETERO 1 OF 4

REV 1.0

(PXH-D)

ADD1=ADD*_C2508_HSASSY

AC2
AD2
AD3
AB4
AC4
AC5
AD5
AD6
AB7
AC7
AD8
AB9
AD9
AB10
AC10
AD11
W1
Y2
AA2
AA3
AB3
Y4
Y5
W6
AA6
W7
Y7
Y8
AA8
W9
Y10
AA9
R2
R3
P1
P4
P5
N3
N4
M2
M3
L1
L2
K3
K4
J2
J3
H4
H1
H2
P7
P8
N6
N7
M5
M6
L5
L7
K6
K7
J6
J7
H5
H8

AC8
AB12
Y1
AA5
G9
H9
G6
G7

L4
AB6
T6
T1
V5
AA12

J5
K1
Y11
AA11
W12
L8

PXH_PCI_B_AD0
PXH_PCI_B_AD1
PXH_PCI_B_AD2
PXH_PCI_B_AD3
PXH_PCI_B_AD4
PXH_PCI_B_AD5
PXH_PCI_B_AD6
PXH_PCI_B_AD7
PXH_PCI_B_AD8
PXH_PCI_B_AD9
PXH_PCI_B_AD10
PXH_PCI_B_AD11
PXH_PCI_B_AD12
PXH_PCI_B_AD13
PXH_PCI_B_AD14
PXH_PCI_B_AD15
PXH_PCI_B_AD16
PXH_PCI_B_AD17
PXH_PCI_B_AD18
PXH_PCI_B_AD19
PXH_PCI_B_AD20
PXH_PCI_B_AD21
PXH_PCI_B_AD22
PXH_PCI_B_AD23
PXH_PCI_B_AD24
PXH_PCI_B_AD25
PXH_PCI_B_AD26
PXH_PCI_B_AD27
PXH_PCI_B_AD28
PXH_PCI_B_AD29
PXH_PCI_B_AD30
PXH_PCI_B_AD31
PU_NC_PXH_PCI_B_AD32
PU_NC_PXH_PCI_B_AD33
PU_NC_PXH_PCI_B_AD34
PU_NC_PXH_PCI_B_AD35
PU_NC_PXH_PCI_B_AD36
PU_NC_PXH_PCI_B_AD37
PU_NC_PXH_PCI_B_AD38
PU_NC_PXH_PCI_B_AD39
PU_NC_PXH_PCI_B_AD40
PU_NC_PXH_PCI_B_AD41
PU_NC_PXH_PCI_B_AD42
PU_NC_PXH_PCI_B_AD43
PU_NC_PXH_PCI_B_AD44
PU_NC_PXH_PCI_B_AD45
PU_NC_PXH_PCI_B_AD46
PU_NC_PXH_PCI_B_AD47
PU_NC_PXH_PCI_B_AD48
PU_NC_PXH_PCI_B_AD49
PU_NC_PXH_PCI_B_AD50
PU_NC_PXH_PCI_B_AD51
PU_NC_PXH_PCI_B_AD52
PU_NC_PXH_PCI_B_AD53
PU_NC_PXH_PCI_B_AD54
PU_NC_PXH_PCI_B_AD55
PU_NC_PXH_PCI_B_AD56
PU_NC_PXH_PCI_B_AD57
PU_NC_PXH_PCI_B_AD58
PU_NC_PXH_PCI_B_AD59
PU_NC_PXH_PCI_B_AD60
PU_NC_PXH_PCI_B_AD61
PU_NC_PXH_PCI_B_AD62
PU_NC_PXH_PCI_B_AD63

PXH_PCI_B_CBE0_N
PXH_PCI_B_CBE1_N
PXH_PCI_B_CBE2_N
PXH_PCI_B_CBE3_N
PU_NC_PXH_PCI_B_CBE4_N
PU_NC_PXH_PCI_B_CBE5_N
PU_NC_PXH_PCI_B_CBE6_N
PU_NC_PXH_PCI_B_CBE7_N

PXH_PCI_B_REQ0_N
NC_PXH_PCI_B_REQ1_N
NC_PXH_PCI_B_REQ2_N
NC_PXH_PCI_B_REQ3_N
NC_PXH_PCI_B_REQ4_N
NC_PXH_PCI_B_REQ5_N

PXH_PCI_B_GNT0_N
NC_PXH_PCI_B_GNT1_N
NC_PXH_PCI_B_GNT2_N
NC_PXH_PCI_B_GNT3_N
NC_PXH_PCI_B_GNT4_N
NC_PXH_PCI_B_GNT5_N

5,28

25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30

25
25
25
25
30
30
30
30

25

25

SYSTEM_PWRGOOD_PXH

R6026

1 2

0-5%

PXH_PCI_A_PCIRST_N

27

X00_GT_052803

X00_GT_052803

A00_GT_061604

X00_GT_052803

24,30
24,30
24,30
24,30
24,30
24,30
24,30

30
24
30
30
30

27,28

24,27

27

27

27

27

27

24
25

27
27

27

28
28
28

28

+3.3V

LAN_A_AUX

143U68

1
2

74VHC08

R6024

NP

1 2

0-5%

+3.3V

LAN_A_AUX

PXH_PCI_A_FRAME_N
PXH_PCI_A_IRDY_N
PXH_PCI_A_DEVSEL_N
PXH_PCI_A_TRDY_N
PXH_PCI_A_STOP_N
PXH_PCI_A_PERR_N
PXH_PCI_A_SERR_N
PU_NC_PXH_PCI_A_PLOCK_N
PXH_PCI_A_PAR
PU_NC_PXH_PCI_A_PAR64
PU_NC_PXH_PCI_A_REQ64_N
PU_NC_PXH_PCI_A_ACK64_N

PXH_PCI_A_PME_N

PXH_PCI_A_M66EN
PXH_PCI_A_PCIXCAP

PXH_PCI_A_PCLKO0_R
NC_PXH_PCI_A_PCLKO1
NC_PXH_PCI_A_PCLKO2
NC_PXH_PCI_A_PCLKO3
NC_PXH_PCI_A_PCLKO4
NC_PXH_PCI_A_PCLKO5
PXH_PCI_A_PCLKO6_FB

PXH_PCI_A_PCLKI_FB

PXH_PCI_A_PCIRST_N

PXH_PCI_A_IRQ0_N
PXH_PCI_B_IRQ0_N
NC_PXH_PCI_A_IRQ2_N
NC_PXH_PCI_A_IRQ3_N
NC_PXH_PCI_A_IRQ4_N
NC_PXH_PCI_A_IRQ5_N
NC_PXH_PCI_A_IRQ6_N
NC_PXH_PCI_A_IRQ7_N
NC_PXH_PCI_A_IRQ8_N
NC_PXH_PCI_A_IRQ9_N
NC_PXH_PCI_A_IRQ10_N
PXH_PCI_A_IRQ11_N
PXH_PCI_A_IRQ12_N
NC_PXH_PCI_A_IRQ13_N
NC_PXH_PCI_A_IRQ14_N
NC_PXH_PCI_A_IRQ15_N

PXH_PCI_A_133EN

PCI_RST_PXH_N

5

X03b_GT_012204

17
17
17
17
17
17
17
17

EXP_B_DN_4N
EXP_B_DN_4P
EXP_B_DN_5N
EXP_B_DN_5P
EXP_B_DN_6N
EXP_B_DN_6P
EXP_B_DN_7N
EXP_B_DN_7P

PXH_TCK
PXH_TMS
PXH_TDI
NC_PXH_TDO
PXH_TRST_N

C6012

21

.1uF

10V-10%

X

-Connected IRQ0 on B segment

-Change I2C address

V23

PAFRAME

V24

PAIRDY

U20

PADEVSEL

U22

PATRDY

U19

PASTOP

P20

PAPERR

T19

PASERR

R21

PAPLOCK

AB13

PAPAR

J20

PAPAR64

AC24

PAREQ64

AB24

PAACK64

V21

PAPME

T18

PAM66EN

E17

PAPCIXCAP

V14

PAPCLKO0

W16

PAPCLKO1

V17

PAPCLKO2

U17

PAPCLKO3

U14

PAPCLKO4

U16

PAPCLKO5

V15

PAPCLKO6

U13

PAPCLKI

AA17

PAPCIRST

G24

PAIRQ0

F24

PAIRQ1

D23

PAIRQ2

C24

PAIRQ3

B24

PAIRQ4

A23

PAIRQ5

D24

PAIRQ6

F23

PAIRQ7

G21

PAIRQ8

D22

PAIRQ9

G22

PAIRQ10

F22

PAIRQ11

B23

PAIRQ12

E22

PAIRQ13

F21

PAIRQ14

E21

PAIRQ15

V20

PA133EN

H16

RSTIN

F10

EXP_RXN0-

G10

EXP_RXP0+

D12

EXP_RXN1-

E12

EXP_RXP1+

B9

EXP_RXN2-

C9

EXP_RXP2+

C11

EXP_RXN3-

C10

EXP_RXP3+

NC_EXP_PXH_DN_4N
NC_EXP_PXH_DN_4P
NC_EXP_PXH_DN_5N
NC_EXP_PXH_DN_5P
NC_EXP_PXH_DN_6N
NC_EXP_PXH_DN_6P
NC_EXP_PXH_DN_7N
NC_EXP_PXH_DN_7P

PXH_PCI_A_PCIRST_2_N

H12
G12
D13
C13
A16
A15
E15
E14

B7
E7
E9
A6
F9

24

EXP_RXN4­EXP_RXP4+
EXP_RXN5­EXP_RXP5+
EXP_RXN6­EXP_RXP6+
EXP_RXN7­EXP_RXP7+

TCK
TMS
TDI
TDO
TRST

R6025

1 2

1K-5%

PXH

PXH MCH INTERFACE

HETERO 2 OF 4

REV 1.0

+3.3V

LAN_A_AUX

148U68

9

10

74VHC08

+3.3V

LAN_A_AUX

1411U68

12
13

74VHC08

PBFRAME

PBIRDY

PBDEVSEL

PBTRDY
PBSTOP
PBPERR
PBSERR

PBPLOCK

PBPAR
PBPAR64
PBREQ64
PBACK64

PBPME

PBM66EN

PBPCIXCAP

PBPCLKO0
PBPCLKO1
PBPCLKO2
PBPCLKO3
PBPCLKO4
PBPCLKO5
PBPCLKO6

PBPCLKI

PBPCIRST

PBIRQ0
PBIRQ1
PBIRQ2
PBIRQ3
PBIRQ4
PBIRQ5
PBIRQ6
PBIRQ7
PBIRQ8

PBIRQ9
PBIRQ10
PBIRQ11
PBIRQ12
PBIRQ13
PBIRQ14
PBIRQ15

PB133EN

EXP_CLK­EXP_CLK+

EXP_TXN0­EXP_TXP0+
EXP_TXN1­EXP_TXP1+
EXP_TXN2­EXP_TXP2+
EXP_TXN3­EXP_TXP3+
EXP_TXN4­EXP_TXP4+
EXP-TXN5­EXP_TXP5+
EXP_TXN6­EXP_TXP6+
EXP_TXN7­EXP_TXP7+

EXP_COMP0
EXP_COMP1

SCLK

SDATA

27

U4
U5
T3
W4
V3
U2
V2
W3
AC11
H7
AC1
AB1

R5

U1
D7

W10
V9
V8
T7
V6
U7
U8

U10

N8

F2
G1
F3
C1
B2
E4
D2
E1
G3
D3
B1
C3
D1
G4
E3
F4

P2

C17
C16

E11
F11
D10
D9
A10
A9
B12
B11
G13
H13
B15
B14
D16
D15
F14
F13

E16
B17

C7
D8

NC_U68_8

EXP0_COMP1

ICH_SEG0_PXH_SCL
ICH_SEG0_PXH_SDA

NC_U68_11

PXH_PCI_B_FRAME_N
PXH_PCI_B_IRDY_N
PXH_PCI_B_DEVSEL_N
PXH_PCI_B_TRDY_N
PXH_PCI_B_STOP_N
PXH_PCI_B_PERR_N
PXH_PCI_B_SERR_N
PU_NC_PXH_PCI_B_PLOCK_N
PXH_PCI_B_PAR
PU_NC_PXH_PCI_B_PAR64
PU_NC_PXH_PCI_B_REQ64_N
PU_NC_PXH_PCI_B_ACK64_N

PXH_PCI_B_PME_N

PXH_PCI_B_M66EN
PXH_PCI_B_PCIXCAP

PXH_PCI_B_PCLKO0_R
NC_PXH_PCI_B_PCLKO1
NC_PXH_PCI_B_PCLKO2
NC_PXH_PCI_B_PCLKO3
NC_PXH_PCI_B_PCLKO4
NC_PXH_PCI_B_PCLKO5
PXH_PCI_B_PCLKO6_FB

PXH_PCI_B_PCLKI_FB

PXH_PCI_B_PCIRST_N

NC_PXH_PCI_B_IRQ0_N
NC_PXH_PCI_B_IRQ1_N
NC_PXH_PCI_B_IRQ2_N
NC_PXH_PCI_B_IRQ3_N
NC_PXH_PCI_B_IRQ4_N
NC_PXH_PCI_B_IRQ5_N
NC_PXH_PCI_B_IRQ6_N
NC_PXH_PCI_B_IRQ7_N
NC_PXH_PCI_B_IRQ8_N
NC_PXH_PCI_B_IRQ9_N
NC_PXH_PCI_B_IRQ10_N
PXH_PCI_B_IRQ11_N
PXH_PCI_B_IRQ12_N
NC_PXH_PCI_B_IRQ13_N
NC_PXH_PCI_B_IRQ14_N
NC_PXH_PCI_B_IRQ15_N

PXH_PCI_B_133EN

CK_100M_PXH_PLANAR_N
CK_100M_PXH_PLANAR_P

EXP_B_UP_4N_C
EXP_B_UP_4P_C
EXP_B_UP_5N_C
EXP_B_UP_5P_C
EXP_B_UP_6N_C
EXP_B_UP_6P_C
EXP_B_UP_7N_C

EXP_B_UP_7P_C
NC_EXP_PXH_UP_4N
NC_EXP_PXH_UP_4P
NC_EXP_PXH_UP_5N
NC_EXP_PXH_UP_5P
NC_EXP_PXH_UP_6N
NC_EXP_PXH_UP_6P
NC_EXP_PXH_UP_7N
NC_EXP_PXH_UP_7P

EXP0_COMP1

27
27

+1.5V

21

R230

27

R6015

49.9-1%

27
27

27

4
4

29
29
29
29
29
29
29
29

21

25,30
25,30
25,30
25,30
25,30
25,30
25,30
30
25
30
30
30

27,28

25,27
27

27

27

27

27

A00_GT_061604

X03_GT_011604

49.9-1%

Intel: These pins are muxed and used for HP functions.

17,31,35

X02_GT_081903

PXH_PCI_A_IRQ11_N

27

PXH_PCI_A_IRQ12_N

27

PXH_PCI_B_IRQ11_N

27

PXH_PCI_B_IRQ12_N

27

Pull-ups required.

27

27

27

27

24,27

25,27

27

27

M66EN High indicates that a PCI card can operate in PCI 66 MHz mode
133EN High indicates that a PCI card can operate in PCI 133 MHz mode

ICH_SEG0_SCL

ICH_SEG0_SDA

R4507

1 2

PXH_PCI_A_PCLKO0_R

PXH_PCI_A_PCLKI_FB

X00_GT_052803

PXH_PCI_B_PCLKO0_R

PXH_PCI_B_PCLKO6_FB

PXH_PCI_A_M66EN

PXH_PCI_B_M66EN

PXH_PCI_B_133EN

PXH_PCI_A_133EN

R4508

8.2K-5%

Px133EN PULLUP 8.2K, OR PULLDOWN 8.2K
PxPCIXCAP PULLUP 3.3K

PxM66EN PULLUP 4.7K WHEN CONENCTED, OR TP

R503

0-5%
R502

1 2

0-5%

8.2K-5%

1 2

R55

R189

1 2

21

R4510

1 2

1 2

+3.3V

R4509

8.2K-5%

R130

1 2

33-5%

R138

33-5%

+3.3V

4.7K

R188

8.2K-5%

1 2

R56

21

8.2K-5%

21

X03_GT_010704

4.7K

1 2

8.2K-5%

ICH_SEG0_PXH_SCL

ICH_SEG0_PXH_SDA

R131

21

33-5%

R137

1 2

33-5%

PXH_PCI_A_PCIXCAP

27

PXH_PCI_A_PCLKO0

PXH_PCI_A_PCLKO6_FB

X00_GT_052803

PXH_PCI_B_PCLKO0

PXH_PCI_B_PCLKI_FB

R53

27

27

2

24

27

25

27

3

PXH_PCI_B_PCIXCAP

27

0-5%

1 2

X03_GT_010704

R54

0-5%

1 2

X03_GT_010704

subsys done

27

PXH_PCI_B_PCIRST_N

A B

146U68

4
5

74VHC08

R6023

NP

1 2

0-5%

X

PXH_PCI_B_PCIRST_2_N

A00_GT_102104

25

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

PXH

INC.

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

DC

ROUND ROCK,TEXAS

REV.

A03-00

SHEET

27 OF 60

B D

CA

CHANGES MADE FOR PLANAR PXH

1

+3.3V

X00_GT_081903

1 2

1 2

R18

1 2

1K-5%

R19

1 2

1K-5%

R1897

1K-5%

R1898

1K-5%

R20

1 2

1K-5%

ROOM = PXH

PXH_HBSIC_STRAP

PXH_HASIC_STRAP

PXH_HBMODE2

PXH_HAMODE2

PXH_HBSID_STRAP

28

28

HxMODE2 HIGH MEANS SLOT MODE 2 CAPABLE

28

28

28

VERSION -0.8

12-16-2004_19:51

PxSTRAP0 C19, U11

PxODTEN is PxSTRAP

24,28

25,28

-Change REF DES to PXH

-Change SYS_PWRGD_3P3V to SYS_PWRGOOD_PXH

-Change TP's to NC's

+3.3V_AUX

X03_GT_011604

R617

14.7K-1%

1 2

PME_NIC_CPLD_N

PCI_A_PME_N

PCI_B_PME_N

BAR43

1 3

D50

BAR43

1 3

D51

+1.5V

for SMBUS see pf400 pg 59

+3.3V_AUX

R366

150-1%150-1%

1 2

PXH_PCI_VREF

28

1

0.750 V

C24

21

R369

0.1uF 16V

1 2

X03_GT_011604

X03_GT_011604

R614

14.7K-1%

5

24,28

32,41

PCI_A_PME_N

SYSTEM_PWRGOOD_FETS_6V

x03b_sd

PXH_PCI_A_PME_N

27

1 2

D

3

Q85

2N7002

R195

1 2

1

G

S

2

470

x03b_sd

Q103

2N7002

R196

21

470

R616

14.7K-1%

1 2

D

3

1

G

S

2

X03_GT_011604

PCI_B_PME_N

PXH_PCI_B_PME_N

25,28

27

NEED TO GET PARTS FOR THESE RESISTORS

R128

1 2

1K-5%

R155

1 2

1K-5%

R158

1 2

1K-5%

R174

1 2

2

+3.3V

+3.3V

1K-5%

R162

1 2

1K-5%

R164

1 2

1K-5%

R224

1 2

1K-5%

R232

1 2

1K-5%

R607

1 2

1K-5%

R608

1 2

1K-5%

R627

1 2

1K-5%

3

+3.3V

X03_GT_010803

NP*

R1915

R1916

1K-5%

1 2

PXH_PCI_A_HATNLED_1_N

PCI EXPRESS 1.0/1.0a STRAPPING

1K-5%

1 2

Strapped for PCIeX 1.0a

+3.3V

4 4

PXH_HBSLOTS

PXH_HASLOTS

PXH_HASID_STRAP

PXH_SMBUS5

PXH_SMBUS3

PXH_SMBUS1

PXH_SMBUS2

PXH_TMS

PXH_TDI

PXH_TCK

PXH_TRST_N

28

X02_GT_091503

28

28

28

28

28

28

27

27

27

27

28

Q152

2N7002

NP

+12V

2 1

3.3K-5%

SHUNT_1V5_12V

D

3

M66EN High indicates that a PCI card can operate in PCI 66 MHz mode

PCIXCAP1 Indicates if PCIXCAP was Grounded or not Grounded (PCI-X capable)

PCIXCAP2 Indicates if PCI-X is low (66 MHz) or high (133 MHz) capable

PCIXCAP1

PRSNT1#

1 1 No Card Present

0 1 up to 25W Card Present

1 0 up to 15W Card Present

0 0 up to 7.5W Card Present

Hx_SLOT3 Low disables Hot Plug, High enables Hot Plug

Strapped for No Hot Plug on PCI-X A and B

Strapped for 2 slots on PCI-X A

Strapped for 1 slot on PCI-X B

PXH-Hxslot<3:0> tells the HP Controller
how many slots are Hot Plug

HxSlot<3:0>

Hot Plug Disabled

0000 1 slot

0001 2 slots

0010 3 slots

0011 4 slots

0100 5 slots

0101 6 slots

0110 7 slots

0111 8 slots

Hot Plug Enabled

1000 Reserved

1001 1 slot (Parallel Mode)

1010 2 slots (Parallel Mode)

1011 3 slots (Serial Mode)

1100 4 slots (Serial Mode)

1101 5 slots (Serial Mode)

1110 6 slots (Serial Mode)

1111 1 slot no glue (Parallel Mode)

R6022

I SUSPECT THAT YOU PULL THESE DOWN FOR NO HOT PLUG

PXH_STRAP_U11

PXH_STRAP_C19

I SUSPECT THAT YOU PULL THESE DOWN FOR HOT PLUG

PXH_STRAP_A19

PXH_STRAP_C18

I AM WAITING FOR MORE INFO FROM INTEL ON THESE

MEANINGPCIXCAP2

1 1 133 MHz PCI-X Mode

0 1 66 MHz PCI-X Mode

1 0 Reserved

0 0 PCI Mode

PRSNT2# MEANING

+1.5V

NP

ISL9N312AD3ST

Q151

D

4

1
G

X

3

S

+1.5V

NP

ISL9N312AD3ST

Q153

1
G

X

PXH

for VCC filters see pf400 pg 59, 63

28

28
28

28

28
28

28

x00_tj_060903

R161

1 2

D

4

+3.3V +3.3V

3

S

NP

NP

PXH_PCI_A_HATNLED_1_N
NC_PXH_PCI_A_HPWREN_1

X02_GT_091503

28

28

28
28
28

28

PXH_A_ODT
PXH_B_ODT

NC_PXH_PCI_A_VIOSEL
NC_PXH_PCI_B_VIOSEL
NC_RSVD_PXH_D19
NC_RSVD_PXH_D18
NC_PXH_STRAP_C19
NC_RSVD_PXH_B19
NC_PXH_STRAP_U11

PXH_PCI_VREF

5,27

100-1%

PXH_HASIC_STRAP
NC_PXH_HASIL_N
PXH_HASID_STRAP
PXH_HAMODE2
NC_PXH_HASOL
NC_PXH_HASOLR
NC_PXH_HASOD
NC_PXH_HAPRST1_N
NC_PXH_HAPRST2_N

PXH_HASLOTS

NC_PXH_C6
NC_PXH_B6

+1.5V

PXH_VCCA_EXP_G15

PXH_VCCA_PCI0

PXH_VCCA_PCI1

PXH_VCCA_PCI2

PXH_VCCBG_EXP

+1.5V

SYSTEM_PWRGOOD_PXH

C584

100pF

1 2

50V-10%

A21

HPA_SIC

E19

HPA_SIL

F19

HPA_SID

B22

HPA_SOC

A22

HPA_SOL

G19

HPA_SOLR

G18

HPA_SOD

E18

HPA_PRST

F18

HPA_RST2

T24 T4

HAATNLED_1 HBATNLED_1

K21 R6

HAPWREN_1 HBPWREN_1

C21

HPA_SLOT0

B21

HPA_SLOT1

D21

HPA_SLOT2

F20

HPA_SLOT3

TDIODEIN ANODE

C6

RSVD/TDIOANODE

B6

RSVD/TDIOCATH

TDIODEOUT CATHODE

K11

VCC_K11

K13

VCC_K13

K15

VCC_K15

L10

VCC_L10

L12

VCC_L12

L14

VCC_L14

M11

VCC_M11

M13

VCC_M13

M15

VCC_M15

N10

VCC_N10

N12

VCC_N12

N14

VCC_N14

P11

VCC_P11

P13

VCC_P13

P15

VCC_P15

R10

VCC_R10

R12

VCC_R12

R14

VCC_R14

G15

VCCAEXP_G15

R17

VCCAPCI0

R8

VCCAPCI1

J8

VCCAPCI2

C14

VCCBGEXP_C14

A14

VCCEXP_A14

C12

VCCEXP_C12

C15

VCCEXP_C15

F12

VCCEXP_F12

H11

VCCEXP_H11

H15

VCCEXP_H15

J10

VCCEXP_J10

J12

VCCEXP_J12

J14

VCCEXP_J14

C18

PASTRAP0

A19

PBSTRAP0

M20

RSVD_M20

M8

RSVD_M8

D19

RSVD_D19

D18

RSVD_D18

C19

RSVD_C19

B19

RSVD_B19

U11

RSVD_U11

V12

VREF_PCI

V11

RCOMP

F17

PWROK

PXh MCH INTERFACE

HETERO 3 OF 4

REV 1.0

HPB_SIC
HPB_SIL
HPB_SID
HPB_SOC
HPB_SOL

HPB_SOLR

HPB_SOD
HPB_PRST
HPB_RST2

HPB_SLOT0
HPB_SLOT1
HPB_SLOT2
HPB_SLOT3

SMBUS_1

SMBUS_2

SMBUS_3

SMBUS_5

VCC15_J16

VCC15_K9
VCC15_L3

VCC15_L16

VCC15_M9

VCC15_M22
VCC15_N16

VCC15_P9

VCC15_R16

VCC15_T9

VCC15_T11
VCC15_T13
VCC15_T15
VCC15_V16

VCC15_Y6

VCC15_AB20

VCC15_AC3

VCC33_A2
VCC33_A7

VCC33_B18
VCC33_C22

VCC33_D5

VCC33_E24

VCC33_F1
VCC33_H3

VCC33_H18
VCC33_H21
VCC33_H24

VCC33_L6

VCC33_M19

VCC33_R7
VCC33_T5

VCC33_T17
VCC33_T20
VCC33_T23

VCC33_U9
VCC33_V4
VCC33_W2

VCC33_W11

VCC33_Y9

VCC33_Y15
VCC33_Y21
VCC33_Y24
VCC33_AA1
VCC33_AB8

VCC33_AB14

VCC33_AC6

VCC33_AD19

E6
F6
B5
B3
C4
A5
D6
F8
F7

A3
B4
D4
F5

G16

B20
A18
D20

J16
K9
L3
L16
M9
M22
N16
P9
R16
T9
T11
T13
T15
V16
Y6
AB20
AC3

A2
A7
B18
C22
D5
E24
F1
H3
H18
H21
H24
L6
M19
R7
T5
T17
T20
T23
U9
V4
W2
W11
Y9
Y15
Y21
Y24
AA1
AB8
AB14
AC6
AD19

PXH_HBSIC_STRAP
NC_PXH_HBSIL_N
PXH_HBSID_STRAP
PXH_HBMODE2
NC_PXH_HBSOL
NC_PXH_HBSOLR
NC_PXH_HBSOD
NC_PXH_HBPRST1_N

NC_PXH_HBPRST2_N
NC_PXH_PCI_B_HATNLED_1_N
NC_PXH_PCI_B_HPWREN_1

X02_GT_091503

PXH_HBSLOTS

PXH_SMBUS1

PXH_SMBUS2

PXH_SMBUS3

PXH_SMBUS5

+1.5V

+3.3V

28

28
28

28

28
28
28
28

what is the current draw on these inductors?

X00_GT_052203

x00_tj_061403

x02_tj_100703

+1.5V

+1.5V

+1.5V

+1.5V

TL431ACD

R44

1 2

.499-1%

X00_TJ_060903
R40

1 2

1-1%

X00_TJ_060903

R41

1-1%

X00_TJ_060903
R42

1 2

1-1%

+3.3V

301-1%

7

R1755

21

1

3

6

SUB*_1X621

21

+2.5VREF

D52

8

2

NET_PHYSICAL_TYPE=50MIL
PROPAGATION_DELAY=L:S::600

X00_GT_051503
X00_TJ_060403

NET_PHYSICAL_TYPE=50MIL
PROPAGATION_DELAY=L:S::600

X00_GT_051503
X00_TJ_060403

NET_PHYSICAL_TYPE=50MIL

PROPAGATION_DELAY=L:S::600

X00_GT_051503

NET_PHYSICAL_TYPE=50MIL
PROPAGATION_DELAY=L:S::600

300 Ohm 5% (needs 1mA to operate)

R43

1-1%

1 2

C1655

X00_GT_052703

10uF 6.3V

L19

1 2

4.7uH 80mA

L23

1 2

4.7uH 80mA

L22

4.7uH 80mA

X00_GT_051503
X00_TJ_060403

1 2

4.7uH 80mA

X00_TJ_060403

21

NET_PHYSICAL_TYPE=50MIL

PROPAGATION_DELAY=L:S::600

L21

X00_GT_051503

X00_TJ_060403

2

PXH_VCCA_EXP_G15

NET_PHYSICAL_TYPE=50MIL

21

C523

1 2

21

C522

21

C515

1 2

21

C514

4.7uH 80mA

C512

10uF 6.3V

21

C29

10uF 6.3V

C28

10uF 6.3V

C27

10uF 6.3V

L20

1 2

21

21

C25

10uF 6.3V

NET_PHYSICAL_TYPE=50MIL
PROPAGATION_DELAY=L:S::600

0.1uF 16V

NET_PHYSICAL_TYPE=50MIL

PROPAGATION_DELAY=L:S::600

0.1uF 16V

NET_PHYSICAL_TYPE=50MIL
PROPAGATION_DELAY=L:S::600

0.1uF 16V

C513

1 2

PROPAGATION_DELAY=L:S::1000

1 2

0.1uF 16V

PXH_VSSA_EXP_F16

NET_PHYSICAL_TYPE=50MIL
PROPAGATION_DELAY=L:S::1000

PXH_VCCA_PCI0

PXH_VCCA_PCI1

PXH_VCCA_PCI2

NET_PHYSICAL_TYPE=50MIL
PROPAGATION_DELAY=L:S::600

C26

1 2

10uF 6.3V

0.1uF 16V

PXH_VCCBG_EXP

28

28

29

28

3

28

28

D75

2 1

+1.5V

subsys done

MBRS130LT3

SHUNT_1V5_N

5

1K-5%

2 1

R6020

1

G

X

NP*

S

2

A02_GT_102104

R609

1 2

R612

1 2

1K-5%1K-5%

PXH_A_ODT

28

X

On-die termination enabled for both channels

R611

X

1 2

R613

1 2

A B

PXH_B_ODT

1K-5% 1K-5%

28

for RCOMP see pf400 pg 59

for VREF_PCI see pf400 pg 60
for PASTRAP see pf400 pg 60

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

PXH

INC.

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

DC

ROUND ROCK,TEXAS

REV.

A03-00

SHEET

28 OF 60

B D

CA

CHANGES MADE FOR PLANAR PXH

1

ROOM = PXH

PCI EXPRESS 4X

VERSION -0.8

12-16-2004_19:51

-Change REF DES to PXH

-Change clock name to match planar

-Change TP's to NC's

-Change Express signal names to match planar

-Swap upper & lower segment of Express bus

-Delete I2C headers

1

for PXH_VSSBGEXP_A13 see pf400 pg 59

for PXH_VSSA_EXP_F16 see pf400 pg 59, 63

2

3

caps only on upstream, immediately next to source. 0.5 inch max seperation

27

27

27

27

27

27

27

27

EXP_B_UP_5P_C

EXP_B_UP_6P_C

EXP_B_UP_7P_C

EXP_B_UP_4N_C

EXP_B_UP_5N_C

EXP_B_UP_6N_C

EXP_B_UP_7N_C

EXP_B_UP_4P_C

C36

.1uF

10V-10%

C42

21

.1uF

10V-10%

21

C32

21

.1uF

10V-10%

C43

21

.1uF

10V-10%

C31

21

.1uF

10V-10%

C44

21

.1uF

10V-10%

C30

21

.1uF

10V-10%

C48

21

.1uF

10V-10%

EXP_B_UP_4P

EXP_B_UP_5P

EXP_B_UP_6P

EXP_B_UP_7P

EXP_B_UP_4N

EXP_B_UP_5N

EXP_B_UP_6N

EXP_B_UP_7N

17

17

17

17

17

17

17

17

A4

A8
A17
A20
A24

B8
B10
B13
B16

C2

C5

C8
C20
C23
D11
D14
D17

E2

E5

E8
E10
E13
E20
E23
F15

G2

G5

G8
G11
G14
G17
G20
G23

H6
H10
H14

J1

J4

J9
J11
J13
J15
J19
J22

K2

K5

K8
K10
K12
K14
K16
K20
K23

L9
L11
L13
L15
L18
L21
L24

M4

M7
M10
M12
M14
M16

N2

N5

N9
N11
N13
N15

VSS_A4
VSS_A8
VSS_A17
VSS_A20
VSS_A24
VSS_B8
VSS_B10
VSS_B13
VSS_B16
VSS_C2
VSS_C5
VSS_C8
VSS_C20
VSS_C23
VSS_D11
VSS_D14
VSS_D17
VSS_E2
VSS_E5
VSS_E8
VSS_E10
VSS_E13
VSS_E20
VSS_E23
VSS_F15
VSS_G2
VSS_G5
VSS_G8
VSS_G11
VSS_G14
VSS_G17
VSS_G20
VSS_G23
VSS_H6
VSS_H10
VSS_H14
VSS_J1
VSS_J4
VSS_J9
VSS_J11
VSS_J13
VSS_J15
VSS_J19
VSS_J22
VSS_K2
VSS_K5
VSS_K8
VSS_K10
VSS_K12
VSS_K14
VSS_K16
VSS_K20
VSS_K23
VSS_L9
VSS_L11
VSS_L13
VSS_L15
VSS_L18
VSS_L21
VSS_L24
VSS_M4
VSS_M7
VSS_M10
VSS_M12
VSS_M14
VSS_M16
VSS_N2
VSS_N5
VSS_N9
VSS_N11
VSS_N13
VSS_N15

PXH

VSSAEXPVSSBGEXP

VSS_N20
VSS_N23

VSS_P3

VSS_P6
VSS_P10
VSS_P12
VSS_P14
VSS_P16
VSS_P18
VSS_P21
VSS_P24

VSS_R1

VSS_R4

VSS_R9
VSS_R11
VSS_R13
VSS_R15
VSS_R19
VSS_R22

VSS_T2

VSS_T8
VSS_T10
VSS_T12
VSS_T14
VSS_T16

VSS_U3

VSS_U6
VSS_U12
VSS_U15
VSS_U18
VSS_U21
VSS_U24

VSS_V1

VSS_V7
VSS_V10
VSS_V13
VSS_V19
VSS_V22

VSS_W5

VSS_W8
VSS_W14
VSS_W17
VSS_W20
VSS_W23

VSS_Y3
VSS_Y12
VSS_Y18
VSS_AA4
VSS_AA7

VSS_AA10
VSS_AA13
VSS_AA16
VSS_AA19
VSS_AA22

VSS_AB2
VSS_AB5

VSS_AB11
VSS_AB17
VSS_AB23

VSS_AC9

VSS_AC12
VSS_AC15
VSS_AC18
VSS_AC21

VSS_AD1
VSS_AD4
VSS_AD7

VSS_AD10
VSS_AD16
VSS_AD22
VSS_AD24

F16A13

N20
N23
P3
P6
P10
P12
P14
P16
P18
P21
P24
R1
R4
R9
R11
R13
R15
R19
R22
T2
T8
T10
T12
T14
T16
U3
U6
U12
U15
U18
U21
U24
V1
V7
V10
V13
V19
V22
W5
W8
W14
W17
W20
W23
Y3
Y12
Y18
AA4
AA7
AA10
AA13
AA16
AA19
AA22
AB2
AB5
AB11
AB17
AB23
AC9
AC12
AC15
AC18
AC21
AD1
AD4
AD7
AD10
AD16
AD22
AD24

PXH_VSSA_EXP_F16

28

2

3

PXH MCH INTERFACE

HETERO 4 OF 4

REV 1.0

X00_GT_052803

4 4

INC.

ROUND ROCK,TEXAS

TITLE

PXH

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

29 OF 60

subsys done

A B

DC

ROOM = PXH

PXH DECOUPLING

B D

CA

VERSION -0.8

12-16-2004_19:51

1

+1.5V

C140

21

1 2

C141

0.1uF 16V

21

C139

0.1uF 16V

1 2

C123

0.1uF 16V

21

C122

0.1uF 16V

1 2

C121

0.1uF 16V

C180

0.1uF 16V

1 2

C181

1uF 6.3V

21

1uF 6.3V

C535

1 2

10uF 6.3V

C534

1

BACKSIDE DECOUPLING

21

10uF 6.3V

2

+1.5V

21

C119

+3.3V

C84

1 2

C120

0.1uF 16V

C83

0.1uF 16V

1 2

21

C108

0.1uF 16V

C99

0.1uF 16V

21

1 2

C109

0.1uF 16V

C98

0.1uF 16V

1 2

21

C110

0.1uF 16V

C97

0.1uF 16V

21

1 2

C111

0.1uF 16V

C96

0.1uF 16V

1 2

21

C117

0.1uF 16V

C95

0.1uF 16V

21

1 2

C118

0.1uF 16V

C85

0.1uF 16V

1 2

21

C183

0.1uF 16V

C529

0.1uF 16V

21

21

C182

1uF 6.3V

C554

1 2

1 2

1uF 6.3V

10uF 6.3V

C179

21

C178

1uF 6.3V

1 2

1uF 6.3V

C177

21

C184

1uF 6.3V

1 2

1uF 6.3V

C176

21

1uF 6.3V

C533

21

10uF 6.3V

C532

21

10uF 6.3V

C530

1 2

10uF 6.3V

PXH Channel A PCI pullups

PU_NC_PXH_PCI_A_AD63

27

PU_NC_PXH_PCI_A_AD60

27

PU_NC_PXH_PCI_A_AD42

27

PU_NC_PXH_PCI_A_AD43

27

PU_NC_PXH_PCI_A_AD46

27

PU_NC_PXH_PCI_A_AD62

27

PU_NC_PXH_PCI_A_AD45

27

PU_NC_PXH_PCI_A_AD44

27

PU_NC_PXH_PCI_A_AD58

27

PU_NC_PXH_PCI_A_AD40

27

PU_NC_PXH_PCI_A_AD41

27

PU_NC_PXH_PCI_A_AD61

27

+3.3V

PXH Channel B PCI pullups

1

RN101

2
3
4

8.2K

1

RN102

2
3
4

8.2K

1

RN103

2
3
4

8.2K

8
7
6
5

8
7
6
5

8
7
6
5

PU_NC_PXH_PCI_B_AD54

27

PU_NC_PXH_PCI_B_AD57

27

PU_NC_PXH_PCI_B_AD56

27

PU_NC_PXH_PCI_B_AD40

27

PU_NC_PXH_PCI_B_AD59

27

PU_NC_PXH_PCI_B_AD39

27

PU_NC_PXH_PCI_B_AD58

27

PU_NC_PXH_PCI_B_AD44

27

PU_NC_PXH_PCI_B_AD45

27

PU_NC_PXH_PCI_B_AD47

27

PU_NC_PXH_PCI_B_AD49

27

PU_NC_PXH_PCI_B_AD48

27

1

RN113

2
3
4

8.2K

1

RN114

2
3
4

8.2K

1

RN115

2
3
4

8.2K

8
7
6
5

8
7
6
5

8
7
6
5

+3.3V

2

+3.3V

21

PU_NC_PXH_PCI_A_AD59

27

PU_NC_PXH_PCI_A_AD56

27

PU_NC_PXH_PCI_A_AD57

27

PU_NC_PXH_PCI_A_AD55

27

PU_NC_PXH_PCI_A_AD54

27

PU_NC_PXH_PCI_A_AD38

27

PU_NC_PXH_PCI_A_AD39

27

PU_NC_PXH_PCI_A_AD36

27

PU_NC_PXH_PCI_A_AD52

27

PU_NC_PXH_PCI_A_AD34

27

PU_NC_PXH_PCI_A_AD35

27

PU_NC_PXH_PCI_A_AD50

27

PU_NC_PXH_PCI_A_AD32

27

PU_NC_PXH_PCI_A_AD33

TOPSIDE DECOUPLING

21

21

21

27

PU_NC_PXH_PCI_A_AD51

27

PU_NC_PXH_PCI_A_AD53

27

PU_NC_PXH_PCI_A_PAR64

27

PU_NC_PXH_PCI_A_AD49

27

PU_NC_PXH_PCI_A_AD48

27

PU_NC_PXH_PCI_A_AD47

27

1

RN104

2
3
4

8.2K

1

RN105

2
3
4

8.2K

1

RN106

2
3
4

8.2K

1

RN107

2
3
4

8.2K

1

RN108

2
3
4

8.2K

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

PU_NC_PXH_PCI_B_AD62

27

PU_NC_PXH_PCI_B_AD60

27

PU_NC_PXH_PCI_B_AD61

27

PU_NC_PXH_PCI_B_AD63

27

PU_NC_PXH_PCI_B_AD41

27

PU_NC_PXH_PCI_B_AD42

27

PU_NC_PXH_PCI_B_AD43

27

PU_NC_PXH_PCI_B_AD46

27

PU_NC_PXH_PCI_B_AD37

27

PU_NC_PXH_PCI_B_AD52

27

PU_NC_PXH_PCI_B_AD53

27

PU_NC_PXH_PCI_B_AD55

27

PU_NC_PXH_PCI_B_AD36

27

PU_NC_PXH_PCI_B_AD35

27

PU_NC_PXH_PCI_B_AD34

27

PU_NC_PXH_PCI_B_AD38

27

PU_NC_PXH_PCI_B_AD51

27

PU_NC_PXH_PCI_B_AD50

27

PU_NC_PXH_PCI_B_AD33

27

PU_NC_PXH_PCI_B_AD32

27

1

RN116

2
3
4

8.2K

1

RN117

2
3
4

8.2K

1

RN118

2
3
4

8.2K

1

RN119

2
3
4

8.2K

1

RN120

2
3
4

8.2K

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

3

+1.5V

C52

21

C58

0.1uF 16V

C49

1 2

C50

0.1uF 16V

C57

0.1uF 16V0.1uF 16V

1 2

21

C51

0.1uF 16V

C56

0.1uF 16V

0.1uF 16V

1 2

0.1uF 16V

C175

C55

1uF 6.3V

21

0.1uF 16V

C526

C54

1 2

10uF 6.3V

0.1uF 16V

C53

21

C185

0.1uF 16V

1 2

C524

1uF 6.3V

21

10uF 6.3V

C525

21

10uF 6.3V

27
27
27
27

24,27
24,27
24,27
24,27

24,27
24,27

27
27

27
27

PU_NC_PXH_PCI_A_CBE7_N
PU_NC_PXH_PCI_A_CBE5_N
PU_NC_PXH_PCI_A_CBE4_N
PU_NC_PXH_PCI_A_CBE6_N

PXH_PCI_A_FRAME_N
PXH_PCI_A_IRDY_N
PXH_PCI_A_TRDY_N
PXH_PCI_A_DEVSEL_N

PXH_PCI_A_STOP_N
PXH_PCI_A_PERR_N
PU_NC_PXH_PCI_A_ACK64_N
PU_NC_PXH_PCI_A_REQ64_N

PU_NC_PXH_PCI_A_AD37
PU_NC_PXH_PCI_A_PLOCK_N
NC_RN112.3
NC_RN112.4

1

RN109

2
3
4

8.2K

1

RN110

2
3
4

8.2K

1

RN111

2
3
4

8.2K

1

RN112

2
3
4

8.2K

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

+3.3V

25,27
25,27
25,27
25,27

25,27
25,27

PU_NC_PXH_PCI_B_CBE6_N

27

PU_NC_PXH_PCI_B_CBE5_N

27

PU_NC_PXH_PCI_B_CBE7_N

27

PU_NC_PXH_PCI_B_CBE4_N

27

PU_NC_PXH_PCI_B_ACK64_N

27

PU_NC_PXH_PCI_B_REQ64_N

27

PU_NC_PXH_PCI_B_PAR64

27

PU_NC_PXH_PCI_B_PLOCK_N

27

PXH_PCI_B_TRDY_N
PXH_PCI_B_IRDY_N
PXH_PCI_B_FRAME_N
PXH_PCI_B_STOP_N

NC_RN130.1
PXH_PCI_B_DEVSEL_N
PXH_PCI_B_PERR_N
NC_RN130.4

1

RN121

2
3
4

8.2K

1

RN122

2
3
4

8.2K

1

RN126

2
3
4

8.2K

1

RN130

2
3
4

8.2K

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

3

X02_GT_091703

+1.5V

21

C81

C82

0.1uF 16V

1 2

C59

0.1uF 16V

X02_GT_091703

R185

+3.3V

25,27

C62

21

C63

0.1uF 16V

1 2

0.1uF 16V

21

C60

1 2

0.1uF 16V

C80

21

C174

0.1uF 16V

21

C528

1uF 6.3V

1 2

C527

10uF 6.3V 10uF 6.3V

21

10uF 6.3V

24,27

PXH_PCI_A_SERR_N

R184

1 2

X03_GT_010704

8.2K-5%

PXH_PCI_B_SERR_N

8.2K-5%

1 2

X03_GT_010704

4 4

subsys done

A B

PXH DECOUPLING

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

INC.

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

DC

ROUND ROCK,TEXAS

REV.

A03-00

SHEET

30 OF 60

ROOM=PS

POWER SUPPLY

B D

CA

ROOM=RISER_CONN

+3.3V

+3.3V_AUX

REFDES = PCIX_CONN

12-16-2004_19:51

+3.3V

All _R nets have a PROP_DELAY rule for under 1"

+12V

PSU1_CONN

1

2

5,31,59

31,44,59

31,44

44

x00_sd_051903

31,54

PS1_ENABLE_N

I2C_SEG4_VAUX_SDA

PS_FAN_DAC2

PS_FAN_DAC1

PS1_I2C_A0

31

PS_12V_ISHARE

31

PS1_KILL

31

P3V3AUX_PS

1 2

1 2

NP*

R529

100-5%

R731

100-5%

R732

100-5%

R33

21

15

21

P41

P6_1

P42

P6_2

P43

P6_3

P44

P6_4

P33

P5_1

P34

P5_2

P35

P5_3

P36

P5_4

P25

P4_1

P26

P4_2

P27

P4_3

P28

31

P4_4

P17

31

P3_1

P18

P3_2

P19

P3_3

P20

P3_4

P9

P2_1

P10

P2_2

P11

P2_3

P12

P2_4

P1

P1_1

P2

P1_2

P3

P1_3

P4

P1_4

B5

B5

B4

B4

B3

B3

B2

B2

B1

B1

A6

A6

A5

A5

A4

A4

A3

A3

A2

A2

A1

A1

24 SIGNAL/6 POWER

RIGHT RECEPTACLE W/GUIDE PIN

P6_5
P6_6
P6_7
P6_8

P5_5
P5_6
P5_7
P5_8

P4_5
P4_6
P4_7
P4_8

P3_5
P3_6
P3_7
P3_8

P2_5
P2_6
P2_7
P2_8

P1_5
P1_6
P1_7
P1_8

D6B6
D5
D4
D3
D2
D1

C6
C5
C4
C3
C2
C1

Pop options:
1U has individual zones per supply
2U/5U: both supplies in same zone

+12V +12V

PSU2_CONN

P41

3

5,31,59

31,44,59

x00_sd_051903

31,54

P3V3AUX_PS

PS2_ENABLE_N

I2C_SEG4_VAUX_SDA

31,44

PS_FAN_DAC2

PS2_I2C_A0

31

PS_12V_ISHARE

31

PS2_KILL

31

R528

100-5%

21

R39

1 2

15

R730

1 2

100-5%

31 31

P6_1

P42

P6_2

P43

P6_3

P44

P6_4

P33

P5_1

P34

P5_2

P35

P5_3

P36

P5_4

P25

P4_1

P26

P4_2

P27

P4_3

P28

P4_4

P17

P3_1

P18

P3_2

P19

P3_3

P20

P3_4

P9

P2_1

P10

P2_2

P11

P2_3

P12

P2_4

P1

P1_1

P2

P1_2

P3

P1_3

P4

P1_4

B5

B5

B4

B4

B3

B3

B2

B2

B1

B1

A6

A6

A5

A5

A4

A4

A3

A3

A2

A2

A1

A1

24 SIGNAL/6 POWER

RIGHT RECEPTACLE W/GUIDE PIN

P6_5
P6_6
P6_7
P6_8

P5_5
P5_6
P5_7
P5_8

P4_5
P4_6
P4_7
P4_8

P3_5
P3_6
P3_7
P3_8

P2_5
P2_6
P2_7
P2_8

P1_5
P1_6
P1_7
P1_8

D6B6
D5
D4
D3
D2
D1

C6
C5
C4
C3
C2
C1

+3.3V_AUX

1 2

8.2K-5%

4 4

R563

8.2K-5%

8.2K-5%

R1409

21

PS1_ALERT_N_R

31

5,31,59

31,46

PS1_ENABLE_N
PS1_PRES_N
PS1_PWRGOOD_R

31

31

31

3131

+12V

P45

P46

P47

P48

P37

P38

P39

P40

P29

P30

P31

P32

P21

P22

P23

P24

P13

P14

P15

P16

P5

P6

P7

P8

D6B6

D5

D4

D3

D2

D1

C6

C5

C4

C3

C2

C1

P45

P46

P47

P48

P37

P38

P39

P40

P29

P30

P31

P32

P21

P22

P23

P24

P13

P14

P15

P16

P5

P6

P7

P8

D6B6

D5

D4

D3

D2

D1

C6

C5

C4

C3

C2

C1

1 2

R1410

31

5,31,59

31,46

31

C630

1 2

x00_sd_051903

P3V3AUX_PS

31

PS1_PWRGOOD_R
PS1_ALERT_N_R

31

PS1_PRES_N

PS1_AC_GOOD_R

1 2

21

C631

x00_sd_051903

P3V3AUX_PS

31

PS2_PWRGOOD_R
PS2_ALERT_N_R

31

NC_RN3_3

PS2_PRES_N

PS2_AC_GOOD_R

R37

21

15

PS2_ALERT_N_R
PS2_ENABLE_N
PS2_PRES_N
PS2_PWRGOOD_R

21

C634

1uF 6.3V

NC_RN4_3

PS1B_TACH

31,46

R34

15

PS1A_TACH

C635

1 2

1uF 6.3V

PS2B_TACH

31,46

PS2A_TACH

10uF 6.3V

31,54

1
2
3
4

42

I2C_SEG4_VAUX_SCL

42

10uF 6.3V

31,54

1
2
3
4

42

I2C_SEG4_VAUX_SCL

42

8.2K-5%
R530

220

21

P3V3AUX_PS

RN4

1K

P3V3AUX_PS

RN3

8
7
6

1K

5

31,44,59

1 2

R1388

31,54

8
7
6
5

+3.3V_AUX

8.2K-5%

31,44,59

31,54

1 2

PS2_PWRGOOD
PS2_ALERT_N

PS2_AC_GOOD

4.7K

8.2K-5%

R1411

PS1_PWRGOOD
PS1_ALERT_N

NC_RN4_6

PS1_AC_GOOD

R4400

4.7K

21

NC_RN3_6

1 2

R4401

R1412

21

5,59
46

46

5,59
46

46

x00_sd_051803

+5.0V Riser

This is other part of RISER_PRES_N

3P3V_RISER_SENSE

6

CPLD_TCK_RISER

40

CPLD_TD3

32

5,46

5,32,40,46

CK_100M_DOBSON_P

4

CK_100M_DOBSON_N

4

CK_100M_EXP_SPARE_P

4

CK_100M_EXP_SPARE_N

4

CK_100M_PXH_P

4

CK_100M_PXH_N

4

17
17
17
17
17
17

17
17
17
17
17
17

17
17
17
17
17
17

17
17
17
17
17
17

17
17
17
17
17
17

CPLD_TD2
CPLD_TMS

EXP_A_UP_7N
EXP_A_UP_7P
EXP_A_UP_3N
EXP_A_UP_3P
EXP_A_UP_6N
EXP_A_UP_6P

EXP_A_UP_2N
EXP_A_UP_2P
EXP_A_UP_5P
EXP_A_UP_5N
EXP_A_UP_1N
EXP_A_UP_1P

EXP_A_UP_4P
EXP_A_UP_4N
EXP_A_UP_0N
EXP_A_UP_0P
EXP_C_UP_5P
EXP_C_UP_5N

EXP_C_UP_4P
EXP_C_UP_4N
EXP_C_UP_6P
EXP_C_UP_6N
EXP_C_UP_7P
EXP_C_UP_7N

EXP_C_DN_5P
EXP_C_DN_5N
EXP_C_DN_4P
EXP_C_DN_4N
EXP_C_DN_6P
EXP_C_DN_6N

2U5U Pemnut

1U2U5U Pemnut

2U5U Guidepins

1U Guidepin (long)

HS3 Shipping Cover

17,27,35
17,27,35

35,41
35,41

5,59

41
17

5,31

ICH_SEG0_SCL
ICH_SEG0_SDA
ICH_SEG3_SCL
ICH_SEG3_SDA

5

SYSTEM_PWRGOOD_RISER

RISER_PWRGOOD

3.3VAUX_PWRGOOD_RISER
MCH_EXPHPINTR_N
PCI_RST_RISER_N

5

RISER_EXP_PME_N

SP_HS3_E2

RISER_PCI_PME_N

SHIFTY_RISER_CLK
SHIFTY_RISER_LATCH
SHIFTY_RISER_DATA_DN
SHIFTY_RISER_DATA_UP
INTRUSION_COVER_N
LI_BAT_PACK_P

RISER_PRES_N
I2C_SEG3_VAUX_SDA
I2C_SEG3_VAUX_SCL

+12V

5,31

5
5
5

5,59

41
45

5,31
44,59
44,59

NC_RISER_CONN_D24

(TDO)
(TDI)

A1

A1

B1

B1

C1

C1

D1

D1

E1

E1

F1

F1

A2

A2

B2

B2

C2

C2

D2

D2

E2

E2

F2

F2

A3

A3

B3

B3

C3

C3

D3

D3

E3

E3

F3

F3

A4

A4

B4

B4

C4

C4

D4

D4

E4

E4

F4

F4

A5

A5

B5

B5

C5

C5

D5

D5

E5

E5

F5

F5

A6

A6

B6

B6

C6

C6

D6

D6

E6

E6

F6

F6

A7

A7

B7

B7

C7

C7

D7

D7

E7

E7

F7

F7

A8

A8

B8

B8

C8

C8

D8

D8

E8

E8

F8

F8

A9

A9

B9

B9

C9

C9

D9

D9

E9

E9

F9

F9

A10

A10

B10

B10

C10

C10

D10

D10

E10

E10

F10

F10

6 ROW BACKPLANE CONNECTOR

SUB=SUB*_C2006

ADD1=ADD*_U1495_PEMNUT1
ADD2=ADD13_U1495_PEMNUT2

ADD3=ADD13_C2012_GUIDEPIN1
ADD4=ADD13_C2012_GUIDEPIN2

ADD5=ADD02_X1912_GUIDEPIN3

ADD6=ADD*_M3170_COVER1

A1

A1

B1

B1

C1

C1

D1

D1

E1

E1

F1

F1

A2

A2

B2

B2

C2

C2

D2

D2

E2

E2

F2

F2

A3

A3

B3

B3

C3

C3

D3

D3

E3

E3

F3

F3

A4

A4

B4

B4

C4

C4

D4

D4

E4

E4

F4

F4

A5

A5

B5

B5

C5

C5

D5

D5

E5

E5

F5

F5

RISER_CONN_1

Z-PACK HS3

RISER_CONN_3

G1
H1
J1

G2
H2
J2

G3
H3
J3

G4
H4
J4

G5
H5
J5

G1
H1
J1

G2
H2
J2

G3
H3
J3

G4
H4
J4

G5
H5
J5

G6
H6
J6

G7
H7
J7

G8
H8
J8

G9
H9
J9

G10
H10
J10

G1
H1
J1

G2
H2
J2

G3
H3
J3

G4
H4
J4

G5
H5
J5

G1
H1
J1

G2
H2
J2

G3
H3
J3

G4
H4
J4

G5
H5
J5

G6
H6
J6

G7
H7
J7

G8
H8
J8

G9
H9
J9

G10
H10
J10

x02_gt_091703

+12V

+5.0V Riser

CK_100M_SLOT7_P

4

CK_100M_SLOT7_N

4

17
17

17
17
17
17
17
17

17
17
17
17
17
17

17
17
17
17
17
17

17
17
17
17
17
17

17
17
17
17
17
17

4
4

17
17

17
17
17
17
17
17

17
17

17
17

17
17
17
17
17
17

EXP_C_DN_7N
EXP_C_DN_7P

EXP_A_DN_7N
EXP_A_DN_7P
EXP_A_DN_3N
EXP_A_DN_3P
EXP_A_DN_6N
EXP_A_DN_6P

EXP_A_DN_2N
EXP_A_DN_2P
EXP_A_DN_1P
EXP_A_DN_1N
EXP_A_DN_5N
EXP_A_DN_5P

EXP_A_DN_0N
EXP_A_DN_0P
EXP_A_DN_4N
EXP_A_DN_4P
EXP_C_DN_0P
EXP_C_DN_0N

EXP_C_DN_3N
EXP_C_DN_3P
EXP_C_DN_2P
EXP_C_DN_2N
EXP_C_DN_1N
EXP_C_DN_1P

EXP_C_UP_1N
EXP_C_UP_1P
EXP_C_UP_3P
EXP_C_UP_3N
EXP_C_UP_0N
EXP_C_UP_0P

CK_100M_SLOT6_P
CK_100M_SLOT6_N

EXP_C_UP_2N
EXP_C_UP_2P

EXP_B_DN_1P
EXP_B_DN_1N
EXP_B_DN_3N
EXP_B_DN_3P
EXP_B_DN_2P
EXP_B_DN_2N

EXP_B_DN_0P
EXP_B_DN_0N

EXP_B_UP_3P
EXP_B_UP_3N

EXP_B_UP_2P
EXP_B_UP_2N
EXP_B_UP_1P
EXP_B_UP_1N
EXP_B_UP_0P
EXP_B_UP_0N

x00_sd_052103 - pinout change

+3.3V

21

C162

+12V

12

+

C713

x02_gt_091703

270uF

16V-20%

21

C163

0.1uF 16V

C168

A1

A1

B1

B1

C1

C1

D1

D1

E1

E1

F1

F1

A2

A2

B2

B2

C2

C2

D2

D2

E2

E2

F2

F2

A3

A3

B3

B3

C3

C3

D3

D3

E3

E3

F3

F3

A4

A4

B4

B4

C4

C4

D4

D4

E4

E4

F4

F4

A5

A5

B5

B5

C5

C5

D5

D5

E5

E5

F5

F5

A6

A6

B6

B6

C6

C6

D6

D6

E6

E6

F6

F6

A7

A7

B7

B7

C7

C7

D7

D7

E7

E7

F7

F7

A8

A8

B8

B8

C8

C8

D8

D8

E8

E8

F8

F8

A9

A9

B9

B9

C9

C9

D9

D9

E9

E9

F9

F9

A10

A10

B10

B10

C10

C10

D10

D10

E10

E10

F10

F10

6 ROW BACKPLANE CONNECTOR

SUB=SUB*_C2006

+5.0V Riser

21

C164

0.1uF 16V

21

0.1uF 16V

21

C171

0.1uF 16V

0.1uF 16V

RISER_CONN_2

Z-PACK HS3

21

C165

C166

0.1uF 16V

21

C273

0.1uF 16V

21

21

C274

G1

G1

H1

H1

J1

J1

G2

G2

H2

H2

J2

J2

G3

G3

H3

H3

J3

J3

G4

G4

H4

H4

J4

J4

G5

G5

H5

H5

J5

J5

G6

G6

H6

H6

J6

J6

G7

G7

H7

H7

J7

J7

G8

G8

H8

H8

J8

J8

G9

G9

H9

H9

J9

J9

G10

G10

H10

H10

J10

J10

21

C167

0.1uF 16V

21

C275

0.1uF 16V

0.1uF 16V

0.1uF 16V

C433

+12V

12

+

270uF

16V-20%

14.7K-1%
R701

21

+3.3V

21

C227

+3.3V_AUX

1 2

14.7K-1%
R700

21

C228

0.1uF 16V

C4

5,31

x04_sd

21

C229

0.1uF 16V

21

0.1uF 16V

RISER_PRES_N

x00_sd_051703

CK_33M_SLOT1

3

33,36,50,58
33,36,50,58

33,36,50,58

33,36,50,58

33,36,50,58
33,36,50,58

33,36,50,58
33,36,50,58

33,36,50,58

33,36,50,58

33,36,50,58

33,36,50,58

33,50,58

33,50,58

33,50,58

33,36,50,58

33,36,50,58

33,36,50,58

33,36,50,58
33,36,50,58

33,36,50,58
33,36,50,58

33,36,50,58

RISER_PCI_PME_N

RISER_EXP_PME_N

+5.0V Riser

21

C211

0.1uF 16V

21

C5

21

C208

0.1uF 16V

PCI0_AD31
PCI0_AD29

PCI0_AD27

PCI0_AD25

PCI0_AD23
PCI0_AD21

PCI0_AD20
PCI0_AD19

PCI0_AD17

PCI0_CBE2_N

PCI0_IRDY_N

PCI0_DEVSEL_N

PCI0_LOCK_N

PCI0_PERR_N

PCI0_SERR_N

PCI0_CBE1_N

PCI0_AD14

PCI0_AD12

PCI0_AD10
PCI0_AD8

PCI0_AD7
PCI0_AD5

PCI0_AD3

5,31

5,31

21

C212

0.1uF 16V

21

C209

0.1uF 16V

X00_GT_060503

21

C226

0.1uF 16V

21

C210

0.1uF 16V

+3.3V

X00_GT_060503

0.1uF 16V

0.1uF 16V

+5.0V Riser

+12V

ROOM=RISER_MCA

X00_GT_051503

Side B

RISER_CONN_PCI

B1
B2
B3
B4
B5
B6
B7
B8
B9

B10

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10

B11 A11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59

A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59

B60 A60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
B83
B84
B85
B86
B87
B88
B89
B90
B91

A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
A83
A84
A85
A86
A87
A88
A89
A90
A91

A92B92
B93
B94
B95
B96
B97
B98
B99

B100

A93

A94

A95

A96

A97

A98

A99

A100

B101 A101

202MCA PCI SKT

LOW PROFILE

NP02

Side A

X00_GT_060503

+5.0V Riser

+12V

X00_GT_060503

+3.3V

ICH_PIRQ_SLOT_AC_N
ICH_PIRQ_SLOT_BD_N

PCI0_AD30
PCI0_AD28

PCI0_AD26

PCI0_CBE3_N

PCI0_AD24
PCI0_AD22

PCI0_AD18
PCI0_AD16

PCI0_FRAME_N

PCI0_TRDY_N

PCI0_STOP_N

PCI0_PAR

PCI0_AD15

PCI0_AD13

PCI0_AD11

PCI0_AD9

PCI0_CBE0_N

PCI0_AD6

PCI0_AD4
PCI0_AD2

PCI0_AD0
PCI0_AD1

PCI0_REQ_SLOT_N
PCI0_GNT_SLOT_N

SLOT6_PWRGD
SLOT7_PWRGD

INC.

RISER_PCI_PME_N

4
4

33
33

33,36,50,58
33,36,50,58

33,36,50,58

33,36,50,58

33,36,50,58
33,36,50,58

33,36,50,58
33,36,50,58

33,36,50,58

33,36,50,58

33,36,50,58

33,36,50,58

33,36,50,58

33,36,50,58

33,36,50,58

33,36,50,58

33,36,50,58

33,36,50,58

33,36,50,58
33,36,50,58

33,36,50,58
33,36,50,58

33
33

5,31

1

2

3

ROUND ROCK,TEXAS

31
31

PS1_I2C_A0
PS1_KILL

100-5%

21

R1385

220

1 2

R1386

1 2

8.2K-5%
R1408

For PSx_PWRGOOD, PS has internal 1k p/u

x02_sd_changed PS_KILL res's to 100 from 220

31
31

PS2_I2C_A0
PS2_KILL

1 2

100-5%

R1387

8.2K-5%

21

R1413

6 ROW BACKPLANE CONNECTOR

Z-PACK HS3

SUB=SUB*_C2007

RISER & PS CONNECTOR

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

REV.

A03-00

SHEET

31 OF 60

subsys done

A B

DC

1

+3.3V_AUX

21

C437

0.1uF 16V

+12V

C439

1 2

0.1uF 16V

VCC

21

C454

0.1uF 16V

28,41

40

5,31,40,46

B D

x03b_sd

SYSTEM_PWRGOOD_FETS_6V

CPLD_TCK_BP

CPLD_TMS

Q110

D
3

Q111

D
3

2N7002

2N7002

CA

G

1

S
2

G

1

S
2

CPLD_TCK_GATED

CPLD_TMS_GATED

32

R877

1 2

0-5%
R878

0-5%

2U5U_CPLD_TCK_BP

32

+3.3V_AUX VCC+12V

x03c_sd

21

1U_CPLD_TCK_BP

32

C625

1 2

0.1uF 16V

21

C455

0.1uF 16V

C626

1 2

+3.3V_AUX VCC+12V

1

0.1uF 16V

2

3

x00_sd_060203 - connected

32,44,59
32,44,59

24

32,44

25

32,44

5,32

32,44,45,50

5,32,59

5,32

32,43

5,32

32,44,50,59

32

32,44,50,59

32

5,32,46

32,40
32,40

32,40
32,40
32,38

32,40
32,40
32,37

32,40,59

32,40
32,40
32,37

32,40
32,40
32,38

32,40

32,40

32,37

32

I2C_SEG5_SDA
I2C_SEG5_SCL

NC_CTRLPNL_PRES_N
FP_GB_ETH_LED_1

CTRLPNL_MUX_S0
FP_GB_ETH_LED_2

CTRLPNL_MUX_S1

SHIFTY_BCKPLN_CLK
IPMB_RST_N
SHIFTY_BCKPLN_DATA_UP
SHIFTY_BCKPLN_LATCH
ID_BUTTON_RAW
SHIFTY_BCKPLN_DATA_DN

I2C_IPMB_SDA

x00_sd_051803 - added gating of tdo

CPLD_TDO_GATED
I2C_IPMB_SCL

1U_CPLD_TCK_BP

BACKPLANE_PRES_N
FLP_DR0_N
FLP_WP_N

FLP_INDEX_N
FLP_HDSEL_N
VID_VS_OUT_FRONT

FLP_WDATA_N
FLP_DENSEL
VID_BLUE_FRONT

FLP_DSKCHG_N

FLP_RDATA_N
FLP_STEP_N
VID_RED_FRONT

FLP_MTR0_N
FLP_WGATE_N
VID_HS_OUT_FRONT

FLP_TRK0_N

FLP_DIR_N

VID_GREEN_FRONT

CPLD_TMS_GATED

+3.3V_AUX VCC+12V

BACKPLANE_1U_A

A1
B1
C1
A2
B2
C2
A3
B3
C3
A4
B4
C4
A5
B5
C5
A6
B6
C6
A7
B7
C7
A8
B8
C8
A9
B9

C9
A10
B10
C10
A11
B11
C11
A12
B12
C12

HDM BACKPLANE

PRESS FIT CONN

F1

E1

D1

F2

E2

D2

F3

E3

D3

F4

E4

D4

F5

E5

D5

F6

E6

D6

F7

E7

D7

F8

E8

D8

F9

E9

D9
F10
E10
D10
F11
E11
D11
F12
E12
D12

BACKPLANE_1U_B

F1
E1
D1
F2
E2
D2
F3
E3
D3
F4
E4
D4
F5
E5
D5
F6
E6
D6
F7
E7
D7
F8
E8
D8
F9
E9
D9
F10
E10
D10
F11
E11
D11
F12
E12
D12

A1
B1
C1
A2
B2
C2
A3
B3
C3
A4
B4
C4
A5
B5
C5
A6
B6
C6
A7
B7
C7
A8
B8
C8
A9
B9
C9
A10
B10
C10
A11
B11
C11
A12
B12
C12

F1=PRES

PWR_LED
SPKROUT

1U_USB_FRONT2+

1U_USB_FRONT2-

PCI_RST_BACKPLANE_N

BTN_NMI
BTN_PWR_ON

SYSTEM_PWRGOOD_BACKPLANE

VID_DDC_OUT_SDA_FRONT
CP_BLUE_CLK

x00_sd_051803

SENSE_5V_BACKPLANE_1U
VID_DDC_OUT_SCLK_FRONT
CP_AMBER_DATA

x00_sd_051803

IDE_PDIOW_N

CPLD_TD3_GATED

(TDI)

IDE_PDDREQ

NP13
SUB02_C2144

IDE_PDD8
IDE_PDD14

IDE_PDD7
IDE_PDD11
IDE_PDCS3_N

IDE_PRST_N
IDE_PDCS1_N
IDE_PDD6

IDE_PDA2
IDE_PDD5
IDE_PDD10

IDE_PDD4
IDE_PDD9
IDE_PDA1

IDE_PDD15
IDE_PDA0
IDE_PDD3

IDE_IRQ14_N
IDE_PDD2
IDE_PDD13

IDE_PDD12
IDE_PIORDY
IDE_PDD1

IDE_PDD0
IDE_PDDACK_N
IDE_PDIOR_N

32,46
32,43
32

x03_sd changed port numbers

32

5,32

32,56
32,56

5,32

32,38
32
6
32,38
32
32,33

32

32,33

32,33
32,33

32,33
32,33
32,33

32,40
32,33
32,33

32,33
32,33
32,33

32,33
32,33
32,33

32,33
32,33
32,33

32,33
32,33
32,33

32,33
32,33
32,33

32,33
32,33
32,33

x00_sd_060503 - name change

32,33
32,33
32,33
32,33

32,33
32,33
32,33
32,33

32,33
32,33
32,33
32,33

32,33
32,33
32,33
32,33

32,33
32,33
32,33
32,33

32,33
32,33
32,40
32,33

32,33
32,33
32,33
32,33

IDE_PDIOW_N
IDE_PDDREQ
IDE_PDDACK_N
IDE_PDIOR_N

IDE_PDD1
IDE_PDD12
IDE_PIORDY
IDE_PDD0

IDE_IRQ14_N
IDE_PDD3
IDE_PDD13
IDE_PDD2

IDE_PDA1
IDE_PDD9
IDE_PDA0
IDE_PDD15

IDE_PDD6
IDE_PDD10
IDE_PDD5
IDE_PDD4

IDE_PDCS3_N
IDE_PDCS1_N
IDE_PRST_N
IDE_PDA2

IDE_PDD14
IDE_PDD8
IDE_PDD11
IDE_PDD7

31

5,40

CPLD_TD3

CPLD_TDO

NP02

NP02

NP02

NP02

NP02

NP02

NP02

2N7002

G

Q112

1

(TDI) (TDI)

1

RN13

2
3
4

1

0

RN14

2
3
4

1

0

RN15

2
3
4

1

0

RN16

2
3
4

1

0

RN17

2
3
4

1

0

RN18

2
3

x00_sd_060503 - name change

4

1

0

RN19

2
3
4

0

D
3

2N7002

Q128

D
3

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

2U5U_IDE_PDIOW_N

2U5U_IDE_PDDREQ

2U5U_IDE_PDDACK_N

2U5U_IDE_PDIOR_N

2U5U_IDE_PDD1

2U5U_IDE_PDD12

2U5U_IDE_PIORDY

2U5U_IDE_PDD0

2U5U_IDE_IRQ14_N

2U5U_IDE_PDD3

2U5U_IDE_PDD13

2U5U_IDE_PDD2

2U5U_IDE_PDA1
2U5U_IDE_PDD9
2U5U_IDE_PDA0

2U5U_IDE_PDD15

2U5U_IDE_PDD6

2U5U_IDE_PDD10

2U5U_IDE_PDD5
2U5U_IDE_PDD4

2U5U_IDE_PDCS3_N
2U5U_IDE_PDCS1_N

2U5U_IDE_PRST_N

2U5U_IDE_PDA2

2U5U_IDE_PDD14

2U5U_IDE_PDD8

2U5U_IDE_PDD11

2U5U_IDE_PDD7

S
2

G

1

S
2

x00_sd_051803 - added gating of tdo

32
32
32
32

32
32
32
32

32
32
32
32

32
32
32
32

32
32
32
32

32
32
32
32

32
32
32
32

CPLD_TD3_GATED

CPLD_TDO_GATED

32

32

x00_gt_052103
x00_sd_060203

32,44

5,32

CTRLPNL_MUX_S1
SYSTEM_PWRGOOD_BACKPLANE

32,44

5,32

CTRLPNL_MUX_S0
PCI_RST_BACKPLANE_N

NP02

5,32
5,32

SHIFTY_BCKPLN_CLK
SHIFTY_BCKPLN_LATCH
CP_BLUE_CLK

32

x00_sd_051803 x00_sd_060503

NC_RN6_4

NP02

32,40
32,40
32,40
32,40

FLP_WGATE_N
FLP_MTR0_N
FLP_TRK0_N
FLP_DIR_N

NP02

32,40

32,40,59

32,40
32,40

FLP_DENSEL
FLP_DSKCHG_N
FLP_RDATA_N
FLP_STEP_N

NP02

32,40
32,40
32,40
32,40

FLP_INDEX_N
FLP_WP_N
FLP_HDSEL_N
FLP_WDATA_N

NP02

SP_2U5U_A2

32,38
32,38
32,40

VID_VS_OUT_FRONT
VID_HS_OUT_FRONT
FLP_DR0_N

NP02

32,37
32,37
32,37

VID_BLUE_FRONT
VID_RED_FRONT
VID_GREEN_FRONT

NP02

Populate for 2U/5U builds only

BACKPLANE_2U5U

P3_1

P3_1

P3_2

P3_2

P2_1

P2_1

+3.3V_AUX

21

C1764

0.1uF 16V

+12V+5V_AUX

C1765

1 2

0.1uF 16V

32,44,59
32,44,59

+5V_AUX

I2C_SEG5_SDA
I2C_SEG5_SCL

NC_2U5U_CTRLPNL_PRES_N

2U5U_CTRLPNL_MUX_S0

32

x00_sd_051903 - 060503

2U5U_CTRLPNL_MUX_S1

32

x00_gt_052103
x00_sd_060203

1

RN5

2
3
4

1

0

RN6

2
3
4

1

0

RN7

2
3
4

1

0

RN8

2
3
4

1

0

RN9

2
3
4

1

0

RN10

2
3
4

1

0

RN11

2
3
4

0

8
7

2U5U_SYSTEM_PWRGOOD_BACKPLANE
6
5

8
7

2U5U_PCI_RST_BACKPLANE_N

2U5U_SHIFTY_BCKPLN_CLK

2U5U_SHIFTY_BCKPLN_LATCH
6
5

NC_RN6_5

8
7
6
5

8
7
6
5

8
7
6
5

8

SP_2U5U_A7

7
6
5

8
7
6
5

SP_2U5U_B5SP_2U5U_B4

2U5U_CTRLPNL_MUX_S1

2U5U_CTRLPNL_MUX_S0

2U5U_CP_BLUE_CLK

2U5U_FLP_WGATE_N

2U5U_FLP_MTR0_N
2U5U_FLP_TRK0_N

2U5U_FLP_DIR_N

2U5U_FLP_DENSEL

2U5U_FLP_DSKCHG_N

2U5U_FLP_RDATA_N

2U5U_FLP_STEP_N

2U5U_FLP_INDEX_N

2U5U_FLP_WP_N
2U5U_FLP_HDSEL_N
2U5U_FLP_WDATA_N

2U5U_VID_VS_OUT_FRONT
2U5U_VID_HS_OUT_FRONT

2U5U_FLP_DR0_N

2U5U_VID_BLUE_FRONT

2U5U_VID_RED_FRONT

2U5U_VID_GREEN_FRONT

32
32

32
32
32

32
32
32
32

32
32
32
32

32
32
32
32

32
32
32

32
32
32

32
32

32

32,44,45,50

5,32,59

32

32,43

5,32

32,44,50,59

32

32,44,50,59

32

32
32

32

32

32

32
32
32

32
32
32

32

32
32
32

32
32

5,32,46

32
32

2U5U_SHIFTY_BCKPLN_CLK
IPMB_RST_N
SHIFTY_BCKPLN_DATA_UP
2U5U_SHIFTY_BCKPLN_LATCH
ID_BUTTON_RAW
SHIFTY_BCKPLN_DATA_DN

I2C_IPMB_SDA

x00_sd_051803 - added gating of tdo

CPLD_TDO_GATED
I2C_IPMB_SCL

2U5U_CPLD_TCK_BP

CPLD_TMS_GATED
2U5U_VID_GREEN_FRONT

2U5U_FLP_DIR_N

2U5U_VID_HS_OUT_FRONT

2U5U_FLP_TRK0_N

2U5U_FLP_MTR0_N
2U5U_FLP_WGATE_N
2U5U_VID_RED_FRONT

2U5U_FLP_RDATA_N
2U5U_FLP_STEP_N
2U5U_VID_BLUE_FRONT

2U5U_FLP_DSKCHG_N

2U5U_FLP_WDATA_N
2U5U_FLP_DENSEL
2U5U_VID_VS_OUT_FRONT

2U5U_FLP_INDEX_N
2U5U_FLP_HDSEL_N
BACKPLANE_PRES_N
2U5U_FLP_DR0_N
2U5U_FLP_WP_N

P2_2

P1_1
P1_2

F1
E1
D1
F2
E2
D2
F3
E3
D3
F4
E4
D4
F5
E5
D5
F6
E6
D6
F7
E7
D7
F8
E8
D8
F9
E9

D9
F10
E10
D10
F11
E11
D11
F12
E12
D12
F13
E13
D13
F14
E14
D14
F15
E15
D15
F16
E16
D16
F17
E17
D17
F18
E18
D18
F19
E19
D19
F20
E20
D20
F21
E21
D21
F22
E22
D22
F23
E23
D23
F24
E24
D24

P2_2

P1_1
P1_2

F1

E1

D1

F2

E2

D2

F3

E3

D3

F4

E4

D4

F5

E5

D5

F6

E6

D6

F7

E7

D7

F8

E8

D8

F9

E9

D9

F10

E10

D10

F11

E11

D11

F12

E12

D12

F13

E13

D13

F14

E14

D14

F15

E15

D15

F16

E16

D16

F17

E17

D17

F18

E18

D18

F19

E19

D19

F20

E20

D20

F21

E21

D21

F22

E22

D22

F23

E23

D23

F24

E24

D24

P1

BLADE

P3_4
P3_3

P2_4
P2_3

P1_4
P1_3

A1

B1

C1

A2

B2

C2

A3

B3

C3

A4

B4

C4

A5

B5

C5

A6

B6

C6

A7

B7

C7

A8

B8

C8

A9

B9

C9

A10

B10

C10

A11

B11

C11

A12

B12

C12

A13

B13

C13

A14

B14

C14

A15

B15

C15

A16

B16

C16

A17

B17

C17

A18

B18

C18

A19

B19

C19

A20

B20

C20

A21

B21

C21

A22

B22

C22

A23

B23

C23

A24

B24

C24

P3_4
P3_3

P2_4
P2_3

P1_4
P1_3

A1
B1
C1
A2
B2
C2
A3
B3
C3
A4
B4
C4
A5
B5
C5
A6
B6
C6
A7
B7
C7
A8
B8
C8
A9
B9
C9
A10
B10
C10
A11
B11
C11
A12
B12
C12
A13
B13
C13
A14
B14
C14
A15
B15
C15
A16
B16
C16
A17
B17
C17
A18
B18
C18
A19
B19
C19
A20
B20
C20
A21
B21
C21
A22
B22
C22
A23
B23
C23
A24
B24
C24

A1=PRES

x00_sd_060503 - vcc

X00_PL_051503: Changed PWR_LED to active high

PWR_LED
SPKROUT

2U5U_USB_FRONT2+

2U5U_USB_FRONT2-

2U5U_PCI_RST_BACKPLANE_N

BTN_NMI
BTN_PWR_ON

x00_sd_060503 - vcc

2U5U_SYSTEM_PWRGOOD_BACKPLANE

x00_sd_060503 - vcc

VID_DDC_OUT_SDA_FRONT
2U5U_CP_BLUE_CLK
SENSE_5V_BACKPLANE_2U5U
VID_DDC_OUT_SCLK_FRONT
CP_AMBER_DATA
2U5U_IDE_PDIOW_N

CPLD_TD3_GATED

(TDI)

2U5U_IDE_PDDREQ

2U5U_IDE_PDD0
2U5U_IDE_PDDACK_N
2U5U_IDE_PDIOR_N
2U5U_IDE_PDD1

2U5U_IDE_PDD12
2U5U_IDE_PIORDY
2U5U_IDE_PDD2
2U5U_IDE_PDD13

2U5U_IDE_PDD3

2U5U_IDE_IRQ14_N

2U5U_IDE_PDD15
2U5U_IDE_PDA0
2U5U_IDE_PDD4
2U5U_IDE_PDD9
2U5U_IDE_PDA1
2U5U_IDE_PDD5
2U5U_IDE_PDD10

2U5U_IDE_PDD6

2U5U_IDE_PDA2

2U5U_IDE_PRST_N
2U5U_IDE_PDCS1_N
2U5U_IDE_PDD7
2U5U_IDE_PDD11
2U5U_IDE_PDCS3_N
2U5U_IDE_PDD8
2U5U_IDE_PDD14

32,46
32,43
32

x03_sd changed port numbers

32

32

32,56
32,56

32

32,38

x00_sd_060503

x00_sd_051803

32
6
32,38
32
32

32

32

32
32
32
32

32
32
32
32

32

32

32
32
32
32
32
32
32

32

32

32
32
32
32
32
32
32

2

3

x00_sd_060503 - name change

RIGHT ANGLE RCPT

x03_tj_121503

x03_tj_010904

HDM DAUGHTERCARD

PRESS-FIT CONN ASSY

HDM BACKPLANE

PRESS FIT CONN

NP13
SUB02_C2144

Populate for 1U builds only

43,46

44

43,46

LED_ID_BLUE

NP13

CTRLPNL_CLK

NP02

LED_ID_YELLOW

NP13

R1771

1 2

0-5%

R1772

0-5%

R1773

0-5%

CP_BLUE_CLK

32

todo confirm correct symbol

SUB1=NP02

Populate for 2U/5U builds only

21

21

CP_AMBER_DATA

32

SUB2=SUB13_R4241

R1774

1 2

0-5%

x03_sd changed port number

CTRLPNL_DATA

44

NP02

x00_sd_051803

4 4

R1860

1 2

0-5%

R1861

0-5%

R1862

0-5%

R1863

1 2

0-5%

1U_USB_FRONT2-

32

NP13

21

NP13

21

1U_USB_FRONT2+

2U5U_USB_FRONT2-

32

32

BACKPLANE CONNECTORS

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

NP02

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL

NP02

2U5U_USB_FRONT2+

32

AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

32 OF 60

ROOM=BACKPLANE

USB_FRONT2-

33

USB_FRONT2+

33

subsys done

A B

DC

A B C

+3.3V_AUX

D

1

2

3

4

PCI_RST_ICH_N_R

33

PROPAGATION_DELAY=L:S::2000

31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58

31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58

31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,36,50,58
31,33,50,58

34

+3.3V_AUX

R891

1 2

+CPU_VTT

31,50,58
31,50,58

31,33
33,36
33,50
33,50
33,58

8.2K-5%

1 2

1 2

x03_GT_011504

PCI0_AD31
PCI0_AD30
PCI0_AD29
PCI0_AD28
PCI0_AD27
PCI0_AD26
PCI0_AD25
PCI0_AD24
PCI0_AD23
PCI0_AD22
PCI0_AD21
PCI0_AD20
PCI0_AD19
PCI0_AD18
PCI0_AD17
PCI0_AD16
PCI0_AD15
PCI0_AD14
PCI0_AD13
PCI0_AD12
PCI0_AD11
PCI0_AD10
PCI0_AD9
PCI0_AD8
PCI0_AD7
PCI0_AD6
PCI0_AD5
PCI0_AD4
PCI0_AD3
PCI0_AD2
PCI0_AD1
PCI0_AD0

PCI0_CBE3_N
PCI0_CBE2_N
PCI0_CBE1_N
PCI0_CBE0_N

PCI0_DEVSEL_N
PCI0_FRAME_N
PCI0_TRDY_N
PCI0_IRDY_N
PCI0_STOP_N
PCI0_PAR
PCI0_PERR_N
PCI0_SERR_N
PCI0_LOCK_N
ICH_PME_N

5

PCI0_REQ_SLOT_N
PCI0_REQ_VIDEO_N
PCI0_REQ_RAC_N
PCI0_REQ_RAC_IDE_N
PCI0_REQ_DEBUG_N

SOFT_SMI
SOFT_SCI

PCI0_GNT_SLOT_N

31

PCI0_GNT_VIDEO_N

36

PCI0_GNT_RAC_N

50

PCI0_GNT_RAC_IDE_N

50

PCI0_GNT_DEBUG_N

58

CK_33M_ICHS

3

PCI_RST_ICH_N_R

33

ICH_LINKALERT

x00_tj_050503

R207

51

R206

220

1 2

NC_CK_ICH_25M

SUB=SUB*_T1953

R1912

33-5%

H_FERR_N

ICH_THRMTRIP_N

NP

.01uF 16V

1 2

C1806

X

P2

AD31

F4

AD30

P4

AD29

F5

AD28

N2

AD27

D3

AD26

P3

AD25

E6

AD24

N4

AD23

C4

AD22

N5

AD21

H3

AD20

P5

AD19

B2

AD18

L1

AD17

G4

AD16

G5

AD15

K1

AD14

G2

AD13

L5

AD12

H4

AD11

M4

AD10

F2

AD9

K5

AD8

J2

AD7

J3

AD6

H2

AD5

H5

AD4

K4

AD3

G3

AD2

J5

AD1

J4

AD0

M2

C/BE3

N3

C/BE2

J1

C/BE1

E3

C/BE0

L3

DEVSEL

D2

FRAME

E4

TRDY

M3

IRDY

E5

STOP

F1

PAR

K2

PERR

L4

SERR

L2

PLOCK

V2

PME

D5

REQ0

C1

REQ1

C5

REQ2

B6

REQ3

C6

REQ4/GPIO40

A5

REQA/GPIO0

E7

REQB/REQ5/GPIO1

D4

GNT0

A3

GNT1

B7

GNT2

C7

GNT3

A4

GNT4/GPIO48

E8

GNTA/GPIO16

B4

GNTB/GNT5/GPIO17

N1

PCICLK

V4

PCIRST

V5

LINKALERT

A11

NC

11,33

5,33

PCI_RST_ICH_N

INTEL ICH5 REV. 0.73

HETERO 1 OF 4

5,59

UICH_IC

33,36
33,50
33,50
31,33

33,58

PCI0_REQ_VIDEO_N
PCI0_REQ_RAC_IDE_N
PCI0_REQ_RAC_N
PCI0_REQ_SLOT_N

PCI0_REQ_DEBUG_N

V23

A20M

FERR
INIT
INTR

NMI
SMI

R21
U24
R23
U23
R22

V24
T24

IGNNE

STPCLK

P23

RCIN

T22

A20GATE

CPUPWRGD/GPIO49

P24
P22

CPUSLP

L24

HIREF

HIRCOMP

HI_VSWING

HI_STBS

HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8

HI9
HI10
HI11

N24
L20
H20
H21
J20
H23
M23
M21
N21
M20
L22
J22
K21
G22
J24
K23

HI_STBF

PIRQA
PIRQB
PIRQC

PIRQD
PIRQE/GPIO2
PIRQF/GPIO3
PIRQG/GPIO4
PIRQH/GPIO5

IRQ14

IRQ15

SERIRQ

B3
E1
A2
C2
D7
A6
E2
B1
Y17
Y24
F23

C23

USBP0+
USBP0­USBP1+
USBP1­USBP2+
USBP2­USBP3+
USBP3­USBP4+
USBP4­USBP5+
USBP5­USBP6+
USBP6­USBP7+

D23
A22
B22
C21
D21
A20
B20
C19
D19
A18
B18
C17
D17
A16
B16

USBP7-

C15

OC0

D15

OC1

D14

OC2

C14

OC3

OC4/GPIO9
OC5/GPIO10
OC6/GPIO14
OC7/GPIO15

USBRBIAS
USBRBIAS

PROPAGATION_DELAY=L:S::500

B14
A14
D13
C13
A24
B24

+3.3V

1

RN1

2
3
4 5

8.2K

8
7
6

R194

1 2

8.2K-5%

ICH_VRM_PWRGD

33

H_A20M_N

H_IGNNE_N

H_FERR_N
H_INIT_N

H_INTR

H_NMI

H_SMI_N

H_STPCLK_N

KB_RST_N

KB_GATE_A20_N

H_PWRGOOD

H_SLP_N

11
11
11,33
11,55
11
11
11
11
33,40
33,40
11,12
11

HI_VREF_ICH

HI_RCOMP_ICH

HI_VSWING_ICH
HLA_0
HLA_1
HLA_2
HLA_3
HLA_4
HLA_5
HLA_6
HLA_7
HLA_8
HLA_9

HLA_10

HLA_11
HLA_STBS
HLA_STBF

17
17
17
17
17
17
17
17
17
17
17
17
17
17

IDE_IRQ14_N

21

C458

.01uF 50V

4.7K

32

NC_IDE_IRQ15_N

SERIRQ

USB_RAC0+
USB_RAC0-

40

50
50

NC_USBP1+

NC_USPP1­USB_FRONT2+
USB_FRONT2-

32
32

NC_USBP3+

NC_USPP3-

USB_BACK4+
USB_BACK4­USB_BACK5+
USB_BACK5-

NC_USBP6+

NC_USPP6-

56

x03_sd changed port connections

56
56
56

Internal 15K

PD's to GND

NC_USBP7+

NC_USBP7-

V_5P0_USB_ALWAYS_ON_PORTS

x03_sd changed port connections

GPI_BRD_REV0
GPI_BRD_REV1

USB_RBIAS

33
33

12

R754

R186

22.6-1%

1 2

C457

3

4

6

5

8.2K-5%

ICH_32K_SUSCLK_BUFF

33

+3.3V

R689

1 2

8.2K-5%

Should be 43.2 ohms for 50 ohm trace impedance
Should be 52.3 ohms for 60 ohm trace impedance

34

34

21

.01uF 50V

1

2

RN22

7

R514

21

C61

4.7K

8

4.7K

1 2

x03c_sd

0.1uF 16V

4

5

C438

1 2

C1731

+1.5V

R239

1 2

43.2-1%

ECAD: Caps within .25" of BGA

+3.3V

3

2

1

RN77

6

7

8

ICH_PIRQ_SLOT_AC_N
ICH_PIRQ_SLOT_BD_N
ICH_PIRQ_VIDEO_N
ICH_PIRQ_DEBUG_N
ICH_PIRQ_RAC_A_N
ICH_PIRQ_RAC_B_N
ICH_PIRQ_RAC_C_N
ICH_PIRQ_RAC_D_N

+3.3V

21

R513

4.7K

R511

4.7K

1 2

+5.0V Riser

21

4.7K

R1841

x03c_sd

R755

1 2

V_5P0_USB_BACK45_N

4.7K

R446

2 1

8.2K-5%

1 2

0.1uF 16V

PROPAGATION_DELAY=L:S::1500

142U58

1

CK_32K_VAUX_SIO_R

VHC14

PROPAGATION_DELAY=L:S::1500

R209

33-5%

21

CK_32K_VAUX_SIO

40

143U58

R1608

1 2

33-5%

CK_32K_VAUX_SYSCPLD

5

VHC14

4

CK_32K_VAUX_SYSCPLD_R

PROPAGATION_DELAY=L:S::1500

146U58

5

CK_32K_VAUX_BMCCPLD_R

VHC14

R1609

33-5%

21

CK_32K_VAUX_BMCCPLD

46

+3.3V_AUX

x03_sd

0.1uF 16V

8.2K-5%
R515

21

34,41,57

5,17,33

VBAT

ICH_INTRUDER_N

33

SYSTEM_PWRGOOD_CHIPSET

R124

1 2

1M-5%

R193

1 2

8.2K-5%

To avoid IccRTC leakage when AUX is off

x03_sd
x03_sd

31,33,50,58

x03_sd

31
31
36
58
50
50
50
50

17

44,56

17

43

MCH_PME_N
PCI0_PERR_N

GPE_NMI_N
MCH_GPE_N

GPO_SPKR_DISABLE

+3.3V

21

R507

4.7K

R508

8.2K-5%

4.7K

1 2

R212

+3.3V+3.3V

8.2K-5%

21

44,45,50

44,45,50

44,45,50

R204

43,46

+3.3V_AUX

8.2K-5%
R93

21

PARAPORT_PRES_N

RAC_PRSNT_N

BMC_RDY_N

RAC_RDY_N

+3.3V

+3.3V

1 2

8.2K-5%
R84

1 2

1 2

33,40
33,40

KB_RST_N
KB_GATE_A20_N

Rev.
00
01
10

Comment
x00 - x02
x03
x04 - a00

x00_sd_052903

HEATSINK_PRES_N

57

8.2K-5%

+3.3V

1 2

8.2K-5%

R94

R496

8.2K-5%

11

a00_sd - change was actually made in x04 post modem

GPI_BRD_REV1

33

GPI_BRD_REV0

33

56

2.7K-5%
R506

NP*

21

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

21

1 2

2.7K-5%

NP*

R497

R505

+3.3V

21

R351

33,41,46

x00_sd_0518030

PROPAGATION_DELAY=L:S::2000

8.2K-5%

5,40,41,44,59

5,17,33

5,41,44,56,59

40

Intenral p/d not always active

2 1

8.2K-5%
R165

+3.3V

8.2K-5%

21

R533

5,40,44,55,59
5,40,44,55,59
5,40,44,55,59
5,40,44,55,59
5,40,44,55,59

R7

1 2

8.2K-5%

R1816

1 2

8.2K-5%
R210

21

8.2K-5%
R211

1 2

8.2K-5%

R91

21

8.2K-5%

+3.3V

R492

8.2K-5%

1 2

ICH_THRM

5,33

ICH_THRMTRIP_N
NC_ICH_SLP_S3_N
ICH_PWR_ON_REQ
NC_ICH_SLP_S5_N

SYSTEM_PWRGOOD_CHIPSET

ICH_VRM_PWRGD

33

ICH_PWRBTN_N
ICH_BTN_RESET_N

SIO_PME_N

3.3VAUX_PWRGOOD_ICH_ESM
NC_ICH_SUS_STAT
ICH_32K_SUSCLK_BUFF

33

ICH_VAUX_SDA

35

ICH_VAUX_SCL

35

35
35

33

3
3

3

ICH_SMLINK1_SDA
ICH_SMLINK0_SCL

ICH_INTRUDER_N
CK_14M_ICHS
CK_48M_USB_ICHS

CK_66M_ICH

AC97_BITCLK
NC_AC97_RESET_N
AC97_SYNC

34

AC97_SDATA_OUT

34

NC_NC_AC97_SDIN2
NC_AC97_SDIN1
NC_AC97_SDATA_IN

34,43

ICH_SPKR

LPC_LFRAME_N
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
SP_ICH_GPI41
LPC_LDRQ0_N

40

44,45

BMC_SMI_N

NC_ICH_SER_MODE_SEL0

NC_ICH_SER_MODE_SEL1

GPO_I2C_MUX_SEL0

35

GPO_I2C_MUX_SEL1

35

GPO_FWH_WP_N

55

GPI_PARAPORT_PRES_R

RAC_PRSNT_N
BMC_RDY_N_R
RAC_RDY_N_R
GPO_ALT_LLINE_N

7

NC_SATALED_N

4

4
34
34

CK_100M_SATA_P
CK_100M_SATA_N

NC_SATA_1_TX+
NC_SATA_1_TX-

34
34

NC_SATA_2_TX+
NC_SATA_2_TX-

34

PROPAGATION_DELAY=L:S::1000

SATA_RBIAS

SATA_1_RX+
SATA_1_RX-

SATA_2_RX+
SATA_2_RX-

ICH_LAN_RST_N

33

T2

THRM

T21

THRMTRIP

W1

SLP_S3

U2

SLP_S4

AA3

SLP_S5

AC12

PWROK

R20

VGATE/VRMPWRGD

Y4

PWRBTN

U1

SYS_RST

AB3

RI

AB13

RSMRST

AB1

SUS_STAT

Y1

SUSCLK

AD1

SMBDATA

AD2

SMBCLK

AC3

SMBALERT/GPIO11

AA2

SMLINK1

AD3

SMLINK0

Y12

INTRUDER

F20

CLK14

F24

CLK48

N22

CLK66

D8

AC_BIT_CLK

C12

AC_RST

B8

AC_SYNC

A9

AC_SDOUT

A13

AC_SDIN2

D12

AC_SDIN1

E12

AC_SDIN0

E24

SPKR

T4

LFRAME

U4

LAD3

R3

LAD2

R4

LAD1

T5

LAD0

R2

LDRQ1/GPIO41

U5

LDRQ0

R5

AGPBUSY/GPIO6

U3

GPIO7

Y2

GPIO8

W4

GPIO12

W5

GPIO13

U21

GPIO18

T20

GPIO19

U22

GPIO20

R1

GPIO21

U20

GPIO22

F22

GPIO23

AC1

GPIO24

W3

GPIO25

V3

GPIO27

W2

GPIO28

T1

GPIO32

G23

SATALED

F21

GPIO34

AC5

CLK100+

AD5

CLK100-

AC7

SATA0RX+

AD7

SATA0RX-

AA8

SATA0TX+

AB8

SATA0TX-

AC9

SATA1RX+

AD9

SATA1RX-

AA10

SATA1TX+

AB10

SATA1TX-

Y11

SATARBIAS

Y9

SATARBIAS

Series resistor

Series resistor with pull-down

Defaults high

R1890

21

0-5%

UICH_IC

INTEL ICH5 REV. 0.73

HETERO 2 OF 4

SMBus address = 44h

SMLink address = 88h

Input/Output

VAux rail
VBat rail

Open-drain

TITLE

DWG NO.

DATE

3.3VAUX_PWRGOOD_ICH_ESM

AB19

PDCS1
PDCS3

PDD15
PDD14
PDD13
PDD12
PDD11
PDD10

PDDACK
PDDREQ

PDIOR
PDIOW

PDA2
PDA1
PDA0

PDD9
PDD8
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

Y18
AC19
AD19
AA19
AB17
AA16
Y16
AC16
AA15
AD16
Y15
AD15
AB14
AD14
AC15
AA14
AC14
Y14
Y13
AB16
AC18
AC17
AD18
AA17
AA18

PIORDY

V22

SDCS1
SDCS3

SDD15
SDD14
SDD13
SDD12
SDD11
SDD10

SDDACK
SDDREQ

SDIOR
SDIOW

SDA2
SDA1
SDA0

SDD9
SDD8
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0

V20
W21
W23
W22
AA23
AB24
AC24
AB22
AA20
AC22
AD22
Y19
AC20
AB20
AC21
AB21
AD24
AD23
AB23
AA22
W20
Y20
Y23
Y22
Y21

SIORDY

LAN_RXD2
LAN_TXD2
LAN_RXD1
LAN_TXD1
LAN_RXD0
LAN_TXD0

LAN_CLK

C11
B12
C9
E9
C10
D9
E10

AA1

LAN_RST

LAN_RSTSYNC

EE_DIN

EE_DOUT

EE_CS

EE_SHCLK

D10

B11
B9
B10
A12

33,41,46

IDE_PDCS1_N
IDE_PDCS3_N
IDE_PDA2
IDE_PDA1
IDE_PDA0
IDE_PDD15
IDE_PDD14
IDE_PDD13
IDE_PDD12
IDE_PDD11
IDE_PDD10
IDE_PDD9
IDE_PDD8
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0
IDE_PDDACK_N
IDE_PDDREQ
IDE_PDIOR_N
IDE_PDIOW_N
IDE_PIORDY

NC_IDE_SDCS1_N
NC_IDE_SDCS3_N
NC_IDE_SDA2
NC_IDE_SDA1
NC_IDE_SDA0
NC_IDE_SDD15
NC_IDE_SDD14
NC_IDE_SDD13
NC_IDE_SDD12
NC_IDE_SDD11
NC_IDE_SDD10
NC_IDE_SDD9
NC_IDE_SDD8
NC_IDE_SDD7
NC_IDE_SDD6
NC_IDE_SDD5
NC_IDE_SDD4
NC_IDE_SDD3
NC_IDE_SDD2
NC_IDE_SDD1
NC_IDE_SDD0
NC_IDE_SDDACK_N
NC_IDE_SDDREQ
NC_IDE_SDIOR_N
NC_IDE_SDIOW_N
NC_IDE_SIORDY

NC_ICH_LAN_TXD0

ICH_LAN_RST_N

1 2

8.2K-5%
R686

32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32

NC_ICH_LAN_RXD2
NC_ICH_LAN_TXD2
NC_ICH_LAN_RXD1
NC_ICH_LAN_TXD1
NC_ICH_LAN_RXD0

NC_ICH_LAN_CLK

NC_ICH_LAN_SYNC

NC_ICH_EE_DIN

NC_ICH_EE_DOUT

NC_ICH_EE_CS

NC_ICH_EE_SHCLK

ROOM=ICH

ICH5 - MAIN

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE2800/2850/1850

REV.

D1660

SHEET

12/16/2004 33 OF 60

33

A03-00

+3.3V

4.7K 4.7K

+3.3V

1

1 2

R516

2

R517

21

3

4

subsys done

DCBA

1

2

3

+3.3V_AUX

33,34,41,57

X32KHZ

R892

1 2

8.2K-5%

.01uF 50V

0.1uF 16V
1 2

C683

1 2

33,34,41,57

1 4

32KHz

R677

1 2

10M-5%

12pF

50V-5%

x04b_tj_040204

C684

VBAT

21

12pF

50V-5%

ECAD Note:
Place near pin AD10

C447

A B C

R669

1 2

0.1uF 16V

C412

12

NP

VBAT

.01uF 50V

C696

C416

21

C446

2 1

0.1uF 16V

21

X

220

34

V_1P5_AUX_A

V_1P5_AUX_B

V_1P5_AUX_C

C697

21

+CPU_VTT

C661

0.1uF 16V

ICH_INTVRMEN

1 2

330K

ICH_RTCX1
ICH_RTCX2

RTCRST_N

.01uF 50V

1 2

C698

+1.5V

12

0.1uF 16V

R663

ICH_TP0
NC_ICH1
NC_ICH2

x00_tj_040803

AD10
AD11

VCCRTC

AC11

RTCX1

AB12

RTCX2

AA12

RTCRST

AB2

BATLOW/TP0

P20

DPRSLPVR

R24

DPSLP

F19

VCCSUS1_5/VCCSUS1_5_A_F19

AA4

VCCSUS1_5/VCCSUS1_5_B_AA4

AB4

VCCSUS1_5/VCCSUS1_5_B_AB4

Y5

VCCSUS1_5/VCCSUS1_5_B_Y5

F7

VCCLAN1_5/VCCSUS1_5_C_F7

F8

VCCLAN1_5/VCCSUS1_5_C_F8

AA6

VCCSATAPLL_AA6

AB6

VCCSATAPLL_AB6

E15

VCC1_5_E15

E22

VCC1_5_E22

F14

VCC1_5_F14

F15

VCC1_5_F15

H24

VCC1_5_H24

J19

VCC1_5_J19

K10

VCC1_5_K10

K12

VCC1_5_K12

K13

VCC1_5_K13

K19

VCC1_5_K19

L19

VCC1_5_L19

M15

VCC1_5_M15

N15

VCC1_5_N15

N23

VCC1_5_N23

P19

VCC1_5_P19

R6

VCC1_5_R6

R10

VCC1_5_R10

R12

VCC1_5_R12

W6

VCC1_5_W6

W7

VCC1_5_W7

W8

VCC1_5_W8

W9

VCC1_5_W9

W10

VCC1_5_W10

W11

VCC1_5_W11

W19

VCC1_5_W19

R15

V_CPU_IO_R15

R19

V_CPU_IO_R19

T19

V_CPU_IO_T19

(mobile only)

(mobile only)

INTEL ICH5 REV. 0.73

HETERO 3 OF 4

UICH_IC

VCCSUS3_3_B15INTVRMEN
VCCSUS3_3_E13
VCCSUS3_3_E14
VCCSUS3_3_E18
VCCSUS3_3_F16
VCCSUS3_3_F17
VCCSUS3_3_F18
VCCSUS3_3_K15

VCCSUS3_3_U6
VCCSUS3_3_V6

VCCLAN3_3/VCCSUS3_3_E11
VCCLAN3_3/VCCSUS3_3_F10
VCCLAN3_3/VCCSUS3_3_F11

VCC3_3_B5
VCC3_3_F6

VCC3_3_G1
VCC3_3_G19
VCC3_3_G21

VCC3_3_H6

VCC3_3_K6

VCC3_3_L6
VCC3_3_M10
VCC3_3_N10

VCC3_3_P6
VCC3_3_R13
VCC3_3_V19
VCC3_3_W15
VCC3_3_W17
VCC3_3_W24

VCC3_3_AD13
VCC3_3_AD20

V5REF_SUS

V5REF_A8
V5REF_W14
VCCUSBPLL

B15
E13
E14

E18
F16

F17
F18
K15
U6
V6

E11
F10
F11

B5
F6
G1
G19
G21
H6
K6
L6
M10
N10
P6
R13
V19
W15
W17
W24
AD13
AD20

E16
A8
W14
C24

+3.3V_AUX

+3.3V

+3.3V_AUX

3 1

D26

BAR43

V_5P0_REF_ICH

C638

1 2

+5V_AUX

C400

.01uF 50V

21

R177

C668

1uF 1K-1%

1 2

Hublink Straps

+1.5V

21

0.1uF 16V

10V-10%

+3.3V

3 1

D5

21

C685

C627

1 2

1uF

0.1uF 16V

BAR43

10V-10%

@ICH

C639

1 2

.01uF 50V

+5.0V Riser

R711

1 2

R270

1 2

R552

1 2

1K-1%

C669

R438

43.2-1%
1 2

R538

49.9-1%

1 2

MRGN_IHVR

1

1

3 4

3 4

TSM 2X2
SMT HDR

+1.5V

21

0.1uF 16V

78.7-1%

HI_VSWING_ICH

24.3-1%

2

2

NP*

1

21

C692

(804mv)

HI_VREF_ICH

(353mv)

2 1

750-1%

R208

NP01

MRGN_IHVS

1
3 4

TSM 2X2
SMT HDR

.01uF 50V

2

33

33

750-1%

R519

2
43

NP*

12

NP01

A1

A7
A10
A15
A17
A19
A21
A23
B13
B17
B19
B21
B23

C3

C8
C16
C18
C20
C22

D1

D6
D11

D16
D18
D20
D22
D24
E17
E19
E20
E21
E23

F3

F9

G6
G20
G24

H1
H19
H22

J6
J21
J23

K3
K11
K14
K20
K22
K24
L10
L11
L12
L13
L14
L15
L21
L23

M1

VSS_A1
VSS_A7
VSS_A10
VSS_A15
VSS_A17
VSS_A19
VSS_A21
VSS_A23
VSS_B13
VSS_B17
VSS_B19
VSS_B21
VSS_B23
VSS_C3
VSS_C8
VSS_C16
VSS_C18
VSS_C20
VSS_C22
VSS_D1
VSS_D6
VSS_D11
VSS_D16
VSS_D18
VSS_D20
VSS_D22
VSS_D24
VSS_E17
VSS_E19
VSS_E20
VSS_E21
VSS_E23
VSS_F3
VSS_F9
VSS_G6
VSS_G20
VSS_G24
VSS_H1
VSS_H19
VSS_H22
VSS_J6
VSS_J21
VSS_J23
VSS_K3
VSS_K11
VSS_K14
VSS_K20
VSS_K22
VSS_K24
VSS_L10
VSS_L11
VSS_L12
VSS_L13
VSS_L14
VSS_L15
VSS_L21
VSS_L23
VSS_M1

UICH_IC

INTEL ICH5 REV. 0.73

HETERO 4 OF 4

VSS_M5
VSS_M11
VSS_M12
VSS_M13
VSS_M14
VSS_M22
VSS_M24
VSS_N11
VSS_N12
VSS_N13
VSS_N14
VSS_N20

VSS_P1
VSS_P10
VSS_P11
VSS_P12
VSS_P13
VSS_P14
VSS_P15
VSS_P21
VSS_R11
VSS_R14

VSS_T3

VSS_T6
VSS_T23
VSS_U19

VSS_V1
VSS_V21
VSS_W16
VSS_W18

VSS_Y3

VSS_Y6

VSS_Y7

VSS_Y8
VSS_Y10
VSS_AA5
VSS_AA7
VSS_AA9

VSS_AA11
VSS_AA13
VSS_AA21
VSS_AA24

VSS_AB5
VSS_AB7
VSS_AB9

VSS_AB11
VSS_AB15
VSS_AB18

VSS_AC2
VSS_AC4
VSS_AC6
VSS_AC8

VSS_AC10
VSS_AC13
VSS_AC23

VSS_AD4
VSS_AD6
VSS_AD8

VSS_AD12
VSS_AD17
VSS_AD21

M5
M11
M12
M13
M14
M22
M24
N11
N12
N13
N14
N20
P1
P10
P11
P12
P13
P14
P15
P21
R11
R14
T3
T6
T23
U19
V1
V21
W16
W18
Y3
Y6
Y7
Y8
Y10
AA5
AA7
AA9
AA11
AA13
AA21
AA24
AB5
AB7
AB9
AB11
AB15
AB18
AC2
AC4
AC6
AC8
AC10
AC13
AC23
AD4
AD6
AD8
AD12
AD17
AD21

C695

21

C693

1 2

.01uF 50V

1 2

C1751

x03b_sd

D

+1.5V

21

C672

.01uF 50V

+3.3V

C662

0.1uF 16V

21

C78

C673

0.1uF 16V

1 2

0.1uF 16V

+3.3V

C443

C459

0.1uF 16V

1 2

21

C663

21

0.1uF 16V

1 2

21

C674

0.1uF 16V

C664

1 2

0.1uF 16V

C445

1 2

C442

1 2

.01uF 50V

VCCHI Decoupling

12

C450

C675

1 2

0.1uF 16V

C665

0.1uF 16V

0.1uF 16V

21

C453

0.1uF 16V

+1.5V

C449

2 1

0.1uF 16V

0.1uF 16V

21

0.1uF 16V

+3.3V_AUX

0.1uF 16V

0.1uF 16V

12-16-2004_19:51

21

C676

C666

C452

1 2

0.1uF 16V

1 2

0.1uF 16V

C677

1 2

21

C667

0.1uF 16V

21

C451

0.1uF 16V

0.1uF 16V

0.1uF 16V

21

C701

21

C703

C461

21

4.7uF

6.3V-10%

4.7uF

6.3V-10%

4.7uF

6.3V-10%

1

2

3

4

todo intel spec's say to leave nc

Unused SATA Straps

33
33
33
33

33

SATA_RBIAS

PROPAGATION_DELAY=L:S::1000

SATA_1_RX+
SATA_1_RX­SATA_2_RX+
SATA_2_RX-

R643

21

220

R646

x00c4_tj_090304

R110

33

AC97_SYNC

R36

1 2

20K-1%

C267

2 1

Reboot Strap

+3.3V

Safe Mode Strap

+3.3V

BIOS TopSwap Strap

33

SOFT_SMI

33,34,41,57

VBAT

ROOM=ICH

1K-5%

1 2

NP*

R510

1 2

2.7K-5%

ICH_SPKR

33,43

R509

1 2

2.7K-5%
NP*

AC97_SDATA_OUT

33

R35

1K-5%

1 2

NP*

SMBUS - ISO / ICH5 - PWR

RTCRST_N

1uF 6.3V

34

4

EDS says to reserve pull-down

220

R649

21

220

21

220

R647

1 2

220

R648

1 2

Res NP: TCO Timeout Reboot
Res Stuff: No Reboot

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

Res Stuff: Safe Mode
Res NP: No Safe Mode

Res Stuff: BIOS TopSwap
Res NP: No TopSwap

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004 34 OF 60

INC.

ROUND ROCK,TEXAS

REV.

A03-00

SHEET

subsys done

DCBA

1

+3.3V_AUX

R335

1 2

R338

8.2K-5%
1 2

8.2K-5%

48
48
48

48

48
48
48
48

0.1uF 16V

1 2

C186

10V-10%

1uF

C320

21

SER_SOUTA
SER_DTRA_N
SER_RTSA_N

SER_DCDA_N

SER_SINA
SER_DSRA_N
SER_CTSA_N
SER_RIA_N

B D

CA

Com1

Subbed to zero ohm

+3.3V_AUX

NC_U29_18

U29

28
24

14
13
12

19
18
17
16
15
20

23
22

1
2

C1+
C1­C2+
C2-

T1IN
T2IN
T3IN

R1OUT
R2OUT
R3OUT
R4OUT
R5OUT
R2OUTB

FORCEON
FORCEOFF

T1OUT
T2OUT
T3OUT

R1IN
R2IN
R3IN
R4IN
R5IN

INVALID

MAX3243

VCC

V+
V-

GND

26
27
3

9
10
11

4
5
6
7
8

21

NC_INVALID_A

25

SOUTA

DTRA
RTSA

DCDA

RIA
SINA
DSRA
CTSA

35
35
35

35
35
35
35
35

I/O SUPPORT BRACKET

1uF

1 2

C319

10V-10%

1uF

C318

21

10V-10%

ROOM=COMMPORT

10V-10%

1uF

C317

21

35

35

35

35

35

35

35

35

DCDA

DSRA

SINA

RTSA

SOUTA

CTSA

DTRA

RIA

50V-10%

470pF

1 2

C1008

50V-10%

470pF

50V-10%

470pF

1 2

C1009

21

C1010

50V-10%

470pF

1 2

C1007

50V-10%

470pF

C1012

21

50V-10%

470pF

50V-10%

470pF

C1011

21

x03_sd subbed to 0ohm

1 2

C1013

50V-10%

470pF

C1014

21

L82

1 2

200mA

L81

1 2

200mA

L80

1 2

200mA

L79

1 2

200mA

L78

1 2

200mA

L77

1 2

200mA

L76

1 2

200mA

L75

1 2

200mA

ADD1=ADD02_01157_SERIAL2
ADD2=ADD02_01157_SERIAL3
ADD3=ADD02_01157_SERIAL4
ADD4=ADD02_01157_SERIAL5

SUB*_30661

SUB*_30661

SUB*_30661

SUB*_30661

SUB*_30661

SUB*_30661

SUB*_30661

SUB*_30661

JACKSCREWS

ADD5=ADD02_R5767_BRKTINS

DCDA_L

DSRA_L

SINA_L

RTSA_L

SOUTA_L

CTSA_L

DTRA_L

RIA_L

35

35

35

35

35

35

35

35

35
35
35
35

35
35
35
35

35
35
35
35
35
35
35
35

NC_SERIAL_10_1U
NC_SERIAL_11_1U

DCDA_L
SINA_L
SOUTA_L
DTRA_L

DSRA_L
RTSA_L
CTSA_L
RIA_L

DCDA_L
DSRA_L
SINA_L
RTSA_L
SOUTA_L
CTSA_L
DTRA_L
RIA_L

12-16-2004_19:51

X00_GT_061203

X02_TJ_081803

SERIAL_CONN

1
2
3
4
5
6
7
8
9

RTM

DSUB

SCREW LOCK

SUB=NP02

SERIAL_CONN_1U

1

1

6

6

2

2

7

7

3

3

8

8

4

4

9

9

5

5

10

NC1

11

NC2

12

G1

13

G2

14

G3

15

G4

1

2

IO_BRACKET

1
2
3
4
5
6
7
8

BRACKET

IO CONN SUPPORT

NP13

x00_sd_061703
X00_GT_060203

GND

+5.0V Riser

.01uF 50V

1 2

C805

L66

1 2

FERRITE

1812-1.5A

x02_tj_090303

KBVCC

.01uF 50V

C806

21

16V 10%

10uF

1 2

16V 10%

C808

10uF

21

C1802

FS3

1.5A
6V

DSUB

SUB02_4U288
NP13

2

ROOM=COMMPORT

X00_tj_061603

SERIAL PORT CONNECTOR

21

KYB_FVCC

.01uF 50V

C801

21

.01uF 50V

1 2

C807

R726

1 2

0-5%

.01uF 50V

1 2

C803

.01uF 50V

C804

21

DDC_VCC

38

R6009

220

R6010

220

+3.3V_AUX

1

R352

2

59

21

59

8.2K-5%

R445

ICH_VAUX_SCL_U5

ICH_VAUX_SDA_U5

1 2

0-5%

NP*

x03b_tj_011904

C436

ICH_VAUX_SDA

ICH_SMLINK1_SDA

21

1 2

C435

100pF 50V

NP*

100pF 50V

NP*

7

9

33,35

33

U5

YA

YB

5C3253
QSOP16

SUB=SUB*_7X498

17,27,31,35

20,21,35

3,4,35

31,35,41

17,27,31,35

20,21,35

3,4,35

31,35,41

16

VCC

6

IA0

5

IA1

4

IA2

3

IA3

10

IB0

11

IB1

12

IB2

13

IB3

14

S0

2

S1

1

EA

15

EB

NP*

R82

220

ICH_SEG0_SCL
ICH_SEG1_SCL
ICH_SEG2_SCL
ICH_SEG3_SCL

ICH_SEG0_SDA
ICH_SEG1_SDA
ICH_SEG2_SDA
ICH_SEG3_SDA

ICH_SEG0_SCL
ICH_SEG1_SCL
ICH_SEG2_SCL
ICH_SEG3_SCL

ICH_SEG0_SDA
ICH_SEG1_SDA
ICH_SEG2_SDA
ICH_SEG3_SDA

21

+3.3V

R458

4.7K

1 2

17,27,31,35
20,21,35
3,4,35
31,35,41

17,27,31,35
20,21,35
3,4,35
31,35,41

21

R62

1 2

R61

2.2K-5%

sd_x00_051803 - value change

2.2K-5%

21

R459

R461

4.7K

0.1uF 16V
1 2

GPO_I2C_MUX_SEL0
GPO_I2C_MUX_SEL1

21

C34

R464

4.7K

C33

Q72

2N7002

4.7K

1 2

+3.3V_AUX

2 1

0.1uF 16V

1

G

21

R465

D

S

3

2

4.7K

R467

1 2

33
33

4.7K

R468

R469

4.7K

1 2

+3.3V_AUX

R96

1 2

21

4.7K

8.2K-5%

40

40

40

40

MSE_CLK

MSE_DATA

KB_CLK

KB_DATA

ROOM=KYBD

6

7

8

RN26

1

2

x02_sd_swapped kb and mse

8.2K

3

4 5

SUB*_99477

L73

1 2

200mA

SUB*_99477

SUB TO 120 OHM 200mA 603 FERRITE

SUB*_99477

L72

1 2

200mA

SUB*_99477

L74

1 2

200mA

L71

1 2

200mA

21

C827

C826

330pF 50V

C824

1 2

330pF 50V

21

330pF 50V

C825

MSECLK_CONN

MSEDATA_CONN

KBCLK_CONN

KBDATA_CONN

1 2

330pF 50V

50V-10%

470pF

1 2

C1015

1M-5%

.01uF 50V

R699

21

PLACE 470 PF CAPS BY CONN PINS FOR EMI

KEYBOARD/MOUSE REAR CONNECTORS

MOUSE

5
NC_PSU_1_8
NC_PSU_1_2

PROPAGATION_RULE=L:S::1000

PROPAGATION_RULE=L:S::1000

NC_PSU_2_8
NC_PSU_2_2

PROPAGATION_RULE=L:S::1000

PROPAGATION_RULE=L:S::1000

1 2

C802

50V-10%

470pF

21

C1016

REFDES=PSU_1 / PSU_2

8

2

1

6

3

MINI-DIN KMDR-6S-BS-3.20

6 POS. RT. RCPT.

KYBD

5

8

2

1

6

3

MINI-DIN KMDR-6S-BS-3.20

6 POS. RT. RCPT.

MATING FACE

5

NC

2

DAT

1

3

MATING FACE

5

NC

2

DAT

1

3

+5V

GND

+5V

GND

NC

8

3

CLK

6

NC

8

CLK

6

INC.

ROUND ROCK,TEXAS

TITLE

+3.3V_AUX

1

R340

8.2K-5%

2

ICH_VAUX_SCL

3

33,35

4 4

R444

33,35

21

0-5%

NP*

ICH_SMLINK0_SCL

+3.3V_AUX

R435

1 2

ICH_VAUX_SCL

+3.3V_AUX

21

R436

ICH_VAUX_SDA

33,35

33

x03_tj_010904

4.7K

x03_tj_010904

4.7K

x03_tj_010904

1 2

7X498 = 3.3V BUS SWITCH

SERIAL, KYBD, MOUSE, I2C MUX

SCHEM,PLN,SV,PE2800/2850/1850

subsys done

5,24,41

SYSTEM_PWRGOOD_FETS

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

DC

D1660

12/16/2004

REV.

A03-00

SHEET

35 OF 60

1

A B C

31,33,36,50,58

PCI0_AD29

D

R1205

1 2

150-5%

1

VIDEO

2

C745

21

2200pf

50V-10%

+12V

+3.3V

R512

2 1

TLV431A

53

BLM18BD601SN1

220

V_2P5_REF

D8

4

L132

21

R1886

1 2

21

16V-10%

4.7uF

1K-1%

12

16V-10%

C1734

+12V_VIDEO

2 1

4.7uF

C1735

0.1uF 16V
1 2

C1736

0.1uF 16V
C1737

21

3

2

R601

31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58

31,33,36,50,58

31,33,50,58
31,33,50,58

+3.3V

Q23

D

U26

LM358M

8

+

V

G

-

21

1

4

VR_2P5_GATE_R

C587

1 2

R576

0-5%

21

VR_2P5_GATE

ISL9N312AD3ST

R579

4.75K-1%4.75K-1%

1 2

1
G

4

40,44,46

3

S

SUB*_K0986

3

33

PCI0_AD0
PCI0_AD1
PCI0_AD2
PCI0_AD3
PCI0_AD4
PCI0_AD5
PCI0_AD6
PCI0_AD7
PCI0_AD8
PCI0_AD9
PCI0_AD10
PCI0_AD11
PCI0_AD12
PCI0_AD13
PCI0_AD14
PCI0_AD15
PCI0_AD16
PCI0_AD17
PCI0_AD18
PCI0_AD19
PCI0_AD20
PCI0_AD21
PCI0_AD22
PCI0_AD23
PCI0_AD24
PCI0_AD25
PCI0_AD26
PCI0_AD27
PCI0_AD28
PCI0_AD29
PCI0_AD30
PCI0_AD31

NC_AGP_ST0
NC_AGP_ST1
NC_AGP_ST2

CK_33M_VIDEO

PCI0_GNT_VIDEO_N

PCI_RST_PLANAR_2_N

D24

AD0

C26

AD1

D25

AD2

D26

AD3

E23

AD4

E25

AD5

E24

AD6

E26
F26
G23
G25
G24
G26
H24
H26
H25
L23
L26
L24
M26
M24
N25
M25
N26
P23
P26
P24
R25
R24
R26
T23
T25

Y26
Y23
Y25

AA26

Y24

AA23

AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

ST0
ST1
ST2

PCICLK

GNT

RST

PCI INTERFACE

SBA7/IDSEL

AGP_BUSY

STP_AGP

AD_STB_0
AD_STB_1

AGPTEST

SERIES GRAPHICS CONTROLLER

RADEON 7000M

Hetero 1 of 5

C/BE0
C/BE1
C/BE2
C/BE3

AD_ST0
AD_ST1

SB_STB

FRAME

DEVSEL

SB_STB

AGPREF

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6

PAR

REQ
INTR
IRDY

STOP
TRDY

RFB

SERR

W25
V24
V26
V23
U26
U24
T26
T24

F23
J25
L25
N23

F25
P25

J23

AA25
AA24
K26
V25
J24
K24
K25
J26

W26
AB26
AB25

U25
F24
N24

B26
C25

W24

NC_AGP_SBA0
NC_AGP_SBA1
NC_AGP_SBA2
NC_AGP_SBA3
NC_AGP_SBA4
NC_AGP_SBA5
NC_AGP_SBA6
VGA_IDSEL

PCI0_CBE0_N
PCI0_CBE1_N
PCI0_CBE2_N
PCI0_CBE3_N

NC_AGP_AD_ST0
NC_AGP_AD_ST1

PCI0_PAR

PCI0_REQ_VIDEO_N
ICH_PIRQ_VIDEO_N
PCI0_IRDY_N
NC_AGP_SB_STB
PCI0_STOP_N
PCI0_TRDY_N
PCI0_FRAME_N
PCI0_DEVSEL_N

NC_ATI_M6C8_AGP_RFB_N
NC_ATI_M6C8_AGP_AGP_BUSY_N
NC_ATI_M6C8_AGP_STP_AGP_N

NC_ATI_M6C8_AGP_SB_STB_N
NC_ATI_M6C8_AGP_AD_STB0_N
NC_ATI_M6C8_AGP_AD_STB1_N

ATI_M6C8_AGP_AGPREF
ATI_M6C8_AGP_AGPTEST

VIDEO_SERR_N

+3.3V

8.2K-5%
R1612

21

36

PROPAGATION_DELAY=L:S::1000

31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58

31,33,50,58

33
33
31,33,50,58

31,33,50,58
31,33,50,58
31,33,50,58
31,33,50,58

1 2

47-5%

NP*

R1555

0-5%

R450

12

2

New compared to RAGE-XL

3

R1887

1K-1%

R329

1 2

C1787

R1889

1 2

1 2

47K-5%

47K-5%

2200pf

R569

R365

50V-10%

21

1K-1%

VR_1P8_REF

2.49K-1%

1 2

0-5%

VR_2P5_FB

5

+

6

-

R600

1 2

2200pf

50V-10%

C753

U26

LM358M

8

V

G

4

VR_1P8_GATE_R

7

C586

21

1 2

2200pf

50V-10%

R599

1K-1%

R571

1K-1%

21

R577

1 2

0-5%

21

C752

1 2

2200pf

50V-10%

VR_1P8_GATE

R580

1 2

Q22

ISL9N312AD3ST

1
G

+2.5V Video

12

C252

1 2

D

4

3

S

SUB*_K0986

C746

0.1uF 16V0.1uF 16V

2 1

C749

C740

2 1

22uF 6.3V

x04_sd

21

R1888

330-5%

SUB*_T1839

VIDEO_SERR_N

36

3

4

0-5%

VR_1P8_FB

2200pf

50V-10%

C754

21

2200pf

R598

1 2

1K-1%

50V-10%

R570

1 2

1K-1%

C751

2200pf

50V-10%

+1.8V Video

ROOM=RADEON

21

C431

R581

1 2

330-5%

1 2

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

12

C747

C748

2 1

22uF 6.3V 22uF 6.3V

12

C743

22uF 6.3V 22uF 6.3V

x04_sd

22uF 6.3V

VIDEO

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE2800/2850/1850

REV.

D1660

SHEET

12/16/2004 36 OF 60

4

A03-00

DCBA

37,50

37,50

ATI_M6C8_TX0M

ATI_M6C8_TX0P

A B C

1 2

330-5% 330-5% 330-5% 330-5%

R1666

D

* Please see Radeon M6 specs for other strapping configurations

OPTION STRAPS

GPIO0GPIO1

AGP1X Clock Feedback

Phase Adjustment

1

2

3

37,50

37,50

37,50

37,50

37,50

37,50

ATI_M6C8_TX1M

ATI_M6C8_TX1P

ATI_M6C8_TX2M

ATI_M6C8_TX2P

ATI_M6C8_TXCM

ATI_M6C8_TXCP

+3.3V

C531

1 2

0.1uF 16V

OSCILLATOR

X4

27.0000MHz

4

3.3V

VCC

NC_X4_1

22pF 50V

1

EN

GND

NP*

ATI_M6C8_XTALOUT pin is No Connect
when Oscillator is used

C688

21

2

OUT

3

R154

121-1%

NP*

OR

CRYSTAL

21

21

1 2

R1667

R1668

R1669

21

x03c_sd removed np*

ATI_M6C8_XTALIN

21

R156

NP*

150-1%

PROPAGATION_DELAY=L:S::825

ATI_M6C8_XTALOUT

37

37

NC_ATI_M6C8_ZV_LCDDATA0
NC_ATI_M6C8_ZV_LCDDATA1
NC_ATI_M6C8_ZV_LCDDATA2
NC_ATI_M6C8_ZV_LCDDATA3
NC_ATI_M6C8_ZV_LCDDATA4
NC_ATI_M6C8_ZV_LCDDATA5
NC_ATI_M6C8_ZV_LCDDATA6
NC_ATI_M6C8_ZV_LCDDATA7
NC_ATI_M6C8_ZV_LCDDATA8
NC_ATI_M6C8_ZV_LCDDATA9
NC_ATI_M6C8_ZV_LCDDATA10
NC_ATI_M6C8_ZV_LCDDATA11
NC_ATI_M6C8_ZV_LCDDATA12
NC_ATI_M6C8_ZV_LCDDATA13
NC_ATI_M6C8_ZV_LCDDATA14
NC_ATI_M6C8_ZV_LCDDATA15
NC_ATI_M6C8_ZV_LCDDATA16
NC_ATI_M6C8_ZV_LCDDATA17
NC_ATI_M6C8_ZV_LCDDATA18
NC_ATI_M6C8_ZV_LCDDATA19
NC_ATI_M6C8_ZV_LCDDATA20
NC_ATI_M6C8_ZV_LCDDATA21
NC_ATI_M6C8_ZV_LCDDATA22
NC_ATI_M6C8_ZV_LCDDATA23
NC_ATI_M6C8_ZV_LCDCNTL0
NC_ATI_M6C8_ZV_LCDCNTL1
NC_ATI_M6C8_ZV_LCDCNTL2
NC_ATI_M6C8_ZV_LCDCNTL3

NC_ATI_M6C8_TXOUT_L0N
NC_ATI_M6C8_TXOUT_LOP
NC_ATI_M6C8_TXOUT_L1N
NC_ATI_M6C8_TXOUT_L1P
NC_ATI_M6C8_TXOUT_L2N
NC_ATI_M6C8_TXOUT_L2P
NC_ATI_M6C8_TXCLK_LN
NC_ATI_M6C8_TXCLK_LP
NC_ATI_M6C8_TXOUT_L3N
NC_ATI_M6C8_TXOUT_L3P
NC_ATI_M6C8_TXOUT_U0N
NC_ATI_M6C8_TXOUT_U0P
NC_ATI_M6C8_TXOUT_U1N
NC_ATI_M6C8_TXOUT_U1P
NC_ATI_M6C8_TXOUT_U2N
NC_ATI_M6C8_TXOUT_U2P
NC_ATI_M6C8_TXOUT_UN
NC_ATI_M6C8_TXOUT_UP
NC_ATI_M6C8_TXOUT_U3N
NC_ATI_M6C8_TXOUT_U3P

NC_ATI_M6C8_LTGIO0
NC_ATI_M6C8_LTGIO1
NC_ATI_M6C8_LTGIO2

NC_ATI_M6C8_DIGON
NC_ATI_M6C8_BLON_N

NC_ATI_M6C8_SSIN
NC_ATI_M6C8_SSOUT

ATI_M6C8_XTALIN

37

ATI_M6C8_XTALOUT

37

R48

1 2

ATI_TESTEN

1K-5%

AA4

ZV_LCDDATA_0

AB1

ZV_LCDDATA_1

AB2

ZV_LCDDATA_2

AB3

ZV_LCDDATA_3

AB4

ZV_LCDDATA_4

AC1

ZV_LCDDATA_5

AC2

ZV_LCDDATA_6

AC3

ZV_LCDDATA_7

AD1

ZV_LCDDATA_8

AD2

ZV_LCDDATA_9

AD3

ZV_LCDDATA_10

AE1

ZV_LCDDATA_11

AE2

ZV_LCDDATA_12

AF1

ZV_LCDDATA_13

AF2

ZV_LCDDATA_14

AF3

ZV_LCDDATA_15

AE3

ZV_LCDDATA_16

AF4

ZV_LCDDATA_17

AE4

ZV_LCDDATA_18

AD4

ZV_LCDDATA_19

AF5

ZV_LCDDATA_20

AE5

ZV_LCDDATA_21

AD5

ZV_LCDDATA_22

AC5

ZV_LCDDATA_23

Y4

ZV_LCDCNTL_0

AA1

ZV_LCDCNTL_1

AA2

ZV_LCDCNTL_2

AA3

ZV_LCDCNTL_3

AC8

NC_TXOUT_L0N

AD8

NC_TXOUT_L0P

AC9

NC_TXOUT_L1N

AD9

NC_TXOUT_L1P

AE8

NC_TXOUT_L2N

AF8

NC_TXOUT_L2P

AE9

NC_TXCLK_LN

AF9

NC_TXCLK_LP

AC10

NC_TXOUT_L3N

AD10

NC_TXOUT_L3P

AD11

NC_TXOUT_U0N

AC11

NC_TXOUT_U0P

AE11

NC_TXOUT_U1N

AF11

NC_TXOUT_U1P

AD12

NC_TXOUT_U2N

AC12

NC_TXOUT_U2P

AE12

NC_TXCLK_UN

AF12

NC_TXCLK_UP

AD13

NC_TXOUT_U3N

AE13

NC_TXOUT_U3P

AD7

LTGIO_0

AD6

LTGIO_1

AC7

LTGIO_2

AB10

DIGON

AB9

BLON

AE6

SSIN

AE7

SSOUT

AF25

XTALIN

AF26

XTALOUT

AC6

TESTEN

VIDEO

GPIO_13
GPIO_12
GPIO_11
GPIO_10

GPIO_9
GPIO_8
GPIO_7
GPIO_6
GPIO_5
GPIO_4
GPIO_3
GPIO_2
GPIO_1
GPIO_0

MONID_0

OUTPUT INTERFACES

MONID_1

VGADDCDATA

VGADDCCLK

STEREOSYNC

AUXWIN

DVIDDCCLK

DVIDDCDATA

COMP_B
H2SYNC
V2SYNC

CRT2DDCCLK
CRT2DDCDAT

SERIES GRAPHICS CONTROLLER

RADEON 7000M

Hetero 2 of 5

HSYNC
VSYNC

RSET

TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP

HPD

R2SET

C_R
Y_G

R
G
B

T3
T4
U1
U2
U3
V1
V2
V3
V4
W1
W2
W3
Y1
Y2

AF24
AF23
AF22
AE24
AE23

AE22

AD24
AD25

AC26
AC25

AE25
AC22

AE19
AF19
AE20
AF20
AE21
AF21
AE18
AF18

AD20
AC20

AD21

AE16
AF16
AF15
AF14
AE14
AF13

AF6
AF7

ATI_M6C8_GPIO13
ATI_M6C8_GPIO12
ATI_M6C8_GPIO11
NC_ATI_M6C8_GPIO10
NC_ATI_M6C8_GPIO9
ATI_M6C8_GPIO8
ATI_M6C8_GPIO7
ATI_M6C8_GPIO6
ATI_M6C8_GPIO5
ATI_M6C8_GPIO4
ATI_M6C8_GPIO3
ATI_M6C8_GPIO2
ATI_M6C8_GPIO1
ATI_M6C8_GPIO0

ATI_M6C8_RED
ATI_M6C8_GREEN
ATI_M6C8_BLUE
ATI_M6C8_HSYNC
ATI_M6C8_VSYNC

ATI_M6C8_RSET

NC_ATI_M6C8_MONID0
NC_ATI_M6C8_MONID1

ATI_M6C8_VGADDCDATA
ATI_M6C8_VGADDCCLK

ATI_M6C8_STEREOSYNC
NC_ATI_M6C8_AUXWIN

ATI_M6C8_TX0M
ATI_M6C8_TX0P
ATI_M6C8_TX1M
ATI_M6C8_TX1P
ATI_M6C8_TX2M
ATI_M6C8_TX2P
ATI_M6C8_TXCM
ATI_M6C8_TXCP

ATI_M6C8_DVIDDCCLK
ATI_M6C8_DVIDDCDATA

NC_ATI_M6C8_HPD

VID_RED_FRONT
VID_GREEN_FRONT
VID_BLUE_FRONT
VID_HS_FRONT
VID_VS_FRONT

VID_DDC_SCLK_FRONT
VID_DDC_SDA_FRONT

32,37
32,37
32,37

VID_RED_FRONT
VID_GREEN_FRONT
VID_BLUE_FRONT

37
37
37

37
37
37
37
37
37
37
37
37

38
38
38
38
38

R1252

1 2

499-1%

37,50
37,50
37,50
37,50
37,50
37,50
37,50
37,50

32,37
32,37
32,37
38

PROPAGATION_DELAY=L:S::500

38

38
38

1 2

75-1%

75-1%

R1288

PROPAGATION_DELAY=L:S::500

38
38

37

+3.3V

2 1

R1707

4.7K

SUB02_X6950
SUB13_C7971ATI_M6C8_R2SET

R1285

1 2

750-1%

75-1%

R1289

21

4.7K

1 2

R1290

2 1

R1706

a00_sd

50
50

= 806 ohm
= 787 ohm

GPIO6 GPIO4

10K
10K NP

10K

ATI_M6C8_STEREOSYNC

37

ATI_M6C8_GPIO12

37

ATI_M6C8_GPIO11

37

37

37

37

37

37

37

37

37

37

37

ATI_M6C8_GPIO8

ATI_M6C8_GPIO7

ATI_M6C8_GPIO6

ATI_M6C8_GPIO5

ATI_M6C8_GPIO4

ATI_M6C8_GPIO3

ATI_M6C8_GPIO2

ATI_M6C8_GPIO1

ATI_M6C8_GPIO0

ATI_M6C8_GPIO13

NP DEFAULT

NP

NP

NP

NP

GPIO2GPIO3

NP

GPIO5

VGA

ENABLE

(Default)

DISABLE

GPIO12

NP NP

AGP Clk Phase Adjust.

between X1 and X2 Clk

DEFAULT

10KNP
NP 66 MHz 3.3V PCI per Pravind

GPIO11GPIO13

NP

1 2

NP

1 2

NP

NP

1 2

NP

NP

2 1

NP

2 1

NP

NP

2 1

NP

R4524

NP

BUS_TYPE

33 MHz 3.3V PCI

GPIO8GPIO7

NP NORMAL OP.

10K SHUTDOWN

ROM IDENTIFIER

No ROM

+3.3V

R1263

8.2K-5%

8.2K-5%

8.2K-5%

8.2K-5%

8.2K-5%

8.2K-5%

8.2K-5%

8.2K-5%

8.2K-5%

8.2K-5%

8.2K-5%

8.2K-5%

27K

X

R1265

X

R1266

21

X

R1267

X

R1268

21

X

R1275

12

R1273

12

X

R1274

R1272

X

R1271

12

X

R1270

X

R1269

12

X

21

X

ID DESABLE

x02_sd_added alternate strappings

R4512

27K

R4513

1 2

27K

R4514

27K

R4515

1 2

27K

R4516

27K

R4517

NP

1 2

27K

R4518

27K

R4519

NP

1 2

27K

R4520

27K

R4521

1 2

27K

R4522

27K

R4523

1 2

27K

R1264

21

21

21

X

21

X

21

21

21

1

2

3

4

x02_tj_081803

C689

21

22pF 50V

R574

1 2

X2

1M-5%

SUB*_C1896

Subbed to 27MHz

1 2

todo not the correct cyrstal

25MHz-30ppm

ATI_M6C8_XTALIN

PROPAGATION_DELAY=L:S::825

37

SUB*_T1839

RADEON REFDES = VIDEO

VIDEO

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

8.2K-5%

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE2800/2850/1850

REV.

D1660

SHEET

12/16/2004 37 OF 60

DCBA

4

A03-00

A B C

PRIMARY CRT

D

1

2

3

37

37

+3.3V

x02_tj_090303

12

C188

0.1uF 16V

ATI_M6C8_HSYNC

PROPAGATION_DELAY=L:S::1450

ATI_M6C8_VSYNC

PROPAGATION_DELAY=L:S::1450

+5.0V Riser

R1145

4.7K

0-5%

NP*

12

R1144

12

C1310

22uF 6.3V

C670

21

37

PROPAGATION_DELAY=L:S::1000

37

PROPAGATION_DELAY=L:S::1000

x03b_sd

330pF 50V

2 1

ROOM=VIDEO_CONN

+3.3V

12

0.1uF 16V

PROPAGATION_DELAY=L:S::1000

C189

1 2

0.1uF 16V

VID_HS_FRONT

VID_VS_FRONT

C169

L124

1 2

FERRITE

1206

SUB*_27KDT

SUB*_27KDT
Subbed to LCX

SUB*_27KDT
Subbed to LCX

+3.3V

P3V3_VIDEO_SYNC

2

SUB*_27KDT
Subbed to LCX

5

Subbed to LCX

9

12

2N7002

14

14

14

14

ATI_M6C8_RED

37

ATI_M6C8_GREEN

37

ATI_M6C8_BLUE

37

U1
74VHC125

3

1

U1
74VHC125

6

4

U1
74VHC125

8

10

U1
74VHC125

11

13

75-1%

75-1%75-1%

PROPAGATION_DELAY=L:S::500

PROPAGATION_DELAY=L:S::500

PROPAGATION_DELAY=L:S::500

PROPAGATION_DELAY=L:S::500

1 2

1K-5%

37

R1300

+3.3V

ATI_M6C8_VGADDCDATA

1 2

R11

1 2

R10

1 2

R9

R145

1 2

33-5%

R146

1 2

33-5%

+5.0V Riser

L10

300mA

PROPAGATION_RULE=L:S::1000

L11

300mA

PROPAGATION_RULE=L:S::1000

L12

300mA

PROPAGATION_RULE=L:S::1000

PROPAGATION_DELAY=L:S::10000

50V-5%

47pF

PROPAGATION_DELAY=L:S::10000

50V-5%

47pF

R1292

33-5%

R1291

1 2

33-5%

2 1

4.7K

0-5%

R1147

NP*

2 1

R1146

21

C332

21

C330

21

C331

NP

21

X

NP

1 2

X

VID_HS_OUT_FRONT

21

VID_VS_OUT_FRONT

x03b_sd

330pF 50V

12

C246

C596

C170

2.2pF

2.2pF

2.2pF

L8

200mA

L7

200mA

1 3

50V-5%

50V-5%

50V-5%

x02_sd

1 2

1 2

1 2

1 2

1 2

NP* D78

L15

68nH 300mA

L14

68nH 300mA

L13

68nH 300mA

50V-5%

50V-5%

35,38

+3.3V

21

R1287

BAR43

35,38

47pF

47pF

4.7K4.7K

21

21

21

C245

21

1 2

C597

32

32

DDC_VCC

G

S
2

DDC_VCC

PROPAGATION_DELAY=L:S::1000

PROPAGATION_DELAY=L:S::1000

2N7002

Q58

1

VIDEO

NC_ATI_M6_DQ0
NC_ATI_M6_DQ1
NC_ATI_M6_DQ2
NC_ATI_M6_DQ3
NC_ATI_M6_DQ4
NC_ATI_M6_DQ5
NC_ATI_M6_DQ6
NC_ATI_M6_DQ7
NC_ATI_M6_DQ8
NC_ATI_M6_DQ9
NC_ATI_M6_DQ10
NC_ATI_M6_DQ11

X02_TJ_081803

38

R_OUT
G_OUT
B_OUT

NC_VGA4

.01uF 50V

D
3

C1311

1 2

38

38

R1255

1 2

2.2K-5%

DDC_DATA

PROPAGATION_RULE=L:S::1000

38

R1254

1 2

49.9-1%

DDC_OUT_SDA

DDC_OUT_SCLK

PROPAGATION_DELAY=L:S::1000

38
38
38

38

35,38

38
38
38
38

38

NC_VGA11

HS_OUT
VS_OUT

R_OUT
G_OUT
B_OUT
NC_VGA4_1U

DDC_VCC

NC_VGA11_1U
DDC_OUT_SDA
HS_OUT
VS_OUT
DDC_OUT_SCLK

38

NC_VGA1_16
NC_VGA1_17

VGA_CONN

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15

DSUB_VGA

SCREW LOCK

NP02

DDC

X00_GT_061203

10
11
12
13
14
15

16
17

18
19
20
21

SUB02_6U084
NP13

X00_tj_061603

VGA_CONN_1U

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9
10
11
12
13
14
15

NC1
NC2

G1
G2
G3
G4

DSUB

NC_ATI_M6_DQ12
NC_ATI_M6_DQ13
NC_ATI_M6_DQ14
NC_ATI_M6_DQ15
NC_ATI_M6_DQ16
NC_ATI_M6_DQ17
NC_ATI_M6_DQ18
NC_ATI_M6_DQ19
NC_ATI_M6_DQ20
NC_ATI_M6_DQ21
NC_ATI_M6_DQ22
NC_ATI_M6_DQ23
NC_ATI_M6_DQ24
NC_ATI_M6_DQ25
NC_ATI_M6_DQ26
NC_ATI_M6_DQ27
NC_ATI_M6_DQ28
NC_ATI_M6_DQ29
NC_ATI_M6_DQ30
NC_ATI_M6_DQ31
NC_ATI_M6_DQ32
NC_ATI_M6_DQ33
NC_ATI_M6_DQ34
NC_ATI_M6_DQ35
NC_ATI_M6_DQ36
NC_ATI_M6_DQ37
NC_ATI_M6_DQ38
NC_ATI_M6_DQ39
NC_ATI_M6_DQ40
NC_ATI_M6_DQ41
NC_ATI_M6_DQ42
NC_ATI_M6_DQ43
NC_ATI_M6_DQ44
NC_ATI_M6_DQ45
NC_ATI_M6_DQ46
NC_ATI_M6_DQ47
NC_ATI_M6_DQ48
NC_ATI_M6_DQ49
NC_ATI_M6_DQ50
NC_ATI_M6_DQ51
NC_ATI_M6_DQ52
NC_ATI_M6_DQ53
NC_ATI_M6_DQ54
NC_ATI_M6_DQ55
NC_ATI_M6_DQ56
NC_ATI_M6_DQ57
NC_ATI_M6_DQ58
NC_ATI_M6_DQ59
NC_ATI_M6_DQ60
NC_ATI_M6_DQ61
NC_ATI_M6_DQ62
NC_ATI_M6_DQ63

A26
B25
A25
A24
B23
A23
C22
B22
C21
B21
A21
D20
C20
B20
A20
C19
B18
A18
C17
B17
A17
D16
C16
B16
B15
A15
D14
C14
B14
A14
D13
C13

B1
C1
C2
D1
D2
E1
E2
F1
G2
G3
H1
H2
H3
J1
J2
J3
L1
L2
L3
L4
M1
M2
M3
N1
N4
P1
P2
P3
P4
R1
R2
R3

DQ_0
DQ_1
DQ_2
DQ_3
DQ_4
DQ_5
DQ_6
DQ_7
DQ_8
DQ_9
DQ_10
DQ_11
DQ_12
DQ_13
DQ_14
DQ_15
DQ_16
DQ_17
DQ_18
DQ_19
DQ_20
DQ_21
DQ_22
DQ_23
DQ_24
DQ_25
DQ_26
DQ_27
DQ_28
DQ_29
DQ_30
DQ_31
DQ_32
DQ_33
DQ_34
DQ_35
DQ_36
DQ_37
DQ_38
DQ_39
DQ_40
DQ_41
DQ_42
DQ_43
DQ_44
DQ_45
DQ_46
DQ_47
DQ_48
DQ_49
DQ_50
DQ_51
DQ_52
DQ_53
DQ_54
DQ_55
DQ_56
DQ_57
DQ_58
DQ_59
DQ_60
DQ_61
DQ_62
DQ_63

MEMORY INTERFACE

SERIES GRAPHICS CONTROLLER

RADEON 7000M

Hetero 3 of 5

SUB*_T1839

todo ask pravind, i'm not sure this is sufficiently strong

DQM_0
DQM_1
DQM_2
DQM_3
DQM_4
DQM_5
DQM_6
DQM_7

ROMCS

CLK0_IN

CLK0

CLK0_IN

CLK1

CLK1_IN

CLK1_IN

CLKFB

MEMVMODE

A_0
A_1
A_2
A_3
A_4
A_5
A_6
A_7
A_8

A_9
A_10
A_11
A_12
A_13

QS_0
QS_1
QS_2
QS_3
QS_4
QS_5
QS_6
QS_7

RAS

CAS

WE

CS_0

CS_1

CKE

CLK0

CLK1

VREF

B13
A13
C12
B12
A12
D11
C11
B11
A11
C10
B10
A10
D9
C9

A22
D21
A16
C15
F2
G1
N2
N3

A19
B19
D18
C18
J4
K1
K2
K3

A9

C8

D8

B9

B8

A8

Y3

A6

ATI_MEM_CLK_R

A7

B6

ATI_MEM_CLK_N_R

B7

A4
A5

B4

B5

B3

T2

T1

NC_ATI_M6_MA0
NC_ATI_M6_MA1
NC_ATI_M6_MA2
NC_ATI_M6_MA3
NC_ATI_M6_MA4
NC_ATI_M6_MA5
NC_ATI_M6_MA6
NC_ATI_M6_MA7
NC_ATI_M6_MA8
NC_ATI_M6_MA9
NC_ATI_M6_MA10
NC_ATI_M6_MA11
NC_ATI_M6_MA12
NC_ATI_M6_MA13

NC_ATI_M6_DQM0_N
NC_ATI_M6_DQM1_N
NC_ATI_M6_DQM2_N
NC_ATI_M6_DQM3_N
NC_ATI_M6_DQM4_N
NC_ATI_M6_DQM5_N
NC_ATI_M6_DQM6_N
NC_ATI_M6_DQM7_N

NC_ATI_M6_QS0
NC_ATI_M6_QS1
NC_ATI_M6_QS2
NC_ATI_M6_QS3
NC_ATI_M6_QS4
NC_ATI_M6_QS5
NC_ATI_M6_QS6
NC_ATI_M6_QS7

NC_ATI_M6_RAS_N

NC_ATI_M6_CAS_N

NC_ATI_M6_WE_N

NC_ATI_M6_CS0_N

NC_ATI_M6_CS1_N

NC_ATI_M6_CKE

NC_ATI_M6_ROMCS_N

NC_ATI_M6_CLK1
NC_ATI_M6_CLK1_IN

NC_ATI_M6_CLK1_N

NC_ATI_M6_CLK_IN_N

NC_ATI_M6_CLKFB

+1.8V Video +2.5V Video

R615

12

4.7K

R143

33-5%

R144

33-5%

0.1uF 16V

21

ATI_MEM_CLK

21

ATI_MEM_CLK_N

1 2

C187

PROPAGATION_DELAY=L:S::400
PROPAGATION_DELAY=L:S::400

Prop rules for clock feedbacks

PROPAGATION_DELAY=L:S::400
PROPAGATION_DELAY=L:S::400

x00_sd_052303

R1277

21

PROPAGATION_DELAY=L:S::750

1 2

1K-1%1K-1%

R1276

1

2

3

4

VID_DDC_SCLK_FRONT

37

VID_DDC_SDA_FRONT

37

x03c_sd added diodes

D76NP*

D77NP*

31

G

4.7K

R1301

1 2

+3.3V

21

4.7K

R1302

BAR43 BAR43

1 3

1

S
2

G

1

S
2

BAR43

Q59

D
3

D80

2N7002

1 3

Q60

BAR43

D
3

D81

31

pull-ups on control panel

VID_DDC_OUT_SCLK_FRONT

37

pull-ups on control panel

ATI_M6C8_VGADDCCLK

VID_DDC_OUT_SDA_FRONT

32

32

D79NP*

+3.3V

31

G

R1286

BAR43

1 2

S
2

D82

BAR43

2N7002

1

D83

1 3

BAR43

31

Q57

X04_tj_031904

21

21

R1256

D
3

2.2K-5%

DDC_SCLK

R1253

49.9-1%

VIDEO

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE2800/2850/1850

REV.

D1660

SHEET

12/16/2004 38 OF 60

4

A03-00

DCBA

B D

CA

12-16-2004_19:51

1

2

3

A1
B2
C3
C4
D3
D4
D5
E4
E5

F5
K10
K11
K12
K13
K14
K15
K16
K17
L10
L11
L12
L13
L14
L15
L16
L17
M10
M11
M12
M13
M14
M15
M16
M17
N10
N11
N12
N13
N14
N15
N16
N17
P10
P11
P12
P13
P14
P15
P16
P17
R10
R11
R12
R13
R14
R15
R16
R17
T10
T11
T12
T13
T14
T15
T16
T17
U10
U11
U12
U13
U14
U15
U16
U17

VIDEO

VSS_A1
VSS_B2
VSS_C3
VSS_C4
VSS_D3
VSS_D4
VSS_D5
VSS_E4
VSS_E5
VSS_F5
VSS_K10
VSS_K11
VSS_K12
VSS_K13
VSS_K14
VSS_K15
VSS_K16
VSS_K17
VSS_L10
VSS_L11
VSS_L12
VSS_L13
VSS_L14
VSS_L15
VSS_L16
VSS_L17
VSS_M10
VSS_M11
VSS_M12
VSS_M13
VSS_M14
VSS_M15
VSS_M16
VSS_M17
VSS_N10
VSS_N11
VSS_N12
VSS_N13
VSS_N14
VSS_N15
VSS_N16
VSS_N17
VSS_P10
VSS_P11
VSS_P12
VSS_P13
VSS_P14
VSS_P15
VSS_P16
VSS_P17
VSS_R10
VSS_R11
VSS_R12
VSS_R13
VSS_R14
VSS_R15
VSS_R16
VSS_R17
VSS_T10
VSS_T11
VSS_T12
VSS_T13
VSS_T14
VSS_T15
VSS_T16
VSS_T17
VSS_U10
VSS_U11
VSS_U12
VSS_U13
VSS_U14
VSS_U15
VSS_U16
VSS_U17

GROUND & CORE POWER

SERIES GRAPHICS CONTROLLER

RADEON 7000M

Hetero 4 of 5

PVDD
PVSS

LVDDR_AC13
LVDDR_AD14
LVSSR_AB13
LVSSR_AC14

LPVDD
LPVSS

TXVDDR_AC19
TXVDDR_AD19
TXVSSR_AC18
TXVSSR_AD18
TXVSSR_AD17

TPVDD
TPVSS

A2VDD

A2VDDQ
A2VSSN_1
A2VSSN_2

A2VSSQ

AVDD
AVSSN
AVSSQ

MPVDD
MPVSS

VDDRH

NET_PHYSICAL_TYPE=PWR

AE26
AD26

AC13
AD14
AB13
AC14

AE10
AF10

AC19
AD19
AC18
AD18
AD17

AE17
AF17

AD16
AD15
AC15
AC16
AE15

AD23
AD22
AC21

A2
A3

C5

Place all filter components close to Radeon 7000-M

ATI_TXVDDR NET_PHYSICAL_TYPE=PWR

ATI_TPVDD

ATI_A2VDD
ATI_A2VDDQ

ATI_AVDD

ATI_MPVDD

ATI_VDDRH

ATI_PVDD

NET_PHYSICAL_TYPE=PWR

NET_PHYSICAL_TYPE=PWR

NET_PHYSICAL_TYPE=PWR

0.1uF 16V

21

NET_PHYSICAL_TYPE=PWR

NET_PHYSICAL_TYPE=PWR

C1788

10uF 6.3V

C1789

21

NET_PHYSICAL_TYPE=PWR

C196

0.1uF 16V

C193

1 2

C1605

C194

C192

C191

C1790

0.1uF 16V
1 2

10uF 6.3V

1 2

1 2

0.1uF 16V0.1uF 16V
1 2

0.1uF 16V
1 2

0.1uF 16V
1 2

0.1uF 16V
1 2

10uF 6.3V

C1791

10uF 6.3V 10uF 6.3V 10uF 6.3V 10uF 6.3V 10uF 6.3V

21

21

1 2

21

1 2

1 2

C254

C253

C255

C324

C426

C427

L45

BLM21A601S

L133

1 2

BLM21A601S

L134

BLM21A601S

L46

BLM21A601S

L44

BLM21A601S

L43

BLM21A601S

L42

BLM21A601S

L41

BLM21A601S

+1.8V Video

21

21

21

21

21

21

21

+2.5V Video

+2.5V Video

+3.3V

D7
E6
E7

E9
E11
E13
E14
E16
E18
E20
E21

G5

H4

J5

K4

L5

M4

N5

P5

R4

T5

U4

V5

W4

Y5
AA5
AB5
AB6

AB15
AB16
AB18
AB20
AB21
AB22

AC4

AC17
AC23
AC24

C7
C23
D10
D12
D17

E3

F4

B24

C6

D6
D15
D19
D22

G4

F3

VDDR1_D7
VDDR1_E6
VDDR1_E7
VDDR1_E9
VDDR1_E11
VDDR1_E13
VDDR1_E14
VDDR1_E16
VDDR1_E18
VDDR1_E20
VDDR1_E21
VDDR1_G5
VDDR1_H4
VDDR1_J5
VDDR1_K4
VDDR1_L5
VDDR1_M4
VDDR1_N5
VDDR1_P5
VDDR1_R4

VDDR3_T5
VDDR3_U4
VDDR3_V5
VDDR3_W4
VDDR3_Y5
VDDR3_AA5
VDDR3_AB5
VDDR3_AB6
VDDR3_AB15
VDDR3_AB16
VDDR3_AB18
VDDR3_AB20
VDDR3_AB21
VDDR3_AB22
VDDR3_AC4
VDDR3_AC17
VDDR3_AC23
VDDR3_AC24

VDDM_C7
VDDM_C23
VDDM_D10
VDDM_D12
VDDM_D17
VDDM_E3
VDDM_F4

VDDQM_B24
VDDQM_C6
VDDQM_D6
VDDQM_D15
VDDQM_D19
VDDQM_D22
VDDQM_G4
VDDQM_F3

VIDEO

I\O POWER

VDDC_E8
VDDC_E10
VDDC_E12
VDDC_E15
VDDC_E17
VDDC_E19

VDDC_H5
VDDC_H22

VDDC_K5
VDDC_K22

VDDC_M5
VDDC_M22

VDDC_R5
VDDC_R22

VDDC_U5
VDDC_U22

VDDC_W5
VDDC_W22
VDDC_AB7
VDDC_AB8

VDDC_AB11
VDDC_AB12
VDDC_AB14
VDDC_AB17
VDDC_AB19

VDDP_C24
VDDP_D23
VDDP_E22
VDDP_F22
VDDP_G22
VDDP_H23
VDDP_J22
VDDP_K23
VDDP_L22
VDDP_M23
VDDP_N22
VDDP_P22
VDDP_R23
VDDP_T22
VDDP_U23
VDDP_V22
VDDP_W23
VDDP_Y22

VDDP_AA22
VDDP_AB23
VDDP_AB24

E8
E10
E12
E15
E17
E19
H5
H22
K5
K22
M5
M22
R5
R22
U5
U22
W5
W22
AB7
AB8
AB11
AB12
AB14
AB17
AB19

C24
D23
E22
F22
G22
H23
J22
K23
L22
M23
N22
P22
R23
T22
U23
V22
W23
Y22
AA22
AB23
AB24

+1.8V Video

+3.3V

ATI RADEON M6C8 POWER DECOUPLING

- Place evenly around ASIC or as close as possible to it
and preferably underneath the ASIC on the bottom side

of PCB

- Avoid placing decoupling caps to connecor pins with
long traces (>25mils), instead, place caps as close

as possible and tie directly to power plane with short traces

- Each CAP should have its own POWER/GND pair, avoid sharing vias.

ROOM=RADEON_CAP

+1.8V Video

21

1 2

1 2

C198

C205

C217

0.1uF 16V
1 2

C199

0.1uF 16V

C206

21

0.1uF 16V

C218

21

0.1uF 16V
C200

21

1 2

C207

0.1uF 16V0.1uF 16V

1 2

C219

1uF 6.3V

1uF 6.3V 0.1uF 16V

C632

21

1 2

C235

C220

21

1uF 6.3V

22uF 6.3V

0.1uF 16V

0.1uF 16V
C221

21

+2.5V Video

0.1uF 16V

1 2

C201

+3.3V

0.1uF 16V

1 2

C213

0.1uF 16V
1 2

C70

0.1uF 16V

C202

21

0.1uF 16V

C214

21

0.1uF 16V
C71

21

0.1uF 16V

1 2

C203

0.1uF 16V

1 2

C215

0.1uF 16V
1 2

C197

0.1uF 16V

C204

21

0.1uF 16V

C216

21

0.1uF 16V

0.1uF 16V

0.1uF 16V

1 2

21

C233

C434

1 2

C222

1uF 6.3V

21

1uF 6.3V

21

C234

x02_tj_090303

22uF 6.3V

C251

C468

21

1

2

3

22uF 6.3V

C612

21

SERIES GRAPHICS CONTROLLER

RADEON 7000M

Hetero 5 of 5

SUB*_T1839

4 4

RADEON REFDES = VIDEO

TITLE

INC.

ROUND ROCK,TEXAS

VIDEO

SCHEM,PLN,SV,PE2800/2850/1850

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

DC

D1660

12/16/2004

REV.

A03-00

SHEET

39 OF 60

B D

CA

1

32

IDE_PRST_N

x03c_sd

R166

1 2

33-5%

IDE_PRST_N_R

PROPAGATION_DELAY=L:S::2000

40

22uF 6.3V

1 2

C593

22uF 6.3V

C592

21

0.1uF 16V
C149

21

0.1uF 16V
1 2

C148

0.1uF 16V

C145

21

0.1uF 16V 0.1uF 16V
C147

21

1 2

C144

0.1uF 16V
1 2

C146

0.1uF 16V

C456

21

+3.3V

+3.3V_AUX

1

2

3

5,40,46

5,40,46

+3.3V_AUX

1413U58

CPLD_TCK

VHC14

12

50V-10%

220pF

CPLD_TCK_N

R139

33-5%

NP*

C172

21

x00_sd_052203
x00_sd_052203

x03c_sd

+3.3V_AUX

1413U38

12

CPLD_TCK_RISER_RCPLD_TCK

VHC14

+3.3V_AUX

146U38

5

VHC14

21

5,32

5,31,32,46

41,59

41,59

3/28 BMC_RESET_N ROUTED DIRECTLY TO DS1818 OUTPUT...REMOVE FROM PULLUP
RAC_PRSNT_N has p/u on BMC page

+3.3V_AUX

CPLD_TCK_R
CPLD_TDO
CPLD_TDI

5

CPLD_TMS
BMC_RESET_N_SIO

40

DISABLE_ETHERNET_1_N

40

DISABLE_ETHERNET_2_N

40

BMC_IRQ_N

44

GPI_EN_PASSWD_N

41

GPI_FVS_2_N
GPI_NVRAM_CLR_N

41

GPI_FVS_1_N

1 2

8.2K-5%
R95

CPLD_TCK_BP_R

NP*

R1315

33-5%

R1316

1 2

33-5%

+3.3V

21

8

RN65

1

CPLD_TCK_RISER

6

7

8.2K

2

3

4 5

CPLD_TCK_BP

8.2K-5%

1 2

R1713

1 2

R1792

31

32

+3.3V

NP*

Depop'ed for 374 support

8.2K-5%

x00_sd_052203

R1665

x03c_sd

x00_sd_051803 changed p/u to p/d

21

R1714

8.2K-5%

1 2

+3.3V_AUX

8

RN71

8.2K-5%
1

6

7

2

3

PU_LPCPD_N

8.2K

4 5

44,46

33

+3.3V_AUX

1 2

8.2K-5%

+3.3V

+3.3V

1

RN66

2
3

40

if 0-ohm is depopped, pop resistor on pg. 46

BMC_MD1

SIO_PME_N

+3.3V_AUX

1

RN68

2
3
4 5

8.2K

PROPAGATION_DELAY=L:S::1500

8.2K

8
7
6

8

RN64

1

R424

0-5%

R1703

7

2

6

3

8
7
6
54

21

x03_sd - add p/d's
x03b_sd - changed to 3.3vaux per nat

8.2K-5%

21

54

8.2K

SIO_VSB5_PD

SP_RN66_5

8

RN63

1

R1702

X03b_GT_012204

6

7

2

3

4 5

33

36,44,46

40

5,33,41,44,59

5,33,44,55,59
5,33,44,55,59
5,33,44,55,59
5,33,44,55,59

5,33,44,55,59

8.2K

CK_32K_VAUX_SIO
CK_14M_SIO

3

NC_SIO_HD
NC_SIO_PHD
NC_SIO_SHD
NC_SIO_SCHD

SIO_REF5V
SIO_REF5V_STBY

PCI_RST_PLANAR_2_N
IDE_PRST_N_R

NC_SIO_FPRST
NC_SIO_RSMRST

NC_SIO_BKFD_CUT
NC_SIO_LTCH_BF_CUT
NC_SIO_SCK_BJT_GATE

40

ICH_PWR_ON_REQ

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CK_33M_SIO

3

33

5,55

40
33
33

LPC_LDRQ0_N
LPC_LFRAME_N
PCI_RST_SIO_FWH_N
PU_LPCPD_N
SERIRQ
KB_GATE_A20_N

SP_IDE_RSTDRV_N

NC_SIO_GRN_LED
NC_SIO_YLW_LED

NC_SIO_PSON_N

NC_SIO_PG3V

1 2C429

1uF

10V-10%

NC_SIO_102

91

CLOCKI32

65

CLOCKI14

66

HD_LED

67

PRIMARY_HD

68

SECONDARY_HD

69

SCSI

70

REF5V

72

REF5V_STBY

73

PCIRST_OUT

74

PCIRST_OUT2

75

FPRST

92

RSMRST

77

BKFD_CUT

79

LATCHED_BF_CUT

80

SCK_BJT_GATE

87

SMB1_SCL

89

SMB1_SDA

88

MDTX/SMB2_SCL

90

MDRX/SMB2_SDA

94

GRN_LED

95

YLW_LED

81

PSON

82

PWRGD_PS

83

CPU_PRESENT

84

PWRGD_3V

85

SLPS3

86

SLPS5

62

LAD0

61

LAD1

59

LAD2

57

LAD3

55

PCI_CLK

54

LDRQ

56

LFRAME

63

PCI_RESET

52

LPCPD

53

SERIRQ

5

GA20

97

VCORF

99

SIOPME

100

AUD_LINK_RST

101

CDC_DWN_ENAB*/GPIO14

102

CDC_DWN_RST

103

GPIOE00

104

GPIOE01/FANTACH3

105

GPIOE02

106

GPIOE03/FANPWM1

108

GPIOE4/FANPWM2

109

GPIOE5/FANPWM3

111

GPIOE6/FANTACH1

112

GPIOE7/FANTACH2

113

3V_DDCSCL/GPIOE13/JYABT0

114

5V_DDCSCL/GPIOE11/JYABT1

115

3V_DDCSDA/GPIOE12/JYBBT0

116

5V_DDCSDA/GPIOE10/JYBBT1

123

JYAX

117

JYAY

118

JYBX

120

JYBY

64

IDE_RSTDRV

U8

DTR1*_BOUT1/XOR_OUT/BADDR*

PC87373

SUB*_Y4620

40

SIO_VSB5_PD

VDD3_31
VDD3_49
VDD3_60

VSB5_71
VSB3_76
VSB3_93

VSB3_107

SOUT1/TEST

RTS1/TRIS

DTR2*/BOUT2

STB/WRITE

BUSY/WAIT*

AFD/DSTRB

SLIN/ASTRB

VSS_110

VDD3_6

VBAT

DSKCHG

INDEX

DR0

MTR0

DIR

STEP
WDATA
WGATE

TRK0

WP
RDATA
HDSEL

DENSEL
DRATE0

SIN1

CTS1
DSR1
DCD1

RI1

SOUT2

RTS2

SIN2
CTS2
DSR2
DCD2

RI2

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
ACK

PE

SLCT

ERR

INIT

KBDAT
KBCLK

MDAT
MCLK

KBRST

VSS_8

VSS_29
VSS_46
VSS_58
VSS_78
VSS_96

6
31
49
60
98
71
76
93
107

9
20
18
19
17
16
15
14
13
12
11
10
22
21

27
26
25
30
28
24
23
32

122
125
127
121
126
124
128
119

51
44
43
42
41
40
39
38
37
36
35
34
33
50
45
48
47

4
3
2
1
7

8
29
46
58
78
96
110

8.2K-5% 8.2K-5%

NC_SER_SOUTB
NC_SER_RTSB
NC_SER_DTRB
SER_SINB
SER_CTSB
SER_DSRB
SER_DCDB
SER_RIB

RPRN_STB_N
RPRN_PD0
RPRN_PD1
RPRN_PD2
RPRN_PD3
RPRN_PD4
RPRN_PD5
RPRN_PD6
RPRN_PD7
RPRN_ACK_N
RPRN_BUSY
RPRN_PE
RPRN_SLCT
RPRN_AFD_N
RPRN_ERR_N
RPRN_INIT_N
RPRN_SLIN_N

KB_DATA
KB_CLK
MSE_DATA
MSE_CLK
KB_RST_N

R499

21

1 2

R498

NP*

0.1uF 16V
1 2

C1200

4 5

8.2K

43
43
43
43
43
43
43
43
43
43
43
43
43
43
43
43
43

35
35
35
35
33

3

6

+3.3V

1

2

RN75

7

8

NC_RN75_8

1K

x00_sd_061203 - vcc changed to +5vriser

3

2

1

RN67

8

7

6

54

NC_FLP_DRATE0

+3.3V +3.3V_AUX

3

2

1K

7

6

54

+5.0V Riser

1K-1%

1

RN23

8

21

R108

1K-1%

0.1uF 16V

1 2

R268

1 2

C150

FLP_DSKCHG_N
FLP_INDEX_N
FLP_DR0_N
FLP_MTR0_N
FLP_DIR_N
FLP_STEP_N
FLP_WDATA_N
FLP_WGATE_N
FLP_TRK0_N
FLP_WP_N
FLP_RDATA_N
FLP_HDSEL_N
FLP_DENSEL

SIO_SOUTA
SIO_RTSA_N
SIO_SINA
SIO_DTRA_N
SIO_CTSA_N
SIO_DSRA_N
SIO_DCDA_N

SIO_RIA_N

32,40,59
32,40
32
32
32
32
32
32
32,40
32,40
32,40
32
32

48
48
48
48
48
48
48
48

ROOM=SIO

21

R1015

21

330pF 50V

C1675

49.9-1%

330pF 50V

49.9-1%

AC termination to solve overshoot/undershoot issue.

No p/d on BADDR sets I/O range to 2E-2F

21

1 2

R1014

330pF 50V

C1674

49.9-1%

C1673

21

R1013

21

x03b_sd

330pF 50V

21

1 2

49.9-1%
R1012

330pF 50V

C1672

49.9-1%

FLP_WP_N
FLP_TRK0_N
FLP_DSKCHG_N
FLP_INDEX_N
FLP_RDATA_N

C1671

21

R1011

21

32,40
32,40
32,40,59
32,40
32,40

2

3

R99

44,46

4 4

BMC_RESET_N

NOTE: One and only one of resistors should be populated at a time

1 2

0-5%

BMC_RESET_N_SIO

40

DISABLE_ETHERNET_1_N

40

DISABLE_ETHERNET_2_N

40

+3.3V_AUX

148U61

9

VHC14

1411U61

10

VHC14

x00_sd_052303

DISABLE_ETHERNET_1

DISABLE_ETHERNET_2

24

25

+3.3V_AUX

0.1uF 16V
1 2

C1750

x00_gt_061803

Sub'ed to PC8374

x03c_sd

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

SUPER I/O

INC.

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

ROUND ROCK,TEXAS

REV.

A03-00

SHEET

40 OF 60

subsys done

A B

DC

B D

CA

1

x02_sd

40,59

40,59
5,33,44,56,59
5,33,40,44,59

1 2

8.2K-5%

GPI_FVS_1_N
GPI_FVS_2_N
ICH_PWRBTN_N
ICH_PWR_ON_REQ

R98

+3.3V+3.3V

220

3.3v AUXGOOD GENERATION

+3.3V_AUX

RAID Key

R83

21

RAID_KEY

21
3
5
7
9

VERT LATCH

SINGLE SHIELD

NO MOUNTING HOLES

4

6

8

10

K

8.2K-5%

21

ICH_SEG3_SCL

ICH_SEG3_SDA
NC_RAID_KEY_10

R58

31,35

31,35

0.1uF 16V
2 1

C1733

x00_sd_052203

0.1uF 16V
C1628

12

VCC

GND

DS1818

U9

2

RESET

3

SUB=SUB*_Y1351

1K-5%

1

X03_GT_011804

R173

12

1 2

1.5K-5%
R57

141U61

2

VHC14 VHC14

3.3VAUX_PWRGOOD_BUFF_N

PROPAGATION_DELAY=L:S::1000 PROPAGATION_DELAY=L:S::1000

3.3VAUX_PWRGOOD

5,41

144U61

3

145U61

6

VHC14

x00_sd_0518030

R1775

33-5%

3.3VAUX_PWRGOOD_RISER_R

1 2

R1776

4.7K

4.7K

21

R1777

21

3.3VAUX_PWRGOOD_RISER

3.3VAUX_PWRGOOD_ICH_ESM

31

33,46

5,41

3.3VAUX_PWRGOOD

0.1uF 16V
1 2

Q15

2N7002

C151

+3.3V_AUX

BAR43

2.2K-5%

1

G

D6

31

R176

21

3.3VAUX_PWRGOOD_N

D

3

S

2

41

+3.3V

R354

21

8.2K-5%

R353

1 2

8.2K-5%

JUMPERS

J19
1
3
5

GPI_EN_PASSWD_N

GPI_NVRAM_CLR_N

40

40

1

x00_sd_052203

2
4
6

NC_JMP_6NC_JMP_3

2

.01uF 50V

21

C1305

+3.3V_AUX

149U38

VHC14

R1244

1 2

3.01K-1%

+3.3V_AUX

10V-10%

1 2

1uF

8

C1299

VFPCP_OSC_5V

x02_tj_081803

R1200

1 2

43.2-1%

+3.3V_AUX

C1281

2 1

0.1uF 16V

D28

31

BAR43 BAR43

ROOM=VFPCP

D29

31

0.1uF 16V
1 2

41

3.3VAUX_PWRGOOD_N

ADDED CURRENT LIMIT RES. --SWH 9/27
CHANGED RES. TO 100-OHM --SC 12/15

C1282

1 2

1M-5%

R1192

Q55

2N7002

1 2

100-5%

R1198

D

3

1

G

S

2

VFPCP

41,45

33,34,41,57

41,45

44

ROOM=3VAUXPG

VBAT

VFPCP

INTRUDED_COVER

To reset intrusion detect,
drive Low value. During
all other times, signal
shall be tri-state by uC.

31

INTRUSION_COVER_N

Open (1)

Shorted (0) = Intruded

ADD*_81526_PSWDSHNT
ADD*_81526_NVRMSHNT

3.3VAUX_PWRGOOD INVERTER

81526 are the jumper plugs

Chassis Intrusion Detect

ROOM=JUMPERS

ROOM=INTRUS

2N7002

G

1

Q77

S
2

D
3

= Not Intruded

R3

33-5%

21

270K

21

R334

50V-10%

1000pF

R151

1K-5%

C1303

1

2

PART_NUMBER=79015

21

50V-10%

1000pF

142U57

1

VHC14

R1181

NP

C430

21

PART_NUMBER=79015

0-5%

21

X

0-5%

149U57

8

VHC14 VHC14

1 2

R1182

143U57

1 2

4

VHC14

R150

1K-5%

R610

1K-5%

21

BAR43

D37

31

50V-10%

1000pF

C1658

1 2

x00_sd_052903

PART_NUMBER=79015

145U57

Q78

D
3

6

2N7002

1

VFPCP

G

S
2

41,45

INTRUSION_COVER_VAUX_N

This signal gates PME#.
It is not the true
Intrusion signal.

0.1uF 16V
C223

21

+5V_AUX Charge Pump

Need about 100mA

ROOM=5V_PUMP

NP

+3.3V_AUX

NP

3

IN

R572

NP

NP

5

X

C432

1 2

1uF

10V-10%

118K

21

X

1

SKIP

2

SHDN

4

GND

U22

MAX682ESA

7

CXP

6

CXN

8

OUT

5

PGND

X

1MHz switching frequency

21

C35

X

.47uF

16V-10%

NP

10V-10%

1uF

1 2

X

C470

NP

10V-10%

1uF

X

+5V_AUX

2

C469

21

3

Required by
product safety

R1183

1 2

1K-5%

VOLTAGE DOUBLER FOR 6V AUX POWER

Required by
product safety

R1184

D31

1 3

1N914

+3.3V_AUX

D32

1N914

1 2

1K-5%

31

VBAT

33,34,41,57

ESM_VBAT

41,45

D30

BAR43

Vout ripple = 80mV

+12V

21

VFPCP

+3.3V_AUX

Q16

2N7002

G

1

31

D
3

S
2

x00_tj_051203

R1210

10M-5%10M-5%

1 2

R1187

1 2

200K-1%

0.1uF 16V
1 2

C1284

A2D_BAT

44

5,24,35

SYSTEM_PWRGOOD_FETS

2N7002

Q114

G

Q113

R1650

1 2

D

3

1

S

2

2N7002

8.2K-5%

D

3

1

G

S

2

R1652

1 2

8.2K-5%

8.2K-5%

R1651

330pF 50V

C72

12

330pF 50V

2 1

C74

x03b_sd

SYSTEM_PWRGOOD_FETS_6V

28,32

+5V_AUX Charge Pump

3

X00_GT_051303
X00_GT_052703

TH/SMT SKT

3V COIN

-+

13254

BATTERY

SUB*_1311P
ADD*_75481_BATTERY

C1300

1 2

1uF

10V-10%

10uF 6.3V

1 2

C1296

NP*

ROOM=BAT

COIN BATTERY

R1211

LOAD RESISTOR TO DETECT MISSING BATTERY

1 2

+5V_AUX

16V 10%

10uF

C1801

21

16V 10%

10uF

21

C1796

+3.3V_AUX

1uf cap shared with other charge pump

C1798

1 2

2.2uF 16V

7

14

6

8

3

9
10
11
12

IN_7
IN_14

C1+

C1-

ENABLE

PGND_9
PGND_10
PGND_11
PGND_12

U66

OUT_5

OUT_16

FBNC

PG

C2+

C2-

THRM_PIN

GND_1

GND_2
GND_19
GND_20

5
16

418

17

15

13

21

1
2
19
20

C1799

1 2

16V 10%

10uF

2.2uF 16V

C1800

21

TPS60131PWP

WITH PIN FOR THERMAL PAD

SUB=SUB*_M3151

X03_GT_011804

4 4

INC.

ROUND ROCK,TEXAS

REV.

A03-00

SHEET

41 OF 60

PME

x03b_sd - remove whole circuit, handled by cpld instead

Battery / Intrusion Detect / RAID Key / VAux Pwrgood

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

subsys done

A B

DC

B D

CA

+3.3V

TO DO: ADD DECOUPLING

Front 40mm LED circuits

+3.3V

REAR LED Bank for 2U/5U Rear Fans

+3.3V

REAR LED Bank for 2U/5U CPU Fans

+3.3V

Front 40mm Fan Connectors(1U SYSTEM)

BICOLOR

SG

Y

1 2

DF_1NP*
BICOLOR

SG

3 4

Y

NP*

DF_2

BICOLOR

SG

Y

1 2
NP* DF_3

BICOLOR

SG

3 4

Y

DF_4

NP*

42

43

+3.3V

21

+3.3V

1

43

+3.3V

21

1

FAN_1U_1

1
2

42
42

42,52

42,52

FAN1_TACH
FAN7_TACH

FANPWR_ZONE1

FAN3_TACH

42

FAN9_TACH

42

FANPWR_ZONE3

FAN5_TACH

42

FAN6_TACH

42

FANPWR_ZONE2

52

C1596

1 2

.1uF

25V-20%

21

C1599

NP13

.1uF

NP13

25V-20%

C1603

1 2

.1uF

25V-20%

3
4
5
6

1X6 2.5mm CONN

SUB*_3W439

NP13

FAN_1U_3

1
2
3
4
5
6

1X6 2.5mm CONN

SUB*_3W439

NP13

1X6 2.5mm CONN

NP*

42
42

42,52

42
42

42,52

FAN_1U_5

1
2
3
4
5
6

SUB9_3W439

NP*

FANPWR_ZONE1

Rear 40mm Fan Connector(1U SYSTEM)

ONLY POPULATED ON 1U SYSTEM

FAN2_TACH
FAN8_TACH

FAN4_TACH
FAN10_TACH

FANPWR_ZONE3

x03_sd

21

C1606

.1uF

25V-20%

NP13

C1607

1 2

.1uF

25V-20%

NP13

FAN_1U_2

1
2
3
4
5
6

1X6 2.5mm CONN

SUB*_3W439

NP13

FAN_1U_4

1
2
3
4
5
6

1X6 2.5mm CONN

SUB*_3W439

NP13

42

42

42

42

42

FAN1_TACH

FAN2_TACH

FAN3_TACH

FAN4_TACH

FAN7_TACH

RN70

+3.3V

RN70

+3.3V

RN73

+3.3V

RN73

+3.3V

RN70

+3.3V

54

81

63

8.2K-5% 8.2K-5%8.2K-5%8.2K-5%

1 8

63

8.2K-5%

RN60

1 8

1.5K-5%

RN60

1.5K-5%

RN61

1 8

1.5K-5%

RN61

1.5K-5%

RN60

2 7

1.5K-5%

BICOLOR

31

D20

D19

1 3

63

31

D21

D22

1 3

63

31

D18

FRONT Fan Tachs

BAR43

BMC_FAN1_TACH

.01uF 50V

BAR43

.01uF 50V

BAR43

.01uF 50V

BAR43

BAR43BAR43

C785

21

C781

21

C782

21

.01uF 50V

21

.01uF 50V

21

D14

D15

C783

C66

D13

31

1 3

1 3

D16

D24

BAR43

BAR43

BAR43

31

1 3

BMC_FAN2_TACH

BAR43

BAR43

BMC_FAN3_TACH

BMC_FAN4_TACH

BMC_FAN7_TACH

44

44

44,45

44,45

44

tach

1
2
3
4
5
6
7
8

9
10
11
12
13
14

1u

1
2
3
4

led

2u/5u

00
1
2
3
4
5
6
7

8

2U & 5U

Zone-2

1u 2u

1a
2a
3a
4a
5a

1b
2b
3b

4b
ps1
ps2

ps1 ps1a

ps2/7 ps2a/9

1U

Zone-2

5u

1 1
2
3
4
5
65b 6

ps1b

ps2b/10

F6

j17

F5

j7

2
3
4
5

7
8

j8

F6

F5

p14

42

42

42

42

42

42

LED0_GRN_DRV

LED0_AMB_DRV

LED1_GRN_DRV

LED1_AMB_DRV

LED2_GRN_DRV

LED2_AMB_DRV

42

42

LED3_GRN_DRV

LED3_AMB_DRV

ONLY POPULATED ON 1U

SG

Y

1 2

DF1_1NP13

BICOLOR

SG

3 4

Y

DF1_2NP13

BICOLOR

SG

Y

1 2

DF1_3NP13

BICOLOR

SG

3 4

Y

DF1_4NP13

LED4_GRN_DRV

43

+3.3V

21

+3.3V

43

42

42

42

42

LED4_AMB_DRV

LED5_GRN_DRV

LED5_AMB_DRV

NP* DF_6

REAR LED Bank for 5U 90mm Fans

+3.3V

LED6_GRN_DRV

42

LED6_AMB_DRV

21

42

42

42

LED7_GRN_DRV

LED7_AMB_DRV

ONLY POPULATED ON 2U and 5U

Goes to Front 40mm LED circuits and Rear Bank Ckt

FAN_LED0

46

BICOLOR

SG

Y

1 2

NP* DF_5

BICOLOR

SG

3 4

Y

BICOLOR

SG

3 4

Y

DF_7NP*

BICOLOR

SG

Y

1 2

DF_8NP*

+3.3V_AUX

14

U4

1 2

43

21

21

43

+3.3V

+3.3V

+3.3V

42

42

LED0_GRN_DRV

LED0_AMB_DRV

42

42

42

42

LED1_GRN_DRV

LED1_AMB_DRV

LED2_GRN_DRV

LED2_AMB_DRV

42

42

LED3_GRN_DRV

LED3_AMB_DRV

x03_sd - depopped all

ONLY POPULATED ON 2U and 5U

x03_sd remove some parts for 2u/5u only

R197

1 2

LED0_GRN_DRV

Front 60mm Fan Connectors(2U/5U SYSTEM)

Power Supply LED

RN70

8.2K-5%

2

+12V

C1618

1 2

42

.1uF

25V-20%

FAN1_TACH

21

C1619

FAN2_TACH

42

+12V

x00_sd_051703 - caps

.1uF

25V-20%

+12V

FAN_1

21

21

43

43

HL44020

CONN, 2x2

NP02

FAN_2

1 2
3 4

HL44020

CONN, 2x2

NP02

21
43

FANSPEED_1A_R

FANSPEED_1A_R

42

+12V

21

C1620

42

42

.1uF

x00_sd_052303

25V-20%

42

C1621

1 2

FAN4_TACH

FAN3_TACH

.1uF

+12V

25V-20%

+12V

FAN_3

1 2
3 4

HL44020

CONN, 2x2

NP02

HL44020

CONN, 2x2

21
43

FAN_4

NP02

FANSPEED_1B_R

21

21

43

43

FANSPEED_1B_R

42

42

Rear 60mm Fan Connectors (2U SYSTEM)

+12V +12V

3

42

FAN5_TACH

+12V

21

C1615

.1uF

25V-20%

C1616

1 2

.1uF

25V-20%

21

C1617

FAN_5

HL44020

CONN, 2x2

NP02

.1uF

25V-20%

21
43

42

21
43

FAN6_TACH

FANSPEED_2_R

+12V

42

FAN_2U_6

1 2
3 4

HL44020

CONN, 2x2

NP02

21
43

42

FAN6_TACH

FANSPEED_2_R

These connectors share TACH
one is for 2U and the other is for 5U

42

FAN_6

HL44020

CONN, 2x2

NP02

21

21

43

43

FANSPEED_2_R

Fan Connector 2x4 (5U SYSTEM)

+12V

1
2
3
4
5

x00_sd_051703
x00_tj_052803

FANSPEED_3_R

FANSPEED_3_R

42

42

42

42

FAN7_TACH

FAN8_TACH

FAN_7_8

6

6

7

7

8

8

9

9

10

10

POWER

HEADER

SUB=NP02

1
2
3
4
5

ONLY POPULATED ON 2U and 5U SYSTEM

4 4

P/U's assist poor

drive strength of H8

44,52

44,52

44,52

FANSPEED_1

FANSPEED_2

FANSPEED_3

+3.3V_AUX

5,6,59

1 2

R176821R1767

4.7K

DC2DC_5V_EN

4.7K

4.7K

1 2

R1766

143U60

1
2

74VHC08

x04_sd

14

4
5

74VHC08

U60

6

9

10

148U60

74VHC08

FANSPEED_1_UR

3 1

BAR43

FANSPEED_2_UR

+12V

C1614

1 2

D64

BAR43

FANSPEED_3_UR

.1uF

25V-20%

D's and series R's not needed on 1U

NP02

NP02

NP02

3 1

D65

BAR43

13

D66

FAN8_TACH

42

FAN9_TACH

42

FAN10_TACH

42

FAN5_TACH

42

42

FAN6_TACH

42

PS1A_TACH

31

PS1B_TACH

31

PS2A_TACH

31

PS2B_TACH

31

R's protect against backfeed.
One R per two fans.

R920

100-5%

R921

1 2

100-5%

R1024

100-5%

R1025

1 2

100-5%

21

21

NP02

NP02

NP02

NP02

+3.3V

RN73 2 7

8.2K-5%8.2K-5%

2 7

+3.3V

54

RN73

+3.3V

R1550

+3.3V

R1551

+3.3V

RN74

+3.3V

RN74

+3.3V

RN74

+3.3V

RN74

FANSPEED_1A_R

FANSPEED_1B_R

FANSPEED_2_R

FANSPEED_3_R

1 2

21

1 8

72

63

4 5

8.2K-5%8.2K-5%

8.2K-5% 8.2K-5% 8.2K-5% 8.2K-5%

RN60

54

1.5K-5%

RN61

2 7

1.5K-5%

RN61

54

1.5K-5%

R1553

21

1.5K-5%

R1552

1 2

1.5K-5%

RN62

81

1.5K-5%

RN62

2 7

1.5K-5%

RN62

3 6

1.5K-5%

RN62

54

1.5K-5%

42

42

42

42

D17

D42

D41

D53

D54

D57

D58

1 3

D1

D2

31

1 3

1 3

31

31

1 3

1 3

31

NP*

NP*

BAR43 BAR43

x03_sd

BAR43

BAR43

BAR43BAR43

BAR43BAR43

NP13

NP13

x03_sd

NP02

NP02

NP02

NP02

R1023

4.7K

.01uF 50V

NP13

.01uF 50V.01uF 50V

NP13

.01uF 50V .01uF 50V

NP*

NP*

21

.01uF 50V.01uF 50V

21

.01uF 50V .01uF 50V

21

1 2

21

C67

21

21

1 2

C68

21

C69

21

C518

C417

C851

C850

12
13

BMC_FAN8_TACH

31

D23

C65

D3

BAR43

BMC_FAN9_TACH

31

NP13

BAR43

Diodes and caps depop'ed for
2U/5U for tachs 9 and 10

BMC_FAN10_TACH

C64

D4

NP13

BAR43

1 3

REAR Fan Tachs

BMC_FAN5_TACH

D44

D43

NP*

BAR43

1 3

BMC_FAN6_TACH

31

NP*

BAR43

PS Fan Tachs

31

D55

D56

1 3

D59

1 3

31

D60

+3.3V_AUX

14

U60

74VHC08

BAR43

BAR43

11

BMC_PS1A_TACH

BMC_PS1B_TACH

BAR43

BMC_PS2A_TACH

NP02

BMC_PS2B_TACH

BAR43

NP02

SP_U60_11

44

44

44

44

44

44

44,45

44,45

ROOM=FANS_TACH_FRONT
ROOM=FANS_TACH_REAR
ROOM=FANS_TACH_PS

44

42

42

Zone-1

1 2

F3F2

j6j5j3 j4

F4

Zone-3

Power Supply LED circuits

R1760

+3.3V_AUX

U20

14

NP*

74LCX07

65

14

9 8

NP*

74LCX07

NP*

U20

NP*

2U & 5U

1U

F1 F4

p10 p12 p11 p13

F1

F2 F3

Zone-1

+3.3V_AUX

8.2K-5%

FAN_LED8

46

LED_CTRL2

46

ROOM=FANS_FRONT
ROOM=FANS_REAR
ROOM=FANS_5U

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

LED8_GRN_DRV

LED8_AMB_DRV

POPULATED ON 1U/2U/5U

5U

F7

j10

F8

Zone-3

R226

1 2

130-1%

R245

21

130-1%

LED8_GRN_DRV

LED8_AMB_DRV

BICOLOR

SG

3 4

Y

DF_9

NP*

x03_sd

42

42

NAND GATES ARE LCX

21

+3.3V

42,46

42,46

42,46

42,46

x03_sd repackage for cost savings

42,46

46

x03_sd repackage for cost savings

42,46

46

42,46

46

42,46

LED_CTRL0

FAN_LED1

46

LED_CTRL0

FAN_LED2

46

LED_CTRL0

FAN_LED3

46

LED_CTRL0

FAN_LED4

46

LED_CTRL0

FAN_LED5

LED_CTRL0

FAN_LED6

LED_CTRL1

FAN_LED7

LED_CTRL1

U20

NP*

NP*

U20

NP*

+3.3V_AUX

U20

3 4

NP*

74LCX07

+3.3V_AUX

+3.3V_AUX

U4

U4

+3.3V_AUX

+3.3V_AUX

U20

+3.3V_AUX

+/-24ma drive

74LCX07

PKG_TYPE=TSSOP14

14

U4

43

74LCX07

PKG_TYPE=TSSOP14

14

5 6

74LCX07

+3.3V_AUX

PKG_TYPE=TSSOP14
14

89

74LCX07

14

PKG_TYPE=TSSOP14

11 10

74LCX07

PKG_TYPE=TSSOP14

14

1213

74LCX07

PKG_TYPE=TSSOP14

14

21

74LCX07

PKG_TYPE=TSSOP14

14

12

13

SUB9_14PNP
NP*

PKG_TYPE=TSSOP14

28,42

1

2

74VHC00

SUB02_14PNP

28,42

145U31

4

74VHC00

SUB02_14PNP

28,42

14

9

10

74VHC00

SUB02_14PNP

28,42

12

74VHC00

SUB02_14PNP

28,42

14

1

2

74VHC00

SUB9_14PNP
NP*

28,42

145U32

4

74VHC00

SUB9_14PNP
NP*

28,42

14

9

10

74VHC00

SUB9_14PNP
NP*

28,42

14

U32

74VHC00

TITLE

14

U31

NP13

6

NP13

U31

8

NP13

1413U31

U32

11

NP13

3

6

Goes to Rear Bank 92mm LED circuits

U32

8

11

1 2

130-1%

3

130-1%

R199

130-1%

R200

1 2

130-1%

R201

1 2

130-1%

R202

130-1%

R203

130-1%

R205

1 2

130-1%

R237

1 2

130-1%

R238

130-1%

R241

1 2

130-1%

R242

130-1%

R265

130-1%

R251

1 2

130-1%

R191

130-1%

R157

130-1%

R198

21

21

21

x03_sd - depopped

21

21

21

LED7_GRN_DRV

NP*

LED7_AMB_DRV

NP*

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

NP13

21

21

LED0_AMB_DRV

NP13

LED1_GRN_DRV

NP13

LED1_AMB_DRV

NP13

LED2_GRN_DRV

NP13

LED2_AMB_DRV

NP13

LED3_GRN_DRV

NP13

LED3_AMB_DRV

NP13

Goes to REAR FANS

LED4_GRN_DRV

NP*

LED4_AMB_DRV

NP*

LED5_GRN_DRV

NP*

LED5_AMB_DRV

NP*

LED6_GRN_DRV

NP*

LED6_AMB_DRV

NP*

INC.

ROUND ROCK,TEXAS

SHEET

42

42

42

42

42

42

42

42 OF 60

42

42

42

42

42

42

42

42

+3.3V

0.1uF 16V

REV.

1 2

C232

A03-00

2

3

0.1uF 16V
C231

21

subsys done

A B

DC

B D

x00_sd_061203 - vcc changed to +5vriser

CA

12-16-2004_19:51

1

2

40

40
40
40
40
40
40
40
40

40

40

40

40

40

40

40

40

RPRN_STB_N

RPRN_PD0
RPRN_PD1
RPRN_PD2
RPRN_PD3
RPRN_PD4
RPRN_PD5
RPRN_PD6
RPRN_PD7

RPRN_ACK_N

RPRN_BUSY

RPRN_PE

RPRN_SLCT

RPRN_AFD_N

RPRN_ERR_N

RPRN_INIT_N

RPRN_SLIN_N

RN128

1 8

33-5%
RN129

2 7

33-5%
RN129

3 6

33-5%

R865

100-1%

21

33-5%

2 7

33-5%

1 8

33-5%

R787

1 2

33-5%

RN128

2 7

33-5%

RN129

1 8

33-5%
RN129

4 5

33-5%

R786

RN127

RN127

PARALLEL HEADER

ROOM=PPORT

RN128

3 6

33-5%

RN128

4 5

33-5%

R864

1 2

21

100-1%

R788

1 2

33-5%

RN127

3 6

33-5%

RN127

4 5

33-5%

RN124

4 5

4.7K-5%

RN123

3 6

4.7K-5%

RN123

2 7

81

RN125

RN125

4.7K-5%

4.7K-5%

4.7K-5%

2 7

RN125

63

RN123

1 8

RN125

4.7K-5%

4.7K-5%

4.7K-5%

4 5

RN123

4 5

4.7K-5%

63

RN124

RN124

2 7

4.7K-5%

4.7K-5%

RN124

81

R875

4.7K-5%

+5.0V Riser

D27

PULPTVCC

1N914

C930

4.7K

1 2

R876

1 2

4.7K

1 2

0.1uF 16V

13

ROOM=PAR

1

PARA_CONN

PRN_STB_N
PRN_PD0
PRN_PD1
PRN_PD2
PRN_PD3
PRN_PD4
PRN_PD5
PRN_PD6
PRN_PD7
PRN_ACK_N
PRN_BUSY
PRN_PE
PRN_SLCT

3
5
7

9 10
11 12
13
15
17

21 22
23
25
27
29

HDR2X15

W/EJECT LEVER

21
4
6
8

14
16
18
2019

x03b_sd

24
26
28

K

NP02

+3.3V

8.2K-5%

Pins 26, 27, and 28 shorted on cable.

21

R618

PARAPORT_PRES_N

33,46

2

3

50V-10%

470pF

1 2

C1024

50V-10%

470pF

32

0.1uF 16V
C1608

21

x00_sd_051803 - added cap

50V-10%

470pF

C1017

21

ID_BUTTON_RAW

FROM CONTROL PANEL

+3.3V_AUX

C1023

21

50V-10%

470pF

3 4

50V-10%

470pF

21

50V-10%

C1025

1 2

SW1

1 2

A B

GND_1 GND_2

PUSHBUTTON

SPST SWITCH

SUB*_5C785

C1020

470pF

50V-10%

470pF

1 2

C1018

1 2

C1022

50V-10%

470pF

330pF 50V

C1019

21

1 2

C961

330pF 50V

50V-10%

470pF

1 2

C960

8.2K-5%

1 2

C1026

50V-10%

470pF

R97

21

1 2

C1021

1K-5%

330pF 50V

R63

1 2

21

6.3V-10%

4.7uF

C959

330pF 50V

21

6.3V-10%

1 2

C311

4.7uF

330pF 50V

C965

1 2

330pF 50V

1 2

C962

+3.3V_AUX

11

C310

$0.03 5/10/01

NP*

21

1410U38

VHC14

330pF 50V

C964

1 2

C963

ID_BUTTON_DB_N

TO BMC

44

ROOM=CYC_REAR

4

2N7002

32,43,46

LED_ID_BLUE

x02_sd_removed connector and supporting components for 1U

Q83

G

U28

USING MORE RESISTORS

TO WITHSTAND SHORT CIRCUIT ON CONNECTOR

OR DRAC3 AC ADAPTER PLUGGED IN

+5V_AUX

2

R362

1 2

D

3

1

S

2

1 2

100-5%

100-5%

R750

8.2K-5%

R751

3

21

CYC_BLUE_DRV

2N7002

32,43,46

LED_ID_YELLOW

1

3906

Q54

43

1

Q79

G

1

68-5% 68-5%

NP02

D

S

3

1 2

R440

NP02

R1662

21

3

2

68-5% 68-5%

NP02

NP02

1 2

R439

NP02

R1661

21

L31

BLM11A601S

NP02

NP02

R447

1 2

0-5%

21

12

C224

YEL_CATH_REAR

NP02

0.1uF 16V

not correct from everglades

BLUE_CATH_REAR

BLUE: 23 mA @3.8V
AMBER: 23 mA @2.1V

center pin is AMBER+

NP02

NP02

CATH1

1

CATH2

3

CATH3

4

CATH4

6

43

J15

1
3
2

DC PWR JACK

12

NP02

C247

COMMON1
COMMON2

BZA462A

CYC_AMB_DRV

B A

BLM11A601S

NP02

0.1uF 16V

L32

3

+3.3V_AUX

2
5

100-5%

21

100-5%

R753

1 2

R752

2

3

39-5%

NP02

R406

NP02

1 2

8.2K-5%

3

2N7002

1

G

S

2

4

LED_ID_YELLOW

32,43,46

Q121

D

1

3906

Q76

1 2

R45

39-5%

R1660

21

1

21

21

NP02

D

SUB*_4M970

82-5%

R337

Q80

21

NP02

R339

SUB TO 82.5 OHM

SUB*_4M970

82-5%

3

3

33,34

33

ICH_SPKR

GPO_SPKR_DISABLE

1 2

R259

1.5K-5%

Q18

2N7002

2N7002

1

G

LED_ID_BLUE

32,43,46

Q17

D

2N7002

3

REAR ID BUTTON

BSPKRO

D

3

1

G

S

2

10V-10%

1uF

21

x00_tj_051203

C173

ROOM=CYC_REAR

Changes from Everglades/Boxster

1

Resistance redistributed:

A: A shorted cable would have violated power rating for Amber drive case.
B: Amber turn-off could have caused large power rating violation for short time.
C: Prevents power rating violation when Amber and Blue is on for below changes.

1

RN24

2
3
4

33

8
7
6
5

VCC

1N914

2

LED changed to 3-pin version to prevent tipping during board installation.

NP*

D45

13

SPKROUT

a00_sd__DFCT119311

32

3

Independant tuning resistors and current channel added for new LED config of (2).

4

High side is activated when needed rather than deactivated when opposing LED is on.
This is needed to support new LED config of (2).

todo need to check new DS7's current and Vf numbers

DS7

BLUE

CYC_BLUE_DRV

43

CYC_AMB_DRV

43

2

1

2

3

AMB
LED

BLU/AMB

NP02

S

2

REAR ID LED & REAR CYCLOPS CONNECTOR

1

G

S

2

4 4

ROOM=SPKR

Speaker Driver

Parallel Port / ID Button /

INC.

ROUND ROCK,TEXAS

TITLE

Rear Cyclops / Speaker

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL

subsys done

AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

A B

DWG NO.

DATE

DC

D1660

12/16/2004

REV.

A03-00

SHEET

43 OF 60

A B C

BMC has 4X PLL for 29.5MHz for all baud rates to be supported w/ 0% err

D

+3.3V_AUX

1

2

3

4

+3.3V_AUX

Default = Falling edge causes NMI.

R213

BMC_A0

45
45,46
45,46
45,46
45,46
45,46
45,46
45,46

42,45
42,45
42,45
42,45

x00_PL_052303: Add A16 and A17

45,46
45,46
45,46
45,46

45,46

x00_PL_060503: Moved PS_AC_GOOD to IRQ input

33,45,50

+3.3V_AUX

X02_PL_081903: Added Filtered AVCC rail

BMC_A1
BMC_A2
BMC_A3
BMC_A4
BMC_A5
BMC_A6
BMC_A7
BMC_A8

45

BMC_A9

45

BMC_A10

45

BMC_A11

45

BMC_A12

45

BMC_A13

45

BMC_A14

45

BMC_A15

45

BMC_A16

45

BMC_A17

45

BMC_FAN3_TACH
BMC_FAN4_TACH
BMC_FAN5_TACH
BMC_FAN6_TACH
BMC_FAN7_TACH

42

BMC_FAN8_TACH

42

BMC_D0
BMC_D1
BMC_D2
BMC_D3
BMC_D4

45

BMC_D5

45

BMC_D6

45

BMC_D7

45

BMC_D8

45

BMC_D9

45

BMC_D10

45

BMC_D11

45

BMC_D12

45

BMC_D13

45

BMC_D14

45

BMC_D15

45

45
45

45
45

BMC_EXGP_CS_N

46
45

A2D_BAT

41

A2D_ROMB_BAT

45

RAC_PRSNT_N
BMC_GPI_71

45

BMC_GPI_72

45

BMC_GPI_73

45

BLM18BD601SN1

8.2K-5%

1 2

HITACHI_NMI_N

BMC_HIGH_WR_N
BMC_LOW_WR_N
BMC_RD_N

BMC_GPIO_22
SRAM_CS_N

BMC_GPIO_23

31
31

L135

21

0.1uF 16V

BMC_AVREF

44

PS_FAN_DAC1
PS_FAN_DAC2

0.1uF 16V

C1794

1 2

21

C1795

11

NMI

112

P10/PW0/A0/AD0

110

P11/PW1/A1/AD1

109

P12/PW2/A2/AD2

108

P13/PW3/A3/AD3

107

P14/PW4/A4/AD4

106

P15/PW5/A5/AD5

105

P16/PW6/A6/AD6

104

P17/PW7/A7/AD7

103

P20/PW8/A8/AD8

102

P21/PW9/A9/AD9

101

P22/PW10/A10/AD10

100

P23/PW11/A11/AD11

99

P24/PW12/A12/AD12

98

P25/PW13/A13/AD13

97

P26/PW14/A14/AD14

96

P27/PW15/A15/AD15

41

PA0/KIN8/EVENT0/SSEOI/A16

40

PA1/KIN9/EVENT1/SSE2I/A17

39

PA2/KIN10/EVENT2/A18

38

PA3/KIN11/EVENT3/A19

37

PA4/KIN12/EVENT4/A20

35

PA5/KIN13/EVENT5/A21

34

PA6/KIN14/EVENT6/A22

33

PA7/KIN15/EVENT7/A23

78

P60/KIN0/FTCI/D0

79

P61/KIN1/FTOA/D1

80

P62/KIN2/FTIA/D2

81

P63/KIN3/FTIB/D3

82

P64/KIN4/FTIC/D4

83

P65/KIN5/FTID/D5

84

P66/KIN6/FTOB/D6

85

P67/KIN7/D7

121

P30/WUE8/D8

122

P31/WUE9/D9

123

P32/WUE10/D10

124

P33/WUE11/D11

125

P34/WUE12/D12

126

P35/WUE13/D13

127

P36/WUE14/D14

128

P37/WUE15/D15

20

P94/HWR

24

P90/LWR

21

P93/RD

22

P92/CPCS1

17

P97/WAIT/CS256

19

P95/AS/IOS

23

P91/AH

68

P70/AN0

69

P71/AN1

70

P72/EXIRQ2/AN2

71

P73/EXIRQ3/AN3

72

P74/EXIRQ4/AN4

73

P75/EXIRQ5/AN5

74

P76/EXIRQ6/AN6/DA0

75

P77/EXIRQ7/AN7/DA1

76

AVCC

77

AVREF

67

AVSS

BMC

P52/IRQ10/IRTXD/TXD1
P53/IRQ11/IRRXD/RXD1

P54/IRQ12/TXD2
P55/IRQ13/RXD2

P56/IRQ14/PWX0
P57/IRQ15/PWX1

P81/EXIRQ9/SDA0

P80/EXIRQ8/SCL0
P83/EXIRQ11/SDA1
P82/EXIRQ10/SCL1

P85/EXIRQ13/EXTMI1/SCK1
P86/EXIRQ14/EXTMIX/SCK2

P87/EXIRQ15/EXTMIY/ADTRIG

P84/EXIRQ12/EXTMI0/SCK0

HITACHI 2178 BMC

HETERO 1 OF 2

SUB1=SUB02_W3169
SUB2=SUB13_T3353

ROOM=BMC

PE3/LAD3
PE2/LAD2
PE1/LAD1
PE0/LAD0

PE4/LFRAME
PE5/LRESET

PE6/LCLK

PE7/SERIRQ

PD5/LPCPD

PD4/CLKRUN

PD3/GA20

PD2/PME
PD1/LSMI
PD0/LSCI

P50/IRQ8/TXD0
P51/IRQ9/RXDO

PC6/PWX2
PC7/PWX3

PB0/EVENT8

PB1/EVENT9
PB2/EVENT10
PB3/EVENT11
PB4/EVENT12
PB5/EVENT13
PB6/EVENT14
PB7/EVENT15

PC1/SDA2
PC0/SCL2
PC3/SDA3
PC2/SCL3
PC5/SDA4
PC4/SCL4
PD7/SDA5
PD6/SCL5

P40/IRQ0/TMI0
P41/IRQ1/TMI1
P42/IRQ2/TMO0
P43/IRQ3/TMO1
P44/IRQ4/TMIX
P45/IRQ5/TMIY
P46/IRQ6/TMOX
P47/IRQ7/TMOY

PF0/EXPW0
PF1/EXPW1
PF2/EXPW2

55
56
57
58

54
53
52
51
61

62
63
64
65
66

x00_PL_052303: moved PARAPORT_PRES_N from CPLD and removed EMP_EN
x00_TL_061003: swapped PARAPORT_PRES_N and CTRLPNL_MUX_S0 to that CTRLPNL mux's can be on same port (1 write)

16
15
133
134
136
137

5
6
26
25

120
119
118
117
116
115
114
113

49
50
47
48
31
32
29
30
27
28
59
60

129
130
131
132
138
2
3
4

94
93
92
45
44
43
46

X00_PL_052903: Moved PWR_LED to CPLD

X02_PL_091503: Moved PARAPORT_PRES_N to CPLD

x00_pl_052303: moved BMC_TYPE to CPLD

PCI_RST_PLANAR_2_N

CTRLPNL_MUX_S1

CTRLPNL_MUX_S0

BMC_FAN10_TACH

I2C_SEG2_VAUX_SDA
I2C_SEG2_VAUX_SCL
I2C_SEG3_VAUX_SDA
I2C_SEG3_VAUX_SCL
I2C_SEG4_VAUX_SDA
I2C_SEG4_VAUX_SCL

PFAULT_LATCH_N

INTRUDED_COVER

ID_BUTTON_DB_N

PFAULT_RESET_R

ICH_PWR_ON_REQ

SYSTEM_PWRGOOD_ESM

BMC_ICH_PWRBTN_N

LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0

LPC_LFRAME_N

CK_33M_BMC
BMC_PIN_51
BMC_PIN_61

BMC_PIN_62

BMC_IRQ_N

BMC_SMI_N

BMC_CTS0_N
BMC_RTS0_N

BMC_TX0
BMC_RX0

CTRLPNL_CLK

CTRLPNL_DATA

FANSPEED_1
FANSPEED_2
FANSPEED_3
FANSPEED_4

BMC_FAN9_TACH

BMC_PS1A_TACH
BMC_PS2A_TACH
BMC_PS1B_TACH
BMC_PS2B_TACH
BMC_FAN1_TACH
BMC_FAN2_TACH

I2C_IPMB_SDA
I2C_IPMB_SCL

I2C_NIC_SDA
I2C_NIC_SCL

I2C_SEG5_SDA
I2C_SEG5_SCL

NIC_ALERT_N

BMC_ALERT_N

PS_AC_GOOD

RAC_RDY_N

IPMB_RST_N

BMC_RDY_N
BMC_NMI_N

BMC_GPIO_45

5,33,40,55,59
5,33,40,55,59
5,33,40,55,59
5,33,40,55,59

5,33,40,55,59
36,40,46
3
45
45

x00_PL_060503:Placed pin 51, 61, 62 on pullups

45
40

x00_PL_060203: Moved CTRLPNL_MUX_S0/S1per Hitachi fdbk (no GPIOs when use LPC)

32
33,45
32

48
48
48
48
32
32

42,52
42,52
42,52
45

42
42
42
42
42
42
42
42

BMC_ICH_PWRBTN_N

44

BMC - BB

DISK PROG
BLANK PART

BMC - K/C

32,44,50,59
32,44,50,59
24,25,44,59
24,25,44,59
5,44,45,59
5,44,45,59
31,44,59
31,44,59
31,44,59
31,44,59
32,44,59
32,44,59

24,25,45
5,46
45,46
46
33,45,50
41
32,45,50
43

5,46
33,45,50

45

5,33,40,41,59

5,46,50

44

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

x03_sd

D69

3 1

BAR43

Diode turns this into

an open-drain driver

32,44,50,59
32,44,50,59
24,25,44,59
24,25,44,59

5,44,45,59
5,44,45,59

31,44,59
31,44,59
31,44,59
31,44,59
32,44,59
32,44,59

PROG-PART SPEC 14967
DISK PROG
BLANK PART

GPE_NMI_N

I2C_IPMB_SDA
I2C_IPMB_SCL
I2C_NIC_SDA
I2C_NIC_SCL
I2C_SEG2_VAUX_SDA
I2C_SEG2_VAUX_SCL
I2C_SEG3_VAUX_SDA
I2C_SEG3_VAUX_SCL
I2C_SEG4_VAUX_SDA
I2C_SEG4_VAUX_SCL
I2C_SEG5_SDA
I2C_SEG5_SCL

+3.3V_AUX

1 2

8.2K-5%
R1864

33,56

ECAD: Place these components as close

to the BMC as possible

X5

21

7.3728MHz

C158

x03_sd repackage for cost savings

18pF

1 2

+3.3V_AUX

14

50V-5%

X00_PL_082003: Replaced with Real Symbol

U4

74LCX07

pullup is on page 33

1213

W3169
14967PROG-PART SPEC
F3450
X0602

T3353

U2919
X0602

+3.3V

LAN_AUX

+3.3V_AUX

21

R470

4.7K

R471

1 2

4.7K

R472

1 2

x02_tj_081803

R159

1 2

75-1%

R346

21

0-5%

C159

ICH_PWRBTN_N

x04_pl_031804: Changed value per defect: 103565

R473

2.2K-5%
1 2

18pF

1 2

50V-5%

x00_PL_060503: changed to 0 ohm

5,33,41,56,59

+3.3V_AUX

R476

2.2K-5%
1 2

4.7K

R475

+3.3V_AUX

21

4.7K

BMC_XTAL

BMC_EXTAL

21

R477

4.7K

R478

1 2

+3.3V_AUX

NP

R1427

X

R1384

+3.3V_AUX

R480

4.7K

SUB*_30424

44

44

1 2

1 2

21

0-5%

LOW=4X PLL

0-5%

+3.3V_AUX

+5V_AUX

R479

4.7K
1 2

SUB*_30424

22uF 6.3V

C460

21

x00_TL_060303: Delete according to Hitachi

+3.3V_AUX

x00_tj_051203

0.1uF 16V

12

PLLCAP is NC in BMC

1 2

x00_PL_060203: Add AND gate Pullup and Zero Ohm

THE MAX809 is PUSH-PULL

DS1818 is open drain with an internal pull-up

C152

X00_GT_052203

.01uF 50V

C1340

45

R504

0-5%

1 2

1 2

C1

BMC_XTAL

44

BMC_EXTAL

44

NC_PLLCAP

BMC_GPIO_18

REAL_BMC_RESET_N

44

NC_RES0
BMC_STBY

45

BMC_FWE

45

46

U30

RESET

BMC_MD1
BMC_MD2_N

8.2K-5%

1

40,46

ADD PULLDOWN ALSO ON MD PINS??

+3.3V_AUX

2

VCC

0.1uF 16V

SUB1=SUB_Y1351

GND

3

DS1818

1 2

R1842

J9

1 2

143
144

140
141

142

135

14

SUB*_R2879

BMC_RESET_N

NP01

HUDI_RESET_N

46

3V Reference Circuit for A/D converter

NET_PHYSICAL_TYPE=PWR

+3.3V_AUX

R481

4.7K
1 2

x03_pl_010604: Changed value per defect: 100324

R482

2.2K-5%
1 2

2.2K-5%

BMC

R29

NP

49.9-1%

1 2

249 Ohm-1%

x02_pl_091703

21

X

R21

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

DATE

0.1uF 16V

21

x03_sd added cap

BMC

1

VCC_1

36

VCC_36

86

VCC_86

13

VCL

XTAL
EXTAL

PLLCAP
PFSEL

18

P96/PHI/EXCL

8

RES
RESO

12

STBY
FWE

10

MD0

9

MD1
MD2

HITACHI 2178 BMC

HETERO 2 OF 2

R1838

x03_sd repackage for cost savings

0-5%

21

NP23

R313

R441

U4

1 2

1 2

40,46

2
1

NP01

+3.3V_AUX

14

74LCX07

14.7K-1% 4.75K-1%

CB1

VSS_42

VSS_95
VSS_111
VSS_139

53U65

1011

D35

8

2

0.1uF 16V
1 2

VSS_7

42
95
111
139

ETRST

91
90

ETCK

89

ETDI

88

ETDO

87

ETMS

REAL_BMC_RESET_N

4

74VHC1G08

1

3

6

7

CB479

7

BMC_TRST_N
BMC_TCLK
BMC_TDI
BMC_TDO
BMC_TMS

TL431ACD

0.1uF 16V

BMC_AVREF

CB438

1 2

+3.3V_AUX

1 2

8.2K-5%

C744

2 1

R1836

INC.

ROUND ROCK,TEXAS

REV.

D1660

SHEET

A03-00

12/16/2004 44 OF 60

0.1uF 16V

21

46
46
46
46
46

44

0.1uF 16V
C464

21

10uF 6.3V

CB493

1

2

3

44

4

subsys done

DCBA

B D

CA

1

+3.3V_AUX

44,45

44,45

44,45
44-46

44,45

44-46

42,44

BMC_HIGH_WR_N
BMC_LOW_WR_N

BMC_HIGH_WR_N
BMC_RD_N

BMC_LOW_WR_N

BMC_RD_N

BMC_FAN6_TACH

this is A21

SRAM_CS_N

44

+3.3V_AUX

143U7

1
2

74VHC08

+3.3V_AUX

14

4
5

74VHC08

+3.3V_AUX

148U7

9

10

74VHC08

R1839

1 2

0-5%
NP*

R1840

0-5%

0.1uF 16V
1 2

BMC_WR_N

U7

6

21

SRAM_BHE_N

SRAM_BLE_N

R_SRAM_CS_N

R_SRAM_CS_N

x00_gt_061803

C1759

45,46

45

45

45

45

44-46
45,46

x00_PL_060203: Added Zero Ohms in case 2178 is not ready

Allows for BMC to I/F w/ SRAM : 16 bit reads / 8 or 16 bit writes

45
45
45

44-46
44-46
44-46
44-46
44-46
44-46
44-46
44,45
44,45
44,45
44,45
44,45
44,45
44,45
44,45
44,45

R_SRAM_CS_N
SRAM_BLE_N
SRAM_BHE_N
BMC_RD_N
BMC_WR_N

BMC_A1
BMC_A2
BMC_A3
BMC_A4
BMC_A5
BMC_A6
BMC_A7
BMC_A8
BMC_A9
BMC_A10
BMC_A11
BMC_A12
BMC_A13
BMC_A14
BMC_A15

BMC_A16

p/n 17MEY

BMC_SRAM

44
43
42
27
26
25
24
21
20
19
18

39
40
41
17

5

A0

4

A1

3

A2

2

A3

1

A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15

6

CS
BLE
BHE
OE
WE

SRAM,64kx16

VDD1
VDD2

VSS1
VSS2

I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8

I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15

33
11

12
34

7
8
9
10
13
14
15
16
29
30
31
32
35
36
37
38

BMC_D0
BMC_D1
BMC_D2
BMC_D3
BMC_D4
BMC_D5
BMC_D6
BMC_D7
BMC_D8
BMC_D9
BMC_D10
BMC_D11
BMC_D12
BMC_D13
BMC_D14
BMC_D15

x00_PL_060203: removed implicit

+3.3V_AUX

0.1uF 16V

44-46
44-46
44-46
44-46
44,45
44,45
44,45
44,45
44,45
44,45
44,45
44,45
44,45
44,45
44,45
44,45

1 2

10V-10%

CB529

1 2

1uF

17MEY is StdPwr 64kx16 = $1

CB535

22uF 6.3V

CB524

21

+3.3V_AUX

21

+3.3V_AUX

+3.3V_AUX

NP

21

R1837

X

+3.3V_AUX

21

8.2K-5%

42,44
44-46
45,46

x00_PL_060203: Added external flash and pullup in case 2178 is not ready

+3.3V_AUX

x00_pl_060503

0.1uF 16V

this is A20

BMC_FAN5_TACH
BMC_RD_N
BMC_WR_N

NC_RY_BY_15

44-46
44-46
44-46
44-46
44-46
44-46
44-46
44,45
44,45
44,45
44,45
44,45
44,45
44,45
44,45
44,45

44
42,44
42,44

BMC_A1
BMC_A2
BMC_A3
BMC_A4
BMC_A5
BMC_A6
BMC_A7

BMC_A8

BMC_A9
BMC_A10
BMC_A11
BMC_A12
BMC_A13
BMC_A14
BMC_A15
BMC_A16
BMC_A17
BMC_FAN3_TACH

BMC_FAN4_TACH

NP

26

CE

28

OE

11

WE

47

BYTE

12

RESET

15

RY/BY

25

A0

24

A1

22

A3

21

A4

20

A5

19

A6

18

A7

8

A8

7

A9

6

A10

5

A11

4

48
17
16

A12

3

A13

2

A14

1

A15
A16
A17
A18

X

U_FLASH

29LV/W800

VCC

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8A2

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14

DQ15/A-1

VSS1
VSS2

NC1

NC2

NC3

NC4

37

29
31
33
35
38
40
42
44
3023
32
34
36
39
41
43
45

27
46

9
10
13
14

BMC_D0
BMC_D1
BMC_D2
BMC_D3
BMC_D4
BMC_D5
BMC_D6
BMC_D7
BMC_D8
BMC_D9
BMC_D10
BMC_D11
BMC_D12
BMC_D13
BMC_D14
BMC_D15

NC_UFLASH_9
NC_UFLASH_10
NC_UFLASH_13
NC_UFLASH_14

44-46
44-46
44-46
44-46
44,45
44,45
44,45
44,45
44,45
44,45
44,45
44,45
44,45
44,45
44,45
44,45

1 2

0.1uF 16V

C1665

21

C1666

0.1uF 16V
1 2

C248

BMC LOG/FRU SEEPROM

+3.3V_AUX

U21

1

A0

2

A1

3 6

A2 SCL

4

GND1

24C02

SUB*_U3169

220

2 1

R333

FW - SEL U3169

PROG-PART SPEC 14967
DISK PROG
BLANK PART

VCC

GND2

SDA

8
7

I2C_SEG2_VAUX_SCL

5

I2C_SEG2_VAUX_SDA

BLANK = 5E703 16KX8

Programmed P/N = XXXXX ???

T3355
5E703

1

5,44,45,59
5,44,45,59

2

ROOM=BMC

X02_PL_091503: Added pullup to BMC_GPIO_45
X02_PL_081903: Added pullup to BMC_A0

X02_PL_081903: Added pullup to FANSPEED_4

BMC SRAM

5,44,45,59
5,44,45,59

I2C_SEG2_VAUX_SCL
I2C_SEG2_VAUX_SDA

Sets ADT7460 addr =2Eh

NC_7460_TACH1
NC_7460_TACH2
NC_7460_TACH3

NC_7460_TACH4

NC_7460_PWM1
NC_7460_PWM2

+3.3V_AUX

R1779

1 2

8.2K-5%

1

16

6
7
4
9

15

5
8

X00_TL_051603

SCL
SDA

TACH1
TACH2
TACH3
TACH4/ADDRESS_SELECT/THERM

PWM1
PWM2/SMBALERT
PWM3/ADDRESS_ENABLE

U3

ADT7460

VCC

GND

D1+
D1­D2+
D2-

2.5V/SMBALERT

3

2

13
12
11
10

14

C1761

+3.3V_AUX

0.1uF 16V
1 2

NC_7460_SMBALERT_N

C20

0.1uF 16V

C1762

1 2

0.1uF 16V

C1763

0.1uF 16V

ROOM=PROC_2

C1592

21

PART_NUMBER=79015

1000pF

50V-10%

C741

21

PART_NUMBER=79015

1000pF

50V-10%

NP

0.1uF 16V
1 2

C1590

X

1 2

NP

C1591

0.1uF 16V

X

R1856

1 2

0-5%

R1857

1 2

0-5%

R1858

1 2

0-5%

R1859

1 2

0-5%

H1_THRM_AN

H1_THRM_CA

H2_THRM_AN

H2_THRM_CA

12

12

12

12

TEMP near DIMMs

U27

5,44,45,59

5,44,45,59

PROPAGATION_DELAY=L:S::500

x00_pl_060503

I2C_SEG2_VAUX_SDA

I2C_SEG2_VAUX_SCL

NC_U27_3

R336

21

0-5%

1

SDA

2

SCL

3

OS

4

GND

LM75

SUB*_5Y977

subbed to 3.3v flavor

GOING WITH LM75 (No data low reset feature, but immune to noise..qual'd by CSD).

VFPCP

41

VCC

A0

A1

A2

8

7

6

5

220

2

+3.3V_AUX

R589

12

3

FANSPEED_4

44
44

44

44

44

44

BMC_A0

BMC_GPI_72
BMC_PIN_62

BMC_PIN_61
BMC_GPIO_45

1 2

8.2K-5%
R4505

8.2K-5%
R4504

21

1 2

8.2K-5%
R1845

8.2K-5%

21

+3.3V_AUX

8.2K-5%

R1844

1 2

8.2K-5%

R1843

x00_gt_061903

PROCESSOR TEMP PROBES

LOCAL Ambient TEMP CAN BE READ FROM THIS SENSOR

R6

21

+3.3V_AUX

ADDRESS 2EH

NET_PHYSICAL_TYPE=10

x00_sd_051703

LI_BAT_PACK_P

31

R544

1 2

3.01K-1%

NET_PHYSICAL_TYPE=10

Q94

2N7002

G

1

D
3

S
2

NET_PHYSICAL_TYPE=10

1 2

3.01K-1%

0.1uF 16V

R545

A2D_ROMB_BAT

1 2

C629

44

3

RAID BATTERY A2D INPUT CIRCUIT

4

44

24,25,44

44,46

44
33,44,50
32,44,50
33,44,50
33,44,50

44

44

33,44

BMC_STBY
NIC_ALERT_N
BMC_ALERT_N
BMC_FWE
BMC_RDY_N
IPMB_RST_N
RAC_PRSNT_N
RAC_RDY_N

BMC_GPIO_22
BMC_GPIO_23

BMC_GPI_71

44

BMC_GPI_73

44

BMC_GPIO_18

44

BMC_PIN_51

44

BMC_SMI_N

BMC_TYPE0

46

BMC_TYPE1

46

X03_GT_010703

1 2

8.2K-5%

4.7K

R639

21

8.2K-5%

R638

1 2

8.2K-5%

R637

R636

21

1 2

8.2K-5%

8.2K-5%

R635

21

8.2K-5%

R634

21

8.2K-5%

R628

1 2

8.2K-5%

R629

21

8.2K-5%

R630

1 2

8.2K-5%

R631

R1763

21

1 2

8.2K-5%

8.2K-5%

R1761

R1762

21

1 2

8.2K-5%

8.2K-5%

R1708

1 2

R1709

1 2

100-5%

100-5%

R1710

1 2

R1711

ROOM=BMC

BMC_TYPE0

0 0

1

1 1

BMC_TYPE1

10

0

DELL Embedded BMC

ODM Embedded BMC

BMC Mezzanine

For ADT7460 ECAD to Ensure:

Chip is placed over ground plane. near CPUs.

THRM_AN and THRM_CA signals are referencing ground plane.

·THRM_AN and THRM_CA signals are routed away from high voltage (+12V, etc.) traces.

·THRM_AN and THRM_CA signals are routed away from noisy traces (clocks, VRMs, etc.).

·THRM_AN and THRM_CA signals are routed as a differential pair, use guard traces around them.

·THRM_AN and THRM_CA signals are routed using wide traces to minimize noise pickup.

·Place differential cap near pins 10 & 11 and 12 & 13.

·Place common mode caps near pin 15 & 17.

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

BMC

TITLE

DWG NO.

DATE

COMPUTER
CORPORATION

AUSTIN,TEXAS

SCHEM,PLN,SV,PE2800/2850/1850

D1660

12/16/2004

SHEET

45 OF 60

4

REV.

A03-00

subsys done

A B

DC

45

+3.3V_AUX

B D

CA

1

44

44

44

44,46

44
44

44,46

1 8

4.7K-5%
RN208

4.7K-5%

BMC_TCLK

BMC_TRST_N

BMC_TDO
HUDI_RESET_N
BMC_TMS
BMC_TDI

HUDI_RESET_N
RESET SENSE LINE TO HUDI

2 7

4.7K-5%

4 5

RN208

RN208

3 6

4.7K-5%

4.7K

RN208

12

R535

4.7K

R536

12

BMC HUDI JTAG

a00_tj_052604

NP

HUDI

1
3
5
7

X

2
4
6
8
109
1211
1413

+3.3V_AUX

SENSE_HUDI_GND_N

1

46

2

x00_pl_052103: added a7

x00_sd_051903

44,45
44,45
44,45
44,45
44,45
44,45
44,45
33,41

BMC_CPLD R3354

BMC_A1
BMC_A2
BMC_A3
BMC_A4
BMC_A5
BMC_A6
BMC_A7

3.3VAUX_PWRGOOD_ICH_ESM

PROG-PART SPEC 14967
DISK PROG
BLANK PART

91

IO1/A0

92

IO2/A2

93

IO3/A4

94

IO4/A6

97

IO5/A8

98

IO6/A10

99

IO7/A12

100

IO8/A14

BMC_CPLD

R3356
8T177

IO1/E0
IO2/E2
IO3/E4
IO4/E6

IO5/E8
IO6/E10
IO7/E12
IO8/E14

41
42
43
44
47
48
49
50

H1_CPU_PRES_N

H2_CPU_PRES_N
VRD1_THERMTRIP_N
VRD2_THERMTRIP_N

BACKPLANE_PRES_N

PARAPORT_PRES_N

SER_MODE_3B_N
LED_CTRL2

5,32
33,43

42

5,12
5,12
5,9

x02_PL_091703: Connected VRD Thermtrip

5,9

x02_PL_091503: Moved PARAPORT_PRES_N to CPLD

48

x00_pl_052103: moved led_ctrl cuz pin 62 is input only

BMC BOOT MODE SEL JUMPER

2

+3.3V_AUX

3

x00_pl_060603

PWRBTN/NMI DISABLE

x00_pl_052103: added monitoring of IERR

x00_pl_052103: moved pins cuz pin 12 is input only

x00_pl_052103: added monitoring of THERMTRIP

x00_sd_061203 - connected nets

44,45
44,45
44,45
44,45

5,15
5,15

5,15

44,45

40,44
44,45

40,44,46

5,44,50

x00_pl_090803: Added PCI_RST to CPLD

x00_pl_052903: Moved PWR_LED to CPLD

36,40,44

BMC_D0
BMC_D1
BMC_D2
BMC_D3
NC_BMC_CS4_IERR3
H2_IERR_3V
H1_IERR_3V
NMI_BUTTON_DISABLE

56

H1_THERMTRIP_3V

BMC_RD_N
BMC_WR_N

45

BMC_EXGP_CS_N

44

BMC_RESET_N
BMC_ALERT_N
BMC_MD1
SYSTEM_PWRGOOD_ESM
PWR_BUTTON_DISABLE

56

PCI_RST_PLANAR_2_N

PS1_PRES_N

31

PS2_PRES_N

31

PWR_LED

32

PS1_ALERT_N

31

PS2_ALERT_N

31

SHIFTY_BMC_DATA_UP_R

5

SHIFTY_BMC_DATA_DN

5

NC_BMC_CS3_IERR4
BMC_TYPE1

45

3
4
5
6
8

9
10
11
12

23
22
21
20
19
17
16
15
14

37
36
35
34
31
30
29
28
27

IO1/B0
IO2/B2
IO3/B4
IO4/B6
IO5/B8
IO6/B10
IO7/B12
IO8/B13
I9/B14

I1/C0
IO2/C2
IO3/C4
IO4/C5
IO5/C6
IO6/C8
IO7/C10
IO8/C12
IO9/C14

IO1/D0
IO2/D2
IO3/D4
IO4/D6
IO5/D8
IO6/D10
IO7/D12
IO8/D13
I9/D14

IO1/F0
IO2/F2
IO3/F4
IO4/F6

IO5/F8
IO6/F10
IO7/F12
IO8/F13

I9/F14

I1/G0
IO2/G2
IO3/G4
IO4/G5
IO5/G6
IO6/G8

IO7/G10
IO8/G12
IO9/G14

IO1/H0
IO2/H2
IO3/H4
IO4/H6
IO5/H8

IO6/H10
IO7/H12
IO8/H13

I9/H14

53
54
55
56
58
59
60
61
62

73
72
71
70
69
67
66
65
64

87
86
85
84
81
80
79
78
77

PFAULT_RESET_R
PFAULT_LATCH_N

SER_MODE_0_1A_N

SER_MODE_1B_N

FAN_LED0

H2_THERMTRIP_3V

NC_THERMTRIP_CPU3

FAN_LED1
FAN_LED2
FAN_LED3
FAN_LED4
FAN_LED5
FAN_LED6
FAN_LED7
FAN_LED8

LED_CTRL0
LED_CTRL1
LED_ID_BLUE
LED_ID_YELLOW

NC_BMC_CS2

NC_THERMTRIP_CPU4

SER_MODE_2_N
SER_MODE_3_N
BMC_LISTEN_N

42

42
42
42
42
42
42
42
42

42

PS1_AC_GOOD
PS2_AC_GOOD

PS_AC_GOOD

5,44

x02_sd

5,44

x02_sd

48
48
48
48,50
48

x00_pl_052103: moved fan_led0 cuz pin 73 is input only

5,15

X00_PL_052003: Changed BLINK_LEDx to LED_CTRLx

42
32,43
32,43

31
31
44

+3.3V_AUX

NP*

p/u on pg. 40

81526 are the jumper plugs

R214

1 2

8.2K-5%

R215

1 2

8.2K-5%

J11

SENSE_HUDI_GND_N

x02_TJ_081803

NP*

1 2

BMC_MD1

46

40,44,46

21

+3.3V_AUX

12
13

14

U7

74VHC08

R167

11

8.2K-5%

BMC_MD2_N

BMC BOOT OPTIONS

MD1 = 1, MD2 = 1: Normal Mode

MD1 = 0, MD2 = 0: Boot Mode

MD1 = 1, MD2 = 0: HUDI Mode

44

3

x00_pl_052103: placed shifty bus here to connect to sys cpld

33

5
5

45

CK_32K_VAUX_BMCCPLD
SHIFTY_BMC_CLK
SHIFTY_BMC_LATCH

BMC_TYPE0

89
38
39
88

46
57
68
82

7
18
32
96

1
26

76

CLK0_I
CLK1_I
CLK2_I
CLK3_I

GND_1_46
GND_1_57
GND_1_68
GND_1_82

GND_0_7
GND_0_18
GND_0_32
GND_0_96

GND_1
GND_26

GND_76

ISPM4128V 75T100C

TCK
TDI
TDO
TMS

VCC01_45
VCC01_63
VCC01_83

VCCO0_13
VCCO0_33
VCCO0_95

VCC_25
VCC_40
VCC_75GND_51
VCC_90

24
2
74
52

45
63
83

13
33
95

25
40
7551
90

CPLD_TCK
CPLD_TD1
CPLD_TD2
CPLD_TMS

5,40
5
5,31
5,31,32,40

Note JTAG Chaining!!!

+3.3V_AUX

10V-10%

1uF

1 2

10V-10%

CB487

1uF

21

10V-10%

CB512

1uF

CB500

21

FOR FLASH through Serial: pop Jumper J11.

4

ROOM=BMC

SUB=SUB*_R3354

BMC Extended GPIO CPLD

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

CPLD detects and forces to serial Mode 1B

BMC goes into Boot mode automatically.

CPLD issues a long BMC reset

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

4

COMPUTER
CORPORATION

AUSTIN,TEXAS

REV.

A03-00

SHEET

46 OF 60

subsys done

A B

DC

A B C

D

1

1

2

2

3

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

I2C ADDRESSES

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE2800/2850/1850

REV.

D1660

SHEET

12/16/2004 47 OF 60

DCBA

4

A03-00

A B C

D

1

+3.3V_AUX

C156

1 2

21

C155

0.1uF 16V

C154

0.1uF 16V

1 2

21

C157

0.1uF 16V

C153

0.1uF 16V

1 2

0.1uF 16V

50
50
50
50
50
50
50
50

SER_SOUT1
SER_SIN1
SER_DTR1_N
SER_DSR1_N
SER_RTS1_N
SER_CTS1_N
SER_DCD1_N
SER_RI1_N

+3.3V_AUX

21

R565

7

8

RN82

8.2K-5%

2

1

+3.3V_AUX

SERIAL MUX

5

6

+3.3V_AUX

8.2K

4

3

46,50

SER_MODE_3_N

R229

1 2

8.2K-5%

19

11
13
15
17

+3.3V_AUX

U13

1

1G
2G

2

1A1

4

1A2

6

1A3

8

1A4
2A1
2A2
2A3
2A4

VCC

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

20

18
16
14
12
9
7
5
3

NC_SER_RPACK

8

RN209

1

7

6

5

1

8.2K

2

3

4

SER_SOUTA
SER_SINA
SER_DTRA_N
SER_DSRA_N
SER_RTSA_N
SER_CTSA_N
SER_DCDA_N
SER_RIA_N

35
35
35
35
35
35
35
35

SIGNALS CONNECT TO XCVR

2

SIGNALS CONNECT TO SIO

+3.3V_AUX

R566

1 2

R567

8.2K-5%

1 2

8.2K-5%

x02_pl_091803: Pulled RI to 3.3VAux it is monitored at power off

+3.3V_AUX

SIO_SOUTA

40

SIO_SINA

40

SIO_DTRA_N

40

SIO_DSRA_N

40

SIO_RTSA_N

40

SIO_CTSA_N

40

SIO_DCDA_N

40

SIO_RIA_N

+3.3V_AUX

21

R217

+3.3V_AUX

8.2K-5%
R1765

1 2

40

8.2K-5%

+3.3V_AUX

U11

R564

1 2

8

7

RN81

8.2K-5%

1

2

+3.3V

6

5

3

4

x00_tj_050103

8.2K
BMC_LISTEN_N

46

SER_MODE_1B_N

46

44,48

44,48
44,48
44,48

QS3244

SUB*_C2406

x02_tj_081803

+3.3V_AUX

21

R228

BMC_RX0
NC_U14_4 NC_U14_16
NC_U14_6

BMC_TX0
BMC_RTS0_N
BMC_CTS0_N

21

8.2K-5%

R1764

8.2K-5%

1

1G

19

2G

2

1A1

4

1A2

6

1A3

8

1A4

11

2A1

13

2A2

15

2A3

17

2A4

SUB*_C2406

U14

QS3244

VCC

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

+3.3V_AUX

20

18
16

NC_U14_14

14

NC_U14_12NC_U14_8

12
9
7
5

NC_U14_3NC_U14_17

3

x02_tj_081803

2

This page will not be ROOM'ed.

3

50
50
50

48,50

50
50

+3.3V_AUX

44,48
44,48
44,48
44,48

8

BMC_RX0
BMC_TX0
BMC_CTS0_N
BMC_RTS0_N

6

7

SER_MODE_2_N

46

NC_U11_19

NC_U11_11
NC_U11_13
NC_U11_15
NC_U11_17

+3.3V_AUX

5

1

1G

19

2G

2

1A1

4

1A2

6

1A3

8

1A4

11

2A1

13

2A2

15

2A3

17

2A4

QS3244

SUB*_C2406

VCC

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

20

18
16
14
12
9
7
5
3

NC_U11_9
NC_U11_7
NC_U11_5
NC_U11_3

x02_tj_081803

VCC

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

+3.3V_AUX

20

18
16
14
12
9
7
5
3

R216

RN85

2

1

NC_RN85_1

SER_SIN2
SER_SOUT2
SER_DSR2_N
SER_DTR2_N
SER_CTS2_N
SER_RTS2_N

NC_U16_17 NC_U16_3

X00_TL_061103_Added SIO_DCD to short to SIO_DSR via SER_DTR2_N.

8.2K

4

3

SER_MODE_3B_N

46

1 2

8.2K-5%

1

19

2
4
6

8
11
13
15
17

x02_tj_081803

U16

1G
2G

1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

QS3244

SUB*_C2406

+3.3V_AUX

SER_MODE_0_1A_N

46

R227

1 2

8.2K-5%

1

19

2
4
6

8
11
13
15
17

U15

1G
2G

1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

QS3244

SUB*_C2406

VCC

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

20

18
16
14
12
9
7
5
3

+3.3V_AUX

x03_tj_010604

R6008

1 2

33-5%

x02_tj_081803

6647D sub is an SSOP with more on the AVL

3

Explanation of U16 twisting logic.

4

subsys done

NULL MODEM BETWEEN RAC AND SIO

NULL MODEM BETWEEN BMC AND SIO

BMC, Serial Port Muxing

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE2800/2850/1850

REV.

D1660

SHEET

12/16/2004 48 OF 60

DCBA

4

A03-00

A B C

D

1

1

2

2

3

3

4

SERIAL PORT MUXING LOGIC

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.

C

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE2800/2850/1850

REV.

D1660

SHEET

12/16/2004 49 OF 60

DBA

4

A03-00

B D

CA

12-16-2004_19:51

1

ROOM=RAC

+3.3V

1

+3.3V_AUX

2

3

Ground pads for EMI suppression on RAC

RACGND1

GNDPAD

304x305

RACGND2

GNDPAD

304x305

x04_sd

31,33,36,50,58

PCI_Clock splits on DC

PROPAGATION_DELAY=L:S::500

PCI0_AD21

x03_sd changed port number

150-5%

R1481

12

+3.3V_AUX

33
33

3

33
33

31,33,36,58

31,33,36,58
31,33,36,58
31,33,36,58

31,33,36,58
31,33,36,58
31,33,36,58

31,33,36,58

31,33,58

31,33,36,58

31,33,36,58
31,33,36,58
31,33,36,58

31,33,36,58
31,33,36,58

31,33,36,50,58

31,33,36,58
31,33,36,58
31,33,36,58

31,33,36,58
31,33,36,58

31,33,58

33

50

33

33

37

SER_DCD1_N

48

SER_DSR1_N

48

SER_SIN1

48

SER_RTS1_N

48

SER_SOUT1

48

SER_CTS1_N

48

SER_DTR1_N

48

SER_RI1_N

48

ICH_PIRQ_RAC_A_N
ICH_PIRQ_RAC_C_N

CK_33M_RAC

PCI0_REQ_RAC_N
PCI0_GNT_RAC_N
PCI0_AD2

PCI0_AD4
PCI0_AD6
PCI0_CBE0_N

PCI0_AD9
PCI0_AD11
PCI0_AD13

PCI0_AD15
PCI0_SERR_N
PCI0_TRDY_N

PCI0_STOP_N
PCI0_PAR
PCI0_CBE2_N

PCI0_AD17
PCI0_AD19
PCI0_AD21

PCI0_AD23
PCI0_AD24
PCI0_AD26

PCI0_AD28
PCI0_AD30
PCI0_LOCK_N
PCI0_SP_IDSEL

PCI0_REQ_RAC_IDE_N

I2C_IPMB_RAC_SCL

USB_RAC0-

USB_RAC0+

ATI_M6C8_TXCM

37

ATI_M6C8_TXCP

37

ATI_M6C8_TX2M

37

ATI_M6C8_TX2P

37

ATI_M6C8_TX1M

37

ATI_M6C8_TX1P

37

ATI_M6C8_TX0M

37

ATI_M6C8_TX0P

37

ATI_M6C8_DVIDDCDATA

A1
A2
A3
A4
A5
A6
A7
A8

A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70

RAC_CONN

B1
B2
B3
B4
B5
B6
B7
B8

B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70

SER_DSR2_N

SER_RTS2_N

SER_CTS2_N

SER_DTR2_N

ICH_PIRQ_RAC_B_N

ICH_PIRQ_RAC_D_N

NC_RAC_CONN_B14

PCI0_GNT_RAC_IDE_N

I2C_IPMB_RAC_SDA

SYSTEM_PWRGOOD_ESM

NC_RAC_CONN_A57

ATI_M6C8_DVIDDCCLK

+5.0V Riser

48

SER_SIN2

SER_SOUT2

PCI_RST_RAC_N

PCI0_AD0
PCI0_AD1
PCI0_AD3

PCI0_AD5
PCI0_AD7
PCI0_AD8

PCI0_AD10
PCI0_AD12
PCI0_AD14

PCI0_CBE1_N
PCI0_PERR_N
PCI0_IRDY_N

PCI0_DEVSEL_N

PCI0_FRAME_N

PCI0_AD16

PCI0_AD18
PCI0_AD20
PCI0_AD22

PCI0_CBE3_N

PCI0_AD25
PCI0_AD27

PCI0_AD29
PCI0_AD31

BMC_RDY_N

SER_MODE_3_N

NC_RAC_CONN_A59

NC_RAC_CONN_B63

NC_RAC_CONN_A64
NC_RAC_CONN_A65
NC_RAC_CONN_A66

48
48
48
48

48

33

33

5

31,33,36,58
31,33,36,58
31,33,36,58

31,33,36,58
31,33,36,58
31,33,36,58

31,33,36,58
31,33,36,58
31,33,36,58

31,33,36,58
31,33,58
31,33,36,58

31,33,36,58
31,33,36,58
31,33,36,58

31,33,36,58
31,33,36,58
31,33,36,50,58

31,33,36,58
31,33,36,58
31,33,36,58

31,33,36,58
31,33,36,58

33

50

33,44,45

46,48

5,44,46

RAC_RDY_N

+3.3V

37

+3.3V_AUX

RAC Serial Mode is on.

IPMB_RST_N

33,44,45

32,44,45

PCIO_RACIDE_IDSEL

32,44,59

32,44,59

+3.3V

1 2

C1662

+3.3V_AUX

1 2

C1752

RAC_PRSNT_N

21

C1663

0.1uF 16V0.1uF 16V

21

C1760

150-5%

R47

I2C_IPMB_SCL

1 2

C1664

0.1uF 16V

0.1uF 16V

PCI0_AD22

12

33,44,45

0.1uF 16V

PROPAGATION_DELAY=L:S::500

31,33,36,50,58

R448

0-5%

21

I2C_IPMB_RAC_SCL

R449

1 2

0-5%

+5.0V Riser

0.1uF 16V
1 2

I2C_IPMB_RAC_SDAI2C_IPMB_SDA

C17

x02_sd_added cap

R489

1 2

4.7K
NP*

21

R491

4.7K
NP*

50

50

2

3

CONN2X70 PLUG

EXTENDED HEIGHT

SUB=SUB*_U1474

ADD*_N1870
ADD*_N1870

Stand-offs for RAC card

ADD*_N1870

4 4

ADD*_N1870

INC.

ROUND ROCK,TEXAS

Rilato RAC Daughter Card Interface Connector

TITLE

subsys done

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

DC

REV.

A03-00

SHEET

50 OF 60

B D

CA

12-16-2004_19:51

1

1.2V CPU I/O (VTT)

Input

Output

Max Current

Dest

Vout

+1.5v

+1.2V

6.0A Peak, ~3.5A Thermal

CPU I/O (VTT)

0.8*(1+R1/R2) = 1.21v

+1.5V

Q9

D

4

ISL9N312AD3ST

C906

21

C902

10uF 6.3V

1

21

1uF

10V-10%

C903

21

x02_sd

0.1uF 16V

2

5.11k, 1% Res's are subbed to P3882, 5.11k, 0.1%

+CPU_VTT

12

C901

1 2

5,6,59

Note, this enable signal is active low for the 6521.

This is opposite of the 40W DCDC on page 6.

DC2DC_CPUVTT_EN

R906

1uF 6.3V

3

S

100-1%

8.2K-5%

1
G

R901

1 2

VCC

x03_sd added res

1 2

R59

4.75K-1%
1 2

5.11K-1%

SUB*_P3882

D40

31

1N914

R902

R900

1 2

511-1%

R903

X

1 2

NP

R907

1 2

1K-5%

VCC VCC

1K-5%

1 2

1M-5%

1K-5%

R909

R904

1 2

21

R905

21

5.11K-1%5.11K-1%

R908

todo tune resistors, change to 0.1%

SUB*_P3882

SUB*_P3882

6521DRIVE2
6521FB2

NC_6521_13

1

DRIVE2

2

FB2

15

DRIVE3

16

FB3

13

DRIVE4

14

FB4

5 4

GND COMP

VCC

C904

1 2

U6

1uF

10V-10%

C905

1 2

VCC

OCSET

BOOT
UGATE
PHASE
LGATE

PGND

FB

11
12
7
8
6
10
9
3

0.1uF 16V

NC_6521_8NC_6521_15

NC_6521_10

6521FBPWM

NC_6521_4

6521OCSET

1K-5%

1 2

R910

+CPU_VTT

+

C18

2 1

560uF

4V-20%

C19

+CPU_VTT

+

C6009

2 1

+

560uF

4V-20%

560uF

2 1

4V-20%

C6010

2 1

+

560uF

4V-20%

2

For layout investigation. X04_GT_032204

3

(1.2v)

+CPU_VTT

R1930

1 2

HIP6521

Q150

3904

1

+3.3V_AUX

21

R1931

3

1K-1%

CPU_VTT_PWRGOOD

This is inverted

5,6

1K-5%

R911

21

3

499-1%

R1932

1 2

2

X03_GT_011404

2.49K-1%

4 4

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

51 OF 60

DC

A B

B D

CA

12-16-2004_19:51

1

+12V

21

C1740

10uF

16V 10%

C1741

1 2

10uF

16V 10%

21

C1742

10uF

16V 10%

C1743

1 2

10uF

16V 10%

extra p/u's for derating

21

x02_sd

NP13

R1899

4.7K

R1900

NP13

1 2

+3.3V

4.7K
NP13

21

R1901

4.7K
NP13

+12V

R1616

1 2

4.7K
NP13

R1618

560

x02_sd_allows faster switch speeds

Q132

NP*

3904

1

21

1

VCC

D61

12

NP13

3

2

2

NP*

21

R1903

NP13

3

S

4.7K

.01uF 50V

MBRS340T3

DPAK

G

1

.01uF 50V

C1594

1 2

D

4

20P03

C1593

1 2

Q122

NP*

R1619

1 2

R1621

.604-1%

1 2

.604-1%.604-1%

SUB02_782NY

SUB02_782NY

NP13

NP13

FANPWR_ZONE1

42

ROOM=FANS_FRONT

2

42,44

Have p/u on pg 42

FANSPEED_1

NP*

R1757

1 2

Q123

8.2K-5%

2N7002

1

G

NP13

R1617

NP13

0-5%

1 2

D

3

S

2

NP*

1

3906

Q133

R1620

3

VCC

NP13

NP13

D62

2 1

MBRS340T3

1 2

R1622

.604-1%

1 2

SUB02_782NY

12

+

C1595NP13

--STUART 12/9/2002

270uF

16V-20%

SUB ALL TO 1 OHM

NP13

SUB02_782NY

NP13

0-5%

1 2

NP13

R1758

0-5%

21

NP13

R1613

0-5%

R1614

21

NP13

0-5%

1 2

R1615

NP13

x02_sd_added R1891 and R1892 for proper derating.

0-5%

1 2

NP13

R1891

0-5%

21

NP13

R4511

Number of zero-ohm's required:

Zero-ohm's rated at 1 A.
Derating by 60% of power, current is derated to sqrt(60%) = 77.46%.
Max current with derating per zero-ohm is .7746 A.
Need 2A per fan, thus 4A total.
Thus, need ceiling( 4 / .7746 ) zero-ohm's.

= 6.

2

3

resistor is NP* so that the rest of the circuit can be populated yet not used

extra p/u's for derating

x02_sd

Have p/u on pg 42

42,44

21

R1892

NP13

FANSPEED_3

4.7K
NP13

R1893

1 2

+3.3V

NP*

R1624

21

4.7K
NP13

2N7002

21

R1894

Q125

8.2K-5%

G

NP13

4.7K

NP*

1

+12V

R1625

NP13

R1623

D

S

DPAK

D

3
S

G

1

NP13

.01uF 50V

1 2

NP13

21

4.7K

R1626

1 2

21

0-5%

3

2

NP13

NP*

560

NP*

Q134

3904

1

1

3906

Q135

3

2

2

3

NP*

21

R1904

4.7K

4

20P03

C1598

1 2

.01uF 50V

C1597

Q124

NP*

21

R1627

21

R1628

C1600NP13

21

R1629

21

R1630

.604-1% .604-1%

+

270uF

2 1

.604-1%

SUB02_782NY

.604-1%

SUB02_782NY

16V-20%

SUB02_782NY

SUB02_782NY

NP13

NP13

SUB ALL TO 1 OHM

NP13

NP13

FANPWR_ZONE3

42

ROOM=FANS_FRONT

3

extra p/u's for derating

21

4.7K

R1895

NP*

Have p/u on pg 42

42,44

FANSPEED_2

NP*

R1896

NP*

1 2

+3.3V

R1631

1 2

4.7K
NP*

2N7002

21

R4506

Q127

8.2K-5%

G

NP*

4.7K

1

NP*

NP*

+12V

R1632

1 2

R1633

1 2

D

3

S

2

4.7K

0-5%

NP*

NP*

R1634

560

NP*

21

Q136

3904

1

1

3906

Q137

--STUART 12/9/2002

VCC

D63

12

MBRS340T3

NP*

DPAK

D

3
S

3

2

2

3

NP*

21

R1905

G

NP*

4.7K

NOT POPULATED FOR ANY BUILD

1

.01uF 50V

1 2

NP*

4

20P03

C1602

1 2

.01uF 50V

C1601

Q126

NP*

R1635

1 2

R1636

1 2

C1667

1 2

SUB9_782NY

.604-1% .604-1%

10uF

C1668

16V 10%

NP0123

SUB ALL TO 1 OHM

NP0123

SUB9_782NY

21

10uF

C1669

16V 10%

FANPWR_ZONE2

42

ROOM=FANS_REAR

21

10uF

1 2

C1670

16V 10%

10uF

16V 10%

NP*

4 4

x03_sd

NP*

NP*

NP*

INC.

ROUND ROCK,TEXAS

FAN SPEED CONTROL

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

52 OF 60

A B

DC

B D

CA

12-16-2004_19:51

1

1

Micro-Vu, not part of design, implemented only on break-away board

2

2

3

REMOVED

3

4 4

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL

subsys done

AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

A B

DWG NO.

DATE

DC

D1660

12/16/2004

REV.

A03-00

SHEET

53 OF 60

B D

CA

12-16-2004_19:51

1

1

3.3VAux from PS

2

31,54

3.3VAux directly from power supplies.

P3V3AUX_PS

1uF 6.3V

1 2

C1622

1 2

8.2K-5%

TLV431A

53

R1780

NP*

VAKILL_1V24_REF

NP*

D67

4

50V-10%

2200pf

2 1

C1652

NP*

4

10K-1% 3.01K-1%

R1781

21

R1782

PwrGood Detect

Detects when VAux has been depleted (<287mV).

NP*

VAKILL_287MV_REF

NP*

+3.3V_AUX

8.2K-5%
R1832

21

NP*

Voltage Depletion Detect

VAUX_GOOD

Enables Pwr FET's once VAux is depleted by driving low.

1 2

NP*

C1660

2200pf

50V-10%

5

4

8.2K-5%

12

NP*

U62
3

LMV339

+

V

G

-

2

12

R1783

NP*

VAKILL_PWR_EN_N

5

8.2K-5%

21

VAUX_DEPLETED

keeping VAKILL_PWR_KILL_N asserted until VAKILL_PWR_EN_N

R1784

NP*

1N914

D72

31

Reset

SR FF

Set

Q

Once Pwr FET's are turned off, this Op-Amp completes the flip-flop

is restarted by the depletion detect Op-Amp.

1 2

8.2K-5%
R1831

NP*

These two Op-Amps

NP*

8.2K-5%

NP*

U62
3

7

+

6

-

LMV339

V

G

1

12

R1786

21

NP*

make an SR Flip-Flop.

NP*

Q129

SI4463DY

4

D1 D4

3.3VAux to systemPwr Supervisor Chip
R1852

31,54

NP*

Q130

S3S2S1

321

G

SI4463DY

D3D2

765 8

G

4

D1 D4

S3S2S1

1 2 3

D3D2

85 6 7

+3.3V_AUX

P3V3AUX_PS

3.3VAux distributed to system.

1 2

0-5%

R1853

21

0-5%

R1854

1 2

0-5%

R1855

21

0-5%

R1974

21

0-5%

R1975

1 2

0-5%

R1976

21

0-5%

R1977

1 2

0-5%

+3.3V_AUX

2

x03c_sd added addition 0 ohms

3

21

0.1uF 16V
C1629NP*

12

DS1818

NP0123

SUB2=SUB9_Y1351

1

NP*

2

VCC

GND

3

U63

RESET

8.2K-5%

1

R1797

12

VAKILL_PG

2

Detects when VAux has gone out of spec.

VAUXKILL_1V65_REF

NP*

U62
3

11

10

+

-

LMV339

V

G

13

12

Simple acts as open-drain buffer.

3

While VAux is not of spec., this is driven low...

VAKILL_PWR_KILL_N

8.2K-5%

....which turns off the Pwr FET's.

1 2

R1785

NP*

Turn-on time:

Start condition: Vc1=Vgs, Vc2=0, Vc=0
Finish Condition, Vc1=Vgs, Vc2=3.3, Vc=3.3
Turn-on time dictated by charge rate of C.
Q=CV=0.1uF*(3.3V-0.0V)=330nC

U62

9

8

3

+

V

G

­12

NP*

LMV339

14

NP*

R1787

1 2

47K-5% 0.1uF 16V

VAKILL_PWR_EN_N_RC

x00_tj_061403

Limits turn-on and turn-off.

C1623

NP*

1 2

301-1%

1 2

R1789NP*

301-1%

When turning on, Vr1=0, Vr2=2.7
Ir=2.7/47k=57.4uA
tI=Q -> t=Q/I
Turn on time= 330nC/57.4uA
= 5.75mS

R1788NP*

Max current = 3.3/150 = 22mA
Current at depletion = 0.287/150 = 1.9mA

21

3

Hastens depletion of VAux

D

3

Q131

NP*

2N7002

1

G

S

2

ROOM=VAUX_RESET

x00_sd_051903

4 4

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

INC.

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

DC

ROUND ROCK,TEXAS

REV.

A03-00

SHEET

54 OF 60

B D

CA

12-16-2004_19:51

1

2

21

R1352

GPO_FWH_WP_N

33

4.7K

1
2
3
4

RN174

8.2K

59

X03b_GT_012204

8
7
6
5

FWH_ID0

21

C833

0.1uF 16V

5,40

5,33,40,44,59
5,33,40,44,59
5,33,40,44,59
5,33,40,44,59
5,33,40,44,59

+3.3V

21

R760

8.2K-5%

+3.3V

21

C830

FWH_IC

PCI_RST_SIO_FWH_N

CK_33M_FWH

3

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME_N

PROPAGATION_DELAY=L:S::500

PROPAGATION_DELAY=L:S::500

FWH_TBL_N

R52

1 2

470

R50

21

470

0.1uF 16V

FWH_WP_N

C831

1 2

0.1uF 16V

U50

10

VCC1

31

VCC2

39

VCCA

11

VPP

2

IC

12

RST

9

CLK

25

FWH0

26

FWH1

27

FWH2

28

FWH3

38

FWH4

24

ID0

23

ID1

22

ID2

21

ID3

20

TBL

19

WP

29

GND1

30

GND2

40

GNDA

CAMINO FWH

TSOP40

82802AB - 4Mb
82802AC - 8Mb

SUB*_U3146

21

C832

0.1uF 16V

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8

7
15
16
17
18
32
33
34
35
36
37

1
3
4
5
6
8
13
14

FGPI4
FPGI3
FPGI2
FPGI1
FPGI0

RFU1
RFU2
RFU3
RFU4
RFU5
INIT

NC_FWH_RFU1
NC_FWH_RFU2
NC_FWH_RFU3
NC_FWH_RFU4
NC_FWH_RFU5

NC_FWH_NC1
NC_FWH_NC2
NC_FWH_NC3
NC_FWH_NC4
NC_FWH_NC5
NC_FWH_NC6
NC_FWH_NC7
NC_FWH_NC8

FWH_FGPI4

FWH_FGPI3
FWH_FGPI2
FWH_FGPI1
FWH_FGPI0

ROOM=FWH

+3.3V

R1314

1 2

8.2K-5%
1
2
3
4

59

RN173

8.2K

H_INIT_N_3V

8
7
6
5

+3.3V

R1571

1 2

3

2

330-5%

Q73

3904

1

+3.3V

21

R1576

3

2

470

Q74

3904

1

R1575

470

FWH U3146

PROG-PART SPEC 14967
DISK PROG
BLANK PART

21

H_INIT_N

11,33

Y2955
N1992

1

2

3

5688T---Socket
6C739---SSMicro FWH 4Mbit

3

5906D---Intel FWH 8Mbit
N1992---Multi Vender AVL

FWH

4 4

INC.

ROUND ROCK,TEXAS

TITLE

FIRMWARE HUB

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

REV.

A03-00

SHEET

55 OF 60

DC

subsys done

A B

B D

CA

1

USB 2.0 Connection

+5.0V Riser

21

FS6

6V

1.5A

1

2

x02_tj_081803

x00_tj_060603

16V-20%

21

C1287

0.1uF 16V

X00_GT_051303

100uF

+

21

16V-20%

C1204

100uF

+

1 2

C1203

USB_1

USB

16V-20%

100uF

+

1
2
3
4

21

C6006

USB_P4-_L
USB_P4+_L

L116

1 2

FERRITE

1812-1.5A

21

C1308

470pF

50V-10%

21

R1240

V_5P0_USB_BACK45_N

8.2K-5%

L122

SUB*_8M262

2 1

3

3

CM CHOKE

DLW21SN900SQ2

12

4

33

ROOM=USB

2

x03_sd changed port numbers

USB_BACK4-

4

USB_BACK4+

33

33

3

BTN_RST

1

2

PUSH BUTTON

NP01

X00_GT_051303

<500 mils

length matched +/-10 mils

ROOM=SW

+3.3V_AUX

8.2K-5%

3

4

21

R343

RESET_BTN_N

<500 mils

5

length matched +/-10 mils

USB_2

USB

L123

1
2
3
4

USB_P5-_L
USB_P5+_L

1 2

C1309

470pF

50V-10%

2 1

3

3

CM CHOKE

DLW21SN900SQ2

SUB*_8M262

12

4

4

USB_BACK5-

USB_BACK5+

length matched +/-50 mils

33

33

length matched +/-50 mils

3

x00_sd_051703 - refdes

+3.3V_AUX

BTN_PWR

1

2

PUSH BUTTON

NP01

+3.3V_AUX

+3.3V_AUX

BTN_PWR_ON

32

R49

21

R573

1K-5%

10V-10%

1uF

1 2

C329

PWR_BUTTON_DISABLE

46

Q19

2N7002

1 2

8.2K-5%
R1850

D

3

1

G

S

2

3

4

2.7K-5% 2.7K-5%

21

149U58

8

VHC14

Diode turns this into an open-drain driver

D36

3 1

BAR43

1 2

8.2K-5%

R1577

x00_sd_051703 - pu

ICH_PWRBTN_N

5,33,41,44,59

+3.3V_AUX

32

+3.3V_AUX

BTN_NMI

1

4 4

2

PUSH BUTTON

NP01

3

4

BTN_NMI

1 2

R1440

R51

1 2

1K-5%

10V-10%

1uF

x03_sd

1410U58

11

1 2

C327

D

VHC14

GPE_NMI_BUTTON_N must be VAux output

GPE_NMI_BUTTON_N

Diode turns this into an open-drain driver

D68

BAR43

13

GPE_NMI_N

33,44

INC.

3

ROUND ROCK,TEXAS

Q146

NMI_BUTTON_DISABLE

46

2N7002

1

G

USB CONNECTORS & BUTTONS

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

S

2

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

56 OF 60

subsys done

A B

DC

B D

CA

12-16-2004_19:51

1

BMC Spares

Spares

Z14

REG08 A NGO
COUPON TEST

x00_tj_052003

Shroud Clips

x03_tj_121503

SHD_1

NP02

HEATSINK
SHD_2

NP02

HEATSINK

x03b_tj_012704

1
2

1
2

NC_SHD_1_1
NC_SHD_1_2

NC_SHD_2_1
NC_SHD_2_2

48 OHM TRACES (FSB)

100 OHM TRACES (Diff Clocks, Ethernet)

PROPAGATION_DELAY=L:S:5995:6005

Z_IN1_48_END

21

NEGCOMMON

NC_COUPON1_2NC_COUPON1_1

57

GND_TAB

3

NP*

Z_IN1_48

RY

ZSE3PINS2R

21

+RX

IMP_IN1_48

PROPAGATION_DELAY=L:S:5995:6005

COUPON TEST

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

57

GND_TAB

1

3

NP*

Z_TOP_D100

RX

RY

ZDI4PINS2R

COUPON TEST

PROPAGATION_DELAY=L:S:5995:6005

2

+

4

-

IMP_Z100D_TOP+

IMP_Z100D_TOP-

Z_TOP_D100_END

1

1

2

2

3

3

4

4

NP*

57

GND_TAB

56 OHM TRACES (PCI, IDE,

Video, SE Clocks)

Z_TOP_56

IMP_TOP_56

NP*

21

+RX

PROPAGATION_DELAY=L:S:5995:6005

3

RY

ZSE3PINS2R

COUPON TEST

Z_TOP_56_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

IMPEDENCE DIFFERENTIAL

TEST POINT

57

57

GND_TAB

GND_TAB

Z_IN4_48

1 2

3

RY

NP*

ZSE3PINS2R

COUPON TEST

Z_BOT_48

3

RY

NP*

ZSE3PINS2R

COUPON TEST

+RX

IMP_IN4_48

PROPAGATION_DELAY=L:S:5995:6005

21

+RX

IMP_BOT_48

PROPAGATION_DELAY=L:S:5995:6005

Z_IN4_48_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

Z_BOT_48_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

57

57

GND_TAB

GND_TAB

1

3

NP*

1

3

Z_IN1_D100

RX

RY

ZDI4PINS2R

COUPON TEST

Z_IN2_D100

RX

RY

PROPAGATION_DELAY=L:S:5995:6005

PROPAGATION_DELAY=L:S:5995:6005

2

+

4

-

IMP_Z100D_IN1+

IMP_Z100D_IN1-

PROPAGATION_DELAY=L:S:5995:6005

PROPAGATION_DELAY=L:S:5995:6005

2

+

4

-

IMP_Z100D_IN2+

IMP_Z100D_IN2-

Z_IN1_D100_END

1

1

2

2

3

3

4

4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

Z_IN2_D100_END

1

1

2

2

3

3

57

57

GND_TAB

GND_TAB

Z_IN1_56

1 2

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

Z_IN2_56

1 2

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

+RX

+RX

IMP_IN1_56

IMP_IN2_56

Z_IN1_56_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

Z_IN2_56_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

1

2

3

33,34,41

VBAT

1410U57

R8

1 2

1K-5%

11

VHC14

CLIP13

P1
P2
V1
V2
V3
V4
V5
V6
V7
V8

V9
V10
V11
V12
V13
V14
V15
V16

SMT GND CLIP

86 SLOT

16 GND VIAS

BOTTOM ETCH .300"

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

SUB=SUB*_0342R

ADD1=ADD*_0342R

CLIP5

P1
P2
V1
V2
V3
V4
V5
V6
V7
V8

V9
V10
V11
V12
V13
V14
V15
V16

SMT GND CLIP

86 SLOT

16 GND VIAS

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

SUB=NP*

CLIP4

P1

P2

V1

V2

V3

V4

V5

V6

V7

V8

V9
V10
V11
V12
V13
V14
V15
V16

SMT GND CLIP

86 SLOT

16 GND VIAS

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

SUB=SUB*_0342R

ADD1=ADD*_0342R

1413U57

12

VHC14

NC_U57_12

NC_U57_10

Heatsink Hooks

CLIP3

P1
P2
V1
V2
V3
V4
V5
V6
V7
V8

V9
V10
V11
V12
V13
V14
V15
V16

SMT GND CLIP

86 SLOT

16 GND VIAS

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

SUB=SUB*_0342R

ADD1=ADD*_0342R

CLIP2

P1

P2

V1

V2

V3

V4

V5

V6

V7

V8

V9
V10
V11
V12
V13
V14
V15
V16

SMT GND CLIP

86 SLOT

16 GND VIAS

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

SUB=SUB*_0342R

ADD1=ADD*_0342R

SUB=SUB*_K4775

HS4

1
2

HEATSINK

HS_MID_PRES_N

HS2

1
2

HEATSINK

CLIP10

P1
P2
V1
V2
V3
V4
V5
V6
V7
V8

V9
V10
V11
V12
V13
V14
V15
V16

SMT GND CLIP

86 SLOT

16 GND VIAS

BOTTOM ETCH .300"

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

SUB=SUB*_0342R

ADD1=ADD*_0342R

CLIP9

P1

P2

V1

V2

V3

V4

V5

V6

V7

V8

V9
V10
V11
V12
V13
V14
V15
V16

SMT GND CLIP

86 SLOT

16 GND VIAS

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

SUB=SUB*_0342R

ADD1=ADD*_0342R

Plunger

SLP2

SPRING-LOADED PLUNGER

PIN,LKG,PWA,44X.150

x00_tj_050503

x03_tj_010904

x00_tj_040703

NC

X0403

HS3

1
2

HEATSINK

0.1uF 16V

HS1

1
2

HEATSINK

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

NC_SLP1

x00_sd_052903

HEATSINK_PRES_N

1 2

C1659

Cap is to help reduce EMI
build-up on heatsink.

CLIP7

P1
P2
V1
V2
V3
V4
V5
V6
V7
V8

V9
V10
V11
V12
V13
V14
V15
V16

SMT GND CLIP

86 SLOT

16 GND VIAS

SUB=SUB*_0342R

ADD1=ADD*_0342R

CLIP8

P1
P2
V1
V2
V3
V4
V5
V6
V7
V8

V9
V10
V11
V12
V13
V14
V15
V16

SMT GND CLIP

86 SLOT

16 GND VIAS

SUB=SUB*_0342R

ADD1=ADD*_0342R

33

57

57

57

57

57

57

57

GND_TAB

GND_TAB

GND_TAB

GND_TAB

GND_TAB

GND_TAB

GND_TAB

50 OHM TRACES (MEM1, HL1.5)

Z_IN1_50

1 2

PROPAGATION_DELAY=L:S:5995:6005

ZSE3PINS2R

NP*

3

RY

+RX

IMP_IN1_50

COUPON TEST

Z_IN2_50

IMP_IN2_50

NP*

3

RY

21

+RX

PROPAGATION_DELAY=L:S:5995:6005

ZSE3PINS2R

COUPON TEST

Z_IN3_50

NP*

3

RY

21

+RX

PROPAGATION_DELAY=L:S:5995:6005

ZSE3PINS2R

IMP_IN3_50

COUPON TEST

Z_IN4_50

1 2

PROPAGATION_DELAY=L:S:5995:6005

ZSE3PINS2R

NP*

3

RY

+RX

IMP_IN4_50

COUPON TEST

40 OHM TRACES (MEM2)

Z_IN1_40

IMP_IN1_40

IMP_IN2_40

IMP_IN3_40

3

NP*

PROPAGATION_DELAY=L:S:5995:6005

RY

ZSE3PINS2R

COUPON TEST

Z_IN2_40

1 2

3

NP*

PROPAGATION_DELAY=L:S:5995:6005

RY

ZSE3PINS2R

COUPON TEST

Z_IN3_40

1 2

3

NP*

PROPAGATION_DELAY=L:S:5995:6005

RY

ZSE3PINS2R

COUPON TEST

21

+RX

+RX

+RX

Z_IN1_50_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

Z_IN2_50_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

Z_IN3_50_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

Z_IN4_50_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

Z_IN1_40_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

Z_IN2_40_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

Z_IN3_40_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

57

57

57

57

57

57

GND_TAB

GND_TAB

GND_TAB

GND_TAB

GND_TAB

GND_TAB

NP*

NP*

1

3

NP*

NP*

NP*

NP*

COUPON TEST

1

RX

3

RY

1

RX

3

RY

NP*

Z_TOP_D90

RX

RY

ZDI4PINS2R

COUPON TEST

1

RX

3

RY

COUPON TEST

1

RX

3

RY

COUPON TEST

1

RX

3

RY

ZDI4PINS2R

PROPAGATION_DELAY=L:S:5995:6005

PROPAGATION_DELAY=L:S:5995:6005

Z_IN4_D100

ZDI4PINS2R

COUPON TEST

PROPAGATION_DELAY=L:S:5995:6005

PROPAGATION_DELAY=L:S:5995:6005

Z_BOT_D100

ZDI4PINS2R

COUPON TEST

90 OHM TRACES (USB)

PROPAGATION_DELAY=L:S:5995:6005

PROPAGATION_DELAY=L:S:5995:6005

PROPAGATION_DELAY=L:S:5995:6005

PROPAGATION_DELAY=L:S:5995:6005

Z_IN1_D90

ZDI4PINS2R

PROPAGATION_DELAY=L:S:5995:6005

PROPAGATION_DELAY=L:S:5995:6005

Z_IN2_D90

ZDI4PINS2R

PROPAGATION_DELAY=L:S:5995:6005

PROPAGATION_DELAY=L:S:5995:6005

Z_IN4_D90

ZDI4PINS2R

COUPON TEST

4

4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

57

GND_TAB

3

Z_IN4_D100_END

1

1

2

+

4

-

IMP_Z100D_IN4+

IMP_Z100D_IN4-

NP*

2

2

3

3

4

4

57

GND_TAB

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

NP*

Z_IN3_56

21

+RX

PROPAGATION_DELAY=L:S:5995:6005

RY

ZSE3PINS2R

COUPON TEST

Z_IN4_56

21

+RX

PROPAGATION_DELAY=L:S:5995:6005

3

RY

ZSE3PINS2R

IMP_IN3_56

IMP_IN4_56

COUPON TEST

Z_BOT_D100_END

1

1

2

+

4

-

IMP_Z100D_BOT+

IMP_Z100D_BOT-

2

2

3

3

4

4

57

GND_TAB

1 2

3

Z_BOT_56

+RX

PROPAGATION_DELAY=L:S:5995:6005

RY

IMP_BOT_56

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

NP*

ZSE3PINS2R

COUPON TEST

85 OHM TRACES (PCI-Express)

PROPAGATION_DELAY=L:S:5995:6005

Z_TOP_D90_END

1

1

2

+

4

-

IMP_Z90D_TOP+

IMP_Z90D_TOP-

2

2

3

3

4

4

57

GND_TAB

1

3

NP*

RX

RY

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

Z_IN1_D90_END

1

1

2

+

4

-

IMP_Z90D_IN1+

IMP_Z90D_IN1-

2

2

3

3

4

4

57

GND_TAB

1

3

NP*

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

Z_IN2_D90_END

1

1

2

+

4

-

IMP_Z90D_IN2+

IMP_Z90D_IN2-

2

2

3

3

4

4

x00_tj_051203

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

Z_IN4_D90_END

1

1

2

+

4

-

IMP_Z90D_IN4+

IMP_Z90D_IN4-

2

2

3

3

4

4

NP*

PROPAGATION_DELAY=L:S:5995:6005

Z_IN1_D85

2

+

4

-

ZDI4PINS2R

COUPON TEST

PROPAGATION_DELAY=L:S:5995:6005

PROPAGATION_DELAY=L:S:5995:6005

Z_IN4_D85

2

RX

RY

+

4

-

ZDI4PINS2R

COUPON TEST

IMP_Z85D_IN1+

IMP_Z85D_IN1-

IMP_Z85D_IN4+

IMP_Z85D_IN4-

Z_IN3_56_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

Z_IN4_56_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

Z_BOT_56_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

Z_IN1_D85_END

1

1

2

2

3

3

4

4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

Z_IN4_D85_END

1

1

2

2

3

3

4

4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

2

3

IMPEDENCE DIFFERENTIAL

CLIP1

P1
P2
V1
V2
V3
V4
V5
V6
V7
V8

V9
V10
V11
V12
V13
V14
V15
V16

SMT GND CLIP

4 4

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

ADD1=ADD*_0342R

86 SLOT

16 GND VIAS

SUB=SUB*_0342R

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

ADD1=ADD*_0342R

CLIP6

P1
P2
V1
V2
V3
V4
V5
V6
V7
V8

V9
V10
V11
V12
V13
V14
V15
V16

SMT GND CLIP

86 SLOT

16 GND VIAS

SUB=SUB*_0342R

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

ADD1=ADD*_0342R

CLIP11

P1
P2
V1
V2
V3
V4
V5
V6
V7
V8

V9
V10
V11
V12
V13
V14
V15
V16

SMT GND CLIP

86 SLOT

16 GND VIAS

BOTTOM ETCH .300"

SUB=SUB*_0342R

CLIP12

P1
P2
V1
V2
V3
V4
V5
V6
V7
V8

V9
V10
V11
V12
V13
V14
V15
V16

SMT GND CLIP

86 SLOT

16 GND VIAS

BOTTOM ETCH .300"

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

SUB=SUB*_0342R

ADD1=ADD*_0342R

57

GND_TAB

NP*

3

RY

COUPON TEST

Z_IN4_40

21

+RX

IMP_IN4_40

PROPAGATION_DELAY=L:S:5995:6005

ZSE3PINS2R

Z_IN4_40_END

1

1

2

2

3

3

NP*

IMPEDENCE SINGLE END

TEST POINT

57

GND_TAB

1

3

NP*

Z_BOT_D90

RX

RY

ZDI4PINS2R

COUPON TEST

PROPAGATION_DELAY=L:S:5995:6005

PROPAGATION_DELAY=L:S:5995:6005

2

+

4

-

IMP_Z90D_BOT+

IMP_Z90D_BOT-

TEST POINT

Z_BOT_D90_END

1

1

2

2

3

3

4

4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

INC.

ROUND ROCK,TEXAS

TITLE

subsys done

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

SPARES

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

D1660

DATE

12/16/2004

DC

REV.

A03-00

SHEET

57 OF 60

B D

CA

3.3V I/O Slot !!!

1

2

3

31,33,36,50,58
31,33,36,50,58
31,33,36,50,58
31,33,36,50,58

31,33,36,50,58

31,33,50,58
31,33,50,58
31,33,50,58

58
58

PCI0_DEVSEL_N
PCI0_FRAME_N
PCI0_TRDY_N
PCI0_IRDY_N

PCI0_STOP_N
PCI0_LOCK_N
PCI0_PERR_N
PCI0_SERR_N

PCI0_REQ64_N
PCI0_ACK64_N

SP_RN80_3 SP_RN80_6

1

+3.3V

x00_sd_051703 - 3.3v

Side A

NC_TRST_EDG1

NC_TMS_EDG1

NC_TDI_EDG1

33,58

+3.3V

1

RN78

2
3
4

8.2K

1

RN79

2
3
4

8.2K

1

RN80

2
3
4

8.2K

8
7
6
5

8
7
6
5

8
7
6
5

SP_RN80_5SP_RN80_4

31,33,36,50,58

PCI0_AD19

R223

2 1

100-5%

31,33,36,50,58

31,33,36,50,58

31,33,36,50,58

X03b_GT_012204

5,59

31,33,36,50

31,33,36,50
31,33,36,50

31,33,36,50

PROPAGATION_DELAY=L:S::1000

31,33,36,50
31,33,36,50

31,33,36,50
31,33,36,50

31,33,36,50
31,33,36,50

31,33,36,50
31,33,36,50

31,33,36,50

31,33,36,50

31,33,36,50
31,33,36,50

31,33,36,50
31,33,36,50

ICH_PIRQ_DEBUG_N

PCI_RST_DEBUG_N

PCI0_GNT_DEBUG_N

33

PCI0_AD30

PCI0_AD28
PCI0_AD26

PCI0_AD24

IDSEL_DEBUG

PCI0_AD22
PCI0_AD20

PCI0_AD18
PCI0_AD16

PCI0_FRAME_N

PCI0_TRDY_N

PCI0_STOP_N

PCI0_PAR
PCI0_AD15

PCI0_AD13
PCI0_AD11

PCI0_AD9

PCI0_CBE0_N

PCI0_AD6
PCI0_AD4

PCI0_AD2
PCI0_AD0

PCI0_REQ64_N

58

NC_PRSVD0_EDG1

NC_PRSVD2_EDG1

NC_3V3_AUX

NC_PME_BUS

NC_IMPB_SCL
NC_IMPB_SDA

+5.0V Riser

+12V

60
59
58
57
56
55
54
53
52
51
50

49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

MCA_EDGE

A
C

ID

Side B

120
119
118
117
116
115

B

114

D

113
112
111
110

109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61

NC_P61_-12V
NC_TCK_EDG1

NC_TDO_EDG1

ICH_PIRQ_DEBUG_N

NC_PA_EDG1
NC_PRSVD1_EDG1
NC_PB_EDG1

NC_PRSVD3_EDG1

CK_33M_PCI0_DEBUG

PCI0_REQ_DEBUG_N

PCI0_AD31
PCI0_AD29

PCI0_AD27
PCI0_AD25

PCI0_CBE3_N

PCI0_AD23

PCI0_AD21
PCI0_AD19

PCI0_AD17

PCI0_CBE2_N

PCI0_IRDY_N

PCI0_DEVSEL_N

PCI0_LOCK_N
PCI0_PERR_N

PCI0_SERR_N

PCI0_CBE1_N

PCI0_AD14

PCI0_AD12
PCI0_AD10

PCI0_AD8
PCI0_AD7

PCI0_AD5
PCI0_AD3

PCI0_AD1

PCI0_ACK64_N

33,58

3

33

31,33,36,50
31,33,36,50

31,33,36,50
31,33,36,50

31,33,36,50
31,33,36,50

31,33,36,50
31,33,36,50,58

31,33,36,50
31,33,36,50

31,33,36,50,58

31,33,36,50,58

31,33,50,58
31,33,50,58

31,33,50,58

31,33,36,50
31,33,36,50

31,33,36,50
31,33,36,50

31,33,36,50
31,33,36,50

31,33,36,50
31,33,36,50

31,33,36,50

58

NOTE: PCI SLOT DEVIATION: No -12V

ROOM=DBG_SLOT

+5.0V Riser

C244

1 2

+3.3V

C242

0.1uF 16V

21

C241

0.1uF 16V

1 2

0.1uF 16V

21

C240

2

3

!!! WARNING !!!

Card edge connector signals swapped from normal
This card edge is gender-bended into a connector and thus is oppisite normal

PCI_DBG

21

C243

0.1uF 16V

C237

1 2

0.1uF 16V

C238

21

0.1uF 16V

C239

1 2

0.1uF 16V 0.1uF 16V

4 4

INC.

ROUND ROCK,TEXAS

TITLE

PCI bus p/u's / PCI Debug Slot

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL

subsys done

AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

A B

DWG NO.

DATE

DC

D1660

12/16/2004

REV.

A03-00

SHEET

58 OF 60

A B C

DumbView LED's

+3.3V

D

1

2

VCC

H_INIT_N_3V

55

FWH_ID0

55

NC_LPC_DEBUG10

ADD2=ADD*_F8012_EXPLBL

PCI EXPRESS LABEL

FVS Access Points

5,33,41,44,56

ECAD: space at least 125mil apart

a00_tj_052604

NP

SMARTVU

4
6

8
10
12
14

X

HEADER

2X7

SmartVu

ICH_PWRBTN_N

32,40

40,41,59

FLP_DSKCHG_N

GPI_FVS_1_N

12

CK_33M_SMARTVU

3

PCI_RST_DEBUG_N

5

LPC_LAD0

7

LPC_LAD1

9

LPC_LAD2

11

LPC_LAD3

13

LPC_LFRAME_N

x00c4_tj_090304

TESTPAD

TESTPAD

TESTPAD

1

1

1

MH5

MH6

MH7

X03b_GT_012204

3
5,58,59
5,33,40,44,55,59
5,33,40,44,55,59
5,33,40,44,55,59
5,33,40,44,55,59
5,33,40,44,55,59

DEBUG_LED_3

5

DEBUG_LED_2

5

DEBUG_LED_1

5

DEBUG_LED_0

5

NP

DS1

2 1

X

RED

NP

DS2

12

X

RED

NP

DS3

2 1

X

RED

NP

DS4

12

X

RED

x00_sd_52903 - removed 2 leds

a00_tj_052604 - Removed LEDs and r-pak

Debug Jumpers

+3.3V_AUX +3.3V

1

2

3

4 5

8.2K

RN72

a00_tj_052604

6

7

8

NP

P15

NP

1

RN25

2
3
4

1K

ROOM=DUMBVU

+3.3V_AUX

8
7
6
5

X

3,5,59

CK_33M_CPLD

NC_MCTR_A_7

11
13
15
17
19
21
23
25
27
29
31
33
35
37

39
40
41
42
43

1
3
5
7

a3.7

9

a3.0
a2.7

a2.0

MCTR_A

clk1
a1.7

a1.0
a0.7

a0.0

GND

2x19

RECEPTACLE

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38

Mictor Debug Headers

CK_33M_CPLD
SHIFTY_BCKPLN_DATA_UP
SHIFTY_BCKPLN_DATA_DN_R
SHIFTY_BCKPLN_LATCH_R
SHIFTY_BCKPLN_CLK_R
SHIFTY_RISER_DATA_UP
SHIFTY_RISER_DATA_DN_R
SHIFTY_RISER_LATCH_R
SHIFTY_RISER_CLK_R

NC_MCTR_A_24

PCI_RST_DEBUG_N

LPC_LFRAME_N

LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0

X03b_GT_012204

5,58,59
5,33,40,44,55,59
5,33,40,44,55,59
5,33,40,44,55,59
5,33,40,44,55,59
5,33,40,44,55,59

ROOM=SYSCPLD

3,5,59
5,32
5
5
5
5,31
5
5
5

3,5,59

5,33

5,7,8

x00_sd_061103 - h_vtt_pwrgood was duplicated on conn

CK_33M_CPLD

CK_PWRDWN_N

3-5

PCI_RST_ICH_N
SYSTEM_PWRGOOD_CHIPSET_R

5

CPLD_DDR2_RESET

5

CPLD_H_VID_PWRGOOD_N

5

CK_VTT_PWRGD_N

3,5

VCORE1_PWRGOOD

5,7

VCORE2_PWRGOOD

5,8

VCORE_EN

NC_MCTR_B_7

NC_MCTR_B_25

NC_MCTR_B_37

11
13
15
17
19
21
23
25
27
29
31
33
35
37

39
40
41
42
43

1
3
5

clk0clk0

7

a3.7

9

a3.0
a2.7

a2.0

MCTR_B

clk1
a1.7

a1.0
a0.7

a0.0

GND

2x19

RECEPTACLE

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38

NC_MCTR_B_6

DC2DC_CPUVTT_EN

1V5_PWRGOOD

DC2DC_1V5_EN

1V8_PWRGOOD

DC2DC_1V8_EN

3V3_PWRGOOD

DC2DC_3V3_EN

5V_PWRGOOD

DC2DC_5V_EN

RISER_PWRGOOD

NC_MCTR_B_28

PS1_PWRGOOD

PS2_PWRGOOD
PS1_ENABLE_N
PS2_ENABLE_N

ICH_PWR_ON_REQ

5,6,51
5,6
5,6
5,6
5,6
5,6
5,6
5,6
5,6,42
5,31

5,31
5,31
5,31
5,31
5,33,40,41,44

1

2

3

40,41,59

GPI_FVS_2_N

1U PWA assembly

2U/5U PWA assembly

PWB

Schematic

ID Barcode

REV Barcode

2U/5U Assembly Drawing

1U Assembly Drawing

Misc. Mechanical Parts added to BOM

ADD1=ADD*_Y1372_INSLTR1

ADD2=ADD*_0585R_INSRVT1
ADD3=ADD*_0585R_INSRVT2

ADD4=ADD*_0585R_INSRVT3
ADD5=ADD*_0585R_INSRVT4
ADD1=ADD*_0585R_INSRVT5

MH8

1

TESTPAD

P# F1667
P# H1754

ADD=ADD*_D1656_PWB

X03_TJ_110503

X03b_TJ_012004

X03_TJ_110503

X03_TJ_110503

X03_TJ_110503

X03_TJ_110503

X03_TJ_110503

ADD2=ADD*_D1660_SCHEM

ADD1=ADD13_D1657_ASSYDWG
ADD6=ADD02_D1658_ASSYDWG

X03b_TJ_012004

X03b_TJ_012004

X03b_TJ_012004

X03b_TJ_012004

X03b_TJ_012004

40,41,59
40,41,59

ADD8=ADD02_J4286_VRDSHLD1
ADD9=ADD02_J4286_VRDSHLD2

ADD7=ADD02_1U_FAN_BRACKET

A02_GT_102104

DEBUG_JUMPER_0

5

DEBUG_JUMPER_1

5

GPI_FVS_1_N
GPI_FVS_2_N

1

1

3

3

5 6

5 6

TSM 2X4
SMT HDR

SUB*_2R039

x00_sd_061303 - added p/n

X03_TJ_010704

X03_TJ_010704

2

2

4

4

87

87

X

planar bottom insulator

planar bottom insulator rivets

1U riser standoff screws

ICH_VAUX_SCL_U5

35

ICH_VAUX_SDA_U5

35

x03b_tj_011904

+3.3V_AUX

J18

1
2
3
4

SUB=NP01

NP*

dpn=5J738

I2C Headers

32,44,50
24,25,44

5,44,45

31,44
31,44
32,44

I2C_IPMB_SCL
I2C_NIC_SCL
I2C_SEG2_VAUX_SCL
I2C_SEG3_VAUX_SCL
I2C_SEG4_VAUX_SCL
I2C_SEG5_SCL

+3.3V_AUX

2
4
6
8
10
12

14

a00_tj_052604

NP

P5

1
3
5
7
9
11

X

13

I2C_IPMB_SDA
I2C_NIC_SDA
I2C_SEG2_VAUX_SDA
I2C_SEG3_VAUX_SDA
I2C_SEG4_VAUX_SDA
I2C_SEG5_SDA

NP*

dpn=5J738

3

32,44,50
24,25,44
5,44,45
31,44
31,44
32,44

4

ADD6=ADD02_X1357_STANDOFF1
ADD7=ADD02_X1357_STANDOFF2

ADD8=ADD02_Y1313_STANDOFF3
ADD9=ADD02_Y1313_STANDOFF4

ADD1=ADD13_D4979_FANBRKT1
ADD2=ADD13_D4979_FANBRKT2
ADD3=ADD13_D4979_FANBRKT3

ADD4=ADD13_45550_FANBRKT4
ADD5=ADD13_45550_FANBRKT5
ADD6=ADD13_45550_FANBRKT6

ADD7=ADD13_W1650_STANDOFF5

X03_TJ_110503

X03_TJ_110503

X03_TJ_110503

1U riser standoffs

2U/5U Fan Bracket Mounting Studs

2U/5U Fan Bracket Mounting Studs Ret. Screws

2U/5U riser standoffs

HEADER

2X7

PCI bus p/u's / PCI Debug Slot

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

DWG NO.

DATE

D1660

4

INC.

ROUND ROCK,TEXAS

REV.

A03-00

SHEET

59 OF 6012/16/2004

subsys done

C

DBA

B D

CA

Plane Split Stitching Caps

12-16-2004_19:51

1

USB Rear Plane Split Crossings

+3.3V_AUX

21

+3.3V_AUX

21

+3.3V_AUX

21

+3.3V_AUX

21

+3.3V_AUX

21

Legacy PCI Bus Plane Split Crossings

+3.3V_AUX

21

+3.3V_AUX

21

1

2

C1766

0.1uF 16V

x00_gt_061903

C1767

0.1uF 16V

C1768

0.1uF 16V

+1.5V

C1769

0.1uF 16V

+1.5V +5.0V Riser

CK_33M_RAC Plane Split Crossings

C1775

0.1uF 16V

+3.3V_AUX

21

C1778

0.1uF 16V

+5.0V Riser

C1776

+3.3V_AUX

21

C1779

0.1uF 16V

0.1uF 16V

+5.0V Riser

+5.0V Riser

C1777

0.1uF 16V

+3.3V_AUX

21

C1780

+5.0V Riser

0.1uF 16V

2

+5.0V Riser

+3.3V_AUX

21

C1770

x00_gt_061903

0.1uF 16V

+1.5V

+3.3V_AUX

21

C1771

0.1uF 16V

+1.5V

+3.3V_AUX

21

C1772

0.1uF 16V

+1.5V

x00_gt_061903

+3.3V

IDE Bus Plane Split Crossings

+3.3V

3

+3.3V

C1783

1 2

0.1uF 16V

Random Stuff

+3.3V_AUX

21

C1786

0.1uF 16V

x00_tj_062303

21

C1781

1 2

0.1uF 16V

x00_tj_061903

C1782

0.1uF 16V

PCI Express Plane Split Crossings

+3.3V_AUX

.01uF 50V

1 2

C1792

+1.5V

+3.3V_AUX

.01uF 50V

21

C1793

+1.5V

3

4 4

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM,PLN,SV,PE2800/2850/1850

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

D1660

12/16/2004

REV.

A03-00

SHEET

60 OF 60

DC

A B