MSI MS-9141 Schematic 1400

5

4

3

2

1

INTEL (R) PLACER CHIPSET

MS-9141

D D

DUAL PRESTONIA PROCESSORS SCHEMATICS

01 INDEX
02 BLOCK DIAGRAM
03 CPU 1_SIGNAL
04 CPU 1_POWER
05 CPU 2_SIGNAL
06 CPU 2_POWER
07 VID COMPARE
08 CLOCK
09 MCH_HOST

C C

10 MCH_AGP&HLA&HLB
11 MCH_DDR CHA&CHB
12 MCH_POWER&GND
13 DDR CHA DIMMS
14 DDR CHB DIMMS
15 DDR CHA&CHB PARALLEL TERM
16 DDR VREFS&DECOUPLING
17 AGP 8X CONNECTOR
18 AGP>L+&HUBLINK VREFS
19 ICH4-1
20 ICH4-2

B B

21 ICH4-3
22 ICH4 PULL UP

32 FWH
33 COM PORT
34 PRINTER PORT
35 KB&MS
36 SYSTEM FANS
37 POWER CONNECTOR
38 FRONT PANNEL
39 AD1885
40 SPEAKER OUT MIC&LINE IN
41 SMBUS ISOLATION
42 Mechanical Part
43 ACPI CIRCUIT
44 SYSTEM VOLTAGE REGULATOR
45 +2.5V REGULATOR
46 LAN1 82540
47 LAN1 82540#2
48 LAN2 82551
49 LAN2 82551#2
50 CLOCK DIAGRAM
51 GENERAL SPEC
52 MANUAL PART

23 CPU VRM
24 PCI32 SLOT1
25 PCI32 SLOT2
26 PCI32 SLOT3
27 PCI32 SLOT4
28 SIO(PC87366)
29 SIO HARDWARE MONITOR
30 IDE
31 USB

A A

Title
Document Number

5

4

3

2

Micro Star Restricted Secret

INDEX

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Last Revision Date:

Tuesday, March 18, 2003

Sheet

152

1

Rev

00E

of

5

4

3

2

1

PRESTONIA PROCESSOR PRESTONIA PROCESSOR

SOCKET 604 CPU1 SOCKET 604 CPU2

D D

p3~4 p5~6 p28 p8

VRD 9.1

DDR DIMM 1

DDR DIMM 3

CLOCK GEN

CHANNEL A

PLACER MCH

C C

AGP 8X/4X

p18

ICH4

p20~23

p9~12

CHANNEL B

p13 p13

IDE Primary

IDE Secondary

p42

p42

DDR DIMM 2

p14 p14

DDR DIMM 4

USB 2.0
PORTx6

B B

p43

FLOPPY

PARALLEL PORT

SERIAL PORT
COM1

SERIAL PORT
COM2

p40

p46

p45

LPC SIO
NS/PC87366

FWH(8Mbit)

Onboard

AC'97 Codec

p28

p32

PCI 32 SLOT

PCI 32 SLOT

PCI 32 SLOT

PCI 32 SLOT

p39p45

p24

p25

p26

p27

GIGA LAN
82540

p46~47

A A

10/100 LAN
82551

5

4

3

2

p46~47

Title
Document Number

Micro Star Restricted Secret

BLOCK DIAGRAM

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Last Revision Date:

Tuesday, March 18, 2003

Sheet

252

1

Rev

00E

of

5

CPU_SM_WP<5,20>

CPU THERMAL SENSOR SMBUS = 30
CPU IDROM SMBUS = A8

VCC_CORE

CPU0_BSEL0
CPU0_BSEL1

+3_3V

SKTOCC_0_L<8>

D D

FSB_HD_L[0..63]<5,9>

CPU0_COMP1

CPU0_COMP0

R91

R38

49.9-1%

CPU0_BSEL1

CPU0_BSEL0

5

49.9-1%

CPU0_BSEL0<8>

FSB_AP0_L<5,9>
FSB_AP1_L<5,9>

P0_BCLK0<8>
P0_BCLK1<8>

R151 1K

R178 1K

C C

+3_3V

R25
1K

CPU0_FSTR0_AB28
CPU0_FSTR0_Y29
CPU0_FSTR0_AA28

R30

B B

A A

R29

1K

1K

FSB_HD_L0
FSB_HD_L1
FSB_HD_L2
FSB_HD_L3
FSB_HD_L4
FSB_HD_L5
FSB_HD_L6
FSB_HD_L7
FSB_HD_L8
FSB_HD_L9
FSB_HD_L10
FSB_HD_L11
FSB_HD_L12
FSB_HD_L13
FSB_HD_L14
FSB_HD_L15
FSB_HD_L16
FSB_HD_L17
FSB_HD_L18
FSB_HD_L19
FSB_HD_L20
FSB_HD_L21
FSB_HD_L22
FSB_HD_L23
FSB_HD_L24
FSB_HD_L25
FSB_HD_L26
FSB_HD_L27
FSB_HD_L28
FSB_HD_L29
FSB_HD_L30
FSB_HD_L31
FSB_HD_L32
FSB_HD_L33
FSB_HD_L34
FSB_HD_L35
FSB_HD_L36
FSB_HD_L37
FSB_HD_L38
FSB_HD_L39
FSB_HD_L40
FSB_HD_L41
FSB_HD_L42
FSB_HD_L43
FSB_HD_L44
FSB_HD_L45
FSB_HD_L46
FSB_HD_L47
FSB_HD_L48
FSB_HD_L49
FSB_HD_L50
FSB_HD_L51
FSB_HD_L52
FSB_HD_L53
FSB_HD_L54
FSB_HD_L55
FSB_HD_L56
FSB_HD_L57
FSB_HD_L58
FSB_HD_L59
FSB_HD_L60
FSB_HD_L61
FSB_HD_L62
FSB_HD_L63

FSB_HA_L[3..35]<5,9>

SMB_ALERT_CPU_L<5,20>

SMBUS_CPU_DATA<5,7>

R154 51-1%

SOCKET_604

CPU0_BR0_L<5,9>
CPU1_BR0_L<5>

4

SMBUS_CPU_CLK<5,7>

TP7

A3B5D26

CPU1A

Y26

D0#

AA27

D1#

AA25
AD27

AA24
AB26
AB25
AB23
AA22
AA21
AB20
AB22
AB19
AA19
AE26
AC26
AD25
AE25
AC24
AD24
AE23
AC23
AA18
AC20
AC21
AE22
AE20
AD21
AD19
AB17
AB16
AA16
AC17
AE13
AD18
AB15
AD13
AD14
AD11
AC12
AE10
AC11

AD10

AD8

AC9
AA13
AA14
AC14
AB12
AB13
AA11
AA10
AB10

AC8

AD7

AE7

AC6

AC5

AA8

AB6

AA3

AB3

Y24

Y23

AE9

E10

ODTEN

D2#

SKTOCC#

D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#

Y9

D62#
D63#

AP0#

D9

AP1#

Y4

BCLK0

W5

BCLK1
BSEL0
BSEL1

4

VSSA_P0

TP8

AA5

B27

VSSA

VSSSENSE

A3#

A4#

A22

A20

B18

FSB_HA_L4

FSB_HA_L3

FSB_HA_L5

VCCIOPLL_P0

VCCA_P0

AD4

AB4

VCCA

VCCIOPLL

VCCSENSE

A5#

A6#

A7#

A8#

C18

A19

C17

FSB_HA_L6

FSB_HA_L8

FSB_HA_L7

+3_3V

CPU0_FSTR0_Y29

AD29

AE29

AE28

Y29

SM_WP

SM_VCC1

SM_VCC0

TP9

CPU0_FSTR0_AA28

AA28

AB28

SM_TS_A1

SM_TS_A0

SM_EP_A2

TP10

AB29

AA29

AC29

SM_DAT

SM_EP_A1

SM_EP_A0

AC28

AD28

SM_CLK

SM_ALERT

R14951R150

CPU0_COMP1

CPU0_COMP0

E16

AD16

COMP1

COMP0

Prestonia 604

A9#

A10#

A11#

A12#

A13#

A14#

A15#

A16#

A17#

A18#

A19#

A20#

A21#

A22#

A23#

A24#

D17

A13

B16

B14

B13

A12

C15

C14

D16

D15

F15

A10

B10

B11

C12

E14

FSB_HA_L13

FSB_HA_L14 CPU0_FSTR0_AB28

FSB_HA_L18

FSB_HA_L19

FSB_HA_L16

FSB_HA_L17

49.9-1%

FSB_HA_L22

FSB_HA_L20

FSB_HA_L23

FSB_HA_L21

R39

FSB_HA_L25

FSB_HA_L24

FSB_HA_L11

FSB_HA_L10

FSB_HA_L12

FSB_HA_L9

FSB_HA_L15

VCC_CORE

FSB_BNR_L<4,5,9>
FSB_BPRI_L<5,9>
FSB_BINIT_L<4,5,9>

51

W6W7W8Y6AA7

TESTHI0

TESTHI1

TESTHI2

TESTHI3

A25#

A26#

A27#

A28#

D13A9B8

E13

FSB_HA_L27

FSB_HA_L28

FSB_HA_L29

FSB_HA_L26

R24

49.9-1%

3

R146

R152

R145

51

51

51

AD5

AE5

TESTHI4

TESTHI5

TESTHI6

A29#

A30#

A31#

A32#

A33#

A34#

D12

C11B7A6A7C9C8D20

FSB_HA_L32

FSB_HA_L30

FSB_HA_L31

FSB_HA_L35

FSB_HA_L33

FSB_HA_L34

R143

R144

49.9-1%

49.9-1%

3

R141
51

FSB_DEP_L2

FSB_DEP_L1

FSB_DEP_L3

FSB_DEP_L0

AE17

AC15

AE19

DP3#

DP2#

DP1#

A35#

BR0#

BR1#

F12

AC18

DP0#

BR2#

E11

D10

BR3#

R133
51

E25

F20

C24

TDO

BNR#

D23

VCC_CORE

E24

TDI

TCK

BPRI#

BINIT#

F11

E19

F24

A25

TMS

TRST#

TRDY#

GTLREF3
GTLREF2
GTLREF1
GTLREF0

DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

STPCLK#

THERMTRIP#

PWRGD

PROCHOT#

IGNNE#

RESET#

MCERR#

DEFER#

ADSTB0#
ADSTB1#

DBSY#

DRDY#

F18

E18

ITP_TDO_P0 <4,5>
ITP_TDI_P0 <4>
ITP_TCK_P <4,5>
FSB_TRDY_L <5,9>
ITP_TRST_L <4,5>
ITP_TMS_P <4,5>

AB9

DBI3#

AE12

DBI2#

AD22

DBI1#

AC27

DBI0#

F3

VID0

E3

VID1

D3

VID2

C3

VID3

B3

VID4

F9
F23
W9
W23

Y11
Y14
Y17
Y20
Y12
Y15
Y18
Y21

F6

BPM0#

F8

BPM1#

E7

BPM2#

F5

BPM3#

E8

BPM4#

E4

BPM5#

AE6

SLP#

D4
C27

SMI#

F26
AB7
B25
D6

INIT#

G23

LINIT1

B24

LINIT0

E27

FERR#

C26
F27

A20M#

Y8
B19

REQ0#

B21

REQ1#

C21

REQ2#

C20

REQ3#

B22

REQ4#

A17

LOCK#

D7
C6

RSP#

F21

RS2#

D22

RS1#

E21

RS0#

E5

IERR#

C23
A23

HITM#

E22

HIT#

D19

ADS#

FSB_ADSTB_L0

F17

FSB_ADSTB_L1

F14

KEY604

AE30

TP13

FSB_DRDY_L <5,9>
FSB_DBSY_L <5,9>

2

FSB_DEP_L0
FSB_DEP_L1
FSB_DEP_L2
FSB_DEP_L3

FSB_DBI_L3
FSB_DBI_L2
FSB_DBI_L1
FSB_DBI_L0

VID_P0_0
VID_P0_1
VID_P0_2
VID_P0_3
VID_P0_4

FSB_HDSTBP_L3
FSB_HDSTBP_L2
FSB_HDSTBP_L1
FSB_HDSTBP_L0

FSB_HDSTBN_L3
FSB_HDSTBN_L2
FSB_HDSTBN_L1
FSB_HDSTBN_L0

CPU_BPM_L_0 <4,5>
CPU_BPM_L_1 <4,5>
CPU_BPM_L_2 <4,5>
CPU_BPM_L_3 <4,5>
CPU_BPM_L_4 <4,5>
CPU_BPM_L_5 <4,5>

TP11

TP12

2

FSB_DEP_L[0..3] <5,9>

FSB_DBI_L[0..3] <5,9>

VID_P0_[0..4] <7,23>

FSB_HDSTBP_L[0..3] <5,9>

CPU_CPUSLP_L <4,5,19>
CPU_STPCLK_L <4,5,19>
CPU_SMI_L <4,5,19>
CPU_THERMTRIP_L <4,5,21>

CPU_INIT_L <4,5,19,32>
CPU_LINIT1_NMI <4,5,19>
CPU_LINIT0_INTR <4,5,19>
CPU_FERR_L <4,5,19>
CPU_IGNNE_L <4,5,19>
CPU_A20M_L <4,5,19>

FSB_CPURST_L <4,5,9>

FSB_REQ_L0
FSB_REQ_L1
FSB_REQ_L2
FSB_REQ_L3
FSB_REQ_L4

FSB_LOCK_L <5,9>
FSB_MCERR_L <4,5,9>

FSB_RSP_L <5,9>
FSB_RS2_L <5,9>
FSB_RS1_L <5,9>
FSB_RS0_L <5,9>

FSB_DEFER_L <5,9>
FSB_HITM_L <4,5,9>
FSB_HIT_L <4,5,9>
FSB_ADS_L <5,9>

FSB_ADSTB_L[0..1] <5,9>

VCC_CORE

FSB_HDSTBN_L[0..3] <5,9>

CPU_PWR_GD <4,5,20>

FSB_REQ_L[0..4] <5,9>

R167 1

R137 1

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

C176

C42

220p

220p

C45

C225

220p

220p

PLACE CLOSE
CPU1.AB7

L14 4.7uH-0805

1 2

L13 4.7uH-0805

1 2

CPU 1_SIGNAL

1

GTL_VREF2_P0 <18>

GTL_VREF1_P0 <18>

VCCA_P0

C261
22u-10V

VSSA_P0

C251

22u-10V

VCCIOPLL_P0

Last Revision Date:

Tuesday, March 18, 2003

Sheet

352

1

Rev

00E

of

5

VCC_CORE

D D

C C

B B

A A

CPU1B

W27
W25

SOCKET_604

5

A14
A18
A24
A28

B12
B20
B26
B29

C10
C16
C22
C28

D14
D18
D24
D29

E12
E20
E26
E28

F10
F16
F22
F29

G24
G26
G28

H23
H25
H27
H29

K23
K25
K27
K29

L24
L26
L28

M23
M25
M27
M29

N23
N25
N27
N29

P24
P26
P28

R23
R25
R27

GN33

GN34

GN35

GN36

GN37

GN38

GN39

GN40

A2

VCC

A8

VCC
VCC
VCC

EMI_GND1

EMI_GND2

VCC
VCC

B6

VCC
VCC
VCC
VCC
VCC

C2

VCC

C4

VCC
VCC
VCC
VCC
VCC

D8

VCC
VCC
VCC
VCC
VCC

E2

VCC

E6

VCC
VCC
VCC
VCC
VCC

F4

VCC
VCC
VCC
VCC
VCC

G2

VCC

G4

VCC

G6

VCC

G8

VCC
VCC
VCC
VCC

H3

VCC

H5

VCC

H7

VCC

H9

VCC
VCC
VCC
VCC
VCC

J2

VCC

J4

VCC

J6

VCC

J8

VCC

J24

VCC

J26

VCC

J28

VCC

K3

VCC

K5

VCC

K7

VCC

K9

VCC
VCC
VCC
VCC
VCC

L2

VCC

L4

VCC

L6

VCC

L8

VCC
VCC
VCC
VCC

M3

VCC

M5

VCC

M7

VCC

M9

VCC
VCC
VCC
VCC
VCC

N3

VCC

N5

VCC

N7

VCC

N9

VCC
VCC
VCC
VCC
VCC

P2

VCC

P4

VCC

P6

VCC

P8

VCC
VCC
VCC
VCC

R3

VCC

R5

VCC

R7

VCC

R9

VCC
VCC
VCC
VCC
VCC
VCC

EMI_GND10

GN42

GN41

VSS
VSS
VSS

EMI_GND3

EMI_GND11

GN43

GN44

VSS

EMI_GND4

EMI_GND5

EMI_GND6

EMI_GND7

EMI_GND8

EMI_GND9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VCC
VCC

Prestonia_PWR

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

EMI_GND12

EMI_GND13

EMI_GND14

EMI_GND15

EMI_GND16

GN45

GN46

GN47

GN48

A5
A11
A21
A27
A29
B2
B9
B15
B17
B23
B28
C7
C13
C19
C25
C29
D2
D5
D11
D21
D27
D28
E9
E15
E17
E23
E29
F2
F7
F13
F19
F25
F28
G3
G5
G7
G9
G25
G27
G29
H2
H4
H6
H8
H24
H26
H28
J3
J5
W29
Y2
Y10
Y16
Y22
AA4
AA6
AA12
AA20
AA26
AB2
AB8
AB14
AB18
AB24
AC3
AC4
AC10
AC16
AC22
AD2
AD6
AD12
AD20
AD26
AE3
AE8
AE14
AE18
AE24
R29
T2
T4
T6
T8
T24
T26
T28
U3
U5
U7
U9
U23
U25
U27
U29
V2
V4
V6
V8
V24
V26
V28

4

CPU1C

M24
M26
M28

TP103

W24
W26
W28

AA15
AA17
AA23

AB11
AB21
AB27

AC2

AC7
AC13
AC19
AC25 AD3

SOCKET_604

4

GN21

GN22

GN23

GN24

GN25

GN26

GN27

GN28

GN29

GN30

GN31

J7

VSS

J9

VSS

J23

VSS

J25

VSS

J27

VSS

J29

K24
K26
K28

L23
L25
L27
L29

N24
N26
N28

P23
P25
P27
P29

R24
R26
R28

T23
T25
T27
T29

U24
U26
U28

V23
V25
V27
V29

W2
W4

Y13
Y19
Y25
AA2
AA9

AB5

MTG_GND21

MTG_GND22

MTG_GND23

MTG_GND24

GN1

MTG_GND1

GN2

MTG_GND2

GN3

MTG_GND3

GN4

MTG_GND4

GN5

MTG_GND5

GN6

MTG_GND25

MTG_GND6

VSS

K2

VSS

K4

VSS

K6

VSS

K8

VSS
VSS
VSS
VSS

L3

VSS

L5

VSS

L7

VSS

L9

VSS
VSS
VSS
VSS
VSS

M2

VSS

M4

VSS

M6

VSS

M8

VSS
VSS
VSS
VSS

N2

VSS

N4

VSS

N6

VSS

N8

VSS
VSS
VSS
VSS

P3

VSS

P5

VSS

P7

VSS

P9

VSS
VSS
VSS
VSS
VSS

R2

VSS

R4

VSS

R6

VSS

R8

VSS
VSS
VSS
VSS

T3

VSS

T5

VSS

T7

VSS

T9

VSS
VSS
VSS
VSS
VSS

U2

VSS

U4

VSS

U6

VSS

U8

VSS
VSS
VSS
VSS

V3

VSS

V5

VSS

V7

VSS

V9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Y5

VSS

Y7

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS VSS

GN32

MTH_GND26

MTG_GND27

MTG_GND28

MTG_GND29

MTG_GND30

MTG_GND31

MTG_GND32

Prestonia_PWR

MTG_GND7

MTG_GND8

MTG_GND9

MTG_GND10

MTG_GND11

MTG_GND12

MTG_GND13

GN7

GN8

GN9

GN10

GN11

GN12

GN13

3

TP14

A1

A4

GAL_VDD1
GAL_VDD2
GAL_VDD3

RSVD0

RSVD1

GAL_VDD4
GAL_VDD5
GAL_VDD6
GAL_VDD7
GAL_VDD8

GAL_VDD9
GAL_VDD10
GAL_VDD11
GAL_VDD12
GAL_VDD13
GAL_VDD14
GAL_VDD15
GAL_VDD16
GAL_VDD17
GAL_VDD18
GAL_VDD19
GAL_VDD20
GAL_VDD21
GAL_VDD22
GAL_VDD23
GAL_VDD24
GAL_VDD25
GAL_VDD26
GAL_VDD27
GAL_VDD28
GAL_VDD29
GAL_VDD30
GAL_VDD31
GAL_VDD32
GAL_VDD33
GAL_VDD34
GAL_VDD35

GAL_VSS1

GAL_VSS2

GAL_VSS3

GAL_VSS4

GAL_VSS5

GAL_VSS6

GAL_VSS7

GAL_VSS8

GAL_VSS9
GAL_VSS10
GAL_VSS11
GAL_VSS12
GAL_VSS13
GAL_VSS14
GAL_VSS15
GAL_VSS16
GAL_VSS17
GAL_VSS18
GAL_VSS19
GAL_VSS20
GAL_VSS21
GAL_VSS22
GAL_VSS23
GAL_VSS24
GAL_VSS25
GAL_VSS26
GAL_VSS27
GAL_VSS28
GAL_VSS29
GAL_VSS30
GAL_VSS31
GAL_VSS32
GAL_VSS33
GAL_VSS34

RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7

RSVD8
RSVD11
RSVD12
RSVD13

RSVD9
RSVD10
RSVD14
RSVD15
RSVD16

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

MTG_GND14

MTG_GND15

MTG_GND16

MTG_GND17

MTG_GND18

MTG_GND19

MTG_GND20

GN14

GN15

GN16

GN17

GN18

GN19

GN20

CPU1_DIODE_P
CPU1_DIODE_N

FOR PRESTONIA 604 ONLY

3

NOCONA_A4_P0

A30
B4
B31
C30
D1
D31
E30
F1
F31
G30
H1
H31
J30
K1
K31
L30
M1
M31
N1
N31
P30
R1
R31
T30
U1
U31
V30
W1
W31
Y30
AA1
AA31
AB30
AC31
AD30

A31
B30
C1
C31
D30
E1
E31
F30
G1
G31
H30
J1
J31
K30
L1
L31
M30
N30
P1
P31
R30
T1
T31
U30
V1
V31
W30
Y1
Y31
AA30
AB1
AB31
AC30
AD31

A15
A16
A26
B1
C5
D25
W3
Y3
Y27
Y28

AC1
AD1
AE4
AE15
AE16
AE27
AE21
AE11
AE2
AD23
AD17
AD15
AD9

VCC_CORE

NOCONA_C1_P0

NOCONA_AC30_P0

TP15

TP16

TP17

TP18

NOCONA_C5_P0

TP19

TP20

TP21

CPU1_DIODE_P
CPU1_DIODE_N

TP22

TP23

TP24

TP25

TP26 C162

CPU1_DIODE_P <28>
CPU1_DIODE_N <28>

C230
1u-0805

C219
1u-0805

C246
1u-0805

C164
22u-1210

C138
22u-1210

C232
1u-0805

C43
1u-0805

C48
1u-0805

C177
1u-0805

C114

X_0.1u
C121

X_0.1u
C186

0.1u
C55

0.1u
C239

0.1u
C240

0.1u
C231

0.1u
C139

0.1u
C961

0.1u
C964

0.1u
C967

0.1u
C972

0.1u
C969

0.1u
C140

0.1u

0.1u
C44

0.1u
C970

0.1u
C152

0.1u
C161

0.1u
C236

0.1u

2

C71-8210211-F06

C270

820-2.5V
C523

820-2.5V
C272

820-2.5V
C271

820-2.5V
C6

820-2.5V
C275

820-2.5V
C7

X_820-2.5V
C267

820-2.5V
C522

820-2.5V
C12

820-2.5V

C49
1u-0805

C1413

820-2.5V
C1414

820-2.5V

C244
22u-1206

C178
22u-1206

C33
22u-1206

C39
22u-1206

C38
22u-1206

C67
22u-1206

C160
22u-1206

C481
22u-1206

C150
22u-1206

C40
22u-1206

C51
22u-1206

C34
22u-1206

C111
22u-1206

C71-221061E-S03

2

C1009

0.1u
C57

0.1u
C151

0.1u
C957

0.1u
C955

0.1u
C956

0.1u
C966

0.1u
C968

0.1u
C56

0.1u
C187

0.1u
C218

0.1u
C247

0.1u
C165

0.1u
C973

0.1u
C962

0.1u
C975

0.1u
C965

0.1u
C974

0.1u
C971

0.1u

C976

0.1u

1

R80 220

R882 X_40.2-1%
R881 X_40.2-1%
R879 X_40.2-1%
R880 X_40.2-1%
R883 X_40.2-1%

R116 40.2-1%
R107 40.2-1%
R110 40.2-1%
R153 40.2-1%
R106 40.2-1%
R136 40.2-1%

R82 220
R113 220
R86 220
R99 220

R105 51
R104 220
R135 220
R81 220
R27 75-1%
R96 150-1%

R229 40.2-1%

R230 75-1%
R95 100
R72 100

R87 301-1%

R88 27.4-1%
R28 681-1%

INTEL recommand:22u*20+1u*8
INTEL OS-CON *9~10

CPU_A20M_L <3,5,19>

C1034 X_47p
C1020 X_47p
C1004 X_47p
C1010 X_47p
C1046 X_47p

FSB_BINIT_L <3,5,9>
FSB_BNR_L <3,5,9>
FSB_HITM_L <3,5,9>
FSB_HIT_L <3,5,9>
FSB_MCERR_L <3,5,9>

CPU_BPM_L_0 <3,5>
CPU_BPM_L_1 <3,5>
CPU_BPM_L_2 <3,5>
CPU_BPM_L_3 <3,5>
CPU_BPM_L_4 <3,5>
CPU_BPM_L_5 <3,5>

CPU_IGNNE_L <3,5,19>
CPU_INIT_L <3,5,19,32>
CPU_LINIT1_NMI <3,5,19>
CPU_LINIT0_INTR <3,5,19>

FSB_CPURST_L <3,5,9>
CPU_CPUSLP_L <3,5,19>
CPU_STPCLK_L <3,5,19>
CPU_SMI_L <3,5,19>
ITP_TDO_P0 <3,5>
ITP_TDI_P0 <3>

ITP_TMS_P <3,5>

ITP_TDO_P1 <5>
CPU_THERMTRIP_L <3,5,21>
CPU_FERR_L <3,5,19>

CPU_PWR_GD <3,5,20>

ITP_TCK_P <3,5>
ITP_TRST_L <3,5>

NOCONA_C5_P0 NOCONA_A4_P0

NOCONA_C1_P0

TESTLOW

NOCONA_AC30_P0

SLEW_CTRL

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

R914

49.9-1%
R919

X_49.9-1%
R917

0

CPU 1_POWER

1

Last Revision Date:

Tuesday, March 18, 2003

Sheet

VCC_CORE

Rev

00E

452

of

5

CPU_SM_WP<3,20>

CPU THERMAL SENSOR SMBUS = 32
CPU IDROM SMBUS = AA

CPU1_BSEL0
CPU1_BSEL1

+3_3V

SKTOCC_1_L<7>

FSB_HD_L0
FSB_HD_L1
FSB_HD_L2
FSB_HD_L3
FSB_HD_L4
FSB_HD_L5
FSB_HD_L6
FSB_HD_L7
FSB_HD_L8
FSB_HD_L9
FSB_HD_L10
FSB_HD_L11
FSB_HD_L12
FSB_HD_L13
FSB_HD_L14
FSB_HD_L15
FSB_HD_L16
FSB_HD_L17
FSB_HD_L18
FSB_HD_L19
FSB_HD_L20
FSB_HD_L21
FSB_HD_L22
FSB_HD_L23
FSB_HD_L24
FSB_HD_L25
FSB_HD_L26
FSB_HD_L27
FSB_HD_L28
FSB_HD_L29
FSB_HD_L30
FSB_HD_L31
FSB_HD_L32
FSB_HD_L33
FSB_HD_L34
FSB_HD_L35
FSB_HD_L36
FSB_HD_L37
FSB_HD_L38
FSB_HD_L39
FSB_HD_L40
FSB_HD_L41
FSB_HD_L42
FSB_HD_L43
FSB_HD_L44
FSB_HD_L45
FSB_HD_L46
FSB_HD_L47
FSB_HD_L48
FSB_HD_L49
FSB_HD_L50
FSB_HD_L51
FSB_HD_L52
FSB_HD_L53
FSB_HD_L54
FSB_HD_L55
FSB_HD_L56
FSB_HD_L57
FSB_HD_L58
FSB_HD_L59
FSB_HD_L60
FSB_HD_L61
FSB_HD_L62
FSB_HD_L63

FSB_HA_L[3..35]<3,9>

D D

FSB_HD_L[0..63]<3,9>

CPU1_COMP0

CPU1_COMP1

R200

R197

49.9-1%

CPU1_BSEL0

CPU1_BSEL1

5

49.9-1%

FSB_AP0_L<3,9>
FSB_AP1_L<3,9>

P1_BCLK0<8>
P1_BCLK1<8>

R313 1K

R314 1K

C C

+3_3V

+3_3V

R195
1K

R196

CPU1_FSTR1_AA29

1K

CPU1_FSTR1_AB28
CPU1_FSTR1_AA28

B B

A A

R202
1K

4

SMB_ALERT_CPU_L<3,20>

SMBUS_CPU_DATA<3,7>

SMBUS_CPU_CLK<3,7>

R329 51-1%

CPU2A

AA27
AA25

AD27
AA24

AB26
AB25
AB23
AA22
AA21
AB20
AB22
AB19
AA19
AE26
AC26
AD25
AE25
AC24
AD24
AE23
AC23
AA18
AC20
AC21
AE22
AE20
AD21
AD19
AB17
AB16
AA16
AC17
AE13
AD18
AB15
AD13
AD14
AD11
AC12
AE10
AC11

AD10

AA13
AA14
AC14
AB12
AB13
AA11
AA10
AB10

SOCKET_604

CPU1_BR0_L<3>
CPU0_BR0_L<3,9> FSB_DRDY_L <3,9>

AD8
AC9

AC8
AD7
AE7
AC6
AC5
AA8

AB6

AA3
AB3

TP27

A3B5D26

Y26

D0#
D1#

Y24

Y23

AE9

E10

ODTEN

D2#

SKTOCC#

D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#

Y9

D62#
D63#

AP0#

D9

AP1#

Y4

BCLK0

W5

BCLK1
BSEL0
BSEL1

4

VSSA_P1

VCCIOPLL_P1

TP28

AA5

B27

AD4

VSSA

VSSSENSE

VCCSENSE

A3#

A4#

A5#

A22

A20

B18

C18

FSB_HA_L6

FSB_HA_L5

FSB_HA_L3

FSB_HA_L4

+3_3V

VCCA_P1

AB4

AD29

VCCA

VCCIOPLL

A6#

A7#

A8#

A19

C17

D17

FSB_HA_L8

FSB_HA_L9

FSB_HA_L7

R327

51

CPU1_FSTR1_AA28

TP29

TP138

CPU1_FSTR1_AA29

AE29

SM_WP

SM_VCC1

AE28

SM_VCC0

CPU1_FSTR1_AB28

Y29

AA28

AB28

AB29

SM_TS_A1

SM_TS_A0

SM_EP_A2

AA29

AC29

AC28

SM_DAT

SM_EP_A1

SM_EP_A0

AD28

SM_CLK

SM_ALERT

CPU1_COMP0

CPU1_COMP1

E16

AD16

COMP1

COMP0

Prestonia 604

A9#

A10#

A11#

A12#

A13#

A14#

A15#

A16#

A17#

A18#

A19#

A20#

A21#

A22#

A23#

A13

B16

B14

B13

A12

C15

C14

D16

D15

F15

A10

B10

B11

C12

FSB_HA_L19

FSB_HA_L17

FSB_HA_L18

49.9-1%

FSB_HA_L23

FSB_HA_L21

FSB_HA_L20

FSB_HA_L22

R198

FSB_HA_L24

FSB_HA_L13

FSB_HA_L12

FSB_HA_L11

FSB_HA_L10

VCC_CORE

FSB_BNR_L<3,4,9>

FSB_BPRI_L<3,9>

FSB_BINIT_L<3,4,9>

FSB_HA_L14

FSB_HA_L16

FSB_HA_L15

R328
51

W6W7W8Y6AA7

TESTHI0

TESTHI1

A24#

A25#

A26#

E14

D13A9B8

FSB_HA_L27

FSB_HA_L26

FSB_HA_L25

3

R312
51

AD5

AE5

TESTHI2

TESTHI3

TESTHI4

TESTHI5

TESTHI6

A27#

A28#

A29#

A30#

A31#

E13

D12

C11B7A6A7C9C8D20

FSB_HA_L28

FSB_HA_L31

FSB_HA_L30

FSB_HA_L29

R324

49.9-1%

3

R310
51

A32#

A33#

A34#

FSB_HA_L32

FSB_HA_L33

FSB_HA_L34

R311

R260

51

51

FSB_DEP_L1

FSB_DEP_L3

FSB_DEP_L2

AE17

AC15

AE19

DP3#

DP2#

DP1#

A35#

BR0#

BR1#

F12

FSB_HA_L35

R331

49.9-1%

R259
51

FSB_DEP_L0

E25

C24

AC18

TDI

TDO

DP0#

BR2#

BR3#

BNR#

BPRI#

E11

D10

F20

D23

VCC_CORE

ITP_TDO_P1 <4>
ITP_TDO_P0 <3,4>

ITP_TCK_P <3,4>

E19

F24

A25

E24

TCK

TMS

TRST#

TRDY#

GTLREF3
GTLREF2
GTLREF1
GTLREF0

DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

STPCLK#

THERMTRIP#

PWRGD

PROCHOT#

IGNNE#

RESET#

MCERR#

DEFER#

ADSTB0#
ADSTB1#

BINIT#

DBSY#

DRDY#

F11

F18

E18

AB9

DBI3#

AE12

DBI2#

AD22

DBI1#

AC27

DBI0#

F3

VID0

E3

VID1

D3

VID2

C3

VID3

B3

VID4

F9
F23
W9
W23

Y11
Y14
Y17
Y20
Y12
Y15
Y18
Y21

F6

BPM0#

F8

BPM1#

E7

BPM2#

F5

BPM3#

E8

BPM4#

E4

BPM5#

AE6

SLP#

D4
C27

SMI#

F26
AB7
B25
D6

INIT#

G23

LINIT1

B24

LINIT0

E27

FERR#

C26
F27

A20M#

Y8
B19

REQ0#

B21

REQ1#

C21

REQ2#

C20

REQ3#

B22

REQ4#

A17

LOCK#

D7
C6

RSP#

F21

RS2#

D22

RS1#

E21

RS0#

E5

IERR#

C23
A23

HITM#

E22

HIT#

D19

ADS#

F17
F14

KEY604

AE30

TP32

FSB_DBSY_L <3,9>

FSB_DEP_L0
FSB_DEP_L1
FSB_DEP_L2
FSB_DEP_L3

FSB_TRDY_L <3,9>
ITP_TRST_L <3,4>
ITP_TMS_P <3,4>

FSB_DBI_L3
FSB_DBI_L2
FSB_DBI_L1
FSB_DBI_L0

VID_P1_0
VID_P1_1
VID_P1_2
VID_P1_3
VID_P1_4

FSB_HDSTBP_L3
FSB_HDSTBP_L2
FSB_HDSTBP_L1
FSB_HDSTBP_L0

FSB_HDSTBN_L3
FSB_HDSTBN_L2
FSB_HDSTBN_L1
FSB_HDSTBN_L0

TP31

FSB_ADSTB_L0
FSB_ADSTB_L1

2

FSB_DEP_L[0..3] <3,9>

VID_P1_[0..4] <7>

CPU_BPM_L_0 <3,4>
CPU_BPM_L_1 <3,4>
CPU_BPM_L_2 <3,4>
CPU_BPM_L_3 <3,4>
CPU_BPM_L_4 <3,4>
CPU_BPM_L_5 <3,4>

CPU_CPUSLP_L <3,4,19>
CPU_STPCLK_L <3,4,19>
CPU_SMI_L <3,4,19>
CPU_THERMTRIP_L <3,4,21>

TP30

CPU_INIT_L <3,4,19,32>
CPU_LINIT1_NMI <3,4,19>
CPU_LINIT0_INTR <3,4,19>
CPU_FERR_L <3,4,19>
CPU_IGNNE_L <3,4,19>
CPU_A20M_L <3,4,19>

FSB_CPURST_L <3,4,9>

FSB_LOCK_L <3,9>
FSB_MCERR_L <3,4,9>

FSB_RSP_L <3,9>
FSB_RS2_L <3,9>
FSB_RS1_L <3,9>
FSB_RS0_L <3,9>

FSB_DEFER_L <3,9>
FSB_HITM_L <3,4,9>
FSB_HIT_L <3,4,9>
FSB_ADS_L <3,9>

2

FSB_DBI_L[0..3] <3,9>

FSB_HDSTBP_L[0..3] <3,9>

FSB_REQ_L0
FSB_REQ_L1
FSB_REQ_L2
FSB_REQ_L3
FSB_REQ_L4

FSB_ADSTB_L[0..1] <3,9>

VCC_CORE

Title
Document Number

GTL_VREF2_P1 <18>

C493

C300

220p

220p

C320
220p

FSB_HDSTBN_L[0..3] <3,9>

CPU_PWR_GD <3,4,20>

PLACE CLOSE
CPU2.AB7

FSB_REQ_L[0..4] <3,9>

R319 1

R318 1

L24 4.7uH-0805

1 2

L23 4.7uH-0805

1 2

Micro Star Restricted Secret

CPU 2_SIGNAL

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

1

GTL_VREF1_P1 <18>

C495
220p

Last Revision Date:

Tuesday, March 18, 2003

Sheet

552

1

VCCA_P1

C491
22u-10V

VSSA_P1

C490

22u-10V

VCCIOPLL_P1

of

Rev

00E

5

CPU2B

GN33

GN34

GN35

GN36

GN37

GN38

GN39

GN40

EMI_GND2

EMI_GND3

EMI_GND4

EMI_GND5

EMI_GND6

EMI_GND7

EMI_GND8

Prestonia_PWR

EMI_GND10

EMI_GND11

EMI_GND12

EMI_GND13

EMI_GND14

EMI_GND15

EMI_GND16

GN42

GN43

GN44

GN45

GN46

GN47

GN48

GN41

VSS
VSS
VSS
VSS

EMI_GND9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC_CORE

D D

C C

B B

A2

VCC

A8

VCC

A14

VCC

A18

VCC

A24

EMI_GND1

VCC

A28

VCC

B6

VCC

B12

VCC

B20

VCC

B26

VCC

B29

VCC

C2

VCC

C4

VCC

C10

VCC

C16

VCC

C22

VCC

C28

VCC

D8

VCC

D14

VCC

D18

VCC

D24

VCC

D29

VCC

E2

VCC

E6

VCC

E12

VCC

E20

VCC

E26

VCC

E28

VCC

F4

VCC

F10

VCC

F16

VCC

F22

VCC

F29

VCC

G2

VCC

G4

VCC

G6

VCC

G8

VCC

G24

VCC

G26

VCC

G28

VCC

H3

VCC

H5

VCC

H7

VCC

H9

VCC

H23

VCC

H25

VCC

H27

VCC

H29

VCC

J2

VCC

J4

VCC

J6

VCC

J8

VCC

J24

VCC

J26

VCC

J28

VCC

K3

VCC

K5

VCC

K7

VCC

K9

VCC

K23

VCC

K25

VCC

K27

VCC

K29

VCC

L2

VCC

L4

VCC

L6

VCC

L8

VCC

L24

VCC

L26

VCC

L28

VCC

M3

VCC

M5

VCC

M7

VCC

M9

VCC

M23

VCC

M25

VCC

M27

VCC

M29

VCC

N3

VCC

N5

VCC

N7

VCC

N9

VCC

N23

VCC

N25

VCC

N27

VCC

N29

VCC

P2

VCC

P4

VCC

P6

VCC

P8

VCC

P24

VCC

P26

VCC

P28

VCC

R3

VCC

R5

VCC

R7

VCC

R9

VCC

R23

VCC

R25

VCC

R27

VCC

W27

VCC

W25

VCC

SOCKET_604

A A

A5
A11
A21
A27
A29
B2
B9
B15
B17
B23
B28
C7
C13
C19
C25
C29
D2
D5
D11
D21
D27
D28
E9
E15
E17
E23
E29
F2
F7
F13
F19
F25
F28
G3
G5
G7
G9
G25
G27
G29
H2
H4
H6
H8
H24
H26
H28
J3
J5
W29
Y2
Y10
Y16
Y22
AA4
AA6
AA12
AA20
AA26
AB2
AB8
AB14
AB18
AB24
AC3
AC4
AC10
AC16
AC22
AD2
AD6
AD12
AD20
AD26
AE3
AE8
AE14
AE18
AE24
R29
T2
T4
T6
T8
T24
T26
T28
U3
U5
U7
U9
U23
U25
U27
U29
V2
V4
V6
V8
V24
V26
V28

4

CPU2C

J7

VSS

J9

VSS

J23

VSS

J25

VSS

J27

VSS

J29

VSS

K2

VSS

K4

VSS

K6

VSS

K8

VSS

K24

VSS

K26

VSS

K28

VSS

L3

VSS

L5

VSS

L7

VSS

L9

VSS

L23

VSS

L25

VSS

L27

VSS

L29

VSS

M2

VSS

M4

VSS

M6

VSS

M8

VSS

M24

VSS

M26

VSS

M28

VSS

N2

VSS

N4

VSS

N6

VSS

N8

VSS

N24

VSS

N26

TP105

VSS

N28

VSS

P3

VSS

P5

VSS

P7

VSS

P9

VSS

P23

VSS

P25

VSS

P27

VSS

P29

VSS

R2

VSS

R4

VSS

R6

VSS

R8

VSS

R24

VSS

R26

VSS

R28

VSS

T3

VSS

T5

VSS

T7

VSS

T9

VSS

T23

VSS

T25

VSS

T27

VSS

T29

VSS

U2

VSS

U4

VSS

U6

VSS

U8

VSS

U24

VSS

U26

VSS

U28

VSS

V3

VSS

V5

VSS

V7

VSS

V9

VSS

V23

VSS

V25

VSS

V27

VSS

V29

VSS

W2

VSS

W4

VSS

W24

VSS

W26

VSS

W28

VSS

Y5

VSS

Y7

VSS

Y13

VSS

Y19

VSS

Y25

VSS

AA2

VSS

AA9

VSS

AA15

VSS

AA17

VSS

AA23

VSS

AB5

VSS

AB11

VSS

AB21

VSS

AB27

VSS

AC2

VSS

AC7

VSS

AC13

VSS

AC19

VSS

AC25 AD3

VSS VSS

SOCKET_604

3

TP104

NOCONA_A4_P1

A1

GN21

GN22

GN23

GN24

GN25

GN26

GN27

GN28

MTH_GND26

MTG_GND21

MTG_GND22

MTG_GND23

MTG_GND24

MTG_GND25

MTG_GND27

MTG_GND28

MTG_GND1

MTG_GND2

MTG_GND3

MTG_GND4

MTG_GND5

MTG_GND6

MTG_GND7

MTG_GND8

GN1

GN2

MTG_GND9

GN3

GN4

GN5

GN6

GN7

GN8

GN9

GN29

GN30

GN31

GN32

MTG_GND29

MTG_GND30

MTG_GND31

MTG_GND32

Prestonia_PWR

MTG_GND10

MTG_GND11

MTG_GND12

MTG_GND13

GN10

GN11

GN12

GN13

GN14

MTG_GND14

MTG_GND15

GN15

GN16

A4

GAL_VDD1
GAL_VDD2
GAL_VDD3

RSVD0

RSVD1

GAL_VDD4
GAL_VDD5
GAL_VDD6
GAL_VDD7
GAL_VDD8

GAL_VDD9
GAL_VDD10
GAL_VDD11
GAL_VDD12
GAL_VDD13
GAL_VDD14
GAL_VDD15
GAL_VDD16
GAL_VDD17
GAL_VDD18
GAL_VDD19
GAL_VDD20
GAL_VDD21
GAL_VDD22
GAL_VDD23
GAL_VDD24
GAL_VDD25
GAL_VDD26
GAL_VDD27
GAL_VDD28
GAL_VDD29
GAL_VDD30
GAL_VDD31
GAL_VDD32
GAL_VDD33
GAL_VDD34
GAL_VDD35

GAL_VSS1

GAL_VSS2

GAL_VSS3

GAL_VSS4

GAL_VSS5

GAL_VSS6

GAL_VSS7

GAL_VSS8

GAL_VSS9
GAL_VSS10
GAL_VSS11
GAL_VSS12
GAL_VSS13
GAL_VSS14
GAL_VSS15
GAL_VSS16
GAL_VSS17
GAL_VSS18
GAL_VSS19
GAL_VSS20
GAL_VSS21
GAL_VSS22
GAL_VSS23
GAL_VSS24
GAL_VSS25
GAL_VSS26
GAL_VSS27
GAL_VSS28
GAL_VSS29
GAL_VSS30
GAL_VSS31
GAL_VSS32
GAL_VSS33
GAL_VSS34

MTG_GND16

MTG_GND17

MTG_GND18

GN17

GN18

RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7

RSVD8
RSVD11
RSVD12
RSVD13

RSVD9
RSVD10
RSVD14
RSVD15
RSVD16

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

MTG_GND19

MTG_GND20

GN19

GN20

A30
B4
B31
C30
D1
D31
E30
F1
F31
G30
H1
H31
J30
K1
K31
L30
M1
M31
N1
N31
P30
R1
R31
T30
U1
U31
V30
W1
W31
Y30
AA1
AA31
AB30
AC31
AD30

A31
B30
C1
C31
D30
E1
E31
F30
G1
G31
H30
J1
J31
K30
L1
L31
M30
N30
P1
P31
R30
T1
T31
U30
V1
V31
W30
Y1
Y31
AA30
AB1
AB31
AC30
AD31

NOCONA_A15_P1

A15
A16
A26
B1

NOCONA_C5_P1

C5
D25
W3
Y3
Y27

CPU2_DIODE_N

Y28

AC1
AD1
AE4
AE15
AE16
AE27
AE21
AE11
AE2
AD23
AD17
AD15
AD9

NOCONA_C1_P1

NOCONA_AC30_P1

TP33

TP34

TP35
TP36

TP37

TP38

CPU2_DIODE_P

TP39

TP40

TP41

TP42

TP43

VCC_CORE

2

1

C321

C358
1u-0805

C324
1u-0805

C313
1u-0805

C377
1u-0805

C403
1u-0805

C372
22u-1210

C391
22u-1210

C496
1u-0805

C1051

0.1u
C363

0.1u
C381

0.1u
C401

0.1u
C362

0.1u
C404

0.1u
C409

0.1u
C354

0.1u
C400

0.1u
C380

0.1u
C315

0.1u
C311

0.1u
C316

0.1u
C293

0.1u

C1019

0.1u
C54

0.1u
C317

0.1u
C388

0.1u
C122

0.1u

C269

820-2.5V

C524

820-2.5V
C521

820-2.5V
C520

820-2.5V
C9

820-2.5V
C274

820-2.5V
C8

820-2.5V
C292

820-2.5V
C329

X_820-2.5V
C11

820-2.5V
C10

X_820-2.5V
C273

820-2.5V
C488
22u-1206

C410
22u-1206

C373
22u-1206

C487
22u-1206

C376
22u-1206

C350
22u-1206

C415
22u-1206

C498
22u-1206

C489
22u-1206

C323
22u-1206

C304
22u-1206

C305
22u-1206

C136
22u-1206

C351
22u-1206

C37

10 mils 10 mils

NOCONA_C5_P1 NOCONA_A4_P1

NOCONA_A15_P1

FORCEPR#

NOCONA_C1_P1

TESTLOW

NOCONA_AC30_P1

SLEW_CTRL

22u-1206

0.1u
C229

0.1u
C353

0.1u
C494

0.1u
C1030

0.1u
C1011

0.1u
C1041

0.1u
C1040

0.1u
C1033

0.1u
C1061

0.1u
C1027

0.1u
C1056

0.1u
C1050

0.1u
C1036

0.1u
C1018

0.1u
C995

0.1u
C993

0.1u
C990

0.1u

R912

49.9-1%
R913

49.9-1%
R920

X_49.9-1%
R918

0

VCC_CORE

VCC_CORE

NOPOP FOR NOCONA

CPU2_DIODE_P
CPU2_DIODE_N

FOR PRESTONIA 604 ONLY

5

4

3

CPU2_DIODE_P <28>
CPU2_DIODE_N <28>

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

2

http://www.msi.com.tw

CPU 2_POWER

Last Revision Date:

Tuesday, March 18, 2003

Sheet

1

Rev

00E

652

of

5

4

3

2

1

VID_P0_[0..4] <3,23>

VID_P0_0
VID_P0_1
VID_P0_2
VID_P0_3
VID_P0_4

+5V

VID_P1_[0..4] <5>

D D

C C

VID_P1_0
VID_P1_1
VID_P1_2
VID_P1_3
VID_P1_4

VID_P0_0

VID_P1_0

VID_P0_1

VID_P1_1

VID_P0_2

VID_P1_2

VID_P0_3

VID_P1_3

+3_3V

U52A

14

1
2

7

74LCX86-SO14
U52B

14

4
5

7

74LCX86-SO14
U52C

14

9

10

7

74LCX86-SO14
U52D

14
12

13

7

74LCX86-SO14

R866
1K

SKTOCC_1_L<5>

D57

3

A C

1
2

74F00-SOIC14

7

3

14

U51A

1N4148S
D51

6

8

11

A C

1N4148S
D50

A C

1N4148S
D47

A C

1N4148S

14

U51B

R867

4
5

74F00-SOIC14

7

6

1 2

R862 4.7K

4.7K

1 2

14

U51C

9

10

74F00-SOIC14

7

8

LOW ENABLE

B

+5V

12

R863

8.2K

Q80

E C

MMBT3904

D3

A C

1N4148S

VRM_OUTEN_L <23>

SMBCLK <8,13,14,24,25,26,27,41,43>

B B

+12V

12

R858

VCCT

1K-1206

3.3V

RLZ3.3B-S-LL34

A A

5

D58

A C

C940
1000p

VID_P0_2
VID_P1_2
VID_P0_3
VID_P1_3
VID_P0_4

VID_P0_0
VID_P1_0
VID_P0_1
VID_P1_1
VID_P1_4

4

7 8
5 6
3 4
1 2
1 2

R828 1K

RN101 8P4R-1K

RN102 8P4R-1K

1 2
3 4
5 6
7 8
1 2

R822 1K

VCCT

VCCT

3

12
13

14

U51D

74F00-SOIC14

7

11

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

2

http://www.msi.com.tw

R947

0

1 2

SMBUS_CPU_CLK <3,5>

SMBDATA <8,13,14,24,25,26,27,41,43>

R948

0

1 2

SMBUS_CPU_DATA <3,5>

Micro Star Restricted Secret

VID COMPARE

Last Revision Date:

Tuesday, March 18, 2003

Sheet

752

1

Rev

00E

of

5

4

3

2

1

CP6

X_COPPER

S2

R370

X_10K

R388

4.7K

FB19

X_80-0805

R366

49.9-1%

R365

49.9-1%

VCC3_CLK

C620
22u-1206

14M-32pf-HC49S-D

C612

X_10p

R364

49.9-1%

VRM_GD<23>

Y2

C626

0.1u

SMBDATA<7,13,14,24,25,26,27,41,43>

SMBCLK<7,13,14,24,25,26,27,41,43>

R363

49.9-1%

4

C627

0.1u

R362

49.9-1%

R474

10K

C629

0.1u

CLK_GEN_1

CLK_GEN_2

C585
X_10p

R393 33

R394 33

R395 33

R396 33

R397 33

R398 33

12

C628

C581

0.1u

0.1u

MULT0
FSB_FREQ_SEL
S2

CPU_VRD_PWR_GD_L

P0_BCLK0_R

P0_BCLK1_R

P1_BCLK0_R

P1_BCLK1_R

MCH_BCLK0_R

MCH_BCLK1_R

CPU3_R
CPU3_L_R

R387

475-1%

VCC3_CLK

R438

10K

Q52

B

MMBT3904

E C

C582

C562

C561

0.1u

0.1u

0.1u

U21

2

XTAL_IN

3

XTAL_OUT

43

MULT0

55

S1

40

S2

30

SCLK

29

SDATA

28

PWR_GD#

52

CPU0

51

CPU0#

49

CPU1

48

CPU1#

45

CPU2

44

CPU2#

54

CPU3

53

CPU3#

42

IREF

475 FOR 50 ohm
impedance

CPU_VRD_PWR_GD_L

R456

X_1K

1

8

14

19

32

37

VDD_PCI

VDD_PCI

VDD_REF

VDD_3V66

VDD_3V66

SM bus addr.=D2h

GND_REF

GND_3V66

GND_PCI

GND_PCI

4

9

15

20

31

Q53

B

E C

MMBT3904

3

D D

VCC3_CLK

C C

R369 4.7K
R444 4.7K
R399 4.7K

differential 100 ohm
single ended 50 ohm

+3_3V

MULT0
PWRDWN_L
CLK_PCISTOP_L

4.75/7/25

P0_BCLK0<3>

P0_BCLK1<3>

P1_BCLK0<5>

P1_BCLK1<5>

MCH_BCLK0<9>

MCH_BCLK=P?_BCLK+0.282"

MCH_BCLK1<9>

R392 10K

B B

+3_3V

A A

R368 10K

R367

49.9-1%

R1557

10K

CPU0_BSEL0 <3>

FSB_FREQ_SEL

5

46

50

VDD_CPU

VDD_CPU

VDD_48MHZ

GND_3V66

GND_48MHZ

GND_IREF

GND_CPU

36

41

47

R477

10K

VCC3_CLKA

26

VDD_CORE

3V66_0

3V66_1/VCH
66BUF0/3V66_2
66BUF1/3V66_3
66BUF2/3V66_4

66IN/3V66_5

PCI_F0
PCI_F1
PCI_F2

USB_48MHZ

DOT_48MHZ

PWR_DWN#

PCI_STOP#

GND_CORE

ICS-CY28329-SSOP56

27

ICS-932S203AF

3VDUAL

12

REF0

PCI0
PCI1
PCI2
PCI3
PCI4
PCI5
PCI6

1 2

C617

0.1u

56

33
35
21
22
23
24

10
11
12
13
16
17
18
5
6
7
39
38

25

34

R476

1k

ICH4_14MHZ_CLK_R

MCH_66MHZ_CLK_R
ICH4_66MHZ_CLK_R

AGP_66MHZ_CLK_R

PWRDWN_L

CLK_PCISTOP_L

CP5

X_COPPER

FB17

C615

X_80-0805

22u-1206

TP44

TP45
TP46

PCI0_33MHZ_CLK_R
PCI1_33MHZ_CLK_R

FWH_33MHZ_CLK_R
SIO_33MHZ_CLK_R

R452 33
R453 33

ICH4_33MHZ_CLK_R

TP48

ICH4_USB_48MHZ_CLK_R
DOT_48MHZ_CLK_R

SKTOCC_0_L <3>

+3_3V

Width/Space=6/24 for all clock on layer 8

R386 33
R402 33
R391 33

R447 33
R448 33

R450 33
R451 33
R449 33

R446 33

R1592 33

C655
1u

2

R455 33

R389 33
R390 33

C539
X_10p

C646
X_10p

C651
X_10p

C540
X_10p

C542

C573

X_10p

X_10p

C647
X_10p

PCI3_33MHZ_CLK <25>
PCI4_33MHZ_CLK <26>

C652
X_10p

ICH4_48MHZ_CLK <20>
SIO_48MHZ_CLK <28>

C541
X_10p

C633

C125

0.1u

0.1u

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

C1272
X_10p

+3_3V +3_3V +3_3V +3_3V+3_3V +3_3V

C937

0.1u

Micro Star Restricted Secret

ICH4_14MHZ_CLK <20>
MCH_66MHZ_CLK <10>
ICH4_66MHZ_CLK <20>

L=A
L=A-0.184"
L=A+0.243"

AGP_66MHZ_CLK <17>

C654
X_10p

C649
X_10p

W/S=6/24

C650
X_10p

C648
X_10p

C928

0.1u

L=A-4.189"

PCI0_33MHZ_CLK <46>
PCI1_33MHZ_CLK <48>

FWH_33MHZ_CLK <32>
SIO_33MHZ_CLK <28>
PCI2_33MHZ_CLK <24>

ICH4_33MHZ_CLK <19>

B=A-0.157"

PCI5_33MHZ_CLK <27>

C645
X_10p

C173

C597

0.1u

0.1u

around clock for EMI

CLOCK

Last Revision Date:

Tuesday, March 18, 2003

Sheet

852

1

of

B-2.5"

B-2.5"

B
B

B

Rev

00E

5

4

3

2

1

FSB_ADSTB_L[0..1]<3,5>

DEVRST_L1<43>

R194 100

+3_3V

F3
F2

H4

G4
C9
C8

B6

B7

A8

A7

D1

E1

U16A

ADS#
AP0#
AP1#

BINIT#
BNR#
BPRI#
BREQ0#

CPURST#
DEP0#

DEP1#
DEP2#
DEP3#

DBSY#
DEFER#
DINV0#
DINV1#
DINV2#
DINV3#

DRDY#
HITM#
HIT#
HTRDY#

HREQ4#
HREQ3#
HREQ2#
HREQ1#
HREQ0#
HLOCK#
XERR#

RS0#
RS1#
RS2#
RSP#

HXRCOMP
HXSWNG
HYRCOMP
HYSWNG

MCH

R228 4.7K

J16

J17

HCLKINP

HCLKINN

HA3#

HA4#

HA5#

H15

F11D8E9

J24

J18

RSTIN#

TESTIN#

HA6#

HA7#

HA8#

HA9#

HA10#

HA11#

HA12#

HA13#

HA14#

HA15#

G11D7F9A4E7C5B4B3A5D5H12

FSB_ADSTB_L1

FSB_ADSTB_L0

C6

H9

HADSTB0#

HADSTB1#

MCH_HOST I/F

HA16#

HA17#

HA18#

HA19#

HA20#

J12

J11E6F6H6G8

FSB_HD_L6

FSB_HD_L3

FSB_HD_L5

FSB_HD_L4

FSB_HD_L2

FSB_HD_L0

FSB_HD_L1

B31

G25

C29

C30

G26

A29

D29

HD0#

HD1#

HD2#

HD3#

HD4#

HD5#

HD6#

HA21#

HA22#

HA23#

HA24#

HA25#

HA26#

HA27#

H10J9F5D4J8G7H7E3C2C3G5

FSB_HD_L7

A31

FSB_HD_L8

B30

HD7#

HA28#

FSB_HD_L9

E28

HD8#

HA29#

FSB_HD_L10

D28

HD9#

HD10#

HA30#

HA31#

FSB_HD_L12

FSB_HD_L11

D26

E25

HD11#

HD12#

HA32#

HA33#

FSB_HD_L14

FSB_HD_L13

F27

G23

HD13#

HD14#

HA34#

HA35#

E4

FSB_HD_L15

FSB_HD_L16

H24

A28

HD15#

HD16#

CCVREF

B9

FSB_HD_L18

FSB_HD_L17

B28

B27

HD17#

HD18#

HDVREF3

HDVREF2

A11

A22

FSB_HD_L19

FSB_HD_L20

C27

A26

HD19#

HD20#

HDVREF1

HDVREF0

F21

F24

FSB_HD_L22

FSB_HD_L21

C26

B25

HD21#

HD22#

HAVREF0

HAVREF1

F8

D2

FSB_HD_L24

FSB_HD_L23

A25

H22

HD23#

HD24#

HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#

HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

FSB_HD_L25

D23

FSB_HD_L26

F23

FSB_HD_L27

C24

FSB_HD_L28

D22

FSB_HD_L29

E24

FSB_HD_L30

E22

FSB_HD_L31

G20

FSB_HD_L32

A23

FSB_HD_L33

B22

FSB_HD_L34

C23

FSB_HD_L35

D20

FSB_HD_L36

B24

FSB_HD_L37

C21

FSB_HD_L38

D19

FSB_HD_L39

A20

FSB_HD_L40

B18

FSB_HD_L41

B19

FSB_HD_L42

E19

FSB_HD_L43

C18

FSB_HD_L44

H19

FSB_HD_L45

E18

FSB_HD_L46

H18

FSB_HD_L47

G19

FSB_HD_L48

F17

FSB_HD_L49

F18

FSB_HD_L50

G17

FSB_HD_L51

A17

FSB_HD_L52

D17

FSB_HD_L53

D16

FSB_HD_L54

A16

FSB_HD_L55

B16

FSB_HD_L56

C14

FSB_HD_L57

D14

FSB_HD_L58

B13

FSB_HD_L59

C12

FSB_HD_L60

B12

FSB_HD_L61

A14

FSB_HD_L62

B15

FSB_HD_L63

A13

FSB_HDSTBN_L0

E27

FSB_HDSTBN_L1

G22

FSB_HDSTBN_L2

B21

FSB_HDSTBN_L3

C17

FSB_HDSTBP_L0

F26

FSB_HDSTBP_L1

H21

FSB_HDSTBP_L2

C20

FSB_HDSTBP_L3

E16

FSB_HD_L[0..63] <3,5>

FSB_HDSTBN_L[0..3] <3,5>

FSB_HDSTBP_L[0..3] <3,5>

D D

FSB_ADS_L<3,5>

FSB_AP0_L<3,5>
FSB_AP1_L<3,5>

FSB_BINIT_L<3,4,5>

FSB_BNR_L<3,4,5>

FSB_BPRI_L<3,5>

CPU0_BR0_L<3,5>

FSB_CPURST_L<3,4,5>

FSB_DEP_L[0..3]<3,5>

C C

B B

FSB_DBSY_L<3,5>

FSB_DEFER_L<3,5>

FSB_DBI_L[0..3]<3,5>

FSB_DRDY_L<3,5>

FSB_HITM_L<3,4,5>

FSB_HIT_L<3,4,5>

FSB_TRDY_L<3,5>

FSB_REQ_L[0..4]<3,5>

FSB_LOCK_L<3,5>

FSB_MCERR_L<3,4,5>

FSB_RS0_L<3,5>
FSB_RS1_L<3,5>
FSB_RS2_L<3,5>
FSB_RSP_L<3,5>

R247

R226

24.9-1%

24.9-1%

HXRCOMP
HYRCOMP

MCH_BCLK1<8>
MCH_BCLK0<8>

FSB_DEP_L0
FSB_DEP_L1
FSB_DEP_L2
FSB_DEP_L3

FSB_DBI_L0
FSB_DBI_L1
FSB_DBI_L2
FSB_DBI_L3

FSB_REQ_L4
FSB_REQ_L3
FSB_REQ_L2
FSB_REQ_L1
FSB_REQ_L0

HSWNG0
HSWNG1

A10

B10
F15
F12

D10

H16
H25
D25
A19
C15

E15
D13
D11

G14
E10
H13
G13
G10

E12
F14
E13

C11
G16
F20
E21

GTL_VREF_MCH <18>

FSB_HA_L28

FSB_HA_L27

FSB_HA_L11

FSB_HA_L12

FSB_HA_L4

FSB_HA_L5

FSB_HA_L3

FSB_HA_L6

FSB_HA_L7

FSB_HA_L8

FSB_HA_L14

FSB_HA_L10

FSB_HA_L13

FSB_HA_L9

FSB_HA_L15

FSB_HA_L16

FSB_HA_L17

FSB_HA_L18

FSB_HA_L19

FSB_HA_L20

FSB_HA_L21

FSB_HA_L22

FSB_HA_L23

FSB_HA_L24

FSB_HA_L25

FSB_HA_L26

FSB_HA_L29

FSB_HA_L30

FSB_HA_L31

FSB_HA_L32

FSB_HA_L33

FSB_HA_L34

FSB_HA_L35

FSB_HA_L[3..35] <3,5>

C405

0.01u

VCC_CORE

C331

C309

VCC_CORE VCC_CORE

A A

301-1%

HSWNG0

R232

R233

150-1%

C346

0.01u

5

4

R219
301-1%

R220
150-1%

HSWNG1

C336

0.01u

3

C344

0.1u

0.1u

C370

0.1u

0.1u

2

C378

C417

0.1u

C408

0.1u

MCH_HOST

C326

0.1u

0.1u

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

C477

C476

0.1u

0.1u

Last Revision Date:

Tuesday, March 18, 2003

Sheet

952

1

C339

0.1u

Rev

00E

of

5

U16F

AGP_AD31
AGP_AD30
AGP_AD29
AGP_AD28
AGP_AD27

D D

C C

AGP_AD[0..31]<17>

AGP_AD26
AGP_AD25
AGP_AD24
AGP_AD23
AGP_AD22
AGP_AD21
AGP_AD20
AGP_AD19
AGP_AD18
AGP_AD17
AGP_AD16
AGP_AD15
AGP_AD14
AGP_AD13
AGP_AD12
AGP_AD11
AGP_AD10
AGP_AD9
AGP_AD8
AGP_AD7
AGP_AD6
AGP_AD5
AGP_AD4
AGP_AD3
AGP_AD2
AGP_AD1
AGP_AD0

AGP_DBI_LO<17>

AGP_DBI_HI<17>

AGP_RBF<17>

AGP_WBF<17>

AGP_DEVSEL<17>

AGP_IRDY<17>
AGP_SERR<17>

TP49
TP50
TP51

AA3

AA2

AL10

M6
M2
M3
N2
N1
M5

P1

N4

T1

N7

T4
P6

N8

P7

P9
R9
R8

V8

T7
U7
U6

V6

V5

W8
W1
W5
W2
W4

Y1

Y3

Y4

M8
M9

J3

K5

W7

V9

Y7

L9

GAD31
GAD30
GAD29
GAD28
GAD27
GAD26
GAD25
GAD24
GAD23
GAD22
GAD21
GAD20
GAD19
GAD18
GAD17
GAD16
GAD15
GAD14
GAD13
GAD12
GAD11
GAD10
GAD9
GAD8
GAD7
GAD6
GAD5
GAD4
GAD3
GAD2
GAD1
GAD0

GDBI_LO
GDBI_HI/PIPE*
RBF
WBF
GDEVSEL
GIRDY
GSERR

RSV
RSV
RSV

MCH

GCBE3
GCBE2
GCBE1
GCBE0

GREQ
GGNT

GFRAME

GTRDY

GPAR

GSTOP

PSWNG_AGP1
PSWNG_AGP0

PRCOMP_AGP1
PRCOMP_AGP0

PREF_AGP1
PREF_AGP0

AD_STB0F
AD_STB0S
AD_STB1F
AD_STB1S

SB_STBF

SB_STBS

SBA7#
SBA6#
SBA5#
SBA4#
SBA3#
SBA2#
SBA1#
SBA0#

GCLKIN

ST2
ST1
ST0

4

J5
H3
H1

AGP_C_BE_L3

R2

AGP_C_BE_L2

T8

AGP_C_BE_L1

U9

AGP_C_BE_L0

U1

J6
K8
Y6
AB2
AA5
AB1

U4
N5

P4
T5

T2
U3

V3
V2
P3
R3
L3
K2

AGP_SBA_L7

L6

AGP_SBA_L6

L7

AGP_SBA_L5

L4

AGP_SBA_L4

L1

AGP_SBA_L3

K1

AGP_SBA_L2

K4

AGP_SBA_L1

J2

AGP_SBA_L0

K7

Y9

AGP_ST2
AGP_ST1
AGP_ST0

AGP_REQ <17>
AGP_GNT <17>
AGP_FRAME <17>
AGP_TRDY <17>
AGP_PAR <17>
AGP_STOP <17>

AGP_VSWNG

R270 43.2-1%
R283 43.2-1%

AGP_ADSTB0F <17>
AGP_ADSTB0S <17>
AGP_ADSTB1F <17>
AGP_ADSTB1S <17>
AGP_SBSTBF <17>
AGP_SBSTBS <17>

AGP_ST[0..2] <17>

AGP_C_BE_L[0..3] <17>

+1_5V

AGP_SBA_L[0..7] <17>

MCH_66MHZ_CLK <8>

+1_3V

+1_5V

AGP_VREF <17,18>

C428

0.01u

3

U16G

HIA_VSWNG_MCH<18>

HIA_VREF_MCH<18>

HIB_VSWNG_MCH<18>

HIB_VREF_MCH<18>

HIA_VSWNG_MCH
HIA_VREF_MCH

HIA_RCOMP_MCH

HI_A[0..11]<19>

HIA_STBF<19>
HIA_STBS<19>

HIB_VSWNG_MCH
HIB_VREF_MCH

HIB_RCOMP_MCH

TP139
TP140
TP141
TP142

HI_A11
HI_A10
HI_A9
HI_A8
HI_A7
HI_A6
HI_A5
HI_A4
HI_A3
HI_A2
HI_A1
HI_A0

AD2
AE1
AC1

AA6
AC6
AE2
AB7
AA9
AB8
AA8
AC7
AC4
AD3
AC3
AB4

AD5
AB5

AJ4

AG6

AF7

AL2

AF6
AG3
AG5

AF4
AK3

AL1

AJ3
AK2

AJ1
AH1
AH2
AD9

AF1

AF3
AE5
AE7
AD6
AC9
AG2
AD8

AE4
AE8
AH4
AH5

HI_A_PSWNG
HI_A_PREF
HI_A_PRCOMP

HI_A11
HI_A10
HI_A9
HI_A8
HI_A7
HI_A6
HI_A5
HI_A4
HI_A3
HI_A2
HI_A1
HI_A0

HI_A_PSTRBF
HI_A_PSTRBS

HI_B_PSWNG
HI_B_PREF
HI_B_PRCOMP

HI_B21
HI_B20
HI_B18
HI_B17
HI_B16
HI_B15
HI_B14
HI_B13
HI_B12
HI_B11
HI_B10
HI_B9
HI_B8
HI_B7
HI_B6
HI_B5
HI_B4
HI_B3
HI_B2
HI_B1
HI_B0

HI_B_PSTRBF
HI_B_PSTRBS
HI_B_PUSTRBF
HI_B_PUSTRBS

MCH

2

SMB_SCL
SMB_SDA

PWRGD

TDIOANODE

TDIOCATHODE

XORMODE#

NC
NC

J21
J20

J23

Y11
W11

G1

R6
R5

TP130

12 mil

TP_MCH_NC_R6
TP_MCH_NC_R5

R269 4.7k
R268 4.7k

SYS_PWR_GD_3_3V <20,43>

R1579 4.7k

6 mil

R304

51-1%

TP129

R288

51-1%

1

+3_3V

+3_3V

R293

8.2K

+3_3V

B B

+1_5V

C427

C446

C432

C570

C425

0.1u

0.1u

0.1u

0.1u

0.1u

MCH_AGP_DECPL

+1_5V

1u-0805

C454

C465
1u-0805

PLACE WITHIN 1" OF MCH

R284

1.43K-1%

C429

0.1u

AGP_VSWNG

C430

0.01u

AGP_VSWNG:
8X:800mV 4X:VREF=750mV
SILICON WILL IGNORE VSWNG IN 4X
AND CONNECT IT TO VREF IN THE
SILICON.

796 mV

A A

5

R281

1.62K-1%

4

C1045

0.1u

C435

0.1u

C1404

0.1u

3

C1405

0.1u

PLACE THESE
COMPONENTS WITHIN

0.5" OF THE MCH

24.9 ohm for +1.2V

43.2 ohm for +1.5V

6 mil

HIA_RCOMP_MCH

6 mil

HIB_RCOMP_MCH

2

+1_3V +1_3V

R299

31.2-1%

C451

R276

31.2-1%

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

0.01u

C453

0.01u

Micro Star Restricted Secret

HIA_VSWNG_MCH
HIA_VREF_MCH

C452

4.7u

HIB_VSWNG_MCH
HIB_VREF_MCH

C439

0.01u

MCH_AGP&HLA&HLB

Last Revision Date:

Tuesday, March 18, 2003

Sheet

1

10 52

of

Rev

00E

5

6 mil

6 mil

L25

DQ_A0

J27

DQ_A1

J29

DQ_A2

L27

DQ_A3

M25

DQ_A4

G29

DQ_A5

K28

DQ_A6

M26

DQ_A7

P25

DQ_A8

R25

DQ_A9

R26

DQ_A10

R27

DQ_A11

T25

DQ_A12

M29

DQ_A13

P27

DQ_A14

P28

DQ_A15

V26

DQ_A16

U27

DQ_A17

W25

DQ_A18

W29

DQ_A19

V25

DQ_A20

U28

DQ_A21

W26

DQ_A22

W28

DQ_A23

AA25

DQ_A24

AB25

DQ_A25

AC28

DQ_A26

AD29

DQ_A27

AA26

DQ_A28

AB26

DQ_A29

AC27

DQ_A30

AE29

DQ_A31

AE21

DQ_A32

AE20

DQ_A33

AH23

DQ_A34

AG21

DQ_A35

AJ25

DQ_A36

AJ24

DQ_A37

AH22

DQ_A38

AJ22

DQ_A39

AE18

DQ_A40

AJ19

DQ_A41

AJ18

DQ_A42

AH17

DQ_A43

AF18

DQ_A44

AK20

DQ_A45

AG17

DQ_A46

AE17

DQ_A47

AE15

DQ_A48

AF15

DQ_A49

AG15

DQ_A50

AE14

DQ_A51

AK15

DQ_A52

AK14

DQ_A53

AJ13

DQ_A54

AG14

DQ_A55

AG12

DQ_A56

AH10

DQ_A57

AF12

DQ_A58

AE11

DQ_A59

AH11

DQ_A60

AJ10

DQ_A61

AG11

DQ_A62

AE12

DQ_A63

AF25

CB_A7

AG26

CB_A6

AE24

CB_A5

AE26

CB_A4

AE23

CB_A3

AG27

CB_A2

AF26

CB_A1

AF27

CB_A0

AG33

ODTCOMP

AG32

DVREF_A

L24

DDR_STRAP

DDR_STRAP

U16C

MCH

MCH_DDR CHA

GND for registered
DDR

CHA_DQ[0..63]<13,15> CHB_DQ[0..63]<14,15>

D D

C C

B B

CHA_CB[0..7]<13,15>

A A

CHA_VREF<13,16>

CHA_DQ0
CHA_DQ1
CHA_DQ2
CHA_DQ3
CHA_DQ4
CHA_DQ5
CHA_DQ6
CHA_DQ7
CHA_DQ8
CHA_DQ9
CHA_DQ10
CHA_DQ11
CHA_DQ12
CHA_DQ13
CHA_DQ14
CHA_DQ15
CHA_DQ16
CHA_DQ17
CHA_DQ18
CHA_DQ19
CHA_DQ20
CHA_DQ21
CHA_DQ22
CHA_DQ23
CHA_DQ24
CHA_DQ25
CHA_DQ26
CHA_DQ27
CHA_DQ28
CHA_DQ29
CHA_DQ30
CHA_DQ31
CHA_DQ32
CHA_DQ33
CHA_DQ34
CHA_DQ35
CHA_DQ36
CHA_DQ37
CHA_DQ38
CHA_DQ39
CHA_DQ40
CHA_DQ41
CHA_DQ42
CHA_DQ43
CHA_DQ44
CHA_DQ45
CHA_DQ46
CHA_DQ47
CHA_DQ48
CHA_DQ49
CHA_DQ50
CHA_DQ51
CHA_DQ52
CHA_DQ53
CHA_DQ54
CHA_DQ55
CHA_DQ56
CHA_DQ57
CHA_DQ58
CHA_DQ59
CHA_DQ60
CHA_DQ61
CHA_DQ62
CHA_DQ63

CHA_CB7
CHA_CB6
CHA_CB5
CHA_CB4
CHA_CB3
CHA_CB2
CHA_CB1
CHA_CB0

R184 402-1%

PLACE CLOSE
TO MCH < 0.5"

5

C287

0.1u

4

4

DM8/DQS_A17
DM7/DQS_A16
DM6/DQS_A15
DM5/DQS_A14
DM4/DQS_A13
DM3/DQS_A12
DM2/DQS_A11
DM1/DQS_A10

DM0/DQS_A9

DQS_A8
DQS_A7
DQS_A6
DQS_A5
DQS_A4
DQS_A3
DQS_A2
DQS_A1
DQS_A0

CMDCLK_A0

CMDCLK_A0#

CMDCLK_A1

CMDCLK_A1#

CMDCLK_A2

CMDCLK_A2#

CMDCLK_A3

CMDCLK_A3#

CMDCLK_A4

CMDCLK_A4#

CMDCLK_A5

CMDCLK_A5#

CMDCLK_A6/CS_A5#

CMDCLK_A6#/CS_A4#

CMDCLK_A7

CMDCLK_A7#

CKE_A3
CKE_A2
CKE_A1
CKE_A0

MA_A13
MA_A12
MA_A11
MA_A10

MA_A9
MA_A8
MA_A7
MA_A6
MA_A5
MA_A4
MA_A3
MA_A2
MA_A1
MA_A0

BA_A1
BA_A0

RAS_A#
CAS_A#

WE_A#

CS_A3#
CS_A2#
CS_A1#
CS_A0#

DRCOMPVREF_V
DRCOMPVREF_H

DRCOMP_V
DRCOMP_H

RCVENOUT_A#

AH29
AJ9
AH14
AH19
AG23
AB28
V27
N28
H28
AH28
AK8
AJ15
AG18
AF21
AB29
V29
N29
K26

AF24
AG24
AE22
AF22
AK21
AJ21
AF19
AE19
K25
J26
D31
D32
AG8
AG9
AJ6
AJ7

K31
N26
J33
K29

AM9
P33
R32
AM22
R30
Y27
T29
AA32
Y30
AA30
AC24
AD26
AG30
AH25

AH20
AE16

AL16
AN14
AM15

AF9
AF10
AJ12
AF13

AJ31
AK32

AJ33
AK33

AH31

CHA_DQS17
CHA_DQS16
CHA_DQS15
CHA_DQS14
CHA_DQS13
CHA_DQS12
CHA_DQS11
CHA_DQS10
CHA_DQS9
CHA_DQS8
CHA_DQS7
CHA_DQS6
CHA_DQS5
CHA_DQS4
CHA_DQS3
CHA_DQS2
CHA_DQS1
CHA_DQS0

CHA_CMDCLK0
CHA_CMDCLK0_L
CHA_CMDCLK1
CHA_CMDCLK1_L

CHA_CMDCLK4
CHA_CMDCLK4_L
CHA_CMDCLK5
CHA_CMDCLK5_L
CHA_CMDCLK6
CHA_CMDCLK6_L
CHA_CMDCLK7
CHA_CMDCLK7_L

CHA_MA13
CHA_MA12
CHA_MA11
CHA_MA10
CHA_MA9
CHA_MA8
CHA_MA7
CHA_MA6
CHA_MA5
CHA_MA4
CHA_MA3
CHA_MA2
CHA_MA1
CHA_MA0

CHA_BA1
CHA_BA0

CHA_CS_L3
CHA_CS_L2
CHA_CS_L1
CHA_CS_L0

CHA_CMDCLK0 <13>
CHA_CMDCLK0_L <13>
CHA_CMDCLK1 <13>

TP52
TP54
TP56
TP58

CHA_CKE3
CHA_CKE1

CHA_CKE0

CHA_RAS_L <13,15>
CHA_CAS_L <13,15>
CHA_WE_L <13,15>

DRCOMPVREF_V <16>
DRCOMPVREF_H <16>

6 mil

CHA_RCVENOUT_L <16>

CHA_CMDCLK1_L <13>

CHA_CMDCLK4 <13>
CHA_CMDCLK4_L <13>
CHA_CMDCLK5 <13>
CHA_CMDCLK5_L <13>
CHA_CMDCLK6 <13>
CHA_CMDCLK6_L <13>
CHA_CMDCLK7 <13>
CHA_CMDCLK7_L <13>

CHA_CKE2 <13,15>
CHA_CKE1 <13,15>
CHA_CKE0 <13,15> CHB_CKE0 <14,15>

CHA_BA[0..1] <13,15>

CHA_CS_L3 <13,15>
CHA_CS_L2 <13,15>
CHA_CS_L1 <13,15>
CHA_CS_L0 <13,15>

R164 24.9-1%

R165 24.9-1%

3

CHB_DQ0
CHB_DQ1
CHB_DQ2
CHB_DQ3
CHB_DQ4
CHB_DQ5
CHB_DQ6
CHB_DQ7
CHB_DQ8
CHB_DQ9
CHB_DQ10
CHB_DQ11
CHB_DQ12
CHB_DQ13
CHB_DQ14
CHB_DQ15
CHB_DQ16
CHB_DQ17
CHB_DQ18

CHA_DQS[0..17] <13,15> CHB_DQS[0..17] <14,15>

CHA_MA[0..13] <13,15>

CHB_CB[0..7]<14,15>

CHB_VREF<14,16>

3

CHB_DQ19
CHB_DQ20
CHB_DQ21
CHB_DQ22
CHB_DQ23
CHB_DQ24
CHB_DQ25
CHB_DQ26
CHB_DQ27
CHB_DQ28
CHB_DQ29
CHB_DQ30
CHB_DQ31
CHB_DQ32
CHB_DQ33
CHB_DQ34
CHB_DQ35
CHB_DQ36
CHB_DQ37
CHB_DQ38
CHB_DQ39
CHB_DQ40
CHB_DQ41
CHB_DQ42
CHB_DQ43
CHB_DQ44
CHB_DQ45
CHB_DQ46
CHB_DQ47
CHB_DQ48
CHB_DQ49
CHB_DQ50
CHB_DQ51
CHB_DQ52
CHB_DQ53
CHB_DQ54
CHB_DQ55
CHB_DQ56
CHB_DQ57
CHB_DQ58
CHB_DQ59
CHB_DQ60
CHB_DQ61
CHB_DQ62
CHB_DQ63

CHB_CB7
CHB_CB6
CHB_CB5
CHB_CB4
CHB_CB3
CHB_CB2
CHB_CB1
CHB_CB0

PLACE CLOSE
TO MCH < 0.5"

C286

0.1u

M33

W32

W31
AC33
AC31
AD30
AE32
AB31
AB32
AD32
AE31

AL26
AM25
AN24

AL23
AN26
AK26
AK24
AK23
AN21
AM19
AN18
AK17
AN20

AL20
AM18

AL17

AL13
AM13

AL11
AM10

AL14
AN12
AN11

AN9
AM7

AM4
AN3

AM6
AM3

AK27

AL28
AK30

AJ30
AM28

AL29
AN30
AM30

AF33

E31

DQ_B0

F32

DQ_B1

G32

DQ_B2

H33

DQ_B3

E33

DQ_B4

F30

DQ_B5

H30

DQ_B6

H31

DQ_B7

L33

DQ_B8

L31

DQ_B9

P31

DQ_B10

P30

DQ_B11

K32

DQ_B12
DQ_B13

N32

DQ_B14

N31

DQ_B15

U33

DQ_B16

U30

DQ_B17
DQ_B18

Y33

DQ_B19

T32

DQ_B20

U31

DQ_B21

V30

DQ_B22
DQ_B23
DQ_B24
DQ_B25
DQ_B26
DQ_B27
DQ_B28
DQ_B29
DQ_B30
DQ_B31
DQ_B32
DQ_B33
DQ_B34
DQ_B35
DQ_B36
DQ_B37
DQ_B38
DQ_B39
DQ_B40
DQ_B41
DQ_B42
DQ_B43
DQ_B44
DQ_B45
DQ_B46
DQ_B47
DQ_B48
DQ_B49
DQ_B50
DQ_B51
DQ_B52
DQ_B53
DQ_B54
DQ_B55
DQ_B56

AL7

DQ_B57
DQ_B58
DQ_B59

AL8

DQ_B60
DQ_B61

AL4

DQ_B62
DQ_B63

CB_B7
CB_B6
CB_B5
CB_B4
CB_B3
CB_B2
CB_B1
CB_B0

DVREF_B

MCH

2

2

MCH_DDR CHB

DM8/DQS_B17
DM7/DQS_B16
DM6/DQS_B15
DM5/DQS_B14
DM4/DQS_B13
DM3/DQS_B12
DM2/DQS_B11
DM1/DQS_B10

DM0/DQS_B9

DQS_B8
DQS_B7
DQS_B6
DQS_B5
DQS_B4
DQS_B3
DQS_B2
DQS_B1
DQS_B0

CMDCLK_B0

CMDCLK_B0#

CMDCLK_B1

CMDCLK_B1#

CMDCLK_B2

CMDCLK_B2#

CMDCLK_B3

CMDCLK_B3#

CMDCLK_B4

CMDCLK_B4#

CMDCLK_B5

CMDCLK_B5#

CMDCLK_B6/CS_B5#

CMDCLK_B6#/CS_B4#

CMDCLK_B7

CMDCLK_B7#

CKE_B3
CKE_B2
CKE_B1
CKE_B0

MA_B13
MA_B12
MA_B11
MA_B10

MA_B9
MA_B8
MA_B7
MA_B6
MA_B5
MA_B4
MA_B3
MA_B2
MA_B1
MA_B0

BA_B1
BA_B0

RAS_B#
CAS_B#

WE_B#

CS_B3#
CS_B2#
CS_B1#
CS_B0#

RCVENOUT_B#

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

1

U16D

CHB_DQS17

AN29

CHB_DQS16

AN5

CHB_DQS15

AK12

CHB_DQS14

AL19

CHB_DQS13

AL25

CHB_DQS12

AD33

CHB_DQS11

V33

CHB_DQS10

M32

CHB_DQS9

F33

CHB_DQS8

AK29

CHB_DQS7

AL5

CHB_DQS6

AM12

CHB_DQS5

AK18

CHB_DQS4

AM24

CHB_DQS3

AC30

CHB_DQS2

V32

CHB_DQS1

M30

CHB_DQS0

G31

CHB_CMDCLK0

AN27

CHB_CMDCLK0_L

AM27

CHB_CMDCLK1

AJ27

CHB_CMDCLK1_L

AJ28

TP53

AF31

TP55

AF30

TP57

AC25

TP59

AD25

CHB_CMDCLK4

H27

CHB_CMDCLK4_L

G28

CHB_CMDCLK5

C32

CHB_CMDCLK5_L

C33

CHB_CMDCLK6

AH7

CHB_CMDCLK6_L

AH8

CHB_CMDCLK7

AK5

CHB_CMDCLK7_L

AK6

CHB_CKE3

J30

CHB_CKE2CHA_CKE2

N25

CHB_CKE1

J32

CHB_CKE0

L28

CHB_MA13

AN8

CHB_MA12

R29

CHB_MA11

R33

CHB_MA10

AL22

CHB_MA9

T31

CHB_MA8

Y28

CHB_MA7

T28

CHB_MA6

AA33

CHB_MA5

Y31

CHB_MA4

AA29

CHB_MA3

AD27

CHB_MA2

AE28

CHB_MA1

AG29

CHB_MA0

AN23

CHB_BA1

AG20

CHB_BA0

AF16

AM16

CHB_RAS_L <14,15>

AE13

CHB_CAS_L <14,15>

AN15

CHB_WE_L <14,15>

CHB_CS_L3

AK9
AE10
AK11
AH13

AH32

CHB_CS_L2
CHB_CS_L1
CHB_CS_L0

CHB_CS_L3 <14,15>
CHB_CS_L2 <14,15>
CHB_CS_L1 <14,15>
CHB_CS_L0 <14,15>

CHB_RCVENOUT_L <16>

Micro Star Restricted Secret

MCH_DDR CHA&CHB

Last Revision Date:

Tuesday, March 18, 2003

Sheet

1

CHB_CMDCLK0 <14>
CHB_CMDCLK0_L <14>
CHB_CMDCLK1 <14>
CHB_CMDCLK1_L <14>

CHB_CMDCLK4 <14>
CHB_CMDCLK4_L <14>
CHB_CMDCLK5 <14>
CHB_CMDCLK5_L <14>
CHB_CMDCLK6 <14>
CHB_CMDCLK6_L <14>
CHB_CMDCLK7 <14>
CHB_CMDCLK7_L <14>

CHB_CKE3 <14,15>CHA_CKE3 <13,15>
CHB_CKE2 <14,15>
CHB_CKE1 <14,15>

CHB_MA[0..13] <14,15>

CHB_BA[0..1] <14,15>

11 52

of

Rev

00E

5

4

3

2

1

VCC_CORE

+1_3V

+2_5V

C1014

0.1u

C999

0.1u

AC11
AD10

AA11
AB10

U16E

P14

VCC

P18

VCC

R15

VCC

R17

VCC

R19

VCC

T14

VCC

T16

VCC

T18

VCC

U17

VCC

U19

VCC

V14

VCC

V16

VCC

V18

VCC

W15

VCC

W17

VCC

W19

VCC

P20

VCC

T20

VCC

V20

VCC

Y14

VCC

Y16

VCC

Y18

VCC

Y20

VCC

P16

VCCAFSB

U15

VCCAHL

L2

VCCAGP

L8

VCCAGP

M4

VCCAGP

M10

VCCAGP

N6

VCCAGP

N11

VCCAGP

P10

VCCAGP

R11

VCCAGP

T10

VCCAGP

U2

VCCAGP

U8

VCCAGP

U11

VCCAGP

V4

VCCAGP

V10

VCCAGP

W6

VCCAGP

Y10

VCCHL
VCCHL

AB6

VCCHL
VCCHL

AC2

VCCHL
VCCHL

AD4

VCCHL
VCCHL

AE6

VCCHL

AG4

VCCHL

AJ2

VCCHL

C460

0.1u

C393

0.1u

MCH

C1012

0.1u

VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR
VCCDDR

C979

0.1u

+1_3V

K19

K21

K23

K27

K33L5L10

L12

L14

L16

L18

L20

L22

Y17

L26

L29

L30

L32M1M7

M11

M23

M31N3N9

N10

N27

N30

N33P2P5P8P11

P15

P17

P19

P23

P29R1R4R7R10

R16

R18

R20

R24

R28

R31T3T6T9T11

T15

T17

T19

T23

T27

T33U5U10

U14

U18

U20

U24

U26

U29

U32V1V7

V11

V15

V17

V19

V23

V31

W3

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

A30

VCCFSB

B2

VCCFSB

B8

VCCFSB

B14

VCCFSB

B20

VCCFSB

B26

VCCFSB

D3

AJ14
AJ17
AJ20
AJ23
AJ26
AJ29
AJ32

AK10
AK16
AK22
AK28
AN17

AL12
AL15
AL18
AL21
AL24
AL27
AL30
AL31
AL33

AM14
AM20
AM26
AM32

AN10
AN13
AN16
AN19
AN22
AN25
AN28
AN31

VCCFSB

D9

VCCFSB

D15

VCCFSB

D21

VCCFSB

D27

VCCFSB

F4

VCCFSB

F10

VCCFSB

F16

VCCFSB

F22

VCCFSB

H5

VCCFSB

H11

VCCFSB

H17

VCCFSB

H23

VCCFSB

K10

VCCFSB

K12

VCCFSB

K14

VCCFSB

K16

VCCFSB

K18

VCCFSB

K20

VCCFSB

K22

VCCFSB

L11

VCCFSB

L13

VCCFSB

L15

VCCFSB

L17

VCCFSB

L19

VCCFSB

L21

VCCFSB

A15

VSS

A18

VSS

A21

VSS

A24

VSS

A27

VSS

B5

VSS

B11

VSS

B17

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AK1

VSS

AK4

VSS
VSS
VSS
VSS
VSS
VSS

AL3

VSS

AL6

VSS

AL9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AM2

VSS

AM8

VSS
VSS
VSS
VSS
VSS

AN4

VSS

AN7

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

A12

VSS

A9

VSS

A6

VSS

A3

VSS

U16

VSS

R14

VSS

G2

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

F25

F31G3G6G9G12

G15

G18

G21

G24

G27

G30

G33H2H8

H14

H20

H29J1J4J7J10

J13

J14

J15

J19

J22

J25

J28

J31K3K6K9K11

K13

K15

K17

AN6

AM21

AJ16

AH26

AH16

AF28

AA27

Y25

Y19

Y23

Y29

AA1

AA4

AA7

AA10

AA24

VSS

AA28

AA31

AB3

AB9

AB11

AB23

AB27

AB33

D D

C C

B B

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AC5

AC8

AC10

AC14

AC16

AC18

AC20

AC22

AC26

U16B

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

W9

VSS

W10

VSS

W14

VSS

W16

VSS

W18

VSS

W20

VSS

W24

VSS

F29

VSS

E30

VSS

M27

VSS

N24

VSS

T26

VSS

U25

VSS

W27

VSS

W30

VSS

W33

VSS

Y2

VSS

Y5

VSS

Y8

VSS

Y15

VSS

B23

VSS

B29

VSS

C1

VSS

C4

VSS

C7

VSS

C10

VSS

C13

VSS

C16

VSS

C19

VSS

C22

VSS

C25

VSS

C28

VSS

C31

VSS

D6

VSS

D12

VSS

D18

VSS

D24

VSS

D33

VSS

E2

VSS

E5

VSS

E8

VSS

E11

VSS

E14

VSS

E17

VSS

E20

VSS

E23

VSS

E26

VSS

E29

VSS

E32

VSS

F1

VSS

F7

VSS

F13

VSS

F19

VSS

AD17

VSS

AD19

VSS

AD21

VSS

AD23

VSS

AD31

VSS

AE3

VSS

AE9

VSS

AE25

VSS

AE27

VSS

AE30

VSS

AE33

VSS

AF2

VSS

AF5

VSS

AF8

VSS

AF14

VSS

AF20

VSS

AF29

VSS

AG1

VSS

AG7

VSS

AG10

VSS

AG13

VSS

AG16

VSS

AG19

VSS

AG22

VSS

AG25

VSS

AG28

VSS

AG31

VSS

AH3

VSS

AH6

VSS

AH12

VSS

AH18

VSS

AH24

VSS

AH33

VSS

AJ5

VSS

AJ8

VSS

AJ11

VSS

AC12

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

MCH

AC29

AC32

AD1

AD7

AD11

AD13

AD15

VCCAFSB
VCCAHL

+1_5V

+1_3V

C1002

0.1u

B32
D30
F28
H26
H32
K24
K30
L23
M24
M28
N23
P24
P26
P32
R23
T24
T30
U23
V24
V28
W23
Y24
Y26
Y32
AA23
AB24
AB30
AC13
AC15
AC17
AC19
AC21
AC23
AD12
AD14
AD16
AD18
AD20
AD22
AD24
AD28
AF11
AF17
AF23
AF32
AH9
AH15
AH21
AH27
AH30
AK7
AK13
AK19
AK25
AK31
AL32
AM5
AM11
AM17
AM23
AM29
AM31

C997

0.1u

+2_5V

+2_5V

BACKSIDE CAPS

C343

C322

C285

0.1u

A A

0.1u

C1005

0.1u

0.1u

C980

0.1u

C357

0.1u

C289

0.1u

C288

0.1u

C996

0.1u

+1_3V

C449

C466

0.1u

C684

0.1u

0.1u

5

4

+1_3V

+1_3V

R292 1

R291 1

L21 100nH-TAN

L20 100nH-TAN

3

C501

22u-1206

C459

22u-1206

C483
X_150u_SP

C455
X_150u_SP

VCCAHL

C456

0.1u

VCCAFSB

C442

0.1u

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

2

http://www.msi.com.tw

MCH_POWER&GND

Last Revision Date:

Sheet

1

Tuesday, March 18, 2003

12 52

of

Rev

00E

5

4

3

2

1

+2_5V +2_5V

D D

C C

CHA_DQS[0..17]<11,15> CHA_DQS[0..17] <11,15>

B B

CHA_VREF<11,16>

A A

+2_5V

CHA_MA[0..13]<11,15> CHA_MA[0..13] <11,15>

CHA_CS_L0<11,15>
CHA_CS_L1<11,15>

CHA_CS_L0 CHA_CS_L2
CHA_CS_L1 CHA_CS_L3

CHA_WE_L<11,15>
CHA_CAS_L<11,15>
CHA_RAS_L<11,15>

CHA_CKE0<11,15>
CHA_CKE1<11,15>

CHA_CMDCLK4<11>
CHA_CMDCLK4_L<11>
CHA_CMDCLK0<11>
CHA_CMDCLK0_L<11>
CHA_CMDCLK6<11>
CHA_CMDCLK6_L<11>

SMBDATA<7,8,14,24,25,26,27,41,43>

SMBCLK<7,8,14,24,25,26,27,41,43>

C85

0.1u

+3_3V +3_3V

DIMMRST_L<14,43>

CHA_MA0

48

VDDQ

43
41

130

37
32

125

29

122

27

141
118
115
103

59
52

113
157

158

71

163

97

107
119
129
149
159
169
177
140

63
65

154

21

111

16
17

137
138

76
75

5
14
25
36
56
67
78
86
47

91
92

181
182
183

1
82

184

9
10

101
102
173
167

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13

BA0
BA1
BA2

CS0
CS1
NC/CS2
NC/CS3

DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17

WE
CAS
RAS

CKE0
CKE1

CK0/DNU
CK0/DNU
CK1
CK1
CK2/DNU
CK2/DNU

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

SDA
SCL

SA0
SA1
SA2

VREF
VDDID
VDDSPD

NC
NC
NC
NC
NC
NC/FETEN

CHA_MA1
CHA_MA2
CHA_MA3
CHA_MA4
CHA_MA5
CHA_MA6
CHA_MA7
CHA_MA8
CHA_MA9
CHA_MA10
CHA_MA11
CHA_MA12

CHA_BA0
CHA_BA1

CHA_DQS9
CHA_DQS10
CHA_DQS11
CHA_DQS12
CHA_DQS13
CHA_DQS14
CHA_DQS15
CHA_DQS16
CHA_DQS17 CHA_DQS17

CHA_DQS0
CHA_DQS1
CHA_DQS2
CHA_DQS3
CHA_DQS4
CHA_DQS5
CHA_DQS6
CHA_DQS7
CHA_DQS8

CHA_MA13

15223054627796

104

112

128

136

143

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

GND

GND

GND

GND

GND

GND

GND

GND

3111826344250586674818993

156

164

172

180738467085108

VDDQ

VDDQ

VDDQ

VDDQ

GND

GND

GND

GND

VDDQ

GND

120

148

168

DIMM1

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

GND

139

145

GND

GND

152

WP

GND

GND

DIMM-D184-A-S1

160

176

GND

GND

GND

GND

100

116

124

132

2

D0

4

D1

6

D2

8

D3

94

D4

95

D5

98

D6

99

D7

12

D8

13

D9

19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179

44
45
49
51
134
135
142
144

90

CHA_DQ0
CHA_DQ1
CHA_DQ2
CHA_DQ3
CHA_DQ4
CHA_DQ5
CHA_DQ6
CHA_DQ7
CHA_DQ8
CHA_DQ9
CHA_DQ10
CHA_DQ11
CHA_DQ12
CHA_DQ13
CHA_DQ14
CHA_DQ15
CHA_DQ16
CHA_DQ17
CHA_DQ18
CHA_DQ19
CHA_DQ20
CHA_DQ21
CHA_DQ22
CHA_DQ23
CHA_DQ24
CHA_DQ25
CHA_DQ26
CHA_DQ27
CHA_DQ28
CHA_DQ29
CHA_DQ30
CHA_DQ31
CHA_DQ32
CHA_DQ33
CHA_DQ34
CHA_DQ35
CHA_DQ36
CHA_DQ37
CHA_DQ38
CHA_DQ39
CHA_DQ40
CHA_DQ41
CHA_DQ42
CHA_DQ43
CHA_DQ44
CHA_DQ45
CHA_DQ46
CHA_DQ47
CHA_DQ48
CHA_DQ49
CHA_DQ50
CHA_DQ51
CHA_DQ52
CHA_DQ53
CHA_DQ54
CHA_DQ55
CHA_DQ56
CHA_DQ57
CHA_DQ58
CHA_DQ59
CHA_DQ60
CHA_DQ61
CHA_DQ62
CHA_DQ63

CHA_CB0
CHA_CB1
CHA_CB2
CHA_CB3
CHA_CB4
CHA_CB5
CHA_CB6
CHA_CB7 CHA_CB7

CHA_CB[0..7] <11,15>

R271 4.7K

C977

1u-0805

C981

1u-0805

C982

1u-0805

5

C983

1u-0805

1u-0805

C1055

C1048

1u-0805

SMBus
Addr=A0

4

CHA_DQ[0..63] <11,15>

CHA_DQ0
CHA_DQ1
CHA_DQ2
CHA_DQ3
CHA_DQ4
CHA_DQ5
CHA_DQ6
CHA_DQ7
CHA_DQ8
CHA_DQ9
CHA_DQ10
CHA_DQ11
CHA_DQ12
CHA_DQ13
CHA_DQ14
CHA_DQ15
CHA_DQ16
CHA_DQ17
CHA_DQ18
CHA_DQ19
CHA_DQ20
CHA_DQ21
CHA_DQ22
CHA_DQ23
CHA_DQ24
CHA_DQ25
CHA_DQ26
CHA_DQ27
CHA_DQ28
CHA_DQ29
CHA_DQ30
CHA_DQ31
CHA_DQ32
CHA_DQ33
CHA_DQ34
CHA_DQ35
CHA_DQ36
CHA_DQ37
CHA_DQ38
CHA_DQ39
CHA_DQ40
CHA_DQ41
CHA_DQ42
CHA_DQ43
CHA_DQ44
CHA_DQ45
CHA_DQ46
CHA_DQ47
CHA_DQ48
CHA_DQ49
CHA_DQ50
CHA_DQ51
CHA_DQ52
CHA_DQ53
CHA_DQ54
CHA_DQ55
CHA_DQ56
CHA_DQ57
CHA_DQ58
CHA_DQ59
CHA_DQ60
CHA_DQ61
CHA_DQ62
CHA_DQ63

CHA_CB0
CHA_CB1
CHA_CB2
CHA_CB3
CHA_CB4
CHA_CB5
CHA_CB6

2
4
6

8
94
95
98
99
12
13
19
20

105
106
109
110

23
24
28
31

114
117
121
123

33
35
39
40

126
127
131
133

53
55
57
60

146
147
150
151

61
64
68
69

153
155
161
162

72
73
79
80

165
166
170
171

83
84
87
88

174
175
178
179

44
45
49
51

134
135
142
144

90

+3_3V

3

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

WP

VDDQ

VDDQ

VDDQ

DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17

GND

GND

GND

2

15223054627796

VDDQ

VDDQ

VDDQ

VDDQ

NC/CS2
NC/CS3

DQM0/DQS9

CKE0
CKE1

CK0/DNU
CK0/DNU

CK2/DNU
CK2/DNU

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

VREF

VDDID

VDDSPD

NC/FETEN

GND

DIMM-D184-A-S1

3111826344250586674818993

DIMM3

A0
A1
A2
A3
A4
A5
A6
A7
A8

A9
A10
A11
A12
A13

BA0
BA1
BA2

CS0
CS1

WE

CAS
RAS

CK1
CK1

SDA
SCL

SA0
SA1
SA2

NC
NC
NC
NC
NC

CHA_MA0

48

CHA_MA1

43

CHA_MA2

41

CHA_MA3

130

CHA_MA4

37

CHA_MA5

32

CHA_MA6

125

CHA_MA7

29

CHA_MA8

122

CHA_MA9

27

CHA_MA10

141

CHA_MA11

118

CHA_MA12

115
103

CHA_BA0

59

CHA_BA1

52
113

157
158
71
163

CHA_DQS9

97

CHA_DQS10

107

CHA_DQS11

119

CHA_DQS12

129

CHA_DQS13

149

CHA_DQS14

159

CHA_DQS15

169

CHA_DQS16

177
140

63
65
154

21
111

16
17
137
138
76
75

5
14
25
36
56
67
78
86
47

91
92

181
182
183

1
82
184

9
10
101
102
173
167

CHA_WE_L <11,15>
CHA_CAS_L <11,15>
CHA_RAS_L <11,15>

CHA_CKE2 <11,15>
CHA_CKE3 <11,15>

CHA_CMDCLK5 <11>
CHA_CMDCLK5_L <11>
CHA_CMDCLK1 <11>
CHA_CMDCLK1_L <11>
CHA_CMDCLK7 <11>
CHA_CMDCLK7_L <11>

CHA_DQS0
CHA_DQS1
CHA_DQS2
CHA_DQS3
CHA_DQS4
CHA_DQS5
CHA_DQS6
CHA_DQS7
CHA_DQS8

SMBDATA <7,8,14,24,25,26,27,41,43>
SMBCLK <7,8,14,24,25,26,27,41,43>

DIMMRST_LDIMMRST_L

CHA_MA13

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

CHA_BA[0..1] <11,15>CHA_BA[0..1]<11,15>

CHA_CS_L2 <11,15>
CHA_CS_L3 <11,15>

+3_3V

CHA_VREF <11,16>

Micro Star Restricted Secret

DDR CHA DIMMS

Last Revision Date:

Tuesday, March 18, 2003

Sheet

1

C90

0.1u

13 52

of

Rev

00E

104

112

128

136

143

156

164

172

180

738467085

108

120

148

168

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

GND

GND

GND

GND

GND

132

139

145

152

160

176

4.7K

+3_3V

R267

GND

124

GND

116

GND

100

GND

VDDQ

GND

VDDQ

GND

VDDQ

GND

VDDQ

GND

VDDQ

GND

VDDQ

VDDQ

VDDQ

VDDQ

GND

GND

GND

GND

SMBus
Addr=A4

5

4

3

2

1

R272

4.7K

3

CHB_DQ[0..63] <11,15>

CHB_DQ0
CHB_DQ1
CHB_DQ2
CHB_DQ3
CHB_DQ4
CHB_DQ5
CHB_DQ6
CHB_DQ7
CHB_DQ8
CHB_DQ9
CHB_DQ10CHB_DQ10
CHB_DQ11
CHB_DQ12
CHB_DQ13
CHB_DQ14CHB_DQ14
CHB_DQ15
CHB_DQ16
CHB_DQ17
CHB_DQ18
CHB_DQ19
CHB_DQ20
CHB_DQ21
CHB_DQ22
CHB_DQ23
CHB_DQ24
CHB_DQ25
CHB_DQ26
CHB_DQ27
CHB_DQ28
CHB_DQ29
CHB_DQ30
CHB_DQ31
CHB_DQ32
CHB_DQ33
CHB_DQ34
CHB_DQ35
CHB_DQ36
CHB_DQ37
CHB_DQ38
CHB_DQ39
CHB_DQ40
CHB_DQ41
CHB_DQ42
CHB_DQ43
CHB_DQ44
CHB_DQ45
CHB_DQ46
CHB_DQ47
CHB_DQ48
CHB_DQ49
CHB_DQ50
CHB_DQ51
CHB_DQ52
CHB_DQ53
CHB_DQ54
CHB_DQ55
CHB_DQ56
CHB_DQ57
CHB_DQ58
CHB_DQ59
CHB_DQ60
CHB_DQ61
CHB_DQ62
CHB_DQ63

CHB_CB0
CHB_CB1
CHB_CB2
CHB_CB3
CHB_CB4
CHB_CB5
CHB_CB6

2
4
6

8
94
95
98
99
12
13
19
20

105
106
109
110

23
24
28
31

114
117
121
123

33
35
39
40

126
127
131
133

53
55
57
60

146
147
150
151

61
64
68
69

153
155
161
162

72
73
79
80

165
166
170
171

83
84
87
88

174
175
178
179

44
45
49
51

134
135
142
144

90

+3_3V

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

WP

168

VDD

R277

148

176

4.7K

VDD

GND

VDDQ

VDDQ

GND

GND

2

VDDQ

GND

15223054627796

DIMM4

VDDQ

VDDQ

VDDQ

VDDQ

A10
A11
A12
A13

BA0
BA1
BA2

CS0

CS1
NC/CS2
NC/CS3

DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17

WE
CAS
RAS

CKE0
CKE1

CK0/DNU
CK0/DNU

CK1
CK1

CK2/DNU
CK2/DNU

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

SDA
SCL

SA0
SA1
SA2

VREF

VDDID

VDDSPD

NC/FETEN

GND

DIMM-D184-A-S1

3111826344250586674818993

CHB_MA0

48

A0

CHB_MA1

43

A1

CHB_MA2

41

A2

CHB_MA3

130

A3

CHB_MA4

37

A4

CHB_MA5

32

A5

CHB_MA6

125

A6

CHB_MA7

29

A7

CHB_MA8

122

A8

CHB_MA9

27

A9

CHB_MA10

141

CHB_MA11

118

CHB_MA12

115
103

CHB_BA0

59

CHB_BA1

52
113

157
158
71
163

CHB_DQS9

97
107

CHB_DQS11

119

CHB_DQS12

129

CHB_DQS13

149

CHB_DQS14

159

CHB_DQS15

169

CHB_DQS16

177

CHB_DQS17

140
63

65
154

21
111

16
17
137
138
76
75

CHB_DQS0

5

CHB_DQS1

14

CHB_DQS2

25

CHB_DQS3

36

CHB_DQS4

56

CHB_DQS5

67

CHB_DQS6

78

CHB_DQS7

86

CHB_DQS8CHB_DQS8

47
91

SMBDATA <7,8,13,24,25,26,27,41,43>

92

SMBCLK <7,8,13,24,25,26,27,41,43>

181
182
183

1
82
184

9

NC
NC
NC
NC
NC

10
101
102
173
167

DIMMRST_LDIMMRST_L

CHB_MA13

CHB_BA[0..1] <11,15>CHB_BA[0..1]<11,15>

CHB_CS_L2CHB_CS_L0

CHB_WE_L <11,15>
CHB_CAS_L <11,15>
CHB_RAS_L <11,15>

CHB_CKE2 <11,15>
CHB_CKE3 <11,15>

CHB_CMDCLK5 <11>
CHB_CMDCLK5_L <11>
CHB_CMDCLK1 <11>
CHB_CMDCLK1_L <11>
CHB_CMDCLK7 <11>
CHB_CMDCLK7_L <11>

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

CHB_CS_L2 <11,15>
CHB_CS_L3 <11,15>

+3_3V

CHB_VREF <11,16>

Micro Star Restricted Secret

DDR CHB DIMMS

Last Revision Date:

Tuesday, March 18, 2003

Sheet

14 52

1

of

C99

0.1u

Rev

00E

104

112

128

136

143

156

164

172

180

738467085

108

120

VDD

VDD

VDD

VDD

VDD

VDD

VDD

GND

GND

GND

139

145

152

160

GND

132

GND

VDDQ

VDDQ

GND

GND

GND

GND

GND

100

116

124

+3_3V

VDDQ

GND

VDDQ

VDDQ

GND

GND

VDDQ

GND

VDDQ

GND

VDDQ

VDDQ

GND

GND

SMBus
Addr=A6

+2_5V +2_5V

48
43
41

130

37
32

125

29

122

27
141
118
115
103

59

52
113

157
158

71
163

97
107
119
129
149
159
169
177
140

63

65
154

21
111

16

17
137
138

76

75

14

25

36

56

67

78

86

47

91

92
181

182
183

82
184

10
101
102
173
167

C1047

1u-0805

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13

BA0
BA1
BA2

CS0
CS1
NC/CS2
NC/CS3

DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17

WE
CAS
RAS

CKE0
CKE1

CK0/DNU
CK0/DNU
CK1
CK1
CK2/DNU
CK2/DNU

5

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

SDA
SCL

SA0
SA1
SA2

1

VREF
VDDID
VDDSPD

9

NC
NC
NC
NC
NC
NC/FETEN

15223054627796

VDDQ

D D

C C

CHB_DQS[0..17]<11,15> CHB_DQS[0..17] <11,15>

B B

CHB_MA[0..13]<11,15> CHB_MA[0..13] <11,15>

CHB_CS_L0<11,15>
CHB_CS_L1<11,15>

CHB_CS_L1 CHB_CS_L3

CHB_DQS9
CHB_DQS10 CHB_DQS10
CHB_DQS11
CHB_DQS12
CHB_DQS13
CHB_DQS14
CHB_DQS15
CHB_DQS16
CHB_DQS17

CHB_WE_L<11,15>
CHB_CAS_L<11,15>
CHB_RAS_L<11,15>

CHB_CKE0<11,15>
CHB_CKE1<11,15>

CHB_CMDCLK4<11>
CHB_CMDCLK4_L<11>
CHB_CMDCLK0<11>
CHB_CMDCLK0_L<11>
CHB_CMDCLK6<11>
CHB_CMDCLK6_L<11>

CHB_DQS0
CHB_DQS1
CHB_DQS2
CHB_DQS3
CHB_DQS4
CHB_DQS5
CHB_DQS6
CHB_DQS7

SMBDATA<7,8,13,24,25,26,27,41,43>

SMBCLK<7,8,13,24,25,26,27,41,43>

+3_3V

C80

CHB_MA0
CHB_MA1
CHB_MA2
CHB_MA3
CHB_MA4
CHB_MA5
CHB_MA6
CHB_MA7
CHB_MA8
CHB_MA9
CHB_MA10
CHB_MA11
CHB_MA12

CHB_BA0
CHB_BA1

0.1u

CHB_VREF<11,16>

+3_3V +3_3V

DIMMRST_L<13,43>

CHB_MA13

A A

+2_5V

C1049

1u-0805

C963

1u-0805

C958

C959

1u-0805

1u-0805

5

C960

1u-0805

104

112

128

136

143

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

GND

GND

GND

GND

GND

GND

GND

GND

3111826344250586674818993

4

156

VDDQ

VDDQ

GND

GND

164

172

VDDQ

VDDQ

GND

GND

180738467085108

VDD

VDD

VDD

VDD

VDD

VDDQ

GND

GND

GND

GND

GND

GND

GND

100

116

124

132

139

145

SMBus
Addr=A2

152

VDD

GND

120

148

VDD

VDD

GND

GND

160

176

168

DIMM2

VDD

2

D0

4

D1

6

D2

8

D3

94

D4

95

D5

98

D6

99

D7

12

D8

13

D9

19

D10

20

D11

105

D12

106

D13

109

D14

110

D15

23

D16

24

D17

28

D18

31

D19

114

D20

117

D21

121

D22

123

D23

33

D24

35

D25

39

D26

40

D27

126

D28

127

D29

131

D30

133

D31

53

D32

55

D33

57

D34

60

D35

146

D36

147

D37

150

D38

151

D39

61

D40

64

D41

68

D42

69

D43

153

D44

155

D45

161

D46

162

D47

72

D48

73

D49

79

D50

80

D51

165

D52

166

D53

170

D54

171

D55

83

D56

84

D57

87

D58

88

D59

174

D60

175

D61

178

D62

179

D63

44

CB0

45

CB1

49

CB2

51

CB3

134

CB4

135

CB5

142

CB6

144

CB7

90

WP

DIMM-D184-A-S1

CHB_DQ0
CHB_DQ1
CHB_DQ2
CHB_DQ3
CHB_DQ4
CHB_DQ5
CHB_DQ6
CHB_DQ7
CHB_DQ8
CHB_DQ9

CHB_DQ11
CHB_DQ12
CHB_DQ13

CHB_DQ15
CHB_DQ16
CHB_DQ17
CHB_DQ18
CHB_DQ19
CHB_DQ20
CHB_DQ21
CHB_DQ22
CHB_DQ23
CHB_DQ24
CHB_DQ25
CHB_DQ26
CHB_DQ27
CHB_DQ28
CHB_DQ29
CHB_DQ30
CHB_DQ31
CHB_DQ32
CHB_DQ33
CHB_DQ34
CHB_DQ35
CHB_DQ36
CHB_DQ37
CHB_DQ38
CHB_DQ39
CHB_DQ40
CHB_DQ41
CHB_DQ42
CHB_DQ43
CHB_DQ44
CHB_DQ45
CHB_DQ46
CHB_DQ47
CHB_DQ48
CHB_DQ49
CHB_DQ50
CHB_DQ51
CHB_DQ52
CHB_DQ53
CHB_DQ54
CHB_DQ55
CHB_DQ56
CHB_DQ57
CHB_DQ58
CHB_DQ59
CHB_DQ60
CHB_DQ61
CHB_DQ62
CHB_DQ63

CHB_CB0
CHB_CB1
CHB_CB2
CHB_CB3
CHB_CB4
CHB_CB5
CHB_CB6
CHB_CB7 CHB_CB7

CHB_CB[0..7] <11,15>

5

4

3

2

1

+1_25V +1_25V+1_25V +1_25V+1_25V +1_25V

RN3

CHA_DQ1<11,13>
CHA_DQ5<11,13>
CHA_DQ4<11,13>
CHA_DQ0<11,13>

D D

C C

B B

A A

CHA_DQS9<11,13>
CHA_DQS0<11,13>

CHA_DQ6<11,13>
CHA_DQ2<11,13>

CHA_DQ8<11,13>

CHA_DQ12<11,13>

CHA_DQ7<11,13>
CHA_DQ3<11,13>

CHA_DQS10<11,13>

CHA_DQ13<11,13>
CHA_DQS1<11,13>

CHA_DQ9<11,13>

CHA_DQ14<11,13>
CHA_DQ15<11,13>
CHA_DQ10<11,13>
CHA_DQ11<11,13>

CHA_DQ20<11,13>
CHA_DQ16<11,13>
CHA_DQ17<11,13>
CHA_DQ21<11,13>

CHA_DQS2<11,13> CHB_DQS2<11,14>

CHA_DQS11<11,13>

CHA_DQ18<11,13>
CHA_DQ22<11,13>

CHA_DQ28<11,13>
CHA_DQ24<11,13>
CHA_DQ23<11,13>
CHA_DQ19<11,13>

CHA_DQ29<11,13>

CHA_DQ25<11,13>

CHA_DQS3<11,13>

CHA_DQS12<11,13>

CHA_DQ30<11,13>
CHA_DQ27<11,13>
CHA_DQ26<11,13>
CHA_DQ31<11,13>

CHA_CB1<11,13>
CHA_CB0<11,13>
CHA_CB5<11,13>
CHA_CB4<11,13>

CHA_DQS8<11,13>

CHA_DQS17<11,13>

CHA_CB2<11,13>
CHA_CB6<11,13>

CHA_DQ32<11,13>
CHA_DQ36<11,13>

CHA_CB7<11,13>
CHA_CB3<11,13>

1 2
3 4
5 6
7 8

39

RN2

1 2
3 4
5 6
7 8

39

RN6

1 2
3 4
5 6
7 8

39

RN9

1 2
3 4
5 6
7 8

39

RN8

1 2
3 4
5 6
7 8

39

RN12

1 2
3 4
5 6
7 8

39

RN15

1 2
3 4
5 6
7 8

39

RN19

1 2
3 4
5 6
7 8

39

RN24

1 2
3 4
5 6
7 8

39

RN32

1 2
3 4
5 6
7 8

39

RN33

1 2
3 4
5 6
7 8

39

RN37

1 2
3 4
5 6
7 8

39

RN42

1 2
3 4
5 6
7 8

39

5

C100

C86

C106

C204

C104

C102

C252

C263

C198

C200

C1015

C1008

C1000

C421

C170

C174

C107

C237

C985

C145

C1038

C216

C1043

C258

C279

C988

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

CHA_DQ33<11,13>
CHA_DQ37<11,13>
CHA_DQS4<11,13>

CHA_DQS13<11,13>

CHA_DQ39<11,13>
CHA_DQ35<11,13>
CHA_DQ38<11,13>
CHA_DQ34<11,13>

CHA_DQ44<11,13>
CHA_DQ40<11,13>
CHA_DQ45<11,13>
CHA_DQ41<11,13>

CHA_DQS14<11,13>

CHA_DQS5<11,13>
CHA_DQ42<11,13>
CHA_DQ46<11,13>

CHA_DQ43<11,13>
CHA_DQ47<11,13>
CHA_DQ48<11,13>
CHA_DQ52<11,13>

CHA_DQS6<11,13>

CHA_DQS15<11,13>

CHA_DQ53<11,13>
CHA_DQ49<11,13>

CHA_DQ54<11,13>
CHA_DQ55<11,13>
CHA_DQ50<11,13>
CHA_DQ51<11,13>

CHA_DQ57<11,13>
CHA_DQ56<11,13>
CHA_DQ61<11,13>
CHA_DQ60<11,13>

CHA_DQS16<11,13>

CHA_DQS7<11,13>
CHA_DQ62<11,13>
CHA_DQ58<11,13>

CHA_DQ63<11,13>

CHA_DQ59<11,13>

RN45

1 2
3 4
5 6
7 8

39

RN46

1 2
3 4
5 6
7 8

39

RN48

1 2
3 4
5 6
7 8

39

RN52

1 2
3 4
5 6
7 8

39

RN55

1 2
3 4
5 6
7 8

39

RN57

1 2
3 4
5 6
7 8

39

RN59

1 2
3 4
5 6
7 8

39

RN61

1 2
3 4
5 6
7 8

39

RN63

1 2
3 4
5 6
7 8

39

C1028

C295

C352

C283

C281

C137

C149

C1042

C208

C214

C70

C1016

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

CHB_DQ0<11,14>
CHB_DQ4<11,14>
CHB_DQ5<11,14>
CHB_DQ1<11,14>

CHB_DQS9<11,14>
CHB_DQS0<11,14>

CHB_DQ6<11,14>
CHB_DQ2<11,14>

CHB_DQ3<11,14>
CHB_DQ7<11,14>

CHB_DQ12<11,14>

CHB_DQ8<11,14>

CHB_DQ9<11,14>
CHB_DQ13<11,14>
CHB_DQS1<11,14>

CHB_DQS10<11,14>

CHB_DQ14<11,14>
CHB_DQ15<11,14>
CHB_DQ10<11,14>
CHB_DQ11<11,14>

CHB_DQ20<11,14>
CHB_DQ16<11,14>
CHB_DQ17<11,14>
CHB_DQ21<11,14>

C248

0.1u

C1024

0.1u

C987

0.1u

C212

0.1u

C458

0.1u

C406

0.1u

R26239

C390

R26139

0.1u

4

CHB_DQS11<11,14>

CHB_DQ18<11,14>
CHB_DQ22<11,14>

CHB_DQ23<11,14>
CHB_DQ19<11,14>
CHB_DQ24<11,14>
CHB_DQ28<11,14>

CHB_DQ29<11,14>
CHB_DQ25<11,14>
CHB_DQS3<11,14>

CHB_DQS12<11,14>

CHB_DQ30<11,14>
CHB_DQ26<11,14>
CHB_DQ27<11,14>
CHB_DQ31<11,14>

CHB_CB4<11,14>

CHB_CB5<11,14>

CHB_CB0<11,14>

CHB_CB1<11,14>

CHB_DQS8<11,14>

CHB_DQS17<11,14>

CHB_CB2<11,14>

CHB_CB6<11,14>

CHB_CB3<11,14>

CHB_CB7<11,14>
CHB_DQ32<11,14>
CHB_DQ36<11,14>

RN1

1 2
3 4
5 6
7 8

39

RN4

1 2
3 4
5 6
7 8

39

RN5

1 2
3 4
5 6
7 8

39

RN7

1 2
3 4
5 6
7 8

39

RN10

1 2
3 4
5 6
7 8

39

RN14

1 2
3 4
5 6
7 8

39

RN18

1 2
3 4
5 6
7 8

39

RN23

1 2
3 4
5 6
7 8

39

RN28

1 2
3 4
5 6
7 8

39

RN36

1 2
3 4
5 6
7 8

39

RN39

1 2
3 4
5 6
7 8

39

RN40

1 2
3 4
5 6
7 8

39

RN43

1 2
3 4
5 6
7 8

39

C191

C375

C348

C220

C374

C416

C268

C340

C280

C217

C259

C319

C330

C341

C342

C257

C423

C1037

C402

C117

C369

C209

C194

C312

C332

C334

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

RN44

CHB_DQ37<11,14>
CHB_DQ33<11,14>

CHB_DQS13<11,14>

CHB_DQS4<11,14>

CHB_DQ34<11,14>
CHB_DQ38<11,14>
CHB_DQ39<11,14>
CHB_DQ35<11,14>

CHB_DQ44<11,14>
CHB_DQ40<11,14>
CHB_DQ45<11,14>
CHB_DQ41<11,14>

CHB_DQS5<11,14>

CHB_DQS14<11,14>

CHB_DQ42<11,14>
CHB_DQ46<11,14>

CHB_DQ43<11,14>
CHB_DQ47<11,14>
CHB_DQ48<11,14>
CHB_DQ52<11,14>

CHB_DQ49<11,14>
CHB_DQ53<11,14>

CHB_DQS15<11,14>

CHB_DQ54<11,14>

CHB_DQS6<11,14>
CHB_DQ55<11,14>
CHB_DQ50<11,14>
CHB_DQ51<11,14>

CHB_DQ60<11,14>
CHB_DQ61<11,14>
CHB_DQ56<11,14>
CHB_DQ57<11,14>

CHB_DQS7<11,14>

CHB_DQS16<11,14>

CHB_DQ62<11,14>
CHB_DQ58<11,14>

1 2
3 4
5 6
7 8

39

RN47

1 2
3 4
5 6
7 8

39

RN49

1 2
3 4
5 6
7 8

39

RN56

1 2
3 4
5 6
7 8

39

RN58

1 2
3 4
5 6
7 8

39

RN60

1 2
3 4
5 6
7 8

39

RN62

1 2
3 4
5 6
7 8

39

RN64

1 2
3 4
5 6
7 8

39

RN65

1 2
3 4
5 6
7 8

39

CHB_DQ63<11,14>

CHB_DQ59<11,14>

3

C333

C256

C190

C206

C166

C189

C356

C411

C205

C112

C93

C278

C419

C1007

C345

C444

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

RN11

CHB_CKE3<11,14>
CHA_CKE3<11,13>
CHB_CKE2<11,14>
CHA_CKE2<11,13>

CHA_CS_L1<11,13>
CHB_CS_L1<11,14>
CHA_CS_L0<11,13>
CHB_CS_L0<11,14>

CHA_MA7<11,13>
CHA_MA9<11,13>
CHA_MA11<11,13>
CHA_MA12<11,13>

CHA_MA5<11,13>
CHA_MA6<11,13>
CHB_MA4<11,14>

CHA_MA1<11,13>
CHA_MA2<11,13>
CHA_MA3<11,13>
CHA_MA4<11,13>

CHA_BA1<11,13>
CHA_MA10<11,13>
CHA_MA0<11,13>

CHA_CAS_L<11,13>
CHA_WE_L<11,13>

CHA_RAS_L<11,13>

CHA_BA0<11,13>

1 2
3 4
5 6
7 8

47

RN53

1 2
3 4
5 6
7 8

47

RN16

1 2
3 4
5 6
7 8

47

RN20

1 2
3 4
5 6
7 8

47

RN25

1 2
3 4
5 6
7 8

47

RN38

1 2
3 4
5 6
7 8

47

RN50

1 2
3 4
5 6
7 8

47

CHA_MA13<11,13>

C159

C201

C327

C227

C1029

C302

C188

C1001

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

CHB_CKE0<11,14>
CHA_CKE0<11,13>
CHB_CKE1<11,14>
CHA_CKE1<11,13>

CHB_CS_L2<11,14>
CHA_CS_L2<11,13>
CHA_CS_L3<11,13>
CHB_CS_L3<11,14>

CHB_MA12<11,14>
CHB_MA11<11,14>
CHB_MA9<11,14>
CHB_MA7<11,14>

CHB_MA8<11,14>
CHA_MA8<11,13>
CHB_MA6<11,14>
CHB_MA5<11,14>

C89

0.1u

C195

0.1u

C132

0.1u

C226

0.1u

C134

0.1u

C254

0.1u

C299

R24947

0.1u

CHB_MA3<11,14>
CHB_MA2<11,14>
CHB_MA1<11,14>

CHB_MA0<11,14>
CHB_MA10<11,14>
CHB_BA1<11,14>

CHB_BA0<11,14>

CHB_RAS_L<11,14>

CHB_WE_L<11,14>
CHB_CAS_L<11,14>

CHB_MA13<11,14>

RN13

1 2
3 4
5 6
7 8

47

RN54

1 2
3 4
5 6
7 8

47

RN17

1 2
3 4
5 6
7 8

47

RN21

1 2
3 4
5 6
7 8

47

RN31

1 2
3 4
5 6
7 8

47

RN41

1 2
3 4
5 6
7 8

47

RN51

1 2
3 4
5 6
7 8

47

C991

0.1u

C120

0.1u

C210

0.1u

C131

0.1u

C168

0.1u

C155

0.1u

C221

0.1u

C196

0.1u

C88

0.1u

C260

0.1u

C984

0.1u

C153

0.1u

C310

0.1u

C992

0.1u

C1025

R25047

0.1u

0.1u

C224

0.1u

C282

0.1u

R28939

C338

R26339

0.1u

Micro Star Restricted Secret

Title
Document Number

2

DDR CHA&CHB PARALLEL TERM

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Last Revision Date:

Tuesday, March 18, 2003

Sheet

15 52

1

Rev

00E

of

5

+2_5V

PLACE DDR VREF VOLTAGE DIVIDER

D D

R57

WITHIN 1" OF THE CHA DIMMS

49.9-1%

R58

49.9-1%

CHA_VREF <11,13>

20 mil

C82
1u

4

PLACE ALL RCVENOUT
TERMINATION CIRCUITS

R179

78.7-1%

R168

78.7-1%

NEAR DDR MCH

CHA_RCVENOUT_L <11> CHB_RCVENOUT_L <11>

6 mil 6 mil

3

+2_5V+2_5V

R186

78.7-1%

R169

78.7-1%

2

+2_5V

R166

49.9-1%

R170

49.9-1%

PLACE THIS CIRCUIT
CLOSE TO MCH

C290
1000p

1

DRCOMPVREF_H <11>

20 mil

+2_5V

C C

PLACE DDR VREF VOLTAGE DIVIDER

R63

WITHIN 1" OF THE CHB DIMMS

49.9-1%

R65

49.9-1%

CHB_VREF <11,14>

20 mil

C84
1u

+1_25V

CHANNEL VREFS

B B

A A

5

4

C68

4.7u-1206

RCVENOUT TERMINATION

PLACE 2 DECOUPLING
CAPS PER VTT PLANE.
(ONE AT EACH END)

C463

4.7u-1206

C66

4.7u-1206

3

C65

4.7u-1206

C445

4.7u-1206

C443

4.7u-1206

COMPENSATION VREFS

+2_5V

R180

49.9-1%

R171

49.9-1%

PLACE THIS CIRCUIT
CLOSE TO MCH

DRCOMPVREF_V <11>

20 mil

C291
1000p

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

2

http://www.msi.com.tw

DDR VREFS&DECOUPLING

Last Revision Date:

Tuesday, March 18, 2003

Sheet

1

16 52

Rev

00E

of

5

4

3

2

1

+3_3V +3_3V+5V +12V+1_5V +1_5V

D D

C C

B B

A A

AGP_AD[0..31]<10>

AGP_C_BE_L3
AGP_C_BE_L2
AGP_C_BE_L1
AGP_C_BE_L0

AGP_ST2
AGP_ST1
AGP_ST0

AGP_SBA_L7
AGP_SBA_L6
AGP_SBA_L5
AGP_SBA_L4
AGP_SBA_L3
AGP_SBA_L2
AGP_SBA_L1
AGP_SBA_L0

5

PRN1 PRN2
GND
GND

AGP_AD31
AGP_AD30
AGP_AD29
AGP_AD28
AGP_AD27
AGP_AD26
AGP_AD25
AGP_AD24
AGP_AD23
AGP_AD22
AGP_AD21
AGP_AD20
AGP_AD19
AGP_AD18
AGP_AD17
AGP_AD16
AGP_AD15
AGP_AD14
AGP_AD13
AGP_AD12
AGP_AD11
AGP_AD10
AGP_AD9
AGP_AD8
AGP_AD7
AGP_AD6
AGP_AD5
AGP_AD4
AGP_AD3
AGP_AD2
AGP_AD1
AGP_AD0

AGP_C_BE_L[0..3] <10>

AGP_ST[0..2] <10>

AGP_SBA_L[0..7] <10>

OPEN
GND

50W
110W

AGP_PRNT_2<21>
AGP_PRNT_1<21>

AGP_66MHZ_CLK<8>

AGP_REQ<10> AGP_GNT <10>

AGP_RBF<10>

AGP_SBSTBF<10> AGP_SBSTBS <10>

AGP_ADSTB1F<10>

AGP_IRDY<10>

AGP_DEVSEL<10>

AGP_SERR<10>

AGP_ADSTB0F<10>

AGP_VREF<10,18>

AGP_ST0 AGP_ST1
AGP_ST2

3VDUAL

AGP_AD31 AGP_AD30
AGP_AD29 AGP_AD28

AGP_AD27
AGP_AD25

AGP_AD23
AGP_AD21

AGP_AD19
AGP_AD17 AGP_AD18

AGP_C_BE_L2

AGP_PERR

AGP_C_BE_L1
AGP_AD14

AGP_AD12
AGP_AD10 AGP_AD9

AGP_AD8

AGP_AD7 AGP_AD6
AGP_AD5

AGP_AD3
AGP_AD1 AGP_AD0

C571

0.1u

4

D10

B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41

B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66

F10
F11
F12
F13
F14

AGP1

D1
D2
D3
D4
D5
D6
D7
D8
D9

B1
B2
B3
B4
B5
B6
B7
B8
B9

F1
F2
F3
F4
F5
F6
F7
F8
F9

VCC3_3_J
VCC3_3_K
VCC3_3_L
VCC3_3_M
VCC3_3_N
VCC3_3_O
VCC3_3_P
VCC3_3_Q
PRSNT#2
PRSNT#1

AGP_OVRCNT#
5V_A
5V_B
AGP_USB+
GND_Q
INTB#
AGPCLK_CONN
REQ#
VCC3_3_R
ST0
ST2
RBF#
GND_R
RESV_L
SBA0
VCC3_3_S
SBA2
SB_STB
GND_S
SBA4
SBA6
RESV_M
GND_T
3_3AUX_1
VCC3_3_T
GAD31
GAD29
VCC3_3_U
GAD27
GAD25
GND_U
AD_STB1
GAD23
VDDQ_F
GAD21
GAD19
GND_V
GAD17
C/BE#2
VDDQ_G
IRDY#

DEVSEL#
VDDQ_H
PERR#
GND_X
SERR#
C/BE#1
VDDQ_I
GAD14
GAD12
GND_Y
GAD10
GAD8
VDDQ_J
AD_STB0
GAD7
GND_Z
GAD5
GAD3
VDDQ_K
GAD1
VREFCG

RESV_O
RESV_P
GND_AA
GND_BB
GND_CC
GND_DD
GND_EE
GND_FF
GND_GG
GND_HH
GND_II
GND_JJ
GND_KK
GND_LL

J_AGP_1.5V

C1

VCC3_3_A

C2

GND_A

C3

VCC3_3_B

C4

GND_B

C5

GND_C

C6

GND_D

C7

GND_E

C8

GND_F

C9

RESV_A

C10

RESV_B

KEY

TYPEDET#

RESV_C

AGP_USB-

GND_G

INTA#

RST#

GNT#

VCC3_3_E

ST1

RESV_D

PIPE#

GND_H

WBF#

SBA1

VCC3_3_F

SBA3

SB_STB#

GND_I

SBA5
SBA7

RESV_E

GND_J

RESV_F

VCC3_3_G

GAD30
GAD28

VCC3_3_H

GAD26
GAD24
GND_K

AD_STB1#

C/BE#3

VDDQ_A

GAD22
GAD20
GND_L
GAD18

GAD16
VDDQ_B
FRAME#

TRDY#

STOP#

PME#

GND_N

PAR

GAD15
VDDQ_C

GAD13

GAD11

GND_O

GAD9

C/BE#0
VDDQ_D

AD_STB0#

GAD6

GND_P

GAD4
GAD2

VDDQ_E

GAD0

VREFGC

RESV_I

RESV_J

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41

A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66

E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14

KEY

VCC_12V_A

VCC_12V_B
VCC_12V_C
VCC_12V_D
VCC_12V_E
VCC_12V_F

VCC_12V_G

VCC_12V_H

VCC_12V_I

VCC_12V_J

VCC_12V_K

VCC_12V_L

VCC_12V_M

F02 CHANGE TO M06

AGP_INTBJ

AGP_INTAJ

Added 2/26

Near AGP

+3_3V

C616
22u-1206

AGP_INTAJAGP_INTBJ

AGP_SBA_L1AGP_SBA_L0
AGP_SBA_L3AGP_SBA_L2

AGP_SBA_L5AGP_SBA_L4
AGP_SBA_L7AGP_SBA_L6

AGP_AD26
AGP_AD24

AGP_C_BE_L3
AGP_AD22

AGP_AD20

AGP_AD16

AGP_AD15
AGP_AD13

AGP_AD11

AGP_C_BE_L0

AGP_AD4
AGP_AD2

+3_3V

R426 8.2K

+3_3V

R427 8.2K

AGP_RST_L <43>

AGP_DBI_HI <10>
AGP_WBF <10>AGP_DBI_LO<10>

AGP_ADSTB1S <10>

AGP_FRAME <10>

AGP_TRDY <10>
AGP_STOP <10>

AGP_PAR <10>

AGP_ADSTB0S <10>

Added 2/26
Near AGP

+12V

J32

1
2
3
4

x_D2x2

added 2/18

3

PIRQA_L <19>

PIRQB_L <19>

AGP_GC_8XDET_L <18>

R383
10K

2N7002S

C611
22u-10V

C614
22u-1206

C601

0.1u

2

Q45

G

C700

0.1u

DS

C548
22u-10V

C603

0.1u

R361

2.2k

+1_5V

+3_3V

R345

10K

C567
1U-0805

C613
22u-10V

+1_5V +3_3V

+1_5V+12V

R344
10K

AGP_PERR

Q42

E C

MMBT3904

R341

100

C565
1u-0805

C600

0.1u

+12V

C554
22u-16V

+12V

Title
Document Number

C1406

0.1u

B

C568

C607

C569

0.1u

0.1u

0.1u

C594

C602

C558

0.1u

0.1u

0.1u

C535

0.1u

C559

0.1u

Close to AGP pin E3 to E14

C553
22u-16V

C552
22u-16V

Micro Star Restricted Secret

AGP 8X CONNECTOR

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

C604

C609

0.1u

0.1u

3VDUAL+5V

C599

0.1u

C678

0.1u

C584

C572

0.1u

0.1u

Added 2/26

Last Revision Date:

Tuesday, March 18, 2003

Sheet

1

C426

0.1u

C598

0.1u

C560

0.1u

17 52

of

C610

0.1u

C606

0.1u

Rev

00E

5

R339

X_82
C515
X_470p

D D

R334
X_82

C C

+1_5V

R342
324-1%

C506

X_470p

VREF CIRCUIT FOR AGP 4X AND 8X

+12V

R347
143-1%

Q43

DS

NDS351AN-S-SOT23

G

R335
100-1%

R340

0

R384
1K-1%

0.75V FOR 4X

0.35V FOR 8X

4

AGP_GC_8XDET_L <17>

AGP_VREF <10,17>

3

2

VREF CIRCUITS FOR HUB INTERFACE A

+1_3V

R273

61.9-1%

0.8V 0.8V

HIA_VSWNG_MCH<10>

12 mil

R274
100-1%

49.9 for +1.2V
75 for +1.4V

88.7 for +1.5V

C450

0.1u

P1_5V_ICH4<19,44>

ICH4_HI_VSWING<19>

12 mil

PLACE WITHIN 4" OF MCH PLACE WITHIN 4" OF ICH4

HIA_VREF_MCH<10>

0.35V

12 mil

+1_3V

R296

110

R300

41.2-1%

100 for +1.2V
124 for +1.4V
137 for +1.5V

C461

0.1u

ICH4_HI_REF<19>

P1_5V_ICH4<19,44>

0.347V

12 mil

R349

43.2-1%

R350

49.9-1%

R305

78.7-1%

R379

24.3-1%

1

C546

0.1u

C464

0.1u

VCC_CORE

R134

49.9-1%

VREF1_GTL1_P0

R131

84.5-1%

B B

A A

VCC_CORE VCC_CORE

R211

49.9-1%

VREF3_GTL1_P1 VREF3_GTL2_P1

R210

84.5-1%

R255

49.9-1%

VREF5_GTL_1_MCH

R256

84.5-1%

GTL_VREF_P0 GTL_VREF_P0

GTL_VREF1_P0 <3> GTL_VREF2_P0 <3>

C250

12 mil

1u-0805

GTL_VREF_P1 GTL_VREF_P1

GTL_VREF1_P1 <5> GTL_VREF2_P1 <5>

C308

12 mil

1u-0805

VCC_CORE

GTL_VREF_MCH

C392

12 mil

1u-0805

5

GTL_VREF_MCH <9>

VCC_CORE

R140

49.9-1%

VREF2_GTL2_P0

R138

84.5-1%

R188

49.9-1%

R191

84.5-1%

VREF CIRCUIT FOR GTL+

4

C228
1u-0805

C296
1u-0805

12 mil

12 mil

VREF CIRCUITS FOR HUB INTERFACE B

+1_3V

R275

49.9 for +1.2V
75 for +1.4V

61.9-1%

0.8V

HIB_VSWNG_MCH<10>

12 mil

R286
100-1%

C438

0.1u

PLACE WITHIN 4" OF MCH

+1_3V

100 for +1.2V

R297

124 for +1.4V

110

0.35V

HIB_VREF_MCH<10>

12 mil

R282

41.2-1%

C462

0.1u

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

3

2

http://www.msi.com.tw

AGP>L+&HUBLINK VREFS

Last Revision Date:

Tuesday, March 18, 2003

Sheet

1

18 52

Rev

00E

of

5

3VDUAL

CBEJ0
CBEJ1
CBEJ2
CBEJ3

ICH4_HI_VSWING<18>

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C544

0.01u

C22
R22
D10

D11
C12

8.2K
R512

H5

J3
H3
K1
G5

J4
H4

J5
K2
G2

L1
G4

L2
H2

L3

F5

F4
N1
E5
N2
E3
N3
E4

M5

E2
P1
E1
P2
D3
R1
D2
P4

J2
K4

M4

N4

M3

F1

L5

F2

F3
G1

M2

K5

L4

W2

B5
E8

P5
U5
Y3

A8

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBE#0
CBE#1
CBE#2
CBE#3

DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#

GPIO0/REQA#
GPIO16/GNTA#

PCICLK
PCIRST#
SYS_RESET#
VCC_PLL
HI_VSWING
EE_CS

EE_DIN
EE_DOUT
EE_SHCLK

PME_J

D D

C C

B B

ICH4_33MHZ_CLK<8>

A A

P1_5V_ICH4<18,44>

AD[0..31]<24,25,26,27,46,48>

CBEJ[0..3]<24,25,26,27,46,48>

DEVSEL_J<22,24,25,26,27,46,48>

FRAME_J<22,24,25,26,27,46,48>

IRDY_J<22,24,25,26,27,46,48>

TRDY_J<22,24,25,26,27,46,48>

STOP_J<22,24,25,26,27,46,48>

PAR<24,25,26,27,46,48>

PLOCK_J<22,24,25,26,27>

SERR_J<22,24,25,26,27,46,48>
PERR_J<22,24,25,26,27,46,48>

PME_J<24,25,26,27,46,48>

HM_SMI_L<22>

PCIRST_L<43>

SYS_RST_L<38>

5

TP132

SYS_RST_L

TP67
TP69
TP71
TP72

C1072

0.1u

PLACE NEAR PIN C22 >
100MILS FROM PACKAGE

4

K10

K12

K18

K22

P10

T18

U19

VCC1_5

VCC1_5

VCC1_5

VCC1_5

VCC1_5

VCC1_5

VCC1_5

GND1

GND2

GND3

GND4

GND5

GND6

GND7

A1

A16

A18

A20

A22A4AA12

C529

0.01u

PLACE WITHIN

0.25" OF PIN R22

4

V14

VCC1_5

GND8

AA16

GND9

AA22

GND10

AA3

A5

AA9

VCC3

GND11

AC17

VCC3

GND12

AB20

3

+3_3V 3VDUAL

AC8B2H18H6J1

J18K6M10

P12P6U1

V10

V16

V18

E12

E13

E20

F14

G18

R6T6U6

L23

M14

P18

VCC3

VCC3

VCC3

VCC3

VCC3

VCC3

VCC3

VCC3

VCC3

VCC3

VCC3

VCC3

VCC3

AB7

VCC3

VCCSUS1_5

VCCSUS1_5

VCCSUS1_5

VCCSUS1_5

VCCSUS1_5

GND13

GND14

GND15

GND16

GND17

GND18

GND19

GND20

GND21

GND22

GND23

GND24

GND25

GND26

GND27

GND28

GND29

GND30

GND31

GND32

AC1

AC10

AC14

AC18

AC23

AC5

B12

B16

B18

B20

B22B9C15

C17

C19

C21

C23C6D1

VCCHI_1

VCCHI_2

VCCSUS1_5

VCCSUS1_5

GND33

GND34

D12

D15

3

VCCHI_3

VCCSUS1_5

GND35

GND36

GND37

GND38

GND39

GND40

D17

D19

D21

D23D4D8

2

P1_5V_ICH4 <18,44>

SB1_5VSB1_5V

A20M#
FERR#

IGNNE#

INIT#

INTR

NMI

SMI#

STPCLK#

RCIN#

HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8

HL9
HL10
HL11

HL_STB#

HL_STB

HLCOMP

HUBREF

PIRQA#
PIRQB#
PIRQC#
PIRQD#

IRQ14
IRQ15

APICCLK

APICD0
APICD1

SERIRQ

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

GNT0#
GNT1#
GNT2#
GNT3#
GNT4#

LAN_CLK

ICH4

U22A

AB23
U21
AA21
W21
V22
AB22
V21
W23
V23
U22
Y22

L19
L20
M19
M21
P19
R19
T20
R20
P23
L22
N22
K21
N20
P21
R23

M23
D5

C2
B4
A3

AC13
AA19
J19
H19
K20
J22

B1
A2
B3
C7
B6
A6

C1
E6
A7
B7
D6
C5

C11
B11
A10
A9
A11
B10
C10
A12

Y5

ICH4_A20M_L
ICH4_CPUSLP_L

ICH4_IGNNE_L
ICH4_INIT_L
ICH4_INTR
ICH4_NMI
ICH4_SMI_L
ICH4_STPCLK_L

HI_A0
HI_A1
HI_A2
HI_A3
HI_A4
HI_A5
HI_A6
HI_A7
HI_A8
HI_A9
HI_A10
HI_A11

12 mil

R377 100
R372 10K
R378 10K

TP61
TP62
TP63
TP64
TP65
TP66
TP68
TP70

2

F6

F7E9F9

T22

CPUSLP#

VCCHI_4

VCCLAN1_5/VCCSUS1_5

VCCLAN1_5/VCCSUS1_5

VCCLAN3_3/VCCSUS3_3

VCCLAN3_3/VCCSUS3_3

A20GATE

GPIO1/REQB#/REQ5#

GPIO17/GNTB#/GNT5#

LAN_RSTSYNC

LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

E19

LANRST#

GND47

GND48

E21

GND41

GND42

GND43

GND44

GND45

GND46

E14

D22

E10

E16

E17

E18

VCC_CORE

SIO_KBRST_J <22,28>
A20GATE <22,28>

HIA_STBF <10>
HIA_STBS <10>

0.5" TRACE

R348 56.2-1%

PIRQA_L <17>
PIRQB_L <17>
PIRQC_L <22,46>
PIRQD_L <22,48>

IDE_IRQ_14_L <30>
IDE_IRQ_15_L <30>

SERIRQ <22,28>

REQ0_J <22,46>
REQ1_J <22,48>
REQ2_J <22,24>
REQ3_J <22,25>
REQ4_J <22,26>
REQ5_J <22,27>

GNT0_J <46>
GNT1_J <48>
GNT2_J <24>
GNT3_J <25>
GNT4_J <26>
GNT5_J <27>

R488

100

ICH4_NMI

HI_A[0..11] <10>

P1_5V_ICH4<18,44>

ICH4_IGNNE_L
ICH4_A20M_L
ICH4_CPUSLP_L
ICH4_INIT_L

ICH4_STPCLK_L
ICH4_SMI_L

R411

ICH4_INTR

56

CPU_FERR_L <3,4,5>

C1071

0.1u

P1_5V_ICH4 <18,44>

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

PLACE 0.1uF CAPS > 100MILS
FROM PACKAGE

1

R14610
R14620
R14630
R14640

R14650
R14660

R14670

R3850

CPU_IGNNE_L <3,4,5>
CPU_A20M_L <3,4,5>
CPU_CPUSLP_L <3,4,5>
CPU_INIT_L <3,4,5,32>

CPU_STPCLK_L <3,4,5>
CPU_SMI_L <3,4,5>

CPU_LINIT0_INTR <3,4,5>

HI CAPS

C1067

C1063

0.1u

0.1u

ICH4_HI_REF <18>

C545

0.01u

PLACE WITHIN

0.25" OF PIN M23

P1_5V_ICH4 <18,44>

C566

C518

0.1u

0.1u

ICH4-1

Last Revision Date:

Tuesday, March 18, 2003

Sheet

1

CPU_LINIT1_NMI <3,4,5>

C619

C1066

22u-1206

0.1u

C1065

C543

0.1u

0.1u

Rev

00E

19 52

of

5

+3_3V

R524

V_BIAS_C

4.7K

R1580
1M

D D

INTRUDER_J

SLP_S3_J<28,37,43>

3VDUAL

SB5V

SYS_PWR_GD_3_3V<10,43>

R4184.7K

R514

R487

4.7K

ICH4_SMBDATA<41,46,48>

ICH4_SMBCLK<41,46,48>

4.7K

SMBALRT_LAN<46,48>

SMB_ALERT_CPU_L<3,5>

C C

RSMRST_L<43>

R9410

V_BIAS

R479 1K

3VDUAL

C687

X7R

R424 10K

12

RSMRST_L

473p

3VDUAL

R513

R510

8.2K

8.2K

B B

SPEAK_STRAP<38>

LDRQ0_J<28>

LFRAME_J<28,32>

CPU_SM_WP<3,5>
LANDISABLE1_L<46>
LANDISABLE2_L<48>

SLP_S4_J<28,37,43>

A A

5

4

THRM_J<28>

V_BAT <21,28,41>

3VDUAL

AB5

F15

F16

F17

F18

E11

V1

R16380

TP73

CPU_PWR_GD<3,4,5>

VRMPWRGD<23>

SWITCH_J<28>

RI_J<33>

ICH4_RSMRST_L

R41710k

TP74
TP75

INTRUDER_J

RTCRST_J<21>

V_BIAS

V_BIAS<21>
RTC_XTAL_1<21>
RTC_XTAL_2<21>

ICH4_66MHZ_CLK<8>
ICH4_14MHZ_CLK<8>
ICH4_48MHZ_CLK<8>

AC_RST_L<39>
AC_SYNC<39>

AC_BIT_CLK<39>

AC_SDOUT<39>

AC_SDIN0<39>

LAD[0..3]<28,32>

AC_RST_L
AC_SYNC
AC_BIT_CLK
AC_SDOUT
AC_SDIN0

TP133

SPEAK_STRAP

TP134

TP76
TP77

TP135
TP136

LAD0
LAD1
LAD2
LAD3

TP78

TP79

4

THRM#

Y4

SLP_S3#

AA2

SLP_S5#

AB6

PWROK

Y23

CPUPWRGD

V19

VRMPWRGD

AA1

PWRBTN#

Y1

RI#

AA6

RSMRST#

AB3

SUSSTAT#

AA4

SUSCLK

AB4

SMBDATA

AC4

SMBCLK

AA5

GPIO11/SMBALERT#

AC3

SMLINK0

AB1

SMLINK1

W6

INTRUDER#

W7

RTCRST#

Y6

VBIAS

AC7

RTCX1

AC6

RTCX2

T21

CLK66

J23

CLK14

F19

CLK48

C13

AC_RST#

C9

AC_SYNC

B8

AC_BITCLK

D9

AC_SDOUT

D13

AC_SDIN0

A13

AC_SDIN1

H23

SPKR

B13

AC_SDIN2

V5

GPIO12

W3

GPIO13

T3

GPIO21/C3_STAT#

Y20

GPIO22/CPUPERF#

W1

GPIO27

W4

GPIO28

T2

LAD0/FWH0

R4

LAD1/FWH1

T4

LAD2/FWH2

U2

LAD3/FWH3

U3

LDRQ0#

U4

LDRQ1#

T5

LFRAME#/FWH4

Y21

GPIO18/STP_PCI#

W18

GPIO19/SLP_1#

W19

GPIO20/STP_CPU#

J21

GPIO23/SSMUXSEL

Y2

SLP_4#

F10

VCCRTC

VCC3SUS1

VCC3SUS2

VCC3SUS3

VCC3SUS6

VCC3SUS6

GPIO[0:15] can be routed to SMI# or SCI

OD

GND49

GND50

GND51

GND52

GND53

GND54

GND55

E22F8G19

G21G3G6H1J6

K14V7AA23

V8

V9

VCC3SUS4

VCC3SUS5

VCC3SUS6

VCC3SUS6

VCC3SUS6

GND56

GND57

GND58

GND59

GND60

GND61

K11

K13

K19

K23K3L10

3

SB5V

P14

U18

VCPU_IO1

VCPU_IO2

VCPU_IO3

GND62

GND63

GND64

L11

L12

L13

3

VREF5_SUS

E15

VCC5REF_SUS

GND65

GND66

GND67

L14

L21M1M11

VCC_CORE

C547

PLACE THIS CAP NEAR PIN AA23

0.1u

E7

V6

VCC5REF1

VCC5REF2

BATLOW#/TP[0]

GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#

AGPBUSY#/GPIO6

GND68

GND69

GND70

GND71

GND72

GND73

GND74

GND75

GND76

GND77

M12

M13

M20

M22

N10

N11

N12

N13

N14

GND78

U22B

PDCS1#
SDCS1#
PDCS3#
SDCS3#

PDA0
PDA1
PDA2
SDA0
SDA1
SDA2

PDDREQ

SDDREQ
PDDACK#
SDDACK#

PDIOR#

SDIOR#
PDIOW#
SDIOW#

PIORDY
SIORDY

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8

PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDD0

SDD1

SDD2

SDD3

SDD4

SDD5

SDD6

SDD7

SDD8

SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

GPIO7
GPIO8

GPIO24

GPIO25

ICH4

Y13
AB21
AB14
AC22

AA13
AB13
W13
AA20
AC20
AC21

AA11

IDE_PDDREQ <30>

AB18

IDE_SDDREQ <30>

Y12

IDE_PDDACK_L <30>

AB19

IDE_SDDACK_L <30>

AC12

IDE_PDIOR_L <30>

Y18

IDE_SDIOR_L <30>

W12

IDE_PDIOW_L <30>

AA18

IDE_SDIOW_L <30>

AB12

IDE_PIORDY <30>

AC19

IDE_SIORDY <30>

IDE_PDD0

AB11

IDE_PDD1

AC11

IDE_PDD2

Y10

IDE_PDD3

AA10

IDE_PDD4

AA7

IDE_PDD5

AB8

IDE_PDD6

Y8

IDE_PDD7

AA8

IDE_PDD8

AB9

IDE_PDD9

Y9

IDE_PDD10

AC9

IDE_PDD11

W9

IDE_PDD12

AB10

IDE_PDD13

W10

IDE_PDD14

W11

IDE_PDD15

Y11

IDE_SDD0

W17

IDE_SDD1

AB17

IDE_SDD2

W16

IDE_SDD3

AC16

IDE_SDD4

W15

IDE_SDD5

AB15

IDE_SDD6

W14

IDE_SDD7

AA14

IDE_SDD8

Y14

IDE_SDD9

AC15

IDE_SDD10

AA15

IDE_SDD11

Y15

IDE_SDD12

AB16

IDE_SDD13

Y16

IDE_SDD14

AA17

IDE_SDD15

Y17
AB2

C8

PIRQE_L <22,24,25,26,27>

D7

PIRQF_L <22,24,25,26,27>

C3

PIRQG_L <22,24,25,26,27>

C4

PIRQH_L <22,24,25,26,27>

R2
R3
V4

TP137

AC2

TP80

V2

2

IDE_PDCS1_L <30>
IDE_SDCS1_L <30>
IDE_PDCS3_L <30>
IDE_SDCS3_L <30>

IDE_PDA0 <30>
IDE_PDA1 <30>
IDE_PDA2 <30>
IDE_SDA0 <30>
IDE_SDA1 <30>
IDE_SDA2 <30>

IDE_SDD[0..15] <30>

2

IDE_PDD[0..15] <30>

R515 10K

SIO_SMI_J <28>
FALCON_SMI_L <22>

+3_3V

AC

C691
1u

D40
1N5817S

AC_SDOUT

R511 4.7K

+5V

R496

1K

VREF5_SUS

C587

0.1u

+3_3V

12

R545
470

TP_Q24_S

S

S

Q57

G

G

D

SI2303DS-S-SOT23

D

CONFIG1

3VDUAL

SIO_WAKE_L <28>

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

ICH4-2

1

PLACE THIS CAP LESS THAN
100MILS FROM ICH4

CONFIG1 <21>

Last Revision Date:

Tuesday, March 18, 2003

Sheet

20 52

1

of

Rev

00E

5

+3_3V +3_3V

R374

110K-1%

AGP_PRNT_1<17>
AGP_PRNT_2<17>

TP88
TP89

VCC_CORE

R406

56

D D

GNDing for ensure
parallel mode V20

CPU_THERMTRIP_L<3,4,5>

C C

N19
N21
N23

P11
P13
P20
P22

R18
R21

T19
V20

U23

W20

N5

P3

R5
T1

+3_3V

R373
110K-1%

TP81

U22C

GDN79
GDN80
GDN81
GDN82
GDN83
GDN84
GDN85
GDN86
GDN87
GDN88
GDN89
GDN90
GDN91
GDN92

DPRSLPVR
DPSLP#
THRMTRIP#

ICH4

E23

F22

GPIO43

T23

TP82

G23

H21

GPIO41

GPIO42

GDN93

GND94

U20

V15

R3714.7K

TP83

H20

F23

H22

GPIO37

GPIO38

GPIO39

GPIO40

GND95

GND96

GND97

GND98

V17V3W22W5W8

G20

F21

GPIO36

GND99

G22

F20

GPIO34

GPIO35

GND100

GND101

Y19

Y7

4

CONFIG0
CONFIG1

J20

GPIO32

GPIO33

USBRBIAS#

GND102

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P

OC#0
OC#1
OC#2
OC#3
OC#4
OC#5

USBRBIAS

D20
C20
B21
A21
D18
C18
B19
A19
D16
C16
B17
A17
B15
C14
A15
B14
A14
D14

A23
B23

USBP0N <31>
USBP0P <31>
USBP1N <31>
USBP1P <31>
USBP2N <31>
USBP2P <31>
USBP3N <31>
USBP3P <31>
USBP4N <32>
USBP4P <32>
USBP5N <32>
USBP5P <32>
USBOC0_J <31>
USBOC1_J <31>
USBOC2_J <31>
USBOC3_J <31>
USBOC4_J <32>
USBOC5_J <32>

ROUTE USBRBIAS AS
DIFF. PAIRS

R401

22.6-1%

5/5

C638

0.1u

+3_3V

3

C1062

C557

C784

C631

C574

C702

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

C704

0.1u

2

C659
22u-1206

PLACE 0.1uF CAPS NEAR PINS A5, B2, J1, U1, AC8, AC17 > 100MILS F ROM PACKAGE

SB1_5V 3VDUAL

C1074

0.1u

C1068

0.1u

C708

0.1u

> 100MILS FROM PACKAGE> 100MILS FROM PACKAGE

C563
22u-1206

C579

0.1u

C1069

0.1u

C589
22u-1206

R555

+3_3V

C1070

0.1u

R547

1

C1073

0.1u

C1064

0.1u

4.7K

3VDUAL

D35

A C

C618
473p

V_BAT

V_BAT <20,28,41>

1N4148S

BATTERY_P

12

B B

XBT1
YSKTBT

R419 1K

D36

A C

1N5817S

V_BIAS_C

R409

390K

V_BIAS_C

12

C672
473p

R475

10M

C658

15p

R480
X_10M

R481
X_1M

V_BIAS <20>
RTC_XTAL_1 <20>

CONFIG0

CONFIG1<20>

CONFIG1

CONFIGURE JUMPER

4.7K

J12

1
2

TP90

12

R489
100

3

YJ103

1-2 NORMAL

JBAT1

R413

1K

4

1
2
3

YJ103

Default :1-2

12

C586
473p

RTCRST_J<20>

A A

5

R473

5.6M

3

32.768KHZ/DIP

1

Y3

2

3 4

C639

10p

RTC_XTAL_2 <20>

2

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

2-3 CONFIGURE
OFF RECOVER

Micro Star Restricted Secret

ICH4-3

Last Revision Date:

Tuesday, March 18, 2003

Sheet

1

of

21 52

Rev

00E

5

4

3

2

1

+5V

RN70

1 2
3 4
5 6

D D

7 8

PIRQG_L <20,24,25,26,27>
REQ5_J <19,27>
PIRQC_L <19,46>
PIRQD_L <19,48>

2.7K

RN71

1 2
3 4
5 6
7 8

REQ0_J <19,46>
REQ1_J <19,48>
REQ2_J <19,24>
REQ3_J <19,25>

2.7K

C C

RN69

1 2
3 4
5 6
7 8

2.7K

REQ4_J <19,26>
PIRQE_L <20,24,25,26,27>
PIRQH_L <20,24,25,26,27>
PIRQF_L <20,24,25,26,27>

+3_3V

RN73

1 2
3 4
5 6
7 8

STOP_J <19,24,25,26,27,46,48>
PLOCK_J <19,24,25,26,27>
PERR_J <19,24,25,26,27,46,48>
SERR_J <19,24,25,26,27,46,48>

R1484 8.2K

R381 8.2K

HM_SMI_L <19>

SERIRQ <19,28>

2.7K

RN72

1 2

B B

3 4
5 6
7 8

FRAME_J <19,24,25,26,27,46,48>
IRDY_J <19,24,25,26,27,46,48>
TRDY_J <19,24,25,26,27,46,48>
DEVSEL_J <19,24,25,26,27,46,48>

2.7K

R404 10K

R405 10K

R1485 10K

A20GATE <19,28>

SIO_KBRST_J <19,28>

FALCON_SMI_L <20>

Micro Star Restricted Secret

A A

Title

ICH4 PULL UP

Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

http://www.msi.com.tw

2

Last Revision Date:

Tuesday, March 18, 2003

Sheet

22 52

of

1

Rev

00E

8

7

6

5

4

3

2

1

should be 25 A cap.

L3808

VCC12CPU

D D

C C

C83

1.1u/25A

4.7u-1206

+

C180

1800u/16V

VID_P0_[0..4]<3,7>
CPU_VRM_EN<37>

VRM_OUTEN_L<7>

MMBT3904

PUT CLOSE PWM
ENABLE:HIGH

VCORE OFF
ENABLE:LOW

VCORE ON

B B

FEEDBACK FROM
MIDDLE OF VCORE
POWER PLANE

A A

HIP6301 FOR INTEL Dual P PRESTONIA POWER CKT

VIN RMS CURRENT ~ 20A

+

C233

1800u/16V

+

C79

1800u/16V

VID_P0_4
VID_P0_3
VID_P0_2
VID_P0_1
VID_P0_0

CPU_VRM_EN

Q6

B

VCC_CORE

R31
82K

E C

R16

10K-1%

+

C75

1800u/16V

+

1800u/16V

C22

0.1U

C32
X_0

C1409

+

C143

1800u/16V

+

C203

1800u/16V

10

C64

0.1u

U3
HIP6301

1

VID4

2

VID3

3

VID2

4

VID1

5

VID0

8

FS/DIS

6

COMP

7

FB
VSEN

R15

270K

R13

2.32k-1%

R939 0

R3 X_0

C249

4.7u-1206

C255

4.7u-1206

R14

1.3K-1%

C92

4.7u-1206

GND

9

C13

0.47u-16V

4.7u_1206

VCC

PGOOD

PWM1
PWM2
PWM3
PWM4

ISEN1
ISEN2
ISEN3
ISEN4

+5V

VIN

C63

4.7u-1206

C18

20
19
15
14
11
18
16
13
12
17

+5V +12V

+12V

+12V

+12V

R45
10-0805

C46

0.47u-16V

R174
10-0805

C276

0.47u-16V

R118
10-0805

C183

0.47u-16V

R89
10-0805

C135

0.47u-16V

2
7
6
3

2
7
6
3

2
7
6
3

2
7
6
3

U4

BOOT
PVCC
VCC
PWM

HIP6601B

R53

U9

BOOT
PVCC
VCC
PWM

HIP6601B

R175

U6

BOOT
PVCC
VCC
PWM

HIP6601B

R102

U5

BOOT
PVCC
VCC
PWM

HIP6601B

R66

C74

0.1u

3.6K

C262

0.1u

3.6K

C147

0.1u

3.6K

C94

0.1u

3.6K

UGATE

PHASE

LGATEGND

UGATE

PHASE

LGATEGND

UGATE

PHASE

LGATEGND

UGATE

PHASE

LGATEGND

VIN

TO-263

Q19

DS

FDB6035AL

3.3-0805

R20

1
8

R49

54

0-0805

FDB7045L

G

G

Q15

PHASE1

DS

C192

C202

1u-0805

1u-0805
L3809

0.5u/35A

R56

C781000p

4.7

R90

TO-263

VIN

TO-263

Q28

FDB6035AL

DS

3.3-0805

R158

1
8

R162

54

0-0805

FDB7045L

G

G

Q27

PHASE2

DS

TO-263

VIN

TO-263

Q24

FDB6035AL

DS

3.3-0805

R100

1
8

R119

54

0-0805

FDB7045L

G

G

Q22

PHASE3

DS

C1481000p

C141

C123

1u-0805

1u-0805

L3810

R163

0.5u/35A

C2771000p

4.7

C175
1u-0805

R103

0.5u/35A

4.7

C163
1u-0805
L3811

H19

1

1

TO263-H

H24

1

1

TO263-H

TO-263

VIN

TO-263

Q21

DS

FDB6035AL

3.3-0805

R60

1
8

R90

54

0-0805

FDB7045L

G

PHASE4

DS

G

Q20

C981000p

C77
1u-0805

R67

4.7

0.5u/35A

C213
1u-0805
L3812

R160
0

TO-263

+3_3V

2

2

R10

1K

VRMPWRGD <20>

VRM_GD <8>

VCORE 1.1V~1.85V/150A

VCC_CORE

2

2

STEP32.1A/2.2G

2.2G-->47.6A
FMB-->61.5A

H28

1

1

TO263-H

H21

1

TO263-H

2

2

1

2

2

R47
X_10K

8

7

6

5

4

3

Title

HIP6301 FOR DUAL P PRESTONIA power ckt in Placer platform

Size Document Number Rev

2002/06/06 00C

B

23 52Tuesday, March 18, 2003

Date: Sheet

2

of

1

5

4

3

2

1

PCI32 SLOT

IDSEL: AD19

+3_3V

INTA#: PIRQF_L

D D

INTB#: PIRQG_L
INTC#: PIRQH_L
INTD#: PIRQE_L

REQ: REQ2

R501 8.2K

GNT: GNT2

PIRQE_L<20,22,25,26,27>

PCI2_33MHZ_CLK<8>

C C

AD[0..31]<19,25,26,27,46,48>

B B

CBEJ[0..3]<19,25,26,27,46,48>

A A

5

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBEJ0
CBEJ1
CBEJ2
CBEJ3

REQ2_J<19,22>

IRDY_J<19,22,25,26,27,46,48>

DEVSEL_J<19,22,25,26,27,46,48>

PLOCK_J<19,22,25,26,27>

PERR_J<19,22,25,26,27,46,48>
SERR_J<19,22,25,26,27,46,48>

1PRSNT1_1_L
1PRSNT2_1_L

AD31
AD29

AD27
AD25

CBEJ3
AD23

AD21
AD19

AD17
CBEJ2

CBEJ1
AD14

AD12
AD10

AD8
AD7

AD5 AD4
AD3

+5V +5V

AD1

R495 2.7K

4

+5V-12V +12V

PCI1

B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49

B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62

B1
B2
B3
B4
B5
B6
B7
B8
B9

-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT1#
RSVD2
PRSNT2#
GND
GND
RSVD5
GND
CLK
GND
REQ#
+5V
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE3#
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE2#
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE1#
AD14
GND
AD12
AD10
GND

AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V
ACK64#
+5V
+5V

PCI CONN

TRST#

+12V

TMS

TDI

+5V
INTA#
INTC#

+5V

RSVD1

+5V

RSVD3

GND
GND

RSVD4

RST#

+5V

GNT#

GND

RSVD6

AD30

+3.3V

AD28
AD26

GND

AD24

IDSEL#

+3.3V

AD22
AD20

GND
AD18
AD16

+3.3V

FRAME#

GND

TRDY#

GND

STOP#

+3.3V

SDONE

SBO#

GND

PAR

AD15

+3.3V

AD13
AD11

GND

AD9

C/BE0#

+3.3V

AD6
AD4

GND

AD2
AD0
+5V

REQ64#

+5V
+5V

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49

A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62

+3_3V

+5V

R439 8.2K

R440 4.7K
R502 4.7K

PIRQF_L <20,22,25,26,27>
PIRQH_L <20,22,25,26,27>PIRQG_L<20,22,25,26,27>

PCI32_RST_L <25,26,27,43>
GNT2_J <19>

AD30
AD28

AD26
AD24

R457 100

AD22
AD20

AD18
AD16

R441 0
R442 0

AD15
AD13

AD11
AD9

CBEJ0
AD6

AD2
AD0

R443 2.7K

3

PME_J <19,25,26,27,46,48>

FRAME_J <19,22,25,26,27,46,48>
TRDY_J <19,22,25,26,27,46,48>
STOP_J <19,22,25,26,27,46,48>

+5V

AD19

SMBCLK <7,8,13,14,25,26,27,41,43>
SMBDATA <7,8,13,14,25,26,27,41,43>

PAR <19,25,26,27,46,48>

+3_3V +5V

3VDUAL

3VDUAL

C724

0.1u

2

C1407

0.1u

1PRSNT1_1_L
1PRSNT2_1_L

-12V +12V

+3_3V

+5V +3_3V

C695

C696

0.01u

0.01u

C713

0.1u

C622

0.1u

C669

0.1u

C624

0.1u

C473

0.1u

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

C1408

0.1u

+5V

C694

0.1u

PCI32 SLOT1

Last Revision Date:

Sheet

EC5

470u-16V

EC18
1000u-6.3V

EC6

1000u-6.3V

Tuesday, March 18, 2003

24 52

1

of

Rev

00E

5

4

3

2

1

PCI32 SLOT

IDSEL: AD20
INTA#: PIRQG_L

INTB#: PIRQH_L

D D

INTC#: PIRQE_L
INTD#: PIRQF_L

REQ: REQ3

R1487 8.2K

GNT: GNT3

PIRQH_L<20,22,24,26,27>
PIRQF_L<20,22,24,26,27>

PCI3_33MHZ_CLK<8>

REQ3_J<19,22>

C C

,24,26,27,46,48>

B B

AD[0..31]

CBEJ[0..3]<19,24,26,27,46,48>

AD0
AD1

AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBEJ0
CBEJ1
CBEJ2
CBEJ3

IRDY_J<19,22,24,26,27,46,48>

DEVSEL_J<19,22,24,26,27,46,48>

PLOCK_J<19,22,24,26,27>

PERR_J<19,22,24,26,27,46,48>
SERR_J<19,22,24,26,27,46,48>

+5V

2PRSNT1_1_L
2PRSNT2_1_L

AD31
AD29

AD27
AD25

CBEJ3
AD23

AD21
AD19

AD17
CBEJ2

CBEJ1
AD14

AD12
AD10

AD8
AD7

AD5
AD3

AD1

R1494 2.7K

-12V

+3_3V

+5V

B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49

B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62

B1
B2
B3
B4
B5
B6
B7
B8
B9

PCI2

-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT1#
RSVD2
PRSNT2#
GND
GND
RSVD5
GND
CLK
GND
REQ#
+5V
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE3#
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE2#
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE1#
AD14
GND
AD12
AD10
GND

AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V
ACK64#
+5V
+5V

TRST#

+12V

TMS

TDI

+5V
INTA#
INTC#

+5V

RSVD1

+5V

RSVD3

GND
GND

RSVD4

RST#

+5V
GNT#

GND

RSVD6

AD30

+3.3V

AD28
AD26

GND

AD24

IDSEL#

+3.3V

AD22
AD20

GND
AD18
AD16

+3.3V

FRAME#

GND

TRDY#

GND

STOP#

+3.3V

SDONE

SBO#

GND

PAR
AD15

+3.3V

AD13
AD11

GND

AD9

C/BE0#

+3.3V

AD6
AD4

GND

AD2
AD0

+5V

REQ64#

+5V
+5V

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49

A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62

+5V

+3_3V

+12V

R1486 8.2K

R1488 4.7K
R1489 4.7K

PIRQG_L <20,22,24,26,27>
PIRQE_L <20,22,24,26,27>

PCI32_RST_L <24,26,27,43>
GNT3_J <19>

AD30
AD28

AD26
AD24

R1491 100

AD22
AD20

AD18
AD16

R1492 0
R1493 0

AD15
AD13

AD11
AD9

CBEJ0
AD6

AD4
AD2

AD0

R1495 2.7K C1175

PME_J <19,24,26,27,46,48>

FRAME_J <19,22,24,26,27,46,48>
TRDY_J <19,22,24,26,27,46,48>
STOP_J <19,22,24,26,27,46,48>

+5V

AD20AD2

SMBCLK <7,8,13,14,24,26,27,41,43>
SMBDATA <7,8,13,14,24,26,27,41,43>

PAR <19,24,26,27,46,48>

+5V

3VDUAL

3VDUAL

0.1u

2PRSNT1_1_L
2PRSNT2_1_L

-12V

C1165

0.1u

+3_3V

C1169

0.1u

C1162

0.01u

C1170

0.1u

C1172

0.1u

C1163

0.01u

+12V

C1167

0.1u

+5V

C1173

0.1u

EC20
1000u-6.3V

EC21

1000u-6.3V

PCI CONN

A A

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

PCI32 SLOT1

Last Revision Date:

Sheet

Tuesday, March 18, 2003

25 52

1

Rev

00E

of

5

4

3

2

1

PCI32 SLOT

IDSEL: AD21
INTA#: PIRQH_L

INTB#: PIRQE_L

D D

INTC#: PIRQF_L
INTD#: PIRQG_L

REQ: REQ4

R1497 8.2K

GNT: GNT4

PIRQE_L<20,22,24,25,27>
PIRQG_L<20,22,24,25,27>

PCI4_33MHZ_CLK<8>

REQ4_J<19,22>

C C

19,24,25,27,46,48>

B B

AD[0..31]

CBEJ[0..3]<19,24,25,27,46,48>

AD0
AD1

AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBEJ0
CBEJ1
CBEJ2
CBEJ3

IRDY_J<19,22,24,25,27,46,48>

DEVSEL_J<19,22,24,25,27,46,48>

PLOCK_J<19,22,24,25,27>

PERR_J<19,22,24,25,27,46,48>
SERR_J<19,22,24,25,27,46,48>

+5V

3PRSNT1_1_L
3PRSNT2_1_L

AD31
AD29

AD27
AD25

CBEJ3
AD23

AD21
AD19

AD17
CBEJ2

CBEJ1
AD14

AD12
AD10

AD8
AD7

AD5
AD3

AD1

R1504 2.7K

-12V

+3_3V

+5V

B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49

B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62

B1
B2
B3
B4
B5
B6
B7
B8
B9

PCI3

-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT1#
RSVD2
PRSNT2#
GND
GND
RSVD5
GND
CLK
GND
REQ#
+5V
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE3#
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE2#
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE1#
AD14
GND
AD12
AD10
GND

AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V
ACK64#
+5V
+5V

TRST#

+12V

TMS

TDI

+5V
INTA#
INTC#

+5V

RSVD1

+5V

RSVD3

GND
GND

RSVD4

RST#

+5V

GNT#

GND

RSVD6

AD30

+3.3V

AD28
AD26

GND

AD24

IDSEL#

+3.3V

AD22
AD20

GND
AD18
AD16

+3.3V

FRAME#

GND

TRDY#

GND

STOP#

+3.3V

SDONE

SBO#

GND

PAR

AD15

+3.3V

AD13
AD11

GND

AD9

C/BE0#

+3.3V

AD6
AD4

GND

AD2
AD0

+5V

REQ64#

+5V
+5V

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49

A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62

+5V

+3_3V

+12V

R1496 8.2K

R1498 4.7K
R1499 4.7K

PIRQH_L <20,22,24,25,27>
PIRQF_L <20,22,24,25,27>

PCI32_RST_L <24,25,27,43>
GNT4_J <19>

AD30
AD28

AD26
AD24

R1501 100

AD22
AD20

AD18
AD16

R1502 0
R1503 0

AD15
AD13

AD11
AD9

CBEJ0
AD6

AD4
AD2

AD0

R1505 2.7K C1189

PME_J <19,24,25,27,46,48>

FRAME_J <19,22,24,25,27,46,48>
TRDY_J <19,22,24,25,27,46,48>
STOP_J <19,22,24,25,27,46,48>

+5V

AD21AD2

SMBCLK <7,8,13,14,24,25,27,41,43>
SMBDATA <7,8,13,14,24,25,27,41,43>

PAR <19,24,25,27,46,48>

+5V

3VDUAL

3VDUAL

0.1u

3PRSNT1_1_L
3PRSNT2_1_L

-12V

C1179

0.1u

+3_3V

C1183

0.1u

C1176

0.01u

C1184

0.1u

C1186

0.1u

C1177

0.01u

+12V

C1181

0.1u

+5V

C1187

0.1u

A A

PCI CONN

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

PCI32 SLOT1

Last Revision Date:

Sheet

Tuesday, March 18, 2003

26 52

1

Rev

00E

of

5

4

3

2

1

PCI32 SLOT

IDSEL: AD22
INTA#: PIRQE_L

INTB#: PIRQF_L

D D

INTC#: PIRQG_L
INTD#: PIRQH_L

REQ: REQ5

R1507 8.2K

GNT: GNT5

PIRQF_L<20,22,24,25,26>
PIRQH_L<20,22,24,25,26>

PCI5_33MHZ_CLK<8>

REQ5_J<19,22>

C C

19,24,25,26,46,48>

B B

AD[0..31]

CBEJ[0..3]<19,24,25,26,46,48>

AD0
AD1

AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBEJ0
CBEJ1
CBEJ2
CBEJ3

IRDY_J<19,22,24,25,26,46,48>

DEVSEL_J<19,22,24,25,26,46,48>

PLOCK_J<19,22,24,25,26>

PERR_J<19,22,24,25,26,46,48>
SERR_J<19,22,24,25,26,46,48>

+5V

4PRSNT1_1_L
4PRSNT2_1_L

AD31
AD29

AD27
AD25

CBEJ3
AD23

AD21
AD19

AD17
CBEJ2

CBEJ1
AD14

AD12
AD10

AD8
AD7

AD5
AD3

AD1

R1514 2.7K

-12V

+3_3V

+5V

B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49

B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62

B1
B2
B3
B4
B5
B6
B7
B8
B9

PCI4

-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT1#
RSVD2
PRSNT2#
GND
GND
RSVD5
GND
CLK
GND
REQ#
+5V
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE3#
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE2#
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE1#
AD14
GND
AD12
AD10
GND

AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V
ACK64#
+5V
+5V

TRST#

+12V

TMS

TDI

+5V
INTA#
INTC#

+5V

RSVD1

+5V

RSVD3

GND
GND

RSVD4

RST#

+5V

GNT#

GND

RSVD6

AD30

+3.3V

AD28
AD26

GND

AD24

IDSEL#

+3.3V

AD22
AD20

GND
AD18
AD16

+3.3V

FRAME#

GND

TRDY#

GND

STOP#

+3.3V

SDONE

SBO#

GND

PAR

AD15

+3.3V

AD13
AD11

GND

AD9

C/BE0#

+3.3V

AD6
AD4

GND

AD2
AD0

+5V

REQ64#

+5V
+5V

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49

A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62

+5V

+3_3V

+12V

R1506 8.2K

R1508 4.7K
R1509 4.7K

PIRQE_L <20,22,24,25,26>
PIRQG_L <20,22,24,25,26>

PCI32_RST_L <24,25,26,43>
GNT5_J <19>

AD30
AD28

AD26
AD24

R1511 100

AD22
AD20

AD18
AD16

R1512 0
R1513 0

AD15
AD13

AD11
AD9

CBEJ0
AD6

AD4
AD2

AD0

R1515 2.7K C1203

PME_J <19,24,25,26,46,48>

FRAME_J <19,22,24,25,26,46,48>
TRDY_J <19,22,24,25,26,46,48>
STOP_J <19,22,24,25,26,46,48>

+5V

AD22AD2

SMBCLK <7,8,13,14,24,25,26,41,43>
SMBDATA <7,8,13,14,24,25,26,41,43>

PAR <19,24,25,26,46,48>

+5V

3VDUAL

3VDUAL

0.1u

4PRSNT1_1_L
4PRSNT2_1_L

-12V

C1193

0.1u

+3_3V

C1197

0.1u

C1190

0.01u

C1198

0.1u

C1200

0.1u

C1191

0.01u

+12V

C1195

0.1u

+5V

C1201

0.1u

A A

PCI CONN

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

PCI32 SLOT1

Last Revision Date:

Sheet

Tuesday, March 18, 2003

27 52

1

Rev

00E

of

5

VID_P0_0
VID_P0_1
VID_P0_2
VID_P0_3
VID_P0_4

D D

C C

+3_3V

B B

A A

VID_P0_[0..4] <3,7,23>

DEVRST_L2<32,43>

SIO_33MHZ_CLK<8>

DLED4<41>

SIO_C_OPEN<41>

GPIOE1

R117

4.7K

THRM_J<20>

PWBTIN<38>

SIO_48MHZ_CLK<8>

SERIRQ<19,22>

LDRQ0_J<20>

LFRAME_J<20,32>

LAD[0..3]<20,32>

DLED4

SIO_C_OPEN

AVGND<29>

AVI1<29>
AVI2<29>
AVI3<29>

AVI5<29>
AVI6<29>
AVI4<29>

FANPWM0<36>

FANPWM1<29>

FANIO1<29>

FANPWM2<29>

FANIO2<29>
FANIO0<36>

R115 X_0

DLED3<41>

SIO_SMI_J<20>

BIOS_WP<32>

DLED1<41>
DLED2<41>

CPU2_DIODE_P
CPU2_DIODE_N

CPU1_DIODE_P
CPU1_DIODE_N

PRESTONIA 604 THERMAL DIODE

5

+3_3V

FP_WP

CPU2_DIODE_N
CPU1_DIODE_P
CPU1_DIODE_N
AVGND

GPIOE0

DLED3

CPU2_DIODE_P

DLED1
DLED2

CPU2_DIODE_P <6>
CPU2_DIODE_N <6>

CPU1_DIODE_P <4>
CPU1_DIODE_N <4>

R77 10

R522100

LAD0
LAD1
LAD2

LAD3

TP91
TP112
TP92
TP93
TP113
TP114
TP115
TP116
TP117
TP118
TP119

AVREF

TP123

TP125
TP126
TP96

10

LRESET#

11

LCLK

12

SERIRQ

13

LDRQ#

14

LFRAME#

15

LAD0

16

LAD1

17

LAD2

18

LAD3

6

P12/GPIO04

7

P17/GPIO05

121

JOYBX/GPIO24

122

JOYBY/GPIO25

119

JOYABTN0/GPIO22

120

JOYABTN1/GPIO23

117

JOYAX/GPIO20

118

JOYAY/GPIO21

123

JOYBBTN0/GPIO26

124

JOYBBTN1/GPIO27

125

MDTX/GPIO30

126

MDRX/GPIO31

28

CHASO#/GPIOE5

29

CHASI

46

VREF

49

TS3/D2N

48

TS2/D1P

47

TS1/D1N

45

AVSS

38

AVI1

39

AVI2

40

AVI3

42

AVI5

43

AVI6

41

AVI4

5

FANOUT0/GPIO03

23

GPIOE0

3

FANOUT1/GPIO01

2

FANIN1/GPIO00

1

FANOUT2/GPIO34

128

FANIN2/GPIO33

4

FANIN0/GPIO02

127

P16/IRSL1/GPIO32

24

OTS1#/GPIOE1

27

ALARM#/RING/GPIOE4

21

SMI#/GPIO10

56

WDTO/GPIO14

55

SDA/GPIO13

54

SCL/GPIO12

53

GPIO11

50

D2P

35

PWBTIN#/GPIS2

25

LED1/OTS2#/GPIOE2

26

LED2

22

CLKIN

83627HF-REVG

SIOP3V

4

AVdd3_3V

44

AVdd

SIO

4

3VDUAL

+3_3V

2019

52831153130

VDDVSS

8451116

VSB

VDD

VDD

VDD

MTR1#/GPIO16/IRSL2

DTR1#_BOUT1/BADDR

DTR2#_BOUT2/PSONPOL

VSS

VSS

VSS

04 CHAHGE TO 14

V_BAT <20,21,41>

U8

DENSEL
DRATE0

VBAT

INDEX#

MTR0#

DS1#/GPIO17/IRSL3

PWBTOUT#/GPOS0
IRRX2_IRSL0/GPIE6

DR0#

DIR#

STEP#
WDATA#
WGATE#

TRK0#

WP#

RDATA#

HDSEL#

DSKCHG#

PSON#/GPOS1

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

SLCT

BUSY_WAIT#

ACK#

SLIN#_ASTRB#

INIT#

ERR#

AFD#_DSTRB#

STB#_WRITE#

IRRX1/GPIE7
IRTX/GPIO15

PWUREQ#

DCD1#

DSR1#

SIN1

RTS1#/PSLDC0

SOUT1

CTS1#

RI1#

DCD2#

DSR2#

SIN2

RTS2#

SOUT2/PSLDC1

CTS2#

RI2#

SLPS3#/GPIS3

GA20/GPIO07

KBRST/GPIO06

KBDATA

KBCLK

MSDATA

MSCLK

SLPS5#/AVI0

NS-PC87366

3

2

1

FLOPPY DISK HEADER

J8

DENSEL

75

FDEDIN

74

FDINDX_N

73

FDM00_N

72

TP_FD_12

71

FDDS0_N

70

TP_FD_16

69

FDDIR_N

68

FDSTEP_N

67

FDWD_N

66

FDWE_N

65

FDTRK0_N

64

FDWPD_N

63

FDRDATA_N

62

FDHEAD_N

61

DSKCHG_N

60

TP106

34

PD0

92

PD1

90

PD2

88

PD3

86

PD4

85

PD5

82

PD6

81

PD7

80
76
77

PE

78
79
87
89
91
93
94

SWITCH_J

33
59
58
57

32
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
36
9
8
112
111
114
113

37

SOUT1
DTR1_N

SOUT2
DTR2_N

3VDUAL

IRRX

GPIE6

D30

A C

1N4148S

SLCT <34>
PE <34>
BUSY <34>
ACK_N <34>
SLCTIN_N <34>
PINIT_N <34>
ERR_N <34>
AUTOFD_N <34>
PSTROBE_N <34>
SWITCH_J <20>

SIO_WAKE_L <20>
DCD1_N <33>
DSR1_N <33>
SIN1 <33>
RTS1_N <33>
SOUT1 <33>
CTS1_N <33>
DTR1_N <33>
RING1_N <33>
DCD2_N <33>
DSR2_N <33>
SIN2 <33>
RTS2_N <33>
SOUT2 <33>
CTS2_N <33>
DTR2_N <33>
RING2_N <33>
SLP_S3_J <20,37,43>
A20GATE <19,22>
SIO_KBRST_J <19,22>
SIO_KBDATA <35>
SIO_KBCLK <35>
SIO_MSEDATA <35>
SIO_MSECLK <35>

SLP_S4_J <20,37,43>

R101

X_4.7K

3

SWITCH_J

12
34
56
78

910
1112
1314
1516
1718
1920
2122
2324
2526
2728
2930
3132
3334

YJ217-C-1

PD[0..7] <34>

+5V

R132

150K

R14833

FDTRK0_N
FDINDX_N
FDRDATA_N
DSKCHG_N

SOUT1

SOUT2

DTR1_N

DTR2_N

L: BADDR=2E

L:LOW PWR-ON H:HIGH PWR-ON

IR HEADER

IRRX
IRTX

+5V

JIR1

1

1

3 4

IRTX IRRX

34

5 6

56

X_YJ105

C786

C905

0.1u

0.1u

R98 0

AVGND

2

RN66

1 2
3 4
5 6
7 8

1K

L:PIN 33-35,37 as power control function

H:PIN 33-35,37 as GPIO

H: BADDR=4E

Floppy
Write
Protiction

2.7K

C910

0.1u

FP_WP

R330

+3_3V

C179

0.1u

B

AVREF

C127

AVGND

0.47u-16V

C158

0.01u

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

+5V

+5V

R309
1K

Q36

MMBT3904

E C

V_BAT <20,21,41>

3VDUAL

C157

0.1u

3VDUAL

3VDUAL

3VDUAL

SIOP3V

AVGND

+5V

+5V

+5V

+5V

R123

X-10K

R126

X-10K

R121

X-10K

R159

X-10K

R1633

4.7K

R1634

4.7K

R1637

4.7K

C126

0.1u

Micro Star Restricted Secret

SIO(NS87366)

Last Revision Date:

Tuesday, March 18, 2003

Sheet

28 52

1

SOUT1

SOUT2

DTR1_N

DTR2_N

GPIOE0

GPIOE1

GPIE6

C211
22u-10V

Rev

00E

of

5

4

3

AVdd3_3V

2

1

C118

0.1u

C128

0.1u

R84
330K

2/26

C119

0.1u

R97

499K-1%

AVI6 <28>
AVI4 <28>
AVI3 <28>
AVI5 <28>
AVI2 <28>
AVI1 <28>

C146

0.1u

LPC Hardware Monitor

R76

4.22K-1%

D D

+5V

AC

D59

1N5817S

C C

R212

4.7K

FANIO2<28>

R213 27K

R214

10K

D17

1N4148S

A C

CPUFAN2

3
2
1

YJ103-BO

+12V

S

Q32

EC4

+

G

SI2303DS-S-SOT23

D

100U/25V/DIP

C94-1012501-S03

R193 2K

R187 0

DS

2N7002S

Q33

G

R204 0

-12V

+2_5V

+3_3V

+12V

VCC_CORE

+5V

R70 100K-1%
R73 499K-1%
R74 499K-1%
R71 499K-1%
R85 499K-1%
R94 499K-1%

100K-1%

AVGND<28>

FANPWM2 <28>

AVGND

R78

C129

0.1u
R79

680K-1%

C130

0.1u

CPUFAN2

B B

+5V

AC

D60

1N5817S

R8

4.7K

FANIO1<28>

A A

R19 27K

R17

10K

D1

1N4148S

A C

CPUFAN1

3
2
1

YJ103-BO

CPUFAN1

5

4

+12V

Q1

EC2

+

100U/25V/DIP

S

D

R22 2K

G

R11 0

SI2303DS-S-SOT23

DS

2N7002S

Q4

G

R36 0

3

FANPWM1 <28>

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

2

http://www.msi.com.tw

SIO HARDWARE MONITOR

Last Revision Date:

Tuesday, March 18, 2003

Sheet

1

29 52

Rev

00E

of

Micro Star Restricted Secret

5

4

3

2

1

R354

10K

IDE_PDD[0..15]

+3_3V

R353

4.7K

IDE1

IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4 IDE_PDD11
IDE_PDD3
IDE_PDD2
IDE_PDD1

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40

IDE_PDD8
IDE_PDD9
IDE_PDD10

IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15IDE_PDD0

YJ220-CB-1

R355
470

80CON_CBL_DET_PRI <32>
IDE_PDA2 <20>
IDE_PDCS3_L <20>

R323
10K

IDE_PDD[0..15]<20>

D D

IDERST_L<43>

IDERST_L

R317 33

R199

8.2K

IDE_PDDREQ<20>

IDE_PDIOW_L<20>

IDE_PDIOR_L<20>

IDE_PIORDY<20>

IDE_PDDACK_L<20>

IDE_IRQ_14_L<19>

IDE_PDA1<20>

C C

IDE_PDA0<20>

IDE_PDCS1_L<20>

D16

AC

1N4148S

D18

AC

1N4148S

IDE_SDD[0..15]<20>

IDE_SDD[0..15]

HD_LED_J <38>

B B

IDERST_L

IDE_SDDREQ<20>

IDE_SDIOW_L<20>

IDE_SDIOR_L<20>

IDE_SIORDY<20>

IDE_SDDACK_L<20>

IDE_IRQ_15_L<19>

A A

IDE_SDCS1_L<20>

5

R316 33

R215

8.2K

IDE_SDA1<20>
IDE_SDA0<20>

R315

10K

+3_3V

R321

4.7K

IDE_SDD7
IDE_SDD6
IDE_SDD5 IDE_SDD10
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0

4

IDE2

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40

D2X20-1

IDE_SDD8
IDE_SDD9

IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

R322
470

80CON_CBL_DET_SEC <32>
IDE_SDA2 <20>
IDE_SDCS3_L <20>

R320
10K

3

2

Title
Document Number

Micro Star Restricted Secret

IDE

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Last Revision Date:

Tuesday, March 18, 2003

Sheet

30 52

1

of

Rev

00E

5

+5V

1 2

USBOC0_J<21>

USBP0N<21>

D D

C C

USBP0P<21>

USBOC1_J<21>

USBP1N<21>

USBP1P<21>

FUSE-1.1A

4

F1

USB_P_1

C96
68p

R64
470K

3

CP2

X_COPPER

RN105 0

7 8
5 6
3 4
1 2

8
7
6
5

X_90ohm_0603

L3806

2

1

Back Panel USB

JUSB1

FB6X_FB80S-0805

1
2
3
4

USB_P_2

USBP0_N

USBP1_N

C113
X_47p

C105
X_47p

C109
X_47p

C101
X_47p

C69

0.1u

1
2
3
4

C81

+

1000u-6.3V

PGND <33,34,35,42>

9

10

VCC
DATA0­DATA0+
GND
CGND
CGND

USBX2-D8-BK

VCC

DATA1-

DATA1+

GND
CGND
CGND

5
6
7
8
11
12

Dual-Lay

F4

1 2

USBOC2_J<21>

USBP2N<21>

USBP2P<21>

B B

USBOC3_J<21>

USBP3N<21>

USBP3P<21>

A A

5

FUSE-1.1A

C922
68p

4

USB_P_3

R799
470K

CP7

X_COPPER

7 8
5 6
3 4
1 2

RN106 0

8
7
6
5

X_90ohm_0603

3

L3807

Front USB

FB29X_FB80S-0805

1
2
3
4

USBP2_N

C952

+

470u

USBP3_N

USB_P_4

C936
X_47p

C934
X_47p

C935
X_47p

C933
X_47p

C932

0.1u

2

JUSB2

1
3
5
7
9

CON10B_0

2
4
6
8

10

USB_PIN_10
USB_PIN_9

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

R814 5.6K
R815 5.6K

USB

Last Revision Date:

Tuesday, March 18, 2003

Sheet

31 52

1

Rev

00E

of

5

FWH

+3_3V

D D

BIOS_WP<28>

R633

4.7K

Default : Open

DEVRST_L2<28,43>

R630 4.7K

J14

1
2
3

YJ103

100

R620

4

DEVRST_FWH

R625 8.2K
R628 8.2K

1 2
3 4
5 6
7 8

100
RN103

+3_3V

C767

0.1u

FWH_FGP_13

FWH_FGP_12
80CON_CBL_DET_SEC
80CON_CBL_DET_PRI
FWH_WP_N
FWH_TBL_N

LAD0
LAD1
LAD2

3

U32

1

VPP

2

RST#

3

FGPI3

4

FGPI2

5

FGPI1

6

FGPI0

7

WP#

8

TBL#

9

ID3

10

ID2

PLCC

11

ID1

12

ID0

13

FWH0

14

FWH1

15

FWH2

16 17

GND FWH3

YSKT32PLCC

VCC
CLK

FGPI4

IC(VIL)

GNDA

VCCA

GND

VCC

INIT#

FWH4

RFU
RFU
RFU
RFU
RFU

+3_3V

C774

C792

0.1u

0.1u

32

FWH_33MHZ_CLK

31

FWH_FGP_14

30

FWH_IC

29
28
27
26
25
24

LFRAME_J

23

TP107

22

TP108

21

TP109

20

TP110

19

TP111 Q60

18

LAD3

LFRAME_J <20,28>

+3_3V

E C

MMBT3904

R591

300

Q59

2

LAD[0..3]<20,28>

80CON_CBL_DET_PRI<30>

+3_3V

R619
470

B

B

R632 470

E C

MMBT3904

80CON_CBL_DET_SEC<30>

FWH_33MHZ_CLK
FWH_FGP_14

FWH_IC

CPU_INIT_L <3,4,5,19>

80CON_CBL_DET_PRI
80CON_CBL_DET_SEC

FWH_33MHZ_CLK <8>

R606 8.2K
R602 8.2K

LAD0
LAD1
LAD2
LAD3

1

+5V

C C

USBOC4_J<21>

USBP4N<21>

USBP4P<21>

USBOC5_J<21>

B B

USBP5N<21>

USBP5P<21>

F5

1 2

FUSE-1.1A

C1397
68p

USB_P_5

R1629
470K

Dual-Lay

CP8

X_COPPER

7 8
5 6
3 4
1 2

RN107 0

8
7
6
5

X_90ohm_0603

L3813

Front USB

FB30X_FB80S-0805

1
2
3
4

USBP4_N

C1398

+

470u

USBP5_N

USB_P_6

C1394
X_47p

C1399
X_47p

C1395
X_47p

C1400
X_47p

C1396

0.1u

JUSB3

1
3
5
7
9

CON10B_0

2
4
6
8

10

R1630 5.6K
R1631 5.6K

A A

Title
Document Number

5

4

3

2

Micro Star Restricted Secret

FWH

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Last Revision Date:

Tuesday, March 18, 2003

Sheet

32 52

1

Rev

00E

of

5

4

3

2

1

C115

0.1u

+12V

D D

DTR1_N<28>

SOUT1<28>

RTS1_N<28>

DCD1_N<28>
DSR1_N<28>

SIN1<28>

CTS1_N<28>

RING1_N<28>

-12V

C C

B B

+12V

DTR2_N<28>

SOUT2<28>

RTS2_N<28>

DCD2_N<28>
DSR2_N<28>

SIN2<28>

CTS2_N<28>

RING2_N<28>

-12V

A A

5

U7

1

VDD(12V)

16

DA1

15

DA2

13

DA3

19

RA1

18

RA2

17

RA3

14

RA4

12

RA5

10

VSS(-12V)

C156

GD75232S

0.1u

Multiple RS232 Drivers and
Receivers

+5V

C265

0.1u

U10

1

VDD(12V)

16

DA1

15

DA2

13

DA3

19

RA1

18

RA2

17

RA3

14

RA4

12

RA5

10

VSS(-12V)

C298

GD75232S

0.1u

Multiple RS232 Drivers and
Receivers

VCC(5V)

DY1
DY2
DY3

RY1
RY2
RY3
RY4
RY5

GND

VCC(5V)

DY1
DY2
DY3

RY1
RY2
RY3
RY4
RY5

GND

20

5
6
8

2
3
4
7
9

11

20

5
6
8

2
3
4
7
9

11

DTR1_RS232
SOUT1_RS232
RTS1_RS232

DCD1_RS232
DSR1_RS232
SIN1_RS232
CTS1_RS232
RI1_RS232

PGND<31,34,35,42>

DTR2_RS232
SOUT2_RS232
RTS2_RS232

DCD2_RS232
DSR2_RS232
SIN2_RS232
CTS2_RS232
RI2_RS232

8P4C-180p

C172

0.1u

C1415

C1416

C264

0.1u

CN9

4

+5V

+5V

7 8

104P

104P

7 8

5 6

3 4

5 6

3 4

CN2

8P4C-180p

1 2

8P4C-180p

1 2

CN3

8P4C-180p

7 8

5 6

3 4

1 2

CN8

7 8

5 6

3 4

1 2

PGND

3

COM
1

1011

1
6
2
7
3
8
4
9
5

COM
1

1011

1
6
2
7
3
8
4
9
5

COM1

COM

COM2

COM

3VDUAL

R155

8.2K

D8

A C

1N4148S
D15

A C

1N4148S

R92

10K

SOUT2_RS232 SIN2_RS232

R1581

0

C245

0.1u

JLCD1

12
34
56

N31-2031011-C09

R147
1K

Q29

B

MMBT3904

E C

R1582 0

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

2

http://www.msi.com.tw

RI_J <20>

+5V

C1254
104P

COM PORT

Last Revision Date:

Tuesday, March 18, 2003

Sheet

33 52

1

Rev

00E

of

5

4

3

2

1

+5V

AC

D10

D D

AUTOFD_N
PINIT_N
SLCTIN_N
PSTROBE_N

12
34
56
78

RN35

1N4148S

J3

51

4.7K-8P4R

PD3
PD2
PD1
PD0

RN30

78
56
34
12

4.7K-8P4R

CN4

7 8
5 6
3 4
1 2

8P4C-180p

CN7

1 2
3 4
5 6
7 8

CN6

7 8
5 6
3 4
1 2

CN5

7 8
5 6
3 4
1 2

C207

180p

8P4C-180p

8P4C-180p

8P4C-180p

RN27

PD4
PD5
PD6

C C

PD7

12
34
56
78

ACK_N

4.7K-8P4R

ACK_N<28>

SLCT<28>

PE<28>

BUSY<28>

ERR_N<28>

AUTOFD_N<28>

PINIT_N<28>

SLCTIN_N<28>

PSTROBE_N<28>

ACK_N
SLCT
PE
BUSY
ERR_N

AUTOFD_N
PINIT_N
SLCTIN_N
PSTROBE_N

R128 4.7K

78
56
34
12

RN22 4.7K-8P4R

RN34 33

1 2
3 4
5 6
7 8

SLCT
PE
BUSY
ERR_N

FPAUTOFD_N
FPINIT_N
FPSLCTIN_N
FPSTBR_N

RN29

B B

PD[0..7]<28>

PD[0..7]

PD3
PD2
PD1
PD0
PD4
PD5
PD6
PD7

7 8
5 6
3 4

33

1 2
1 2
3 4
5 6
7 8

FPDR3
FPDR2
FPDR1
FPDR0
FPDR4
FPDR5
FPDR6
FPDR7

RN26 33

C193

0.1u

48

YCN25F-001-1/YCN9M-1

PGND

CP3

13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
14
1

52

SLCT
PE

FPDR7
FPDR6
FPDR5
FPDR4
FPDR3

FPSLCTIN_N
FPDR2
FPINIT_N
FPDR1
ERR_N
FPDR0
FPAUTOFD_N
FPSTBR_N

io_gnd

R1220

BUSY

R1270

ACK_N

PGND<31,33,35,42>

X_COPPER

FB11X_FB80S-0805

A A

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

Micro Star Restricted Secret

PRINTER PORT

Last Revision Date:

Tuesday, March 18, 2003

Sheet

34 52

of

1

Rev

00E

5

4

3

2

1

+5V

D D

R33

4.7K

R44

4.7K

R21

4.7K

R48

4.7K
RT1

C24

0.1u

PGND

FUSE-1.1A

SIO_MSEDATA<28>

C C

SIO_MSECLK<28>

SIO_KBDATA<28>

B B

SIO_KBCLK<28>

MSEDATA_R

MSECLK_R

FB4 FB120S

KBDATA_R

FB2 FB120S

KBCLK_R

FB5 FB120S

KMPWR

FB3 FB120S

X_FB80S-0805

MSECLK_F

21

KBDATA_F

21

KBCLK_F

21

CP1

21

X_COPPER

FB1

KMPWR_F

C2

0.01u

J2

7

P7

8

9
10
11
12

1

2

3

4

5

6

P8
P9
P10
P11
P12

P1
P2
P3
P4
P5
P6

Top

P13
P14
P15
P16
P17

13
14
15
16
17

BOTTOM

CONN

CN1

8P4C-180p

7 8

5 6

3 4

A A

1 2

PGND<31,33,34,42>

5

4

3

R12
47K

C17

0.1u

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

2

http://www.msi.com.tw

KB&MS

Last Revision Date:

Tuesday, March 18, 2003

Sheet

35 52

1

Rev

00E

of

Micro Star Restricted Secret

5

4

3

2

1

+5V

AC

D63

1N5817S

D D

R62

4.7K

FANIO0<28>

R68 27K
R69
10K

D6

1N4148S

A C

SYSFAN1

3
2
1

YJ103-BO

+12V

Q7

EC1

+

100U/25V/DIP

R51 2K

S

G

R50 0

SI2303DS-S-SOT23

D

DS

Q11

2N7002S

G

R55 0

FANPWM0 <28>

+5V

C C

AC

D64

1N5817S

+12V

S

SYSFAN2

3
2
1

Q35

+

G

SI2303DS-S-SOT23

D

EC3

100U/25V/DIP

YJ103-BO

B B

A A

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

SYSTEM FANS

Last Revision Date:

Sheet

Tuesday, March 18, 2003

36 52

1

Rev

00E

of

5

4

3

2

1

SB5V

R4

Q5

B

E C

POWERCONN2X12

10K

MMBT3904

3.3V

-12V

GND4

PS_ON

GND5
GND6
GND7

3VSBY

GND8

+5V

12

R41
1K

SB5V

R897

R40

1K

E C

C71
X_470p

-12V

+5V

R42 100

R43

1K

Q14

B

MMBT3904

C72
X_470p

+3_3V

13
14
15
16
17
18
19
20
21

5V

22

5V

23

5V

24

+5V

SB3_3V

1K

D4

A C

1N4148S

Q13

B

Q12

B

MMBT3904

E C

MMBT3904

E C

PW_GD_PS <43>

CPU_VRM_EN <23>

D D

SLP_S3_J : For STR
SLP_S5_J : For
Soft Off

R37 X_1K

SLP_S3_J<20,28,43>

SLP_S4_J<20,28,43>

R32 1K

+12V

+3_3V

C C

+5V

SB5V

1
2
3
4
5
6
7
8

9
10
11
12

POWER1

3.3V

3.3V
GND1
5V
GND2
+5V
GND3
PWROK
5VSBY
12V
12V

3.3V

C16
X_0.1u

12

12

C59

C58

0.1u

0.1u

+12V

-12V

12

C62

1 2

0.1u

C61
22u-16V

SB3_3V+3_3V +5V

12

C60

0.1u

-12V

12

C26

0.1u

SB5V+3_3V

B B

12

12

C52

0.1u

SLP_S3_J : For STR
SLP_S5_J : For
Soft Off

POWER2

1

GND

2

GND

3

GND

4 5

GND +12V

A A

POWERCONN2X4

+12V
+12V
+12V

8
7
6

VCC12CPU

12

C53

0.1u

12

C36

0.1u

C47
22u-10V

12

C25

0.1u

12

C30

0.1u

SB5V

12

C35

0.1u

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

POWER CONNECTOR

Last Revision Date:

Tuesday, March 18, 2003

Sheet

1

37 52

Rev

00E

of

5

4

3

2

1

JFP3

+5V

D D

C C

B B

default 2-3

Front Pannel

R885
330

C1106
X_0.1u

SPEAKER<39>

SPEAK_STRAP<20>

SPEAKER SPEAK_STRAP

HD_LED_J<30>

SPEAKER
SPEAK_STRAP

R869

X_0

SB5V

PWBTIN

R893
10K

C1104
1u

R871

1

2.2K

RST

R892100

J16

1
2
3

YJ103

B

JFP2

3
5 6
7
9

PLED1HDD+
PLED2

HDD­GNDR PWSW+

PWSW-

RESET

CUT

RSVD

D2x5-1

R894 75

R895 75

Q71

E C

MMBT3904

R870

X_1K

stuff to disable auto-reboot

PWBTIN <28>

21
4

8

10

+3_3V

PLED
SUSLED
PWBTIN

C923

0.1u

SUSLED<43>

R896100

SYSPKR

SUSLED

3

PLED

SPK­BUZ+
BUZ-

5 6
7

D2x4-1

R811 X_0

AC

PLED<43>

+5V

SPK-GND

BUZ+

SLED
PLED BUZ-

SPK+

NC

D46

1N4148S

RST

21
4

8

21

R891

22

SPK­BUZ+
BUZ-

BZ1

BUZZER

+5V

+3_3V

R8901K

C1101

0.01u

R889 X_0

R887

0

PLED

C1107

0.1u

FOR EMI

3VDUAL

R886

4.7K

1 2

12

R888

X_4.7K

1 2

SYS_RST_L <19>

FP_RST_L <43>

A A

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

FRONT PANNEL

Last Revision Date:

Sheet

Tuesday, March 18, 2003

38 52

1

Rev

00E

of

8

1 2

C721

24.576MHZ/DIP

D D

22p

7

Y4

C716
22p

6

CP9

X_COPPER

R1574 2K
R1625 2K

AGND

5

HP_OUT_R <40>
HP_OUT_L <40>

+5VR

AGND

C735
1u-0805

4

3

+12V +5VR

C773

0.1u

VR1
78M05-TO252

G S

VIN VOUT

GND

D

2

C740
1u-0805

AGND

1

AGND <40,42>

C667

0.1u

AGND

DVDD1
XTL_IN
XTL_OUT
DVSS1
SDATA_OUT
BIT_CLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET#
PC_BEEP

4847464544424140394338

JS1

JS0

ID1#

ID0#

AVSS3

C711
10p

R498

R521
R519 33
R504 33
R497

FROM ICH

0

TP98

AC_SDOUT<20>

AC_BIT_CLK<20>

AC_SDIN0<20>

AC_SYNC<20>

C C

AC_RST_L<20>

TP97

0

0

XTAL_IN
XTAL_OUT

AC_BIT_CLK_R
AC_SDIN0_R

+3_3V

1
2
3
4
5
6
7
8

9
10
11
12

TP99

PHONE_IN

AUX_R

AUX_L

VEDIO_L

SPEAKER<38>

B B

R485

10K

C686

0.1u

R492
1K

C690

0.1u

for
EMC

C701

C722

10p

1 2

0.1u

C902

0.1u

C665

+

22u-10V

VEDIO_R

1314151617181920212223

NC

AVDD3

HP_OUT_R

CD_L

CD_GND_REF

CD_R

AUD_R_CD

AUD_L_GND

AUD_L_CD

37

AVSS2

AVDD2

HP_OUT_L

MONO_OUT

LINE_OUT_R

LINE_OUT_L

MIC1

MIC2

LINE_IN_L

LINE_IN_R

24

AUD_MIC_IN

CX3D
RX3D

FILT_L
FILT_R
AFILT2
AFILT1

VREFOUT

VREF

AVSS1
AVDD1

ADI1885

C668 0.1u

U24

36
35
34
33
32
31
30
29
28
27
26
25

C660

1u-0805

C661

1u-0805

C662

1u-0805

C734 0.1u

+5VR

AUD_R_LINE_IN

AUD_L_LINE_IN

C637

0.01u

+5VR

R464

4.7K

C656
22u-10V

AGND

22u-10V

AGND

R463

2.7K

C755

R462

4.7K

C677

0.1u

R4591K

c11-2711013-w08

R432 4.7K

R433 2.7K

R434 4.7K

C685
270p

C692

C689

1u-0805

270p

MIC_IN <40>

C709
1u-0805

C714

473p

AUD_R_LINE_IN <40>

AUD_L_LINE_IN <40>

JCD1

4
3
2
1

YJ104-B

CD IN

C718

0.1u

AGND

AGND <40,42>

AGND

C6631u-0805

A A

C6641u-0805

R461

4.7K

R460

4.7K

R4354.7K

R4364.7K

CODEC VCC3_3 NEED CAP AS CLOSE AS POSSIBLE.

8

7

6

5

4

JAUX1

4
3
2
1

YJ104-B

Title
Document Number

3

Micro Star Restricted Secret

AD1885A

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

2

Last Revision Date:

Tuesday, March 18, 2003

Sheet

39 52

1

Rev

00E

of

5

D D

4

3

2

1

JAUD2

2
1

YJ102

C C

+5VR

12

C588

0.1u

1 2

C590
1u-0805

AUD_R_LINE_IN_JUMP

MIC_IN<39>

AUD_L_LINE_IN_JUMP

21

FB31 FB120S

AUD_R_LINE_IN_JUMP
AUD_L_LINE_IN_JUMP

21

FB32 FB120S

HP_OUT_R1
HP_OUT_L1

AGND

JAUD1

2
4
6
8
10

CON10B_0

1
3
5
7
9

C1410

470p

AUD_R_LINE_IN<39>

AUD_L_LINE_IN<39>

B B

1 2

1 2

AGND<39,42>

C5501u-0805

C5511u-0805

R407

4.7K

1 2

AGND

1 2

4.7K
R356

1 2

4.7K
R357

R408

4.7K

1 2

AGND

21

FB13 FB120S

21

FB15 FB120S

470p

C1401

470p

C1402

AGND

C1255

HP_OUT_R<39>

HP_OUT_L<39>

+

100U/16V/DIP

C1256

+

100U/16V/DIP

R1584 33

R1585 33

R1586
10k

R1587
10k

21

FB33 FB120S

21

FB35 FB120S

470p

C1411

C1412

470p

21

FB34 FB120S

21

FB36 FB120S

HP_OUT_R1

HP_OUT_L1

AGND<39,42>

A A

Title
Document Number

5

4

3

2

Micro Star Restricted Secret

SPEAKER OUT MIC&LINE IN

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Last Revision Date:

Tuesday, March 18, 2003

Sheet

40 52

1

Rev

00E

of

5

R749

8.2K

D D

PWR_OK1<43>

B

E C

Q65
MMBT3904

R748

3.3K

R750

10K

Q68

G

2N7002S

4

+3_3V +3_3V+12VSB5V

R726

R790

8.2K

8.2K

ICH4_SMBCLK

DS

R793

X_0

1 2

3

ICH4_SMBCLK <20,46,48>

SMBCLK <7,8,13,14,24,25,26,27,43>

Chassis
Intrusion
Header

SIO_C_OPEN<28>

2

V_BAT<20,21,28>

R821
1M

JCI1

1
2

YJ102

1

DS

Q69

2N7002S

G

C C

+5V

RN109

330

1 2

3 4

5 6

B B

DLED1<28>
DLED2<28>
DLED3<28>
DLED4<28>

7 8

DLED2

DLED1

DLED3

DLED4

STUFF IN LAYOUT

DLED1
DLED2
DLED3
DLED4

R792

X_0

1 2

JDB1

1
3
5
7
9

D2x5-1:2-BK

2
4
6
8

10

ICH4_SMBDATA

DDLED1
DDLED2
DDLED3
DDLED4

ICH4_SMBDATA <20,46,48>

SMBDATA <7,8,13,14,24,25,26,27,43>

+5V

RN108

470

1 2

3 4

5 6

7 8

DDLED2

DDLED3

DDLED4

DDLED1

RN110

1 2

3 4

A A

5

1K

5 6

7 8

NPN-MBT3904LT1-S-SOT23

Q118

2

1 3

4

Q117

2

1 3

NPN-MBT3904LT1-S-SOT23

Q119

2

1 3

NPN-MBT3904LT1-S-SOT23

Q120

2

1 3

NPN-MBT3904LT1-S-SOT23

3

MS-9121-0C
2002/06/06

Title
Document Number

2

Micro Star Restricted Secret

IBM_1

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Last Revision Date:

Tuesday, March 18, 2003

Sheet

41 52

1

Rev

00E

of

5

4

3

2

1

+5V

L3_5MIL L3_6MIL

IM1

1

2

D D

L4_5MIL

IM3

1

2

X_YJ102

L6_6MIL+

IM5

1

2

C C

X_YJ102

X_YJ102

50 ohm

50 ohm

W/S/W 6/8/6

DIFFERENTIAL 100ohm

Impedence Measurement Test pad

+5V

L1_5MIL

IM7

1

2

B B

FM1

1

X_F_PADS
FM7

1

X_F_PADS

FM2

1

X_F_PADS
FM8

1

X_F_PADS

X_YJ102

55 ohm

FM3

1

X_F_PADS
FM9

1

X_F_PADS

+5V

2

L4_6MIL

1

2

X_YJ102

L6_6MIL-

1

2

X_YJ102

FM4

1

X_F_PADS
FM10

1

X_F_PADS

1

X_YJ102

IM4

IM6

IM2

45 ohm

45 ohm

FM5

1

X_F_PADS

FM11

1

X_F_PADS

FM6

1

X_F_PADS
FM12

1

X_F_PADS

MH3

MH2

MH7

X_MH

X_MH

X_MH

AGND<39,40>

MH5

MH4

X_MH

X_MH

1

H1

2

H2

3

H3

4

H4

5

H5

6

H6

7

H7

8

H8

9

H9

AGND

1

H1

2

H2

3

H3

4

H4

5

H5

6

H6

7

H7

8

H8

9

H9

MH10

MH1

PGND<31,33,34,35>

MH9

X_MH

X_MH

X_MH

1

H1

2

H2

3

H3

4

H4

5

H5

6

H6

7

H7

8

H8

9

H9

1

H1

2

H2

3

H3

4

H4

5

H5

6

H6

7

H7

8

H8

9

H9

1

H1

2

H2

3

H3

4

H4

5

H5

6

H6

7

H7

8

H8

9

H9

1

H1

2

H2

3

H3

4

H4

5

H5

6

H6

7

H7

8

H8

9

H9

1

H1

2

H2

3

H3

4

H4

5

H5

6

H6

7

H7

8

H8

9

H9

1

H1

2

H2

3

H3

4

H4

5

H5

6

H6

7

H7

8

H8

9

H9

MH8

X_MH

1

H1

2

H2

3

H3

4

H4

5

H5

6

H6

7

H7

8

H8

9

H9

MCH HEAT-SINK

2

U13H
X_HEATSINK_1

E31-0400710-T29

1

2

1

A A

5

4

3

2

MS-9121-0C
2002/06/06

Title
Document Number

Micro Star Restricted Secret

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Mechanical Part

Last Revision Date:

Tuesday, March 18, 2003

Sheet

1

42 52

of

Rev

00E

8

D D

INPUT 1

+3_3V

147

U25C

5 6

74HC14S

CONNECT TO CHIP POWER CONTROL PIN
CONNECT TO CHIP RSMRST# PIN

OUTPUT 1

INPUT 2

C C

POWER_GD OUTPUT CONNECT TO CPU AND CHIP
BUFFER FROM PWR_OK AND NO EFFECT BY FP_RST#

FRONT PANEL RESET BUTTON
POWER SUPPLY PWR_GD INPUT

DIMMRST_L<13,14>

PCIRST# INPUT

PCIRST# BUFFER OUTPUT

I2C BUS SLAVE DEVICE(+5V)

C154

0.1u

+1_25V

B B

A A

C171

C328

C142

+

+

1000u-6.3V

1000u-6.3V

BT_DRV CAN BE USE FOR OTHER VOLTAGE REGULATOR
WHEN DOESN'T USE DDR TERMINATION REGULATOR. THE
APPLICATION CIRCUIT IS SAME VRAM_2.5

SEL1

H

TRI-STATE

L

+

1000u-6.3V

VRAM

3.3VDUAL

3.3VSB

3.3VSTR

C533
NEAR
THE
GIGALAN

8

+2_5V

DS

+2_5V

PCIRSTPCIRST_L

R75
180

Q54

G

2N7002S

Q30

P3055-252

BT_DRV

Q31

P3055-252

VRAM_2.5

2.5V

2.5V

1.25V

7

147

U25D

9 8

147

U25E

11 10

147

U25F

13 12

+5V

Q55

E C

SMBDATA<7,8,13,14,24,25,26,27,41>

SMBCLK<7,8,13,14,24,25,26,27,41>

BT_SEN

BT_SINK

7

74HC14S

74HC14S

74HC14S

R520

1K

B

MMBT3904

PCIRST_L<19>
IDERST_L<30>

AGP_RST_L <17>

PCI32_RST_L <24,25,26,27>

PCIRST_LAN_L <46,48>

SYS_PWR_GD_3_3V<10,20>

ACPI POWER LED

12

R942

4.7K

R534

12

X_4.7K

C253

X_1000p

C318

X_1000p

Low RDS ON MOSFET

3VDUAL

C533

C422

+

+

1000u-6.3V

6

SLP_S4_J<20,28,37>
SLP_S3_J<20,28,37>

PWR_OK1<41>
FP_RST_L<38>
PW_GD_PS<37>

PLED<38>
SUSLED<38>

+5V

R528
330

SB5V

R538
10K

45N02-TO252

1000u-6.3V

6

+3_3V

+3_3V

R1632
180

R535100
R536100

+5V

SB5V

C516

0.1u

Q38

C499

0.1u

C526

+

1000u-6.3V

SB5V

R499
330

R530
180

C715

0.1u

CLOSE TO CHIP

+3_3V

S

D

123

SSS

DDD

765

SB5V

5

147

U25A

PCIRST PCIRST

SB5V

R490

R505

10K

330

R500
0
0

R506

1

DGND

2

PCIRST#/GPIOA

3

HDD_RST#/GPIOA

4

SLOT_RST#/GPIOA

5

DEV_RST#/GPIOA

6

I2C_DATA

7

I2C_CLK

8

BT_DRV

9

BT_SEN

10

BT_SINK

11

AGND0

12

SEL1

C720
1u

C712

C688

+

470u

0.1u

3VDU_DRV2

G

C470

X_0.1u

3VDU_SEN

3VDU_DRV1

48

Q41

GD

FDS4410-S-SOIC8

FOR 3VDUAL

SETTING BY

SEL1

1 2

R4930

12

12
12

TP143

48

PLED0

PLED1

PWR_OK

FP_RST#/GPIOB

PWR_OK1/GPIOC

VCC

VRAMDRV2

VRAMSEN

VRAMDRV1SSAGND1

1314151617181920212223

C7100.47u-16V

C530

X_0.1u

5

74HC14S

SB5V

3VDUAL

R478
330

TP100

SLP_S3#

RSM_RST#/GPIOB

CPU_PWGD/GPIOC

CHIP_PWGD/GPIOC

EXTRA_PWGD/GPIOC

VRAM_2.5_DEN

VRAM_2.5_DRV

5VSB

VRGOOD

TP102

R494

1k

3738394041424344454647

SLP_S5#

1.2V_SEN

24

4

DEVRST_L1 <9> DEVRST_L2 <28,32>

**S5O# pin function(Hi level = 5V)
same as 5VUSB(Hi level = 12V)

R482

10K

SB5V

R1559
X_4.7K

RSMRST_L <20>

R1560
X_10K

C103

2200p

U23

36

5V_USB

35

5VSB_DRV

34

5V_DRV

S5O#/GPIOB/SEL0
VAGP_SEN

VAGP_DRV

1.2V_DRV

TYPEDET#

AGND2

1.25VREF
9VSB

VCC3

MSI-5

C2
C1

470p

C697

R1468

1k

4

33
32
31
30
29
28
27
26
25

C182

0.1u

TP101

C666 1u-0805

C673

0.1u

CLOSE TO CHIP

C1134

470p

C676

1u

3

147

U25B

3 4

74HC14S

Low RDS ON MOSFET

1.25VREF OUTPUT

9VSB

CHARGE PUMP VOLTAGE OUTPUT

+3_3V

C657

1u-0805

D38

1N5817S

3

VDDQ_DRV

VREF1_25 <44>

AC

SB5V

C674

0.1u

Title
Document Number

2

+1_5V

S

G

Q46P3055-263

D

C641

X_1000p

+3_3V

Micro Star Restricted Secret

ACPI Circuit

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

2

2002/06/06

1

C537

C536

+

+

1000u-6.3V

1000u-6.3V

Last Revision Date:

Tuesday, March 18, 2003

Sheet

43 52

1

Rev

00E

of

3VDUAL

9VSB

VREF1_25<43>

VREF1_25

C886

0.1u

R754

124-1%

5
6

R753

24.9-1%

C517

9VSB

0.1u

U43B

+

7

-

LM324

11 4

SB1_5VSEN

G

C531

X_1000p

+

D

S

SB1_5V

C534

1000u-6.3V

Q44
NDS351AN-S-SOT23

VREF1_25<43>

VREF1_25

R731

124-1%

C916

0.1u

10

9

R722

24.9-1%

U43C

+

8

-

LM324

11 4

P1_5VSEN

G

C472

X_1000p

C519

0.1u

+3_3V

+

D

S

P3055-252

C532

1000u-6.3V

Q37

P1_5V_ICH4 <18,19>

R1469
20K

R1471
20K

C1141

4700P

C1140

12P

C1135

4.7u-0805

7

COMP

+5V

5

3

VCC

GND

BOOT
UGATE
PHASE

LGATEFB

ISL6520A

U59

L3804

1
2
8

46

1.2u

U43A

3

+

2

AC

D61

1N5817S

C1138

C1137

4.7u-0805

1u

C1139

DS

Q104

0.1u

6030L

G

DS

Q105
6030L

G

C1143
X_1000P

L3803
4u

C1142

2200U

+

1_3VSEN

C1136

+

620u

R1472

1.24KRST

R1473
2KRST

+1_3V

1.3V

1

-

LM324

11 4

+2_5V

12
13

C185

22u-1206

U43D

+

14

-

LM324

11 4

+2_5V

12

12

C223

C412

C222

22u-1206

C301

22u-1206

22u-1206

C355

12

C144

+

1000u-16V

+

1000u-16V

+

1000u-16V

PLACE THESE CAPS BETWEEN MCH AND DIMM1

C931

0.01u

C108

0.1u

C181

0.1u

C266

1u-0805

Title
Document Number

Micro Star Restricted Secret

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

System Voltage Regulators

2002/06/06

Last Revision Date:

Tuesday, March 18, 2003

Sheet

44 52

of

Rev

00E

8

7

6

5

4

3

2

1

HIP6012 FOR 26A DDR power ckt

D D

+12V

+12V

R1474

4.7/0805

C1144

C C

+5V

R1478
1K

DS

Q108

B

Q109

E C

G

2N7002S
2N3904S

+1_3V

B B

R1480

4.7K

R1475

10K

C1158

0.1u
C1160

0.01u

C1161

1u

U60

144

15K

13

OCSET

VCCCOMP

PVCC

BOOT

UGATE
PHASE

LGATE

PGND

GND

7

HIP6012

6

EN

3

SS

1

RT

5

FB

33p
R1481

+12V

AC

D62

1N5817S

C1145

1000p

2
10

9
8

12
11

R1476

C1151

0.1u

TO-263

2_5VSEN

G

G

2.2K

L3805

FDB6035AL

DS

Q106

DS

Q107

FDB7045L

1.2u

C1146

1000u

L51

C1159

10p

1.1u/30A

R1479
1KRST

R1482
1KRST

C11481uC1149

1u

C1150
1000u

C1154

1000u-16V

+2_5V

12

C1155

0.1u

C1156

0.1u

+

12

C1157

+

1000u-16V

A A

Title

HIP6302 FOR 26A DDR power ckt

Size Document Number Rev

2002/06/06 00E

B

45 52Tuesday, March 18, 2003

8

7

6

5

4

3

Date: Sheet

2

of

1

8

IDSEL: AD17
REQ: REQ0
GNT: GNT0
INT: PIRQC

D D

AD[0..31]<19,24,25,26,27,48>

VCC3_SB
CAP
CLOSE TO
EEPROM

C C

LAN1_RST_L

REQ0_J<19,22>
GNT0_J<19>

B B

3VDUAL

C1207
105P

3VDUAL

C1210

A A

105P

R1578
100

C1211
105P

+3_3V

8

PCIRST_LAN_L<43,48>

100

C1212
105P

R1576

2.7K

R1522

A C

R1577

A C

LANDISABLE1_L<20>

CBEJ[0..3]<19,24,25,26,27,48>

R1626 2.7K
R1525 8.2K

R1528

0

SMBALRT_LAN<20,48>
ICH4_SMBCLK<20,41,48>
ICH4_SMBDATA<20,41,48>

D65

1N5817S

X_0

D66

1N4148S

LAN1ENAD17

PIRQC_L<19,22>
PERR_J<19,22,24,25,26,27,48>
SERR_J<19,22,24,25,26,27,48>

REQ0_J<19,22>
GNT0_J<19>

PCI0_33MHZ_CLK<8>
LANPWROK<47>

PME_J<19,24,25,26,27,48>

SB5V

CBEJ[0..3]

+5V
+3_3V

FRAME_J<19,22,24,25,26,27,48>
IRDY_J<19,22,24,25,26,27,48>
TRDY_J<19,22,24,25,26,27,48>
DEVSEL_J<19,22,24,25,26,27,48>
STOP_J<19,22,24,25,26,27,48>
PAR<19,24,25,26,27,48>

TP6

SMBALRT_LAN
ICH4_SMBCLK
ICH4_SMBDATA

7

R1518 62K
C1204 104P

LAN1EN

LAN1_RST_L

SMBALRT_LAN
ICH4_SMBCLK
ICH4_SMBDATA

7

20mil

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBEJ0
CBEJ1
CBEJ2
CBEJ3

R1527 X_5.6K

R1530 8.2K
R1531 8.2K
R1532 8.2K

G2

N7

M7

P6
P5
N5

M5

P4
N4
P3
N3

N2
M1
M2
M3

L1

L2
K1
E3
D1
D2
D3
C1
B1
B2
B4
A5
B5
B6
C6
C7
A8
B8

M4

L3
F3
C4

F2
F1
G3
H3
H1

J1
H2

J2
A2
A4
C3

J3
C2
G1
B9
A9
A6
C5
C8

B10
A10

C9

3VDUAL

6

3VDUAL 3VDUAL3VDUAL3VDUAL

A3A7E1K3N6P2G5G6H5H6H7H8J5J6J7J8J9

U61

DVDD

DVDD

VIO

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE#0
C/BE#1
C/BE#2
C/BE#3

FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PAR
INTA#
PERR#
SERR#
IDSEL
REQ#
GNT#
M66EN
CLK
RST#
LAN_PWRGD
PME#
APM_WAKEUP
NC

SMBALRT#
SMBCLK
SMBDATA

6

VDDO

VDDO

VDDO

VDDO

VSSPP1

B3E2M6

VDDO

VSSPP2

VDDO

VSSPP3

VSSPP4

VSSPP5

N1

B7K2G14

DVDD

VSSPP6

1.5LVSB

DVDD

DVDD

VSSPL1

VSSPL2

K12

N12

DVDD

DVDD

VSSPL3

VSSPL4

P8

DVDD

DVDD

5

DVDD

2.5LVSB

5

DVDD

J10

J11K4K5K6K7K8K9

DVDD

DVDD

DVDD

DVDD

VDDO

VSS1

VSS2

VSS3

VSS4

D4D5D6D7D8

1.5LVSB

K10

K11L4L5L9L10

DVDD

DVDD

DVDD

DVDD

DVDD

DVDD

VSS5

AVDDL

VSS7

VSS8

VSS9

VSS10

D11E4E5E6E7E8E9

E12

DVDD

DVDD

DVDD

DVDD

VSS11

VSS12

VSS13

DVDD

E10

E11F4F5F6F7F8F9

4

A11

K13N8P12

G13

DVDD

VDDO

VDDO

VDDO

VDDO

82540EM

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

4

3

ZPCOMP
ZNCOMP ZPCOMP

P14

NC8

NC9

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

F10

F11G7G8G9G10

NC7

VSS27

G11H9H10

ZP_COMP

ZN_COMP

VSS28

VSS29

2.5LVSB

A14D9D10G4H4J4P1

NC4

AVDDL

DVDD

VSS31

H11L6L11

A1

NC1

NC2

LINK#

ACT#

LINK100#

MDI0+

MDI0-

MDI1+

MDI1-

FL_SO
EE_SK

EE_DO

EE_DI

FL_SI
SDP7

JTAG_TDI

SDP1
SDP0

JTAG_TDI
JTAG_TDO
JTAG_TMS

JTAG_RST#

JTAG_TCK

XTAL1

AUX_PWR

XTAL2
MDI3+

MDI3-

AVDDL

MDI2+

MDI2-

EE_CS

FL_SCK

CLK_VIEW

FL_CE#

TEST

GND

LINK1000#

GND

AVDDL

REF

CTRL25

CTRL15

VSS32

VSS33

82540

C10

1.5LVSB

3

A12
C11
B11

C13

C14

E13

E14

P9
M10
N10
P10
M11
M12
N13
P13
N14
M13
M14
L12
L13
L14
K14
J12
J13

NC

J14
H12

NC

H13
H14
G12
F12

NC

F13
F14

P7
N9

M8
M9

A13
D13
D14

NC

D12

NC

B12

C12
L7

NC

L8
B14
B13

N11

NC

P11

ZNCOMP

1LINKLED
1ACTLED
1SPEED100

1MDI0P

1MDI0N

1MDI1P

1MDI1N

1ESK
1EDO
1EDI

1MDI3P
1MDI3N

1MDI2P
1MDI2N

1ECS

1SPEED1G

R1516 33.2RST
R1517 53.6RST

1MDI0P <47>

1MDI0N <47>

1MDI1P <47>

1MDI1N <47>

R1520 3.3K

LAN1_X1

R1523 3K

LAN1_X2

1MDI3P <47>
1MDI3N <47>

1MDI2P <47>
1MDI2N <47>

R1526 3.3K

1SPEED1G <47>

2.5LVSB

R1529 2.49KST

CTRL_25 <47>

CTRL_15 <47>

Title
Document Number

2

1LINKLED <47>
1ACTLED <47>
1SPEED100 <47>

1EDO
1EDI
1ESK
1ECS

3VDUAL

2.5LVSB

1.5LVSB

2.5LVSB

3VDUAL

C1205
105P

U62

4 5

DO GND

3

DI

2

SK

1

CS

93C66

Micro Star Restricted Secret

LAN 82540 1 1/2

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

2

1

1.5LVSB <47>

2.5LVSB <47>

C1206
105P

6

ORG

7

NC

8

VCC

LAN1_X1
LAN1_X2

25MHZ

C1208
22P

Last Revision Date:

Tuesday, March 18, 2003

Sheet

46 52

1

Y1

of

3VDUAL

C1209
22P

R1519

4.7K

3VDUAL

12

Rev

0A

8

103P
C1213

R1534

D D

1MDI0P<46>
1MDI0N<46>

1MDI1P<46>
1MDI1N<46>

1MDI2P<46>
1MDI2N<46>

1MDI3P<46>
1MDI3N<46>

C C

GLED

1

73

6542

11

49.9RST

1MDI0P
1MDI0N

1MDI1P
1MDI1N

1MDI2P
1MDI2N

1MDI3P
1MDI3N

R1541

49.9RST

YLED

COMMON MODE FILTER
COMPONENT NEAR CHIP

16

8

12109

Top View

R1535

49.9RST

R1542

49.9RST

103P
C1216

7

49.9RST

49.9RST

R1536

R1543

6

DIFFERENTIAL PAIR TO

103P

PAIR MORE THAN 30

C1214

MILS

R1537

49.9RST

R1544

49.9RST

103P
C1217

2.5LVSB

C1218
105P

C1219
105P

5

1
2
3
4
5
6
7
8

9
10
11
12 13

C1220
105P

TF1

TCT1
TD1+
TD1­TCT2
TD2+
TD2­TCT3
TD3+
TD3­TCT4
TD4+
TD4- MX4-

H5007

MCT1
MX1+

MX1­MCT2
MX2+

MX2­MCT3
MX3+

MX3­MCT4
MX4+

24
23
22
21
20
19
18
17
16
15
14

L05-0500080-P21

L1CGND

C1224
103P

103PC1215

2T0P
2T0N

2T1P
2T1N

2T2P
2T2N

2T3P
2T3N

L1GND

C1225
103P

4

R1545
75

C1226
103P

R1546
75

C1227
103P

R1547
75

C1228
X_103P

R1548
75

2T0P
2T0N
2T1P
2T2P
2T2N
2T1N
2T3P
2T3N

L1CGND

3

+5V

3VDUAL

R1562
1K

15

1
2
3
4
5
6
7
8 9

16

L1CGND

103P
C1223

3VDUAL

LAN1

RJ45/LEDx2

R1565
10K

2

1ACTLEDCAP

12
11

10

R1533 300

CAP

1ACTLED

1LINKLED

R1538 300
R1539 300

1SPEED100
1SPEED1G

1ACTLEDCAP 1LINKLED

C1221
X_102p

1

1ACTLED <46>
1LINKLED <46>

3VDUAL

1SPEED100 <46>
1SPEED1G <46>

C1222
X_102p

FOR
EMI

1SPEED100 1SPEED1G

C1229
X_102p

3VDUAL

JACT1
YJ102

1

2

R1561

300

C1230
X_102p

3VDUAL

R1551 1/1206

B B

R1552

5.1K

CTRL_25<46>

A A

8

CTRL_25

2.5LVSB<46>

12

+

C1252
47U/16V/S

1

C1236
106P/1206

32

4

PNP-BCP69-S-SOT223

VR3

C1237
104P

7

C1231
104P

2.5LVSB

C1238
105P

C1239
105P

R1553

5.1K

CTRL_15<46>

6

CTRL_15

C1243
106P/1206

1

R1556

30.1KST

5

32

PNP-BCP69-S-SOT223

4

C1233

106P/1206

VR4

C1244
106P/1206

3VDUAL3VDUAL

1.5LVSB

C1240
105P

C1232
105P

C1241
105P

1.5LVSB

C1245
106P/1206

C1242
105P

4

1ACTLED

C1246
105P

R1564 330

1.5LVSB <46>

12

+

C1253
47U/16V/S

C1247
105P/0603

Q113

2

2N3904S

C1248
105P/0805

1.5LVSB

3

2

2N3904S

1 3

R1593 X_0

Q112

R1554

47K

1 3

R1555
X_680

Q111

2

2N3904S
C1235

105P

3VDUAL

1 3

R1549
10K

Q110

2

2N3904S

3VDUAL

1 3

R1550
10K

LANPWROK

C1234
104P

LANPWROK <46>

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

2

LAN 82540 1 - 2/2

Last Revision Date:

Tuesday, March 18, 2003

Sheet

47 52

Rev

0A

of

1

8

IDSEL: AD18
REQ: REQ1
GNT: GNT1
INT: PIRQD

D D

AD[0..31]<19,24,25,26,27,46>

3VDUAL

C1262

C1263

R1595

SMBALRT_LAN<20,46>

ICH4_SMBCLK<20,41,46>

105P

2.7K

LANDISABLE2_L<20>

CBEJ[0..3]<19,24,25,26,27,46>

3VDUAL

C1264
105P

D68

A C

1N5817S

R1597

D69

A C

1N4148S

GNT1_J<19>

3VDUAL

PCI1_33MHZ_CLK<8>

C1261

105P

105P

PCIRST_LAN_L<43,46>

+3_3V

C C

LAN2_RST_L

R1598
100

AD18 LAN2EN

REQ1_J
GNT1_J

B B

A A

AD22
INT#[H]
REQ#/GNT#[3]

3VDUAL

R1623

100

R1624 2.7K

R1601 8.2K

R1604 8.2K

ICH4_SMBDATA<20,41,46>

8

7

SB5V

C1265

C1266

105P

105P

X_0

+5V
+3_3V

FRAME_J<19,22,24,25,26,27,46>

IRDY_J<19,22,24,25,26,27,46>

TRDY_J<19,22,24,25,26,27,46>

DEVSEL_J<19,22,24,25,26,27,46>

STOP_J<19,22,24,25,26,27,46>

PAR<19,24,25,26,27,46>

PIRQD_L<19,22>

PERR_J<19,22,24,25,26,27,46>
SERR_J<19,22,24,25,26,27,46>

REQ1_J<19,22>

PME_J<19,24,25,26,27,46>

TP131

R1608 X_8.2K
R1609 8.2K
R1610 8.2K

R1611 0
R1612 X_0
R1613 X_0

7

20mil

R1594 62K

C1258 104P

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBEJ0
CBEJ1
CBEJ2
CBEJ3

LAN2EN

R1603 62K

LAN2_RST_L

R1605 5.6K

B10
A10

G2

N7

M7

P6
P5
N5

M5

P4
N4
P3
N3

N2
M1
M2
M3

L1

L2
K1
E3
D1
D2
D3
C1
B1
B2
B4
A5
B5
B6
C6
C7
A8
B8

M4

L3
F3
C4

F2
F1
G3
H3
H1

J1
H2

J2
A2
A4
C3

J3
C2
G1
B9
A9
A6
C5
C8

C9

6

3VDUAL

A3A7E1K3N6P2G5G6H5H6H7H8J5J6J7J8J9

U63

VIO

VCCPP1

VCCPP2

VCCPP3

VCCPP4

VCCPP5

VCCPP6

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE#0
C/BE#1
C/BE#2
C/BE#3

FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PAR
INTA#
PERR#
SERR#
IDSEL
REQ#
GNT#
RST#
CLK
ISOLATE#
ALRST#
PME#
CSTSCHG/WOL
CLKRUN#

SMBALRT#
SMBCLK
SMBDATA

VSSPP1

VSSPP2

VSSPP3

VSSPP4

VSSPP5

B3E2M6

N1

B7K2G14

6

VCC1

VCC2

VSSPP6

VCC3

VCC4

VSSPL1

3VSB_LAN2

VCC5

VCC6

VCC7

VSSPL2

VSSPL3

VSSPL4

K12

N12

P8

VCC8

VCC9

5

VCC10

VCC11

5

J10

J11K4K5K6K7K8K9

VCC12

VCC13

VCC14

VCC15

VCC16

VSS1

VSS2

VSS3

VSS4

D4D5D6D7D8

3VDUAL

K10

K11L4L5L9L10

VCC17

VCC18

VCC19

VCC20

VCC21

VCC22

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10

D11E4E5E6E7E8E9

E12

VCC23

VCC24

VCC25

VCC26

VSS11

VSS12

VSS13

VSS14

E10

E11F4F5F6F7F8F9

4

A11

VCCPT

VSS15

VSS16

4

K13N8P12

VCCPL1

VCCPL2

VSS17

VSS18

G13

VCCPL3

VCCPL4

VSS19

VSS20

F10

P14

VSS21

VSS22

VSS23

VSS24

F11G7G8G9G10

NC8

NC9

VSS25

VSS26

NC7

VSS27

G11H9H10

NC5

NC6

VSS28

VSS29

3

A1

A14D9D10G4H4J4P1

NC1

NC2

NC3

NC4

LINKLED

ACTLED

SPEEDLED

TDP

TDN

RDP

RDN

FLA16/CLK25

FLA15/EESK
FLA14/EEDO

FLA13/EEDI

FLA12/MCNTSM#

FLA11/MINT

FLA10/MRING#

FLA9/MRST

FLA8/IOCHRDY

FLA7/CLKEN

FLA6
FLA5
FLA4
FLA3
FLA2

FLA1/AUXPWR

FLA0/PCIMODE#

FLD7
FLD6
FLD5
FLD4
FLD3
FLD2
FLD1
FLD0

EECS

FLCS#/AEN

FLOE#

FLWE#

TEST

TEXEC

TCK

VREF

MDMCS/CFCS

NC/CFCLK

RBIAS10

RBIAS100

VSS30

VSS31

VSS32

VSS33

82551

H11L6L11

C10

3

2

3VDUAL

CB1

CB2

CB3

105P

105P

105P

2LINKLED

A12

2ACTLEDAD[0..31]

C11

2SPEEDLED

B11

2TDP

C13

2TDN

C14

2RDP

E13

2RDN

E14

P9
M10
N10
P10
M11
M12
N13
P13
N14
M13
M14
L12
L13
L14
K14
J12
J13
J14
H12
H13
H14
G12
F12
F13
F14

P7
N9

M8
M9

A13
D13
D14
D12

TI

B12

TO

C12
L7

L8
B14
B13

LAN2_X1

N11

X1
X2

P11

LAN2_X2

2LINKLED <49>
2ACTLED <49>
2SPEEDLED <49>

2TDP <49>

2TDN <49>

2RDP <49>

2RDN <49>

3VDUAL

R1602 150

R1606 549RST
R1607 619RST

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Micro Star Restricted Secret

2

3VDUAL

C1259
105P

1.trace/space
8/8/8 mil

2.Only TOP or
BOTTOM

等長並對稱

3.

4.

兩對之間距

3VSB_LAN2

U64

4 5

DO GND

3

DI

2

SK

1

CS

93C46

LAN2_X1
LAN2_X2

LAN 82550 2 1/2

Last Revision Date:

Tuesday, March 18, 2003

Sheet

C1260
105P

3VDUAL

ORG

NC

VCC

1

+

EC22
10U/16V/S

30mil

R1596

15

104P
C1267

6
7
8

Y5

12

25MHZ

C1268
22P

48 52

of

1

3VDUAL

3VDUAL

R1599

4.7K

C1269
22P

Rev

100

8

D D

2TDP<48>

2TDN<48>

2RDP<48>

C C

2RDN<48>

7

R1614
100RST

R1617
120RST

6

1
2
3

6
8
7

C1270
5P

12

C1271
22P

12

1

TF2

TD+
TDC
TD-

RD+
RD­RDC

5

TX+

CMT

TX-

RX+

RX-

RXC

4

16
15
14

11
9
10

123456

78

RN104
8P4R-75

LAN2

15

1
2
3
4
5
6
7
8 9

16

RJ45/LEDx2

3

12

2LINKLED

2SPEEDLED

R1615 300
R1616 300

11
10

2

2ACTLED

3VDUAL

2ACTLED <48>
2LINKLED <48>

2SPEEDLED <48>

1

Place registers as
close to chip as
possiable

靠近

chip

3VDUAL

B B

2N3904S

6

Q116

2

1 3

R1622 X_0

2ACTLED

A A

8

7

R1621 330

R1619
1K

Q115

2

2N3904S

3VDUAL

R1620
10K

COMBINE TO JACT1

1 3

5

JACT2
YJ102

1

2

FGND

Top View

YELLOW

GREEN

3VDUAL

4

103PC1403

R1618

300

16

12

8

7311

6

5

4

10

2

1

9+-

15

RJ45

50 MIL
GROUND
TRACE

+

-

Title
Document Number

3

Micro Star Restricted Secret

LAN 82550 2 2/2

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

2

Last Revision Date:

Tuesday, March 18, 2003

Sheet

49 52

1

Rev

100

of

5

D D

4

3

2

1

CPU1 CPU2

DDRCHA DDRCHB

1,3 2,4

CPU CLK1 CPU CLK2

133/100 133/100

C C

133/100

14.318MHZ

133/100

MCH

B B

MCH CLK

66

133/100

CLOCK GEN

66
48
33
14

ICH4

33

66

48 33

FWH

PCICLK 1~4

AGP8X

SIO

PCI 1~4

A A

Title

<Title>

Size Document Number Rev

<Doc> <RevCode>

B

50 52Tuesday, March 18, 2003

5

4

3

2

Date: Sheet

1

of

5

General SPEC

4

3

2

1

ICH4

GPIO Pin

GPIO 0

D D

GPIO 1

Type

GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12

C C

GPIO 13
GPIO 14~15
GPIO 16
GPIO 17
GPIO 18*
GPIO 19
GPIO 20
GPIO 21
GPIO 22
GPIO 23
GPIO 24
GPIO 25

B B

GPIO 26
GPIO 27
GPIO 28

I/O

I/O
I/O

I/O
GPIO 29~31
GPIO 32
GPIO 33
GPIO 34
GPIO 35
GPIO 36
GPIO 37
GPIO 38
GPIO 39

A A

GPIO 40
GPIO 41
GPIO 42
GPIO 43
GPIO 44~47

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

Function

HM_SMI_L(multifunction pin)PULL 3.3V THROUGH 8.2K(UNUSED)

I

REQ5_J(multifunction pin)PULL 5V THROUGH 2.7K(UNUSED)

I

Pull up 5V through 2.7K ohms (PIRQE#)

I

Pull up 5V through 2.7K ohms (PIRQF#)

I

Pull up 5V through 2.7K ohms (PIRQG#)

I

Pull up 5V through 2.7K ohms (PIRQH#)

I
I

SIO_SMI_J PULL UP 3.3V THROUGH 4.7K
FALCON_SMI_L PULL UP 3.3V THROUGH 10K(UNUSED)

I

SIO_WAKE_L PULL UP 3VDUAL THROUGH 4.7K

I

Not Implemented

I
I

Not Implemented
SMB_ALERT_CPU_L PULL UP 3VDUAL THROUGH 1K

I

PULL UP 3VDUAL THROUGH 8.2K(UNUSED)

I

PULL UP 3VDUAL THROUGH 8.2K(UNUSED)

I
I

Not Implemented
No Connected

O

GNT5_J(multifunction pin)

O
O

No Connected
CPU_SM_WP

O

LANDISABLE1_L

O

No Connected

O

No Connected

OD
O

LANDISABLE2_L
No Connected
No ConnectedI/O
Not Implemented
No Connected
No Connected
Not Implemented

O

No Connected
No Connected
CONFIG1
No Connected
No Connected
CONFIG0
No Connected
No Connected
No Connected
AGP_PRNT_1
AGP_PRNT_2
No Connected
Not Implemented

5

4

FWH

GPIO Pin

GPI 0
GPI 1
GPI 2
GPI 3
GPI 4

Type

Function

I

Connect to SD_DET
Connect to PD_DET

I
I

Pull down through 8.2K ohms (unused)
Pull down through 8.2K ohms (unused)

I

Pull down through 8.2K ohms (unused)

I

PCI Config.

DEVICE

GIGALAN

10/100 LAN

PCI1

PCI2

PCI3

PCI4

* GPIO18 will toggle at 1Hz fr eq uenc y.

3

ICH INT Pin

INTC#

INTD#

INT

F#G#H#E#

INT

G#H#E#F

INT

H#E#F#G

INT

E#F#G#H

IDSEL

AD17

AD18

AD19

AD20

AD21

AD22

CLOCK

PCICLK0

PCICLK1

PCICLK2

PCICLK3

PCICLK4

PCICLK5 5

2

R&G

0

1

2

3

4

Title

<Title>

Size Document Number Rev

<Doc> <RevCode>

B

51 52Tuesday, March 18, 2003

Date: Sheet

1

of

5

4

3

2

1

D D

JGL1(1-2)

X_JC-D2-GN

J10_X

X_JC-D2-GN

NMIclock

JBAT1(1-2)

JC-D2-GN

J11(1-2)

X_JC-D2-GN

opal/colossus

JFP3(4-6)

JC-D2-GN

CPU1_X

RETENSION

J14(2-3)

JC-D2-GN

BIOS boot block

J16(2-3)

JC-D2-GN

buzzer

CPU2_X

RETENSION

J7_X

X_JC-D2-GN

SCSI back plane

J12(1-2)

JC-D2-GN

configurebattery

CPU-B1

J5_X

X_JC-D2-GN

CPU-B2

buzzer

C C

CPU BACK PLATE

Short-pin

SST-4M-PLCC32

U32_1

Battery

B B

PCB
9141PCB

BAT1_X1
BAT-B-CR2032-P-3V-220mAh

512KB
FlashromBattery

N16:

南亞

T53:

建鼎

C48:

祥裕

A A

Title

Size Document Number Rev

5

4

3

Date: Sheet

Manual Part

2002/06/06 00C

A

52 52Tuesday, March 18, 2003

2

of

1