MSI MS-9154 Schematics

A B C

REV

D

REVISIONS

DESCRIPTIONECO DATE

APPROVED

1

Planar

CPU1

Serial Port

USB 2.0

CPU0

PWB PN: D1656 PWA PN: H1754

(2)

(Nocona/

Jayhawk)

System

Kbd/Mse

H D

2

M

FLOPPY

USB

C

o

IDE

n n

VIDEO

87373

CPLD

LPC Bus

ICH5

Video

DVI

Hublink 1.5

PCI 33MHz

USB

(6.4GB/s, 6.4GB/s)

800 MHz

Lindenhurst

MCH

A

C

s

/ B

G

4

ESM 4G RAC

LPC

Smart

3

VU

Firmware

Hub

ESM BMC

ATI

Video

(RADEON)

Connector

PCI 33MHz

, X

8 X

e

I C P

PCIeX 8X, 4GB/s

(Nocona/

Jayhawk)

1U/2U/5U

DDR2 400 Ch. A (6.4Gb/s)

B-

hi

lo

PCIeX 4X

PCIeX 4X, 2GB/s

PCI 33MHz

2GB/s

V1.8 - 5/22/03

DDR2 400 Ch. B (6.4GB/s)

32/66MHz

PXH

32/66MHz

D

I

M

3

2

A

TABOR

D

I M M

1 A

D

I

M

3

2

1

B

Gbit Port 1#

IPMB

HS3 Connector

PCI Microchannel

TABLE OF CONTENTS

Page 1. Page 2. Page 3. Page 4. Page 5. Page 6. Page 7. Page 8. Page 9. Page 10. Page 11. Page 12. Page 13. Page 14. Page 15. Page 16. Page 17. Page 18. Page 19. Page 20. Page 21. Page 22. Page 23. Page 24. Page 25. Page 26. Page 27. Page 28. Page 29. Page 30. Page 31. Page 32. Page 33. Page 34. Page 35. Page 36. Page 37. Page 38. Page 39. Page 40. Page 41. Page 42. Page 43. Page 44. Page 45. Page 46. Page 47. Page 48. Page 49. Page 50. Page 51. Page 52. Page 53. Page 54. Page 55. FWH Page 56. Page 57. Page 58. Page 59.

BLOCK DIAGRAM CLOCK DIAGRAM Clock Synth. Differential Buffer DB800 System CPLD Voltage Regulators VRD VRD VRD

---blank--Processors Processors Processors

---blank--ITP 32 & Level Translation Circuits MCH, memory MCH, GTL, Exp, Hub-link MCH, power Decoupling Caps DDR2 DDR2 DDR2, routing diagram DDR2, VRef Gigabit Ethernet Gigabit Ethernet Gigabit Ethernet PXH PXH PXH PXH Connectors Connectors ICH5 ICH5 Keyboard, Mouse, COM Ports, I2C MUX/Table Radeon Video Radeon Video Radeon Video Radeon Video Super I/O, 373 Battery / Intrusion Detect / RAID Key / VAux Pwrgood Fans and fan LED's Parallel Port / ID Button / Rear Cyclops / Speaker BMC BMC BMC BMC BMC, Serial Port Muxing BMC - Serial Port MUXing Diagram RAC

1.2V Vtt generation Fan PWM Controllers MicroVu VAux reset

USB / Buttons Spares / Coupons / Hardware PCI bus p/u's / PCI Debug Slot Debug Features

1

2

3

1U PWA assembly

2U/5U PWA assembly

4

EXPORT RESTRICTION:

THE EXPORT OF THE INFORMATION, SCHEMATICS AND OTHER TECHNICAL DATA CONTAINED IN THIS DOCUMENT IS CONTROLLED BY THE U.S. GOVERNMENT. THE EXPORT, DEEMED EXPORT OR OTHER TRANSFER OF THIS DATA TO CERTAIN COUNTRIES AND INDIVIDUALS IS RESTRICTED. ANY TRANSFER, EXPORT OR REEXPORT, MUST BE IN COMPLIANCE WITH THE U.S. EXPORT ADMINISTRATION REGULATIONS.

P# F1667 P# H1754

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP., EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

DRAWN DESIGNED CHECKED APPROVED APPROVED APPROVED APPROVED RELEASED

Uniplanar Team:

-Shawn Dube

-Jinsaku Masuyama

-Garnett Thompson

-TJ Thompson

XLBOM Build option table

0 Production Build 9 Prototype Build

A CURRENT ISSUE OF THIS DRAWING MUST INCLUDE A COPY OF THE FOLLOWING ECO'S: ECO

ECO ECO ECO ECO ECO ECO ECO

TITLE

DATE DATE DATE DATE DATE DATE DATE DATE

COMPUTER CORPORATION AUSTIN,TEXAS

LINDY PLANAR

DWG NO.

D1660 X03

DATE

1/13/2004 1 OF 61

SHEET

4

REV.

DCBA

B D

CA

CLOCK DISTRIBUTION

BLOCK DIAGRAM

1-21-2004_9:57

1

2

1

2

3

4 4

USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH

OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE

AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE

AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL

REV.

X03

A B

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

COMPUTER CORPORATION AUSTIN,TEXAS

SHEET

2 OF 611/13/2004

3

B D

V_3P3_CLK

3

21

4.7K

R1476

R1477

R1420

21

ICH_SEG2_SDA

4,35

1

+3.3V

1 2

C1093

L103

BLM18BD601SN1

L105

BLM18BD601SN1

0.1uF 16V

21

1 2

C1094

0.1uF 16V

21

C1209

1 2

C1103

10uF 6.3V

1 2

C1102

0.1uF 16V

C1101

0.1uF 16V

1 2

0.1uF 16V

1 2

C1100

1 2

C1104

0.1uF 16V

1 2

C1099

1 2

C1098

0.1uF 16V

1 2

C1096

V_3P3_CLK

1 2

C1097

0.1uF 16V

3

0.1uF 16V

4,35

ICH_SEG2_SCL

0-5%

R1421

1 2

0-5%

ICH_SEG2_409_SDA

ICH_SEG2_409_SCL

NP*

1 2

4.7K

NP*

CA

1-21-2004_9:57

ECAD Note:

3

VCC routing should be from plane, through high-f cap, to pin

1

x00_tj_050503

+3.3V

C1105

21

10uF 6.3V

SUB*_U1084

300OHM, 300 mA

1 2

0.1uF 16V

L129

1 2

ILB_1206

1 2

C1092

V_3P3_CLK_VDD48

PROPAGATION_DELAY=L:S::1000 NET_PHYSICAL_TYPE=50MIL

1 2

C758

0.1uF 16V

V_3P3_CLK_VDDA

10uF 6.3V

x02_sd

R46

4.7K

1 2

PROPAGATION_DELAY=L:S::1000 NET_PHYSICAL_TYPE=50MIL

U1084 300 ohm, 25%, 300mA, 1206

Vishay ILB1206RK301V KOA CZB2BFL-301P

21

C757

x03_tj_121503

2.2-5%

0.1uF 16V

R606

V_3P3_CLK

3

21

C756

C759

0.1uF 16V

2

X10

1 2

14.31818MHz

R947

NP

2 1

1M-5%

50V-10%

2 1

27pF

C1090

May need to tune caps during UT

50V-10%

27pF

12

C1091

CK_FSA

5

CK_FSB

5

R1419

0-5%

R1022

1 2

0-5%

21

R1002

5,59

4,5,59

12

475-1%

IREF = 2.32mA

CK_VTT_PWRGD_N CK_PWRDWN_N

21

C1326

3

Spread spectrum Controlled through I2C

21

4.7K

R1008

0.1uF 16V

NP*

x00_tj_051203

4.7K

R1018

1 2

NP*

21

R1007

21

C777

1 2

C778

4.7K

R1475

1 2

C779

ICH_SEG2_409_SDA

3

ICH_SEG2_409_SCL

3

1K-1%

1000pF

50V-10%

PART_NUMBER=79015

21

1 2

C780

1000pF

50V-10%

PART_NUMBER=79015

CK_XTAL_IN CK_XTAL_OUT

CK_FSA_R CK_FSB_R CK_IREF

3

VDD_REF

10

VDD_PCI_1

16

VDD_PCI_2

24

VDD_3V66

55

VDD_ANLG

34

VDD_48MHZ

42

VDD_CPU_1

48

VDD_CPU_2

36

VDD_SRC

4

XTALIN

5

XTALOUT

51

FS_A

56

FS_B

52

IREF

35

VTT_PWRGD

21

PWR_DOWN

30

SDATA

28

SCLK

6

GND_REF

11

GND_PCI_1

17

GND_PCI_2

25

GND_3V66

39

GND_SRC

33

GND_48MHZ

53

GND_IREF

45

GND_CPU

54

GND_ANLG

CK409B for Proto builds

x00_tj_052003

CK409B

3V66_4/VCH

CK409 - TSSOP56

SMBus address = D2h

All clk _R nets have a hidden prop-delay max of 500mil

1

CK_14M_ICHS_R

REF0

2

CK_14M_SIO_R

REF1

7

PCI0 PCI1 PCI2 PCI3 PCI4 PCI5 PCI6

USB DOT

SRC_P SRC_N

CK_33M_ICHS_R

8

CK_33M_SIO_R

9

CK_33M_FWH_R

12

CK_33M_SLOT3_R

13

CK_33M_PCI0_DEBUG_R

14

CK_33M_BMC_R

15

CK_33M_CPLD_R

18

CK_33M_DBG_LPC_R

19

CK_33M_VIDEO_R

20

CK_33M_RAC_R

31

CK_48M_USB_ICHS_R

32

CK_48M_SIO_R

CK_100M_DB800_P_R

38 37

CK_100M_DB800_N_R

22

CK_66M_MCH_R

23

CK_66M_ICH_R

26

CK_66M_3V66_2

27

CK_66M_LAI_R

29

41

CK_167M_CPU1_P_R

40

CK_167M_CPU1_N_R

44

CK_167M_CPU2_P_R

43

CK_167M_CPU2_N_R

47

CK_167M_MCH_P_R

46

CK_167M_MCH_N_R

50

CK_167M_ITP_P_R

49

CK_167M_ITP_N_R

PCI_F0 PCI_F1 PCI_F2

3V66_0 3V66_1 3V66_2 3V66_3

CPU_P0 CPU_N0 CPU_P1 CPU_N1 CPU_P2 CPU_N2 CPU_P3 CPU_N3

SUB=SUB23_U1438

R1017

1K-1%

21

R1417

1 2

1K-1%

R956

1 2

33-5%

R957

1 2

33-5%

R1361

1 2

33-5%

R1473

1 2

CK_14M_ICHS

CK_14M_SIO

NC_CK_48M_SIO

R962

NP*

21

33-5%

R963

21

33-5%

R593

21

1K-1%

+3.3V

CK-409 support Place close to ICH

4.7K

R1474

Pop 33ohm, 49.9ohm if CK409B used

POP0121POP01

CPU_STOP#

PCI_STOP#

Populate with CK409B (ITP diferential pair)

Differential pair routing guideline:

6 mil traces / 14 mil spacing

Spacing to other traces: 5W

33

40

33-5%

R142921R1712

1 2

49.9-1%

NP01

R959

21

49.9-1%

R950

33-5%

CK_100M_DB800_P CK_100M_DB800_N

R961

33-5%

R965

33-5%

R966

33-5%

R967

33-5%

R951

NP01

33-5%

21

CK_48M_USB_ICHS

R960

21

33-5%

21

R952

21

33-5%

21

R968

21

33-5%

21

R969

21

33-5%

21

R1036

21

4 4

49.9-1% 21

R1037

33

21

R1039

49.9-1%

NP01

49.9-1%

21

R1035

21

R1033

21

R1038

49.9-1%

R1034

1 2

49.9-1%

NP01

49.9-1%

21

R1040

49.9-1%

R964

33-5%

R955

33-5%

R954

33-5%

R1362

1 2

33-5%

R949

33-5%

R1416

1K-1% R1363

33-5%

R1364

1 2

33-5%

R1366

33-5%

R1367

1 2

33-5%

R38

33-5%

21

NP*

21

CK_33M_ICHS

CK_33M_SIO

CK_33M_FWH

CK_33M_SLOT1

CK_33M_PCI0_DEBUG

CK_33M_BMC

CK_33M_CPLD

CK_33M_SMARTVU

CK_33M_VIDEO

CK_33M_RAC

CK_66M_MCH

CK_66M_ICH

CK_167M_CPU1_P

CK_167M_CPU1_N

CK_167M_CPU2_P

CK_167M_CPU2_N

CK_167M_MCH_P

CK_167M_MCH_N

CK_167M_ITP_P

CK_167M_ITP_N

33

40

55

31

58

44

5,59

To CPLD and Mictor header

59

36

50

17

33

11

17

15

x00_tj_051503

CK409B / CK409 Operation

FSA

0

1

4 4

Freq. latched on VTT_PWRGD

FSB SPEEDFSB

0

100 MHz 200 MHz

10

133 MHz

0

11

166 MHz

ROOM=CLOCK1

2

3

subsys done

A B

Clock CK409B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

3 OF 611/13/2004

X03

B D

CA

1-21-2004_9:57

1

ICH_SEG2_SDA

3,35

ICH_SEG2_SCL

3,35

L108

+3.3V

C1114

1 2

BLM18BD601SN1

L107

BLM18BD601SN1

0.1uF 16V

21

1 2

C1111

0.1uF 16V

21

C1210

C1110

10uF 6.3V

1 2

0.1uF 16V

1 2

C1109

1 2

C1108

0.1uF 16V

1 2

C1112

0.1uF 16V

C1113

0.1uF 16V

2

R996

R591

1 2

8.2K-5%

x00_tj_051203

21

10K-1%

21

R590

8.2K-5%

R999

1 2

8.2K-5%

R998

10K-1%

1 2

0.1uF 16V

NP*

10K-1%

C1327

21

R997

21

NP

R1480

10K-1%

1 2

3,5,59

3 3

4

4.7K

4

4,31 4,31

x00_sd_051703

CK_100M_DB800_N CK_100M_DB800_P

ICH_SEG2_800_SCL ICH_SEG2_800_SDA

SRC_BYPASS/PLL SRC_PLL_LOW_BW

SRC_STOP_N SRC_DIV2_N

CK_PWRDWN_N

NC_SRC_LOCK

DB800_OE0

4

DB800_OE4

4

DB800_OE5

4

SLOT7_PWRGD SLOT6_PWRGD

5

SRC_IN

4

SRC_IN

23

SCLK

24

SDATA

22

BYPASS/PLL

28

PLL_BW

27

SRC_STOP

1

SRC_DIV2

26

PWRDWN

45

LOCK

6

OE_0

14

OE_1

15

OE_2

7

OE_3

43

OE_4

35

OE_5

36

OE_6

44

OE_7

3

GND_3

10

GND_10

18

GND_18

25

GND_25

32

GND_32

40

GND_40

47

GNDA

SMBus address = DCh

V_3P3_SRC

4

V_3P3_SRC

4

21

R592

V_3P3_SRC

4

21

3

DB800_OE0

4

DB800_OE4

4

DB800_OE5

4

SLOT7_PWRGD

4,31

SLOT6_PWRGD

4,31

x00_sd_051703

NP

R111

R100

1 2

R112

8.2K-5%

NP

21

R101

1K-1%

R113

1 2

8.2K-5%

NP

R103

1K-1%

1 2

21

R114

8.2K-5%

NP

21

R105

1K-1%

R115

1 2

8.2K-5%

NP

R107

1K-1%

1 2

8.2K-5%1K-1%

R1423

0-5%

R1422

1 2

0-5%

21

1 2

C786

C784

1000pF

50V-10%

0.1uF 16V

PART_NUMBER=79015

x00_tj_051203

DB800

ICS9DB108

PROPAGATION_DELAY=L:S::500 NET_PHYSICAL_TYPE=50MIL

V_3P3_SRC

4

21

ICH_SEG2_800_SDA

ICH_SEG2_800_SCL

1 2

1000pF

50V-10%

PART_NUMBER=79015

8

DIF_0

9

DIF_0

12

DIF_1

13

DIF_1

16

DIF_2

17

DIF_2

20

DIF_3

21

DIF_3

30

DIF_4

29

DIF_4

34

DIF_5

33

DIF_5

38

DIF_6

37

DIF_6

42

DIF_7

41

DIF_7

46

IREF

2

VDD_2

11

VDD_11

19

VDD_19

31

VDD_31

39

VDD_39

48

VDDA

21

4.7K

R1479

R1478

1 2

NP*

Note: If clock ordering changes, BIOS requirements must change

V_3P3_SRC

CK_100M_SATA_P_R CK_100M_SATA_N_R

CK_100M_MCH_P_R CK_100M_MCH_N_R

CK_100M_PXH_PLANAR_P_R CK_100M_PXH_PLANAR_N_R

CK_100M_DOBSON_P_R CK_100M_DOBSON_N_R

CK_100M_PXH_P_R CK_100M_PXH_N_R

CK_100M_EXP_LAI_P_R CK_100M_EXP_LAI_N_R

CK_100M_SLOT1_P_R CK_100M_SLOT1_N_R

CK_100M_SLOT2_P_R CK_100M_SLOT2_N_R

DB800_VDDA

R1003

1 2

475-1%

V_3P3_SRC

10uF 6.3V

C1202

21

4

x00_tj_050103

SUB*_U1084

0.1uF 16V

300OHM, 300 mA

C1107

12

4

L130

1 2

ILB_1206

IREF = 2.32mA

+3.3V

0.1uF 16V

12

NP

1 2

33-5%

1 2

33-5%

1 2

33-5%

1 2

33-5%

C1106

R976

33-5%

R977

R980

R975

R973

33-5%

R971

33-5%

R1368

R1370

NP

21

R978

1 2

33-5%

R979

1 2

33-5%

R981

1 2

33-5%

R974

1 2

33-5%

R972

1 2

33-5%

R970

1 2

33-5%

R1369

33-5%

R1371

33-5%

CK_100M_SATA_P

CK_100M_SATA_N

CK_100M_MCH_P

CK_100M_MCH_N

CK_100M_PXH_PLANAR_P

CK_100M_PXH_PLANAR_N CK_100M_DOBSON_P

CK_100M_DOBSON_N

CK_100M_PXH_P

CK_100M_PXH_N

CK_100M_EXP_SPARE_P

CK_100M_EXP_SPARE_N

21

R1432

49.9-1%

R1431

49.9-1%

CK_100M_SLOT7_P

CK_100M_SLOT7_N

CK_100M_SLOT6_P

CK_100M_SLOT6_N

21

49.9-1%

21

R1051

1 2

49.9-1%

R1052

1 2

R1050

1 2

49.9-1%

R1049

1 2

R1048

1 2

49.9-1%

R1047

1 2

R1046

1 2

49.9-1%

R1045

49.9-1%

1 2

R1044

1 2

49.9-1%

R1042

49.9-1%

R1043

1 2

49.9-1%

1 2

49.9-1%

R1041

1 2

49.9-1%

R1434

49.9-1% 21

R1433

33

17

27

31

1

2

3

U1084 300 ohm, 25%, 300mA, 1206

Vishay ILB1206RK301V

SATAOE0 OE1 MCH OE2

Planar PXH OE3

Dobson OE4

4 4

PXH OE5

LAI OE6

Slot1 ***Note--BIOS should disable for 2U OE7

Slot2

1U Prod 2U/5U Prod 1U Proto 2U/5U Proto

X X X X X X X X

X X X X

X X

XXXX

***Note--BIOS should disable for 2U

subsys done

A B

KOA CZB2BFL-301P

ROOM=CLOCK2

DB800 Differential buffer

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

4 OF 611/13/2004

X03

B D

todo check ich_pme will be driven or floated high in time

CA

1-21-2004_9:57

1 2

21

R1769

NP13

R1770

NP02

U64

7,8,59

5

OUTIN

NCEN

x02_sd

R6006

1 2

33-5% R6007

21

33-5%

21

C559

1000pF

PART_NUMBER=79015

ICH_THRMTRIP

NET_PHYSICAL_TYPE=PWR

+1.8V_AUX

51

0.1uF 16V

43

21

PFAULT_LATCH_N

PFAULT_RESET

+3.3V_AUX

U38

1142

R575

1 2

100-1%

50V-10%

R92

1 2

2.7K-5%

10V-10%

C1624

C1625

1uF

21

44,46

5

+3.3V_AUX

U38

CK_CPLD

3144

BUF_CK_CPLD

VHC14VHC14

5

RC = 0.1 us

F = 2.0MHz

8

RN87

1

1 2

2.7K-5%

1 2

2.7K-5%

567

4.7K

432

CPLD_DDR2_RESET

5,59

Q104

3904

ICH_THRMTRIP_N

3

1

33

2

CPLD_H_VID_PWRGOOD_N

5,59

todo....need to check that 3904 has drive strength and gain

CPLD_H_FORCEPR

5

+3.3V_AUX

0.1uF 16V C1626

21

x00_tj_042803

H2_CPU_PRES_N

5,12,46

H1_CPU_PRES_N

5,12,46

H2_VTT_EN

5,12

H1_VTT_EN

5,12

ROOM=SYSCPLD

R1439

R1438

R426

5,32,46

Q66

3904

1

R583

2.7K-5%

Q65

3904

1

21

Q84

3904

1

BACKPLANE_PRES_N RISER_PRES_N

5,31

todo, consider slew rate limiting

+1.8V

1 2

301-1%

R1359

DDR2_RESET_N_1

+1.8V

3

301-1%

R1

2

21

Q11

3904

21

DDR2_RESET_N_2

3

1

2

H_VTT_PWRGOOD

3

12

2

3

H_FORCEPR_N

11,12

2

+3.3V_AUX

21

4.7K

R1835

R1834

1 2

x00_sd_052203 x00_tj_052903

20,21

4.7K

R129

1 2

33-5%

1 2

33-5%

1 2

33-5%

R1541

R1542

R1543

R1545

R1544

R1546

R6003

R6004

R6002

R6005

21

33-5%

R1376

1 2

33-5%

R1353

1 2

1K-5%

R1375

1 2

33-5%

R1374

21

33-5%

R1373

1 2

.01uF 16V

33-5%

R1381

R1377

21

R1378

R1379

R1380

21

50V-5%

1 2

47pF

C134521C1346

x03_GT_010704

21

SHIFTY_RISER_CLK

33-5%

1 2

SHIFTY_RISER_LATCH

33-5%

21

SHIFTY_RISER_DATA_DN

33-5%

1 2

SHIFTY_BCKPLN_CLK

33-5%

21

SHIFTY_BCKPLN_LATCH

33-5%

1 2

SHIFTY_BCKPLN_DATA_DN

33-5%

21

SHIFTY_BMC_CLK

33-5%

1 2

SHIFTY_BMC_LATCH

33-5%

21

SHIFTY_BMC_DATA_DN

33-5%

1 2

SHIFTY_BMC_DATA_UP

33-5%

point-to-point, no cap needed

50V-5%

1 2 C900

50V-5%

47pF

50V-5%

47pF

1 2 C1342

47pF

50V-5%

1 2 C1343

21 C1341

point-to-point, no cap needed

.01uF 16V

47pF

PCI_RST_BACKPLANE_N

50V-5%

1 2

47pF

21

C1349

C1347

PCI_RST_PLANAR_N

PCI_RST_RISER_N

31

32

46

5

SYSTEM_PWRGOOD_PXH

SYSTEM_PWRGOOD_NIC

SYSTEM_PWRGOOD_FETS

SYSTEM_PWRGOOD_BACKPLANE

SYSTEM_PWRGOOD_RISER

SYSTEM_PWRGOOD_CHIPSET

47pF

21 C1344

PCI_RST_RAC_N

PCI_RST_MCH_N

x02_sd

50

17

27,40,55,58,59

31

32

28

24,25

24,35,41

32

31

17,33

just for dumbview just for dumbview

P3975SYSTEM_CPLD PROG-PART SPEC 14967 DISK PROG BLANK PART

P3976

1Y852

+3.3V_AUX

x00_sd_051903 x00_sd_051903

22uF 6.3V

C742

21

SYSTEM_PWRGOOD_ESM

44,46,50

SYSTEM_PWRGOOD_NIC_R

5

SYSTEM_PWRGOOD_FETS_R

5

SYSTEM_PWRGOOD_BACKPLANE_R

5

SYSTEM_PWRGOOD_RISER_R

5

SYSTEM_PWRGOOD_CHIPSET_R

5,59

SYSTEM_PWRGOOD_PXH_R

5

PCI_RST_MCH_N_R

5

PCI_RST_PLANAR_N_R

5

PCI_RST_RISER_N_R

5

PCI_RST_BACKPLANE_N_R

5

PCI_RST_RAC_N_R

5

BACKPLANE_PRES_N

5,32,46

RISER_PRES_N

5,31

SHIFTY_RISER_DATA_UP

31,59

CK_FSA

3

SHIFTY_RISER_DATA_DN_R

5,59

SHIFTY_RISER_CLK_R

5,59

SHIFTY_RISER_LATCH_R

5,59

CK_FSB

3

BUF_CK_CPLD

5

CK_33M_CPLD

3,59

INTRUSION_COVER_VAUX_N

x03b_sd

41

CK_32K_VAUX_SYSCPLD

33

SHIFTY_BMC_DATA_UP

5

SHIFTY_BMC_DATA_DN_R

5

CPLD_DDR2_RESET

5,59

3.3VAUX_PWRGOOD

41

H2_PROCHOT_3V

15

H1_PROCHOT_3V

15

H2_THERMTRIP_3V

15,46

H1_THERMTRIP_3V

15,46

H2_IERR_3V

15,46

H1_IERR_3V

15,46

ITP_DBR_N

15

SHIFTY_BMC_CLK_R

5

SHIFTY_BMC_LATCH_R

5

ICH_THRMTRIP

5

SHIFTY_BCKPLN_CLK_R

5,59

SHIFTY_BCKPLN_LATCH_R

5,59

SHIFTY_BCKPLN_DATA_DN_R

5,59

SHIFTY_BCKPLN_DATA_UP

32,59

5V_PWRGOOD

6,59

5V_RISER_PWRGOOD

6

RISER_PWRGOOD

31,59

DC2DC_CPUVTT_EN

6,51,59

DC2DC_1V5_EN

6,59

DC2DC_1V8_EN

6,59

DC2DC_3V3_EN

6,59

DC2DC_5V_EN

6,59

0.1uF 16V

0.1uF 16V 1 2

C15

C13

21

0.1uF 16V 1 2

C1421C16

x02_tj_092203

+3.3V_AUX

1K-5%

NC_SC_NC18 NC_SC_NC20 NC_SC_NC31 NC_SC_NC33 NC_SC_NC34 NC_SC_NC42 NC_SC_NC44 NC_SC_NC46 NC_SC_NC48 NC_SC_NC66 NC_SC_NC75 NC_SC_NC106 NC_SC_NC107 NC_SC_NC114

0.1uF 16V

1 2

R1382

143 140 138 136 134 133 132 131 130 129

106 107 114

108 123 144

1uF 6.3V

C277

21

17

IO_1_1

16

IO_1_2

15

IO_1_3

14

IO_1_4

13

IO_1_5

12

IO_1_6

11

IO_1_11

10

IO_1_12

9

IO_1_13

7

IO_1_14

6

IO_1_15_GTS1

5

IO_1_16_GTS0

19

IO_2_1

21

IO_2_2

22

IO_2_3

23

IO_2_4

24

IO_2_5

25

IO_2_6

26

IO_2_11

28

IO_2_12

30

IO_2_13_GCK0

32

IO_2_14_GCK1

35

IO_2_15_CDRST

38

IO_2_16_GCK2

4

IO_3_1

3

IO_3_2_GTS3

2

IO_3_3_GTS2 IO_3_4_GSR IO_3_5 IO_3_6 IO_3_7 IO_3_11 IO_3_12 IO_3_13 IO_3_14 IO_3_15 IO_3_16

39

IO_4_1_DGE

40

IO_4_2

41

IO_4_3

43

IO_4_4

45

IO_4_5

49

IO_4_6

50

IO_4_7

51

IO_4_11

52

IO_4_12

53

IO_4_13

54

IO_4_14

56

IO_4_15

57

IO_4_16

18

NC_18

20

NC_20

31

NC_31

33

NC_33

34

NC_34

42

NC_42

44

NC_44

46

NC_46

48

NC_48

66

NC_66

75

NC_75 NC_106 NC_107 NC_114

29

GND_29

36

GND_36

47

GND_47

62

GND_62

72

GND_72

89

GND_89

90

GND_90

99

GND_99 GND_108 GND_123 GND_144

1uF 6.3V

C27821C279

1 2

1uF 6.3V

SYSTEM_CPLD

XC2C128 TQFP144

SUB*_P3975

256 macrocell flavor

1uF 6.3V

C659

1 2

IO_5_1 IO_5_2 IO_5_3 IO_5_4 IO_5_5 IO_5_6

IO_5_7 IO_5_11 IO_5_12 IO_5_13 IO_5_14 IO_5_15 IO_5_16

IO_6_1

IO_6_2

IO_6_3

IO_6_4

IO_6_5

IO_6_6 IO_6_11 IO_6_12 IO_6_13 IO_6_14 IO_6_15 IO_6_16

IO_7_1

IO_7_2

IO_7_3

IO_7_4

IO_7_5

IO_7_6

IO_7_7 IO_7_11 IO_7_12 IO_7_13 IO_7_14 IO_7_15 IO_7_16

IO_8_1

IO_8_2

IO_8_3

IO_8_4

IO_8_5

IO_8_6 IO_8_11 IO_8_12 IO_8_13 IO_8_14 IO_8_15 IO_8_16

TCK TDI TDO TMS

VCC_JTAG

VCC_1 VCC_37 VCC_84

VCCIO1_27 VCCIO1_55 VCCIO1_73 VCCIO1_93

VCCIO2_109 VCCIO2_127 VCCIO2_141

NC_135 NC_137 NC_139 NC_142

94 95 96 97 98 100 101 102 103 104 105 110 111

92 91 88 87 86 85 83 82 81 80 79 78

112 113 115 116 117 118

CPLD_H_VID_PWRGOOD_N

119 120 121 124 125 126 128

77

DC2DC_5V_RISER_EN

76

I2C_SEG2_VAUX_SDA

I2C_SEG2_VAUX_SCL

74 71 70 69 68 64 61 60 59 58

67

CPLD_TCK

63

CPLD_TDI

122

CPLD_TD1

65

CPLD_TMS

8

1 37 84

27 55 73 93

109 127 141

135

NC_SC_NC135

137

NC_SC_NC137

139

NC_SC_NC139

142

NC_SC_NC142

44,46

PS1_PWRGOOD

PS2_PWRGOOD DEBUG_JUMPER_1 DEBUG_JUMPER_0

DEBUG_LED_3

DEBUG_LED_2

DEBUG_LED_1

DEBUG_LED_0

ICH_PWRBTN_N

ICH_PME_N

PFAULT_LATCH_N_R

PFAULT_RESET

RISER_EXP_PME_N

VRD1_THERMTRIP_N

PCI_RST_ICH_N

VCORE_EN_R VCORE_EN VCORE1_PWRGOOD VCORE2_PWRGOOD CPLD_H_FORCEPR

VRD2_THERMTRIP_N

ICH_PWR_ON_REQ

RESET_BTN_N PS1_ENABLE_N PS2_ENABLE_N

LPC_LFRAME_N

PME_NIC_CPLD_N

H2_CPU_PRES_N H1_CPU_PRES_N

RISER_PCI_PME_N

CK_VTT_PWRGD_N

H1_BSEL0_3V_N H1_BSEL1_3V_N H2_BSEL0_3V_N H2_BSEL1_3V_N

CPU_VTT_PWRGOOD

1V5_PWRGOOD

1V8_PWRGOOD

3V3_PWRGOOD

CK_PWRDWN_N

B_1U_2U5U

LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0

H2_VTT_EN H1_VTT_EN

5,31,32,40,46 5,40 46 5,31,32,40,46

31,59 31,59 59 59

x00_sd_52903 - removed 2 leds

59 59 59 59 33,41,44,56,59 33,41 5 5

x03b_sd

31,41

9,46 33,59

33-5%

7,59 8,59 5

x02_sd

9,46 33,40,41,44,59 56 31,59 31,59

33,40,44,55,59 33,40,44,55,59 33,40,44,55,59 33,40,44,55,59 33,40,44,55,59 5,59 28 5,12,46 5,12,46 5,12 5,12

x03b_sd

31,41 3,59

6 44,45,59 44,45,59 15 15 15 15 6,51 6,59 6,59 6,59 3,4,59

+3.3V_AUX

R1790

R1791

PFAULT_LATCH_N_R

5

PROPAGATION_DELAY=L:S::2000

PFAULT_RESET_R

PROPAGATION_DELAY=L:S::2500

21

R1865

+3.3V_AUX

8.2K-5%

2

GND

TPS72118DBV

NP*

1 2

8.2K-5%8.2K-5%

21

NP*

SYSTEM_PWRGOOD_PXH_R

5

PROPAGATION_DELAY=L:S::2000

SYSTEM_PWRGOOD_NIC_R

5

PROPAGATION_DELAY=L:S::2000

SYSTEM_PWRGOOD_FETS_R

5

PROPAGATION_DELAY=L:S::2000

1

2

3

SYSTEM_PWRGOOD_BACKPLANE_R

5

PROPAGATION_DELAY=L:S::2000

SYSTEM_PWRGOOD_RISER_R

5

PROPAGATION_DELAY=L:S::2000

SYSTEM_PWRGOOD_CHIPSET_R

5,59

PROPAGATION_DELAY=L:S::2000

PCI_RST_RAC_N_R

5

PROPAGATION_DELAY=L:S::2000

PCI_RST_MCH_N_R

5

PROPAGATION_DELAY=L:S::2000

PCI_RST_PLANAR_N_R

5

PROPAGATION_DELAY=L:S::2000

PCI_RST_RISER_N_R

5

PROPAGATION_DELAY=L:S::2000

PCI_RST_BACKPLANE_N_R

5

PROPAGATION_DELAY=L:S::2000

SHIFTY_RISER_CLK_R

5,59

PROPAGATION_DELAY=L:S::2000

SHIFTY_RISER_LATCH_R

5,59

PROPAGATION_DELAY=L:S::2000

SHIFTY_RISER_DATA_DN_R

5,59

PROPAGATION_DELAY=L:S::2000

SHIFTY_BCKPLN_CLK_R

5,59

PROPAGATION_DELAY=L:S::2200

SHIFTY_BCKPLN_LATCH_R

5,59

PROPAGATION_DELAY=L:S::2200

SHIFTY_BCKPLN_DATA_DN_R

5,59

PROPAGATION_DELAY=L:S::2200

SHIFTY_BMC_CLK_R

5

PROPAGATION_DELAY=L:S::2200

SHIFTY_BMC_LATCH_R

5

PROPAGATION_DELAY=L:S::2200

SHIFTY_BMC_DATA_DN_R

5

PROPAGATION_DELAY=L:S::2200

SHIFTY_BMC_DATA_UP_R

46

PROPAGATION_DELAY=L:S::2200

x03_GT_010704

+3.3V_AUX

J14

1

5,32,40

5,40

CPLD_TCK CPLD_TDO CPLD_TDI CPLD_TMS

5,31,32,40,46

4 4

5,31,32,40,46

2 3 4 5 6

CPLD JTAG Chain

subsys done

DELETED DDR CLOCK CHIP AND PCI CLOCK CHIP

ADDED COOLRUNNER II CPLD FROM YOSIMITE

A B

p/u for TCK at SIO

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

NP*

31,46

CPLD_TD2

CPLD_BYPASS

1 2

NP*

CPLD_TDO

5,32,40

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 5 OF 61

DC

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

X03

1

2

3

TYPE INPUT OUTPUT DESTINATION

70W VERTICAL +12V +1.8V DDR II, MCH

ROOM=DC2DC_1P8V

1

+12V

R73

8.2K-5%

1 2

+

270uF

0.1uF 16V

+12V

16V-20%

1 2

X03_GT_011804

21

R132

3.3K-5%

+

C606

270uF

2 1

16V-20%

+1.8V

1 2

1V8_PWRGOOD

5,59

C1805

X03_GT_010704

Enable is driven to required state from CPLD at all times.

2

12

C605

R463

0-5%

R546

1 2

0-5%

+1.8V DC2DC

R290

1 2

NC_DC2DC_1P8V_2

422-1%

+12V

+1.8V

DC2DC_1V8_EN

5,59

21

C588

R547

1 2

0-5%

NP

1000pF

50V-10%

PART_NUMBER=79015

MOD., 24 PIN, 72W, VERTICAL

DC2DC_1P8V

1

+RS

2

RSVD

3

-RS

4

PWRGD

5

PWRGD_SET

K

7

VSS_0

8

VSS_1

9

OUTEN

10

-SENCE

11

+SENSE

12

12V_IN_0

13

12V_IN_1

14

12V_IN_2

15

VOUT_0

16

VOUT_1

17

VSS_2

18

VOUT_2

19

VSS_3

20

VOUT_3

21

VSS_4

22

VOUT_4

23

VSS_5

24

VOUT_5

MH1

GND_MH1

MH2

GND_MH2

DC/DC CONVERTER

x00_gt_062603

+1.8V

16V-10%

4.7uF

C600

21

+1.8V

12

+

C268

16V-10%

4.7uF

C601

21

12

680uF

C26912C270

6.3V-20%

25V-20%

.1uF

C611

21

x00_tj_051203

x02_tj_121503

+

680uF

6.3V-20%

+

680uF

6.3V-20%

B D

TYPE INPUT OUTPUT DESTINATION

100W HORIZONTAL +12V +3.3V RISER's

ROOM=DC2DC_3P3V

+12V

R74

todo should this really be NC? -shawn

3V3_PWRGOOD

5,6,59

X03_GT_011804

Enable is driven to required state from CPLD at all times.

1 2

21

R133

31

+3.3V DC2DC

8.2K-5%

+3.3V

3.3K-5%

x00_sd_051703

3P3V_RISER_SENSE

R1580

R1430

1 2

2-1%

RISER

+12V

1 2

C1627

C1568

2 1

+

270uF

16V-20%

0.1uF 16V

X00_GT_052203

2-1%

21

+3.3V

2

VCC

GND

3

DS1818

1 2

21.5K-1%

DC2DC_3V3_EN

5,59

21

R301

U24

1

RESET

SUB=SUB*_Y1351

R1572

NC_DC2DC_3P3V_6

C1501

1 2

PART_NUMBER=79015

NP

0-5%

3V3_PWRGOOD

R1488

10K-1%

+3.3V

1000pF

50V-10%

DC2DC_3P3V

21

1

+RS

K

3

-RS

4

PWRGD

5

PWRGD_SET

6

RESERVED

7

+12V

5,6,59

VSS_7

8

VSS_8

9

OUTEN

10

-SENSE

11

+SENSE

12

12VIN_12

13

12VIN_13

14

12VIN_14

15

VCC_15

16

VCC_16

17

VSS_17

18

VCC_18

19

VSS_19

20

VCC_20

21

VSS_21

22

VCC_22

23

VSS_23

24

VCC_24

100W-25A DC-DC

MOD.-25 pin, HORIZONTAL

+3.3V

16V-10%

4.7uF

+3.3V

4V-20%

820uF

+

21

1 2

C602

C287

CA

16V-10%

4.7uF

21

4V-20%

820uF

+

x00_tj_051203

25V-20%

C603

.1uF

C619

21

1 2

C288

TYPE INPUT OUTPUT DESTINATION

ROOM=DC2DC_5V

5,6,59

X03_GT_011804

SENSE_5V_BACKPLANE_1U

32

SENSE_5V_BACKPLANE_2U5U

32

VCC

5V_PWRGOOD

R1752

2-1%

R562

1 2

0-5%

21

+12V

R75

1 2

21

R134

8.2K-5%

Enable is driven to required state from CPLD at all times.

3.3K-5%

x03b_sd

NP13

R1750

1 2

0-5%

R273

21

10-1%

x03_sd_sense

BACKPLANE

+12V

+

C610

270uF

2 1

16V-20%

DS1818

1 2

C1650

0.1uF 16V

Sub to DS1811R-5 (+5V, 5% part)

100W VERTICAL +12V +5V BACKPLANE

+5V DC2DC

R462

12

0-5%

NC_DC2DC_5V_6

DC2DC_5V_EN

5,6,59

DC2DC_5V_SENSE_GND

6

DC2DC_5V_SENSE

6

21

C590

NP

DC2DC_5V_SENSE

5,6,59

511-1%

VCC

2

VCC

RESET

GND

3

R1751

2-1%

1 2

U59

21

10K-1%

R275

R274

NP*

21

DC2DC_5V_SENSE_GND

1

5V_PWRGOOD

SUB=SUB*_1F826

1 2

VCC

1000pF

50V-10%

6

R466

0-5%

+12V

NP

R1848

1 2

DC2DC_5V

1

+RS

K

3

-RS

4

PWRGD

5

RSVD_1

6

RSVD_2

7

VSS_0

8

VSS_1

9

OUTEN

10

-SENCE

11

+SENSE

12

12V_IN_0

13

12V_IN_1

14

12V_IN_2

15

VOUT_0

16

VOUT_1

17

VSS_2

18

VOUT_2

19

VSS_3

20

VOUT_3

21

VSS_4

22

VOUT_4

23

VSS_5

24

VOUT_5

MH1

GND_MH1

MH2

GND_MH2

DC/DC CONVERTER

MOD. 073_20821_03

SUB=SUB*_H0778

DC2DC_5V_EN

5,6,59

5V_PWRGOOD

5,6,59

+12V

309-1%

NP

R1849

1 2

0-5%

1-21-2004_9:57

VCC

16V-10%

4.7uF

C60421C607

21

VCC

12

+

680uF

C271

6.3V-20%

VCC

DC2DC_5V_1U

NP

1

VCC_1

2

VCC_2

3

VCC_3

4

TRIM

5

OUTEN

6

PWRGD

7

VSS_7

8

VSS_8

9

PWRGD_SET

10

12VIN_10

11

12VIN_11

40W-15A DC-DC

SIP11

x00_tj_051203

25V-20%

.1uF

12

+

680uF

C272

X00_GT_061203

1

C620

21

6.3V-20%

2

TYPE INPUT OUTPUT DESTINATION

40W VERTICAL +12V +1.2V CPU1, CPU2, MCH

ROOM=DC2DC_CPU_VTT

Enable is driven to required state

3

from CPLD at all times.

CPU_VTT_PWRGOOD

5,51

+12V

NP

16V-20%

1 2

270uF

+

C138

+12V

NP

R1137

8.2K-5%2.7K-5%

1 2

5,51,59

NP

R1148

1 2

ECAD: Place 1 560uF cap by each CPU

CPU VTT

+CPU_VTT

DC2DC_CPUVTT_EN

+12V

NP*

R543

1 2

x02_tj_091903

27.4K-1%

NP*

R225

1 2

26.7-1%

& one by regulator

DC2DC_CPUVTT

NP

1

VCC_1

2

VCC_2

3

VCC_3

4

TRIM

5

OUTEN

6

PWRGD

7

VSS_7

8

VSS_8

9

PWRGD_SET

10

12VIN_10

11

12VIN_11

40W-15A DC-DC

SIP11

+CPU_VTT

10V-10%

2 1

C591

.1uF

+CPU_VTT

+

C349

2 1

560uF+4V-20%

4V-20%

16V-10%

4.7uF

21

C350

2 1

C608

560uF

TYPE INPUT +12V OUTPUT DESTINATION

ROOM=DC2DC_1P5V

Enable is driven to required state from CPLD at all times.

1V5_PWRGOOD

5,59

+12V

X03_GT_011804

16V-20%

1 2

270uF

C1566

+

40W HORIZONTAL

+1.5V MCH, ICH5

+1.5V DC2DC

+12V

R77

8.2K-5%

1 2

21

R136

Substitute from 3.92K to 3.57K to tweak 1.5V to 1.53V

5,59

3.3K-5%

x03_tj_010904

DC2DC_1V5_EN

R70

1 2

+12V

3.57K-1%

R1489

26.7K-1%

SUB*_5N443

Substitute 26.1K, 1%

+1.5V

DC2DC_1P5V

1

VCC_1

2

VCC_2

3

VCC_3

4

TRIM

5

OUTEN

6

PWRGD

7

VSS_7

8

VSS_8

21

9

PWRGD_SET

10

12VIN_10

11

12VIN_11

40W-15A DC-DC

MOD.-13 pin, HORIZONTAL

+1.5V

4V-20%

820uF

+

1 2

C1497

10V-10%

2 1

.1uF

16V-10%

C1575

4.7uF

TYPE INPUT OUTPUT DESTINATION

ROOM=DC2DC_RISER5V

Enable is driven to required state from CPLD at all times.

+12V

R76

8.2K-5%

1 2

21

R135

5

3.3K-5%

21

C1585

5,6

+12V

16V-20%

270uF

+

5V_RISER_PWRGOOD

X03_GT_011804

1 2

C1569

40W HORIZONTAL +12V +5V MCH, ICH5

DC2DC_5V_RISER_EN

R32

1 2

+12V

309-1%

1 2

+5.0V Riser

DC2DC_RISER5V

1

VCC_1

2

VCC_2

3

VCC_3

4

TRIM

5

OUTEN

6

PWRGD

7

VSS_7

R106

0-5%

8

VSS_8

9

PWRGD_SET

10

12VIN_10

11

12VIN_11

40W-15A DC-DC

MOD.-13 pin, HORIZONTAL

5V DC2DC

+5.0V Riser

1 2

C1651

DS1818

0.1uF 16V

Sub to DS1811R-5 (+5V, 5% part)

U34

2

VCC

RESET

GND

3

+5.0V Riser

1

5V_RISER_PWRGOOD

SUB=SUB*_1F826

12

+

680uF

C633

6.3V-20%

10V-10%

.1uF

2 1

16V-10%

C1576

4.7uF

5,6

C1586

21

4 4

3

subsys done

A B

DC2DC REGULATORS

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

COMPUTER CORPORATION

TITLE

AUSTIN,TEXAS

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 6 OF 61

SHEET

DC

REV.

X03

B D

+12V +12V

SUB*_16155

VRD BOM Changes:

X02_TJ_081803

X02_TJ_110503

1

VRD1_PWM3A

7

VRD1_PWM4A

7

+3.3V

8.2K-5% R4502

21

VCORE1_PWRGOOD

21

220K

R197221R1973

X02_TJ_081803

VRD1_VCC

220K

5,7,59

7

X03_GT_011804

Q86

3

FT2N7002LT1

1

2

7 7

5.1-5%

2 1

R260

R1985

1 2

1K-5%

1N914

2-1%

VRD1_PWM1A DRV1_OD

.22uF 25V

20%

21

X03_GT_011804

.22uF 25V

20%

1 3

D9

R240

21

VRD1_DRV1

1

BST

2

IN

3

OD

4

VCC

ADP3418

C484

Phase 1

ROOM = VRD1_PHASE1

VRD1_PHASE1B_SENSE

7

x03_sd

50V-10%

1000pF

C852

C491

1 2

21

25V-20%

DRVH

SW PGND DRVL

C466

.1uF

8 7 6 5

NP*

21

R433

1 2

VRD1_UGATE1

VRD1_LGATE1

4.7K

R451

1 2

4.7K

Q41

9

4

D

3

2

G

S

1

NC

FDS7096N3

SUB*_N1930

PKG_TYPE=SO8_P9DR_FRCHLD

5

6

7

8

Q21

9

4

D

3

2

G

S

1

NC

FDS7066SN3

SUB*_T1564

PKG_TYPE=SO8_P9DR_FRCHLD

.22uF 25V

1 2

20%

5

6

7

8

25V-20%

.1uF

C488

C1680

21

25V-20%

.1uF

16V-10%

4.7uF

C1682

21

C1681

Q24

9

4

D

3

2

G

S

1

FDS7096N3

SUB*_N1930

Q20

4

3

2

G

1

FDS7066SN3

SUB*_T1564

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

9

5

D

6

7

S

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

+12V

21

R233

R1980

220K

VCORE_EN

C1727

NP

21

1 2

100-5%

R1846

7,12 7,12 7,12 7,12 7,12 7,12

C300

2 1

47pF

50V-5%

R250

24K-5%

1 2

R1821

1 2

0-5%

X03_GT_011804

DRV1_OD

1 2

C1807

33pF 50V

5,7,59

H1_VID0 H1_VID1 H1_VID2 H1_VID3 H1_VID4 H1_VID5

12

330pF 50V

R311

VRD1_VCCSENSE

0-5%

21

C462

VCORE1_PWRGOOD

VRD1_VSSSENSE

100K-1%

R289

NP*

21

C708

12

7

.1uF

25V-20%

SUB=NP

7

11

EN

10

PWRGD

15

ILIMIT

12

DELAY

9

COMP

7

FBRTN

5

VID0

4

VID1

3

VID2

2

VID3

1

VID4

6

VID5

19

GND

C479

12

680pF 50V

R278

1K-1%

R288

1 2 100K-1%

SUB*_16155

X02_TJ_110503

VRD1_VCC

VRD1_CTRL

ADP3168

21

RAMPADJ

R305

1 2

+12V

10-5%

VCC

PWM1 PWM2 PWM3 PWM4

SW1 SW2 SW3 SW4

CSSUM CSREF

CSCOMP

300-5%

1 2

R13

28

14 13

RT

27 26 25 24

23 22 21 20

17 16 18

8

FB

Q87

3

FT2N7002LT1

1

2

7 7

5.1-5%

2 1

R261

487K-1%

VRD1_PWM1A VRD1_PWM2A VRD1_PWM3A VRD1_PWM4A

R310

1 2

0-5%

50V-10%

3300pF

SUB*_1U388

R147

15.8K-1%

1 2

VRD1_PWM3A DRV1_OD

R271

1 2

1 2 200K-1%

C720

R1987

1K-5%

X03_GT_011804

1 3

1N914

D7

1 2

2-1%

R243

R299

7 7 7 7

R303

21

0-5%

73.2K-1%

1 2

.01uF 16V

1 2

R306

21

1 2

0-5%

THERMISTOR

.22uF 25V

20%

21

VRD1_DRV3

16V-10%

.47uF

21

R315

1 2

0-5%

73.2K-1%

R291

C710

R85

1 2

41.2K-1%

Phase 3

ROOM = VRD1_PHASE3

x03_sd

50V-10%

1000pF

C854

C490

NP*

21

VRD1_PHASE3B_SENSE

7

C467

21

.1uF

25V-20%

4.7K

R437

1 2

VRD1_UGATE3

VRD1_LGATE3

4.7K

1

BST

2

IN

3

OD

4

VCC

ADP3418

.22uF 25V

1 2

20%

C483

DRVH

PGND DRVL

8 7

SW

6 5

R457

1 2

C9

X00_GT_062103 Redraw Only- NEED INDEPENDENT CHECK before MODEM!

R314

21

73.2K-1%

1 2

R286

0-5%

1 2

73.2K-1%

R284

1 2

R81

1 2

R285

NP

VRD1_PHASE1B_SENSE

VRD1_PHASE2B_SENSE

VRD1_PHASE3B_SENSE

VRD1_PHASE4B_SENSE

X03_GT_011804

3

D

2

S

7

+CPU_VID1

7

R407

1 2

0-5%

C334

NP

1 2

.047uF

Q7

16V-10%

2N7002

R484

NP

21

1

G

4.7K

24.9K-1%

Q38

9

4

D

3

2

G

S

1

NC

FDS7096N3

SUB*_N1930

PKG_TYPE=SO8_P9DR_FRCHLD

ALT_LLINE

5

6

7

8

Q40

9

4

D

3

2

G

S

1

NC

FDS7066SN3

SUB*_T1564

PKG_TYPE=SO8_P9DR_FRCHLD

7

7,8

16V-10%

25V-20%

.22uF 25V

1 2

20%

4.7uF

C481

2 1

25V-20%

C1692

.1uF

2 1

.1uF

C1693

2 1

C1694

Redraw Only- NEED INDEPENDENT CHECK before MODEM!

5

6

7

8

FDS7066N3 is local. Waiting on library symbol.

X03_GT_011904

R1717

NP

VRD1_PWM1A

1 2

68K-5%

R1718

NP

68K-5%

GPO_ALT_LLINE_N

33

VRD1_PWM3A

21

VRD1_PWM4A

+3.3V_AUX

U61

131412

VHC14

x00_sd_052903

2

DRV1_OD_R

7

PWM Control Circuitry

ROOM = VRD1_CTRL

5,8,59

x00_sd_061603 - providing sensing

3

4 4

X00_GT_052203

H1_VSSSENSE

12

VRD1_VSSSENSE_MID

R304

1 2

R1851

0-5%

21

SUB=SUB*_4053P

DRV1_OD_R

7

SUB=SUB*_75EEC

.047uF 25V

249K-1%

C714

1 2

20%

+CPU_VID1

12

R1820

NP

1 2

0-5%

VRD1_VSSSENSE

1uF

1 2

C1728

25V-10%

1 2

127K-1%

R255

H1_VCCSENSE

X00_GT_052203

50V-10%

1000pF

PART_NUMBER=79015

1 2

25V-20%

.22uF 25V

20%

21

Q39

4

3

2

G

1

FDS7096N3

Q25

4

3

2

G

1

FDS7066SN3

SUB*_T1564

7

SUB=SUB*_P1355

C336

16V-10%

C1683

.1uF

21

25V-20%

C489

.1uF

21

9

5

D

6

7

S

8

NC

SUB*_N1930

PKG_TYPE=SO8_P9DR_FRCHLD

9

5

D

6

7

S

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

ALT_LLINE

12

+

4.7uF

21

C1684

.22uF 25V

20%

16V-10%

4.7uF

560uF

4V-20%

C1685

+CPU_VID1

0.6uH, 27Amp

VERTICAL

R152

1 2

C276

1 2

16V-10%

4.7uF

C487

21

7,8

2 1

C303

L3

12

3-5%

.001UF

C1695

2 1

25V-20%

.1uF

50V-10%

SUB*_16155

X02_TJ_110503

SUB=SUB*_N1453

SUB=SUB*_P1355

16V-10%

4.7uF

25V-20%

.1uF

C1696

2 1

C305

2 1

C1697

12

+

C337

560uF

+CPU_VID1

SUB*_16155

X02_TJ_110503

4V-20%

L1

VERTICAL

0.6uH, 27Amp

1 2

SUB=SUB*_N1453

3-5%

R171

1 2

21

C282

.001UF

50V-10%

Input Filtering

+12V

SUB=SUB*_P1355

12

+

C582

270uF

C725

16V-20%

INTEGRATED VRD 10.1 VOLTAGE

REGULATOR FOR PROC_1

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

A B

12

+

Q88

3

FT2N7002LT1

1

2

1N914

2-1%

7 7

5.1-5%

2 1

R258

+12V

Q89

3

FT2N7002LT1

1

2

5.1-5%

R257

560uF

4V-20%

CA

VRD1_PWM2A DRV1_OD

7 7

C2

1 2

1 3

R244

21

20%

1 2

12

20%

R1986

1K-5%

X03_GT_011804

20%

D11

1

BST

2

IN

3

OD

4

VCC

.22uF 25V

C482

21

R1988

1K-5%

X03_GT_011804

1N914

D10

31

1 2

2-1%

R236

VRD1_PWM4A DRV1_OD

.22uF 25V

C8

21

C3

.1uF

50V-20%

Phase 2

ROOM = VRD1_PHASE2

VRD1_PHASE2B_SENSE

7

.22uF 25V

50V-10%

1000pF

C853

C579

1 2

25V-20%

VRD1_PHASE2

ADP3418

C471

.1uF

21

DRVH

PGND DRVL

SW

21

x03_sd

8 7 6 5

NP*

R434

1 2

VRD1_LGATE2

Phase 4

ROOM = VRD1_PHASE4

VRD1_PHASE4B_SENSE

7

.22uF 25V

50V-10%

1000pF

C855

C578

20%

1

VRD1_UGATE4

BST

2

IN

3

OD

4

VCC

.1uF

21

C465

1 2

.1uF

25V-20%

VRD1_DRV4

DRVH

PGND DRVL

ADP3418

C21

1 2

50V-20%

SUB=SUB*_4053P

21

x03_sd

SW

1uF

25V-10%

8 7 6 5

4.7K

NP*

VRD1_LGATE4

21

R430

R454

4.7K

1 2

21

R428

4.7K

1uF

C12

1 2

25V-10%

SUB=SUB*_4053P

4

3

2

1

FDS7096N3

SUB*_N1930

4.7K

Q36

9

5

D

6

7

G

S

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

Q37

9

4

D

3

2

G

S

1

FDS7066SN3

SUB*_T1564

Q34

9

4

D

3

2

G

S

1

NC

FDS7096N3

SUB*_N1930

PKG_TYPE=SO8_P9DR_FRCHLD

16V-10%

.22uF 25V

1 2

20%

5

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

5

6

7

.22uF 25V

8

20%

Q33

9

4

D

3

2

G

S

1

NC

FDS7066SN3

SUB*_T1564

PKG_TYPE=SO8_P9DR_FRCHLD

4.7uF

2 1

C581

16V-10%

4.7uF

C485

1 2

5

6

7

8

C1686

25V-20%

.1uF

C1698

2 1

25V-20%

.1uF

C1687

2 1

.1uF

12

C1688

2 1

25V-20%

.1uF

C1699

12

C1700

Q27

9

4

D

3

2

G

S

1

NC

FDS7096N3

SUB*_N1930

PKG_TYPE=SO8_P9DR_FRCHLD

Q26

4

3

2

G

1

FDS7066SN3

Q35

4

3

2

G

1

FDS7096N3

SUB*_N1930

16V-10%

4.7uF

.22uF 25V

20%

21

.22uF 25V

20%

2 1

C580

16V-10%

4.7uF

C486

5

6

7

8

9

5

D

6

7

S

8

NC

SUB*_T1564

PKG_TYPE=SO8_P9DR_FRCHLD

9

5

D

6

7

S

8

NC

21

PKG_TYPE=SO8_P9DR_FRCHLD

Q32

9

4

5

D

6

3

7

2

G

S

8

1

NC

FDS7066SN3

SUB*_T1564

PKG_TYPE=SO8_P9DR_FRCHLD

VID Termination

+CPU_VTT

TITLE

LINDY PLANAR

DWG NO.

DATE

DC

D1660

R28

1 2

499-1%

R27

1 2

499-1%

R26

1 2

499-1%

R25

1 2

499-1%

R16

1 2

499-1%

R15

1 2

499-1%

1-21-2004_9:57

SUB=SUB*_P1355

12

+

C343

25V-20%

C1689

C1691

2 1

.1uF

25V-20%

C1690

2 1

.1uF

SUB=SUB*_P1355

12

C338

25V-20%

C1701

2 1

C1703

.1uF

12

25V-20%

C1702

.1uF

12

H1_VID0

H1_VID1

H1_VID2

H1_VID3

H1_VID4

H1_VID5

COMPUTER CORPORATION AUSTIN,TEXAS

SHEET

7 OF 611/13/2004

16V-10%

4.7uF

560uF

4V-20%

+CPU_VID1

L2

R163

C281

16V-10%

+

560uF

4V-20%

+CPU_VID1

L4

C280

7,12

REV.

2 1

C308

0.6uH, 27Amp

1 2

3-5%

1 2

.001UF

4.7uF

2 1

C302

1 2

21

R153

21

X03

VERTICAL

SUB=SUB*_N1453

50V-10%

VERTICAL

0.6uH, 27Amp SUB=SUB*_N1453

3-5%

.001UF

50V-10%

1

2

3

B D

CA

+12V

SUB*_P1355

Q90

SUB*_16155

VRD BOM Changes:

X02_TJ_081803

X02_TJ_110503

1

VRD2_VCC

21

220K

R197021R1971

VRD2_PWM3A

8

VRD2_PWM4A

8

+3.3V

8.2K-5% R4503

21

X02_TJ_081803

VCORE2_PWRGOOD

2

8

DRV2_OD_R

R1981

220K

X03_GT_011804

21

1 2

C1808

5,8,59

33pF 50V

X03_GT_011804

DRV2_OD

8

3

FT2N7002LT1

1

2

8 8

5.1-5%

2 1

R264

SUB*_16155

X02_TJ_110503

R1989

1 2

1K-5%

1N914

2-1%

VRD2_PWM1A DRV2_OD

.22uF 25V

20%

21

X03_GT_011804

VRD2_PHASE1B_SENSE

8

.22uF 25V

1 3

20%

D25

R247

21

VRD2_DRV1

1

BST

2

IN

3

OD

4

VCC

ADP3418

C599

+12V

Q91

3

FT2N7002LT1

2

PWM Control Circuitry

ROOM = VRD2_CTRL

VCORE_EN

5,7,59

R1822

NP

VRD2_VSSSENSE

1uF

1 2

C1729

25V-10%

249K-1%

1 2

R256

H2_VCCSENSE

X00_GT_052203

1 2

0-5%

50V-10%

1000pF

C1730

21

PART_NUMBER=79015

127K-1%

1 2

R235

H2_VSSSENSE

12

R318

3

1 2

0-5%

SUB=SUB*_4053P

DRV2_OD_R

8

SUB*_75EEC

.047uF 25V

C715

1 2

20%

4 4

+CPU_VID2

12

21

.1uF

C473

25V-20%

1 2

100-5%

R1847

11

EN

10

VCORE2_PWRGOOD

5,8,59

VRD2_VSSSENSE

H2_VID0

8,12

H2_VID1

8,12

H2_VID2

8,12

H2_VID3

8,12

H2_VID4

8,12

H2_VID5

8,12

C301

2 1

47pF

50V-5%

R252

12

24K-5% 1K-1%

330pF 50V

R348

1 2

VRD2_VCCSENSE

0-5%

R1823

NP

1 2

0-5%

100K-1%

21

C709

12

15

R297

NP*

12

19

9

7

5 4 3 2 1 6

PWRGD

ILIMIT

DELAY

COMP

FBRTN

VID0 VID1 VID2 VID3 VID4 VID5

GND

VRD2_VCC

8

VRD2_CTRL

ADP3168

C480

12

680pF 50V

R279

R296

NP

1 2 100K-1%

RAMPADJ

21

VCC

PWM1 PWM2 PWM3 PWM4

SW1 SW2 SW3 SW4

CSSUM CSREF

CSCOMP

RT

FB

R328

1 2

28

14 13

27 26 25 24

23 22 21 20

17 16 18

8

+12V

10-5%

300-5%

1 2

R14

VRD2_PWM1A VRD2_PWM2A VRD2_PWM3A VRD2_PWM4A

R347

1 2

0-5%

487K-1%

50V-10%

3300pF

Phase 1

ROOM = VRD2_PHASE1

x03_sd

50V-10%

1000pF

C856

C648

1 2

1

5.1-5%

2 1

R316

0-5%

21

C476

.1uF

25V-20%

8

DRVH

7

SW

6

PGND

5

DRVL

R1992

1 2

1K-5%

1N914

2-1%

VRD2_PWM3A

8

DRV2_OD

8

R267

1 2

R272

R300

1 2 200K-1%

8 8 8 8

R350

1 2

21

0-5%

73.2K-1%

1 2

R298

SUB*_54672

.01uF 16V

C721

1 2

SUB*_1U388

R148

15.8K-1% 0-5%

THERMISTOR

NP*

21

VRD2_UGATE1

VRD2_LGATE1

R487

4.7K

1 2

X03_GT_011804

8

1 3

D12

1 2

R248

1

BST

2

IN

3

OD

4

VCC

16V-10%

.47uF

C11

21

R349

0-5%

73.2K-1%

1 2

R295

SUB*_54672

C711

1 2

41.2K-1% R332

1 2

21

Q70

9

4

5

D

6

3

7

2

G

S

8

1

NC

FDS7096N3

SUB*_N1930

PKG_TYPE=SO8_P9DR_FRCHLD

4

3

2

1

FDS7066SN3

R494

4.7K

1 2

Phase 3

ROOM = VRD2_PHASE3

VRD2_PHASE3B_SENSE

.22uF 25V

50V-10%

x03_sd

1000pF

C858

C647

20%

21

VRD2_DRV3

ADP3418

.22uF 25V

20%

21

73.2K-1%

1 2

R293

SUB*_54672

R87

C477

.1uF

25V-20%

DRVH

SW PGND DRVL

C598

1 2

73.2K-1%

1 2

R294

SUB*_54672

24.9K-1%

NP*

21

8

VRD2_UGATE3

7 6 5

VRD2_LGATE3

R500

4.7K

1 2

VRD2_PHASE1B_SENSE

VRD2_PHASE2B_SENSE

VRD2_PHASE3B_SENSE

VRD2_PHASE4B_SENSE

X03_GT_011804

R86

1 2

NP

Q43

9

D

G

S

NC

SUB*_T1564

PKG_TYPE=SO8_P9DR_FRCHLD

R493

4.7K

1 2

8

3

D

2

S

.22uF 25V

1 2

20%

5

6

7

8

Q62

9

4

3

2

G

S

1

FDS7096N3

SUB*_N1930

+CPU_VID2

Q8

2N7002

1

G

16V-10%

4.7uF

C1704

2 1

25V-20%

C624

2 1

.1uF

5

D

6

7

8

NC

PKG_TYPE=SO8_P9DR_FRCHLD

4

3

2

1

FDS7066SN3

R418

1 2

0-5%

R501

NP

4.7K

25V-20%

C1706

2 1

.1uF

C1705

.22uF 25V

1 2

20%

Q67

9

D

G

S

NC

SUB*_T1564

PKG_TYPE=SO8_P9DR_FRCHLD

8

NP

21

16V-10%

4.7uF

C594

5

6

7

8

VRD2_PWM1A

C335

1 2

.047uF

16V-10%

ALT_LLINE

C1732

2 1

25V-20%

.1uF

Q44

9

4

3

2

G

S

1

FDS7096N3

SUB*_N1930

Q42

4

3

2

G

1

FDS7066SN3

25V-20%

2 1

.1uF

C1722

2 1

X03_GT_011904

R1715

NP

1 2

68K-5%

R1716

NP

68K-5%

7

5

D

6

7

8

NC

20%

PKG_TYPE=SO8_P9DR_FRCHLD

9

5

D

6

7

S

8

NC

SUB*_T1564

PKG_TYPE=SO8_P9DR_FRCHLD

4

C1723

3

2

1

FDS7096N3

VRD2_PWM3A

21

VRD2_PWM4A

16V-10%

4.7uF

.22uF 25V

C646

1 2

Q63

9

D

G

S

NC

SUB*_N1930

PKG_TYPE=SO8_P9DR_FRCHLD

C1707

2 1

25V-20%

.1uF

5

6

7

8

Q45

9

4

D

3

2

G

S

1

NC

FDS7066SN3

SUB*_T1564

PKG_TYPE=SO8_P9DR_FRCHLD

8

25V-20%

.1uF

C1708

2 1

.22uF 25V

20%

21

5

6

7

8

2 1

subsys done

16V-10%

4.7uF

2 1

+

560uF

4V-20%

0.6uH, 27Amp

L17

C326

SUB=SUB*_N1453

SUB*_16155

X02_TJ_110503

C344

C1709

+CPU_VID2

VERTICAL

12

3-5%

R172

1 2

C283

1 2

.001UF

50V-10%

SUB*_P1355

16V-10%

4.7uF

2 1

+

560uF

4V-20%

+CPU_VID2

C328

SUB*_16155

X02_TJ_110503

16V-10%

4.7uF

2 1

C623

C1724

25V-20%

2 1

.1uF

25V-20%

2 1

.1uF

C1725

12

C424

C1726

L5

0.6uH, 27Amp

1 2

3-5%

R182

1 2

21

C299

.001UF

FDS7066N3 is local. Waiting on library symbol.

INTEGRATED VRD 10.1 VOLTAGE

REGULATOR FOR PROC_2

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

A B

+12V

Q92

3

FT2N7002LT1

R1990

1 2

1

1K-5%

2

1 3

1N914

D38

2-1%

R249

21

VRD2_PWM2A

8

DRV2_OD

8

5.1-5%

2 1

R263

.22uF 25V

20%

21

+12V

Q93

3

FT2N7002LT1

R1991

1 2

1

1K-5%

2

1N914

31

1 2

2-1%

VERTICAL

SUB=SUB*_N1453

8 8

VRD2_PWM4A DRV2_OD

5.1-5% 12

R262

.22uF 25V

20%

50V-10%

21

Input Filtering

+12V

SUB*_P1355

C583

+

2 1

270uF

16V-20%

C820

12

+

560uF

ROOM = VRD2_PHASE2

X03_GT_011804

VRD2_PHASE2B_SENSE

8

.22uF 25V

50V-10%

C650

1 2

20%

C478

.1uF

25V-20%

VRD2_DRV2

1

BST

2

IN

3

OD

4

VCC

ADP3418

C595

Phase 4

ROOM = VRD2_PHASE4

VRD2_PHASE4B_SENSE

8

.22uF 25V

50V-10%

1000pF

C649

20% D34

R246

C10

4V-20%

21

1

BST

2

IN

3

OD

4

VCC

C6

C475

1 2

.1uF

25V-20%

VRD2_DRV4

ADP3418

.1uF

1 2

50V-20%

21

Phase 2

x03_sd

1000pF

C857

NP*

21

8

DRVH

7

SW

6

PGND

5

DRVL

VRD2_LGATE2

R490

4.7K

1 2

x03_sd

C859

NP*

8

DRVH

7

SW

6

PGND

5

DRVL

21

R486

4.7K

21

C7

.1uF

50V-20%

SUB*_4053P

R495

1 2

VRD2_LGATE4

21

R485

C23

1 2

4.7K

1uF

25V-10%

Q52

9

4

3

2

G

S

1

FDS7096N3

SUB*_N1930

Q50

9

4

3

2

G

S

1

FDS7096N3

SUB*_N1930

VRD2_UGATE4

Q49

4

3

2

G

1

FDS7066SN3

C22

1 2

SUB*_4053P

5

D

6

7

8

NC

20%

PKG_TYPE=SO8_P9DR_FRCHLD

Q56

9

4

D

3

2

G

S

1

NC

FDS7066SN3

SUB*_T1564

PKG_TYPE=SO8_P9DR_FRCHLD

5

D

6

7

8

NC

20%

PKG_TYPE=SO8_P9DR_FRCHLD

9

5

D

6

7

S

8

NC

SUB*_T1564

PKG_TYPE=SO8_P9DR_FRCHLD

1uF

25V-10%

16V-10%

4.7uF

.22uF 25V

C652

1 2

5

6

7

8

16V-10%

.22uF 25V

C617

1 2

2 1

4.7uF

C1710

25V-20%

.1uF

C1716

2 1

25V-20%

.1uF

25V-20%

.1uF

C1711

2 1

25V-20%

.1uF

C1717

12

2 1

12

C1712

C1718

Q47

4

3

2

G

1

FDS7096N3

Q51

9

4

3

2

G

S

1

FDS7096N3

SUB*_N1930

Q48

9

4

D

3

2

G

S

1

NC

FDS7066SN3

SUB*_T1564

PKG_TYPE=SO8_P9DR_FRCHLD

9

5

D

6

7

S

8

NC

SUB*_N1930

PKG_TYPE=SO8_P9DR_FRCHLD

Q46

9

4

D

3

2

G

S

1

NC

FDS7066SN3

SUB*_T1564

PKG_TYPE=SO8_P9DR_FRCHLD

5

D

6

7

8

20%

NC

PKG_TYPE=SO8_P9DR_FRCHLD

5

6

7

8

TITLE

LINDY PLANAR

DWG NO.

DATE

DC

SUB*_P1355

12

C440

16V-10%

25V-20%

.22uF 25V

20%

C651

4.7uF

2 1

C1713

25V-20%

.1uF

2 1

.1uF

C1714

2 1

C1715

21

5

6

7

8

SUB*_P1355

16V-10%

12

+

C425

560uF

4V-20%

16V-10%

25V-20%

4.7uF

C1719

.22uF 25V

C618

21

2 1

25V-20%

.1uF

12

.1uF

C1720

12

C1721

+CPU_VID2

VID Termination

+CPU_VTT

R79

D1660

1 2

499-1%

R78

1 2

499-1%

R72

1 2

499-1%

R71

1 2

499-1%

R69

1 2

499-1%

R68

1 2

499-1%

H2_VID0

H2_VID1

H2_VID2

H2_VID3

H2_VID4

H2_VID5

COMPUTER CORPORATION AUSTIN,TEXAS

SHEET

8 OF 611/13/2004

+

4.7uF

L18

R178

C284

560uF

2 1

1 2

21

REV.

16V-10%

4.7uF

2 1

C333

4V-20%

+CPU_VID2

L16

0.6uH, 27Amp

1 2

3-5%

R179

1 2

C285

1 2

C309

VERTICAL

0.6uH, 27Amp SUB=SUB*_N1453

3-5%

.001UF

50V-10%

X03

VERTICAL

SUB=SUB*_N1453

.001UF

50V-10%

8,12

1

2

3

B D

CA

1-21-2004_9:57

1

+12V

R427

1 2

100-1%

100K-5%

T

10K-1%

R104

21

0.1uF 16V 1 2

R90

21

C719

0.1uF 16V 1 2

C716

10K-1%

R102

21

R281

1 2

1K-1%

3.32K-1% R183

21

.22uF 25V

1 2

20%

C653

5

+

V+ V-

4

-

3

12

U17 LM339

2

10K-1% 25.5K-1%

R140

21

R254

21

9

+

V+ V-

8

-

+3.3V

8.2K-5% R1704

U17

3

LM339

12

21

14

VRD1_THERMTRIP_N

5,46

2

Locate near hot component in P1 core regulator.

U17 LM339

1

1 2

10K-1% 25.5K-1%

R142

1 2

R253

+3.3V

8.2K-5% R1705

U17

3

LM339

11

+

V+ V-

10

12

21

13

VRD2_THERMTRIP_N

5,46

100K-5%

T

1 2

10K-1%

R141

1 2

R89

0.1uF 16V 1 2

C718

0.1uF 16V 1 2

C717

10K-1%

R149

21

1K-1%

3.32K-1%

1 2

R192

R280

21

3

7

+

V+ V-

6

12

3

1

2

3

Locate near hot component in P2 core regulator.

VRD Over Temperature Detect Circuit

ROOM=VRD_THERM

4 4

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

X03

subsys done

A B

VRD THERMTRIP

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 9 OF 61

DC

B D

CA

1-21-2004_9:57

1

2

1

2

3

4 4

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

X03

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

DATE

D1660

1/13/2004 10 OF 61

DC

3

B D

ROOM=PROC_1

TO DO - MECHANICAL ADD'S NOT CORRECT

1

Heat Sink Clips

Heat Sink RM

H_A3_N

+CPU_VTT

2

x00_tj_061403

3

Alternate PLL filter circuit recommended by Intel until on-die version validated.

+1.5V

R1583NP

1 2

0-5%

2.5V-20%-2STACK 1 2

680uF

C1588

+

NP

4 4

+1.5V

R1584NP

0-5%

2.5V-20%-2STACK

680uF

+

21

1 2

NP

subsys done

C1587

NP

1 2

4.7uF

C1570

C1371

6.3V-10%

0.1uF 16V

NP

4.7uF

C1372

6.3V-10%

21

0.1uF 16V

NP

C1373

21

C1571

A B

R1556

1 2

220

R1558

1 2

220

R1562

1 2

220

R1563

1 2

220

R1506

21

51

R1493

21

51

R1497

21

51

R1499

21

51

R1501

21

51

R1503

21

51

NP

R1494

NP

1 2

51

NP

R1508

1 2

100-5%

x00_GT_010704

V_1P5_H1_VCCPLL

NP

21

10 - 12 mil traces

C1370

0.1uF 16V

V_1P5_H2_VCCPLL

x00_sd_061703

1 2

0.1uF 16V

R1559

21

H_A20M_N

220

H_SLP_N

R1557

1 2

H_NMI

220

H_INTR

R1560

H_SMI_N

220

H_INIT_N

R1561

H_IGNNE_N

220

H_STPCLK_N

R1504

H_FERR_N

51

R1505

H_BREQ0_N

51

H_BREQ1_N

R1496

21

H1_BREQ23_N

51

H1_ODTEN

R1554

21

H_PWRGOOD

301-1%

H1_TESTHI0

R1498

21

H1_TESTHI1

51

H1_TESTHI2

R1500

21

H1_TESTHI3

51

H1_TESTHI4

R1502

21

H1_TESTHI5

51

H1_TESTHI6

R1495

H1_TESTHI7

51

H1_TESTHI8

R1492

H1_BOOTSEL

51

H_RST_N

12

x03b_tj_012004

12

SUB*_X4108

ST1

1

NC_ST1_2

RETENTION SUPPORT, W/CLIP

NC_ST2_2

RETENTION SUPPORT, W/CLIP

GND

2

NC

GROUND, BRACKET

ST2

1

GND

2

NC

GROUND, BRACKET

11,33

11,33,55

11,33

11,17

11

12

12,33

12

11,15,17

1U Bottom Support Bracket

2U/5U Bottom Support Bracket

SUB*_X4108

Place @ CPU1 Place @ CPU2

11,17

H_A4_N

11,17

H_A5_N

11,17

H_A6_N

11,17

H_A7_N

11,17

H_A8_N

11,17

H_A9_N

11,17

H_A10_N

11,17

H_A11_N

11,17

H_A12_N

11,17

H_A13_N

11,17

H_A14_N

11,17

H_A15_N

11,17

H_A16_N

11,17

H_A17_N

11,17

H_A18_N

11,17

H_A19_N

11,17

H_A20_N

11,17

H_A21_N

11,17

H_A22_N

11,17

H_A23_N

11,17

H_A24_N

11,17

H_A25_N

11,17

H_A26_N

11,17

H_A27_N

11,17

H_A28_N

11,17

H_A29_N

11,17

H_A30_N

11,17

H_A31_N

11,17

H_A32_N

11,17

H_A33_N

11,17

H_A34_N

11,17

H_A35_N

11,17

H_AP0_N

11,17

H_AP1_N

11,17

H_ADS_N

11,17

H_ADSTB0_N

11,17

H_ADSTB1_N

11,17

H_REQ0_N

11,17

H_REQ1_N

11,17

H_REQ2_N

11,17

H_REQ3_N

11,17

H_REQ4_N

11,17

H_BREQ0_N

11,17

H_BREQ1_N

11,17

H1_BREQ23_N

11

H_BNR_N

11,17

H_BPRI_N

11,17

H_LOCK_N

11,17

H_BINIT_N

11,17

H_RS0_N

11,17

H_RS1_N

11,17

H_RS2_N

11,17

H_RSP_N

11,17

H_TRDY_N

11,17

H_HITM_N

11,17

H_HIT_N

11,17

H_DEFER_N

11,17

H_A20M_N

11,33

H_SMI_N

11,33

H_FERR_N

11,33

H_IGNNE_N

11,33

H1_IERR_N

15

H_MCERR_N

11,15,17

H_SLP_N

11,33

H_STPCLK_N

11,33

H_RST_N

11,15,17

H_INIT_N

11,33,55

H_INTR

11,33

H_NMI

11,33

CK_167M_CPU1_P

3

CK_167M_CPU1_N

3

SUB=SUB*_4M319

Retention Screws

proc heatsink RM boat

two of the boats are represented here

PROC_1

A22

A3

A20

A4

B18

A5

C18

A6

A19

A7

C17

A8

D17

A9

A13

A10

B16

A11

B14

A12

B13

A13

A12

A14

C15

A15

C14

A16

D16

A17

D15

A18

F15

A19

A10

A20

B10

A21

B11

A22

C12

A23

E14

A24

D13

A25

A9

A26

B8

A27

E13

A28

D12

A29

C11

A30

B7

A31

A6

A32

A7

A33

C9

A34

C8

A35

E10

AP0

D9

AP1

D19

ADS

F17

ADSTB0

F14

ADSTB1

B19

REQ0

B21

REQ1

C21

REQ2

C20

REQ3

B22

REQ4

D20

BR0

F12

BR1

E11

BR2

D10

BR3

F20

BNR

D23

BPRI

A17

LOCK

F11

BINIT

E21

RS0

D22

RS1

F21

RS2

C6

RSP

E19

TRDY

A23

HITM

E22

HIT

C23

DEFER

F27

A20M

C27

SMI

E27

FERR/PBE

C26

IGNNE

E5

IERR

D7

MCERR

AE6

SLP

D4

STPCLK

Y8

RESET

D6

INIT

B24

LINT0

G23

LINT1

Y4

BCLK0

W5

BCLK1

NOCONA 667MHz / 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 1 OF 4

ADD1=ADD*_89JJP_RETSCRW1 ADD2=ADD*_89JJP_RETSCRW2 ADD3=ADD*_89JJP_RETSCRW3 ADD4=ADD*_89JJP_RETSCRW4 ADD5=ADD*_89JJP_RETSCRW5 ADD6=ADD*_89JJP_RETSCRW6 ADD7=ADD*_89JJP_RETSCRW7 ADD8=ADD*_89JJP_RETSCRW8

ADD7=ADD02_Y1255_BRKT1 ADD8=ADD02_Y1255_BRKT2

ADD1=ADD13_W1578_BRKT3 ADD2=ADD13_W1578_BRKT4

ADD3=ADD*_X4108_RETMOD1 ADD4=ADD*_X4108_RETMOD2 ADD5=ADD*_X4108_RETMOD3

D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63

DP0 DP1 DP2 DP3

DSTBN0 DSTBN1 DSTBN2 DSTBN3

DSTBP0 DSTBP1 DSTBP2 DSTBP3

DBI0 DBI1 DBI2 DBI3 DBSY DRDY

D0 D1 D2 D3 D4 D5 D6 D7 D8 D9

Heat Sink RM screws

Y26 AA27 Y24 AA25 AD27 Y23 AA24 AB26 AB25 AB23 AA22 AA21 AB20 AB22 AB19 AA19 AE26 AC26 AD25 AE25 AC24 AD24 AE23 AC23 AA18 AC20 AC21 AE22 AE20 AD21 AD19 AB17 AB16 AA16 AC17 AE13 AD18 AB15 AD13 AD14 AD11 AC12 AE10 AC11 AE9 AD10 AD8 AC9 AA13 AA14 AC14 AB12 AB13 AA11 AA10 AB10 AC8 AD7 AE7 AC6 AC5 AA8 Y9 AB6

AC18 AE19 AC15 AE17

Y21 Y18 Y15 Y12

Y20 Y17 Y14 Y11

AC27 AD22 AE12 AB9 F18 E18

H_D0_N

11,17

H_D1_N

11,17

H_D2_N

11,17

H_D3_N

11,17

H_D4_N

11,17

H_D5_N

11,17

H_D6_N

11,17

H_D7_N

11,17

H_D8_N

11,17

H_D9_N

11,17

H_D10_N

11,17

H_D11_N

11,17

H_D12_N

11,17

H_D13_N

11,17

H_D14_N

11,17

H_D15_N

11,17

H_D16_N

11,17

H_D17_N

11,17

H_D18_N

11,17

H_D19_N

11,17

H_D20_N

11,17

H_D21_N

11,17

H_D22_N

11,17

H_D23_N

11,17

H_D24_N

11,17

H_D25_N

11,17

H_D26_N

11,17

H_D27_N

11,17

H_D28_N

11,17

H_D29_N

11,17

H_D30_N

11,17

H_D31_N

11,17

H_D32_N

11,17

H_D33_N

11,17

H_D34_N

11,17

H_D35_N

11,17

H_D36_N

11,17

H_D37_N

11,17

H_D38_N

11,17

H_D39_N

11,17

H_D40_N

11,17

H_D41_N

11,17

H_D42_N

11,17

H_D43_N

11,17

H_D44_N

11,17

H_D45_N

11,17

H_D46_N

11,17

H_D47_N

11,17

H_D48_N

11,17

H_D49_N

11,17

H_D50_N

11,17

H_D51_N

11,17

H_D52_N

11,17

H_D53_N

11,17

H_D54_N

11,17

H_D55_N

11,17

H_D56_N

11,17

H_D57_N

11,17

H_D58_N

11,17

H_D59_N

11,17

H_D60_N

11,17

H_D61_N

11,17

H_D62_N

11,17

H_D63_N

11,17

H_DP0_N

11,17

H_DP1_N

11,17

H_DP2_N

11,17

H_DP3_N

11,17

H_DSTBN0_N

11,17

H_DSTBN1_N

11,17

H_DSTBN2_N

11,17

H_DSTBN3_N

11,17

H_DSTBP0_N

11,17

H_DSTBP1_N

11,17

H_DSTBP2_N

11,17

H_DSTBP3_N

11,17

H_DBI0_N

11,17

H_DBI1_N

11,17

H_DBI2_N

11,17

H_DBI3_N

11,17

H_DBSY_N

11,17

H_DRDY_N

11,17

ADD1=ADD*_H3668_RMCLIP1 ADD2=ADD*_H3668_RMCLIP2 ADD3=ADD*_H3668_RMCLIP3 ADD4=ADD*_H3668_RMCLIP4

ADD5=ADD*_X4108_RETMOD5 ADD6=ADD*_X4108_RETMOD6 ADD7=ADD*_X4108_RETMOD7

11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17 11,17

11,17 11,17

11,17 11,17 11,17

11,17 11,17 11,17 11,17 11,17

11,17

Swizzled

11,17

11

11,17 11,17 11,17 11,17

11,17 11,17 11,17 11,17 11,17

11,17 11,17 11,17

11,33 11,33 11,33 11,33

15

11,15,17

11,33

11,33 11,15,17 11,33,55

11,33

proc heatsink RM clip

x03b_tj_012004

proc heatsink RM boat

x03b_tj_012004

H_A3_N H_A4_N H_A5_N H_A6_N H_A7_N H_A8_N H_A9_N H_A10_N H_A11_N H_A12_N H_A13_N H_A14_N H_A15_N H_A16_N H_A17_N H_A18_N H_A19_N H_A20_N H_A21_N H_A22_N H_A23_N H_A24_N H_A25_N H_A26_N H_A27_N H_A28_N H_A29_N H_A30_N H_A31_N H_A32_N H_A33_N H_A34_N H_A35_N

H_AP0_N H_AP1_N

H_ADS_N H_ADSTB0_N H_ADSTB1_N

H_REQ0_N H_REQ1_N H_REQ2_N H_REQ3_N H_REQ4_N

H_BREQ1_N H_BREQ0_N H2_BREQ23_N

H_BNR_N H_BPRI_N H_LOCK_N H_BINIT_N

H_RS0_N H_RS1_N H_RS2_N H_RSP_N H_TRDY_N

H_HITM_N H_HIT_N H_DEFER_N

H_A20M_N H_SMI_N H_FERR_N H_IGNNE_N H2_IERR_N H_MCERR_N

H_SLP_N H_STPCLK_N H_RST_N H_INIT_N

H_INTR H_NMI

CK_167M_CPU2_P

3

CK_167M_CPU2_N

3

SUB=SUB*_4M319

PROC_2

A22

A3

A20

A4

B18

A5

C18

A6

A19

A7

C17

A8

D17

A9

A13

A10

B16

A11

B14

A12

B13

A13

A12

A14

C15

A15

C14

A16

D16

A17

D15

A18

F15

A19

A10

A20

B10

A21

B11

A22

C12

A23

E14

A24

D13

A25

A9

A26

B8

A27

E13

A28

D12

A29

C11

A30

B7

A31

A6

A32

A7

A33

C9

A34

C8

A35

E10

AP0

D9

AP1

D19

ADS

F17

ADSTB0

F14

ADSTB1

B19

REQ0

B21

REQ1

C21

REQ2

C20

REQ3

B22

REQ4

D20

BR0

F12

BR1

E11

BR2

D10

BR3

F20

BNR

D23

BPRI

A17

LOCK

F11

BINIT

E21

RS0

D22

RS1

F21

RS2

C6

RSP

E19

TRDY

A23

HITM

E22

HIT

C23

DEFER

F27

A20M

C27

SMI

E27

FERR/PBE

C26

IGNNE

E5

IERR

D7

MCERR

AE6

SLP

D4

STPCLK

Y8

RESET

D6

INIT

B24

LINT0

G23

LINT1

Y4

BCLK0

W5

BCLK1

NOCONA 667MHz / 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 1 OF 4

DSTBN0 DSTBN1 DSTBN2 DSTBN3

DSTBP0 DSTBP1 DSTBP2 DSTBP3

DBI0 DBI1 DBI2 DBI3 DBSY DRDY

1 2

PROCESSOR 1 & 2

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

D0 D1 D2 D3 D4 D5 D6 D7 D8

D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63

DP0 DP1 DP2 DP3

R1522

Y26 AA27 Y24 AA25 AD27 Y23 AA24 AB26 AB25 AB23 AA22 AA21 AB20 AB22 AB19 AA19 AE26 AC26 AD25 AE25 AC24 AD24 AE23 AC23 AA18 AC20 AC21 AE22 AE20 AD21 AD19 AB17 AB16 AA16 AC17 AE13 AD18 AB15 AD13 AD14 AD11 AC12 AE10 AC11 AE9 AD10 AD8 AC9 AA13 AA14 AC14 AB12 AB13 AA11 AA10 AB10 AC8 AD7 AE7 AC6 AC5 AA8 Y9 AB6

AC18 AE19 AC15 AE17

Y21 Y18 Y15 Y12

Y20 Y17 Y14 Y11

AC27 AD22 AE12 AB9 F18 E18

51

H_DSTBN0_N H_DSTBN1_N H_DSTBN2_N H_DSTBN3_N

H_DSTBP0_N H_DSTBP1_N H_DSTBP2_N H_DSTBP3_N

H_DBI0_N H_DBI1_N H_DBI2_N H_DBI3_N H_DBSY_N H_DRDY_N

H2_ODTEN

CA

ROOM=PROC_2

H_D0_N

11,17

H_D1_N

11,17

H_D2_N

11,17

H_D3_N

11,17

H_D4_N

11,17

H_D5_N

11,17

H_D6_N

11,17

H_D7_N

11,17

H_D8_N

11,17

H_D9_N

11,17

H_D10_N

11,17

H_D11_N

11,17

H_D12_N

11,17

H_D13_N

11,17

H_D14_N

11,17

H_D15_N

11,17

H_D16_N

11,17

H_D17_N

11,17

H_D18_N

11,17

H_D19_N

11,17

H_D20_N

11,17

H_D21_N

11,17

H_D22_N

11,17

H_D23_N

11,17

H_D24_N

11,17

H_D25_N

11,17

H_D26_N

11,17

H_D27_N

11,17

H_D28_N

11,17

H_D29_N

11,17

H_D30_N

11,17

H_D31_N

11,17

H_D32_N

11,17

H_D33_N

11,17

H_D34_N

11,17

H_D35_N

11,17

H_D36_N

11,17

H_D37_N

11,17

H_D38_N

11,17

H_D39_N

11,17

H_D40_N

11,17

H_D41_N

11,17

H_D42_N

11,17

H_D43_N

11,17

H_D44_N

11,17

H_D45_N

11,17

H_D46_N

11,17

H_D47_N

11,17

H_D48_N

11,17

H_D49_N

11,17

H_D50_N

11,17

H_D51_N

11,17

H_D52_N

11,17

H_D53_N

11,17

H_D54_N

11,17

H_D55_N

11,17

H_D56_N

11,17

H_D57_N

11,17

H_D58_N

11,17

H_D59_N

11,17

H_D60_N

11,17

H_D61_N

11,17

H_D62_N

11,17

H_D63_N

11,17

H_DP0_N

11,17

H_DP1_N

11,17

H_DP2_N

11,17

H_DP3_N

11,17

11,17 11,17 11,17 11,17

11,17 11,17 11,17 11,17 11,17 11,17

12

+CPU_VTT

R1570

1 2

39-5%

R1566

1 2

39-5%

R1569

1 2

39-5%

R1567

1 2

39-5%

R1568

1 2

39-5%

R1518

1 2

R1516

1 2

R1514

1 2

R1512

1 2

R1520

R1511

NP

R1509

1-21-2004_9:57

ROOM=PROC_1

X02_tj_091603

+CPU_VTT

ECAD: Route trace from L128 to pin AB4

Route trace from L127 to pin AD4

1 2

+CPU_VTT

1 2

ECAD: Route trace from L125 to pin AB4

Route trace from L126 to pin AD4

C1448

21

H_BINIT_N

47pF

50V-5% C1444

1 2

H_BNR_N

47pF

50V-5%

C1445

2 1

H_HIT_N

47pF

50V-5%

C1446

12

H_HITM_N

47pF

50V-5%

C1447

12

H_MCERR_N

47pF

50V-5%

R1521

1 2

H2_BREQ23_N

51

R1517

1 2

51

R1515

1 2

51

R1513

1 2

51

R1519

51

R1565

51

21

H2_TESTHI0

H2_TESTHI1

H2_TESTHI2

H2_TESTHI3

H2_TESTHI4

H2_TESTHI5

H2_TESTHI6

H2_TESTHI7

H2_TESTHI8

H_FORCEPR_N

H2_BOOTSEL

H_TEST_BUS

51

21

51

21

51

21

51

11,17

11,15,17

11

12

5,12

12

+CPU_VTT

21

R1592

49.9-1%

NET_PHYSICAL_TYPE=50MIL

754mV

R370

1 2

84.5-1%

+CPU_VTT

21

R1593

49.9-1%

NET_PHYSICAL_TYPE=50MIL

754mV

21

R371

84.5-1%

+CPU_VTT

21

R1594

49.9-1%49.9-1%

NET_PHYSICAL_TYPE=50MIL

754mV

R372

1 2

84.5-1%84.5-1%

56.2 1%

SUB*_87911

CPU1 GTL VREF

ECAD: Route <1.5" trace. ECAD: Place 220pf caps under CPU

1 2

C1451

ECAD: Route <1.5" trace. ECAD: Place 220pf caps under CPU

1 2

C1454

CPU2 GTL VREF

ECAD: Route <1.5" trace. ECAD: Place 220pf caps under CPU

1uF

1 2

C1453

+CPU_VTT

21

ECAD: Route <1.5" trace. ECAD: Place 220pf caps under CPU

R1595

NET_PHYSICAL_TYPE=50MIL

x02_tj_091903

Dangling 750 ohm resistors are there to help fine-tune VREF's using a variable powr supply during margin testing

754mV

21

R373

SUB*_87911

56.2 1%

1 2

C1452

X03_tj_121503

L136

21

10uH 165MA

to pin AD4

L137

10uH 165MA

to pin AB4

L138

10uH 165MA

to pin AD4

L139

21

10uH 165MA

to pin AB4

R1824

1 2

0-5%

1uF

10V-10%

R1825 NET_PHYSICAL_TYPE=50MIL

1 2

0-5%

1uF

10V-10%

R1826

1 2

0-5%

10V-10%

1 2

1uF

10V-10%

PROCESSORS 1 & 2

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

V_VTT_H1_VCCA

cap between AB4 and AA5

1 2

C1492

22uF 6.3V22uF 6.3V

V_VTT_H1_VSSA

V_VTT_H2_VCCA

21

cap between AB4 and AA5

C1491

V_VTT_H2_VSSA

NET_PHYSICAL_TYPE=50MIL

21

220pF

C1582

C1581

50V-10%

NC_H1_GTLREF01

NET_PHYSICAL_TYPE=50MIL

21

220pF

C157921C1580

50V-10%

NC_H1_GTLREF23

NET_PHYSICAL_TYPE=50MIL

21

220pF

C157821C1577

50V-10%

NC_H2_GTLREF01

NET_PHYSICAL_TYPE=50MIL

R1827

0-5%

21

220pF

C1584

C1583

50V-10%

NC_H2_GTLREF23

NET_PHYSICAL_TYPE=50MIL

COMPUTER CORPORATION AUSTIN,TEXAS

SHEET

220pF

50V-10%

220pF

50V-10%

220pF

50V-10%

11 OF 611/13/2004

12

H1_GTLREF01

2 1

750-1%

R323

NP01

H1_GTLREF23

750-1%

12

H2_GTLREF01

750-1%

H2_GTLREF23

2 1

750-1%

REV.

X03

R321

NP01

12

R320

NP01

12

R319

NP01

12

1

2

3

B D

CA

1-21-2004_9:57

1

PROC_1

A5

VSS_A5

A11

VSS_A11

A21

VSS_A21

A27

VSS_A27

A29

VSS_A29

A31

VSS_A31

B2

VSS_B2

B9

VSS_B9

B15

VSS_B15

B17

VSS_B17

B23

VSS_B23

B28

VSS_B28

B30

VSS_B30

C7

VSS_C7

C13

VSS_C13

C19

VSS_C19

C25

VSS_C25

C29

VSS_C29

C31

VSS_C31

D2

VSS_D2

D5

VSS_D5

D11

VSS_D11

D21

VSS_D21

D27

VSS_D27

D28

VSS_D28

D30

VSS_D30

E9

VSS_E9

E15

VSS_E15

E17

VSS_E17

E23

VSS_E23

E29

VSS_E29

E31

VSS_E31

2

3

SUB=SUB*_4M319

F2

VSS_F2

F7

VSS_F7

F13

VSS_F13

F19

VSS_F19

F25

VSS_F25

F28

VSS_F28

F30

VSS_F30

G1

VSS_G1

G3

VSS_G3

G5

VSS_G5

G9

VSS_G9

G25

VSS_G25

G27

VSS_G27

G29

VSS_G29

G31

VSS_G31

H2

VSS_H2

H4

VSS_H4

H6

VSS_H6

H8

VSS_H8

H24

VSS_H24

H26

VSS_H26

H28

VSS_H28

H30

VSS_H30

J1

VSS_J1

J3

VSS_J3

J5

VSS_J5

J7

VSS_J7

J9

VSS_J9

J23

VSS_J23

J25

VSS_J25

J27

VSS_J27

J29

VSS_J29

J31

VSS_J31

K2

VSS_K2

K4

VSS_K4

K6

VSS_K6

K8

VSS_K8

K24

VSS_K24

K26

VSS_K26

K28

VSS_K28

K30

VSS_K30

L1

VSS_L1

L3

VSS_L3

L5

VSS_L5

L7

VSS_L7

L9

VSS_L9

L23

VSS_L23

L25

VSS_L25

L27

VSS_L27

L29

VSS_L29

L31

VSS_L31

M2

VSS_M2

M4

VSS_M4

M6

VSS_M6

M8

VSS_M8

M24

VSS_M24

M26

VSS_M26

M28

VSS_M28

M30

VSS_M30

N2

VSS_N2

N4

VSS_N4

NOCONA 667MHz / 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 4 OF 4

VSS_N6

VSS_N8 VSS_N24 VSS_N26 VSS_N28 VSS_N30

VSS_P1

VSS_P3

VSS_P5

VSS_P7

VSS_P9 VSS_P23 VSS_P25 VSS_P27 VSS_P29 VSS_P31

VSS_R2

VSS_R4

VSS_R6

VSS_R8 VSS_R24 VSS_R26 VSS_R28 VSS_R30

VSS_T1

VSS_T3

VSS_T5

VSS_T7

VSS_T9 VSS_T23 VSS_T25 VSS_T27 VSS_T29 VSS_T31

VSS_U2

VSS_U4

VSS_U6

VSS_U8 VSS_U24 VSS_U26 VSS_U28 VSS_U30

VSS_V1

VSS_V3

VSS_V5

VSS_V7

VSS_V9 VSS_V23 VSS_V25 VSS_V27 VSS_V29 VSS_V31

VSS_W2

VSS_W4 VSS_W24 VSS_W26 VSS_W28 VSS_W30

VSS_Y1

VSS_Y5

VSS_Y7 VSS_Y13 VSS_Y19 VSS_Y25 VSS_Y31 VSS_AA2 VSS_AA9

VSS_AA15 VSS_AA17 VSS_AA23 VSS_AA30

VSS_AB1 VSS_AB5

VSS_AB11 VSS_AB21 VSS_AB27 VSS_AB31

VSS_AC2 VSS_AC7

VSS_AC13 VSS_AC19 VSS_AC25

VSS_AD3 VSS_AD9

VSS_AD15 VSS_AD17 VSS_AD23 VSS_AD31

VSS_AE2

VSS_AE11 VSS_AE21 VSS_AE27

N6 N8 N24 N26 N28 N30 P1 P3 P5 P7 P9 P23 P25 P27 P29 P31 R2 R4 R6 R8 R24 R26 R28 R30 T1 T3 T5 T7 T9 T23 T25 T27 T29 T31 U2 U4 U6 U8 U24 U26 U28 U30 V1 V3 V5 V7 V9 V23 V25 V27 V29 V31 W2 W4 W24 W26 W28 W30 Y1 Y5 Y7 Y13 Y19 Y25 Y31 AA2 AA9 AA15 AA17 AA23 AA30 AB1 AB5 AB11 AB21 AB27 AB31 AC2 AC7 AC13 AC19 AC25 AD3 AD9 AD15 AD17 AD23 AD31 AE2 AE11 AE21 AE27

SUB=SUB*_4M319

PROC_2

A5

VSS_A5

A11

VSS_A11

A21

VSS_A21

A27

VSS_A27

A29

VSS_A29

A31

VSS_A31

B2

VSS_B2

B9

VSS_B9

B15

VSS_B15

B17

VSS_B17

B23

VSS_B23

B28

VSS_B28

B30

VSS_B30

C7

VSS_C7

C13

VSS_C13

C19

VSS_C19

C25

VSS_C25

C29

VSS_C29

C31

VSS_C31

D2

VSS_D2

D5

VSS_D5

D11

VSS_D11

D21

VSS_D21

D27

VSS_D27

D28

VSS_D28

D30

VSS_D30

E9

VSS_E9

E15

VSS_E15

E17

VSS_E17

E23

VSS_E23

E29

VSS_E29

E31

VSS_E31

F2

VSS_F2

F7

VSS_F7

F13

VSS_F13

F19

VSS_F19

F25

VSS_F25

F28

VSS_F28

F30

VSS_F30

G1

VSS_G1

G3

VSS_G3

G5

VSS_G5

G9

VSS_G9

G25

VSS_G25

G27

VSS_G27

G29

VSS_G29

G31

VSS_G31

H2

VSS_H2

H4

VSS_H4

H6

VSS_H6

H8

VSS_H8

H24

VSS_H24

H26

VSS_H26

H28

VSS_H28

H30

VSS_H30

J1

VSS_J1

J3

VSS_J3

J5

VSS_J5

J7

VSS_J7

J9

VSS_J9

J23

VSS_J23

J25

VSS_J25

J27

VSS_J27

J29

VSS_J29

J31

VSS_J31

K2

VSS_K2

K4

VSS_K4

K6

VSS_K6

K8

VSS_K8

K24

VSS_K24

K26

VSS_K26

K28

VSS_K28

K30

VSS_K30

L1

VSS_L1

L3

VSS_L3

L5

VSS_L5

L7

VSS_L7

L9

VSS_L9

L23

VSS_L23

L25

VSS_L25

L27

VSS_L27

L29

VSS_L29

L31

VSS_L31

M2

VSS_M2

M4

VSS_M4

M6

VSS_M6

M8

VSS_M8

M24

VSS_M24

M26

VSS_M26

M28

VSS_M28

M30

VSS_M30

N2

VSS_N2

N4

VSS_N4

NOCONA 667MHz / 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 4 OF 4

VSS_N6

VSS_N8 VSS_N24 VSS_N26 VSS_N28 VSS_N30

VSS_P1

VSS_P3

VSS_P5

VSS_P7

VSS_P9 VSS_P23 VSS_P25 VSS_P27 VSS_P29 VSS_P31

VSS_R2

VSS_R4

VSS_R6

VSS_R8 VSS_R24 VSS_R26 VSS_R28 VSS_R30

VSS_T1

VSS_T3

VSS_T5

VSS_T7

VSS_T9 VSS_T23 VSS_T25 VSS_T27 VSS_T29 VSS_T31

VSS_U2

VSS_U4

VSS_U6

VSS_U8 VSS_U24 VSS_U26 VSS_U28 VSS_U30

VSS_V1

VSS_V3

VSS_V5

VSS_V7

VSS_V9 VSS_V23 VSS_V25 VSS_V27 VSS_V29 VSS_V31

VSS_W2

VSS_W4 VSS_W24 VSS_W26 VSS_W28 VSS_W30

VSS_Y1

VSS_Y5

VSS_Y7 VSS_Y13 VSS_Y19 VSS_Y25 VSS_Y31 VSS_AA2 VSS_AA9

VSS_AA15 VSS_AA17 VSS_AA23 VSS_AA30

VSS_AB1 VSS_AB5

VSS_AB11 VSS_AB21 VSS_AB27 VSS_AB31

VSS_AC2 VSS_AC7

VSS_AC13 VSS_AC19 VSS_AC25

VSS_AD3 VSS_AD9

VSS_AD15 VSS_AD17 VSS_AD23 VSS_AD31

VSS_AE2

VSS_AE11 VSS_AE21 VSS_AE27

N6 N8 N24 N26 N28 N30 P1 P3 P5 P7 P9 P23 P25 P27 P29 P31 R2 R4 R6 R8 R24 R26 R28 R30 T1 T3 T5 T7 T9 T23 T25 T27 T29 T31 U2 U4 U6 U8 U24 U26 U28 U30 V1 V3 V5 V7 V9 V23 V25 V27 V29 V31 W2 W4 W24 W26 W28 W30 Y1 Y5 Y7 Y13 Y19 Y25 Y31 AA2 AA9 AA15 AA17 AA23 AA30 AB1 AB5 AB11 AB21 AB27 AB31 AC2 AC7 AC13 AC19 AC25 AD3 AD9 AD15 AD17 AD23 AD31 AE2 AE11 AE21 AE27

5,46

5,11,12

12,15 12,15 12,15 12,15 12,15 12,15

12,15

12,15 12,15

H1_ODTEN

11

H1_SLEW_CTRL

12

H1_BOOTSEL

11

H1_OPTIMIZED

12

H1_CPU_PRES_N H1_BSEL0

15

H1_BSEL1

15

H1_COMP0

12

H1_COMP1

12

H1_COMP2

12

H1_COMP3

12

H1_TESTHI0

11

H1_TESTHI1

11

H1_TESTHI2

11

H1_TESTHI3

11

H1_TESTHI4

11

H1_TESTHI5

11

H1_TESTHI6

11

H1_TESTHI7

11

H1_TESTHI8

11

H1_GTLREF01

11

H1_GTLREF23

11

H1_THRM_AN

45

H1_THRM_CA

45

NC_H1_PKG_ID

H1_PROCHOT_N

15

H_FORCEPR_N H1_THERMTRIP_N

15

H_BPM0_N H_BPM1_N H_BPM2_N H_BPM3_N H_BPM4_N H_BPM5_N

ITP_TCK ITP_TDI_H1

15

ITP_TDO_H1

15

ITP_TMS ITP_TRST_N

+CPU_VTT

SUB=SUB*_4M319

Place @ CPU1

R1531

51

R1526

1 2

51

R1527

1 2

51

R1528

21

51

R1529

51

R1530

1 2

51

R1600

1 2

100-1%

R1601

21

100-1%

R1596

1 2

49.9-1%

R1597

21

49.9-1%

R60

21

H_VTT_PWRGOOD

301-1%

B5

PROC_1

ODTEN

AC30

SLEW_CTRL

G7

BOOT_SELECT

C1

OPTIMIZED/COMPAT

A3

SKTOCC

AA3

BSEL0

AB3

BSEL1

AD16

COMP0

E16

COMP1

AC28

COMP2

D25

COMP3

W6

TESTHI0

W7

TESTHI1

W8

TESTHI2

Y6

TESTHI3

AA7

TESTHI4

AD5

TESTHI5

AE5

TESTHI6

A26

TESTHI7

Y29

TESTHI8

W23

GTLREF0

W9

GTLREF1

F23

GTLREF2

F9 AA28

GTLREF3 NC_AA28

Y27

THERMDA

Y28

THERMDC

AE4

SMB_PRT

B25

PROCHOT

A15

FORCEPR

F26

THRMTRIP

F6

BPM0

F8

BPM1

E7

BPM2

F5

BPM3

E8

BPM4

E4

BPM5

E24

TCK

C24

TDI

E25

TDO

A25

TMS

F24

TRST

NOCONA 667MHz/ 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 2 OF 4

21

H_BPM0_N

H_BPM1_N

H_BPM2_N

H_BPM3_N

21

H_BPM4_N

H_BPM5_N

H1_COMP2

H1_COMP3

H1_COMP0

H1_COMP1

12,15

12

5,12

VCCIOPLL

VCCSENSE VSSSENSE

PWRGOOD

RSVD_A16

RSVD_W3 RSVD_Y3

RSVD_AC1 RSVD_AE15 RSVD_AE16 RSVD_AE28 RSVD_AE29

NC_AA29 NC_AB28 NC_AB29 NC_AC29 NC_AD28 NC_AD29

VIDPWRGD

VTT_B12

VTT_C10 VTT_E12 VTT_F10

VTT_Y10 VTT_AA12 VTT_AC10 VTT_AD12

H1_SLEW_CTRL

12

H1_OPTIMIZED

12

VID0 VID1 VID2 VID3 VID4 VID5

VCCPLL

VCCA VSSA

VTTEN

VTT_A4 VTT_B4

VTT_C5

F3 E3 D3 C3 B3 A1

AD1 AD4

AB4 AA5

B27 D26

AB7

A16 W3 Y3 AC1 AE15 AE16 AE28 AE29

AA29 AB28 AB29 AC29 AD28 AD29

E1 B1

A4 B4 B12 C5 C10 E12 F10 Y10 AA12 AC10 AD12

H1_VID0 H1_VID1 H1_VID2 H1_VID3 H1_VID4 H1_VID5

V_1P5_H1_VCCPLL

V_VTT_H1_VCCA V_VTT_H1_VSSA

H1_VCCSENSE H1_VSSSENSE

H_PWRGOOD

H_TEST_BUS NC_H1_W3 NC_H1_Y3 NC_H1_AC1 NC_H1_AE15 NC_H1_AE16 NC_H1_AE28 NC_H1_AE29

NC_H1_AA28 NC_H1_AA29 NC_H1_AB28 NC_H1_AB29 NC_H1_AC29 NC_H1_AD28 NC_H1_AD29

H1_VTT_EN H_VTT_PWRGOOD

+CPU_VTT

NP

21

51

R1524

R1523

NP21NP

21

0-5%

R1525

R1585

7 7 7 7 7 7

11

11 11

X00_GT_052203

7 7

11,12,33

11,12

5 5,12

5151

X00_TJ_061803

X00_GT_052203

5,46

5,11,12

12,15 12,15 12,15 12,15 12,15 12,15

12,15

12,15 12,15

+CPU_VTT

H2_ODTEN

11

H2_SLEW_CTRL

12

H2_BOOTSEL

11

H2_OPTIMIZED

12

H2_CPU_PRES_N H2_BSEL0

15

H2_BSEL1

15

H2_COMP0

12

H2_COMP1

12

H2_COMP2

12

H2_COMP3

12

H2_TESTHI0

11

H2_TESTHI1

11

H2_TESTHI2

11

H2_TESTHI3

11

H2_TESTHI4

11

H2_TESTHI5

11

H2_TESTHI6

11

H2_TESTHI7

11

H2_TESTHI8

11

H2_GTLREF01

11

H2_GTLREF23

11

H2_THRM_AN

45

H2_THRM_CA

45

NC_H2_PKG_ID

H2_PROCHOT_N

15

H_FORCEPR_N H2_THERMTRIP_N

15

H_BPM0_N H_BPM1_N H_BPM2_N H_BPM3_N H_BPM4_N H_BPM5_N

ITP_TCK ITP_TDI_H2

15

ITP_TDO_H2

15

ITP_TMS ITP_TRST_N

SUB=SUB*_4M319

Place @ CPU2

R1602

1 2

100-1%

R1599

1 2

49.9-1%

R1603

100-1%

R1598

49.9-1%

B5

PROC_2

ODTEN

AC30

SLEW_CTRL

G7

BOOT_SELECT

C1

OPTIMIZED/COMPAT

A3

SKTOCC

AA3

BSEL0

AB3

BSEL1

AD16

COMP0

E16

COMP1

AC28

COMP2

D25

COMP3

W6

TESTHI0

W7

TESTHI1

W8

TESTHI2

Y6

TESTHI3

AA7

TESTHI4

AD5

TESTHI5

AE5

TESTHI6

A26

TESTHI7

Y29

TESTHI8

W23

GTLREF0

W9

GTLREF1

F23

GTLREF2 GTLREF3 NC_AA28

Y27

THERMDA

Y28

THERMDC

AE4

SMB_PRT

B25

PROCHOT

A15

FORCEPR

F26

THRMTRIP

F6

BPM0

F8

BPM1

E7

BPM2

F5

BPM3

E8

BPM4

E4

BPM5

E24

TCK

C24

TDI

E25

TDO

A25

TMS

F24

TRST

NOCONA 667MHz/ 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 2 OF 4

21

H2_COMP2

H2_COMP3

21

H2_COMP0

H2_COMP1

12

VID0 VID1 VID2 VID3 VID4 VID5

VCCPLL

VCCIOPLL

VCCA VSSA

VCCSENSE VSSSENSE

PWRGOOD

RSVD_A16

RSVD_W3 RSVD_Y3

RSVD_AC1 RSVD_AE15 RSVD_AE16 RSVD_AE28 RSVD_AE29

NC_AA29 NC_AB28 NC_AB29 NC_AC29 NC_AD28 NC_AD29

VTTEN

VIDPWRGD

VTT_A4 VTT_B4

VTT_B12

VTT_C5 VTT_C10 VTT_E12 VTT_F10 VTT_Y10

VTT_AA12 VTT_AC10 VTT_AD12

12

F3 E3 D3 C3 B3 A1

AD1 AD4

AB4 AA5

B27 D26

AB7

A16 W3 Y3 AC1 AE15 AE16 AE28 AE29

AA28F9 AA29 AB28 AB29 AC29 AD28 AD29

E1 B1

A4 B4 B12 C5 C10 E12 F10 Y10 AA12 AC10 AD12

H2_SLEW_CTRL H2_OPTIMIZED

H2_VID0 H2_VID1 H2_VID2 H2_VID3 H2_VID4 H2_VID5

V_1P5_H2_VCCPLL

V_VTT_H2_VCCA V_VTT_H2_VSSA

H2_VCCSENSE H2_VSSSENSE

H_PWRGOOD

H_TEST_BUS NC_H2_W3 NC_H2_Y3 NC_H2_AC1 NC_H2_AE15 NC_H2_AE16 NC_H2_AE28 NC_H2_AE29

NC_H2_AA28 NC_H2_AA29 NC_H2_AB28 NC_H2_AB29 NC_H2_AC29 NC_H2_AD28 NC_H2_AD29

H2_VTT_EN H_VTT_PWRGOOD

+CPU_VTT

NP

51

R1540

1 2

0-5%

R1586

1 2

NP

R1539

1 2

R1538

1 2

8 8 8 8 8 8

11

11 11

X00_GT_052203

8

X00_TJ_061803

8

X00_GT_052203

11,12,33

11,12

5 5,12

51 51

1

2

3

4 4

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

X03

subsys done

A B

ECAD: place resistor near processor

PROCESSOR 1 & 2

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 12 OF 61

DC

1

2

3

+CPU_VID1

SUB=SUB*_4M319

PROC_1

A2

VCC_A2

A8

VCC_A8

A14

VCC_A14

A18

VCC_A18

A24

VCC_A24

A28

VCC_A28

A30

VCC_A30

B6

VCC_B6

B20

VCC_B20

B26

VCC_B26

B29

VCC_B29

B31

VCC_B31

C2

VCC_C2

C4

VCC_C4

C16

VCC_C16

C22

VCC_C22

C28

VCC_C28

C30

VCC_C30

D1

VCC_D1

D8

VCC_D8

D14

VCC_D14

D18

VCC_D18

D24

VCC_D24

D29

VCC_D29

D31

VCC_D31

E2

VCC_E2

E6

VCC_E6

E20

VCC_E20

E26

VCC_E26

E28

VCC_E28

E30

VCC_E30

F1

VCC_F1

F4

VCC_F4

F16

VCC_F16

F22

VCC_F22

F29

VCC_F29

F31

VCC_F31

G2

VCC_G2

G4

VCC_G4

G6

VCC_G6

G8

VCC_G8

G24

VCC_G24

G26

VCC_G26

G28

VCC_G28

G30

VCC_G30

H1

VCC_H1

H3

VCC_H3

H5

VCC_H5

H7

VCC_H7

H9

VCC_H9

H23

VCC_H23

H25

VCC_H25

H27

VCC_H27

H29

VCC_H29

H31

VCC_H31

J2

VCC_J2

J4

VCC_J4

J6

VCC_J6

J8

VCC_J8

J24

VCC_J24

J26

VCC_J26

J28

VCC_J28

J30

VCC_J30

K1

VCC_K1

K3

VCC_K3

K5

VCC_K5

K7

VCC_K7

K9

VCC_K9

K23

VCC_K23

K25

VCC_K25

K27

VCC_K27

K29

VCC_K29

K31

VCC_K31

L2

VCC_L2

L4

VCC_L4

L6

VCC_L6

L8

VCC_L8

L24

VCC_L24

L26

VCC_L26

L28

VCC_L28

L30

VCC_L30

M1

VCC_M1

M3

VCC_M3

M5

VCC_M5

M7

VCC_M7

M9

VCC_M9

M23

VCC_M23

M25

VCC_M25

M27

VCC_M27

M29

VCC_M29

M31

VCC_M31

NOCONA 667MHz / 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 3 OF 4

VCC_N1 VCC_N3 VCC_N5 VCC_N7

VCC_N9 VCC_N23 VCC_N25 VCC_N27 VCC_N29 VCC_N31

VCC_P2

VCC_P4

VCC_P6

VCC_P8 VCC_P24 VCC_P26 VCC_P28 VCC_P30

VCC_R1

VCC_R3

VCC_R5

VCC_R7

VCC_R9 VCC_R23 VCC_R25 VCC_R27 VCC_R29 VCC_R31

VCC_T2

VCC_T4

VCC_T6

VCC_T8 VCC_T24 VCC_T26 VCC_T28 VCC_T30

VCC_U1

VCC_U3

VCC_U5

VCC_U7

VCC_U9 VCC_U23 VCC_U25 VCC_U27 VCC_U29 VCC_U31

VCC_V2

VCC_V4

VCC_V6

VCC_V8 VCC_V24 VCC_V26 VCC_V28 VCC_V30

VCC_W1 VCC_W25 VCC_W27 VCC_W29 VCC_W31

VCC_Y2 VCC_Y16 VCC_Y22 VCC_Y30 VCC_AA1 VCC_AA4 VCC_AA6

VCC_AA20 VCC_AA26 VCC_AA31

VCC_AB2 VCC_AB8

VCC_AB14 VCC_AB18 VCC_AB24 VCC_AB30

VCC_AC3 VCC_AC4

VCC_AC16 VCC_AC22 VCC_AC31

VCC_AD2 VCC_AD6

VCC_AD20 VCC_AD26 VCC_AD30

VCC_AE3 VCC_AE8

VCC_AE14 VCC_AE18 VCC_AE24

+CPU_VID1

N1 N3 N5 N7 N9 N23 N25 N27 N29 N31 P2 P4 P6 P8 P24 P26 P28 P30 R1 R3 R5 R7 R9 R23 R25 R27 R29 R31 T2 T4 T6 T8 T24 T26 T28 T30 U1 U3 U5 U7 U9 U23 U25 U27 U29 U31 V2 V4 V6 V8 V24 V26 V28 V30 W1 W25 W27 W29 W31 Y2 Y16 Y22 Y30 AA1 AA4 AA6 AA20 AA26 AA31 AB2 AB8 AB14 AB18 AB24 AB30 AC3 AC4 AC16 AC22 AC31 AD2 AD6 AD20 AD26 AD30 AE3 AE8 AE14 AE18 AE24

+CPU_VID2 +CPU_VID2

SUB=SUB*_4M319

PROC_2

A2

VCC_A2

A8

VCC_A8

A14

VCC_A14

A18

VCC_A18

A24

VCC_A24

A28

VCC_A28

A30

VCC_A30

B6

VCC_B6

B20

VCC_B20

B26

VCC_B26

B29

VCC_B29

B31

VCC_B31

C2

VCC_C2

C4

VCC_C4

C16

VCC_C16

C22

VCC_C22

C28

VCC_C28

C30

VCC_C30

D1

VCC_D1

D8

VCC_D8

D14

VCC_D14

D18

VCC_D18

D24

VCC_D24

D29

VCC_D29

D31

VCC_D31

E2

VCC_E2

E6

VCC_E6

E20

VCC_E20

E26

VCC_E26

E28

VCC_E28

E30

VCC_E30

F1

VCC_F1

F4

VCC_F4

F16

VCC_F16

F22

VCC_F22

F29

VCC_F29

F31

VCC_F31

G2

VCC_G2

G4

VCC_G4

G6

VCC_G6

G8

VCC_G8

G24

VCC_G24

G26

VCC_G26

G28

VCC_G28

G30

VCC_G30

H1

VCC_H1

H3

VCC_H3

H5

VCC_H5

H7

VCC_H7

H9

VCC_H9

H23

VCC_H23

H25

VCC_H25

H27

VCC_H27

H29

VCC_H29

H31

VCC_H31

J2

VCC_J2

J4

VCC_J4

J6

VCC_J6

J8

VCC_J8

J24

VCC_J24

J26

VCC_J26

J28

VCC_J28

J30

VCC_J30

K1

VCC_K1

K3

VCC_K3

K5

VCC_K5

K7

VCC_K7

K9

VCC_K9

K23

VCC_K23

K25

VCC_K25

K27

VCC_K27

K29

VCC_K29

K31

VCC_K31

L2

VCC_L2

L4

VCC_L4

L6

VCC_L6

L8

VCC_L8

L24

VCC_L24

L26

VCC_L26

L28

VCC_L28

L30

VCC_L30

M1

VCC_M1

M3

VCC_M3

M5

VCC_M5

M7

VCC_M7

M9

VCC_M9

M23

VCC_M23

M25

VCC_M25

M27

VCC_M27

M29

VCC_M29

M31

VCC_M31

NOCONA 667MHz / 604 PROCESSOR

REV. 0.5-EMTS, ZIF SKT

HETERO 3 OF 4

VCC_N1 VCC_N3 VCC_N5 VCC_N7

VCC_N9 VCC_N23 VCC_N25 VCC_N27 VCC_N29 VCC_N31

VCC_P2

VCC_P4

VCC_P6

VCC_P8 VCC_P24 VCC_P26 VCC_P28 VCC_P30

VCC_R1

VCC_R3

VCC_R5

VCC_R7

VCC_R9 VCC_R23 VCC_R25 VCC_R27 VCC_R29 VCC_R31

VCC_T2

VCC_T4

VCC_T6

VCC_T8 VCC_T24 VCC_T26 VCC_T28 VCC_T30

VCC_U1

VCC_U3

VCC_U5

VCC_U7

VCC_U9 VCC_U23 VCC_U25 VCC_U27 VCC_U29 VCC_U31

VCC_V2

VCC_V4

VCC_V6

VCC_V8 VCC_V24 VCC_V26 VCC_V28 VCC_V30

VCC_W1 VCC_W25 VCC_W27 VCC_W29 VCC_W31

VCC_Y2 VCC_Y16 VCC_Y22 VCC_Y30 VCC_AA1 VCC_AA4 VCC_AA6

VCC_AA20 VCC_AA26 VCC_AA31

VCC_AB2 VCC_AB8

VCC_AB14 VCC_AB18 VCC_AB24 VCC_AB30

VCC_AC3 VCC_AC4

VCC_AC16 VCC_AC22 VCC_AC31

VCC_AD2 VCC_AD6

VCC_AD20 VCC_AD26 VCC_AD30

VCC_AE3 VCC_AE8

VCC_AE14 VCC_AE18 VCC_AE24

N1 N3 N5 N7 N9 N23 N25 N27 N29 N31 P2 P4 P6 P8 P24 P26 P28 P30 R1 R3 R5 R7 R9 R23 R25 R27 R29 R31 T2 T4 T6 T8 T24 T26 T28 T30 U1 U3 U5 U7 U9 U23 U25 U27 U29 U31 V2 V4 V6 V8 V24 V26 V28 V30 W1 W25 W27 W29 W31 Y2 Y16 Y22 Y30 AA1 AA4 AA6 AA20 AA26 AA31 AB2 AB8 AB14 AB18 AB24 AB30 AC3 AC4 AC16 AC22 AC31 AD2 AD6 AD20 AD26 AD30 AE3 AE8 AE14 AE18 AE24

X00_GT_052803

B D

+CPU_VID1

CA

+CPU_VID1

ROOM=PROC_1

4.0V-20%

SUB*_K1098

12

+

C536

560uF

+CPU_VID2

C537

4V-20%

12

+

C538

560uF

4V-20%

12

+

C539

560uF

4V-20%

SUB*_K1098

ROOM=PROC_2

SUB*_K1098

12

C294

+CPU_VID1

+CPU_VID2

+CPU_VTT

+

560uF

4V-20%

ECAD: Place 7 caps on each side of the each CPU

SUB*_D2341

10uF 6.3V

21

10uF 6.3V

1 2

10uF 6.3V

21

SUB*_D2341

10uF 6.3V

21

10uF 6.3V

21

10uF 6.3V

21

C548

C547

560uF

4V-20%

SUB*_D2341

10uF 6.3V

C1520

C1526

21

ECAD: Place these 12 caps in CPU socket cavity

10uF 6.3V

C1547

C1546

1 2

ECAD: Place on back side of planar

10uF 6.3V

C1539

C1538

21

ECAD: Place on back side of planar

SUB*_D2341

10uF 6.3V

C1509

C1510

21

ECAD: Place these 12 caps in CPU socket cavity

10uF 6.3V

C1540

C1534

21

ECAD: Place on back side of planar

10uF 6.3V

C1545

C1516

21

ECAD: Place on back side of planar

12

+

560uF

10uF 6.3V

12

C542

4V-20%

SUB*_D2341

C1525

21

C1548

1 2

C1528

21

SUB*_D2341

C1508

21

C1535

21

C1517

21

+

560uF

4V-20%

SUB*_D2341

10uF 6.3V

21

10uF 6.3V

1 2

10uF 6.3V

21

SUB*_D2341

10uF 6.3V

21

10uF 6.3V

21

10uF 6.3V

C1521

C1549

C1529

C1507

21

12

C540

C543

C1541

C1518

SUB*_K1098

+

560uF

4V-20%

SUB*_K1098

12

+

560uF

4V-20%

SUB*_D2341

10uF 6.3V

21

10uF 6.3V

21

10uF 6.3V

21

SUB*_D2341

10uF 6.3V

21

10uF 6.3V

21

10uF 6.3V

1 2

C545

C1522

C1519

C1506

C1530

C1536

C1515

SUB*_K1098

12

+

560uF

SUB*_K1098

12

+

C549

10uF 6.3V

21

10uF 6.3V

12

+

C546

4V-20%

12

C544

560uF

4V-20%

SUB*_D2341

10uF 6.3V

C1527

21

C1544

21

10uF 6.3V

C1502

21

SUB*_D2341

10uF 6.3V

C1531

21

10uF 6.3V

C1537

C1511

1 2

SUB*_K1098

C550

560uF

4V-20%

SUB*_K1098

+

C541

560uF

4V-20%

SUB*_D2341

C1523

21

10uF 6.3V

C1550

21

C1505

21

SUB*_D2341

C1532

21

C1556

21

10uF 6.3V

C1514

1 2

SUB*_K1098

12

+

560uF

4V-20%

SUB*_K1098

12

+

560uF

SUB*_D2341

10uF 6.3V

21

10uF 6.3V

21

10uF 6.3V

21

SUB*_D2341

10uF 6.3V

21

10uF 6.3V

21

10uF 6.3V

1 2

C551

C552

4V-20%

C1524

C1551

C1542

C1533

C1557

C1512

SUB*_K1098

12

+

SUB*_K1098

12

+

SUB*_D2341

10uF 6.3V

21

10uF 6.3V

X00_GT_052203

12

+

C290

560uF

4V-20%

SUB*_K1098

12

+

C553

560uF

4V-20%

SUB*_D2341

10uF 6.3V

C732

21

10uF 6.3V

C1552

21

X00_GT_052203

10uF 6.3V

C150421C1503

21

SUB*_D2341

10uF 6.3V

C737

21

10uF 6.3V

C1558

21

10uF 6.3V

C1513

1 2

SUB*_K1098

C292

560uF

4V-20%

12

+

C297

4V-20%

10uF 6.3V

C733

10uF 6.3V

C1553

21

10uF 6.3V

C738

10uF 6.3V

C1559

10uF 6.3V

C1543

1 2

12

+

C291

560uF

4V-20%

SUB*_K1098

12

C296

560uF

4V-20%

SUB*_D2341

C734

21

C1554

21

C50021C499

21

SUB*_D2341

10uF 6.3V

C739

21

10uF 6.3V

C1560

21

C511

21

12

+

560uF

4V-20%

SUB*_K1098

+

560uF

4V-20%

SUB*_D2341

10uF 6.3V

C735

21

10uF 6.3V

C1555

21

10uF 6.3V

SUB*_D2341

C736

21

C1561

21

10uF 6.3V

C507

21

12

C289

SUB*_K1098

12

+

C295

560uF

10uF 6.3V

21

10uF 6.3V

21

10uF 6.3V

C1657

21

10uF 6.3V

+

560uF

4V-20%

C1656

C497

C508

21

C293

4V-20%

12

C298

10uF 6.3V

12

+

560uF

4V-20%

SUB*_K1098

+

560uF

4V-20%

C498

21

C509

21

10uF 6.3V

C496

21

10uF 6.3V

C506

1 2

10uF 6.3V

C492

21

10uF 6.3V

C502

1 2

10uF 6.3V

C495

21

10uF 6.3V

C505

1 2

10uF 6.3V

C501

21

10uF 6.3V

C503

1 2

10uF 6.3V

C49421C493

21

10uF 6.3V

C504

1 2

+CPU_VID2

4.0V-20%

10uF 6.3V

1 2

330uF

+

330uF

+

C510

1-21-2004_9:57

x00_tj_041003

4.0V-20% 330uF

1 2

C413

4.0V-20% 330uF

1 2

C414

+

21

C415

+

1

4.0V-20% 330uF

C428

21

4.0V-20% 330uF

1 2

C516

+

C517

+

21

2

3

21

4 4

subsys done

A B

1 2

C1496

21

C1495

22uF 6.3V

SUB*_C5127

x03b_tj_011903

1 2

C1494

22uF 6.3V

C1493

21

C286

22uF 6.3V

1 2

C1450

22uF 6.3V

1 2

C1449

1uF 6.3V

21

1 2

C1391

1uF 6.3V

C1374

0.1uF 16V

C1785

0.1uF 16V

21

0.1uF 16V

X00_GT_062003

PROCESSOR 1 & 2

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

13 OF 611/13/2004

X03

B D

CA

1-21-2004_9:57

1

2

1

2

3

4 4

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

X03

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 14 OF 61

DC

3

ROOM=ITP

B D

CA

1-21-2004_9:57

ROOMS COMPLETE

+CPU_VTT

x00_GT_010704

1 2

0.1uF 16V

12 12 12 12 12 12

1uF

C304

1 2

10V-10%

H_BPM0_N H_BPM1_N H_BPM2_N H_BPM3_N H_BPM4_N H_BPM5_N H_RST_ITP_N

R1913

1 2

100-5%

R80

1 2

0-5%

C76

1

H_RST_N

11,17

x02_tj_081803

2

21

R568

CK_167M_ITP_P

3

CK_167M_ITP_N

3

x00_tj_051203

R550

1 2

40.2-0.5%

21

R219

R220

1 2

40.2-0.5%

ITP PORT

21

R222

R221

1 2

40.2-0.5%

ITP_CONN

1 3 4 5 6 7 8

9 11 12 13 14 15 16 17 18

(FBO)

19220 21 22 23

(BPM5DR#)

25

SUB=NP01

x00_tj_060403

2MM SMT

KEY 26

ITP_JPR

SUB=NP01

K

10

24 26

21

R125

+CPU_VTT

R126

1 2

1 2 3

x00_tj_060403

21

R218

ITP_PWR

680-5%

R160

150-5%

ITP_TDI_H2 ITP_TDO_H1 ITP_TDO_H2

R367

40.2-0.5%

1 2

27.4-1%

x00_tj_051203

1 2

R4

1.5K-5%

12 12 12,15

x00_tj_051203

+3.3V_AUX

75-1%

1 2

R1756

1 2

+CPU_VTT

150-5%

R6001

x00_tj_091603

21

150-5%

NC_ITP_DBA_N

ITP_DBR_N

ITP_TDI_H1

ITP_TMS

ITP_TRST_N

ITP_TCK

NC_ITP_FBI

ITP_TDO_H2

NC_ITP_26_KEY

12 12 12 12

12,15

FOR JTDO:

Install 1-2 for TWO processor system Install 2-3 for UNI processor system

(UNI-PROCESSOR IS WITH PROC_1 INSTALLED ONLY!)

PROC_1 PROC_2

5

TDO

ITP_TDO_H1

ITP_TDI_H2

JTDO

1 2

3

TDITDI

TDO

ITP_TD0_H2

1

2

ITP ROUTING DRAWING

ITP_TDI_H1

R554

2.7K-5%

51

R555

1 2

2.7K-5%

x02_tj_092203

+3.3V_AUX

R374

Q28

3904

1

21

x02_tj_092203

+3.3V_AUX

R375

Q29

3904

1

21

1K-1% H1_THERMTRIP_3V

3

2

1K-1%

1 2

H2_THERMTRIP_3V

3

2

ROOM=PROC_1

5,46

12

ROOM=PROC_2

5,46

12

H1_PROCHOT_N

H2_PROCHOT_N

+CPU_VTT

21

51

R277

H1_THERMTRIP_N

12

3

ECAD: the components within each circuit need to stay clumped

+CPU_VTT

R292

1 2

H2_THERMTRIP_N

12

+CPU_VTT

R308

1 2

+CPU_VTT

51

21

1 2

51

2.7K-5%

R1510

R557

2.7K-5%

R556

3904

21

3904

Q31

1

Q30

1

+3.3V

R376

+3.3V

R377

1 2

21

3

2

1K-1%

3

2

1K-1%

H1_PROCHOT_3V

H2_PROCHOT_3V

+CPU_VTT

R266

51

+CPU_VTT

R312

1 2

21

R419

2.7K-5%

51

R420

2.7K-5%

5

H1_IERR_N

11

5

H2_IERR_N

11

+3.3V

21

1K-1%

R415

H1_IERR_3V

Q68

3

3904

1

21

2

+3.3V

21

1K-1%

R416

H2_IERR_3V

Q69

3

3904

1

21

2

11,17

5,46

NP*

R423

H_MCERR_N

1 2

2.7K-5%

ROOM=PROC_2

5,46

NP*

3904

Q71

+3.3V

NP*

R417

1K-1%

1 2

NC_H_MCERR_3V

3

1

x03b_sd

2

12

R586

H1_BSEL0

R588

H2_BSEL0

ROOM = PROC_1

21

1K-1%

1 2

511-1%

R603

2.7K-5%

R595

H1_BSEL0_3V_N

Q61

3

3904 3904

1

21

2

ROOM = PROC_2

21

1K-1%

21

Q102

1

R597

H2_BSEL0_3V_N

3

2

5

1 2

511-1%

R605

2.7K-5%

5

12

H1_BSEL1

H2_BSEL1

+CPU_VTT +3.3V+CPU_VTT +3.3V

21

R585

1 2

511-1%

R602

2.7K-5%

21

Q53

1

1K-1%

R594

H1_BSEL1_3V_N

3

2

5

3

+CPU_VTT +3.3V+CPU_VTT +3.3V

21

R587

1 2

511-1%

R604

2.7K-5%

21

39043904

Q64

1

1K-1%

R596

H2_BSEL1_3V_N

3

2

5

INVERTING LEVEL TRANSLATION

4 4

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

15 OF 611/13/2004

X03

subsys done

A B

ITP & GTL LEVEL TRANSLATION

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

B D

+1.8V

ROOM = DDR_TERM

8

1

8

RN28

2

7

3

6

71.5

4

5

1

2

x00_tj_051203

3

4 4

1 2 3 4

1 2

100-1%

1 2

100-1%

1 2

100-1%

1 2

100-1%

1 2

100-1%

1 2

100-1%

1 2

100-1%

1 2

100-1%

1%

RN29

71.5 1%

RN30

71.5 1%

RN31

71.5 1%

RN32

71.5 1%

RN33

71.5 1%

RN36

71.5 1%

RN34

71.5 1%

RN35

71.5 1%

RN39

71.5 1%

RN37

71.5 1%

RN38

71.5 1%

RN43

71.5 1%

RN42

71.5 1%

RN41

71.5 1%

RN40

71.5 1%

R380

R382

R385

R387

R389

R391

R393

R395

NP*

8 7 6 5

R381

100-1%

R383

100-1%

R386

100-1%

R388

100-1%

R390

100-1%

R392

100-1%

R394

100-1%

R396

100-1%

21

NP*

DDR2B_A0

DDR2B_A0 DDR2B_A10 DDR2B_A10

DDR2B_A1

DDR2B_A2

DDR2B_A5

DDR2B_A6

DDR2B_A7

DDR2B_A8

DDR2B_A4

DDR2B_A3

DDR2B_A11 DDR2B_A11

DDR2B_A9

DDR2B_BA2 DDR2B_BA2 DDR2B_A12 DDR2B_A12

DDR2B_BA1 DDR2B_BA1 DDR2B_BA0 DDR2B_BA0

DDR2B_CS0_N DDR2B_CS0_N

DDR2B_CAS_N DDR2B_CAS_N

DDR2B_RAS_N DDR2B_RAS_N

DDR2B_A13 DDR2B_A13

DDR2B_CS3_N DDR2B_CS3_N DDR2B_CS2_N DDR2B_CS2_N

x00_tj_061903

DDR2B_CS7_N DDR2B_CS7_N

DDR2B_WE_N DDR2B_WE_N

DDR2B_CS1_N DDR2B_CS1_N DDR2B_CS6_N DDR2B_CS6_N

DDR2B_CS5_N DDR2B_CS5_N DDR2B_CS4_N DDR2B_CS4_N

DDR2_CKE4 DDR2_CKE4 DDR2_CKE2 DDR2_CKE2

DDR2_CKE6 DDR2_CKE6 DDR2_CKE0 DDR2_CKE0

CK_200M_DIMMB3_P

CK_200M_DIMMB3_N

CK_200M_DIMMB1_P

CK_200M_DIMMB1_N

CK_200M_DIMMB2_P

CK_200M_DIMMB2_N

CK_200M_DIMMB0_P

CK_200M_DIMMB0_N

16,21 16,21 16,21 16,21

16,21 16,21

16,21 16,21 16,21 16,21

16,21 16,21

16,21 16,21 16,21 16,21

16,20 16,20 16,20 16,20

x00_tj_051203

16,21

16

1 2 3 4

RN59

71.5 1%

RN58

71.5 1%

RN57

71.5 1%

RN56

71.5 1%

RN55

71.5 1%

RN54

71.5 1%

RN53

71.5 1%

RN52

71.5 1%

RN51

71.5 1%

RN44

71.5 1%

RN45

71.5 1%

RN46

71.5 1%

RN47

71.5 1%

RN50

71.5 1%

RN49

71.5 1%

RN48

71.5 1%

R397

100-1%

R399

100-1%

R401

100-1%

R403

100-1%

R405

100-1%

R409

100-1%

R411

100-1%

R413

100-1%

21

NP*

21

NP*

7 6 5

8 7 6 5

R398

1 2

100-1%

R400

1 2

100-1%

R402

1 2

100-1%

R404

1 2

100-1%

R408

1 2

100-1%

R410

1 2

100-1%

R412

1 2

100-1%

R414

1 2

100-1%

NP*

DDR2A_A10 DDR2A_A10

DDR2A_A0 DDR2A_A0

DDR2A_A2 DDR2A_A2 DDR2A_A1 DDR2A_A1

DDR2A_A6 DDR2A_A6 DDR2A_A5 DDR2A_A5

DDR2A_A8 DDR2A_A8 DDR2A_A7 DDR2A_A7

DDR2A_A3 DDR2A_A3 DDR2A_A4 DDR2A_A4

DDR2A_A9

DDR2A_A9 DDR2A_A11 DDR2A_A11

DDR2A_A12 DDR2A_A12 DDR2A_BA2 DDR2A_BA2

DDR2A_BA0 DDR2A_BA0 DDR2A_BA1 DDR2A_BA1

DDR2A_CAS_N DDR2A_CAS_N DDR2A_CS0_N DDR2A_CS0_N

DDR2A_WE_N

DDR2A_WE_N DDR2A_RAS_N DDR2A_RAS_N

DDR2A_CS3_N DDR2A_CS3_N DDR2A_CS2_N DDR2A_CS2_N

DDR2A_CS7_N DDR2A_CS7_N

DDR2A_A13 DDR2A_A13

DDR2A_CS6_N DDR2A_CS6_N

DDR2A_CS1_N DDR2A_CS1_N

DDR2A_CS5_N DDR2A_CS5_N DDR2A_CS4_N DDR2A_CS4_N

DDR2_CKE1 DDR2_CKE1 DDR2_CKE7 DDR2_CKE7

DDR2_CKE5 DDR2_CKE5 DDR2_CKE3 DDR2_CKE3

CK_200M_DIMMA3_P

CK_200M_DIMMA3_N

CK_200M_DIMMA1_P

CK_200M_DIMMA1_N

CK_200M_DIMMA2_P

CK_200M_DIMMA2_N

CK_200M_DIMMA0_P

CK_200M_DIMMA0_N

16,20 16,20 16,20 16,20

16,20 16,20

16,20 16,20 16,20 16,20

16,21 16,21 16,21 16,21

16,20

16

19

C360

21

.1uF

C358

10V-10%

.1uF

10V-10%

.1uF

10V-10%

.1uF

10V-10%

.1uF

10V-10%

.1uF

10V-10%

.1uF

10V-10%

.1uF

10V-10%

.1uF

10V-10%

.1uF

10V-10%

.1uF

10V-10%

.1uF

10V-10%

.1uF

10V-10%

.1uF

10V-10%

1 2

.1uF

10V-10%

1 2

.1uF

10V-10%

1 2

.1uF

10V-10%

1 2

.1uF

10V-10%

1 2

.1uF

10V-10%

.1uF

10V-10%

C359

C364

C357

C355

C353

C418

C313

C351

C341

C339

C322

C325

C316

C369

C371

C373

C375

C374

C366

21

.1uF

10V-10%

C361

.1uF

10V-10%

C362

.1uF

10V-10%

C356

.1uF

10V-10%

C354

.1uF

10V-10%

C352

.1uF

10V-10%

C419

.1uF

10V-10%

C312

.1uF

10V-10%

C342

.1uF

10V-10%

C340

.1uF

10V-10%

C321

.1uF

10V-10%

C363

.1uF

10V-10%

C323

.1uF

10V-10%

C315

.1uF

10V-10%

C370

1 2

.1uF

10V-10%

C372

1 2

.1uF

10V-10%

C314

1 2

.1uF

10V-10%

C368

1 2

.1uF

10V-10%

C365

1 2

.1uF

10V-10%

C367

1 2

.1uF

10V-10%

21

x00_tj_060503

C73

21

1 2

10uF 6.3V

21

C79

21

10uF 6.3V

21

CAD Notes:

1) Place one cap near every 2 signals

2) Place 10uF caps at each end of row

DDR2B_DQS0_P

21

DDR2B_DQS0_N

21

DDR2B_DQS1_P

21

DDR2B_DQS1_N

21

DDR2B_DQS2_P

21

DDR2B_DQS2_N

21

DDR2B_DQS3_P

21

DDR2B_DQS3_N

21

DDR2B_DQS4_P

21

DDR2B_DQS4_N

21

DDR2B_DQS5_P

21

DDR2B_DQS5_N

21

DDR2B_DQS6_P

21

DDR2B_DQS6_N

21

DDR2B_DQS7_P

21

DDR2B_DQS7_N

21

DDR2B_DQS8_P

21

DDR2B_DQS8_N

21

DDR2B_DQS9_P

21

DDR2B_DQS9_N

21

DDR2B_DQS10_P

21

DDR2B_DQS10_N

21

DDR2B_DQS11_P

21

DDR2B_DQS11_N

21

DDR2B_DQS12_P

21

DDR2B_DQS12_N

21

DDR2B_DQS13_P

21

DDR2B_DQS13_N

21

DDR2B_DQS14_P

21

DDR2B_DQS14_N

21

DDR2B_DQS15_P

21

DDR2B_DQS15_N

21

DDR2B_DQS16_P

21

DDR2B_DQS16_N

21

DDR2B_DQS17_P

21

DDR2B_DQS17_N

21

DDR2B_A0

16,21

DDR2B_A1

16,21

DDR2B_A2

16,21

DDR2B_A3

16,21

DDR2B_A4

16,21

DDR2B_A5

16,21

DDR2B_A6

16,21

DDR2B_A7

16,21

DDR2B_A8

16,21

DDR2B_A9

16,21

DDR2B_A10

16,21

DDR2B_A11

16,21

DDR2B_A12

16,21

DDR2B_A13

16,21

DDR2B_BA0

16,21

DDR2B_BA1

16,21

DDR2B_BA2

16,21

DDR2B_WE_N

16,21

DDR2B_CAS_N

16,21

DDR2B_RAS_N

16,21

DDR2_CKE4

16,20

DDR2_CKE5

16,21

DDR2_CKE6

16,20

DDR2_CKE7

16,21

DDR2B_CS0_N

16,21

DDR2B_CS1_N

16,21

DDR2B_CS2_N

16,21

DDR2B_CS3_N

16,21

DDR2B_CS4_N

16,21

DDR2B_CS5_N

16,21

DDR2B_CS6_N

16,21

DDR2B_CS7_N

16,21

16 16

23

CK_200M_DIMMB1_P CK_200M_DIMMB1_N CK_200M_DIMMB2_P CK_200M_DIMMB2_N CK_200M_DIMMB3_P CK_200M_DIMMB3_N CK_200M_DIMMB0_P CK_200M_DIMMB0_N

DDR2B_MCH_VREF

16,21 16,21 16,21 16,21 16,21 16,21

SUB=SUB*_Y4625

1U Heatsink assembly

2U/5U Heatsink assembly

AM28

B_DQS0_P

AN29

B_DQS0_N

AM22

B_DQS1_P

AN23

B_DQS1_N

AK17

B_DQS2_P

AL17

B_DQS2_N

AK11

B_DQS3_P

AL11

B_DQS3_N

AG2

B_DQS4_P

AH2

B_DQS4_N

AA3

B_DQS5_P

AB4

B_DQS5_N

P1

B_DQS6_P

R2

B_DQS6_N

H3

B_DQS7_P

H1

B_DQS7_N

AK5

B_DQS8_P

AK6

B_DQS8_N

AK29

B_DQS9_P

AL29

B_DQS9_N

AK23

B_DQS10_P

AL23

B_DQS10_N

AN18

B_DQS11_P

AN17

B_DQS11_N

AN12

B_DQS12_P

AN11

B_DQS12_N

AJ1

B_DQS13_P

AH1

B_DQS13_N

AB2

B_DQS14_P

AB1

B_DQS14_N

T2

B_DQS15_P

R3

B_DQS15_N

J3

B_DQS16_P

J2

B_DQS16_N

AM6

B_DQS17_P

AN6

B_DQS17_N

AF7

B_MA0

AE14

B_MA1

AN14

B_MA2

AK14

B_MA3

AD15

B_MA4

AH16

B_MA5

AG17

B_MA6

AD18

B_MA7

AL20

B_MA8

AJ21

B_MA9

AC4

B_MA10

AH22

B_MA11

AH23

B_MA12

U4

B_MA13

AA8

B_BA0

AE7

B_BA1

AM25

B_BA2

W4

B_WE

W1

B_CAS

Y9

B_RAS

AH26

CKE4

AJ27

CKE5

AJ28

CKE6

AH28

CKE7

V9

B_CS0

V2

B_CS1

T7

B_CS2

P6

B_CS3

N4

B_CS4

M2

B_CS5

M6

B_CS6

L3

B_CS7

AH7

B_CMDCLK0_P

AJ6

B_CMDCLK0_N

AH6

B_CMDCLK1_P

AG6

B_CMDCLK1_N

AG8

B_CMDCLK2_P

AE8

B_CMDCLK2_N

AK9

B_CMDCLK3_P

AL8

B_CMDCLK3_N

AN4

B_VREF

INTEL LINDENHURST MCH V0P21

x02_tj_041003 x03_tj_121503 x03b_tj_012004

CA

MCH

DDR2B_SD0_0

AM30

B_DQ0 B_DQ1 B_DQ2 B_DQ3 B_DQ4 B_DQ5 B_DQ6 B_DQ7

B_DQ8

B_DQ9 B_DQ10 B_DQ11 B_DQ12 B_DQ13 B_DQ14 B_DQ15

B_DQ16 B_DQ17 B_DQ18 B_DQ19 B_DQ20 B_DQ21 B_DQ22 B_DQ23

B_DQ24 B_DQ25 B_DQ26 B_DQ27 B_DQ28 B_DQ29 B_DQ30 B_DQ31

B_DQ32 B_DQ33 B_DQ34 B_DQ35 B_DQ36 B_DQ37 B_DQ38 B_DQ39

B_DQ40 B_DQ41 B_DQ42 B_DQ43 B_DQ44 B_DQ45 B_DQ46 B_DQ47

B_DQ48 B_DQ49 B_DQ50 B_DQ51 B_DQ52 B_DQ53 B_DQ54 B_DQ55

B_DQ56 B_DQ57 B_DQ58 B_DQ59 B_DQ60 B_DQ61 B_DQ62 B_DQ63

B_CB0

B_CB1

B_CB2

B_CB3

B_CB4

B_CB5

B_CB6

B_CB7

HETERO 3 OF 7

ADD=ADD02_W1549_MCHHTSNK1

ADD1=ADD13_X1306_MCHHTSNK2

AN30 AN27 AM27 AK30 AM31 AL28 AK27

AM24 AN24 AN21 AM21 AL25 AK24 AL22 AK21

AK18 AM18 AN15 AM15 AL19 AM19 AM16 AL16

AK12 AM12 AN9 AM9 AL13 AM13 AM10 AL10

AJ3 AJ4 AF1 AF4 AK3 AK2 AG3 AF3

AC3 AC1 Y3 Y4 AD2 AD3 AA2 Y1

T4 T1 N1 N2 U3 U1 P3 P4

K2 K1 F2 E1 L1 K4 G1 G2

AM7 AL7 AM4 AL4 AN8 AK8 AN5 AL5

x00_tj_041003

DDR2B_SD0_1 DDR2B_SD0_2 DDR2B_SD0_3 DDR2B_SD0_4 DDR2B_SD0_5 DDR2B_SD0_6 DDR2B_SD0_7

DDR2B_SD1_0 DDR2B_SD1_1 DDR2B_SD1_2 DDR2B_SD1_3 DDR2B_SD1_4 DDR2B_SD1_5 DDR2B_SD1_6 DDR2B_SD1_7

DDR2B_SD2_0 DDR2B_SD2_1 DDR2B_SD2_2 DDR2B_SD2_3 DDR2B_SD2_4 DDR2B_SD2_5 DDR2B_SD2_6 DDR2B_SD2_7

DDR2B_SD3_0 DDR2B_SD3_1 DDR2B_SD3_2 DDR2B_SD3_3 DDR2B_SD3_4 DDR2B_SD3_5 DDR2B_SD3_6 DDR2B_SD3_7

DDR2B_SD4_0 DDR2B_SD4_1 DDR2B_SD4_2 DDR2B_SD4_3 DDR2B_SD4_4 DDR2B_SD4_5 DDR2B_SD4_6 DDR2B_SD4_7

DDR2B_SD5_0 DDR2B_SD5_1 DDR2B_SD5_2 DDR2B_SD5_3 DDR2B_SD5_4 DDR2B_SD5_5 DDR2B_SD5_6 DDR2B_SD5_7

DDR2B_SD6_0 DDR2B_SD6_1 DDR2B_SD6_2 DDR2B_SD6_3 DDR2B_SD6_4 DDR2B_SD6_5 DDR2B_SD6_6 DDR2B_SD6_7

DDR2B_SD7_0 DDR2B_SD7_1 DDR2B_SD7_2 DDR2B_SD7_3 DDR2B_SD7_4 DDR2B_SD7_5 DDR2B_SD7_6 DDR2B_SD7_7

DDR2B_CB0 DDR2B_CB1 DDR2B_CB2 DDR2B_CB3 DDR2B_CB4 DDR2B_CB5 DDR2B_CB6 DDR2B_CB7

ROOM = MCH

21 21 21 21 21 21 21 21

16,20 16,20 16,20 16,20 16,20 16,20

16 16

23

16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20

16,20 16,20 16,20

16,20 16,21 16,20 16,21

16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20

20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20

DDR2A_DQS0_P DDR2A_DQS0_N DDR2A_DQS1_P DDR2A_DQS1_N DDR2A_DQS2_P DDR2A_DQS2_N DDR2A_DQS3_P DDR2A_DQS3_N DDR2A_DQS4_P DDR2A_DQS4_N DDR2A_DQS5_P DDR2A_DQS5_N DDR2A_DQS6_P DDR2A_DQS6_N DDR2A_DQS7_P DDR2A_DQS7_N DDR2A_DQS8_P DDR2A_DQS8_N DDR2A_DQS9_P DDR2A_DQS9_N DDR2A_DQS10_P DDR2A_DQS10_N DDR2A_DQS11_P DDR2A_DQS11_N DDR2A_DQS12_P DDR2A_DQS12_N DDR2A_DQS13_P DDR2A_DQS13_N DDR2A_DQS14_P DDR2A_DQS14_N DDR2A_DQS15_P DDR2A_DQS15_N DDR2A_DQS16_P DDR2A_DQS16_N DDR2A_DQS17_P DDR2A_DQS17_N

DDR2A_A0 DDR2A_A1 DDR2A_A2 DDR2A_A3 DDR2A_A4 DDR2A_A5 DDR2A_A6 DDR2A_A7 DDR2A_A8 DDR2A_A9 DDR2A_A10 DDR2A_A11 DDR2A_A12 DDR2A_A13

DDR2A_BA0 DDR2A_BA1 DDR2A_BA2

DDR2A_WE_N DDR2A_CAS_N DDR2A_RAS_N

DDR2_CKE0 DDR2_CKE1 DDR2_CKE2 DDR2_CKE3

DDR2A_CS0_N DDR2A_CS1_N DDR2A_CS2_N DDR2A_CS3_N DDR2A_CS4_N DDR2A_CS5_N DDR2A_CS6_N DDR2A_CS7_N

CK_200M_DIMMA1_P CK_200M_DIMMA1_N CK_200M_DIMMA2_P CK_200M_DIMMA2_N CK_200M_DIMMA3_P CK_200M_DIMMA3_N CK_200M_DIMMA0_P CK_200M_DIMMA0_N

DDR2A_MCH_VREF

ROOM=MCH

AJ30

A_DQS0_P

AJ31

A_DQS0_N

AJ24

A_DQS1_P

AJ25

A_DQS1_N

AH19

A_DQS2_P

AH20

A_DQS2_N

AG14

A_DQS3_P

AG15

A_DQS3_N

AC6

A_DQS4_P

AD6

A_DQS4_N

W7

A_DQS5_P

V8

A_DQS5_N

N7

A_DQS6_P

P7

A_DQS6_N

G4

A_DQS7_P

H4

A_DQS7_N

AF9

A_DQS8_P

AG9

A_DQS8_N

AL32

A_DQS9_P

AL31

A_DQS9_N

AF25

A_DQS10_P

AF24

A_DQS10_N

AE20

A_DQS11_P

AE19

A_DQS11_N

AH14

A_DQS12_P

AJ13

A_DQS12_N

AD8

A_DQS13_P

AC7

A_DQS13_N

Y7

A_DQS14_P

Y6

A_DQS14_N

P10

A_DQS15_P

N10

A_DQS15_N

J6

A_DQS16_P

H6

A_DQS16_N

AH8

A_DQS17_P

AJ7

A_DQS17_N

AH5

A_MA0

AD14

A_MA1

AL14

A_MA2

AK15

A_MA3

AJ16

A_MA4

AH17

A_MA5

AF18

A_MA6

AN20

A_MA7

AK20

A_MA8

AJ22

A_MA9

AE4

A_MA10

AF22

A_MA11

AG23

A_MA12

U6

A_MA13

AB5

A_BA0

AF6

A_BA1

AE25

A_BA2

Y10

A_WE

W8

A_CAS

AA6

A_RAS

AE26

CKE0

AN26

CKE1

AL26

CKE2

AK26

CKE3

W2

A_CS0

V3

A_CS1

T8

A_CS2

T10

A_CS3

N5

A_CS4

M5

A_CS5

M3

A_CS6

L4

A_CS7

AF13

A_CMDCLK0_P

AF12

A_CMDCLK0_N

AH11

A_CMDCLK1_P

AJ12

A_CMDCLK1_N

AH13

A_CMDCLK2_P

AG12

A_CMDCLK2_N

AC10

A_CMDCLK3_P

AD9

A_CMDCLK3_N

AM3

A_VREF

INTEL LINDENHURST MCH V0P21

HETERO 4 OF 7

A_DQ0 A_DQ1 A_DQ2 A_DQ3 A_DQ4 A_DQ5 A_DQ6 A_DQ7

A_DQ8

A_DQ9 A_DQ10 A_DQ11 A_DQ12 A_DQ13 A_DQ14 A_DQ15

A_DQ16 A_DQ17 A_DQ18 A_DQ19 A_DQ20 A_DQ21 A_DQ22 A_DQ23

A_DQ24 A_DQ25 A_DQ26 A_DQ27 A_DQ28 A_DQ29 A_DQ30 A_DQ31

A_DQ32 A_DQ33 A_DQ34 A_DQ35 A_DQ36 A_DQ37 A_DQ38 A_DQ39

A_DQ40 A_DQ41 A_DQ42 A_DQ43 A_DQ44 A_DQ45 A_DQ46 A_DQ47

A_DQ48 A_DQ49 A_DQ50 A_DQ51 A_DQ52 A_DQ53 A_DQ54 A_DQ55

A_DQ56 A_DQ57 A_DQ58 A_DQ59 A_DQ60 A_DQ61 A_DQ62 A_DQ63

A_CB0

A_CB1

A_CB2

A_CB3

A_CB4

A_CB5

A_CB6

A_CB7

MCH

AK32 AH31 AH29 AF28 AJ33 AK33 AG30 AG29

AG27 AG26 AD24 AD23 AE28 AF27 AH25 AG24

AF21 AG21 AF19 AG18 AE22 AD21 AJ18 AG20

AF16 AF15 AE13 AD12 AE17 AJ15 AE16 AD17

AH4 AG5 AB8 AB7 AB10 AA9 AE5 AD5

U9 AA5 V6 U7 W10 U10 W5 V5

R6 R5 L7 L6 P9 T5 N8 M9

K5 J5 K8 K10 L9 L10 K7 H7

AJ9 AG11 AE11 AD11 AJ10 AH10 AF10 AE10

DDR2A_SD0_0 DDR2A_SD0_1 DDR2A_SD0_2 DDR2A_SD0_3 DDR2A_SD0_4 DDR2A_SD0_5 DDR2A_SD0_6 DDR2A_SD0_7

DDR2A_SD1_0 DDR2A_SD1_1 DDR2A_SD1_2 DDR2A_SD1_3 DDR2A_SD1_4 DDR2A_SD1_5 DDR2A_SD1_6 DDR2A_SD1_7

DDR2A_SD2_0 DDR2A_SD2_1 DDR2A_SD2_2 DDR2A_SD2_3 DDR2A_SD2_4 DDR2A_SD2_5 DDR2A_SD2_6 DDR2A_SD2_7

DDR2A_SD3_0 DDR2A_SD3_1 DDR2A_SD3_2 DDR2A_SD3_3 DDR2A_SD3_4 DDR2A_SD3_5 DDR2A_SD3_6 DDR2A_SD3_7

DDR2A_SD4_0 DDR2A_SD4_1 DDR2A_SD4_2 DDR2A_SD4_3 DDR2A_SD4_4 DDR2A_SD4_5 DDR2A_SD4_6 DDR2A_SD4_7

DDR2A_SD5_0 DDR2A_SD5_1 DDR2A_SD5_2 DDR2A_SD5_3 DDR2A_SD5_4 DDR2A_SD5_5 DDR2A_SD5_6 DDR2A_SD5_7

DDR2A_SD6_0 DDR2A_SD6_1 DDR2A_SD6_2 DDR2A_SD6_3 DDR2A_SD6_4 DDR2A_SD6_5 DDR2A_SD6_6 DDR2A_SD6_7

DDR2A_SD7_0 DDR2A_SD7_1 DDR2A_SD7_2 DDR2A_SD7_3 DDR2A_SD7_4 DDR2A_SD7_5 DDR2A_SD7_6 DDR2A_SD7_7

DDR2A_CB0 DDR2A_CB1 DDR2A_CB2 DDR2A_CB3 DDR2A_CB4 DDR2A_CB5 DDR2A_CB6 DDR2A_CB7

20 20 20 20 20 20 20 20

1

2

3

subsys done

These can be left floating

But BIOS must turn them off

A B

MCH & DDR TERM

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

16 OF 611/13/2004

X03

B D

CA

LINDENHURST MCH MCH REFDES = MCH

1

CK_167M_MCH_N

3

CK_167M_MCH_P

3

H_ADS_N

11

H_A3_N

11

H_A4_N

11

H_A5_N

11

H_A6_N

11

H_A7_N

11

H_A8_N

11

H_A9_N

11

H_A10_N

11

H_A11_N

11

H_A12_N

11

H_A13_N

11

H_A14_N

11

H_A15_N

11

H_A16_N

11

H_A17_N

11

H_A18_N

11

H_A19_N

11

H_A20_N

11

H_A21_N

11

H_A22_N

11

H_A23_N

11

H_A24_N

11

H_A25_N

11

H_A26_N

11

H_A27_N

11

H_A28_N

11

H_A29_N

11

H_A30_N

11

H_A31_N

11

H_A32_N

MCH_HDACVREF

17

11 11 11 11

11 11

11

11 11

11 11 11 11 11 11

11 11 11 11

11 11 11 11 11

11

11 11

11,15

MCH_HCRES0

17

MCH_HODTCRES

17

MCH_HSLWCRES

17

H_A33_N H_A34_N H_A35_N

H_ADSTB0_N H_ADSTB1_N

H_AP0_N H_AP1_N

H_BPRI_N

H_BINIT_N H_BNR_N

H_DRDY_N H_DBSY_N H_DEFER_N H_HIT_N H_HITM_N H_LOCK_N

H_RS0_N H_RS1_N H_RS2_N H_RSP_N

H_REQ0_N H_REQ1_N H_REQ2_N H_REQ3_N H_REQ4_N

H_TRDY_N

H_BREQ0_N H_BREQ1_N

H_MCERR_N

2

3

ROOM=MCH

J11

BCLKN

K11

BCLKP

B27

ADS

K22

A3

J20

A4

G23

A5

G22

A6

H21

A7

K19

A8

H19

A9

G19

A10

E22

A11

E21

A12

F18

A13

E19

A14

F21

A15

F20

A16

D26

A17

C26

A18

A26

A19

D22

A20

B22

A21

A25

A22

B25

A23

D25

A24

C24

A25

A22

A26

B21

A27

D23

A28

A23

A29

B24

A30

A20

A31

D19

A32

C20

A33

C21

A34

D20

A35

G20

ADSTB0

C23

ADSTB1

G25

AP0

H25

AP1

A28

BPRI

G26

BINIT

B31

BNR

B30

DRDY

H27

DBSY

B28

DEFER

E30

HIT

D28

HITM

C30

LOCK

F29

RS0

D31

RS1

G28

RS2

J26

RSP

K20

HREQ0

J21

HREQ1

J23

HREQ2

H22

HREQ3

K23

HREQ4

A30

TRDY

F24

BREQ0

D29

BREQ1

H24

MCERR

C27

HCRES0

E27

H0DTCRES

F26

HSLWCRES

E13

HDVREF1

D13

HDVREF0

F23

HACVREF

INTEL LINDENHURST MCH V0P21

MCH

HETERO 1 OF 7

D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63

DP0 DP1 DP2 DP3

DBINV0 DBINV1 DBINV2 DBINV3

DSTBN0 DSTBP0 DSTBN1 DSTBP1 DSTBN2 DSTBP2 DSTBN3 DSTBP3

ROOM = MCH

C18

D0

B19

D1

C14

D2

A17

D3

A19

D4

B16

D5

C17

D6

B18

D7

D17

D8

A16

D9

B13 A14 A13 D14 C12 B12 E18 J18 H18 F17 G17 K17 E16 J17 J14 F14 F15 G16 K16 H16 G14 K14 E12 C11 H13 F11 G13 D11 E9 F12 G10 D8 H10 F8 J12 G11 K13 H12 B10 A10 A11 C9 B9 C8 B6 B7 E7 B4 A4 B3 D5 C6 D7 C5

C29 E28 E25 F27

D16 E15 F9 A5

B15 C15 H15 J15 D10 E10 A8 A7

H_D0_N H_D1_N H_D2_N H_D3_N H_D4_N H_D5_N H_D6_N H_D7_N H_D8_N

H_D9_N H_D10_N H_D11_N H_D12_N H_D13_N H_D14_N H_D15_N H_D16_N H_D17_N H_D18_N H_D19_N H_D20_N H_D21_N H_D22_N H_D23_N H_D24_N H_D25_N H_D26_N H_D27_N H_D28_N H_D29_N H_D30_N H_D31_N H_D32_N H_D33_N H_D34_N H_D35_N H_D36_N H_D37_N H_D38_N H_D39_N H_D40_N H_D41_N H_D42_N H_D43_N H_D44_N H_D45_N H_D46_N H_D47_N H_D48_N H_D49_N H_D50_N H_D51_N H_D52_N H_D53_N H_D54_N H_D55_N H_D56_N H_D57_N H_D58_N H_D59_N H_D60_N H_D61_N H_D62_N H_D63_N

H_DP0_N H_DP1_N H_DP2_N H_DP3_N

H_DBI0_N H_DBI1_N H_DBI2_N H_DBI3_N

H_DSTBN0_N H_DSTBP0_N H_DSTBN1_N H_DSTBP1_N H_DSTBN2_N H_DSTBP2_N H_DSTBN3_N H_DSTBP3_N

11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11

11 11 11 11

11 11 11 11 11 11 11 11

ITP_TMS_MCH

17

ITP_TDI_MCH

17

ITP_TDO_MCH

17

ITP_TRST_MCH_N

17

ITP_TCK1_MCH

17

+1.5V

R1313

1 2

43.2-1%

PROPAGATION_DELAY=L:S::750

+CPU_VTT

RN7672RN76

1K-5%

1 8

680-5%

1K-5%

RN76

54

x00_tj_052003

R180

31 31

29 29

31 31

1K-5%

RN76

EXP_A_UP_0P EXP_A_UP_0N

EXP_A_UP_1P EXP_A_UP_1N

EXP_A_UP_2P EXP_A_UP_2N

EXP_A_UP_3P EXP_A_UP_3N

EXP_A_UP_4P EXP_A_UP_4N

EXP_A_UP_5P EXP_A_UP_5N

EXP_A_UP_6P EXP_A_UP_6N

EXP_A_UP_7P EXP_A_UP_7N

EXP_B_UP_0P EXP_B_UP_0N

EXP_B_UP_1P EXP_B_UP_1N

EXP_B_UP_2P EXP_B_UP_2N

EXP_B_UP_3P EXP_B_UP_3N

EXP_B_UP_4P EXP_B_UP_4N

EXP_B_UP_5P EXP_B_UP_5N

EXP_B_UP_6P EXP_B_UP_6N

EXP_B_UP_7P EXP_B_UP_7N

EXP_C_UP_0P EXP_C_UP_0N

EXP_C_UP_1P EXP_C_UP_1N

EXP_C_UP_2P EXP_C_UP_2N

EXP_C_UP_3P EXP_C_UP_3N

EXP_C_UP_4P EXP_C_UP_4N

EXP_C_UP_5P EXP_C_UP_5N

EXP_C_UP_6P EXP_C_UP_6N

EXP_C_UP_7P EXP_C_UP_7N

11,15

5,33

1K-5%

3 6

4 4

5

33

33 33

18

3

18

17 17

CK_100M_MCH_P CK_100M_MCH_N

NC_MCH_TESTIN_N PCI_RST_MCH_N

H_RST_N MCH_PME_N MCH_GPE_N

HLA_STBS HLA_STBF

HLA_MCH_SWING CK_66M_MCH

HIRCOMP_MCH

HLA_MCH_VREF SYSTEM_PWRGOOD_CHIPSET ICH_SEG0_MCH_SCL

ICH_SEG0_MCH_SDA

ITP_TMS_MCH

17

ITP_TDI_MCH

17

ITP_TDO_MCH

17

ITP_TCK1_MCH

17

ITP_TRST_MCH_N

17

DDRCRES1

18

DDRCRES2

18

NC_MCH_AF30 NC_MCH_AE23 NC_MCH_AD20 NC_MCH_AJ19 NC_MCH_R10 NC_MCH_R9 NC_MCH_R8 NC_MCH_M8

R33

EXP_A_RXP_0

P33

EXP_A_RXN_0

N28

EXP_A_RXP_1

N29

EXP_A_RXN_1

L31

EXP_A_RXP_2

L30

EXP_A_RXN_2

J33

EXP_A_RXP_3

J32

EXP_A_RXN_3

R26

EXP_A_RXP_4

R27

EXP_A_RXN_4

N25

EXP_A_RXP_5

N26

EXP_A_RXN_5

M27

EXP_A_RXP_6

M26

EXP_A_RXN_6

K29

EXP_A_RXP_7

K28

EXP_A_RXN_7

AG33

EXP_B_RXP_0

AF33

EXP_B_RXN_0

AE32

EXP_B_RXP_1

AD32

EXP_B_RXN_1

AC30

EXP_B_RXP_2

AD30

EXP_B_RXN_2

AC31

EXP_B_RXP_3

AB31

EXP_B_RXN_3

AD29

EXP_B_RXP_4

AE29

EXP_B_RXN_4

AC25

EXP_B_RXP_5

AC24

EXP_B_RXN_5

AB26

EXP_B_RXP_6

AB25

EXP_B_RXN_6

Y25

EXP_B_RXP_7

Y24

EXP_B_RXN_7

Y28

EXP_C_RXP_0

Y27

EXP_C_RXN_0

Y30

EXP_C_RXP_1

Y31

EXP_C_RXN_1

AA30

EXP_C_RXP_2

AA29

EXP_C_RXN_2

V33

EXP_C_RXP_3

V32

EXP_C_RXN_3

T32

EXP_C_RXP_4

T31

EXP_C_RXN_4

R30

EXP_C_RXP_5

R29

EXP_C_RXN_5

V27

EXP_C_RXP_6

V26

EXP_C_RXN_6

V24

EXP_C_RXP_7

U24

EXP_C_RXN_7

T23 U33

EXP_CLK_P EXP_COMP0

R24

EXP_CLK_N

L12

TESTIN

C2

RESET_IN

J24

CPURST

M24

PME

L25

GPE

E31

HI_STBS

D32

HI_STBF

H31

HISWING

L24

HICLK

K25

HIRCOMP

F32

HIVREF

E3

PWRGOOD

C3

SMBCLK

D4

SMBDATA

F3

TMS

G5

TDI

G6

TDO

D2

TCK

J9

TRST

AE2

DDR_RES1

AE1

DDR_RES2

AF30

RESERVED_AF30

AE23

RESERVED_AE23

AD20

RESERVED_AD20

AJ19

RESERVED_AJ19

R10

RESERVED_R10

R9

RESERVED_R9

R8

RESERVED_R8

M8

RESERVED_M8

21

ROOM=MCH

+CPU_VTT

220pF

50V-10%

x00_tj_051203

21

1uF

C119121R378

10V-10%

R983

1 2

754mV

49.9-1%

84.5-1%

27,31,35

ICH_SEG0_SDA

ICH_SEG0_SCL

R1425

0-5%

R1424

1 2

0-5%

21

ICH_SEG0_MCH_SDA

ICH_SEG0_MCH_SCL

4 4

MCH_HCRES0

17

MCH_HODTCRES

17

MCH_HSLWCRES

17

subsys done

x00_tj_051203

21

R982

MCH_HDACVREF

17

21

750-1%

R1057

1 2

49.9-1%

374-1%

MRGN_MHDAC

1

1 3 4

TSM 2X2 SMT HDR

R1547

12

C1198

NP01

2

43

NP*

A B

+3.3V

R1406

1 2

21

R1407

8.2K-5%

NP*

8.2K-5%

NP*

17

MCH

EXP_A_TXP_0 EXP_A_TXN_0

EXP_A_TXP_1 EXP_A_TXN_1

EXP_A_TXP_2 EXP_A_TXN_2

EXP_A_TXP_3 EXP_A_TXN_3

EXP_A_TXP_4 EXP_A_TXN_4

EXP_A_TXP_5 EXP_A_TXN_5

EXP_A_TXP_6 EXP_A_TXN_6

EXP_A_TXP_7 EXP_A_TXN_7

EXP_B_TXP_0 EXP_B_TXN_0

EXP_B_TXP_1 EXP_B_TXN_1

EXP_B_TXP_2 EXP_B_TXN_2

EXP_B_TXP_3 EXP_B_TXN_3

EXP_B_TXP_4 EXP_B_TXN_4

EXP_B_TXP_5 EXP_B_TXN_5

EXP_B_TXP_6 EXP_B_TXN_6

EXP_B_TXP_7 EXP_B_TXN_7

EXP_C_TXP_0 EXP_C_TXN_0

EXP_C_TXP_1 EXP_C_TXN_1

EXP_C_TXP_2 EXP_C_TXN_2

EXP_C_TXP_3 EXP_C_TXN_3

EXP_C_TXP_4 EXP_C_TXN_4

EXP_C_TXP_5 EXP_C_TXN_5

EXP_C_TXP_6 EXP_C_TXN_6

EXP_C_TXP_7 EXP_C_TXN_7

EXP_COMP1

EXPHPINTR_N

VCCBGEXP VSSBGEXP

P30 P31

N31 N32

M33 M32

K32 K31

P24 P25

P27 P28

M30 M29

L28 L27

AG32 AH32

AF31 AE31

AC33 AD33

AB32 AA32

AD27 AD26

AC27 AC28

AB29 AB28

AA27 AA26

W26 W25

W28 W29

Y33 AA33

W32 W31

U31 U30

V30 V29

T29 T28

T26 T25

U25 E6 U27

(MCH_VSSBGEXP)

U28

EXP_A_DN_0P_C EXP_A_DN_0N_C

EXP_A_DN_1P_C EXP_A_DN_1N_C

EXP_A_DN_2P_C EXP_A_DN_2N_C

EXP_A_DN_3P_C EXP_A_DN_3N_C

EXP_A_DN_4P_C EXP_A_DN_4N_C

EXP_A_DN_5P_C EXP_A_DN_5N_C

EXP_A_DN_6P_C EXP_A_DN_6N_C

EXP_A_DN_7P_C EXP_A_DN_7N_C

EXP_B_DN_0P_C EXP_B_DN_0N_C

EXP_B_DN_1P_C EXP_B_DN_1N_C

EXP_B_DN_2P_C EXP_B_DN_2N_C

EXP_B_DN_3P_C EXP_B_DN_3N_C

EXP_B_DN_4P_C EXP_B_DN_4N_C

EXP_B_DN_5P_C EXP_B_DN_5N_C

EXP_B_DN_6P_C EXP_B_DN_6N_C

EXP_B_DN_7P_C EXP_B_DN_7N_C

EXP_C_DN_0P_C EXP_C_DN_0N_C

EXP_C_DN_1P_C EXP_C_DN_1N_C

EXP_C_DN_2P_C EXP_C_DN_2N_C

EXP_C_DN_3P_C EXP_C_DN_3N_C

EXP_C_DN_4P_C EXP_C_DN_4N_C

EXP_C_DN_5P_C EXP_C_DN_5N_C

EXP_C_DN_6P_C EXP_C_DN_6N_C

EXP_C_DN_7P_C EXP_C_DN_7N_C

MCH_EXP_COMP

MCH_VCCBGEXP

17 17

17

+1.5V

NP

H33

V3REF

DDRSLWCRES

DDRCRES0

DDRIMPCRES

PLLSEL[1] PLLSEL[0]

3.3V

DEBUG7 DEBUG6 DEBUG5 DEBUG4 DEBUG3 DEBUG2 DEBUG1 DEBUG0

TDIOCATHODE

TDIOANODE

RESERVED_AA24

RESERVED_R32 RESERVED_L33

INTEL LINDENHURST MCH V0P21

HETERO 2 OR 7

HI11 HI10

HI9 HI8 HI7 HI6 HI5 HI4 HI3 HI2 HI1 HI0

AK1 AC9 AL2 A29 C31

G32 J29 E33 F30 J27 K26 H28 G29 G31 C32 H30 J30

D1 L11 D3 B2 H9 G8 G7 J8

F33 D33 AA24 R32 L33

DDRSLWCRES

DDRCRES0

DDRIMPCRES MCH_PLLSTRAP_1 MCH_PLLSTRAP_0

HLA_11

33

HLA_10

33

HLA_9

33

HLA_8

33

HLA_7

33

HLA_6

33

HLA_5

33

HLA_4

33

HLA_3

33

HLA_2

33

HLA_1

33

HLA_0

33

NC_ITP_MCH_DEBUG7 NC_ITP_MCH_DEBUG6 NC_ITP_MCH_DEBUG5 NC_ITP_MCH_DEBUG4 NC_ITP_MCH_DEBUG3 NC_ITP_MCH_DEBUG2 NC_ITP_MCH_DEBUG1 NC_ITP_MCH_DEBUG0

NC_MCH_TD_CATHODE

NC_MCH_TD_ANODE NC_MCH_RES_AA24

NC_MCH_RES_R32 NC_MCH_RES_L33

18

R1605

18 18

220

x02_tj_091903

1K-5%

1 2

R1606

21

MCH & PCI EXPRESS CAPS

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

+1.5V

+3.3V

4.7K

24.9-1%

R1604

R1001

1 2

21

MCH_EXPHPINTR_N

+1.5V+3.3V

NP

21

R1082

220

1K-5%

R1247

1 2

C1738

.1uF

21

NET_PHYSICAL_TYPE=PWR PROPAGATION_DELAY=L:S::1200

10V-10%

+3.3V

TLV431A

31

R5

220

2 1

21

R12

R181

1 2

1K-1%1K-1%

x00_tj_051203

100K-1%

D33

4

53

EXP_A_DN_0P_C

17

EXP_A_DN_0N_C

17

EXP_A_DN_1P_C

17

EXP_A_DN_1N_C

17

EXP_A_DN_2P_C

17

EXP_A_DN_2N_C

17

EXP_A_DN_3P_C

17

EXP_A_DN_3N_C

17

EXP_A_DN_4P_C

17

EXP_A_DN_4N_C

17

EXP_A_DN_5P_C

17

EXP_A_DN_5N_C

17

EXP_A_DN_6P_C

17

EXP_A_DN_6N_C

17

EXP_A_DN_7P_C

17

EXP_A_DN_7N_C

17

EXP_B_DN_0P_C

17

EXP_B_DN_0N_C

17

EXP_B_DN_1P_C

17

EXP_B_DN_1N_C

17

EXP_B_DN_2P_C

17

EXP_B_DN_2N_C

17

EXP_B_DN_3P_C

17

EXP_B_DN_3N_C

17

EXP_B_DN_4P_C

17

EXP_B_DN_4N_C

17

EXP_B_DN_5P_C

17

EXP_B_DN_5N_C

17

EXP_B_DN_6P_C

17

EXP_B_DN_6N_C

17

EXP_B_DN_7P_C

17

EXP_B_DN_7N_C

17

EXP_C_DN_0P_C

17

EXP_C_DN_0N_C

17

EXP_C_DN_1P_C

17

EXP_C_DN_1N_C

17

EXP_C_DN_2P_C

17

EXP_C_DN_2N_C

17

EXP_C_DN_3P_C

17

EXP_C_DN_3N_C

17

EXP_C_DN_4P_C

17

EXP_C_DN_4N_C

17

EXP_C_DN_5P_C

17

EXP_C_DN_5N_C

17

EXP_C_DN_6P_C

17

EXP_C_DN_6N_C

17

EXP_C_DN_7P_C

17

EXP_C_DN_7N_C

17

NET_PHYSICAL_TYPE=PWR PROPAGATION_DELAY=L:S::1200

L131

1 2

4.7uH 30mA

SUB*_D2938

X00_TJ_060403

10uF 6.3V

C1661

1 2

R1833

1 2

1-1%

x00_tt_052903

R2

12

2.5V Generation

C1119

21

.1uF

10V-10%

C1121

21

.1uF

10V-10%

C1126

21

.1uF

10V-10%

C1124

21

.1uF

10V-10%

C1134

21

.1uF

10V-10%

C1132

21

.1uF

10V-10%

C1130

21

.1uF

10V-10%

C1128

21

.1uF

10V-10%

C1150

21

.1uF

10V-10%

C1148

21

.1uF

10V-10%

C1146

21

.1uF

10V-10%

C1144

21

.1uF

10V-10%

C1142

21

.1uF

10V-10%

C1140

21

.1uF

10V-10%

C1138

21

.1uF

10V-10%

C1136

21

.1uF

10V-10%

C1151

21

.1uF

10V-10%

C1153

21

.1uF

10V-10%

C1155

21

.1uF

10V-10%

C1157

21

.1uF

10V-10%

C1159

21

.1uF

10V-10%

C1161

21

.1uF

10V-10%

C1163

21

.1uF

10V-10%

C1165

21

.1uF

10V-10%

MCH_VCCBGEXP

10uF 6.3V

C823

21

C1120

10V-10%

C1122

10V-10%

C1125

10V-10%

C1123

10V-10%

C1133

10V-10%

C1131

10V-10%

C1129

10V-10%

C1127

10V-10%

C1149

10V-10%

C1147

10V-10%

C1145

10V-10%

C1143

10V-10%

C1141

10V-10%

C1139

10V-10%

C1137

10V-10%

C1135

10V-10%

C1152

10V-10%

C1154

10V-10%

C1156

10V-10%

C1158

10V-10%

C1160

10V-10%

C1162

10V-10%

C1164

10V-10%

C1166

10V-10%

0.1uF 16V C195

1 2

TITLE

DWG NO.

DATE

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

21

.1uF

17

LINDY PLANAR

D1660

DC

EXP_A_DN_0P

EXP_A_DN_0N

EXP_A_DN_1P

EXP_A_DN_1N

EXP_A_DN_2P

EXP_A_DN_2N

EXP_A_DN_3P

EXP_A_DN_3N

EXP_A_DN_4P

EXP_A_DN_4N

EXP_A_DN_5P

EXP_A_DN_5N

EXP_A_DN_6P

EXP_A_DN_6N

EXP_A_DN_7P

EXP_A_DN_7N

EXP_B_DN_0P

EXP_B_DN_0N

EXP_B_DN_1P

EXP_B_DN_1N

EXP_B_DN_2P

EXP_B_DN_2N

EXP_B_DN_3P

EXP_B_DN_3N

EXP_B_DN_4P

EXP_B_DN_4N

EXP_B_DN_5P

EXP_B_DN_5N

EXP_B_DN_6P

EXP_B_DN_6N

EXP_B_DN_7P

EXP_B_DN_7N

EXP_C_DN_0P

EXP_C_DN_0N

EXP_C_DN_1P

EXP_C_DN_1N

EXP_C_DN_2P

EXP_C_DN_2N

EXP_C_DN_3P

EXP_C_DN_3N

EXP_C_DN_4P

EXP_C_DN_4N

EXP_C_DN_5P

EXP_C_DN_5N

EXP_C_DN_6P

EXP_C_DN_6N

EXP_C_DN_7P

EXP_C_DN_7N

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

17 OF 611/13/2004

31

27

31

X03

1

2

3

B D

LINDENHURST MCH

21

C1169

0.1uF 16V

To be placed near hub link on MCH

21

1 2

C401

C636

.01uF 50V

0.1uF 16V

C33 G33 H29 K9 K27 L23 M12 M22 N13 N15 N17 N19 N21 N23 P14 P16 P18 P22 R13 R15 R17 R19 R21 T14 T16 T18 T20

U13 U15 U17 U19 U21 V14 V16 V18 V20 W13 W15 W17 W19 W21 Y14 Y16 Y18 Y20 AA13 AA15 AA17 AA19 AA21

A3 A6 A9 A12 A15 A18 A31 D27 D30 E8 E11 E14 E17 E20 E23 H23 H26 J13 J16 J19 L13 L15 L17 L19 L21 M14 M16 M18 M20

F6 E4 U23 P20

+1.5V

+CPU_VTT

MCH_VCCA_VCORE MCH_VCCA_DDR MCH_VCCA_EXP MCH_VCCA_HI

18 18 18 18

MCH POWER

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

MCH REFDES = MCH

A21 A24

1

2

3

4 4

A27

B11 B14 B17 B20 B23 B26 B29

C10 C13 C16 C19 C22 C25 C28 B32

D12 D15 D18 D21 D24

E24 E26 E29 E32

F10 F13 F16 F19 F22 F25 F28 F31

G12 G15 G18 G21 G24 G27 G30

H11 H14 H17 H20 H32

J10 J22 J25 J28 J31

K12 K15 K18 K21 K24

L14 L16 L18 L20 L22 L26 L29 L32

M10 M11 M13 M15 M17 M19 M21 M23 M25 M31

N12 N14 N16 N18 N20 N22 N24 N27 N30

P11 P13 P15

B5 B8

C1 C4 C7

D6 D9

E2 E5

F4 F7

G3 G9

H2 H8

J1 J4 J7

K6

L2 L5 L8

M4

N3 N6 N9

P2 P8

ROOM=MCH

subsys done

MCH

GND-A21 GND-A24 GND-A27 GND-B5 GND-B8 GND-B11 GND-B14 GND-B17 GND-B20 GND-B23 GND-B26 GND-B29 GND-C1 GND-C4 GND-C7 GND-C10 GND-C13 GND-C16 GND-C19 GND-C22 GND-C25 GND-C28 GND-B32 GND-D6 GND-D9 GND-D12 GND-D15 GND-D18 GND-D21 GND-D24 GND-E2 GND-E5 GND-E24 GND-E26 GND-E29 GND-E32 GND-F4 GND-F7 GND-F10 GND-F13 GND-F16 GND-F19 GND-F22 GND-F25 GND-F28 GND-F31 GND-G3 GND-G9 GND-G12 GND-G15 GND-G18 GND-G21 GND-G24 GND-G27 GND-G30 GND-H2 GND-H8 GND-H11 GND-H14 GND-H17 GND-H20 GND-H32 GND-J1 GND-J4 GND-J7 GND-J10 GND-J22 GND-J25 GND-J28 GND-J31 GND-K6 GND-K12 GND-K15 GND-K18 GND-K21 GND-K24 GND-L2 GND-L5 GND-L8 GND-L14 GND-L16 GND-L18 GND-L20 GND-L22 GND-L26 GND-L29 GND-L32 GND-M4 GND-M10 GND-M11 GND-M13 GND-M15 GND-M17 GND-M19 GND-M21 GND-M23 GND-M25 GND-M31 GND-N3 GND-N6 GND-N9 GND-N12 GND-N14 GND-N16 GND-N18 GND-N20 GND-N22 GND-N24 GND-N27 GND-N30 GND-P2 GND-P8 GND-P11 GND-P13 GND-P15

INTEL LINDENHURST MCH V0P21

HETERO 7 OF 7

GND-P17 GND-P19 GND-P23 GND-P26 GND-P32

GND-R1 GND-R4

GND-R7 GND-R12 GND-R14 GND-R16 GND-R18 GND-R20 GND-R22 GND-R25 GND-R28 GND-R31

GND-T6 GND-T11 GND-T13 GND-T15 GND-T17 GND-T19 GND-T21 GND-T30

GND-U2

GND-U5

GND-U8 GND-U12 GND-U14 GND-U16 GND-U18 GND-U20 GND-U22 GND-U26 GND-U32

GND-V4 GND-V10 GND-V11 GND-V13 GND-V15 GND-V17 GND-V19 GND-V21 GND-V25 GND-V28 GND-V31

GND-W3

GND-W6

GND-W9 GND-W12 GND-W14 GND-W16 GND-W18 GND-W20 GND-W22 GND-W24 GND-W30

GND-Y2

GND-Y8 GND-Y11 GND-Y13 GND-Y15 GND-Y17 GND-Y19 GND-Y21 GND-Y23 GND-Y26 GND-Y32 GND-AA1 GND-AA4 GND-AA7

GND-AA10 GND-AA12 GND-AA14 GND-AA16 GND-AA18 GND-AA20 GND-AA22 GND-AA25 GND-AA28 GND-AA31

GND-AB6

GND-AB11

GND-AB13 GND-AB15 GND-AB17 GND-AB19 GND-AB21 GND-AB23 GND-AB30

GND-AC2 GND-AC5 GND-AC8

GND-AC12 GND-AC14 GND-AC16 GND-AC18 GND-AC20 GND-AC22 GND-AC26 GND-AC32

GND-AD4

GND-AD10 GND-AD13 GND-AD16 GND-AD19 GND-AD22 GND-AD25 GND-AD28 GND-AD31

GND-AE3 GND-AE6 GND-AE9

VSSA_CORE

VSSA_HI

VSSA_EXP

P17 P19 P23 P26 P32 R1 R4 R7 R12 R14 R16 R18 R20 R22 R25 R28 R31 T6 T11 T13 T15 T17 T19 T21 T30 U2 U5 U8 U12 U14 U16 U18 U20 U22 U26 U32 V4 V10 V11 V13 V15 V17 V19 V21 V25 V28 V31 W3 W6 W9 W12 W14 W16 W18 W20 W22 W24 W30 Y2 Y8 Y11 Y13 Y15 Y17 Y19 Y21 Y23 Y26 Y32 AA1 AA4 AA7 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25 AA28 AA31 AB6 AB11

AB13 AB15 AB17 AB19 AB21 AB23 AB30 AC2 AC5 AC8 AC12 AC14 AC16 AC18 AC20 AC22 AC26 AC32 AD4 AD10 AD13 AD16 AD19 AD22 AD25 AD28 AD31 AE3 AE6 AE9

MCH_VSSA_SB

F5

MCH_VSSA_HI

P21

MCH_VSSA_EXP

V23

AE15 AE21 AE27

AF2 AF8

AF11

AF14 AF17 AF20 AF23 AF26 AF29 AF32

AG1 AG4

AG7 AG13 AG19 AG25 AG31

AH9 AH12 AH15 AH18 AH21 AH24 AH27 AH30

AJ2

AJ5 AJ11

18 18 18

MCH

GND-AE15 GND-AE21 GND-AE27 GND-AF2 GND-AF8 GND-AF11

GND-AF14 GND-AF17 GND-AF20 GND-AF23 GND-AF26 GND-AF29 GND-AF32 GND-AG1 GND-AG4 GND-AG7 GND-AG13 GND-AG19 GND-AG25 GND-AG31 GND-AH9 GND-AH12 GND-AH15 GND-AH18 GND-AH21 GND-AH24 GND-AH27 GND-AH30 GND-AJ2 GND-AJ5 GND-AJ11

INTEL LINDENHURST MCH V0P21

ROOM=MCH

GND-AJ17 GND-AJ23 GND-AJ29 GND-AJ32

GND-AK10 GND-AK13 GND-AK16 GND-AK19 GND-AK22 GND-AK25 GND-AK28 GND-AK31

GND-AL15

GND-AL21 GND-AL27 GND-AL33

GND-AM11 GND-AM14 GND-AM17 GND-AM20 GND-AM23 GND-AM26 GND-AM29 GND-AM32

GND-AN13 GND-AN19 GND-AN25 GND-AN31

HETERO 6 OF 7

GND-AK4 GND-AK7

GND-AL3 GND-AL9

GND-AM2 GND-AM5 GND-AM8

GND-AN7

AJ17 AJ23 AJ29 AJ32 AK4 AK7 AK10 AK13 AK16 AK19 AK22 AK25 AK28 AK31 AL3 AL9 AL15

AL21 AL27 AL33 AM2 AM5 AM8 AM11 AM14 AM17 AM20 AM23 AM26 AM29 AM32 AN7 AN13 AN19 AN25 AN31

A B

+1.5V

AA11

AB12 AB14 AB16 AB18 AB20 AB22 AC11 AC13 AC15 AC17 AC19 AC21 AC23

AE12 AE18 AE24

AG10 AG16 AG22 AG28

AJ14 AJ20 AJ26

AL12 AL18 AL24 AL30

AN10 AN16 AN22 AN28

AA23 AB24 AB27 AB33 AC29 AE30 AE33

AH33

N11

P12 R11

T12 U11

V12 W11

Y12

AB3 AB9

AD1 AD7

AF5

AH3 AJ8

AL1 AL6

AN3

K30 K33 M28 N33 P29 R23 T22 T24 T27 T33 U29 V22 W23 W27 W33 Y22 Y29

F1 H5 K3 M1 M7

P5

T3 T9

V1 V7

Y5

+1.8V

MCH

VDDR_F1 VDDR_H5 VDDR_K3 VDDR_M1 VDDR_M7 VDDR_N11 VDDR_P5 VDDR_P12 VDDR_R11 VDDR_T3 VDDR_T9 VDDR_T12 VDDR_U11 VDDR_V1 VDDR_V7 VDDR_V12 VDDR_W11 VDDR_Y5 VDDR_Y12 VDDR_AA11 VDDR_AB3 VDDR_AB9 VDDR_AB12 VDDR_AB14 VDDR_AB16 VDDR_AB18 VDDR_AB20 VDDR_AB22 VDDR_AC11 VDDR_AC13 VDDR_AC15 VDDR_AC17 VDDR_AC19 VDDR_AC21 VDDR_AC23 VDDR_AD1 VDDR_AD7 VDDR_AE12 VDDR_AE18 VDDR_AE24 VDDR_AF5 VDDR_AG10 VDDR_AG16 VDDR_AG22 VDDR_AG28 VDDR_AH3 VDDR_AJ8 VDDR_AJ14 VDDR_AJ20 VDDR_AJ26 VDDR_AL1 VDDR_AL6 VDDR_AL12 VDDR_AL18 VDDR_AL24 VDDR_AL30 VDDR_AN3 VDDR_AN10 VDDR_AN16 VDDR_AN22 VDDR_AN28

VEXP_K30 VEXP_K33 VEXP_M28 VEXP_N33 VEXP_P29 VEXP_R23 VEXP_T22 VEXP_T24 VEXP_T27 VEXP_T33 VEXP_U29 VEXP_V22 VEXP_W23 VEXP_W27 VEXP_W33 VEXP_Y22 VEXP_Y29 VEXP_AA23 VEXP_AB24 VEXP_AB27 VEXP_AB33 VEXP_AC29 VEXP_AE30 VEXP_AE33 VEXP_AH33

INTEL LINDENHURST MCH V0P21

ROOM=MCH

VCORE_C33 VCORE_G33 VCORE_H29

VCORE_K9 VCORE_K27 VCORE_L23 VCORE_M12 VCORE_M22 VCORE_N13 VCORE_N15 VCORE_N17 VCORE_N19 VCORE_N21 VCORE_N23 VCORE_P14 VCORE_P16 VCORE_P18 VCORE_P22 VCORE_R13 VCORE_R15 VCORE_R17 VCORE_R19 VCORE_R21 VCORE_T14 VCORE_T16 VCORE_T18 VCORE_T20

VCORE-U13 VCORE-U15 VCORE_U17 VCORE_U19 VCORE_U21 VCORE_V14 VCORE_V16 VCORE_V18 VCORE_V20 VCORE_W13 VCORE_W15 VCORE_W17 VCORE_W19 VCORE_W21 VCORE_Y14 VCORE_Y16 VCORE_Y18 VCORE_Y20

VCORE_AA13 VCORE_AA15 VCORE_AA17 VCORE_AA19 VCORE_AA21

VCCA_CORE

VCCA_DDR

VCCA_EXP

HETERO 5 OF 7

VTT_A3 VTT_A6

VTT_A9 VTT_A12 VTT_A15 VTT_A18 VTT_A31 VTT_D27 VTT_D30

VTT_E8 VTT_E11 VTT_E14 VTT_E17 VTT_E20 VTT_E23 VTT_H23 VTT_H26 VTT_J13 VTT_J16 VTT_J19 VTT_L13 VTT_L15 VTT_L17 VTT_L19 VTT_L21 VTT_M14 VTT_M16 VTT_M18 VTT_M20

VCCA_HI

1 2

C117021C1171

0.1uF 16V

1 2

C637

C142

0.1uF 16V

MRGN_MHVS

1

3 4

TSM 2X2 SMT HDR

CA

+CPU_VTT

0.1uF 16V

+1.5V

@MCH

1 2

.01uF 50V

2

NP*

R234

1 2

43.2-1%49.9-1%

21

R551

2.7K-5% R582

21

NP01

MCH HLA VREF & VSWING

R276

1 2

NET_PHYSICAL_TYPE=PWR

HLA_MCH_SWING

(804mv)

NET_PHYSICAL_TYPE=PWR

HLA_MCH_VREF

(353mv)

R537

24.3-1% 78.7-1%

1 2

MRGN_MHVR

2

1

2

43

3 4

NP*

TSM 2X2 SMT HDR

17

2.7K-5%

1 2

R553

NP01

MCH_VCCA_VCORE

18

PROPAGATION_DELAY=L:S::700 NET_PHYSICAL_TYPE=50MIL

MCH_VSSA_SB

18

MCH_VCCA_DDR

18

PROPAGATION_DELAY=L:S::600 NET_PHYSICAL_TYPE=50MIL

MCH_VSSA_SB

18

PROPAGATION_DELAY=L:S::600 NET_PHYSICAL_TYPE=50MIL

MCH_VCCA_EXP

18

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=50MIL

MCH_VSSA_EXP

18

PROPAGATION_DELAY=L:S::1400 NET_PHYSICAL_TYPE=50MIL

MCH_VCCA_HI

18

PROPAGATION_DELAY=L:S::1500 NET_PHYSICAL_TYPE=50MIL

MCH_VSSA_HI

18

PROPAGATION_DELAY=L:S::1500 NET_PHYSICAL_TYPE=50MIL

PROPAGATION_DELAY=L:S::1000

PROPAGATION_DELAY=L:S::1300

PROPAGATION_DELAY=L:S::1000

1 2

C1589

17

21

C1236

10uF 6.3V

1 2

C1238

10uF 6.3V

21

C1240

10uF 6.3V

x00_tj_042903

1 2

C1242

10uF 6.3V

17

DDRCRES2

DDRCRES1

1 2

C1226

21

C1225

21

C1227

1 2

C1228

L113

1 2

4.7uH 80mA

X00_TJ_060403 X03b_TJ_011904

MCH_VCCA_VCORE_L

PROPAGATION_DELAY=L:S::200 NET_PHYSICAL_TYPE=50MIL

23.4mA

0.1uF 16V0.1uF 16V

L112

1 2

4.7uH 80mA

X00_TJ_060403 X03b_TJ_011904

4.7uH 80mA

X00_TJ_060403 X03b_TJ_011904

MCH_VCCA_DDR_L

PROPAGATION_DELAY=L:S::200 NET_PHYSICAL_TYPE=50MIL

L111

21

MCH_VCCA_EXP_L

PROPAGATION_DELAY=L:S::200 NET_PHYSICAL_TYPE=50MIL

23.4mA

21.3mA

0.1uF 16V

L110

1 2

4.7uH 80mA

X00_TJ_060403 X03b_TJ_011904

0.1uF 16V

DDRIMPCRES

DDRCRES0

DDRSLWCRES

MCH_VCCA_HI_L

PROPAGATION_DELAY=L:S::200 NET_PHYSICAL_TYPE=50MIL

24.7mA

PN 7H671

ESR = 300mohm

Max current = 80mA Inductance = 4.7uH

R1031

1 2

287-1%

R1004

1 2 825-1%

+1.8V

R1573

21

40.2-0.5%

C1173

1 2

R1574

1 2

40.2-0.5%

21

C1172

0.1uF 16V 0.1uF 16V

MCH Power & Ground

COMPUTER CORPORATION

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

AUSTIN,TEXAS

SHEET

R1173

1 2

1-1%

x00_tj_051203ROOM = MCH

x00_tj_052903 x02_tj_100703

R1174

21

1-1%

x00_tj_052903

R1175

1 2

.499-1%

R1176

1 2

1-1%

x00_tj_052903

REV.

X03

18 OF 611/13/2004

+1.5V

1

2

3

+1.8V

ROOM = MCH

MCH DDR caps (min of 10)

B D

CA

1 2

C1400

0.1uF 16V

21

C1403

0.1uF 16V

100uF

1 2

C762

+

1uF

1 2

C148621C1485

10V-10%

21

1uF

C1483

10V-10%

220uF-6.3V

C1401

C1402

1uF

10V-10%

1uF

C1484

10V-10%

21

0.1uF 16V0.1uF 16V

1 2

1uF

1 2

10V-10%

ECAD Note: Place 6 0.1uF beneath BGA

Place 20 0.1uF topside edge of BGA

ECAD Note: Place 6 0.1uF beneath BGA

Place remaining 18 1uF caps near 1.5V pins on BGA

VTT1.2V

3 560uF Al-Polymer 20% 7mohm 4nh 4V

1.2 6.32X5R22uF Ceramic5

1.8V DDR2 26 .1uF (0603) 200 2 5 100uF (7343) 220 2.3

1.5V EXP 3 .1uF (0603) 200 2

4 1uf (0805) 200

2.3

2 10uF (1206) 200 1.9

1.5V

CORE

TBD TBD TBD TBD

1

2

21

1 2

C1396

0.1uF 16V

21

C1397

0.1uF 16V

C1399

0.1uF 16V

1 2

C1398

0.1uF 16V

21

C1395

1 2

C1394

0.1uF 16V

1 2

C1392

0.1uF 16V

21

C1393

0.1uF 16V

1

1 2

C1410

0.1uF 16V

21

C1419

0.1uF 16V

1uF

1 2

C1478

10V-10%

21

C1565

10uF 6.3V

21

C1407

0.1uF 16V

1 2

C141321C1412

0.1uF 16V

1 2

C1422

0.1uF 16V

1uF

1 2

C147921C1480

10V-10%

10uF 6.3V

1 2

C1406

0.1uF 16V

21

C1423

0.1uF 16V

1uF

10V-10%

1 2

C1404

0.1uF 16V

16V-20%

100uF

+

21

x00_tj_040803 x02_tj_081803

21

1uF

C1488

0.1uF 16V

1uF

1 2

C1481

10V-10%

x00_tj_040803

21

C1405

16V-20%

C761

1 2

C1487

10V-10%

21

C1482

10V-10%

+

C763

2 1

21

1 2

C1408

21

C1417

+1.5V

21

C1421

1 2

2

C1475

21

C1562

C1411

C1409

0.1uF 16V

1 2

C1416

C141521C1414

0.1uF 16V

MCH EXPRESS caps

1 2

C1418

C1420

0.1uF 16V

21

1uF

1uF10uF 6.3V

C1477

C1476

10V-10%

1 2

C1563

C1564

10uF 6.3V

21

C766

22uF 6.3V

MCH FSB caps

21

C768

C765

1 2

22uF 6.3V

21

C764

1 2

C760

22uF 6.3V

x00_tj_040803

1 2

C448

1uF 6.3V

1 2

C444

1uF 6.3V

21

C77

0.1uF 16V

+CPU_VTT

C767

1 2

22uF 6.3V

3

4 4

MCH DECOUPLING

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

subsys done

A B

DECOUPLING

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

19 OF 611/13/2004

X03

3

Put one 10uF cap at each end of DIMM

x00_tj_041003

x00_tj_060903

+1.8V

B D

CA

Put one 10uF cap at each end of DIMMPut one 10uF cap at each end of DIMM

x00_tj_041003

+1.8V

x00_tj_041003

+1.8V

C382

1 2

C383

1uF 6.3V

DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDD10

VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1 VDD0

VDDQ10

VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1 VDDQ0

RESET

21

NC

1uF 6.3V

20,23

236 235 230 229 117 116 111 110 227 226 218 217 108 107 99 98 215 214 209 208 96 95 90 89 206 205 200 199 87 86 81 80 159 158 153 152 40 39 34 33 150 149 144 143 31 30 25 24 141 140 132 131 22 21 13 12 129 128 123 122 10 9 4 3

197 189 187 184 178 172 69 67 64 59 53

194 191 181 175 170 78 75 72 62 56 51

19 18

21

1 2

C712

C521

10uF 6.3V

x00_gt_061803

DDR2A_BA1

16,20

DDR2A_BA0

16,20

DDR2A_BA2

16,20

NC_DDR2A_DIMM2A_A15 NC_DDR2A_DIMM1A_A14 NC_DDR2A_DIMM2A_A14

DDR2A_A13

16,20

DDR2A_A12

16,20

DDR2A_A11

16,20

DDR2A_A10

16,20

DDR2A_A9

16,20

DDR2A_A8

16,20

DDR2A_A7

16,20

DDR2A_A6

16,20

DDR2A_A5

16,20

DDR2A_A4

16,20

DDR2A_A3

16,20

DDR2A_A2

16,20

DDR2A_A1

16,20

DDR2A_A0

16,20

DDR2A_CS4_N

16,20

DDR2A_CS2_N

16

DDR2A_RAS_N

16,20

DDR2A_CAS_N

16,20

DDR2A_WE_N

16,20

16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20

16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20

NC_DIMM2A_ERR_OUT_N NC_DIMM2A_PAR_IN NC_DIMM2A_TEST

CK_200M_DIMMA2_N CK_200M_DIMMA2_P

DDR2_CKE4 DDR2_CKE2

16

ICH_SEG1_SDA ICH_SEG1_SCL

DDR2A_DIMM_VREF

DDR2A_CS5_N DDR2A_CS3_N

16

DDR2A_CB7 DDR2A_CB6 DDR2A_CB5 DDR2A_CB4 DDR2A_CB3 DDR2A_CB2 DDR2A_CB1 DDR2A_CB0

DDR2A_DQS17_P DDR2A_DQS17_N DDR2A_DQS16_P DDR2A_DQS16_N DDR2A_DQS15_P DDR2A_DQS15_N DDR2A_DQS14_P DDR2A_DQS14_N DDR2A_DQS13_P DDR2A_DQS13_N DDR2A_DQS12_P DDR2A_DQS12_N DDR2A_DQS11_P DDR2A_DQS11_N DDR2A_DQS10_P DDR2A_DQS10_N DDR2A_DQS9_P DDR2A_DQS9_N DDR2A_DQS8_P DDR2A_DQS8_N DDR2A_DQS7_P DDR2A_DQS7_N DDR2A_DQS6_P DDR2A_DQS6_N DDR2A_DQS5_P DDR2A_DQS5_N DDR2A_DQS4_P DDR2A_DQS4_N DDR2A_DQS3_P DDR2A_DQS3_N DDR2A_DQS2_P DDR2A_DQS2_N DDR2A_DQS1_P DDR2A_DQS1_N DDR2A_DQS0_P DDR2A_DQS0_N

NC_DIMM2A_CK2_N NC_DIMM2A_CK2 NC_DIMM2A_CK1_N NC_DIMM2A_CK1

SUB=SUB*_P0136

1 2

C376

1uF 6.3V

NC_DIMM3A_19 DDR2_RESET_N_2

21

C377

C37821C379

1uF 6.3V

DDR2A_DIMM_VREF

DDR2A_SD7_7 DDR2A_SD7_6 DDR2A_SD7_5 DDR2A_SD7_4 DDR2A_SD7_3 DDR2A_SD7_2 DDR2A_SD7_1 DDR2A_SD7_0 DDR2A_SD6_7 DDR2A_SD6_6 DDR2A_SD6_5 DDR2A_SD6_4 DDR2A_SD6_3 DDR2A_SD6_2 DDR2A_SD6_1 DDR2A_SD6_0 DDR2A_SD5_7 DDR2A_SD5_6 DDR2A_SD5_5 DDR2A_SD5_4 DDR2A_SD5_3 DDR2A_SD5_2 DDR2A_SD5_1 DDR2A_SD5_0 DDR2A_SD4_7 DDR2A_SD4_6 DDR2A_SD4_5 DDR2A_SD4_4 DDR2A_SD4_3 DDR2A_SD4_2 DDR2A_SD4_1 DDR2A_SD4_0 DDR2A_SD3_7 DDR2A_SD3_6 DDR2A_SD3_5 DDR2A_SD3_4 DDR2A_SD3_3 DDR2A_SD3_2 DDR2A_SD3_1 DDR2A_SD3_0 DDR2A_SD2_7 DDR2A_SD2_6 DDR2A_SD2_5 DDR2A_SD2_4 DDR2A_SD2_3 DDR2A_SD2_2 DDR2A_SD2_1 DDR2A_SD2_0 DDR2A_SD1_7 DDR2A_SD1_6 DDR2A_SD1_5 DDR2A_SD1_4 DDR2A_SD1_3 DDR2A_SD1_2 DDR2A_SD1_1 DDR2A_SD1_0 DDR2A_SD0_7 DDR2A_SD0_6 DDR2A_SD0_5 DDR2A_SD0_4 DDR2A_SD0_3 DDR2A_SD0_2 DDR2A_SD0_1 DDR2A_SD0_0

1 2

1uF 6.3V

16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20

1uF 6.3V

+3.3V

1 2

.1uF

10V-10%

+3.3V

1

C1754

20,23

2

0.1uF 16V

16 16

20,21,35 20,21,35

1

C1047

2

0.1uF 16V

1

C1048

2

0.1uF 16V

+3.3V

C641

+1.8V +1.8V

5,20,21

21

+3.3V

C519

2

1

C1753

0.1uF 16V

x00_gt_061803

1 2

10uF 6.3V

C520

21

10uF 6.3V

C1089

.1uF

10V-10%

C75

1 2

1uF 6.3V

20,23

DIMM3_A

DDR2A_BA1

16,20

DDR2A_BA0

16,20

DDR2A_BA2

16,20

NC_DDR2A_DIMM3A_A15 NC_DDR2A_DIMM3A_A14

DDR2A_A13

16,20

DDR2A_A12

16,20

DDR2A_A11

16,20

DDR2A_A10

16,20

DDR2A_A9

16,20

DDR2A_A8

16,20

DDR2A_A7

1K-1%

R540

4.7K

+3.3V

1 2

20,23

1K-1%

16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20

16,20 16,20 16,20 16,20

16 16

16,20

20,21,35 20,21,35

DDR2A_DIMM_VREF

16,20

16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20

NC_DIMM3A_ERR_OUT_N NC_DIMM3A_PAR_IN NC_DIMM3A_TEST

DDR2A_A6 DDR2A_A5 DDR2A_A4 DDR2A_A3 DDR2A_A2 DDR2A_A1 DDR2A_A0

DIMM3A_S1_N

DDR2A_CS4_N DDR2A_RAS_N DDR2A_CAS_N DDR2A_WE_N

NC_DIMM3A_CK2_N NC_DIMM3A_CK2 NC_DIMM3A_CK1_N NC_DIMM3A_CK1

CK_200M_DIMMA3_N CK_200M_DIMMA3_P

DIMM3A_CKE1 DDR2_CKE4

ICH_SEG1_SDA ICH_SEG1_SCL

DIMM3A_ODT1 DDR2A_CS5_N

DDR2A_CB7 DDR2A_CB6 DDR2A_CB5 DDR2A_CB4 DDR2A_CB3 DDR2A_CB2 DDR2A_CB1 DDR2A_CB0

DDR2A_DQS17_P DDR2A_DQS17_N DDR2A_DQS16_P DDR2A_DQS16_N DDR2A_DQS15_P DDR2A_DQS15_N DDR2A_DQS14_P DDR2A_DQS14_N DDR2A_DQS13_P DDR2A_DQS13_N DDR2A_DQS12_P DDR2A_DQS12_N DDR2A_DQS11_P DDR2A_DQS11_N DDR2A_DQS10_P DDR2A_DQS10_N DDR2A_DQS9_P DDR2A_DQS9_N DDR2A_DQS8_P DDR2A_DQS8_N DDR2A_DQS7_P DDR2A_DQS7_N DDR2A_DQS6_P DDR2A_DQS6_N DDR2A_DQS5_P DDR2A_DQS5_N DDR2A_DQS4_P DDR2A_DQS4_N DDR2A_DQS3_P DDR2A_DQS3_N DDR2A_DQS2_P DDR2A_DQS2_N DDR2A_DQS1_P DDR2A_DQS1_N DDR2A_DQS0_P DDR2A_DQS0_N

SUB=SUB*_P0136

+1.8V

R558

1 2

2

R539

1 2

+3.3V

21

C642

.1uF

10V-10%

3

190

BA1

71

BA0

54

A16/BA2

173

A15

174

A14

196

A13

176

A12

57

A11

70

A10/AP

177

A9

179

A8

58

A7

180

A6

60

A5

61

A4

182

A3

63

A2

183

A1

188

A0

76

S1

193

S0

192

RAS

74

CAS

73

WE

221

CK2

220

CK2

138

CK1

137

CK1

186

CK0

185

CK0

171

CKE1

52

CKE0

119

SDA

120

SCL

101

SA2

240

SA1

239

SA0

238

VDDSPD

1

VREF

77

ODT1

195

ODT0

168

CB7

167

CB6

162

CB5

161

CB4

49

CB3

48

CB2

43

CB1

42

CB0

164

DM8/DQS17/NC

165

DQS17/NC

232

DM7/DQS16

233

DQS16/NC

223

DM6/DQS15

224

DQS15/NC

211

DM5/DQS14

212

DQS14/NC

202

DM4/DQS13

203

DQS13/NC

155

DM3/DQS12

156

DQS12/NC

146

DM2/DQS11

147

DQS11/NC

134

DM1/DQS10

135

DQS10/NC

125

DM0/DQS9

126

DQS9/NC

46

DQS8/NC

45

DQS8/NC

114

DQS7

113

DQS7

105

DQS6

104

DQS6

93

DQS5

92

DQS5

84

DQS4

83

DQS4

37

DQS3

36

DQS3

28

DQS2

27

DQS2

16

DQS1

15

DQS1

7

DQS0

6

DQS0

55

ERR_OUT

68

PAR_IN

102

TEST

240 PIN DDR II DIMM

DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDD10

VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1 VDD0

VDDQ10

VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1 VDDQ0

RESET

236 235 230 229 117 116 111 110 227 226 218 217 108 107 99 98 215 214 209 208 96 95 90 89 206 205 200 199 87 86 81 80 159 158 153 152 40 39 34 33 150 149 144 143 31 30 25 24 141 140 132 131 22 21 13 12 129 128 123 122 10 9 4 3

197 189 187 184 178 172 69 67 64 59 53

194 191 181 175 170 78 75 72 62 56 51

19

NC

18

I2C Address

AA 1010 (101)0

A6 1010 (011)0

21

1 2

C775

.1uF

C381

10V-10%

1uF 6.3V

DIMM2_A

190

BA1

71

BA0

54

A16/BA2

173

A15

174

A14

196

A13

176

A12

57

A11

70

A10/AP

177

A9

179

A8

58

A7

180

A6

60

A5

61

A4

182

A3

63

A2

183

A1

188

A0

76

S1

193

S0

192

RAS

74

CAS

73

WE

221

CK2

220

CK2

138

CK1

137

CK1

186

CK0

185

CK0

171

CKE1

52

CKE0

119

SDA

120

SCL

101

SA2

240

SA1

239

SA0

238

VDDSPD

1

VREF

77

ODT1

195

ODT0

168

CB7

167

CB6

162

CB5

161

CB4

49

CB3

48

CB2

43

CB1

42

CB0

164

DM8/DQS17/NC

165

DQS17/NC

232

DM7/DQS16

233

DQS16/NC

223

DM6/DQS15

224

DQS15/NC

211

DM5/DQS14

212

DQS14/NC

202

DM4/DQS13

203

DQS13/NC

155

DM3/DQS12

156

DQS12/NC

146

DM2/DQS11

147

DQS11/NC

134

DM1/DQS10

135

DQS10/NC

125

DM0/DQS9

126

DQS9/NC

46

DQS8/NC

45

DQS8/NC

114

DQS7

113

DQS7

105

DQS6

104

DQS6

93

DQS5

92

DQS5

84

DQS4

83

DQS4

37

DQS3

36

DQS3

28

DQS2

27

DQS2

16

DQS1

15

DQS1

7

DQS0

6

DQS0

55

ERR_OUT

68

PAR_IN

102

TEST

240 PIN DDR II DIMM

I2C Address

4 4

ROOM = DIMM2_A

subsys done

ROOM = DIMM3_A

A B

1 2

C380

1uF 6.3V

DDR2A_DIMM_VREF

DDR2A_SD7_7 DDR2A_SD7_6 DDR2A_SD7_5 DDR2A_SD7_4 DDR2A_SD7_3 DDR2A_SD7_2 DDR2A_SD7_1 DDR2A_SD7_0 DDR2A_SD6_7 DDR2A_SD6_6 DDR2A_SD6_5 DDR2A_SD6_4 DDR2A_SD6_3 DDR2A_SD6_2 DDR2A_SD6_1 DDR2A_SD6_0 DDR2A_SD5_7 DDR2A_SD5_6 DDR2A_SD5_5 DDR2A_SD5_4 DDR2A_SD5_3 DDR2A_SD5_2 DDR2A_SD5_1 DDR2A_SD5_0 DDR2A_SD4_7 DDR2A_SD4_6 DDR2A_SD4_5 DDR2A_SD4_4 DDR2A_SD4_3 DDR2A_SD4_2 DDR2A_SD4_1 DDR2A_SD4_0 DDR2A_SD3_7 DDR2A_SD3_6 DDR2A_SD3_5 DDR2A_SD3_4 DDR2A_SD3_3 DDR2A_SD3_2 DDR2A_SD3_1 DDR2A_SD3_0 DDR2A_SD2_7 DDR2A_SD2_6 DDR2A_SD2_5 DDR2A_SD2_4 DDR2A_SD2_3 DDR2A_SD2_2 DDR2A_SD2_1 DDR2A_SD2_0 DDR2A_SD1_7 DDR2A_SD1_6 DDR2A_SD1_5 DDR2A_SD1_4 DDR2A_SD1_3 DDR2A_SD1_2 DDR2A_SD1_1 DDR2A_SD1_0 DDR2A_SD0_7 DDR2A_SD0_6 DDR2A_SD0_5 DDR2A_SD0_4 DDR2A_SD0_3 DDR2A_SD0_2 DDR2A_SD0_1 DDR2A_SD0_0

NC_DIMM2A_19 DDR2_RESET_N_2

C384

21

1uF 6.3V

C385

1 2

1uF 6.3V

16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20

2

1

C1044

0.1uF 16V

+1.8V+1.8V

5,20,21

1

C1045

2

0.1uF 16V

+3.3V

21

C640

.1uF

10V-10%

+3.3V

1

C1755

20,23

2

0.1uF 16V

16 16

20,21,35 20,21,35

16,20 16,20 16,20

16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20

16,20 16,20 16,20

16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20

16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20

x00_gt_061803

16 16

NC_DIMM1A_ERR_OUT_N NC_DIMM1A_PAR_IN NC_DIMM1A_TEST

1 2

C750

DDR2A_BA1 DDR2A_BA0 DDR2A_BA2

NC_DDR2A_DIMM1A_A15

DDR2A_A13 DDR2A_A12 DDR2A_A11 DDR2A_A10 DDR2A_A9 DDR2A_A8 DDR2A_A7 DDR2A_A6 DDR2A_A5 DDR2A_A4 DDR2A_A3 DDR2A_A2 DDR2A_A1 DDR2A_A0

DDR2A_CS6_N

DDR2A_CS0_N DDR2A_RAS_N DDR2A_CAS_N DDR2A_WE_N

NC_DIMM1A_CK2_N NC_DIMM1A_CK2 NC_DIMM1A_CK1_N NC_DIMM1A_CK1

CK_200M_DIMMA1_N CK_200M_DIMMA1_P

DDR2_CKE6 DDR2_CKE0

ICH_SEG1_SDA ICH_SEG1_SCL

DDR2A_DIMM_VREF

DDR2A_CS7_N

DDR2A_CS1_N

DDR2A_CB7

DDR2A_CB6

DDR2A_CB5

DDR2A_CB4

DDR2A_CB3

DDR2A_CB2

DDR2A_CB1

DDR2A_CB0

DDR2A_DQS17_P DDR2A_DQS17_N DDR2A_DQS16_P DDR2A_DQS16_N DDR2A_DQS15_P DDR2A_DQS15_N DDR2A_DQS14_P DDR2A_DQS14_N DDR2A_DQS13_P DDR2A_DQS13_N DDR2A_DQS12_P DDR2A_DQS12_N DDR2A_DQS11_P DDR2A_DQS11_N DDR2A_DQS10_P DDR2A_DQS10_N DDR2A_DQS9_P DDR2A_DQS9_N DDR2A_DQS8_P DDR2A_DQS8_N DDR2A_DQS7_P DDR2A_DQS7_N DDR2A_DQS6_P DDR2A_DQS6_N DDR2A_DQS5_P DDR2A_DQS5_N DDR2A_DQS4_P DDR2A_DQS4_N DDR2A_DQS3_P DDR2A_DQS3_N DDR2A_DQS2_P DDR2A_DQS2_N DDR2A_DQS1_P DDR2A_DQS1_N DDR2A_DQS0_P DDR2A_DQS0_N

SUB=SUB*_P0136

C755

10uF 6.3V

CHANNEL A DIMMS

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

C387

1 2

C388

1uF 6.3V

21

C389

1uF 6.3V

1 2

21

10uF 6.3V

21

C776

.1uF

10V-10%

DIMM1_A

190

BA1

71

BA0

54

A16/BA2

173

A15

174

A14

196

A13

176

A12

57

A11

70

A10/AP

177

A9

179

A8

58

A7

180

A6

60

A5

61

A4

182

A3

63

A2

183

A1

188

A0

76

S1

193

S0

192

RAS

74

CAS

73

WE

221

CK2

220

CK2

138

CK1

137

CK1

186

CK0

185

CK0

171

CKE1

52

CKE0

119

SDA

120

SCL

101

SA2

240

SA1

239

SA0

238

VDDSPD

1

VREF

77

ODT1

195

ODT0

168

CB7

167

CB6

162

CB5

161

CB4

49

CB3

48

CB2

43

CB1

42

CB0

164

DM8/DQS17/NC

165

DQS17/NC

232

DM7/DQS16

233

DQS16/NC

223

DM6/DQS15

224

DQS15/NC

211

DM5/DQS14

212

DQS14/NC

202

DM4/DQS13

203

DQS13/NC

155

DM3/DQS12

156

DQS12/NC

146

DM2/DQS11

147

DQS11/NC

134

DM1/DQS10

135

DQS10/NC

125

DM0/DQS9

126

DQS9/NC

46

DQS8/NC

45

DQS8/NC

114

DQS7

113

DQS7

105

DQS6

104

DQS6

93

DQS5

92

DQS5

84

DQS4

83

DQS4

37

DQS3

36

DQS3

28

DQS2

27

DQS2

16

DQS1

15

DQS1

7

DQS0

6

DQS0

55

ERR_OUT

68

PAR_IN

102

TEST

240 PIN DDR II DIMM

DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDD10

VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1 VDD0

VDDQ10

VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1 VDDQ0

RESET

236 235 230 229 117 116 111 110 227 226 218 217 108 107 99 98 215 214 209 208 96 95 90 89 206 205 200 199 87 86 81 80 159 158 153 152 40 39 34 33 150 149 144 143 31 30 25 24 141 140 132 131 22 21 13 12 129 128 123 122 10 9 4 3

197 189 187 184 178 172 69 67 64 59 53

194 191 181 175 170 78 75 72 62 56 51

19

NC

18

I2C Address

A2 1010 (001)0

ROOM = DIMM1_A

21

C386

1uF 6.3V

DDR2A_SD7_7 DDR2A_SD7_6 DDR2A_SD7_5 DDR2A_SD7_4 DDR2A_SD7_3 DDR2A_SD7_2 DDR2A_SD7_1 DDR2A_SD7_0 DDR2A_SD6_7 DDR2A_SD6_6 DDR2A_SD6_5 DDR2A_SD6_4 DDR2A_SD6_3 DDR2A_SD6_2 DDR2A_SD6_1 DDR2A_SD6_0 DDR2A_SD5_7 DDR2A_SD5_6 DDR2A_SD5_5 DDR2A_SD5_4 DDR2A_SD5_3 DDR2A_SD5_2 DDR2A_SD5_1 DDR2A_SD5_0 DDR2A_SD4_7 DDR2A_SD4_6 DDR2A_SD4_5 DDR2A_SD4_4 DDR2A_SD4_3 DDR2A_SD4_2 DDR2A_SD4_1 DDR2A_SD4_0 DDR2A_SD3_7 DDR2A_SD3_6 DDR2A_SD3_5 DDR2A_SD3_4 DDR2A_SD3_3 DDR2A_SD3_2 DDR2A_SD3_1 DDR2A_SD3_0 DDR2A_SD2_7 DDR2A_SD2_6 DDR2A_SD2_5 DDR2A_SD2_4 DDR2A_SD2_3 DDR2A_SD2_2 DDR2A_SD2_1 DDR2A_SD2_0 DDR2A_SD1_7 DDR2A_SD1_6 DDR2A_SD1_5 DDR2A_SD1_4 DDR2A_SD1_3 DDR2A_SD1_2 DDR2A_SD1_1 DDR2A_SD1_0 DDR2A_SD0_7 DDR2A_SD0_6 DDR2A_SD0_5 DDR2A_SD0_4 DDR2A_SD0_3 DDR2A_SD0_2 DDR2A_SD0_1 DDR2A_SD0_0

NC_DIMM1A_19 DDR2_RESET_N_1

C390

1uF 6.3V

1 2

1uF 6.3V

20,23

21

C391

1uF 6.3V

DDR2A_DIMM_VREF

2

1

16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20 16,20

+1.8V

C1046

+1.8V

5,21

COMPUTER CORPORATION

TITLE

AUSTIN,TEXAS

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 20 OF 61

SHEET

DC

1

2

C1049

0.1uF 16V

REV.

X03

1

2

3

B D

Put one 10uF cap at each end of DIMM

x00_tj_041003

x00_tj_060903

21

+3.3V

C770

2

R541

1 2

+1.8V

R5591 2

1 2

R542

1K-1%

1

C1756

4.7K

+3.3V

C645

0.1uF 16V

16 16

20,21,35 20,21,35

21

.1uF

x00_gt_061803

DDR2B_BA1

16,21

DDR2B_BA0

16,21

DDR2B_BA2

16,21

NC_DDR2B_DIMM3B_A15 NC_DDR2B_DIMM3B_A14 DDR2B_A13

16,21

DDR2B_A12

16,21

DDR2B_A11

16,21

DDR2B_A10

16,21

DDR2B_A9

16,21

DDR2B_A8

16,21

DDR2B_A7

16,21

DDR2B_A6

16,21

DDR2B_A5

16,21

DDR2B_A4

16,21

DDR2B_A3

16,21

DDR2B_A2

16,21

DDR2B_A1

16,21

DDR2B_A0

16,21

DIMM3B_S1_N DDR2B_CS4_N

16,21

DDR2B_RAS_N

16,21

DDR2B_CAS_N

16,21

DDR2B_WE_N

16,21

NC_DIMM3B_CK2_N NC_DIMM3B_CK2 NC_DIMM3B_CK1_N NC_DIMM3B_CK1

CK_200M_DIMMB3_N CK_200M_DIMMB3_P

DIMM3B_CKE1 DDR2_CKE5

16,21

ICH_SEG1_SDA ICH_SEG1_SCL

DDR2B_DIMM_VREF

21,23

DIMM3B_ODT1 DDR2B_CS5_N

16,21

DDR2B_CB7

16,21

DDR2B_CB6

16,21

DDR2B_CB5

16,21

DDR2B_CB4

16,21

DDR2B_CB3

16,21

DDR2B_CB2

16,21

DDR2B_CB1

16,21

10V-10%

DDR2B_CB0

16,21

DDR2B_DQS17_P

16,21

DDR2B_DQS17_N

16,21

DDR2B_DQS16_P

16,21

DDR2B_DQS16_N

16,21

DDR2B_DQS15_P

16,21

DDR2B_DQS15_N

16,21

DDR2B_DQS14_P

16,21

DDR2B_DQS14_N

16,21

DDR2B_DQS13_P

16,21

DDR2B_DQS13_N

16,21

DDR2B_DQS12_P

16,21

DDR2B_DQS12_N

16,21

DDR2B_DQS11_P

16,21

DDR2B_DQS11_N

16,21

DDR2B_DQS10_P

16,21

DDR2B_DQS10_N

16,21

DDR2B_DQS9_P

16,21

DDR2B_DQS9_N

16,21

DDR2B_DQS8_P

16,21

DDR2B_DQS8_N

16,21

DDR2B_DQS7_P

16,21

DDR2B_DQS7_N

16,21

DDR2B_DQS6_P

16,21

DDR2B_DQS6_N

16,21

DDR2B_DQS5_P

16,21

DDR2B_DQS5_N

16,21

DDR2B_DQS4_P

16,21

DDR2B_DQS4_N

16,21

DDR2B_DQS3_P

16,21

DDR2B_DQS3_N

16,21

DDR2B_DQS2_P

16,21

DDR2B_DQS2_N

16,21

DDR2B_DQS1_P

16,21

DDR2B_DQS1_N

16,21

DDR2B_DQS0_P

16,21

DDR2B_DQS0_N

16,21

NC_DIMM3B_ERR_OUT_N NC_DIMM3B_PAR_IN NC_DIMM3B_TEST

1

2

3

21

1 2

C769

10uF 6.3V

SUB=SUB*_P0136

C787

.1uF

10uF 6.3V

10V-10%

DIMM3_B

190

BA1

71

BA0

54

A16/BA2

173

A15

174

A14

196

A13

176

A12

57

A11

70

A10/AP

177

A9

179

A8

58

A7

180

A6

60

A5

61

A4

182

A3

63

A2

183

A1

188

A0

76

S1

193

S0

192

RAS

74

CAS

73

WE

221

CK2

220

CK2

138

CK1

137

CK1

186

CK0

185

CK0

171

CKE1

52

CKE0

119

SDA

120

SCL

101

SA2

240

SA1

239

SA0

238

VDDSPD

1

VREF

77

ODT1

195

ODT0

168

CB7

167

CB6

162

CB5

161

CB4

49

CB3

48

CB2

43

CB1

42

CB0

164

DM8/DQS17/NC

165

DQS17/NC

232

DM7/DQS16

233

DQS16/NC

223

DM6/DQS15

224

DQS15/NC

211

DM5/DQS14

212

DQS14/NC

202

DM4/DQS13

203

DQS13/NC

155

DM3/DQS12

156

DQS12/NC

146

DM2/DQS11

147

DQS11/NC

134

DM1/DQS10

135

DQS10/NC

125

DM0/DQS9

126

DQS9/NC

46

DQS8/NC

45

DQS8/NC

114

DQS7

113

DQS7

105

DQS6

104

DQS6

93

DQS5

92

DQS5

84

DQS4

83

DQS4

37

DQS3

36

DQS3

28

DQS2

27

DQS2

16

DQS1

15

DQS1

7

DQS0

6

DQS0

55

ERR_OUT

68

PAR_IN

102

TEST

240 PIN DDR II DIMM

C396

1 2

C395

1uF 6.3V

21

VDD10

VDDQ10

VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1 VDDQ0

RESET

C394

1uF 6.3V

236

DQ63

235

DQ62

230

DQ61

229

DQ60

117

DQ59

116

DQ58

111

DQ57

110

DQ56

227

DQ55

226

DQ54

218

DQ53

217

DQ52

108

DQ51

107

DQ50

99

DQ49

98

DQ48

215

DQ47

214

DQ46

209

DQ45

208

DQ44

96

DQ43

95

DQ42

90

DQ41

89

DQ40

206

DQ39

205

DQ38

200

DQ37

199

DQ36

87

DQ35

86

DQ34

81

DQ33

80

DQ32

159

DQ31

158

DQ30

153

DQ29

152

DQ28

40

DQ27

39

DQ26

34

DQ25

33

DQ24

150

DQ23

149

DQ22

144

DQ21

143

DQ20

31

DQ19

30

DQ18

25

DQ17

24

DQ16

141

DQ15

140

DQ14

132

DQ13

131

DQ12

22

DQ11

21

DQ10

13

DQ9

12

DQ8

129

DQ7

128

DQ6

123

DQ5

122

DQ4

10

DQ3

9

DQ2

4

DQ1

3

DQ0

197 189

VDD9

187

VDD8

184

VDD7

178

VDD6

172

VDD5

69

VDD4

67

VDD3

64

VDD2

59

VDD1

53

VDD0

194 191 181 175 170 78 75 72 62 56 51

19

NC

18

1 2

1uF 6.3V

NC_DIMM3B_19 DDR2_RESET_N_2

1 2

C39321C392

21,23

DDR2B_SD7_7 DDR2B_SD7_6 DDR2B_SD7_5 DDR2B_SD7_4 DDR2B_SD7_3 DDR2B_SD7_2 DDR2B_SD7_1 DDR2B_SD7_0 DDR2B_SD6_7 DDR2B_SD6_6 DDR2B_SD6_5 DDR2B_SD6_4 DDR2B_SD6_3 DDR2B_SD6_2 DDR2B_SD6_1 DDR2B_SD6_0 DDR2B_SD5_7 DDR2B_SD5_6 DDR2B_SD5_5 DDR2B_SD5_4 DDR2B_SD5_3 DDR2B_SD5_2 DDR2B_SD5_1 DDR2B_SD5_0 DDR2B_SD4_7 DDR2B_SD4_6 DDR2B_SD4_5 DDR2B_SD4_4 DDR2B_SD4_3 DDR2B_SD4_2 DDR2B_SD4_1 DDR2B_SD4_0 DDR2B_SD3_7 DDR2B_SD3_6 DDR2B_SD3_5 DDR2B_SD3_4 DDR2B_SD3_3 DDR2B_SD3_2 DDR2B_SD3_1 DDR2B_SD3_0 DDR2B_SD2_7 DDR2B_SD2_6 DDR2B_SD2_5 DDR2B_SD2_4 DDR2B_SD2_3 DDR2B_SD2_2 DDR2B_SD2_1 DDR2B_SD2_0 DDR2B_SD1_7 DDR2B_SD1_6 DDR2B_SD1_5 DDR2B_SD1_4 DDR2B_SD1_3 DDR2B_SD1_2 DDR2B_SD1_1 DDR2B_SD1_0 DDR2B_SD0_7 DDR2B_SD0_6 DDR2B_SD0_5 DDR2B_SD0_4 DDR2B_SD0_3 DDR2B_SD0_2 DDR2B_SD0_1 DDR2B_SD0_0

I2C Address

A8 1010 (100)0

4 4

ROOM = DIMM3_B

+1.8V

1uF 6.3V

DDR2B_DIMM_VREF

16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21

+1.8V

5,20

1

C135

2

1

2

C136

0.1uF 16V

x00_gt_061803

+3.3V

1 2

.1uF

C644

10V-10%

+3.3V

2

1

C1757

0.1uF 16V

16,21 16,21 16,21

16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21

16,21

16 16,21 16,21 16,21

16 16

16,21

16

20,21,35 20,21,35

21,23

16,21

16

16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21

16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21

NC_DIMM2B_ERR_OUT_N NC_DIMM2B_PAR_IN NC_DIMM2B_TEST

21

C772

DDR2B_BA1 DDR2B_BA0 DDR2B_BA2

NC_DDR2B_DIMM2B_A15 NC_DDR2B_DIMM2B_A14

DDR2B_A13 DDR2B_A12 DDR2B_A11 DDR2B_A10 DDR2B_A9 DDR2B_A8 DDR2B_A7 DDR2B_A6 DDR2B_A5 DDR2B_A4 DDR2B_A3 DDR2B_A2 DDR2B_A1 DDR2B_A0

DDR2B_CS4_N

DDR2B_CS2_N DDR2B_RAS_N DDR2B_CAS_N DDR2B_WE_N

NC_DIMM2B_CK2_N NC_DIMM2B_CK2 NC_DIMM2B_CK1_N NC_DIMM2B_CK1

CK_200M_DIMMB2_N CK_200M_DIMMB2_P

DDR2_CKE5 DDR2_CKE3

ICH_SEG1_SDA ICH_SEG1_SCL

DDR2B_DIMM_VREF

DDR2B_CS5_N

DDR2B_CS3_N

DDR2B_CB7

DDR2B_CB6

DDR2B_CB5

DDR2B_CB4

DDR2B_CB3

DDR2B_CB2

DDR2B_CB1

DDR2B_CB0

DDR2B_DQS17_P DDR2B_DQS17_N DDR2B_DQS16_P DDR2B_DQS16_N DDR2B_DQS15_P DDR2B_DQS15_N DDR2B_DQS14_P DDR2B_DQS14_N DDR2B_DQS13_P DDR2B_DQS13_N DDR2B_DQS12_P DDR2B_DQS12_N DDR2B_DQS11_P DDR2B_DQS11_N DDR2B_DQS10_P DDR2B_DQS10_N DDR2B_DQS9_P DDR2B_DQS9_N DDR2B_DQS8_P DDR2B_DQS8_N DDR2B_DQS7_P DDR2B_DQS7_N DDR2B_DQS6_P DDR2B_DQS6_N DDR2B_DQS5_P DDR2B_DQS5_N DDR2B_DQS4_P DDR2B_DQS4_N DDR2B_DQS3_P DDR2B_DQS3_N DDR2B_DQS2_P DDR2B_DQS2_N DDR2B_DQS1_P DDR2B_DQS1_N DDR2B_DQS0_P DDR2B_DQS0_N

SUB=SUB*_P0136

21

1 2

C788

10uF 6.3V

.1uF

10V-10%

C404

1 2

C40321C402

1uF 6.3V

C771

10uF 6.3V

1 2

DIMM2_B

190

BA1

71

BA0

54

A16/BA2

173

A15

174

A14

196

A13

176

A12

57

A11

70

A10/AP

177

A9

179

A8

58

A7

180

A6

60

A5

61

A4

182

A3

63

A2

183

A1

188

A0

76

S1

193

S0

192

RAS

74

CAS

73

WE

221

CK2

220

CK2

138

CK1

137

CK1

186

CK0

185

CK0

171

CKE1

52

CKE0

119

SDA

120

SCL

101

SA2

240

SA1

239

SA0

238

VDDSPD

1

VREF

77

ODT1

195

ODT0

168

CB7

167

CB6

162

CB5

161

CB4

49

CB3

48

CB2

43

CB1

42

CB0

164

DM8/DQS17/NC

165

DQS17/NC

232

DM7/DQS16

233

DQS16/NC

223

DM6/DQS15

224

DQS15/NC

211

DM5/DQS14

212

DQS14/NC

202

DM4/DQS13

203

DQS13/NC

155

DM3/DQS12

156

DQS12/NC

146

DM2/DQS11

147

DQS11/NC

134

DM1/DQS10

135

DQS10/NC

125

DM0/DQS9

126

DQS9/NC

46

DQS8/NC

45

DQS8/NC

114

DQS7

113

DQS7

105

DQS6

104

DQS6

93

DQS5

92

DQS5

84

DQS4

83

DQS4

37

DQS3

36

DQS3

28

DQS2

27

DQS2

16

DQS1

15

DQS1

7

DQS0

6

DQS0

55

ERR_OUT

68

PAR_IN

102

TEST

240 PIN DDR II DIMM

DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDD10

VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1 VDD0

VDDQ10

VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1 VDDQ0

RESET

NC

I2C Address

A4 1010 (010)0

ROOM = DIMM2_B

1uF 6.3V

236 235 230 229 117 116 111 110 227 226 218 217 108 107 99 98 215 214 209 208 96 95 90 89 206 205 200 199 87 86 81 80 159 158 153 152 40 39 34 33 150 149 144 143 31 30 25 24 141 140 132 131 22 21 13 12 129 128 123 122 10 9 4 3

197 189 187 184 178 172 69 67 64 59 53

194 191 181 175 170 78 75 72 62 56 51

19

NC_DIMM2B_19

18

DDR2_RESET_N_1

1 2

C405

1uF 6.3V

21,23

DDR2B_SD7_7 DDR2B_SD7_6 DDR2B_SD7_5 DDR2B_SD7_4 DDR2B_SD7_3 DDR2B_SD7_2 DDR2B_SD7_1 DDR2B_SD7_0 DDR2B_SD6_7 DDR2B_SD6_6 DDR2B_SD6_5 DDR2B_SD6_4 DDR2B_SD6_3 DDR2B_SD6_2 DDR2B_SD6_1 DDR2B_SD6_0 DDR2B_SD5_7 DDR2B_SD5_6 DDR2B_SD5_5 DDR2B_SD5_4 DDR2B_SD5_3 DDR2B_SD5_2 DDR2B_SD5_1 DDR2B_SD5_0 DDR2B_SD4_7 DDR2B_SD4_6 DDR2B_SD4_5 DDR2B_SD4_4 DDR2B_SD4_3 DDR2B_SD4_2 DDR2B_SD4_1 DDR2B_SD4_0 DDR2B_SD3_7 DDR2B_SD3_6 DDR2B_SD3_5 DDR2B_SD3_4 DDR2B_SD3_3 DDR2B_SD3_2 DDR2B_SD3_1 DDR2B_SD3_0 DDR2B_SD2_7 DDR2B_SD2_6 DDR2B_SD2_5 DDR2B_SD2_4 DDR2B_SD2_3 DDR2B_SD2_2 DDR2B_SD2_1 DDR2B_SD2_0 DDR2B_SD1_7 DDR2B_SD1_6 DDR2B_SD1_5 DDR2B_SD1_4 DDR2B_SD1_3 DDR2B_SD1_2 DDR2B_SD1_1 DDR2B_SD1_0 DDR2B_SD0_7 DDR2B_SD0_6 DDR2B_SD0_5 DDR2B_SD0_4 DDR2B_SD0_3 DDR2B_SD0_2 DDR2B_SD0_1 DDR2B_SD0_0

21

C399

+1.8V

1 2

C398

1uF 6.3V

DDR2B_DIMM_VREF

16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21

1uF 6.3V

+1.8V

5,20,21

C131

1

CA

2

0.1uF 16V

x00_gt_061803

1

C132

2

0.1uF 16V

+3.3V

21

.1uF

C643

10V-10%

+3.3V

21,23

+3.3V

2

1

C1758

0.1uF 16V

16,21 16,21 16,21

16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21

16

16 16,21 16,21 16,21

CK_200M_DIMMB1_N

16

CK_200M_DIMMB1_P

16

20,21,35 20,21,35

DDR2B_DIMM_VREF

16

16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21

DDR2B_DQS17_P

16,21

DDR2B_DQS17_N

16,21

DDR2B_DQS16_P

16,21

DDR2B_DQS16_N

16,21

DDR2B_DQS15_P

16,21

DDR2B_DQS15_N

16,21

DDR2B_DQS14_P

16,21

DDR2B_DQS14_N

16,21

DDR2B_DQS13_P

16,21

DDR2B_DQS13_N

16,21

DDR2B_DQS12_P

16,21

DDR2B_DQS12_N

16,21

DDR2B_DQS11_P

16,21

DDR2B_DQS11_N

16,21

DDR2B_DQS10_P

16,21

DDR2B_DQS10_N

16,21

DDR2B_DQS9_P

16,21

DDR2B_DQS9_N

16,21

DDR2B_DQS8_P

16,21

DDR2B_DQS8_N

16,21

DDR2B_DQS7_P

16,21

DDR2B_DQS7_N

16,21

DDR2B_DQS6_P

16,21

DDR2B_DQS6_N

16,21

DDR2B_DQS5_P

16,21

DDR2B_DQS5_N

16,21

DDR2B_DQS4_P

16,21

DDR2B_DQS4_N

16,21

DDR2B_DQS3_P

16,21

DDR2B_DQS3_N

16,21

DDR2B_DQS2_P

16,21

DDR2B_DQS2_N

16,21

DDR2B_DQS1_P

16,21

DDR2B_DQS1_N

16,21

DDR2B_DQS0_P

16,21

DDR2B_DQS0_N

16,21

NC_DIMM1B_ERR_OUT_N NC_DIMM1B_PAR_IN NC_DIMM1B_TEST

Put one 10uF cap at each end of DIMMPut one 10uF cap at each end of DIMM

1 2

C774

C773

10uF 6.3V

DDR2B_BA1 DDR2B_BA0 DDR2B_BA2

NC_DDR2B_DIMM1B_A15

NC_DDR2B_DIMM1B_A14 DDR2B_A13 DDR2B_A12 DDR2B_A11 DDR2B_A10 DDR2B_A9 DDR2B_A8 DDR2B_A7 DDR2B_A6 DDR2B_A5 DDR2B_A4 DDR2B_A3 DDR2B_A2 DDR2B_A1 DDR2B_A0

DDR2B_CS6_N

DDR2B_CS0_N DDR2B_RAS_N DDR2B_CAS_N DDR2B_WE_N

NC_DIMM1B_CK2_N NC_DIMM1B_CK2 NC_DIMM1B_CK1_N NC_DIMM1B_CK1

DDR2_CKE7 DDR2_CKE1

ICH_SEG1_SDA ICH_SEG1_SCL

DDR2B_CS7_N

DDR2B_CS1_N

DDR2B_CB7

DDR2B_CB6

DDR2B_CB5

DDR2B_CB4

DDR2B_CB3

DDR2B_CB2

DDR2B_CB1

DDR2B_CB0

SUB=SUB*_P0136

A0 1010 (000)0

21

10uF 6.3V

C789

.1uF

10V-10%

C410

1 2

C409

1uF 6.3V

21

DIMM1_B

190

BA1

71

BA0

54

A16/BA2

173

A15

174

A14

196

A13

176

A12

57

A11

70

A10/AP

177

A9

179

A8

58

A7

180

A6

60

A5

61

A4

182

A3

63

A2

183

A1

188

A0

76

S1

193

S0

192

RAS

74

CAS

73

WE

221

CK2

220

CK2

138

CK1

137

CK1

186

CK0

185

CK0

171

CKE1

52

CKE0

119

SDA

120

SCL

101

SA2

240

SA1

239

SA0

238

VDDSPD

1

VREF

77

ODT1

195

ODT0

168

CB7

167

CB6

162

CB5

161

CB4

49

CB3

48

CB2

43

CB1

42

CB0

164

DM8/DQS17/NC

165

DQS17/NC

232

DM7/DQS16

233

DQS16/NC

223

DM6/DQS15

224

DQS15/NC

211

DM5/DQS14

212

DQS14/NC

202

DM4/DQS13

203

DQS13/NC

155

DM3/DQS12

156

DQS12/NC

146

DM2/DQS11

147

DQS11/NC

134

DM1/DQS10

135

DQS10/NC

125

DM0/DQS9

126

DQS9/NC

46

DQS8/NC

45

DQS8/NC

114

DQS7

113

DQS7

105

DQS6

104

DQS6

93

DQS5

92

DQS5

84

DQS4

83

DQS4

37

DQS3

36

DQS3

28

DQS2

27

DQS2

16

DQS1

15

DQS1

7

DQS0

6

DQS0

55

ERR_OUT

68

PAR_IN

102

TEST

240 PIN DDR II DIMM

DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

VDD10

VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1 VDD0

VDDQ10

VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1 VDDQ0

RESET

I2C Address

ROOM = DIMM1_B

x00_tj_041003x00_tj_041003

C408

1uF 6.3V

236 235 230 229 117 116 111 110 227 226 218 217 108 107 99 98 215 214 209 208 96 95 90 89 206 205 200 199 87 86 81 80 159 158 153 152 40 39 34 33 150 149 144 143 31 30 25 24 141 140 132 131 22 21 13

DQ9

12

DQ8

129

DQ7

128

DQ6

123

DQ5

122

DQ4

10

DQ3

9

DQ2

4

DQ1

3

DQ0

197 189 187 184 178 172 69 67 64 59 53

194 191 181 175 170 78 75 72 62 56 51

19

NC

18

1 2

1uF 6.3V

NC_DIMM1B_19 DDR2_RESET_N_1

21

C411

1uF 6.3V

DDR2B_SD7_7 DDR2B_SD7_6 DDR2B_SD7_5 DDR2B_SD7_4 DDR2B_SD7_3 DDR2B_SD7_2 DDR2B_SD7_1 DDR2B_SD7_0 DDR2B_SD6_7 DDR2B_SD6_6 DDR2B_SD6_5 DDR2B_SD6_4 DDR2B_SD6_3 DDR2B_SD6_2 DDR2B_SD6_1 DDR2B_SD6_0 DDR2B_SD5_7 DDR2B_SD5_6 DDR2B_SD5_5 DDR2B_SD5_4 DDR2B_SD5_3 DDR2B_SD5_2 DDR2B_SD5_1 DDR2B_SD5_0 DDR2B_SD4_7 DDR2B_SD4_6 DDR2B_SD4_5 DDR2B_SD4_4 DDR2B_SD4_3 DDR2B_SD4_2 DDR2B_SD4_1 DDR2B_SD4_0 DDR2B_SD3_7 DDR2B_SD3_6 DDR2B_SD3_5 DDR2B_SD3_4 DDR2B_SD3_3 DDR2B_SD3_2 DDR2B_SD3_1 DDR2B_SD3_0 DDR2B_SD2_7 DDR2B_SD2_6 DDR2B_SD2_5 DDR2B_SD2_4 DDR2B_SD2_3 DDR2B_SD2_2 DDR2B_SD2_1 DDR2B_SD2_0 DDR2B_SD1_7 DDR2B_SD1_6 DDR2B_SD1_5 DDR2B_SD1_4 DDR2B_SD1_3 DDR2B_SD1_2 DDR2B_SD1_1 DDR2B_SD1_0 DDR2B_SD0_7 DDR2B_SD0_6 DDR2B_SD0_5 DDR2B_SD0_4 DDR2B_SD0_3 DDR2B_SD0_2 DDR2B_SD0_1 DDR2B_SD0_0

1 2

C40721C406

1uF 6.3V

21,23

16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21 16,21

+1.8V

1uF 6.3V

DDR2B_DIMM_VREF

+1.8V

5,20,21

C134

2

1

C133

2

0.1uF 16V

1

2

3

subsys done

A B

CHANNEL B DIMMS

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

21 OF 611/13/2004

X03

B D

CA

RANK 4

1

CS0

RANK 2(/3)RANK 3

Vtt

RANK 1(/4)

Vtt

CS0

ODT0

CS0

ODT0

Vtt

1

CS1 CS2

CS3 CS4

CS0

ODT0

CS0

ODT0

CS0

ODT0

CS1

ODT1

CS0

ODT0

CS1

ODT1

Vtt

Relative to DIMM PNSignal

CS0 193 CS1 CS2 CS3 CS4 CS5 CS6 CS7

BANK 1 BANK 1 BANK 2 BANK 2 BANK 3,2 BANK 3,2 BANK 1 BANK 1

195 193 195 193,76 195,77 76 77

CS5

CS1

Vtt

CS6

2

CS7

CKE0 CKE1 CKE2 CKE3 CKE4 CKE5

CKE0

CKE1CKE0

CKE1

CKE6

ODT1

CKE0

CKE1

CKE7

CMDCLKP0 CMDCLKN0 CMDCLKP1 CMDCLKN1 CMDCLKP2

3

CMDCLKN2 CMDCLKP3

p185 p185 p186

p186

p185 p186

CMDCLKN3

ODT1

CKE0

CKE1

p185 p186

Signal DIMM PNRelative to

CKE0 CKE1 CKE2 CKE3 CKE4 CKE5 52,171 CKE6 CKE7

BANK 1 BANK 1 BANK 2 BANK 2 BANK 3,2 BANK 3,2 BANK 1 BANK 1

52 52 52 52 52,171

171 171

2

3

*Separate Channel A and B

for clocks

I2C

AA

A8

A6

A B

BANK 2

4 4

A B

A4

A2

A0

A BA B

BANK 1BANK 3

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

COMPUTER CORPORATION

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 22 OF 61

DC

AUSTIN,TEXAS

SHEET

REV.

X03

B D

CA

+1.8V

R1056

1 2

49.9-.1%49.9-.1%

1

21

R1055

+1.8V

21

R1120

R1119

1 2

49.9-.1%49.9-.1%

ROOM = MCH

1uF

1 2

C1118

10V-10%

21

1uF

C1224

C1215

10V-10%

NET_PHYSICAL_TYPE=PWR

1 2

C1117

0.1uF 16V

DDR2B_MCH_VREF

MRGN_DDRMB 1

1

2

3 4

TSM 2X2 SMT HDR

ROOM = DIMM2_B

NET_PHYSICAL_TYPE=PWR

0.1uF 16V

21

C1214

0.1uF 16V

DDR2B_DIMM_VREF

MRGN_DDRB

1

2

3 4

TSM 2X2 SMT HDR

2 1

750-1%

R325

2

NP01

NP*

750-1%

R324

2

12

43

NP01

NP*

2

+1.8V

21

R1053

49.9-.1%49.9-.1%

16

21

C1115

49.9-.1%49.9-.1%

C1223

1 2

1uF

10V-10%

1uF

10V-10%

C1212

R1054

1 2

+1.8V

R1121

1 2

21

R1118

ROOM = MCH

NET_PHYSICAL_TYPE=PWR

C1116

1 2

0.1uF 16V

DDR2A_MCH_VREF

MRGN_DDRMA

1

1 3 4

TSM 2X2 SMT HDR

ROOM = DIMM2_A

NET_PHYSICAL_TYPE=PWR

21

C1213

0.1uF 16V

DDR2A_DIMM_VREF

MRGN_DDRA 1

1

3 4

TSM 2X2 SMT HDR

16

750-1%

R327

2

12

2

43

NP01

NP*

2 1

750-1%

R326

2

NP01

NP*

1

20

2

3

4 4

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

X03

subsys done

A B

MCH REFERENCES

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 23 OF 61

DC

3

PXH_PCI_A_AD31

27

PXH_PCI_A_AD30

27

PXH_PCI_A_AD29

27

PXH_PCI_A_AD28

27

PXH_PCI_A_AD27

27

PXH_PCI_A_AD26

27

PXH_PCI_A_AD25

27

PXH_PCI_A_AD24

27

PXH_PCI_A_AD23

24,27

PXH_PCI_A_AD22

27

PXH_PCI_A_AD21

27

PXH_PCI_A_AD20

27

1

2

+3.3V

LAN_A_AUX

R422

2 1

2.7K-5%

PXH_PCI_A_AD19

27

PXH_PCI_A_AD18

27

PXH_PCI_A_AD17

27

PXH_PCI_A_AD16

27

PXH_PCI_A_AD15

27

PXH_PCI_A_AD14

27

PXH_PCI_A_AD13

27

PXH_PCI_A_AD12

27

PXH_PCI_A_AD11

27

PXH_PCI_A_AD10

27

PXH_PCI_A_AD9

27

PXH_PCI_A_AD8

27

PXH_PCI_A_AD7

27

PXH_PCI_A_AD6

27

PXH_PCI_A_AD5

27

PXH_PCI_A_AD4

27

PXH_PCI_A_AD3

27

PXH_PCI_A_AD2

27

PXH_PCI_A_AD1

27

PXH_PCI_A_AD0

27

PXH_PCI_A_CBE3_N

27

PXH_PCI_A_CBE2_N

27

PXH_PCI_A_CBE1_N

27

PXH_PCI_A_CBE0_N

27

IDSEL_LOM_A

24

PXH_PCI_A_FRAME_N

27,30

PXH_PCI_A_IRDY_N

27,30

PXH_PCI_A_TRDY_N

27,30

PXH_PCI_A_DEVSEL_N

27,30

PXH_PCI_A_STOP_N

27,30

PXH_PCI_A_PERR_N

27,30

PXH_PCI_A_SERR_N

27,30

PXH_PCI_A_PAR

27

PXH_PCI_A_PCLKO0

27

GB_LOMA_CLKRUN_N

24

X00_GT_052803

PXH_PCI_A_IRQ0_N

27

PXH_PCI_A_M66EN

27

PXH_PCI_A_PCIRST_N

27

PXH_PCI_A_GNT0_N

27

PXH_PCI_A_REQ0_N

27

SYSTEM_PWRGOOD_NIC

5,25

PCI_A_PME_N

28

GB_LOMA_AUX_PWR

Note: Switching to/from Aux done below

SUB=SUB*_D5541

X00_GT_051503

B8

AD31

A8

AD30

C7

AD29

C6

AD28

B6

AD27

B5

AD26

A5

AD25

B4

AD24

B2

AD23

B1

AD22

C1

AD21

D3

AD20

D2

AD19

D1

AD18

E3

AD17

K1

AD16

L2

AD15

L1

AD14

M3

AD13

M2

AD12

M1

AD11

N2

AD10

N3

AD9

P3

AD8

N4

AD7

P4

AD6

M5

AD5

N5

AD4

P5

AD3

P6

AD2

M7

AD1

N7

AD0

C4

CBE3

F3

CBE2

L3

CBE1

M4

CBE0

A4

IDSEL

F2

FRAME

F1

IRDY

G3

TRDY

H3

DEVSEL

H1

STOP

J2

PERR

A2

SERR

J1

PAR

G1

CLK

C8

CLK_RUN

H2

INTA

C2

M66EN

B9

RST

J3

GNT

C3

REQ

A9

LAN_PWR_GOOD

A6

PME

J12

AUX_PWR

TABOR_1

RSVD_NC_N11 RSVD_VSS_D4 RSVD_VSS_E4

FLSH_SO/LAN_DISABLE

LED2/LINK100

LED3/LINK1000

82541EI

HETERO 1 OF 2

NC_A1

NC_A14

NC_D9

NC_D10

NC_L8 NC_P1

NC_P14 RSVD_NC_C5 RSVD_NC_L7 RSVD_NC_M8

IEEE_TESTIEEE_TEST+

XTAL1 XTAL2

JTAG_TCK JTAG_TMS

JTAG_TRST

JTAG_TDI JTAG_TDO

TEST

FLSH_SCK

FLSH_CE FLSH_SI

SMBCLK

SMBDATA

SMBALERT

EE_MODE

EE_DO EE_DI EE_CS EE_SK

LED0/LINK

LED1/ACT

CTRL_12 CTRL_18

SDP0 SDP1 SDP2 SDP3

MDIA0-

MDIA0+

MDIA1-

MDIA1+

MDIA2-

MDIA2+

MDIA3-

MDIA3+

A1

NC_A1_82541_1

A14

NC_A14_82541_1

D9

NC_D9_82541_1

D10

NC_D10_82541_1

L8

NC_L8_82541_1

P1

NC_P1_82541_1

P14

NC_P14_82541_1

C5

NC_C5_82541_1

L7

NC_L7_82541_1

M8

NC_M8_82541_1

N11

NC_N11_82541_1 D4 E4

D14

GB_LOMA_TEST-

B14

GB_LOMA_TEST+

K14

GB_LOMA_XTAL1 J14

GB_LOMA_XTAL2

L14

GB_LOMA_JTAG_TCK

L12

GB_LOMA_JTAG_TMS

L13

GB_LOMA_JTAG_TRST_N

M13

GB_LOMA_JTAG_TDI

M14

NC_GB_LOMA_JTAG_TDO

A13

GB_LOMA_TEST

N9

NC_GB_LOMA_FLSH_SCK

P9

DISABLE_TABOR_1_N

M9

NC_GB_LOMA_FLSH_CE

M11

NC_GB_LOMA_FLSH_SI

A10

I2C_NICA_SCL_R

C9

I2C_NICA_SDA_R

B10

NIC_ALERT_N

J4

GB_LOMA_EEMODE

N10

GB_LOMA_EEDO

P10

GB_LOMA_EEDI

P7

GB_LOMA_EECS

M10

GB_LOMA_EESK

A12

GB_LOMA_LINK_UP_LED_N

C11

GB_LOMA_ACT_LED_N

B11

GB_LOMA_LINK100_LED_N

B12

NC_GB_LOMA_LINK1000_LED_N

P11

GB_LOMA_CTRL_12

B13

GB_LOMA_CTRL_18

N14

NC_GB_LOMA_SDP0

P13

NC_GB_LOMA_SDP1

N13

NC_GB_LOMA_SDP2

M12

NC_GB_LOMA_SDP3

C14

MDIA0-

C13

MDIA0+

E14

MDIA1-

E13

MDIA1+

F14

MDIA2-

F13

MDIA2+

H14

MDIA3-

H13

MDIA3+

21

R12221R12121R12021R11921R11821R117

49.9-1%

C91

1 2

0.1uF 16V

49.9-1%

C90

24

24 24 25,44,45

24

26 26 24

24 24

49.9-1%

1 2

0.1uF 16V

ROOM = LOM_A

ECAD: Route traces as differential

to connector

12

NP*

J1

ECAD: Place these components as close

to the GB_LOM as possible

X03_GT_010704

1

8

RN20

2 3 4

100

100 Ohm 5%

49.9-1%

C89

1 2

7 6 5

21

R168

1K-1%

24 24 24 24

21

R123

49.9-1%

0.1uF 16V

C88

25MHz-30ppm

21

C423

22pF 50V

+3.3V

LAN_A_AUX

2.7K-5%

2 1

21

R116

49.9-1%

ECAD: Place these termination networks close

1 2

0.1uF 16V

B D

+3.3V

1 2

R1794

24 24

X1

GB_LOMA_EECS GB_LOMA_EEDO

21

C422

22pF 50V

PRELIMINARY SYMBOL

1

CS

2

SO

3

WP

4

GND

ENG MGR APPROVAL NEEDED FOR MODEM

SPI Serial EEPROMs-1024X8

SUB*_M4291

26 26 26 26 26 26 26 26

LAN_A_AUX

X03_GT_010704

GB_LOMA_EEMODE

24

U23

8

VCC

7

HOLD

6

SCK

5

SI

X03_GT_010703

+3.3V

LAN_A_AUX

R282

+3.3V

LAN_A_AUX

0.1uF 16V

C87

12

GB_LOMA_EESK GB_LOMA_EEDI

LAN_A_AUX

2 1

2.7K-5%

+3.3V

LAN_A_AUX

R1793

R109

100K-1%

+3.3V

0-5%

1 2

24 24

+1.8V

LAN_A_AUX

Sleep mode current limiter

C86

12

1 2

0.1uF 16V

GB_LOMA_VIO

+1.2V

LAN_A_AUX

SUB=SUB*_D5541

X00_GT_051503

G2

VIO

A3

3P3V_A3

A7

3P3V_A7

A11

3P3V_A11

E1

3P3V_E1

K3

3P3V_K3

K4

3P3V_K4

K13

3P3V_K13

N6

3P3V_N6

N8

3P3V_N8

P2

3P3V_P2

P12

3P3V_P12

G5

1P2V_G5

G6

1P2V_G6

H5

1P2V_H5

H6

1P2V_H6

H7

1P2V_H7

H8

1P2V_H8

J5

1P2V_J5

J6

1P2V_J6

J7

1P2V_J7

J8

1P2V_J8

J9

1P2V_J9

J10

1P2V_J10

J11

1P2V_J11

K5

1P2V_K5

K6

1P2V_K6

K7

1P2V_K7

K8

1P2V_K8

K9

1P2V_K9

K10

1P2V_K10

K11

1P2V_K11

L4

1P2V_L4

L5

1P2V_L5

L9

1P2V_L9

L10

1P2V_L10

E11

A1.2V_E11

E12

A1.2V_E12

G13

A1.2V_G13

H11

A1.2V_H11

G4

PLL_1.2V_G4

H4

PLL_1.2V_H4

D12

CLKR_1.8V

J13

XTAL_1.8V

D11

A1.8V_D11

G12

A1.8V_G12

TABOR_1

82541EI

HETERO 2 OF 2

CA

B3

GND_B3

B7

GND_B7

C10

GND_C10

D5

GND_D5

D6

GND_D6

D7

GND_D7

D8

GND_D8

E2

GND_E2

E5

GND_E5

E6

GND_E6

E7

GND_E7

E8

GND_E8

E9

GND_E9

E10

GND_E10

F4

GND_F4

F5

GND_F5

F6

GND_F6

F7

GND_F7

F8

GND_F8

F9

GND_F9

F10

GND_F10

G7

GND_G7

G8

GND_G8

G9

GND_G9

G10

GND_G10

H9

GND_H9

H10

GND_H10

K2

GND_K2

L6

GND_L6

L11

GND_L11

M6

GND_M6

N1

GND_N1

N12

GND_N12

P8

GND_P8

C12

AGND_C12

D13

AGND_D13

F11

AGND_F11

G11

AGND_G11

G14

AGND_G14

K12

AGND_K12

F12

CLKR_CAP

H12

XTAL_CAP

ECAD: Place all decoupling caps close to LOM chip pins

NP

1 2

C345

1000pF

50V-10%

PART_NUMBER=79015

25,44,59

24

NP

21

C346

1000pF

50V-10%

PART_NUMBER=79015

+3.3V

LAN_A_AUX

I2C_NIC_SDA I2C_NIC_SCL

GB_LOMA_CLKRUN_N

24

GB_LOMA_LINK100_LED_N

24

DISABLE_TABOR_1_N

PXH_PCI_A_AD23

24,27

DISABLE_ETHERNET_1

40

+3.3V

LAN_A_AUX

R1910

2 1

R442

0-5%

2.7K-5%

X03_GT_010703

2.7K-5%

21

R443

1 2

0-5%

R88

NP*

R1828

330-5%

+12V

2.7K-5%

NP

21

R455

21

12

1 2

R1810

NP

R456

4.7K

1 2

I2C_NICA_SDA_R I2C_NICA_SCL_R

FP_GB_ETH_LED_1

Q140

3 D

2N7002

Q141

2N7002

1

G

to the LOM IC

X00_GT_051503

2 S

1

G

1N914

NP*

D

3

S

2

24

32

R_IDSEL_LOMA

8.2K-5%

1 3

12

D70

Q81

2N7002

1

G

R1811

D

S

1

R1812

2 1

100-5%

x03b_sd

3

2

IDSEL_LOM_A

24

2

X00_GT_051503

Switching for Wake-On-Lan

3

SYSTEM_PWRGOOD_FETS

5,35,41

x03_GT_011504

2N7002

+12V

x03_GT_011504

21

R23

3.3K-5%

Q5

D

3

1

G

S

2

GB_PS_PWRGOOD_12V

21

R24

2N7002

3.3K-5%

Q6

D

3

1

G

S

2

+3.3V_AUX

td_on = 20ns td_off = 20ns

R231

1 2

+3.3V

20K-1%

NET_PHYSICAL_TYPE=100MIL

Q75

1

S1

2

G1

3

S2

4 5

G2 DRN4

SI4501DY

DUAL N & P CHANNEL FETS 12V ON GATE1 ENABLES +3.3V TO DRN PINS 0V ON GATE 2 ENABLES +3.3V_AUX TO DRN PINS

x02_sd

DRN1 DRN2 DRN3

8

22uF 6.3V

7 6

21

For Everglades inrush issue

+3.3V

LAN_AUX

0.1uF 16V

C420

+3.3V

LAN_A_AUX

LAN_B_AUX

R4500

1 2

0-5%

C838

R4501

1 2

12

0-5%

GB_LOMA_CTRL_12

24

NET_PHYSICAL_TYPE=25MIL

4 4

subsys done

A B

+3.3V

LAN_AUX

NET_PHYSICAL_TYPE=25MIL

R1950

1 2

0-5%

GB_LOMA_CTRL_18

24

NET_PHYSICAL_TYPE=25MIL

BCP69

Q1

1 2

1

R1953

0-5%

R17

NP

R1951

NP

R1952

1 2

X00_GT_011804

1.33-1%

3

42

C92

1 2

0.1uF 16V

C307

21

4.7uF

150-1%

0-5%

NET_PHYSICAL_TYPE=25MIL

6.3V-10%

+1.2V

LAN_A_AUX

1

BCP69

Q2

+1.2V

LAN_A_AUX

21

C46

C45

1 2

10uF 6.3V

X00_GT_092303

NP

C47

1 2

10uF 6.3V

Regulators & Decoupling

C116

1 2

0.1uF 16V

C112

1 2

0.1uF 16V

1 2

C113

+1.8V

LAN_A_AUX

C114

0.1uF 16V

1 2

0.1uF 16V

C115

1 2

21

C37

C38

X00_GT_011804

3

42

NP

R1954

150-1%

1 2

NP

R1955

1 2

82.5-1%

Gigabit NIC A- Tabor II

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

C93

1 2

21

C306

0.1uF 16V

4.7uF

6.3V-10%

+1.8V

LAN_A_AUX

1 2

+3.3V

LAN_A_AUX

21

C39

10uF 6.3V

C236

10uF 6.3V

21

10uF 6.3V

C94

1 2

0.1uF 16V

C654

0.1uF 16V

1 2

C107

C100

1 2

0.1uF 16V

X00_GT_051503

0.1uF 16V

C102

1 2

0.1uF 16V

1 2

C655

1 2

C681

0.1uF 16V

1 2

C656

0.1uF 16V

C682

0.1uF 16V

C103

1 2

0.1uF 16V

X00_GT_051503

1 2

C657

0.1uF 16V

1 2

0.1uF 16V

C105

1 2

0.1uF 16V

1 2

C845

0.1uF 16V

C106

1 2

0.1uF 16V

C658

1 2

0.1uF 16V

C828

1 2

C660

+3.3V+3.3V

LAN_A_AUX

21

C41

C837

0.1uF 16V

1 2

C671

0.1uF 16V

C40

1 2

10uF 6.3V

C829

1 2

0.1uF 16V

TITLE

LINDY PLANAR

DWG NO.

DATE

DC

1 2

C678

0.1uF 16V

D1660

0.1uF 16V

C834

1 2

0.1uF 16V

1 2

C679

0.1uF 16V

C101

1 2

C104

0.1uF 16V

C835

1 2

0.1uF 16V

COMPUTER CORPORATION AUSTIN,TEXAS

SHEET

1 2

C680

1 2

0.1uF 16V

24 OF 611/13/2004

1 2

C843

0.1uF 16V

C836

1 2

REV.

X03

C844

0.1uF 16V

1 2

0.1uF 16V

3

PXH_PCI_B_AD31

27

PXH_PCI_B_AD30

27

PXH_PCI_B_AD29

27

PXH_PCI_B_AD28

27

PXH_PCI_B_AD27

27

PXH_PCI_B_AD26

27

PXH_PCI_B_AD25

27

PXH_PCI_B_AD24

25,27

PXH_PCI_B_AD23

27

PXH_PCI_B_AD22

27

PXH_PCI_B_AD21

27

PXH_PCI_B_AD20

27

1

2

+3.3V

LAN_B_AUX

R429

2 1

27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27

27 27 27 27

25 27,30 27,30 27,30 27,30 27,30 27,30 27,30

27

25

27

5,24

28

2.7K-5%

PXH_PCI_B_AD19 PXH_PCI_B_AD18 PXH_PCI_B_AD17 PXH_PCI_B_AD16 PXH_PCI_B_AD15 PXH_PCI_B_AD14 PXH_PCI_B_AD13 PXH_PCI_B_AD12 PXH_PCI_B_AD11 PXH_PCI_B_AD10 PXH_PCI_B_AD9 PXH_PCI_B_AD8 PXH_PCI_B_AD7 PXH_PCI_B_AD6 PXH_PCI_B_AD5 PXH_PCI_B_AD4 PXH_PCI_B_AD3 PXH_PCI_B_AD2 PXH_PCI_B_AD1 PXH_PCI_B_AD0

PXH_PCI_B_CBE3_N PXH_PCI_B_CBE2_N PXH_PCI_B_CBE1_N PXH_PCI_B_CBE0_N

IDSEL_LOM_B PXH_PCI_B_FRAME_N PXH_PCI_B_IRDY_N PXH_PCI_B_TRDY_N PXH_PCI_B_DEVSEL_N PXH_PCI_B_STOP_N PXH_PCI_B_PERR_N PXH_PCI_B_SERR_N PXH_PCI_B_PAR PXH_PCI_B_PCLKO0

GB_LOMB_CLKRUN_N

PXH_PCI_B_IRQ0_N PXH_PCI_B_M66EN PXH_PCI_B_PCIRST_N PXH_PCI_B_GNT0_N PXH_PCI_B_REQ0_N

SYSTEM_PWRGOOD_NIC PCI_B_PME_N GB_LOMB_AUX_PWR

Note: Switching to/from Aux on previous page

SUB=SUB*_D5541

X00_GT_052003

B8

AD31

A8

AD30

C7

AD29

C6

AD28

B6

AD27

B5

AD26

A5

AD25

B4

AD24

B2

AD23

B1

AD22

C1

AD21

D3

AD20

D2

AD19

D1

AD18

E3

AD17

K1

AD16

L2

AD15

L1

AD14

M3

AD13

M2

AD12

M1

AD11

N2

AD10

N3

AD9

P3

AD8

N4

AD7

P4

AD6

M5

AD5

N5

AD4

P5

AD3

P6

AD2

M7

AD1

N7

AD0

C4

CBE3

F3

CBE2

L3

CBE1

M4

CBE0

A4

IDSEL

F2

FRAME

F1

IRDY

G3

TRDY

H3

DEVSEL

H1

STOP

J2

PERR

A2

SERR

J1

PAR

G1

CLK

C8

CLK_RUN

H2

INTA

C2

M66EN

B9

RST

J3

GNT

C3

REQ

A9

LAN_PWR_GOOD

A6

PME

J12

AUX_PWR

TABOR_2

RSVD_NC_N11 RSVD_VSS_D4 RSVD_VSS_E4

FLSH_SO/LAN_DISABLE

LED2/LINK100

LED3/LINK1000

82541EI

HETERO 1 OF 2

NC_A1

NC_A14

NC_D9

NC_D10

NC_L8 NC_P1

NC_P14 RSVD_NC_C5 RSVD_NC_L7 RSVD_NC_M8

IEEE_TESTIEEE_TEST+

XTAL1 XTAL2

JTAG_TCK JTAG_TMS

JTAG_TRST

JTAG_TDI JTAG_TDO

TEST

FLSH_SCK

FLSH_CE FLSH_SI

SMBCLK

SMBDATA

SMBALERT

EE_MODE

EE_DO EE_DI EE_CS EE_SK

LED0/LINK

LED1/ACT

CTRL_12 CTRL_18

SDP0 SDP1 SDP2 SDP3

MDIA0-

MDIA0+

MDIA1-

MDIA1+

MDIA2-

MDIA2+

MDIA3-

MDIA3+

A1

NC_A1_82541_2

A14

NC_A14_82541_2

D9

NC_D9_82541_2

D10

NC_D10_82541_2

L8

NC_L8_82541_2

P1

NC_P1_82541_2

P14

NC_P14_82541_2

C5

NC_C5_82541_2

L7

NC_L7_82541_2

M8

NC_M8_82541_2

N11

NC_N11_82541_2 D4 E4

D14

GB_LOMB_TEST-

B14

GB_LOMB_TEST+

K14

GB_LOMB_XTAL1 J14

GB_LOMB_XTAL2

L14

GB_LOMB_JTAG_TCK

L12

GB_LOMB_JTAG_TMS

L13

GB_LOMB_JTAG_TRST_N

M13

GB_LOMB_JTAG_TDI

M14

NC_GB_LOMB_JTAG_TDO

A13

GB_LOMB_TEST

N9

NC_GB_LOMB_FLSH_SCK

P9

DISABLE_TABOR_2_N

M9

NC_GB_LOMB_FLSH_CE

M11

NC_GB_LOMB_FLSH_SI

A10

I2C_NICB_SCL_R

C9

I2C_NICB_SDA_R

B10

NIC_ALERT_N

J4

GB_LOMB_EEMODE

N10

GB_LOMB_EEDO

P10

GB_LOMB_EEDI

P7

GB_LOMB_EECS

M10

GB_LOMB_EESK

A12

GB_LOMB_LINK_UP_LED_N

C11

GB_LOMB_ACT_LED_N

B11

GB_LOMB_LINK100_LED_N

B12

NC_GB_LOMB_LINK1000_LED_N

P11

GB_LOMB_CTRL_12

B13

GB_LOMB_CTRL_18

N14

NC_GB_LOMB_SDP0

P13

NC_GB_LOMB_SDP1

N13

NC_GB_LOMB_SDP2

M12

NC_GB_LOMB_SDP3

C14

MDIB0-

C13

MDIB0+

E14

MDIB1-

E13

MDIB1+

F14

MDIB2-

F13

MDIB2+

H14

MDIB3-

H13

MDIB3+

21

R36321R36021R35921R35821R35721R356

49.9-1%

1 2

C575

0.1uF 16V

49.9-1%

C574

25

25 25 24,44,45

25

26 26 25

25 25

49.9-1%

1 2

0.1uF 16V

ROOM = LOM_B

ECAD: Route traces as differential

12

to connector

NP*

J2

ECAD: Place these components as close

to the GB_LOM as possible

X03_GT_010704

1

8

RN21

2 3 4

100

100 Ohm 5%

49.9-1%

1 2

C573

7 6 5

21

R169

1K-1%

25 25 25 25

21

R364

49.9-1%

0.1uF 16V

C572

25MHz-30ppm

21

C622

22pF 50V

+3.3V

LAN_B_AUX

2.7K-5%

2 1

21

R355

49.9-1%

ECAD: Place these termination networks close

1 2

0.1uF 16V

B D

X3

1 2

R1796

25 25

to the LOM IC

21

C621

22pF 50V

GB_LOMB_EECS GB_LOMB_EEDO

26 26 26 26 26 26 26 26

+3.3V

LAN_B_AUX

X03_GT_010704

GB_LOMB_EEMODE

25

LAN_B_AUX

U25

PRELIMINARY SYMBOL

1

CS

2

SO

3

WP

4

GND

ENG MGR APPROVAL NEEDED FOR MODEM

SPI Serial EEPROMs-1024X8

SUB*_K4600

8

VCC

7

HOLD

6

SCK

5

SI

X03_GT_010703

+3.3V

LAN_B_AUX

R283

2 1

+3.3V

LAN_B_AUX

C564

1 2

0.1uF 16V

GB_LOMB_EESK GB_LOMB_EEDI

2.7K-5%

+3.3V

R1795

1 2

LAN_B_AUX

0-5%

25 25

R287

100K-1%

+3.3V

+1.2V

+1.8V

LAN_B_AUX

Sleep mode current limiter

X00_GT_051503

C577

12

1 2

0.1uF 16V

GB_LOMB_VIO

SUB=SUB*_D5541

G2

VIO

A3

3P3V_A3

A7

3P3V_A7

A11

3P3V_A11

E1

3P3V_E1

K3

3P3V_K3

K4

3P3V_K4

K13

3P3V_K13

N6

3P3V_N6

N8

3P3V_N8

P2

3P3V_P2

P12

3P3V_P12

G5

1P2V_G5

G6

1P2V_G6

H5

1P2V_H5

H6

1P2V_H6

H7

1P2V_H7

H8

1P2V_H8

J5

1P2V_J5

J6

1P2V_J6

J7

1P2V_J7

J8

1P2V_J8

J9

1P2V_J9

J10

1P2V_J10

J11

1P2V_J11

K5

1P2V_K5

K6

1P2V_K6

K7

1P2V_K7

K8

1P2V_K8

K9

1P2V_K9

K10

1P2V_K10

K11

1P2V_K11

L4

1P2V_L4

L5

1P2V_L5

L9

1P2V_L9

L10

1P2V_L10

E11

A1.2V_E11

E12

A1.2V_E12

G13

A1.2V_G13

H11

A1.2V_H11

G4

PLL_1.2V_G4

H4

PLL_1.2V_H4

D12

CLKR_1.8V

J13

XTAL_1.8V

D11

A1.8V_D11

G12

A1.8V_G12

HETERO 2 OF 2

TABOR_2

82541EI

CA

B3

GND_B3

B7

GND_B7

C10

GND_C10

D5

GND_D5

D6

GND_D6

D7

GND_D7

D8

GND_D8

E2

GND_E2

E5

GND_E5

E6

GND_E6

E7

GND_E7

E8

GND_E8

E9

GND_E9

E10

GND_E10

F4

GND_F4

F5

GND_F5

F6

GND_F6

F7

GND_F7

F8

GND_F8

F9

GND_F9

F10

GND_F10

G7

GND_G7

G8

GND_G8

G9

GND_G9

G10

GND_G10

H9

GND_H9

H10

GND_H10

K2

GND_K2

L6

GND_L6

L11

GND_L11

M6

GND_M6

N1

GND_N1

N12

GND_N12

P8

GND_P8

C12

AGND_C12

D13

AGND_D13

F11

AGND_F11

G11

AGND_G11

G14

AGND_G14

K12

AGND_K12

F12

CLKR_CAP

H12

XTAL_CAP

ECAD: Place all decoupling caps close to LOM chip pins

X00_GT_051503

NP

1 2

C347

1000pF

50V-10%

PART_NUMBER=79015

NP

21

C348

1000pF

50V-10%

PART_NUMBER=79015

LAN_B_AUX

24,44,59

+3.3V

I2C_NIC_SDA I2C_NIC_SCL

GB_LOMB_CLKRUN_N

25

GB_LOMB_LINK100_LED_N

25

DISABLE_TABOR_2_N

25

NP

R548

1 2

NP

0-5%

2.7K-5%

+3.3V

LAN_B_AUX

R1911

0-5%

R127

NP*

2 1

R549

2.7K-5%

21

R642

330-5%

X00_GT_051503

21

R561

R560

4.7K

1 2

12

FP_GB_ETH_LED_2

X03_GT_010703

4.7K I2C_NICB_SDA_R I2C_NICB_SCL_R

25

32

1

2

+3.3V

LAN_AUX

3

R22

1 2

1.33-1%

NET_PHYSICAL_TYPE=25MIL

R1956

1 2

0-5%

25,27

PXH_PCI_B_AD24

+12V

2.7K-5%

1 2

R1813

GB_LOMB_CTRL_12

25

NET_PHYSICAL_TYPE=25MIL

Q142

R_IDSEL_LOMB

3

2

D

S

G

NP*

1N914

8.2K-5%

1 3

1

2N7002

12

R1814

R1815

2 1

100-5%

IDSEL_LOM_B

25

D71

D

3

Q143

DISABLE_ETHERNET_2

40

4 4

subsys done

2N7002

1

G

S

2

A B

Q82

2N7002

D

x03b_sd

3

1

G

S

2

25

3

1 2

NP

R1957

NP

R1958

1 2

C570

42

150-1%

0-5%

1

BCP69

Q3

GB_LOMB_CTRL_18

NET_PHYSICAL_TYPE=25MIL

21

C589

0.1uF 16V

R1959

1 2

0-5%

4.7uF

6.3V-10%

X00_GT_011804

+1.2V

LAN_B_AUX

NET_PHYSICAL_TYPE=25MIL

BCP69

Q4

+1.2V

LAN_B_AUX

1 2

C263

X00_GT_011804

3

1

42

NP

R1960

150-1%

1 2

NP

C571

1 2

0.1uF 16V

C585

21

4.7uF

6.3V-10%

21

C262

10uF 6.3V

+1.8V

LAN_B_AUX

X00_GT_092303

NP

21

C264

10uF 6.3V

Gigabit NIC B- Tabor II

R1961

1 2

82.5-1%

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

Regulators & Decoupling

1 2

C555

1 2

C566

0.1uF 16V

C567

0.1uF 16V

+3.3V

LAN_B_AUX

21

C261

0.1uF 16V

21

C259

10uF 6.3V

C568

0.1uF 16V

10uF 6.3V

C569

0.1uF 16V

1 2

C576

0.1uF 16V

C686

C558

1 2

0.1uF 16V

1 2

C687

C842

1 2

0.1uF 16V

X00_GT_051503

1 2

C690

0.1uF 16V

C562

0.1uF 16V

1 2

0.1uF 16V

C691

C840

1 2

C694

0.1uF 16V

C560

1 2

0.1uF 16V

1 2

0.1uF 16V

C699

+1.8V

LAN_B_AUX

21

C258

C841

1 2

0.1uF 16V

1 2

0.1uF 16V

1 2

C257

10uF 6.3V

C563

1 2

C700

0.1uF 16V

10uF 6.3V

C561

0.1uF 16V

C556

1 2

C702

0.1uF 16V

1 2

0.1uF 16V

LAN_B_AUX

0.1uF 16V

C704

X00_GT_051503

1 2

C565

+3.3V

21

C260

10uF 6.3V

1 2

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 25 OF 61

1 2

C705

0.1uF 16V

1 2

C706

0.1uF 16V

X00_GT_051503

21

C256

COMPUTER CORPORATION AUSTIN,TEXAS

SHEET

1 2

C846

0.1uF 16V

1 2

C707

C557

1 2

10uF 6.3V

REV.

0.1uF 16V

X03

C847

C848

C839

1 2

0.1uF 16V

1 2

0.1uF 16V

DC

3

B D

CA

1

ROOM = LOMB_CONN

ECAD: No digital signals should be routed within

300 mil (7.5mm) of differential pairs

ROOM = LOMA_CONN

+3.3V

LAN_A_AUX

GB_LOMA_ACT_LED_N

21

C1610

21

C614

470pF

50V-10%

470pF

50V-10%

24

21

C1611

C128

2 1

0.1uF 16V

C129

2 1

0.1uF 16V

C137

2 1

0.1uF 16V

C130

2 1

0.1uF 16V

470pF

50V-10%

R66

12

330-5%

+1.8V

2

LAN_A_AUX

21

C161

BLM21P600SG

24

0.1uF 16V

24

ECAD: Place these capacitors close to the

L9

1 2

MDIA0+

MDIA0-

MDIA1+

MDIA1-

MDIA2+

MDIA2-

MDIA3+

MDIA3-

LAN_A_AUX

center tap pins of the mag/conn

LOMA_CT_1.8V_FIL

+3.3V

330-5%

12

R67

NET_PHYSICAL_TYPE=PLANE

3

GB_LOMA_LINK_UP_LED_N

24

Gigabit LOM A

Errata for Tabor B0: Activity LED should be conencted to LINKA100#

21

470pF

C613

50V-10%

NIC_1_CONN

C1

R1829

1 2

0-5%

13 14

16

17 15

ROOM=LOMA_CONN

YELLOW

A1

11

TRD1+

12

TRCT1

10

TRD1-

4

TRD2+

6

TRCT2

5

TRD2-

3

TRD3+

1

TRCT3

2

TRD3-

8

TRD4+

7

TRCT4

9

TRD4-

COMMON

GREEN

ORANGE

RJ45 MAGNETIC JACK W/2 LED'S

SUB=SUB*_Y1408

4x75ohms

1000pF 2kV

RJ45

1

2

3

6

4

5

7

8

SH1

Shield

SH2

X00_GT_052703

SH1 SH2

+1.8V

LAN_B_AUX

ECAD: No digital signals should be routed within

300 mil (7.5mm) of differential pairs

+3.3V

LAN_B_AUX

R64

X00_GT_051303X00_GT_051303

ECAD: Place these capacitors close to the

center tap pins of the mag/conn

1 2

BLM21P600SG

MDIB0+

0.1uF 16V

25

MDIB0-

25

MDIB1+

25

MDIB1-

25

MDIB2+

25

MDIB2-

25

MDIB3+

25

MDIB3-

25

21

C160

330-5%

L6

LOMB_CT_1.8V_FILNET_PHYSICAL_TYPE=PLANE

+3.3V

LAN_B_AUX

330-5%

R65

GB_LOMB_LINK_UP_LED_N

25

GB_LOMB_ACT_LED_N

12

25

21

470pF

C1613

50V-10%

C124

2 1

0.1uF 16V

C125

2 1

0.1uF 16V

C127

2 1

0.1uF 16V

C126

2 1

0.1uF 16V

12

21

470pF

C1612

50V-10%

21

470pF

C616

50V-10%

Gigabit LOM B

Errata for Tabor B0: Activity LED should be conencted to LINKA100#

21

470pF

C615

50V-10%

NIC_2_CONN

C1

R1830

1 2

0-5%

13 14

16

17 15

ROOM=LOMB_CONN

YELLOW

A1

11

TRD1+

12

TRCT1

10

TRD1-

4

TRD2+

6

TRCT2

5

TRD2-

3

TRD3+

1

TRCT3

2

TRD3-

8

TRD4+

7

TRCT4

9

TRD4-

COMMON

GREEN

ORANGE

RJ45 MAGNETIC JACK W/2 LED'S

SUB=SUB*_Y1408

4x75ohms

1000pF 2kV

X00_GT_060203

RJ45

Shield

1

2

3

6

4

5

7

8

SH1

SH2

X00_GT_052703

2

3

4 4

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

X03

subsys done

A B

GIGABIT LOM Connectors

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 26 OF 61

DC

B D

CA

CHANGES MADE FOR PLANAR PXH

VERSION -0.8

1-21-2004_9:57

ROOM = PXH

1

PXH

PXH_PCI_A_AD0

24

PXH_PCI_A_AD1

24

PXH_PCI_A_AD2

24

PXH_PCI_A_AD3

24

PXH_PCI_A_AD4

24

PXH_PCI_A_AD5

24

PXH_PCI_A_AD6

24

PXH_PCI_A_AD7

24

PXH_PCI_A_AD8

24

PXH_PCI_A_AD9

24

PXH_PCI_A_AD10

24

PXH_PCI_A_AD11

24

PXH_PCI_A_AD12

24

PXH_PCI_A_AD13

24

PXH_PCI_A_AD14

24

PXH_PCI_A_AD15

24

PXH_PCI_A_AD16

24

PXH_PCI_A_AD17

24

PXH_PCI_A_AD18

24

PXH_PCI_A_AD19

24

PXH_PCI_A_AD20

24

PXH_PCI_A_AD21

24

2

3

PXH_PCI_A_AD22

24

PXH_PCI_A_AD23

24

PXH_PCI_A_AD24

24

PXH_PCI_A_AD25

24

PXH_PCI_A_AD26

24

PXH_PCI_A_AD27

24

PXH_PCI_A_AD28

24

PXH_PCI_A_AD29

24

PXH_PCI_A_AD30

24

PXH_PCI_A_AD31

24

PU_NC_PXH_PCI_A_AD32

30

PU_NC_PXH_PCI_A_AD33

30

PU_NC_PXH_PCI_A_AD34

30

PU_NC_PXH_PCI_A_AD35

30

PU_NC_PXH_PCI_A_AD36

30

PU_NC_PXH_PCI_A_AD37

30

PU_NC_PXH_PCI_A_AD38

30

PU_NC_PXH_PCI_A_AD39

30

PU_NC_PXH_PCI_A_AD40

30

PU_NC_PXH_PCI_A_AD41

30

PU_NC_PXH_PCI_A_AD42

30

PU_NC_PXH_PCI_A_AD43

30

PU_NC_PXH_PCI_A_AD44

30

PU_NC_PXH_PCI_A_AD45

30

PU_NC_PXH_PCI_A_AD46

30

PU_NC_PXH_PCI_A_AD47

30

PU_NC_PXH_PCI_A_AD48

30

PU_NC_PXH_PCI_A_AD49

30

PU_NC_PXH_PCI_A_AD50

30

PU_NC_PXH_PCI_A_AD51

30

PU_NC_PXH_PCI_A_AD52

30

PU_NC_PXH_PCI_A_AD53

30

PU_NC_PXH_PCI_A_AD54

30

PU_NC_PXH_PCI_A_AD55

30

PU_NC_PXH_PCI_A_AD56

30

PU_NC_PXH_PCI_A_AD57

30

PU_NC_PXH_PCI_A_AD58

30

PU_NC_PXH_PCI_A_AD59

30

PU_NC_PXH_PCI_A_AD60

30

PU_NC_PXH_PCI_A_AD61

30

PU_NC_PXH_PCI_A_AD62

30

PU_NC_PXH_PCI_A_AD63

30

PXH_PCI_A_CBE0_N

24

PXH_PCI_A_CBE1_N

24

PXH_PCI_A_CBE2_N

24

PXH_PCI_A_CBE3_N

24

PU_NC_PXH_PCI_A_CBE4_N

30

PU_NC_PXH_PCI_A_CBE5_N

30

PU_NC_PXH_PCI_A_CBE6_N

30

PU_NC_PXH_PCI_A_CBE7_N

30

PXH_PCI_A_REQ0_N

24

NC_PXH_PCI_A_REQ1_N NC_PXH_PCI_A_REQ2_N NC_PXH_PCI_A_REQ3_N NC_PXH_PCI_A_REQ4_N NC_PXH_PCI_A_REQ5_N

PXH_PCI_A_GNT0_N

24

NC_PXH_PCI_A_GNT1_N NC_PXH_PCI_A_GNT2_N NC_PXH_PCI_A_GNT3_N NC_PXH_PCI_A_GNT4_N NC_PXH_PCI_A_GNT5_N

4 4

subsys done

AC23

PAAD0

AD23

PAAD1

AC22

PAAD2

AB21

PAAD3

AD21

PAAD4

AC20

PAAD5

AD20

PAAD6

AC19

PAAD7

AB18

PAAD8

AC17

PAAD9

AD17

PAAD10

AC16

PAAD11

AB15

PAAD12

AD15

PAAD13

AD14

PAAD14

AC13

PAAD15

W24

PAAD16

Y23

PAAD17

AA23

PAAD18

Y22

PAAD19

AB22

PAAD20

AA21

PAAD21

Y20

PAAD22

Y19

PAAD23

AB19

PAAD24

W18

PAAD25

AA18

PAAD26

Y17

PAAD27

Y16

PAAD28

AB16

PAAD29

W15

PAAD30

AA15

PAAD31

T22

PAAD32

T21

PAAD33

R24

PAAD34

R23

PAAD35

P23

PAAD36

P22

PAAD37

N22

PAAD38

N21

PAAD39

M23

PAAD40

M21

PAAD41

L23

PAAD42

L20

PAAD43

K24

PAAD44

K22

PAAD45

J23

PAAD46

J21

PAAD47

H23

PAAD48

H22

PAAD49

R20

PAAD50

R18

PAAD51

P19

PAAD52

P17

PAAD53

N19

PAAD54

N17

PAAD55

M18

PAAD56

M17

PAAD57

L19

PAAD58

L17

PAAD59

K18

PAAD60

K17

PAAD61

K19

PAAD62

J17

PAAD63

AD18

PACBE0

AC14

PACBE1

AA24

PACBE2

AA20

PACBE3

H17

PACBE4

J18

PACBE5

H19

PACBE6

H20

PACBE7

W21

PAREQ0

W22

PAREQ1

V18

PAREQ2

N18

PAREQ3

L22

PAREQ4

W13

PAREQ5

W19

PAGNT0

J24

PAGNT1

Y14

PAGNT2

Y13

PAGNT3

AA14

PAGNT4

U23

PAGNT5

PXH MCH INTERFACE

HETERO 1 OF 4

x03_tj_121503

SUB*_D5792

x03b_tj_012004

REV 1.0

(PXH-D)

ADD1=ADD*_C2508_HSASSY

A B

PBAD0 PBAD1 PBAD2 PBAD3 PBAD4 PBAD5 PBAD6 PBAD7 PBAD8

PBAD9 PBAD10 PBAD11 PBAD12 PBAD13 PBAD14 PBAD15 PBAD16 PBAD17 PBAD18 PBAD19 PBAD20 PBAD21 PBAD22 PBAD23 PBAD24 PBAD25 PBAD26 PBAD27 PBAD28 PBAD29 PBAD30 PBAD31 PBAD32 PBAD33 PBAD34 PBAD35 PBAD36 PBAD37 PBAD38 PBAD39 PBAD40 PBAD41 PBAD42 PBAD43 PBAD44 PBAD45 PBAD46 PBAD47 PBAD48 PBAD49 PBAD50 PBAD51 PBAD52 PBAD53 PBAD54 PBAD55 PBAD56 PBAD57 PBAD58 PBAD59 PBAD60 PBAD61 PBAD62 PBAD63

PBCBE0 PBCBE1 PBCBE2 PBCBE3 PBCBE4 PBCBE5 PBCBE6 PBCBE7

PBREQ0 PBREQ1 PBREQ2 PBREQ3 PBREQ4 PBREQ5

PBGNT0 PBGNT1 PBGNT2 PBGNT3 PBGNT4 PBGNT5

AC2

PXH_PCI_B_AD0

AD2

PXH_PCI_B_AD1

AD3

PXH_PCI_B_AD2

AB4

PXH_PCI_B_AD3

AC4

PXH_PCI_B_AD4

AC5

PXH_PCI_B_AD5

AD5

PXH_PCI_B_AD6

AD6

PXH_PCI_B_AD7

AB7

PXH_PCI_B_AD8

AC7

PXH_PCI_B_AD9

AD8

PXH_PCI_B_AD10

AB9

PXH_PCI_B_AD11

AD9

PXH_PCI_B_AD12

AB10

PXH_PCI_B_AD13

AC10

PXH_PCI_B_AD14

AD11

PXH_PCI_B_AD15

W1

PXH_PCI_B_AD16

Y2

PXH_PCI_B_AD17

AA2

PXH_PCI_B_AD18

AA3

PXH_PCI_B_AD19

AB3

PXH_PCI_B_AD20

Y4

PXH_PCI_B_AD21

Y5

PXH_PCI_B_AD22

W6

PXH_PCI_B_AD23

AA6

PXH_PCI_B_AD24

W7

PXH_PCI_B_AD25

Y7

PXH_PCI_B_AD26

Y8

PXH_PCI_B_AD27

AA8

PXH_PCI_B_AD28

W9

PXH_PCI_B_AD29

Y10

PXH_PCI_B_AD30

AA9

PXH_PCI_B_AD31

R2

PU_NC_PXH_PCI_B_AD32

R3

PU_NC_PXH_PCI_B_AD33

P1

PU_NC_PXH_PCI_B_AD34

P4

PU_NC_PXH_PCI_B_AD35

P5

PU_NC_PXH_PCI_B_AD36

N3

PU_NC_PXH_PCI_B_AD37

N4

PU_NC_PXH_PCI_B_AD38

M2

PU_NC_PXH_PCI_B_AD39

M3

PU_NC_PXH_PCI_B_AD40

L1

PU_NC_PXH_PCI_B_AD41

L2

PU_NC_PXH_PCI_B_AD42

K3

PU_NC_PXH_PCI_B_AD43

K4

PU_NC_PXH_PCI_B_AD44

J2

PU_NC_PXH_PCI_B_AD45

J3

PU_NC_PXH_PCI_B_AD46

H4

PU_NC_PXH_PCI_B_AD47

H1

PU_NC_PXH_PCI_B_AD48

H2

PU_NC_PXH_PCI_B_AD49

P7

PU_NC_PXH_PCI_B_AD50

P8

PU_NC_PXH_PCI_B_AD51

N6

PU_NC_PXH_PCI_B_AD52

N7

PU_NC_PXH_PCI_B_AD53

M5

PU_NC_PXH_PCI_B_AD54

M6

PU_NC_PXH_PCI_B_AD55

L5

PU_NC_PXH_PCI_B_AD56

L7

PU_NC_PXH_PCI_B_AD57

K6

PU_NC_PXH_PCI_B_AD58

K7

PU_NC_PXH_PCI_B_AD59

J6

PU_NC_PXH_PCI_B_AD60

J7

PU_NC_PXH_PCI_B_AD61

H5

PU_NC_PXH_PCI_B_AD62

H8

PU_NC_PXH_PCI_B_AD63

AC8

PXH_PCI_B_CBE0_N

AB12

PXH_PCI_B_CBE1_N

Y1

PXH_PCI_B_CBE2_N

AA5

PXH_PCI_B_CBE3_N

G9

PU_NC_PXH_PCI_B_CBE4_N

H9

PU_NC_PXH_PCI_B_CBE5_N

G6

PU_NC_PXH_PCI_B_CBE6_N

G7

PU_NC_PXH_PCI_B_CBE7_N

L4

PXH_PCI_B_REQ0_N

AB6

NC_PXH_PCI_B_REQ1_N

T6

NC_PXH_PCI_B_REQ2_N

T1

NC_PXH_PCI_B_REQ3_N

V5

NC_PXH_PCI_B_REQ4_N

AA12

NC_PXH_PCI_B_REQ5_N

J5

PXH_PCI_B_GNT0_N

K1

NC_PXH_PCI_B_GNT1_N

Y11

NC_PXH_PCI_B_GNT2_N

AA11

NC_PXH_PCI_B_GNT3_N

W12

NC_PXH_PCI_B_GNT4_N

L8

NC_PXH_PCI_B_GNT5_N

25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30

25 25 25 25 30 30 30 30

25

X00_GT_052803

5,40,55,58,59

PXH_PCI_A_FRAME_N

24,30

PXH_PCI_A_IRDY_N

24,30

PXH_PCI_A_DEVSEL_N

24,30

PXH_PCI_A_TRDY_N

24,30

PXH_PCI_A_STOP_N

24,30

PXH_PCI_A_PERR_N

24,30

PXH_PCI_A_SERR_N

24,30

PU_NC_PXH_PCI_A_PLOCK_N

30

PXH_PCI_A_PAR

24

PU_NC_PXH_PCI_A_PAR64

30

PU_NC_PXH_PCI_A_REQ64_N

30

PU_NC_PXH_PCI_A_ACK64_N

30

PXH_PCI_A_PME_N

27,28

PXH_PCI_A_M66EN

24,27

PXH_PCI_A_PCIXCAP

27

PXH_PCI_A_PCLKO0_R

27

NC_PXH_PCI_A_PCLKO1 NC_PXH_PCI_A_PCLKO2 NC_PXH_PCI_A_PCLKO3 NC_PXH_PCI_A_PCLKO4 NC_PXH_PCI_A_PCLKO5 PXH_PCI_A_PCLKO6_FB

27

PXH_PCI_A_PCLKI_FB

27

PXH_PCI_A_PCIRST_N

24

24 25

27 27

PXH_PCI_A_133EN

27

PCI_RST_PLANAR_N

28 28 28

28

properties I had to fix when I did the symbol update

SUB=SUB*_R1493 REFDES=PXH ROOM=PXH

-Change REF DES to PXH

-Change pxh_pci_a_* to PXH_PCI_A_*

-Change pxh_pci_b_* to PXH_PCI_B_*

-Change pu_nc_pxh* to pu_nc_pxh*

-Change RESET_IN to PCI_RST_PLANAR_N

-Change pxh_pci_a_IRQ(1 to 7) to NC's

-Disconnect extra clocks

-Change strapping to PCI 66MHz

-M66EN OK

-133EN OK

-PCIXCAP, change circuit to pulldown (disable)

-Change powergood signal to SYS_AUX_PWRGOOD_NIC

-Change unused 64bit PCI signals to NC's on both hetero's

-Add I2C address

-Changed & fixed PME net names

-Changed IRDY net names

-Connected IRQ0 on B segment

-Change I2C address

PXH_PCI_A_IRQ0_N PXH_PCI_B_IRQ0_N NC_PXH_PCI_A_IRQ2_N NC_PXH_PCI_A_IRQ3_N NC_PXH_PCI_A_IRQ4_N NC_PXH_PCI_A_IRQ5_N NC_PXH_PCI_A_IRQ6_N NC_PXH_PCI_A_IRQ7_N NC_PXH_PCI_A_IRQ8_N NC_PXH_PCI_A_IRQ9_N NC_PXH_PCI_A_IRQ10_N PXH_PCI_A_IRQ11_N PXH_PCI_A_IRQ12_N NC_PXH_PCI_A_IRQ13_N NC_PXH_PCI_A_IRQ14_N NC_PXH_PCI_A_IRQ15_N

EXP_B_DN_4N

17

EXP_B_DN_4P

17

EXP_B_DN_5N

17

EXP_B_DN_5P

17

EXP_B_DN_6N

17

EXP_B_DN_6P

17

EXP_B_DN_7N

17

EXP_B_DN_7P

17

NC_EXP_PXH_DN_4N NC_EXP_PXH_DN_4P NC_EXP_PXH_DN_5N NC_EXP_PXH_DN_5P NC_EXP_PXH_DN_6N NC_EXP_PXH_DN_6P NC_EXP_PXH_DN_7N NC_EXP_PXH_DN_7P

PXH_TCK PXH_TMS PXH_TDI NC_PXH_TDO PXH_TRST_N

V23 V24 U20 U22 U19 P20 T19 R21

AB13

J20 AC24 AB24

V21

T18

E17

V14

W16

V17

U17

U14

U16

V15

U13 AA17

G24

F24

D23

C24

B24

A23

D24

F23

G21

D22

G22

F22

B23

E22

F21

E21

V20

H16

F10

G10

D12

E12

C11

C10

H12

G12

D13

C13

A16

A15

E15

E14

B9 C9

B7 E7 E9 A6 F9

PXH

PAFRAME PAIRDY PADEVSEL PATRDY PASTOP PAPERR PASERR PAPLOCK PAPAR PAPAR64 PAREQ64 PAACK64

PAPME

PAM66EN PAPCIXCAP

PAPCLKO0 PAPCLKO1 PAPCLKO2 PAPCLKO3 PAPCLKO4 PAPCLKO5 PAPCLKO6

PAPCLKI PAPCIRST

PAIRQ0 PAIRQ1 PAIRQ2 PAIRQ3 PAIRQ4 PAIRQ5 PAIRQ6 PAIRQ7 PAIRQ8 PAIRQ9 PAIRQ10 PAIRQ11 PAIRQ12 PAIRQ13 PAIRQ14 PAIRQ15

PA133EN

RSTIN

EXP_RXN0EXP_RXP0+ EXP_RXN1EXP_RXP1+ EXP_RXN2EXP_RXP2+ EXP_RXN3EXP_RXP3+ EXP_RXN4EXP_RXP4+ EXP_RXN5EXP_RXP5+ EXP_RXN6EXP_RXP6+ EXP_RXN7EXP_RXP7+

TCK TMS TDI TDO TRST

PXH MCH INTERFACE

HETERO 2 OF 4

REV 1.0

PBFRAME

PBIRDY

PBDEVSEL

PBTRDY PBSTOP PBPERR PBSERR

PBPLOCK

PBPAR PBPAR64 PBREQ64 PBACK64

PBPME

PBM66EN

PBPCIXCAP

PBPCLKO0 PBPCLKO1 PBPCLKO2 PBPCLKO3 PBPCLKO4 PBPCLKO5 PBPCLKO6

PBPCLKI

PBPCIRST

PBIRQ0 PBIRQ1 PBIRQ2 PBIRQ3 PBIRQ4 PBIRQ5 PBIRQ6 PBIRQ7 PBIRQ8

PBIRQ9 PBIRQ10 PBIRQ11 PBIRQ12 PBIRQ13 PBIRQ14 PBIRQ15

PB133EN

EXP_CLKEXP_CLK+

EXP_TXN0EXP_TXP0+ EXP_TXN1EXP_TXP1+ EXP_TXN2EXP_TXP2+ EXP_TXN3EXP_TXP3+ EXP_TXN4EXP_TXP4+ EXP-TXN5EXP_TXP5+ EXP_TXN6EXP_TXP6+ EXP_TXN7EXP_TXP7+

EXP_COMP0 EXP_COMP1

SCLK

SDATA

27

U4

PXH_PCI_B_FRAME_N

U5

PXH_PCI_B_IRDY_N

T3

PXH_PCI_B_DEVSEL_N

W4

PXH_PCI_B_TRDY_N

V3

PXH_PCI_B_STOP_N

U2

PXH_PCI_B_PERR_N

V2

PXH_PCI_B_SERR_N

W3

PU_NC_PXH_PCI_B_PLOCK_N

AC11

PXH_PCI_B_PAR

H7

PU_NC_PXH_PCI_B_PAR64

AC1

PU_NC_PXH_PCI_B_REQ64_N

AB1

PU_NC_PXH_PCI_B_ACK64_N

R5

U1 D7

W10 V9 V8 T7 V6 U7 U8

U10 N8

F2

NC_PXH_PCI_B_IRQ0_N

G1

NC_PXH_PCI_B_IRQ1_N

F3

NC_PXH_PCI_B_IRQ2_N

C1

NC_PXH_PCI_B_IRQ3_N

B2

NC_PXH_PCI_B_IRQ4_N

E4

NC_PXH_PCI_B_IRQ5_N

D2

NC_PXH_PCI_B_IRQ6_N

E1

NC_PXH_PCI_B_IRQ7_N

G3

NC_PXH_PCI_B_IRQ8_N

D3

NC_PXH_PCI_B_IRQ9_N

B1

NC_PXH_PCI_B_IRQ10_N

C3

PXH_PCI_B_IRQ11_N

D1

PXH_PCI_B_IRQ12_N

G4

NC_PXH_PCI_B_IRQ13_N

E3

NC_PXH_PCI_B_IRQ14_N

F4

NC_PXH_PCI_B_IRQ15_N

P2

PXH_PCI_B_133EN

C17

CK_100M_PXH_PLANAR_N

C16

CK_100M_PXH_PLANAR_P

E11 F11 D10 D9 A10 A9 B12 B11 G13 H13 B15 B14 D16 D15 F14 F13

E16 B17

C7

ICH_SEG0_PXH_SCL

D8

ICH_SEG0_PXH_SDA

EXP0_COMP1

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

PXH_PCI_B_PME_N

PXH_PCI_B_M66EN PXH_PCI_B_PCIXCAP

PXH_PCI_B_PCLKO0_R NC_PXH_PCI_B_PCLKO1 NC_PXH_PCI_B_PCLKO2 NC_PXH_PCI_B_PCLKO3 NC_PXH_PCI_B_PCLKO4 NC_PXH_PCI_B_PCLKO5 PXH_PCI_B_PCLKO6_FB

PXH_PCI_B_PCLKI_FB PXH_PCI_B_PCIRST_N

EXP_B_UP_4N_C EXP_B_UP_4P_C EXP_B_UP_5N_C EXP_B_UP_5P_C EXP_B_UP_6N_C EXP_B_UP_6P_C EXP_B_UP_7N_C

EXP_B_UP_7P_C NC_EXP_PXH_UP_4N NC_EXP_PXH_UP_4P NC_EXP_PXH_UP_5N NC_EXP_PXH_UP_5P NC_EXP_PXH_UP_6N NC_EXP_PXH_UP_6P NC_EXP_PXH_UP_7N NC_EXP_PXH_UP_7P

EXP0_COMP1

+1.5V

R230

21

27 27

49.9-1%

25,30 25,30 25,30 25,30 25,30 25,30 25,30 30 25 30 30 30

27,28

25,27 27

27

25

27 27

27

4 4

29 29 29 29 29 29 29 29

27

X03_GT_011604

21

R6015

49.9-1%

X03_GT_011604

+3.3V

R1700

1 2

14.7K-1% PXH_PCI_A_PME_N

X03_GT_011604

27,28

+3.3V

R1701

1 2

14.7K-1% PXH_PCI_B_PME_N

27,28

+3.3V

NP

21

R30

R31

1 2

8.2K-5%

R4507

1 2

R4508

1 2

8.2K-5%

R503

0-5% R502

0-5%

8.2K-5%

17,31,35

X02_GT_081903

27

27 27 27

Intel: These pins are muxed and used for HP functions.

Pull-ups required.

ICH_SEG0_SCL

ICH_SEG0_SDA

PXH_PCI_A_IRQ11_N PXH_PCI_A_IRQ12_N PXH_PCI_B_IRQ11_N PXH_PCI_B_IRQ12_N

PXH_PCI_A_PCLKO0_R

27

PXH_PCI_A_PCLKI_FB

27

X00_GT_052803

PXH_PCI_B_PCLKO0_R

27

PXH_PCI_B_PCLKO6_FB

27

PXH_PCI_A_M66EN

24,27

PXH_PCI_B_M66EN

25,27

PXH_PCI_B_133EN

27

PXH_PCI_A_133EN

27

R4510

R55

1 2

+3.3V

21

8.2K-5%

1 2

33-5%

4.7K

+3.3V

R4509

1 2

R130

R138

R56

8.2K-5%

21

X03_GT_010704

4.7K

1 2

ICH_SEG0_PXH_SCL

ICH_SEG0_PXH_SDA

PXH_PCI_A_PCLKO0

R131

PXH_PCI_A_PCLKO6_FB

21

33-5%

PXH_PCI_B_PCLKO0

R137

PXH_PCI_B_PCLKI_FB

1 2

33-5%

PXH_PCI_A_PCIXCAP

27

X00_GT_052803

R53

1 2

27

PXH_PCI_B_PCIXCAP

27

0-5%

X03_GT_010704

24

27

25

27

21

R188

R189

1 2

8.2K-5%

Px133EN PULLUP 8.2K, OR PULLDOWN 8.2K PxPCIXCAP PULLUP 3.3K

PxM66EN PULLUP 4.7K WHEN CONENCTED, OR TP

M66EN High indicates that a PCI card can operate in PCI 66 MHz mode 133EN High indicates that a PCI card can operate in PCI 133 MHz mode

COMPUTER CORPORATION AUSTIN,TEXAS

PXH

TITLE

LINDY PLANAR

DWG NO.

DATE

D1660

1/13/2004

SHEET

DC

R54

0-5%

1 2

X03_GT_010704

REV.

X03

27 OF 61

1

2

3

B D

CA

CHANGES MADE FOR PLANAR PXH

VERSION -0.8

+3.3V

R18

X00_GT_081903

R1897

1 2

1K-5%

R19

1 2

1K-5%

1

1K-5%

R1898

1 2

1K-5%

R20

1 2

1K-5%

R128

1 2

1K-5%

R155

1 2

1K-5%

R158

1 2

1K-5%

R174

1 2

2

+3.3V

1K-5%

R162

1 2

1K-5%

R164

1 2

1K-5%

R224

1 2

1K-5%

+3.3V

R232

1 2

1K-5%

R607

1 2

1K-5%

R608

1 2

1K-5%

R627

1 2

1K-5%

3

+3.3V

R1915

1K-5%1K-5%

1 2

NP*

R1916

1 2

4 4

subsys done

ROOM = PXH

PXH_HBSIC_STRAP

PXH_HASIC_STRAP

PXH_HBSID_STRAP

PXH_HASID_STRAP

X03_GT_010803

PXH_PCI_A_HATNLED_1_N

PCI EXPRESS 1.0/1.0a STRAPPING

Strapped for PCIeX 1.0a

28

HxMODE2 HIGH MEANS SLOT MODE 2 CAPABLE

PXH_HBMODE2

28

PXH_HAMODE2

28

PXH_HBSLOTS

28

PXH_SMBUS5

PXH_SMBUS3

PXH_SMBUS1

PXH_SMBUS2

PXH_TMS

PXH_TDI

PXH_TCK

PXH_TRST_N

X02_GT_091503

28

27

PXH_HASLOTS

PXH_STRAP_U11

PXH_STRAP_C19

PXH_STRAP_A19 PXH_STRAP_C18

M66EN High indicates that a PCI card can operate in PCI 66 MHz mode PCIXCAP1 Indicates if PCIXCAP was Grounded or not Grounded (PCI-X capable) PCIXCAP2 Indicates if PCI-X is low (66 MHz) or high (133 MHz) capable

PCIXCAP1

1 1 133 MHz PCI-X Mode 0 1 66 MHz PCI-X Mode 1 0 Reserved 0 0 PCI Mode

PRSNT1# 1 1 No Card Present 0 1 up to 25W Card Present 1 0 up to 15W Card Present 0 0 up to 7.5W Card Present

Hx_SLOT3 Low disables Hot Plug, High enables Hot Plug Strapped for No Hot Plug on PCI-X A and B Strapped for 2 slots on PCI-X A Strapped for 1 slot on PCI-X B

PXH-Hxslot<3:0> tells the HP Controller how many slots are Hot Plug

HxSlot<3:0> Hot Plug Disabled 0000 1 slot 0001 2 slots 0010 3 slots 0011 4 slots 0100 5 slots 0101 6 slots 0110 7 slots 0111 8 slots Hot Plug Enabled 1000 Reserved 1001 1 slot (Parallel Mode) 1010 2 slots (Parallel Mode) 1011 3 slots (Serial Mode) 1100 4 slots (Serial Mode) 1101 5 slots (Serial Mode) 1110 6 slots (Serial Mode)

28

1111 1 slot no glue (Parallel Mode)

+3.3V

D75

2 1

+1.5V

MBRS130LT3

X03_GT_010703

A B

1-21-2004_9:57

PxSTRAP0 C19, U11 PxODTEN is PxSTRAP

I SUSPECT THAT YOU PULL THESE DOWN FOR NO HOT PLUG

I SUSPECT THAT YOU PULL THESE DOWN FOR HOT PLUG

I AM WAITING FOR MORE INFO FROM INTEL ON THESE

MEANINGPCIXCAP2

PRSNT2# MEANING

X00_GT_051503

+3.3V +3.3V

NP

R609

1K-5%1K-5%

1 2

PXH_A_ODT

R612

1 2

On-die termination enabled for both channels

28

-Change REF DES to PXH

-Change SYS_PWRGD_3P3V to SYS_PWRGOOD_PXH

-Change TP's to NC's

+3.3V_AUX

24,28 25,28

PCI_A_PME_N PCI_B_PME_N

X03_GT_011604

28

R617

1 2

14.7K-1%

PME_NIC_CPLD_N

1 3

BAR43

D50

D51

PXH_HASIC_STRAP

28

NC_PXH_HASIL_N PXH_HASID_STRAP

28

PXH_HAMODE2

28

NC_PXH_HASOL NC_PXH_HASOLR NC_PXH_HASOD NC_PXH_HAPRST1_N

NC_PXH_HAPRST2_N PXH_PCI_A_HATNLED_1_N NC_PXH_PCI_A_HPWREN_1

X02_GT_091503

PXH_HASLOTS

28

NC_PXH_C6

NC_PXH_B6

+1.5V

PXH_VCCA_EXP_G15

28

PXH_VCCA_PCI0

28

PXH_VCCA_PCI1

28

PXH_VCCA_PCI2

28

PXH_VCCBG_EXP

28

+1.5V

PXH_A_ODT

28

PXH_B_ODT

28

NC_PXH_PCI_A_VIOSEL NC_PXH_PCI_B_VIOSEL NC_RSVD_PXH_D19 NC_RSVD_PXH_D18 NC_PXH_STRAP_C19 NC_RSVD_PXH_B19 NC_PXH_STRAP_U11

PXH_PCI_VREF

28

x00_tj_060903

NP

R611

1 2

PXH_B_ODT

R613

1K-5% 1K-5%

1 2

R161

1 2

100-1%

28

SYSTEM_PWRGOOD_PXH

5

1 2

100pF

C584

50V-10%

X03_GT_011604

5

PCI_A_PME_N

24,28

SYSTEM_PWRGOOD_FETS_6V

32,41

x03b_sd

PXH_PCI_A_PME_N

27

A21

HPA_SIC

E19

HPA_SIL

F19

HPA_SID

B22

HPA_SOC

A22

HPA_SOL

G19

HPA_SOLR

G18

HPA_SOD

E18

HPA_PRST

F18

HPA_RST2

T24 T4

HAATNLED_1 HBATNLED_1

K21 R6

HAPWREN_1 HBPWREN_1

C21

HPA_SLOT0

B21

HPA_SLOT1

D21

HPA_SLOT2

F20

HPA_SLOT3

TDIODEIN ANODE

C6

RSVD/TDIOANODE

B6

RSVD/TDIOCATH

TDIODEOUT CATHODE

K11

VCC_K11

K13

VCC_K13

K15

VCC_K15

L10

VCC_L10

L12

VCC_L12

L14

VCC_L14

M11

VCC_M11

M13

VCC_M13

M15

VCC_M15

N10

VCC_N10

N12

VCC_N12

N14

VCC_N14

P11

VCC_P11

P13

VCC_P13

P15

VCC_P15

R10

VCC_R10

R12

VCC_R12

R14

VCC_R14

G15

VCCAEXP_G15

R17

VCCAPCI0

R8

VCCAPCI1

J8

VCCAPCI2

C14

VCCBGEXP_C14

A14

VCCEXP_A14

C12

VCCEXP_C12

C15

VCCEXP_C15

F12

VCCEXP_F12

H11

VCCEXP_H11

H15

VCCEXP_H15

J10

VCCEXP_J10

J12

VCCEXP_J12

J14

VCCEXP_J14

C18

PASTRAP0

A19

PBSTRAP0

M20

RSVD_M20

M8

RSVD_M8

D19

RSVD_D19

D18

RSVD_D18

C19

RSVD_C19

B19

RSVD_B19

U11

RSVD_U11

V12

VREF_PCI

V11

RCOMP

F17

PWROK

PXH

HPB_SIC HPB_SIL HPB_SID HPB_SOC HPB_SOL

HPB_SOLR

HPB_SOD HPB_PRST HPB_RST2

HPB_SLOT0 HPB_SLOT1 HPB_SLOT2 HPB_SLOT3

SMBUS_1

SMBUS_2

SMBUS_3

SMBUS_5

VCC15_J16

VCC15_K9 VCC15_L3

VCC15_L16

VCC15_M9

VCC15_M22 VCC15_N16

VCC15_P9

VCC15_R16

VCC15_T9

VCC15_T11 VCC15_T13 VCC15_T15 VCC15_V16

VCC15_Y6

VCC15_AB20

VCC15_AC3

VCC33_A2 VCC33_A7

VCC33_B18 VCC33_C22

VCC33_D5

VCC33_E24

VCC33_F1 VCC33_H3

VCC33_H18 VCC33_H21 VCC33_H24

VCC33_L6

VCC33_M19

VCC33_R7 VCC33_T5

VCC33_T17 VCC33_T20 VCC33_T23

VCC33_U9 VCC33_V4 VCC33_W2

VCC33_W11

VCC33_Y9

VCC33_Y15 VCC33_Y21 VCC33_Y24 VCC33_AA1 VCC33_AB8

VCC33_AB14

VCC33_AC6

PXh MCH INTERFACE

VCC33_AD19

HETERO 3 OF 4

REV 1.0

for RCOMP see pf400 pg 59 for VREF_PCI see pf400 pg 60

for PASTRAP see pf400 pg 60

for SMBUS see pf400 pg 59

+3.3V_AUX

R614

1 2

3

2

14.7K-1%

D

Q85

1

S

2N7002

1 2

G

R195

470

x03b_sd

R196

470

Q103

2N7002

21

1

G

R616

1 2

D

S

14.7K-1%

3

2

X03_GT_011604

PCI_B_PME_N

PXH_PCI_B_PME_N

25,28

27

NEED TO GET PARTS FOR THESE RESISTORS

for VCC filters see pf400 pg 59, 63

E6

PXH_HBSIC_STRAP

F6

NC_PXH_HBSIL_N

B5

PXH_HBSID_STRAP

B3

PXH_HBMODE2

C4

NC_PXH_HBSOL

A5

NC_PXH_HBSOLR

D6

NC_PXH_HBSOD

F8

NC_PXH_HBPRST1_N

F7

NC_PXH_HBPRST2_N NC_PXH_PCI_B_HATNLED_1_N NC_PXH_PCI_B_HPWREN_1

A3 B4 D4 F5

G16

B20 A18 D20

J16 K9 L3 L16 M9 M22 N16 P9 R16 T9 T11 T13 T15 V16 Y6 AB20 AC3

A2 A7 B18 C22 D5 E24 F1 H3 H18 H21 H24 L6 M19 R7 T5 T17 T20 T23 U9 V4 W2 W11 Y9 Y15 Y21 Y24 AA1 AB8 AB14 AC6 AD19

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

X02_GT_091503

PXH_HBSLOTS

PXH_SMBUS1

PXH_SMBUS2

PXH_SMBUS3

PXH_SMBUS5

+1.5V

+3.3V

28

28 28

what is the current draw on these inductors?

+1.5V

R44

28

28 28 28 28

1 2

.499-1%

+1.5V

X00_TJ_060903

R40

1 2

1-1%

+1.5V

X00_TJ_060903

R41

21

1-1%

+1.5V

X00_TJ_060903

R42

1 2

1-1%

X00_GT_052203

x00_tj_061403

x02_tj_100703

+3.3V

301-1%

R1755

21

+2.5VREF

1

D52 8

236

7

TL431ACD

SUB*_1X621

1 2

X00_GT_051503 X00_TJ_060403

SUB*_D2938

X00_GT_051503 X00_TJ_060403

SUB*_D2938

X00_GT_051503 X00_TJ_060403

X00_GT_051503

X00_TJ_060403

R43

21

NET_PHYSICAL_TYPE=50MIL

1-1%

PROPAGATION_DELAY=L:S::600

X00_GT_052703

4.7uH 30mA

SUB*_D2938

4.7uH 30mA

1 2

4.7uH 30mA

SUB*_D2938

NET_PHYSICAL_TYPE=50MIL PROPAGATION_DELAY=L:S::600

300 Ohm 5% (needs 1mA to operate)

1 2

C1655

10uF 6.3V

PXH

L19

L23

L22

L21

+1.5V

21

C24

0.1uF 16V

1 2

C52321C512

10uF 6.3V

21

C522

10uF 6.3V

1 2

C515

10uF 6.3V

21

C514

X00_GT_051503

L20

1 2

4.7uH 30mA

SUB*_D2938

X00_TJ_060403

TITLE

DWG NO.

DATE

R366

150-1%150-1%

1 2

R369

1 2

10uF 6.3V

21

C29

0.1uF 16V

C28

1 2

0.1uF 16V

21

C27

10uF 6.3V

1/13/2004

DC

PXH_PCI_VREF

0.750 V

X03_GT_011604

PXH_VCCA_EXP_G15

NET_PHYSICAL_TYPE=50MIL

PROPAGATION_DELAY=L:S::1000

C25

1 2

0.1uF 16V

PXH_VSSA_EXP_F16

NET_PHYSICAL_TYPE=50MIL PROPAGATION_DELAY=L:S::1000

PXH_VCCA_PCI0

NET_PHYSICAL_TYPE=50MIL PROPAGATION_DELAY=L:S::600

PXH_VCCA_PCI1 NET_PHYSICAL_TYPE=50MIL PROPAGATION_DELAY=L:S::600

PXH_VCCA_PCI2

NET_PHYSICAL_TYPE=50MIL PROPAGATION_DELAY=L:S::600

0.1uF 16V

C26

1 2

C513

10uF 6.3V

LINDY PLANAR

D1660

28

PXH_VCCBG_EXP

NET_PHYSICAL_TYPE=50MIL PROPAGATION_DELAY=L:S::600

0.1uF 16V

COMPUTER CORPORATION AUSTIN,TEXAS

SHEET

28 OF 61

28

29

REV.

28

X03

1

2

3

B D

CA

CHANGES MADE FOR PLANAR PXH

VERSION -0.8

1-21-2004_9:57

1

ROOM = PXH

-Change REF DES to PXH

-Change clock name to match planar

-Change TP's to NC's

-Change Express signal names to match planar

-Swap upper & lower segment of Express bus

-Delete I2C headers

1

for PXH_VSSBGEXP_A13 see pf400 pg 59

PCI EXPRESS 4X

2

caps only on upstream, immediately next to source. 0.5 inch max seperation

C36

EXP_B_UP_4P_C

27

EXP_B_UP_5P_C

27

EXP_B_UP_6P_C

27

EXP_B_UP_7P_C

27

3

EXP_B_UP_4N_C

27

EXP_B_UP_5N_C

27

EXP_B_UP_6N_C

27

EXP_B_UP_7N_C

27

.1uF

10V-10%

C42

21

.1uF

10V-10%

21

C32

.1uF

10V-10%

C43

.1uF

10V-10%

21

C31

.1uF

10V-10%

C44

.1uF

10V-10%

21

10V-10%

21

10V-10%

C30

.1uF

C48

.1uF

21

EXP_B_UP_4P

EXP_B_UP_5P

EXP_B_UP_6P

EXP_B_UP_7P

EXP_B_UP_4N

EXP_B_UP_5N

EXP_B_UP_6N

EXP_B_UP_7N

17

for PXH_VSSA_EXP_F16 see pf400 pg 59, 63

A4

VSS_A4

A8

VSS_A8

A17

VSS_A17

A20

VSS_A20

A24

VSS_A24

B8

VSS_B8

B10

VSS_B10

B13

VSS_B13

B16

VSS_B16

C2

VSS_C2

C5

VSS_C5

C8

VSS_C8

C20

VSS_C20

C23

VSS_C23

D11

VSS_D11

D14

VSS_D14

D17

VSS_D17

E2

VSS_E2

E5

VSS_E5

E8

VSS_E8

E10

VSS_E10

E13

VSS_E13

E20

VSS_E20

E23

VSS_E23

F15

VSS_F15

G2

VSS_G2

G5

VSS_G5

G8

VSS_G8

G11

VSS_G11

G14

VSS_G14

G17

VSS_G17

G20

VSS_G20

G23

VSS_G23

H6

VSS_H6

H10

VSS_H10

H14

VSS_H14

J1

VSS_J1

J4

VSS_J4

J9

VSS_J9

J11

VSS_J11

J13

VSS_J13

J15

VSS_J15

J19

VSS_J19

J22

VSS_J22

K2

VSS_K2

K5

VSS_K5

K8

VSS_K8

K10

VSS_K10

K12

VSS_K12

K14

VSS_K14

K16

VSS_K16

K20

VSS_K20

K23

VSS_K23

L9

VSS_L9

L11

VSS_L11

L13

VSS_L13

L15

VSS_L15

L18

VSS_L18

L21

VSS_L21

L24

VSS_L24

M4

VSS_M4

M7

VSS_M7

M10

VSS_M10

M12

VSS_M12

M14

VSS_M14

M16

VSS_M16

N2

VSS_N2

N5

VSS_N5

N9

VSS_N9

N11

VSS_N11

N13

VSS_N13

N15

VSS_N15

PXH MCH INTERFACE

HETERO 4 OF 4

PXH

REV 1.0

VSSAEXPVSSBGEXP

VSS_N20 VSS_N23

VSS_P3

VSS_P6 VSS_P10 VSS_P12 VSS_P14 VSS_P16 VSS_P18 VSS_P21 VSS_P24

VSS_R1

VSS_R4

VSS_R9 VSS_R11 VSS_R13 VSS_R15 VSS_R19 VSS_R22

VSS_T2

VSS_T8 VSS_T10 VSS_T12 VSS_T14 VSS_T16

VSS_U3

VSS_U6 VSS_U12 VSS_U15 VSS_U18 VSS_U21 VSS_U24

VSS_V1

VSS_V7 VSS_V10 VSS_V13 VSS_V19 VSS_V22

VSS_W5

VSS_W8 VSS_W14 VSS_W17 VSS_W20 VSS_W23

VSS_Y3 VSS_Y12 VSS_Y18 VSS_AA4 VSS_AA7

VSS_AA10 VSS_AA13 VSS_AA16 VSS_AA19 VSS_AA22

VSS_AB2 VSS_AB5

VSS_AB11 VSS_AB17 VSS_AB23

VSS_AC9

VSS_AC12 VSS_AC15 VSS_AC18 VSS_AC21

VSS_AD1 VSS_AD4 VSS_AD7

VSS_AD10 VSS_AD16 VSS_AD22 VSS_AD24

F16A13

N20 N23 P3 P6 P10 P12 P14 P16 P18 P21 P24 R1 R4 R9 R11 R13 R15 R19 R22 T2 T8 T10 T12 T14 T16 U3 U6 U12 U15 U18 U21 U24 V1 V7 V10 V13 V19 V22 W5 W8 W14 W17 W20 W23 Y3 Y12 Y18 AA4 AA7 AA10 AA13 AA16 AA19 AA22 AB2 AB5 AB11 AB17 AB23 AC9 AC12 AC15 AC18 AC21 AD1 AD4 AD7 AD10 AD16 AD22 AD24

PXH_VSSA_EXP_F16

28

2

3

X00_GT_052803

4 4

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

X03

subsys done

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

PXH

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 29 OF 61

DC

ROOM = PXH

B D

CA

VERSION -0.8

PXH DECOUPLING

1-21-2004_9:57

1

+1.5V

21

C140

+1.5V

21

C119

2

+3.3V

1 2

C84

3

+1.5V

21

C81

1 2

C141

0.1uF 16V

C120

0.1uF 16V

C83

0.1uF 16V

+1.5V

C52

C82

0.1uF 16V

21

C139

0.1uF 16V

1 2

0.1uF 16V

21

0.1uF 16V

21

0.1uF 16V

1 2

0.1uF 16V

1 2

C12321C122

0.1uF 16V

21

C109

C108

0.1uF 16V

C98

1 2

C99

0.1uF 16V

+3.3V

21

C50

C49

0.1uF 16V

1 2

C5821C57

0.1uF 16V0.1uF 16V

21

C60

C59

0.1uF 16V

1 2

0.1uF 16V

21

0.1uF 16V

1 2

0.1uF 16V

1 2

0.1uF 16V

1 2

C121

0.1uF 16V

21

C110

0.1uF 16V

1 2

C9721C96

0.1uF 16V

21

C51

0.1uF 16V

1 2

C56

0.1uF 16V

21

C62

0.1uF 16V

1 2

C181

C180

1uF 6.3V

1 2

C111

0.1uF 16V

21

C17521C526

1uF 6.3V

21

C55

0.1uF 16V

1 2

C63

0.1uF 16V

21

C53521C534

1uF 6.3V

21

C118

C117

0.1uF 16V

1 2

C9521C85

0.1uF 16V

10uF 6.3V

1 2

C5421C53

0.1uF 16V

21

C80

C174

0.1uF 16V

1 2

10uF 6.3V

1 2

21

C183

0.1uF 16V

21

C529

0.1uF 16V

1 2

C185

0.1uF 16V

1 2

C528

1uF 6.3V

10uF 6.3V

C182

1uF 6.3V

C554

C524

1uF 6.3V

C527

10uF 6.3V 10uF 6.3V

BACKSIDE DECOUPLING

21

1 2

1uF 6.3V

1 2

10uF 6.3V

C179

21

C178

1uF 6.3V

1 2

C177

1uF 6.3V

21

C184

1uF 6.3V

1 2

C176

1uF 6.3V

21

C533

1uF 6.3V

10uF 6.3V

TOPSIDE DECOUPLING

21

C525

10uF 6.3V

21

10uF 6.3V

21

C532

C530

10uF 6.3V

1 2

10uF 6.3V

PXH Channel A PCI pullups

PU_NC_PXH_PCI_A_AD63

27

PU_NC_PXH_PCI_A_AD60

27

PU_NC_PXH_PCI_A_AD42

27

PU_NC_PXH_PCI_A_AD43

27

PU_NC_PXH_PCI_A_AD46

27

PU_NC_PXH_PCI_A_AD62

27

PU_NC_PXH_PCI_A_AD45

27

PU_NC_PXH_PCI_A_AD44

27

PU_NC_PXH_PCI_A_AD58

27

PU_NC_PXH_PCI_A_AD40

27

PU_NC_PXH_PCI_A_AD41

27

PU_NC_PXH_PCI_A_AD61

27

PU_NC_PXH_PCI_A_AD59

27

PU_NC_PXH_PCI_A_AD56

27

PU_NC_PXH_PCI_A_AD57

27

PU_NC_PXH_PCI_A_AD55

27

PU_NC_PXH_PCI_A_AD54

27

PU_NC_PXH_PCI_A_AD38

27

PU_NC_PXH_PCI_A_AD39

27

PU_NC_PXH_PCI_A_AD36

27

PU_NC_PXH_PCI_A_AD52

27

PU_NC_PXH_PCI_A_AD34

27

PU_NC_PXH_PCI_A_AD35

27

PU_NC_PXH_PCI_A_AD50

27

PU_NC_PXH_PCI_A_AD32

27

PU_NC_PXH_PCI_A_AD33

27

PU_NC_PXH_PCI_A_AD51

27

PU_NC_PXH_PCI_A_AD53

27

PU_NC_PXH_PCI_A_PAR64

27

PU_NC_PXH_PCI_A_AD49

27

PU_NC_PXH_PCI_A_AD48

27

PU_NC_PXH_PCI_A_AD47

27

PU_NC_PXH_PCI_A_CBE7_N

27

PU_NC_PXH_PCI_A_CBE5_N

27

PU_NC_PXH_PCI_A_CBE4_N

27

PU_NC_PXH_PCI_A_CBE6_N

27

PXH_PCI_A_FRAME_N

24,27

PXH_PCI_A_IRDY_N

24,27

PXH_PCI_A_TRDY_N

24,27

PXH_PCI_A_DEVSEL_N

24,27

PXH_PCI_A_STOP_N

24,27

PXH_PCI_A_PERR_N

24,27

PU_NC_PXH_PCI_A_ACK64_N

27

PU_NC_PXH_PCI_A_REQ64_N

27

PU_NC_PXH_PCI_A_AD37

27

PU_NC_PXH_PCI_A_PLOCK_N

27

NC_RN112.3 NC_RN112.4

PXH_PCI_A_SERR_N

24,27

X02_GT_091703

+3.3V

R184

1 2

8.2K-5%

X03_GT_010704

+3.3V

1

8

RN101

2

7

3

6

4

5

8.2K

1

8

RN102

2

7

3

6

4

5

8.2K

1

8

RN103

2

7

3

6

4

5

8.2K

1

8

RN104

2

7

3

6

4

5

8.2K

1

8

RN105

2

7

3

6

4

5

8.2K

1

8

RN106

2

7

3

6

4

5

8.2K

1

8

RN107

2

7

3

6

4

5

8.2K

1

8

RN108

2

7

3

6

4

5

8.2K

1

8

RN109

2

7

3

6

4

5

8.2K

1

8

RN110

2

7

3

6

4

5

8.2K

1

8

RN111

2

7

3

6

4

5

8.2K

1

8

RN112

2

7

3

6

4

5

8.2K

PXH_PCI_B_SERR_N

25,27

+3.3V

R185

1 2

X03_GT_010704

8.2K-5%

PXH Channel B PCI pullups

PU_NC_PXH_PCI_B_AD54

27

PU_NC_PXH_PCI_B_AD57

27

PU_NC_PXH_PCI_B_AD56

27

PU_NC_PXH_PCI_B_AD40

27

PU_NC_PXH_PCI_B_AD59

27

PU_NC_PXH_PCI_B_AD39

27

PU_NC_PXH_PCI_B_AD58

27

PU_NC_PXH_PCI_B_AD44

27

PU_NC_PXH_PCI_B_AD45

27

PU_NC_PXH_PCI_B_AD47

27

PU_NC_PXH_PCI_B_AD49

27

PU_NC_PXH_PCI_B_AD48

27

PU_NC_PXH_PCI_B_AD62

27

PU_NC_PXH_PCI_B_AD60

27

PU_NC_PXH_PCI_B_AD61

27

PU_NC_PXH_PCI_B_AD63

27

PU_NC_PXH_PCI_B_AD41

27

PU_NC_PXH_PCI_B_AD42

27

PU_NC_PXH_PCI_B_AD43

27

PU_NC_PXH_PCI_B_AD46

27

PU_NC_PXH_PCI_B_AD37

27

PU_NC_PXH_PCI_B_AD52

27

PU_NC_PXH_PCI_B_AD53

27

PU_NC_PXH_PCI_B_AD55

27

PU_NC_PXH_PCI_B_AD36

27

PU_NC_PXH_PCI_B_AD35

27

PU_NC_PXH_PCI_B_AD34

27

PU_NC_PXH_PCI_B_AD38

27

PU_NC_PXH_PCI_B_AD51

27

PU_NC_PXH_PCI_B_AD50

27

PU_NC_PXH_PCI_B_AD33

27

PU_NC_PXH_PCI_B_AD32

27

PU_NC_PXH_PCI_B_CBE6_N

27

PU_NC_PXH_PCI_B_CBE5_N

27

PU_NC_PXH_PCI_B_CBE7_N

27

PU_NC_PXH_PCI_B_CBE4_N

27

PU_NC_PXH_PCI_B_ACK64_N

27

PU_NC_PXH_PCI_B_REQ64_N

27

PU_NC_PXH_PCI_B_PAR64

27

PU_NC_PXH_PCI_B_PLOCK_N

27

PXH_PCI_B_TRDY_N

25,27

PXH_PCI_B_IRDY_N

25,27

PXH_PCI_B_FRAME_N

25,27

PXH_PCI_B_STOP_N

25,27

NC_RN130.1 PXH_PCI_B_DEVSEL_N

25,27

PXH_PCI_B_PERR_N

25,27

NC_RN130.4

X02_GT_091703

1 2 3 4

1

RN120

2 3 4

1 2 3 4

RN113

8.2K

RN114

8.2K

RN115

8.2K

RN116

8.2K

RN117

8.2K

RN118

8.2K

RN119

8.2K

RN121

8.2K

RN122

8.2K

RN126

8.2K

RN130

8.2K

+3.3V

8 7 6 5

4 4

1

2

3

subsys done

A B

PXH DECOUPLING

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

30 OF 611/13/2004

X03

B D

CA

1-21-2004_9:57

ROOM=PS

POWER SUPPLY

All _R nets have a PROP_DELAY rule for under 1"

+12V

PSU1_CONN

1

x00_sd_051903

P3V3AUX_PS

31,54

PS1_ENABLE_N

5,31,59

I2C_SEG4_VAUX_SDA

31,44,59

PS_FAN_DAC2

31,44

PS_FAN_DAC1

44

31

2

31 31

Pop options: 1U has individual zones per supply 2U/5U: both supplies in same zone

NP*

PS1_I2C_A0

PS_12V_ISHARE PS1_KILL

3

x00_sd_051903

P3V3AUX_PS

31,54

PS2_ENABLE_N

5,31,59

I2C_SEG4_VAUX_SDA

31,44,59

PS_FAN_DAC2

31,44

PS2_I2C_A0

31

PS_12V_ISHARE

31

PS2_KILL

31

R529

1 2 100-5%

R731

1 2 100-5%

R732

100-5%

R528

100-5%

21

R39

1 2

R730

1 2

100-5%

P41

P6_1

P42

P6_2

P43

P6_3

P44

P6_4

P33

P5_1

P34

P5_2

P35

P5_3

P36

P5_4

P25

P4_1

P26

P4_2

P27

P4_3

P28

31

P4_4

P17

31

P3_1

P18

P3_2

P19

P3_3

P20

P3_4

P9

P2_1

P10

P2_2

P11

P2_3

P12

P2_4

P1

P1_1

P2

P1_2

P3

P1_3

P4

R33

15

P1_4

B5

21

B5

B4

B3

B2

B1

A6

A5

A4

A3

A2

A1

24 SIGNAL/6 POWER

RIGHT RECEPTACLE W/GUIDE PIN

+12V +12V

PSU2_CONN

P41

31 31

P6_1

P42

P6_2

P43

P6_3

P44

P6_4

P33

P5_1

P34

P5_2

P35

P5_3

P36

P5_4

P25

P4_1

P26

P4_2

P27

P4_3

P28

P4_4

P17

P3_1

P18

P3_2

P19

P3_3

P20

P3_4

P9

P2_1

P10

P2_2

P11

P2_3

P12

P2_4

P1

P1_1

P2

P1_2

P3

P1_3

P4

P1_4

B5

B4

B3

B2

B1

A6

A5

A4

A3

A2

A1

24 SIGNAL/6 POWER

RIGHT RECEPTACLE W/GUIDE PIN

+3.3V_AUX

8.2K-5%

1 2

100-5%

R563

R1385

220

1 2

R1386

8.2K-5%

1 2

4 4

PS1_ALERT_N_R

31

PS1_ENABLE_N

5,31,59

PS1_PRES_N

31,46

PS1_PWRGOOD_R

31

PS1_I2C_A0

31

PS1_KILL

31

21

+12V

P45

P6_5

P46

P6_6

P47

31

P6_7

P48

P6_8

P37

P5_5

P38

P5_6

P39

P5_7

P40

P5_8

P29

P4_5

P30

P4_6

P31

P4_7

P32

P4_8

P21

P3_5

P22

P3_6

P23

P3_7

P24

P3_8

P13

P2_5

P14

P2_6

P15

P2_7

P16

P2_8

P5

P1_5

P6

P1_6

P7

P1_7

P8

31

P1_8

D6B6

D5

D4

D3

D2

D1

C6

C5

C4

C3

C2

C1

P45

P6_5

P46

P6_6

P47

P6_7

P48

P6_8

P37

P5_5

P38

P5_6

P39

P5_7

P40

P5_8

P29

P4_5

P30

P4_6

P31

P4_7

P32

P4_8

P21

P3_5

P22

P3_6

P23

P3_7

P24

P3_8

P13

P2_5

P14

P2_6

P15

P2_7

P16

P2_8

P5

P1_5

P6

P1_6

P7

P1_7

P8

P1_8

D6B6

D5

D4

D3

3131

D3

D2

D1

C6

C5

C4

C3

C2

C1

8.2K-5%

1 2

R1409

R1410

21

5,31,59

31,46

R1408

For PSx_PWRGOOD, PS has internal 1k p/u

P3V3AUX_PS

31

PS1_PWRGOOD_R PS1_ALERT_N_R

31

PS1_PRES_N

PS1_AC_GOOD_R

P3V3AUX_PS

31

PS2_PWRGOOD_R PS2_ALERT_N_R

31

PS2_PRES_N

PS2_AC_GOOD_R

R37

PS2_ALERT_N_R

31

PS2_ENABLE_N PS2_PRES_N PS2_PWRGOOD_R

31

PS2_I2C_A0

31

PS2_KILL

31

1 2

C63021C634

x00_sd_051903

1 2

21

C631

x00_sd_051903

PS2B_TACH

15

PS2A_TACH

1uF 6.3V

10uF 6.3V

31,54

NC_RN4_3

PS1B_TACH

42

31,46

R34

I2C_SEG4_VAUX_SCL

15

PS1A_TACH

42

1 2

C635

1uF 6.3V

10uF 6.3V

31,54

NC_RN3_3

42

31,46

21

I2C_SEG4_VAUX_SCL

42

8.2K-5%

100-5%

P3V3AUX_PS

1 2 3 4

P3V3AUX_PS

1

RN3

2 3 4

1K

R530

220

21

1 2

R1387

RN4

1K

1 2

R1388

8 7 6 5

31,44,59

+3.3V_AUX

8.2K-5%

21

31,54

31,44,59

31,54

8.2K-5%

R1413

PS1_PWRGOOD PS1_ALERT_N

NC_RN4_6

PS1_AC_GOOD

4.7K

PS2_PWRGOOD PS2_ALERT_N

NC_RN3_6

PS2_AC_GOOD

1 2

4.7K

8.2K-5%

1 2

R1411

21

R4401

R1412

This is other part of RISER_PRES_N

x00_sd_051803

5,59 46

46

R4400

5,59 46

46

17,27,35 17,27,35

+12V

+5.0V Riser

3P3V_RISER_SENSE

6

5,32,40,46

4 4 4 4 4 4

17 17 17 17 17 17

35,41 35,41

5,59

41 17

5,41

5,31,41

5 5 5

5,59

41 45

5,31 44,59 44,59

+3.3V_AUX

CPLD_TCK CPLD_TD3

32

CPLD_TD2

5,46

CPLD_TMS

CK_100M_DOBSON_P CK_100M_DOBSON_N CK_100M_EXP_SPARE_P CK_100M_EXP_SPARE_N CK_100M_PXH_P CK_100M_PXH_N

EXP_A_UP_7N EXP_A_UP_7P EXP_A_UP_3N EXP_A_UP_3P EXP_A_UP_6N EXP_A_UP_6P

EXP_A_UP_2N EXP_A_UP_2P EXP_A_UP_5P EXP_A_UP_5N EXP_A_UP_1N EXP_A_UP_1P

EXP_A_UP_4P EXP_A_UP_4N EXP_A_UP_0N EXP_A_UP_0P EXP_C_UP_5P EXP_C_UP_5N

EXP_C_UP_4P EXP_C_UP_4N EXP_C_UP_6P EXP_C_UP_6N EXP_C_UP_7P EXP_C_UP_7N

EXP_C_DN_5P EXP_C_DN_5N EXP_C_DN_4P EXP_C_DN_4N EXP_C_DN_6P EXP_C_DN_6N

2U5U Pemnut

1U2U5U Pemnut

2U5U Guidepins

1U Guidepin (long)

HS3 Shipping Cover

ICH_SEG0_SCL ICH_SEG0_SDA ICH_SEG3_SCL ICH_SEG3_SDA

SYSTEM_PWRGOOD_RISER

5

RISER_PWRGOOD

3.3VAUX_PWRGOOD_RISER MCH_EXPHPINTR_N PCI_RST_RISER_N

5

RISER_EXP_PME_N

SP_HS3_E2

RISER_PCI_PME_N

SHIFTY_RISER_CLK SHIFTY_RISER_LATCH SHIFTY_RISER_DATA_DN SHIFTY_RISER_DATA_UP INTRUSION_COVER_N LI_BAT_PACK_P

RISER_PRES_N I2C_SEG3_VAUX_SDA I2C_SEG3_VAUX_SCL

NC_RISER_CONN_D24

+3.3V

A1

B1

C1

D1

E1

F1

A2

B2

C2

D2

E2

F2

A3

B3

C3

D3

E3

F3

A4

B4

C4

A10 B10 C10 D10 E10 F10

D4

E4

F4

A5

B5

C5

D5

E5

F5

A6

B6

C6

D6

E6

F6

A7

B7

C7

D7

E7

F7

A8

B8

C8

D8

E8

F8

A9

B9

C9

D9

E9

F9

A10 B10 C10 D10 E10 F10

(TDO) (TDI)

6 ROW BACKPLANE CONNECTOR

SUB=SUB*_C2006

ADD1=ADD*_U1495_PEMNUT1 ADD2=ADD13_U1495_PEMNUT2

ADD3=ADD13_C2012_GUIDEPIN1 ADD4=ADD13_C2012_GUIDEPIN2

ADD5=ADD02_X1912_GUIDEPIN3

ADD6=ADD*_M3170_COVER1

A1

B1

C1

D1

E1

F1

A2

B2

C2

D2

E2

F2

A3

B3

C3

D3

E3

F3

A4

B4

C4

D4

E4

F4

A5

B5

C5

D5

E5

F5

6 ROW BACKPLANE CONNECTOR

SUB=SUB*_C2007

RISER_CONN_1

Z-PACK HS3

RISER_CONN_3

Z-PACK HS3

+3.3V

G1

H1

J1

G2

H2

J2

G3

H3

J3

G4

H4

J4

G5

H5

J5

G6

H6

J6

G7

H7

J7

G8

H8

J8

G9

H9

J9

G10

H10

J10

G1

H1

J1

x02_gt_091703

CK_100M_SLOT7_P

4

CK_100M_SLOT7_N

4

EXP_C_DN_7N

17

EXP_C_DN_7P

17

EXP_A_DN_7N

17

EXP_A_DN_7P

17

EXP_A_DN_3N

17

EXP_A_DN_3P

17

EXP_A_DN_6N

17

EXP_A_DN_6P

17

EXP_A_DN_2N

17

EXP_A_DN_2P

17

EXP_A_DN_1P

17

EXP_A_DN_1N

17

EXP_A_DN_5N

17

EXP_A_DN_5P

17

EXP_A_DN_0N

17

EXP_A_DN_0P

17

EXP_A_DN_4N

17

EXP_A_DN_4P

17

EXP_C_DN_0P

17

EXP_C_DN_0N

17

EXP_C_DN_3N

17

EXP_C_DN_3P

17

EXP_C_DN_2P

17

EXP_C_DN_2N

17

EXP_C_DN_1N

17

EXP_C_DN_1P

17

EXP_C_UP_1N

17

EXP_C_UP_1P

17

EXP_C_UP_3P

17

EXP_C_UP_3N

17

EXP_C_UP_0N

17

EXP_C_UP_0P

17

CK_100M_SLOT6_P

4

CK_100M_SLOT6_N

4

EXP_C_UP_2N

17

EXP_C_UP_2P

17

EXP_B_DN_1P

17

EXP_B_DN_1N

17

EXP_B_DN_3N

17

EXP_B_DN_3P

17

EXP_B_DN_2P

17

EXP_B_DN_2N

17

EXP_B_DN_0P

17

EXP_B_DN_0N

17

EXP_B_UP_3P

17

EXP_B_UP_3N

17

EXP_B_UP_2P

17

EXP_B_UP_2N

17

EXP_B_UP_1P

17

EXP_B_UP_1N

17

EXP_B_UP_0P

17

EXP_B_UP_0N

17

x00_sd_052103 - pinout change

+12V

G2

H2

J2

G3

H3

J3

G4

H4

J4

C713

x02_gt_091703

12

+

270uF

16V-20%

+5.0V Riser

G5

H5

J5

x02_sd_changed PS_KILL res's to 100 from 220

subsys done

A B

ROOM=RISER_CONN

RISER_CONN_2

A1

B1

C1

D1

E1

F1

A2

B2

C2

D2

E2

F2

A3

B3

C3

D3

E3

F3

A4

B4

C4

D4

E4

F4

A5

B5

C5

D5

E5

F5

A6

B6

C6

D6

E6

F6

A7

B7

C7

D7

E7

F7

A8

B8

C8

D8

E8

F8

A9

B9

C9

D9

E9

F9

A10

B10

C10

D10

E10

F10

6 ROW BACKPLANE CONNECTOR

Z-PACK HS3

SUB=SUB*_C2006

21

0.1uF 16V

21

C168

+5.0V Riser

21

C164

0.1uF 16V

21

C171

0.1uF 16V

21

C165

21

C273

0.1uF 16V

+3.3V

21

C163

C162

0.1uF 16V

RISER & PS CONNECTOR

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

21

C166

0.1uF 16V

21

C274

0.1uF 16V

G1

H1

J1

G2

H2

J2

G3

H3

J3

G4

H4

J4

G5

H5

J5

G6

H6

J6

G7

H7

J7

G8

H8

J8

G9

H9

J9

G10

H10

J10

21

C167

0.1uF 16V

21

C275

0.1uF 16V

C433

+12V

12

+

270uF

+3.3V

C227

16V-20%

21

0.1uF 16V

21

C228

C229

0.1uF 16V

21

C4

0.1uF 16V

RISER_PRES_N

5,31

x00_sd_051703

CK_33M_SLOT1

3

33,36,50,58 33,36,50,58

33,36,50,58

33,36,50,58 33,36,50,58

33,36,50,58

33,50,58

33,36,50,58

33,36,50,58 33,36,50,58

33,36,50,58

+5.0V Riser

21

0.1uF 16V

21

C5

0.1uF 16V

21

C211

21

C208

0.1uF 16V

REFDES = PCIX_CONN

ROOM=RISER_MCA

+3.3V

+5.0V Riser

+12V

X00_GT_060503

LINDY PLANAR

D1660

DC

ICH_PIRQ_SLOT_AC_N ICH_PIRQ_SLOT_BD_N

PCI0_REQ_SLOT_N PCI0_GNT_SLOT_N

x00_sd_052903

SLOT6_PWRGD SLOT7_PWRGD

x00_sd_051703

X00_GT_060503

PCI0_AD31 PCI0_AD29

PCI0_AD27

PCI0_AD25

PCI0_AD23 PCI0_AD21

PCI0_AD20 PCI0_AD19

PCI0_AD17

PCI0_CBE2_N

PCI0_IRDY_N

PCI0_DEVSEL_N

PCI0_LOCK_N

PCI0_PERR_N

PCI0_SERR_N

PCI0_CBE1_N

PCI0_AD14

PCI0_AD12

PCI0_AD10 PCI0_AD8

PCI0_AD7 PCI0_AD5

PCI0_AD3

21

C226

C212

0.1uF 16V

21

C210

C209

0.1uF 16V

+3.3V

+5.0V Riser

X00_GT_060503

0.1uF 16V

+12V

Side B

X00_GT_051503

RISER_CONN_PCI

B1

A1

B2

A2

B3

A3

B4

A4

B5

A5 A6

B6

A7

B7

A8

B8

A9

B9

B10

A10

B11 A11 B12

A12

B13

A13

B14

A14

B15

A15

B16

A16

B17

A17 A18

B18 B19

A19 A20

B20

A21

B21 B22

A22 A23

B23

A24

B24 B25

A25

B26

A26 A27

B27 B28

A28

B29

A29

B30

A30

B31

A31

B32

A32

B33

A33

B34

A34

B35

A35

B36

A36 A37

B37 B38

A38

B39

A39

B40

A40

B41

A41

B42

A42

B43

A43

B44

A44

B45

A45

B46

A46

B47

A47

B48

A48

B49

A49

B50

A50 A51

B51

A52

B52 B53

A53

B54

A54

B55

A55

B56

A56 A57

B57

A58

B58

A59

B59

B60 A60 B61

A61 A62

B62

A63

B63

A64

B64

A65

B65 B66

A66

B67

A67

B68

A68

B69

A69 A70

B70 B71

A71 A72

B72

A73

B73

A74

B74

A75

B75

A76

B76

A77

B77

A78

B78

A79

B79 B80

A80

B81

A81

B82

A82

B83

A83

B84

A84

B85

A85

B86

A86

B87

A87

B88

A88

B89

A89 A90

B90 B91

A91 A92B92 A93

B93

A94

B94

A95

B95

A96

B96

A97

B97

A98

B98 B99

A99 B100 B101 A101

202MCA PCI SKT

A100

LOW PROFILE

NP02

Side A

TITLE

DWG NO.

DATE

PCI0_AD30 PCI0_AD28

PCI0_AD26

PCI0_CBE3_N

PCI0_AD24 PCI0_AD22

PCI0_AD18 PCI0_AD16

PCI0_FRAME_N

PCI0_TRDY_N

PCI0_STOP_N

PCI0_PAR

PCI0_AD15

PCI0_AD13

PCI0_AD11

PCI0_AD9

PCI0_CBE0_N

PCI0_AD6

PCI0_AD4 PCI0_AD2

PCI0_AD0 PCI0_AD1

RISER_PCI_PME_N

4 4

COMPUTER CORPORATION AUSTIN,TEXAS

SHEET

31 OF 611/13/2004

33 33

33,36,50,58 33,36,50,58

33,36,50,58

33,36,50,58 33,36,50,58

33,36,50,58

33,36,50,58 33,36,50,58

33 33

5,31,41

REV.

X03

1

2

3

B D

x03b_sd

SYSTEM_PWRGOOD_FETS_6V

28,41

2N7002

G

1

Q110

D 3

Q111

D 3

Q112

D 3

Q128

D 3

8

2U5U_IDE_PDIOW_N

7

2U5U_IDE_PDDREQ

6

2U5U_IDE_PDDACK_N

5

2U5U_IDE_PDIOR_N

2U5U_IDE_PDD1

8

2U5U_IDE_PDD12

7

2U5U_IDE_PIORDY

6

2U5U_IDE_PDD0

5

2U5U_IDE_IRQ14_N

8

2U5U_IDE_PDD3

7

2U5U_IDE_PDD13

6

2U5U_IDE_PDD2

5

2U5U_IDE_PDA1

8

2U5U_IDE_PDD9

7

2U5U_IDE_PDA0

6

2U5U_IDE_PDD15

5

2U5U_IDE_PDD6

8

2U5U_IDE_PDD10

7

2U5U_IDE_PDD5

6

2U5U_IDE_PDD4

5

2U5U_IDE_PDCS3_N

8

2U5U_IDE_PDCS1_N

7

2U5U_IDE_PRST_N

6

2U5U_IDE_PDA2

5

2U5U_IDE_PDD14

8

2U5U_IDE_PDD8

7

2U5U_IDE_PDD11

6

2U5U_IDE_PDD7

5

R1860

1 2

0-5%

R1861

0-5%

R1862

0-5%

R1863

1 2

0-5%

S 2

2N7002

G

1

S 2

2N7002

G

1

S 2

2N7002

G

1

S 2

1U_USB_FRONT2-

NP13

21

1U_USB_FRONT2+

NP13

21

2U5U_USB_FRONT2-

NP02

2U5U_USB_FRONT2+

NP02

CPLD_TCK_GATED

CPLD_TMS_GATED

CPLD_TD3_GATED

32

x00_sd_051803 - added gating of tdo

CPLD_TDO_GATED

32 32 32 32

32

x00_gt_052103 x00_sd_060203

CTRLPNL_MUX_S1

32,44

SYSTEM_PWRGOOD_BACKPLANE

5,32

CTRLPNL_MUX_S0

32,44

PCI_RST_BACKPLANE_N

5,32

SHIFTY_BCKPLN_CLK

5,32

SHIFTY_BCKPLN_LATCH

5,32

CP_BLUE_CLK

32

CPLD_TCK_GATED

32

FLP_WGATE_N

32,40

FLP_MTR0_N

32,40

FLP_TRK0_N

32,40

FLP_DIR_N

32,40

FLP_DENSEL

32,40

FLP_DSKCHG_N

32,40,59

FLP_RDATA_N

32,40

FLP_STEP_N

32,40

FLP_INDEX_N

32,40

FLP_WP_N

32,40

FLP_HDSEL_N

32,40

FLP_WDATA_N

32,40

VID_VS_OUT_FRONT

32,38

VID_HS_OUT_FRONT

32,38

FLP_DR0_N

32,40

VID_BLUE_FRONT

32,37

VID_RED_FRONT

32,37

VID_GREEN_FRONT

32,37

1 2 3 4

NP02

1 2 3

x00_sd_051803 x00_sd_060503

4

NP02

1 2 3 4

NP02

1 2 3 4

NP02

1 2 3 4

NP02

1 2 3 4

SP_2U5U_A2

Populate for 2U/5U builds only

R1771

1 2

NP13

0-5%

R1772

21

NP02

0-5%

R1773

21

NP13

0-5%

R1774

1 2

NP02

0-5%

x00_sd_051803

32

43,46

44

43,46

44

LED_ID_BLUE

CTRLPNL_CLK

LED_ID_YELLOW

CTRLPNL_DATA

+3.3V_AUX

C1764

x00_gt_052103 x00_sd_060203

8

RN5

7 6 5

0

8

RN6

7 6 5

0

8

RN7

7 6 5

0

8

RN8

7 6 5

0

8

RN9

7 6 5

0

8

RN10

7 6 5

0

8

RN11

7 6 5

0

CP_BLUE_CLK

CP_AMBER_DATA

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

2U5U_CTRLPNL_MUX_S1

2U5U_SYSTEM_PWRGOOD_BACKPLANE

2U5U_CTRLPNL_MUX_S0

2U5U_PCI_RST_BACKPLANE_N

2U5U_SHIFTY_BCKPLN_CLK

2U5U_SHIFTY_BCKPLN_LATCH

2U5U_FLP_DSKCHG_N

SP_2U5U_A7

2U5U_VID_VS_OUT_FRONT 2U5U_VID_HS_OUT_FRONT

2U5U_VID_BLUE_FRONT

2U5U_VID_RED_FRONT

2U5U_VID_GREEN_FRONT

SP_2U5U_B5SP_2U5U_B4

32

21

C437

0.1uF 16V

BACKPLANE_1U_A

A1 B1 C1 A2 B2 C2 A3 B3 C3 A4 B4 C4 A5 B5 C5 A6 B6 C6 A7 B7 C7 A8 B8 C8 A9 B9

C9 A10 B10 C10 A11 B11 C11 A12 B12 C12

PRESS FIT CONN

F1

E1

D1

F2

E2

D2

F3

E3

D3

F4

E4

D4

F5

E5

D5

F6

E6

D6

F7

E7

D7

F8

E8

D8

F9

E9

D9 F10 E10 D10 F11 E11 D11 F12 E12 D12

PRESS FIT CONN

+12V

C439

1 2

0.1uF 16V

HDM BACKPLANE

BACKPLANE_1U_B

HDM BACKPLANE

VCC

21

C454

0.1uF 16V

F1=PRES

F1 E1 D1 F2 E2 D2 F3

PWR_LED

E3

SPKROUT

D3

1U_USB_FRONT2+

F4 E4 D4 F5

1U_USB_FRONT2-

E5 D5

PCI_RST_BACKPLANE_N

F6 E6

BTN_NMI

D6

BTN_PWR_ON

F7 E7 D7

SYSTEM_PWRGOOD_BACKPLANE

F8 E8 D8 F9

VID_DDC_OUT_SDA_FRONT

E9 D9

CP_BLUE_CLK SENSE_5V_BACKPLANE_1U

F10 E10

VID_DDC_OUT_SCLK_FRONT

D10

CP_AMBER_DATA

F11

IDE_PDIOW_N

E11 D11

CPLD_TD3_GATED

F12 E12

IDE_PDDREQ

D12

NP13 SUB02_C2144

A1

IDE_PDD8

B1

IDE_PDD14

C1 A2

IDE_PDD7

B2

IDE_PDD11

C2

IDE_PDCS3_N

A3 B3

IDE_PRST_N

C3

IDE_PDCS1_N

A4

IDE_PDD6

B4 C4

IDE_PDA2

A5

IDE_PDD5

B5

IDE_PDD10

C5 A6

IDE_PDD4

B6

IDE_PDD9

C6

IDE_PDA1

A7 B7

IDE_PDD15

C7

IDE_PDA0

A8

IDE_PDD3

B8 C8

IDE_IRQ14_N

A9

IDE_PDD2

B9

IDE_PDD13

C9 A10 B10

IDE_PDD12

C10

IDE_PIORDY

A11

IDE_PDD1

B11 C11 A12

IDE_PDD0

B12

IDE_PDDACK_N

C12

IDE_PDIOR_N

NP13

32,46 32,43 32

x03_sd changed port numbers

32

5,32

32,56 32,56

5,32

32,38

x00_sd_051803

32 6 32,38

x00_sd_051803

32

(TDI)

32,33

32

32,33

32,33 32,33

32,33 32,33 32,33

32,40 32,33 32,33

32,33 32,33 32,33

x00_sd_060503 - name change

32,33 32,33 32,33 32,33

32,33 32,33 32,40 32,33

32,33 32,33 32,33 32,33

5,31,40,46

IDE_PDIOW_N IDE_PDDREQ IDE_PDDACK_N IDE_PDIOR_N

IDE_PDD1 IDE_PDD12 IDE_PIORDY IDE_PDD0

IDE_IRQ14_N IDE_PDD3 IDE_PDD13 IDE_PDD2

IDE_PDA1 IDE_PDD9 IDE_PDA0 IDE_PDD15

IDE_PDD6 IDE_PDD10 IDE_PDD5 IDE_PDD4

IDE_PDCS3_N IDE_PDCS1_N IDE_PRST_N IDE_PDA2

IDE_PDD14 IDE_PDD8 IDE_PDD11 IDE_PDD7

CPLD_TCK

CPLD_TMS

(TDI) (TDI)

CPLD_TD3

31

CPLD_TDO

5,40

1

RN13

2 3 4

0

NP02

1

RN14

2 3 4

0

NP02

1

RN15

2 3 4

0

NP02

1

RN16

2 3 4

0

NP02

1

RN17

2 3 4

0

NP02

1

RN18

2 3

x00_sd_060503 - name change

4

0

NP02

1

RN19

2 3 4

0

NP02

1

2

3

32,44,59 32,44,59

x00_sd_060203 - connected

32,44,45,50

5,32,59

32,44,50,59

5,32,46

32,40,59

I2C_SEG5_SDA I2C_SEG5_SCL

NC_CTRLPNL_PRES_N FP_GB_ETH_LED_1

24

CTRLPNL_MUX_S0

32,44

FP_GB_ETH_LED_2

25

CTRLPNL_MUX_S1

32,44

SHIFTY_BCKPLN_CLK

5,32

IPMB_RST_N SHIFTY_BCKPLN_DATA_UP SHIFTY_BCKPLN_LATCH

5,32

ID_BUTTON_RAW

32,43

SHIFTY_BCKPLN_DATA_DN

5,32

I2C_IPMB_SDA

x00_sd_051803 - added gating of tdo

CPLD_TDO_GATED

32

I2C_IPMB_SCL

CPLD_TCK_GATED

32

BACKPLANE_PRES_N FLP_DR0_N

32,40

FLP_WP_N

32,40

FLP_INDEX_N

32,40

FLP_HDSEL_N

32,40

VID_VS_OUT_FRONT

32,38

FLP_WDATA_N

32,40

FLP_DENSEL

32,40

VID_BLUE_FRONT

32,37

FLP_DSKCHG_N

FLP_RDATA_N

32,40

FLP_STEP_N

32,40

VID_RED_FRONT

32,37

FLP_MTR0_N

32,40

FLP_WGATE_N

32,40

VID_HS_OUT_FRONT

32,38

FLP_TRK0_N

32,40

FLP_DIR_N

32,40

VID_GREEN_FRONT

32,37

CPLD_TMS_GATED

32

+3.3V_AUX

+3.3V_AUX VCC+12V

SUB02_C2144

Populate for 1U builds only

4 4

33

subsys done

ROOM=BACKPLANE

A B

x03_sd changed port number

USB_FRONT2-

USB_FRONT2+

CA

+3.3V_AUX VCC+12V

C625

1 2

+12V+5V_AUX

21

1 2

C1765

0.1uF 16V

x00_sd_051903 - 060503

2U5U_CP_BLUE_CLK

2U5U_CPLD_TCK

2U5U_FLP_WGATE_N

2U5U_FLP_MTR0_N 2U5U_FLP_TRK0_N

2U5U_FLP_DIR_N

2U5U_FLP_DENSEL

2U5U_FLP_RDATA_N

2U5U_FLP_STEP_N

2U5U_FLP_INDEX_N

2U5U_FLP_WP_N 2U5U_FLP_HDSEL_N 2U5U_FLP_WDATA_N

2U5U_FLP_DR0_N

0.1uF 16V

32 32

32 32 32 32

32 32 32

21

C455

32 32

32,44,45,50

32,44,50,59

C626

1 2

0.1uF 16V

I2C_SEG5_SDA

32,44,59

I2C_SEG5_SCL

32,44,59

NC_2U5U_CTRLPNL_PRES_N

2U5U_CTRLPNL_MUX_S0

32

2U5U_CTRLPNL_MUX_S1

32

2U5U_SHIFTY_BCKPLN_CLK

32

IPMB_RST_N SHIFTY_BCKPLN_DATA_UP

5,32,59

2U5U_SHIFTY_BCKPLN_LATCH

32

ID_BUTTON_RAW

32,43

SHIFTY_BCKPLN_DATA_DN

5,32

I2C_IPMB_SDA

x00_sd_051803 - added gating of tdo

CPLD_TDO_GATED

32

I2C_IPMB_SCL

2U5U_CPLD_TCK

32

CPLD_TMS_GATED

32

2U5U_VID_GREEN_FRONT

32

2U5U_FLP_DIR_N

32

2U5U_VID_HS_OUT_FRONT

32

2U5U_FLP_TRK0_N

32

2U5U_FLP_MTR0_N

32

2U5U_FLP_WGATE_N

32

2U5U_VID_RED_FRONT

32

2U5U_FLP_RDATA_N

32

2U5U_FLP_STEP_N

32

2U5U_VID_BLUE_FRONT

32

2U5U_FLP_DSKCHG_N

32

2U5U_FLP_WDATA_N

32

2U5U_FLP_DENSEL

32

2U5U_VID_VS_OUT_FRONT

32

2U5U_FLP_INDEX_N

32

2U5U_FLP_HDSEL_N

32

BACKPLANE_PRES_N

5,32,46

2U5U_FLP_DR0_N

32

2U5U_FLP_WP_N

32

0.1uF 16V

+3.3V_AUX VCC+12V

+5V_AUX

x03_tj_121503 x03_tj_010904

BACKPLANE_2U5U

P1

P3_1 P3_2

P2_1 P2_2

P1_1 P1_2

F1 E1 D1 F2 E2 D2 F3 E3 D3 F4 E4 D4 F5 E5 D5 F6 E6 D6 F7 E7 D7 F8 E8 D8 F9 E9

D9 F10 E10 D10 F11 E11 D11 F12 E12 D12 F13 E13 D13 F14 E14 D14 F15 E15 D15 F16 E16 D16 F17 E17 D17 F18 E18 D18 F19 E19 D19 F20 E20 D20 F21 E21 D21 F22 E22 D22 F23 E23 D23 F24 E24 D24

RIGHT ANGLE RCPT HDM DAUGHTERCARD

PRESS-FIT CONN ASSY

P3_1 P3_2

P2_1 P2_2

P1_1 P1_2

F1 E1 D1 F2 E2 D2 F3 E3 D3 F4 E4 D4 F5 E5 D5 F6 E6 D6 F7 E7 D7 F8 E8 D8 F9 E9 D9 F10 E10 D10 F11 E11 D11 F12 E12 D12 F13 E13 D13 F14 E14 D14 F15 E15 D15 F16 E16 D16 F17 E17 D17 F18 E18 D18 F19 E19 D19 F20 E20 D20 F21 E21 D21 F22 E22 D22 F23 E23 D23 F24 E24 D24

BLADE

P3_4 P3_3

P2_4 P2_3

P1_4 P1_3

A1 B1 C1 A2 B2 C2 A3 B3 C3 A4 B4 C4 A5 B5 C5 A6 B6 C6 A7 B7 C7 A8 B8 C8 A9 B9

C9 A10 B10 C10 A11 B11 C11 A12 B12 C12 A13 B13 C13 A14 B14 C14 A15 B15 C15 A16 B16 C16 A17 B17 C17 A18 B18 C18 A19 B19 C19 A20 B20 C20 A21 B21 C21 A22 B22 C22 A23 B23 C23 A24 B24 C24

P3_4 P3_3

P2_4 P2_3

P1_4 P1_3

A1=PRES

A1 B1 C1 A2

x00_sd_060503 - vcc

B2 C2 A3 B3

PWR_LED

C3

SPKROUT

A4

2U5U_USB_FRONT2+

B4 C4 A5

2U5U_USB_FRONT2-

B5 C5

2U5U_PCI_RST_BACKPLANE_N

A6 B6

BTN_NMI

C6

BTN_PWR_ON

A7

x00_sd_060503 - vcc

B7 C7

2U5U_SYSTEM_PWRGOOD_BACKPLANE

A8

x00_sd_060503 - vcc

B8 C8 A9 B9

VID_DDC_OUT_SDA_FRONT

C9

2U5U_CP_BLUE_CLK

A10

SENSE_5V_BACKPLANE_2U5U

B10

VID_DDC_OUT_SCLK_FRONT

C10

CP_AMBER_DATA

A11

2U5U_IDE_PDIOW_N

B11 C11

CPLD_TD3_GATED

A12 B12

2U5U_IDE_PDDREQ

C12 A13

2U5U_IDE_PDD0

B13

2U5U_IDE_PDDACK_N

C13

2U5U_IDE_PDIOR_N

A14

2U5U_IDE_PDD1

B14 C14 A15 B15

2U5U_IDE_PDD12

C15

2U5U_IDE_PIORDY

A16

2U5U_IDE_PDD2

B16

2U5U_IDE_PDD13

C16 A17

2U5U_IDE_PDD3

B17 C17

2U5U_IDE_IRQ14_N

A18 B18

2U5U_IDE_PDD15

C18

2U5U_IDE_PDA0

A19

2U5U_IDE_PDD4

B19

2U5U_IDE_PDD9

C19

2U5U_IDE_PDA1

A20

2U5U_IDE_PDD5

B20

2U5U_IDE_PDD10

C20 A21

2U5U_IDE_PDD6

B21 C21

2U5U_IDE_PDA2

A22 B22

2U5U_IDE_PRST_N

C22

2U5U_IDE_PDCS1_N

A23

2U5U_IDE_PDD7

B23

2U5U_IDE_PDD11

C23

2U5U_IDE_PDCS3_N

A24

2U5U_IDE_PDD8

B24

2U5U_IDE_PDD14

C24

Populate for 2U/5U builds only

SUB1=NP02

SUB2=SUB13_R4241

todo confirm correct symbol

BACKPLANE CONNECTORS

X00_PL_051503: Changed PWR_LED to active high

32,46 32,43

x03_sd changed port numbers

x00_sd_060503

x00_sd_051803

(TDI)

TITLE

32

32,56 32,56

32

32,38 32 6 32,38 32 32

32

32 32 32 32

32

32 32 32 32 32 32 32

32

x00_sd_060503 - name change

32 32 32 32 32 32 32

COMPUTER CORPORATION AUSTIN,TEXAS

LINDY PLANAR

DWG NO.

DATE

D1660

SHEET

DC

REV.

X03

32 OF 611/13/2004

1

2

3

1

2

3

4

+CPU_VTT

PCI_RST_ICH_N_R

33

PROPAGATION_DELAY=L:S::2000

31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58

31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58

31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,36,50,58 31,33,50,58

31,50,58 31,50,58

5,41

31,33 33,36 33,50 33,50 33,58

34

+3.3V_AUX

R891

8.2K-5%

1 2

R207

1 2

51

R206

1 2

220

x03_GT_011504

PCI0_AD31 PCI0_AD30 PCI0_AD29 PCI0_AD28 PCI0_AD27 PCI0_AD26 PCI0_AD25 PCI0_AD24 PCI0_AD23 PCI0_AD22 PCI0_AD21 PCI0_AD20 PCI0_AD19 PCI0_AD18 PCI0_AD17 PCI0_AD16 PCI0_AD15 PCI0_AD14 PCI0_AD13 PCI0_AD12 PCI0_AD11 PCI0_AD10 PCI0_AD9 PCI0_AD8 PCI0_AD7 PCI0_AD6 PCI0_AD5 PCI0_AD4 PCI0_AD3 PCI0_AD2 PCI0_AD1 PCI0_AD0

PCI0_CBE3_N PCI0_CBE2_N PCI0_CBE1_N PCI0_CBE0_N

PCI0_DEVSEL_N PCI0_FRAME_N PCI0_TRDY_N PCI0_IRDY_N PCI0_STOP_N PCI0_PAR PCI0_PERR_N PCI0_SERR_N PCI0_LOCK_N ICH_PME_N

PCI0_REQ_SLOT_N PCI0_REQ_VIDEO_N PCI0_REQ_RAC_N PCI0_REQ_RAC_IDE_N PCI0_REQ_DEBUG_N

SOFT_SMI SOFT_SCI

PCI0_GNT_SLOT_N

31

PCI0_GNT_VIDEO_N

36

PCI0_GNT_RAC_N

50

PCI0_GNT_RAC_IDE_N

50

PCI0_GNT_DEBUG_N

58

CK_33M_ICHS

3

PCI_RST_ICH_N_R

33

ICH_LINKALERT

SUB=SUB*_T1953

x00_tj_050503

A B C

+3.3V_AUX

PROPAGATION_DELAY=L:S::1500

R1912

1 2

33-5%

NC_CK_ICH_25M

H_FERR_N

ICH_THRMTRIP_N

PCI_RST_ICH_N

.01uF 16V

C1806

1 2

P2

AD31

F4

AD30

P4

AD29

F5

AD28

N2

AD27

D3

AD26

P3

AD25

E6

AD24

N4

AD23

C4

AD22

N5

AD21

H3

AD20

P5

AD19

B2

AD18

L1

AD17

G4

AD16

G5

AD15

K1

AD14

G2

AD13

L5

AD12

H4

AD11

M4

AD10

F2

AD9

K5

AD8

J2

AD7

J3

AD6

H2

AD5

H5

AD4

K4

AD3

G3

AD2

J5

AD1

J4

AD0

M2

C/BE3

N3

C/BE2

J1

C/BE1

E3

C/BE0

L3

DEVSEL

D2

FRAME

E4

TRDY

M3

IRDY

E5

STOP

F1

PAR

K2

PERR

L4

SERR

L2

PLOCK

V2

PME

D5

REQ0

C1

REQ1

C5

REQ2

B6

REQ3

C6

REQ4/GPIO40

A5

REQA/GPIO0

E7

REQB/REQ5/GPIO1

D4

GNT0

A3

GNT1

B7

GNT2

C7

GNT3

A4

GNT4/GPIO48

E8

GNTA/GPIO16

B4

GNTB/GNT5/GPIO17

N1

PCICLK

V4

PCIRST

V5

LINKALERT

A11

NC

11,33

33,36

5,59

33,50 33,50 31,33

33,58

5,33

UICH_IC

CPUPWRGD/GPIO49

INTEL ICH5 REV. 0.73

HETERO 1 OF 4

PCI0_REQ_VIDEO_N PCI0_REQ_RAC_IDE_N PCI0_REQ_RAC_N PCI0_REQ_SLOT_N

PCI0_REQ_DEBUG_N

V23

A20M

R21

IGNNE

U24

FERR

R23

INIT

U23

INTR

R22

NMI

V24

SMI

T24

STPCLK

P23

RCIN

T22

A20GATE

P24 P22

CPUSLP

L24

HIREF

HIRCOMP

HI_VSWING

HI0 HI1 HI2 HI3 HI4 HI5 HI6 HI7 HI8

HI9 HI10 HI11

HI_STBS HI_STBF

PIRQA PIRQB PIRQC

PIRQD PIRQE/GPIO2 PIRQF/GPIO3 PIRQG/GPIO4 PIRQH/GPIO5

IRQ14

IRQ15

SERIRQ

USBP0+ USBP0USBP1+ USBP1USBP2+ USBP2USBP3+ USBP3USBP4+ USBP4USBP5+ USBP5USBP6+ USBP6USBP7+ USBP7-

OC0 OC1 OC2 OC3

OC4/GPIO9 OC5/GPIO10 OC6/GPIO14 OC7/GPIO15

USBRBIAS USBRBIAS

PROPAGATION_DELAY=L:S::500

HI_VREF_ICH

N24

HI_RCOMP_ICH

L20

HI_VSWING_ICH

H20

HLA_0

H21

HLA_1

J20

HLA_2

H23

HLA_3

M23

HLA_4

M21

HLA_5

N21

HLA_6

M20

HLA_7

L22

HLA_8

J22

HLA_9

K21

HLA_10

G22

HLA_11

J24

HLA_STBS

K23

HLA_STBF

B3 E1 A2 C2 D7 A6 E2 B1 Y17 Y24

NC_IDE_IRQ15_N

F23

C23 D23 A22 B22 C21

USB_FRONT2+

D21

USB_FRONT2-

A20 B20 C19 D19 A18 B18 C17 D17 A16 B16 C15 D15 D14

x03_sd changed port connections

C14 B14 A14

GPI_BRD_REV0

D13 C13

GPI_BRD_REV1

A24

USB_RBIAS

B24

33

+3.3V

1 2 3 4 5

RN1

8.2K R194

1 2

8 7 6

8.2K-5%

ICH_VRM_PWRGD

33

Should be 43.2 ohms for 50 ohm trace impedance Should be 52.3 ohms for 60 ohm trace impedance

H_A20M_N

H_IGNNE_N

H_FERR_N H_INIT_N

H_SMI_N

H_STPCLK_N

KB_RST_N

KB_GATE_A20_N

H_PWRGOOD

H_SLP_N

17 17 17 17 17 17 17 17 17 17 17 17 17 17

IDE_IRQ14_N

SERIRQ

USB_RAC0+ USB_RAC0NC_USBP1+ NC_USPP1-

NC_USBP3+

NC_USPP3USB_BACK4+ USB_BACK4USB_BACK5+ USB_BACK5-

NC_USBP6+

NC_USPP6-

NC_USBP7+

NC_USPP7-

V_5P0_USB_ALWAYS_ON_PORTS V_5P0_USB_FRONT2_N

V_5P0_USB_BACK45_N

11 11 11,33 11,55

H_INTR

11

H_NMI

11 11 11 33,40 33,40 11,12 11

21

C45821C457

.01uF 50V

4

4.7K

5

32

40

50 50

32 32

56

x03_sd changed port connections

56 56 56

Internal 15K

PD's to GND

33 33

R186

1 2

22.6-1%

ICH_32K_SUSCLK_BUFF

+3.3V

R689

8.2K-5%

1 2

+1.5V

R239

43.2-1%

1 2

34

ECAD: Caps within .25" of BGA

.01uF 50V

+3.3V

123

432

1

4.7K

RN22

876

RN77

567

8

ICH_PIRQ_SLOT_AC_N ICH_PIRQ_SLOT_BD_N ICH_PIRQ_VIDEO_N ICH_PIRQ_DEBUG_N ICH_PIRQ_RAC_A_N ICH_PIRQ_RAC_B_N ICH_PIRQ_RAC_C_N ICH_PIRQ_RAC_D_N

+3.3V

21

R514

R513

R511

4.7K

1 2

+5.0V Riser

21

1 2

0.1uF 16V

C61

0.1uF 16V

C438

U58

1 2

C1731

1142

5146

0.1uF 16V

VHC14

143U58

VHC14

U58

VHC14

4

CK_32K_VAUX_SIO_R

PROPAGATION_DELAY=L:S::1500

CK_32K_VAUX_SYSCPLD_R

PROPAGATION_DELAY=L:S::1500

CK_32K_VAUX_BMCCPLD_R

To avoid IccRTC leakage when AUX is off

x03_sd

17

x03_sd

31,33,50,58

x03_sd

44,56

17

43

31 31 36 58 50 50 50 50

KB_RST_N

33,40

KB_GATE_A20_N

33,40

Rev.

Comment

00

x00 - x02

01

21

4.7K

R446

R1841

2 1

8.2K-5%

56

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

x03 10 11

R209

21

33-5%

R1608

1 2

33-5%

R1609

21

33-5%

34,41,57

VBAT

ICH_INTRUDER_N

33

SYSTEM_PWRGOOD_CHIPSET

5,17,33

MCH_PME_N PCI0_PERR_N

GPE_NMI_N MCH_GPE_N

GPO_SPKR_DISABLE

+3.3V

21

R507

R508

4.7K

4.7K 1 2

57

33 33

CK_32K_VAUX_SIO

CK_32K_VAUX_SYSCPLD

CK_32K_VAUX_BMCCPLD

R124

1 2

+3.3V+3.3V

8.2K-5%

1 2

R21221R204

43,46

44,45,50

x00_sd_052903

HEATSINK_PRES_N

GPI_BRD_REV1 GPI_BRD_REV0

+3.3V_AUX

x03_sd

1M-5%

R193

1 2

+3.3V_AUX

8.2K-5%

PARAPORT_PRES_N

RAC_PRSNT_N

BMC_RDY_N

RAC_RDY_N

+3.3V

NP*

8.2K-5%

2.7K-5%

40

5

46

8.2K-5% R515

PROPAGATION_DELAY=L:S::2000

21

8.2K-5%

+3.3V

8.2K-5%

1 2

R93

R84

21

+3.3V

8.2K-5%

1 2

R94

8.2K-5%

1 2

R497

R496

21

x03_sd

2.7K-5%

1 2

R505

R506

NP*

21

+3.3V

21

R351

5,40,41,44,59

5,17,33

5,41,44,56,59

33,41,46

x00_sd_0518030

Intenral p/d not always active

8.2K-5%

+3.3V

8.2K-5%

1 2

R533

21

R7

5,40,44,55,59 5,40,44,55,59 5,40,44,55,59 5,40,44,55,59 5,40,44,55,59

8.2K-5%

R1816

1 2

8.2K-5% R210

21

8.2K-5% R211

1 2

8.2K-5%

R91

8.2K-5%

+3.3V

R492

8.2K-5%

SIO_PME_N

40

3.3VAUX_PWRGOOD_ICH_ESM

2 1

R165

21

8.2K-5%

1 2

ICH_THRM

ICH_THRMTRIP_N

5,33

NC_ICH_SLP_S3_N ICH_PWR_ON_REQ NC_ICH_SLP_S5_N

SYSTEM_PWRGOOD_CHIPSET

ICH_VRM_PWRGD

33

ICH_PWRBTN_N ICH_BTN_RESET_N

NC_ICH_SUS_STAT ICH_32K_SUSCLK_BUFF

33

ICH_VAUX_SDA

35

ICH_VAUX_SCL

35

ICH_SMLINK1_SDA

35

ICH_SMLINK0_SCL

35

ICH_INTRUDER_N

33

CK_14M_ICHS

3

CK_48M_USB_ICHS

3

CK_66M_ICH

3

AC97_BITCLK NC_AC97_RESET_N AC97_SYNC

34

AC97_SDATA_OUT

34

NC_NC_AC97_SDIN2 NC_AC97_SDIN1 NC_AC97_SDATA_IN ICH_SPKR

34,43

LPC_LFRAME_N LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0 SP_ICH_GPI41 LPC_LDRQ0_N

40

BMC_SMI_N

44,45

NC_ICH_SER_MODE_SEL0 NC_ICH_SER_MODE_SEL1

GPO_I2C_MUX_SEL0

35

GPO_I2C_MUX_SEL1

35

GPO_FWH_WP_N

55

GPI_PARAPORT_PRES_R

RAC_PRSNT_N BMC_RDY_N_R RAC_RDY_N_R GPO_ALT_LLINE_N

7

NC_SATALED_N

CK_100M_SATA_P

4

CK_100M_SATA_N

4 34 34

NC_SATA_1_TX+ NC_SATA_1_TX-

34 34

NC_SATA_2_TX+ NC_SATA_2_TX-

SATA_RBIAS

34

PROPAGATION_DELAY=L:S::1000

ICH_LAN_RST_N

33

T2

THRM

T21

THRMTRIP

W1

SLP_S3

U2

SLP_S4

AA3

SLP_S5

AC12

PWROK

R20

VGATE/VRMPWRGD

Y4

PWRBTN

U1

SYS_RST

AB3

RI

AB13

RSMRST

AB1

SUS_STAT

Y1

SUSCLK

AD1

SMBDATA

AD2

SMBCLK

AC3

SMBALERT/GPIO11

AA2

SMLINK1

AD3

SMLINK0

Y12

INTRUDER

F20

CLK14

F24

CLK48

N22

CLK66

D8

AC_BIT_CLK

C12

AC_RST

B8

AC_SYNC

A9

AC_SDOUT

A13

AC_SDIN2

D12

AC_SDIN1

E12

AC_SDIN0

E24

SPKR

T4

LFRAME

U4

LAD3

R3

LAD2

R4

LAD1

T5

LAD0

R2

LDRQ1/GPIO41

U5

LDRQ0

R5

AGPBUSY/GPIO6

U3

GPIO7

Y2

GPIO8

W4

GPIO12

W5

GPIO13

U21

GPIO18

T20

GPIO19

U22

GPIO20

R1

GPIO21

U20

GPIO22

F22

GPIO23

AC1

GPIO24

W3

GPIO25

V3

GPIO27

W2

GPIO28

T1

GPIO32

G23

SATALED

F21

GPIO34

AC5

CLK100+

AD5

CLK100-

SATA_1_RX+ SATA_1_RX-

SATA_2_RX+ SATA_2_RX-

AC7

SATA0RX+

AD7

SATA0RX-

AA8

SATA0TX+

AB8

SATA0TX-

AC9

SATA1RX+

AD9

SATA1RX-

AA10

SATA1TX+

AB10

SATA1TX-

Y11

SATARBIAS

Y9

SATARBIAS

Series resistor with pull-down

R1890

21

0-5%

UICH_IC

INTEL ICH5 REV. 0.73

HETERO 2 OF 4

SMBus address = 44h

SMLink address = 88h

Input/Output

Series resistor

Defaults high

VAux rail VBat rail

Open-drain

D

3.3VAUX_PWRGOOD_ICH_ESM

AB19

PDCS1

Y18

PDCS3

AC19

PDA2

AD19

PDA1

AA19

PDA0

AB17

PDD15

AA16

PDD14

Y16

PDD13

AC16

PDD12

AA15

PDD11

AD16

PDD10

Y15

PDD9

AD15

PDD8

AB14

PDD7

AD14

PDD6

AC15

PDD5

AA14

PDD4

AC14

PDD3

Y14

PDD2

Y13

PDD1

AB16

PDD0

AC18

PDDACK

AC17

PDDREQ

AD18

PDIOR

AA17

PDIOW

AA18

PIORDY

V22

SDCS1

V20

SDCS3

W21

SDA2

W23

SDA1

W22

SDA0

AA23

SDD15

AB24

SDD14

AC24

SDD13

AB22

SDD12

AA20

SDD11

AC22

SDD10

AD22

SDD9

Y19

SDD8

AC20

SDD7

AB20

SDD6

AC21

SDD5

AB21

SDD4

AD24

SDD3

AD23

SDD2

AB23

SDD1

AA22

SDD0

W20

SDDACK

Y20

SDDREQ

Y23

SDIOR

Y22

SDIOW

Y21

SIORDY

LAN_CLK LAN_RST

EE_DIN

EE_DOUT

EE_CS

C11 B12 C9 E9 C10 D9 E10 AA1 D10

B11 B9 B10 A12

LAN_RXD2 LAN_TXD2 LAN_RXD1 LAN_TXD1 LAN_RXD0 LAN_TXD0

LAN_RSTSYNC

EE_SHCLK

ICH5 - MAIN

TITLE

LINDY PLANAR

DWG NO.

DATE

33,41,46

IDE_PDCS1_N IDE_PDCS3_N IDE_PDA2 IDE_PDA1 IDE_PDA0 IDE_PDD15 IDE_PDD14 IDE_PDD13 IDE_PDD12 IDE_PDD11 IDE_PDD10 IDE_PDD9 IDE_PDD8 IDE_PDD7 IDE_PDD6 IDE_PDD5 IDE_PDD4 IDE_PDD3 IDE_PDD2 IDE_PDD1 IDE_PDD0 IDE_PDDACK_N IDE_PDDREQ IDE_PDIOR_N IDE_PDIOW_N IDE_PIORDY

NC_IDE_SDCS1_N NC_IDE_SDCS3_N NC_IDE_SDA2 NC_IDE_SDA1 NC_IDE_SDA0 NC_IDE_SDD15 NC_IDE_SDD14 NC_IDE_SDD13 NC_IDE_SDD12 NC_IDE_SDD11 NC_IDE_SDD10 NC_IDE_SDD9 NC_IDE_SDD8 NC_IDE_SDD7 NC_IDE_SDD6 NC_IDE_SDD5 NC_IDE_SDD4 NC_IDE_SDD3 NC_IDE_SDD2 NC_IDE_SDD1 NC_IDE_SDD0 NC_IDE_SDDACK_N NC_IDE_SDDREQ NC_IDE_SDIOR_N NC_IDE_SDIOW_N NC_IDE_SIORDY

NC_ICH_LAN_TXD0

NC_ICH_LAN_CLK

8.2K-5%

1 2

R686

32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32

NC_ICH_LAN_RXD2 NC_ICH_LAN_TXD2 NC_ICH_LAN_RXD1 NC_ICH_LAN_TXD1 NC_ICH_LAN_RXD0

ICH_LAN_RST_N

NC_ICH_LAN_SYNC

NC_ICH_EE_DIN NC_ICH_EE_DOUT

NC_ICH_EE_CS

NC_ICH_EE_SHCLK

ROOM=ICH

COMPUTER CORPORATION

AUSTIN,TEXAS

REV.

SHEET

33 OF 611/13/2004

1

+3.3V

1 2

4.7K 4.7K

R516

2

+3.3V

R517

21

3

33

4

X03D1660

subsys done

DCBA

+3.3V_AUX

33,34,41,57

1

2

X32KHZ

1 4

32KHz

1 2

10M-5%

18pF

1 2

C683

33,34,41,57

R677

50V-5%

21

C684

VBAT

18pF

50V-5%

ECAD Note: Place near pin AD10

3

A B C

R669

NP

21

ICH_INTVRMEN

R892

1 2

8.2K-5%

.01uF 50V

1 2

0.1uF 16V

1 2

C412

12

C447

0.1uF 16V

220

VBAT

34

.01uF 50V

C696

C416

21

C44612C661

2 1

1 2

ICH_RTCX1 ICH_RTCX2

RTCRST_N

V_1P5_AUX_A

V_1P5_AUX_B

V_1P5_AUX_C

.01uF 50V

1 2

C697

21

+1.5V

+CPU_VTT

0.1uF 16V

R663

330K

ICH_TP0 NC_ICH1 NC_ICH2

C698

x00_tj_040803

AD11

VCCRTC

AC11

RTCX1

AB12

RTCX2

AA12

RTCRST

AB2

BATLOW/TP0

P20

DPRSLPVR

R24

DPSLP

F19

VCCSUS1_5/VCCSUS1_5_A_F19

AA4

VCCSUS1_5/VCCSUS1_5_B_AA4

AB4

VCCSUS1_5/VCCSUS1_5_B_AB4

Y5

VCCSUS1_5/VCCSUS1_5_B_Y5

F7

VCCLAN1_5/VCCSUS1_5_C_F7

F8

VCCLAN1_5/VCCSUS1_5_C_F8

AA6

VCCSATAPLL_AA6

AB6

VCCSATAPLL_AB6

E15

VCC1_5_E15

E22

VCC1_5_E22

F14

VCC1_5_F14

F15

VCC1_5_F15

H24

VCC1_5_H24

J19

VCC1_5_J19

K10

VCC1_5_K10

K12

VCC1_5_K12

K13

VCC1_5_K13

K19

VCC1_5_K19

L19

VCC1_5_L19

M15

VCC1_5_M15

N15

VCC1_5_N15

N23

VCC1_5_N23

P19

VCC1_5_P19

R6

VCC1_5_R6

R10

VCC1_5_R10

R12

VCC1_5_R12

W6

VCC1_5_W6

W7

VCC1_5_W7

W8

VCC1_5_W8

W9

VCC1_5_W9

W10

VCC1_5_W10

W11

VCC1_5_W11

W19

VCC1_5_W19

R15

V_CPU_IO_R15

R19

V_CPU_IO_R19

T19

V_CPU_IO_T19

(mobile only)

INTEL ICH5 REV. 0.73

UICH_IC

VCCSUS3_3_B15INTVRMEN VCCSUS3_3_E13 VCCSUS3_3_E14 VCCSUS3_3_E18 VCCSUS3_3_F16 VCCSUS3_3_F17 VCCSUS3_3_F18 VCCSUS3_3_K15

VCCSUS3_3_U6 VCCSUS3_3_V6

VCCLAN3_3/VCCSUS3_3_E11 VCCLAN3_3/VCCSUS3_3_F10 VCCLAN3_3/VCCSUS3_3_F11

VCC3_3_AD13 VCC3_3_AD20

HETERO 3 OF 4

VCC3_3_B5 VCC3_3_F6

VCC3_3_G1 VCC3_3_G19 VCC3_3_G21

VCC3_3_H6

VCC3_3_K6

VCC3_3_L6 VCC3_3_M10 VCC3_3_N10

VCC3_3_P6 VCC3_3_R13 VCC3_3_V19 VCC3_3_W15 VCC3_3_W17 VCC3_3_W24

V5REF_SUS

V5REF_A8 V5REF_W14 VCCUSBPLL

+3.3V_AUX

B15AD10 E13 E14 E18 F16 F17 F18 K15 U6 V6

E11 F10 F11

B5 F6 G1 G19 G21 H6 K6 L6 M10 N10 P6 R13 V19 W15 W17 W24 AD13 AD20

E16 A8 W14 C24

+3.3V

+3.3V_AUX

3 1

D26

BAR43

V_5P0_REF_ICH

1 2

C638

.01uF 50V

+5V_AUX

21

R177

C66821C685

1 2

Hublink Straps

+1.5V

R270

R438

78.7-1%

43.2-1%

1 2

HI_VSWING_ICH

HI_VREF_ICH

24.3-1%

750-1%

2

NP*

MRGN_IHVS

1

1 3 4

TSM 2X2 SMT HDR

.01uF 50V

(804mv)

(353mv)

2 1

R208

NP01

2

21

C400

1uF 1K-1%

10V-10%

C627

1 2

0.1uF 16V

+3.3V

3 1

BAR43

D5

1uF

1 2

C639

0.1uF 16V

+5.0V Riser

R711

10V-10%

@ICH

R552

1 2

.01uF 50V

MRGN_IHVR

1 3 4

1K-1%

1 2

21

C66921C692

R538

49.9-1%

1 2

1 3 4

TSM 2X2 SMT HDR

+1.5V

0.1uF 16V

2 43

33

750-1%

NP*

12

NP01

R519

A10 A15 A17 A19 A21 A23 B13 B17 B19 B21 B23

C16 C18 C20 C22

D11 D16 D18 D20 D22 D24 E17 E19 E20 E21 E23

G20 G24

H19 H22

J21 J23

K11 K14 K20 K22 K24 L10 L11 L12 L13 L14 L15 L21 L23

A1 A7

C3 C8

D1 D6

F3 F9 G6

H1

J6

K3

M1

VSS_A1 VSS_A7 VSS_A10 VSS_A15 VSS_A17 VSS_A19 VSS_A21 VSS_A23 VSS_B13 VSS_B17 VSS_B19 VSS_B21 VSS_B23 VSS_C3 VSS_C8 VSS_C16 VSS_C18 VSS_C20 VSS_C22 VSS_D1 VSS_D6 VSS_D11 VSS_D16 VSS_D18 VSS_D20 VSS_D22 VSS_D24 VSS_E17 VSS_E19 VSS_E20 VSS_E21 VSS_E23 VSS_F3 VSS_F9 VSS_G6 VSS_G20 VSS_G24 VSS_H1 VSS_H19 VSS_H22 VSS_J6 VSS_J21 VSS_J23 VSS_K3 VSS_K11 VSS_K14 VSS_K20 VSS_K22 VSS_K24 VSS_L10 VSS_L11 VSS_L12 VSS_L13 VSS_L14 VSS_L15 VSS_L21 VSS_L23 VSS_M1

INTEL ICH5 REV. 0.73

HETERO 4 OF 4

UICH_IC

VSS_M5 VSS_M11 VSS_M12 VSS_M13 VSS_M14 VSS_M22 VSS_M24 VSS_N11 VSS_N12 VSS_N13 VSS_N14 VSS_N20

VSS_P1 VSS_P10 VSS_P11 VSS_P12 VSS_P13 VSS_P14 VSS_P15 VSS_P21 VSS_R11 VSS_R14

VSS_T3

VSS_T6 VSS_T23 VSS_U19

VSS_V1 VSS_V21 VSS_W16 VSS_W18

VSS_Y3

VSS_Y6

VSS_Y7

VSS_Y8 VSS_Y10 VSS_AA5 VSS_AA7 VSS_AA9

VSS_AA11 VSS_AA13 VSS_AA21 VSS_AA24

VSS_AB5 VSS_AB7 VSS_AB9

VSS_AB11 VSS_AB15 VSS_AB18

VSS_AC2 VSS_AC4 VSS_AC6 VSS_AC8

VSS_AC10 VSS_AC13 VSS_AC23

VSS_AD4 VSS_AD6 VSS_AD8

VSS_AD12 VSS_AD17 VSS_AD21

M5 M11 M12 M13 M14 M22 M24 N11 N12 N13 N14 N20 P1 P10 P11 P12 P13 P14 P15 P21 R11 R14 T3 T6 T23 U19 V1 V21 W16 W18 Y3 Y6 Y7 Y8 Y10 AA5 AA7 AA9 AA11 AA13 AA21 AA24 AB5 AB7 AB9 AB11 AB15 AB18 AC2 AC4 AC6 AC8 AC10 AC13 AC23 AD4 AD6 AD8 AD12 AD17 AD21

21

C695

1 2

C693

.01uF 50V

1 2

C1751

0.1uF 16V

x03b_sd

+1.5V

21

C672

+3.3V

C662

21

C78

D

1 2

C673

0.1uF 16V

21

1 2

C663

0.1uF 16V

+3.3V

21

C443

1 2

C459

0.1uF 16V

21

C674

0.1uF 16V

1 2

C66421C665

0.1uF 16V

1 2

C445

0.1uF 16V

1 2

C442

.01uF 50V

1-21-2004_9:57

1 2

C67521C676

0.1uF 16V

C666

0.1uF 16V

+3.3V_AUX

21

C453

0.1uF 16V

C45221C451

0.1uF 16V

1 2

VCCHI Decoupling

+1.5V

12

C449

C450

2 1

0.1uF 16V

1 2

C677

0.1uF 16V

21

C667

0.1uF 16V

21

C701

21

C703

21

C461

4.7uF

6.3V-10%

1

4.7uF

6.3V-10%

2

4.7uF

6.3V-10%

3

todo intel spec's say to leave nc

Unused SATA Straps

33 33 33 33

33

4

subsys done

SATA_1_RX+ SATA_1_RXSATA_2_RX+ SATA_2_RX-

SATA_RBIAS

PROPAGATION_DELAY=L:S::1000

21

R643

220

R646

1 2

220

21

R647

220

R648

R110

1 2

33,34,41,57

Reboot Strap

AC97_SYNC

33

R36

1K-5%

1 2

NP*

21

220

R649

1 2

EDS says to reserve pull-down

+3.3V

R510

1 2

2.7K-5%

ICH_SPKR

33,43

Res NP: TCO Timeout Reboot Res Stuff: No Reboot

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

Safe Mode Strap

+3.3V

R509

1 2

NP*

2.7K-5%

AC97_SDATA_OUT

Res Stuff: Safe Mode Res NP: No Safe Mode

33

BIOS TopSwap Strap

33

Res Stuff: BIOS TopSwap Res NP: No TopSwap

SOFT_SMI

R35

1K-5%

SMBUS - ISO / ICH5 - PWR

NP*

1 2

VBAT

180K-5%

ROOM=ICH

TITLE

LINDY PLANAR

DWG NO.

DATE

RTCRST_N

12

C267

0.1uF 16V

COMPUTER CORPORATION

AUSTIN,TEXAS

SHEET

34

4

REV.

X03D1660

34 OF 611/13/2004

DCBA

B D

CA

1-21-2004_9:57

1

BIOS I2C Bus Segmentation

Segment Address Device

00 C0h PXH (Riser) 00 C4h PXH (Planar) 00 60h MCH

01 A0 DIMM1_B 01 A2 DIMM1_A

2

01 A4 DIMM2_B 01 A6 DIMM2_A 01 A8 DIMM3_B 01 AA DIMM3_A

10 D2 CK409 (Clock) 10 DC DB800 (Clock Buffer)

+3.3V_AUX

R335

1 2

R338

8.2K-5%

1 2

8.2K-5%

Com1

U29

28

C1+

24

C1-

1

C2+

2

C2-

14

T1IN

13

T2IN

12

T3IN

19

R1OUT

18

R2OUT

17

R3OUT

16

R4OUT

15

R5OUT

20

R2OUTB

FORCEON FORCEOFF

MAX3243

INVALID

23 22

VCC

T1OUT T2OUT T3OUT

R1IN R2IN R3IN R4IN R5IN

GND

26 27

V+

3

V-

9 10 11

4 5 6 7 8

21

25

+3.3V_AUX

SOUTA

DTRA RTSA

DCDA

RIA SINA DSRA CTSA

NC_INVALID_A

35 35 35

35 35 35 35 35

48 48 48

48

48 48 48 48

0.1uF 16V 1 2

C186

10V-10%

1uF

C320

21

SER_SOUTA SER_DTRA_N SER_RTSA_N

SER_DCDA_N

NC_U29_18 SER_SINA SER_DSRA_N SER_CTSA_N SER_RIA_N

I/O SUPPORT BRACKET

IO_BRACKET

1 2 3 4 5

GND

6 7 8

BRACKET

IO CONN SUPPORT

NP13

x00_sd_061703 X00_GT_060203

10V-10%

1uF

1 2

C319

10V-10%

1uF

C318

10V-10%

1uF

21

ROOM=COMMPORT

C317

21

Subbed to zero ohm

50V-10%

470pF

C1007

C1012

21

50V-10%

x03_sd subbed to 0ohm

50V-10%

470pF

C1013

1 2

50V-10%

C1011

470pF

21

DCDA

35

DSRA

35

SINA

35

RTSA

35

SOUTA

35

CTSA

35

DTRA

35

RIA

35

470pF

C1008

1 2

50V-10%

470pF

50V-10%

470pF

C1009

1 2

C1010

21

50V-10%

470pF

1 2

50V-10%

ROOM=COMMPORT

21

C1014

L82

1 2

200mA

SUB*_30661

L81

1 2

200mA

SUB*_30661

L80

1 2

200mA

SUB*_30661

L79

1 2

200mA

SUB*_30661

L78

1 2

200mA

SUB*_30661

L77

1 2

200mA

SUB*_30661

L76

1 2

200mA

SUB*_30661

L75

1 2

200mA

SUB*_30661

JACKSCREWS

ADD1=ADD02_01157_SERIAL2 ADD2=ADD02_01157_SERIAL3 ADD3=ADD02_01157_SERIAL4 ADD4=ADD02_01157_SERIAL5

DCDA_L

DSRA_L

SINA_L

RTSA_L

SOUTA_L

CTSA_L

DTRA_L

RIA_L

35

35 35 35 35

35 35 35 35 35 35 35 35

NC_SERIAL_10_1U NC_SERIAL_11_1U

DCDA_L SINA_L SOUTA_L DTRA_L

DSRA_L RTSA_L CTSA_L RIA_L

DCDA_L DSRA_L SINA_L RTSA_L SOUTA_L CTSA_L DTRA_L RIA_L

X00_GT_061203

X02_TJ_081803

SERIAL_CONN

1 2 3 4 5 6 7 8 9

RTM

DSUB

SCREW LOCK

SUB=NP02

SERIAL_CONN_1U

1

6

2

7

3

8

4

9

5

10

NC1

11

NC2

12

G1

13

G2

14

G3

15

G4

DSUB

SUB02_4U288 NP13

X00_tj_061603

1

2

SERIAL PORT CONNECTOR

4.7K

+5.0V Riser

.01uF 50V

C805

1 2

.01uF 50V

MSE_CLK

MSE_DATA

KB_CLK

KB_DATA

x02_tj_090303

KBVCC

16V 10%

C806

21

L66

1 2

FERRITE

1812-1.5A

40

ROOM=KYBD

FS3

16V 10%

C1802

1 2

10uF

C808

21

x02_sd_swapped kb and mse

1.5A 6V

RN26

123

21

678

8.2K

4 5

KYB_FVCC

SUB*_99477

L73

1 2

200mA

L74

1 2

200mA

SUB*_99477

SUB TO 120 OHM 200mA 603 FERRITE

SUB*_99477

L72

1 2

200mA

L71

1 2

200mA

SUB*_99477

C827

21

330pF 50V

C824

C826

1 2

330pF 50V

21

330pF 50V

C825

.01uF 50V

MSECLK_CONN

MSEDATA_CONN

KBCLK_CONN

KBDATA_CONN

50V-10%

1 2

330pF 50V

21

470pF

C801

1 2

C1015

.01uF 50V

C807

1 2

1M-5%

R699

21

.01uF 50V

1 2

PLACE 470 PF CAPS BY CONN PINS FOR EMI

KEYBOARD/MOUSE REAR CONNECTORS

SERIAL, KYBD, MOUSE, I2C MUX

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

PROPAGATION_RULE=L:S::1000

50V-10%

C802

PROPAGATION_RULE=L:S::1000

C1016

470pF

21

R726

1 2

0-5%

NC_PSU_1_8 NC_PSU_1_2

NC_PSU_2_8 NC_PSU_2_2

.01uF 50V

C803

1 2

MOUSE

5 8 2

1 6 3

MINI-DIN KMDR-6S-BS-3.20

6 POS. RT. RCPT.

KYBD

5 8 2

1 6 3

MINI-DIN KMDR-6S-BS-3.20

6 POS. RT. RCPT.

.01uF 50V

C804

21

MATING FACE

5

NC

2

DAT

1

3

MATING FACE

5

NC

2

DAT

1

3

DDC_VCC

+5V

GND

+5V

GND

REFDES=PSU_1 / PSU_2

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

38

NC

8

CLK

6

NC

8

CLK

6

COMPUTER CORPORATION AUSTIN,TEXAS

SHEET

35 OF 611/13/2004

REV.

X03

11 A4 Dobson 11 A8 ROMB Key 11 AE ROMB DIMM

4.7K

x03_tj_010904

4.7K

33,35

33

+3.3V_AUX

R6009

220

x03_tj_010904

R6010

1 2

220

21

1

R352

2

59

8.2K-5%

59

R445

NP*

0-5%

1 2

ICH_SMLINK1_SDA

x03b_tj_011904

ICH_VAUX_SCL_U5

ICH_VAUX_SDA_U5

1 2

C43621C435

ICH_VAUX_SDA

100pF 50V

NP*

7

9

100pF 50V

NP*

SUB=SUB*_7X498

33,35

33

YA

YB

U5

5C3253 QSOP16

17,27,31,35

20,21,35

3,4,35

31,35,41

17,27,31,35

20,21,35

3,4,35

31,35,41

16

VCC

6

IA0 IA1 IA2 IA3

IB0 IB1 IB2 IB3

14

S0

2

S1

1

EA

15

EB

7X498 = 3.3V BUS SWITCH

5 4 3

10 11 12 13

5,24,41

220

NP*

ICH_SEG0_SCL ICH_SEG1_SCL ICH_SEG2_SCL ICH_SEG3_SCL

ICH_SEG0_SDA ICH_SEG1_SDA ICH_SEG2_SDA ICH_SEG3_SDA

ICH_SEG0_SCL ICH_SEG1_SCL ICH_SEG2_SCL ICH_SEG3_SCL

ICH_SEG0_SDA ICH_SEG1_SDA ICH_SEG2_SDA ICH_SEG3_SDA

R82

21

SYSTEM_PWRGOOD_FETS

+3.3V

R45821R459

4.7K

1 2

2.2K-5%

0.1uF 16V

GPO_I2C_MUX_SEL0 GPO_I2C_MUX_SEL1

17,27,31,35 20,21,35 3,4,35 31,35,41

R6221R61

1 2

2.2K-5%

sd_x00_051803 - value change

21

R461

1 2

C34

R464

4.7K 1 2

+3.3V_AUX

C33

Q72

2N7002

4.7K

2 1

0.1uF 16V

1

G

21

R465

D

S

21

R469

R468

R467

4.7K

1 2

+3.3V_AUX

R96

33

1 2

33

3

2

8.2K-5%

+3.3V_AUX

1

R340

2

8.2K-5%

3

4 4

21

R444

33,35

subsys done

NP*

0-5%

ICH_SMLINK0_SCL

ICH_VAUX_SCL

ICH_VAUX_SDA

ICH_VAUX_SCL

+3.3V_AUX

x03_tj_010904

R435

1 2

+3.3V_AUX

21

R436

A B

3

A B C

R1205

31,33,36,50,58

1

31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58

+12V

L132

2

BLM18BD601SN1

21

16V-10%

4.7uF

12

+12V_VIDEO

16V-10%

4.7uF

C1734

C1735

2 1

0.1uF 16V C1736

1 2

0.1uF 16V C1737

21

+3.3V

1 2

4.75K-1%4.75K-1%

1 2

1 G

Q23

Q22

4

DISL9N312AD3ST

3

S

4

DISL9N312AD3ST

3

S

SUB*_K0986

R581

330-5%

1 2

C252

0.1uF 16V0.1uF 16V

x02_tj_090303

1 2

C431

x02_tj_090303

+2.5V Video

C74612C749

2 1

22uF 6.3V

+1.8V Video

12

C748

C747

2 1

22uF 6.3V

21

R1888

22uF 6.3V

330-5%

220

R512

2 1

V_2P5_REF

1K-1%

R1886

21

C745

2200pf

50V-10%

53

TLV431A

D8

4

1 2

21

R1887

1K-1%

R329

1 2

47K-5%

VR_2P5_FB

3

21

R569

R365

1 2

50V-10%

1K-1%

VR_1P8_REF

2.49K-1%

R1889

1 2

C1787

47K-5%

2200pf

1 2

VR_1P8_FB

4

3

2

R601

0-5%

5

6

R600

0-5%

U26

LM358M

8

+

V G

-

4

21

8

+

V G

-

4

1

C587 1 2

2200pf

50V-10%

U26

LM358M

7

VR_2P5_GATE_R

1 2

C753

VR_1P8_GATE_R

2200pf

50V-10%

R599

1K-1%

R576

0-5%

R571

1K-1%

21

R577

1 2

0-5%

VR_2P5_GATE

21

C752

1 2

2200pf

50V-10%

VR_1P8_GATE

R579

R580

C586

21

2200pf

50V-10%

21

C754

2200pf

50V-10%

R598

1 2

1K-1%

R570

1 2

1K-1%

C751

21

2200pf

50V-10%

31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58

31,33,36,50,58

31,33,50,58 31,33,50,58

40,44,46

PCI0_AD29

PCI0_AD0 PCI0_AD1 PCI0_AD2 PCI0_AD3 PCI0_AD4 PCI0_AD5 PCI0_AD6 PCI0_AD7 PCI0_AD8 PCI0_AD9 PCI0_AD10 PCI0_AD11 PCI0_AD12 PCI0_AD13 PCI0_AD14 PCI0_AD15 PCI0_AD16 PCI0_AD17 PCI0_AD18 PCI0_AD19 PCI0_AD20 PCI0_AD21 PCI0_AD22 PCI0_AD23 PCI0_AD24 PCI0_AD25 PCI0_AD26 PCI0_AD27 PCI0_AD28 PCI0_AD29 PCI0_AD30 PCI0_AD31

NC_AGP_ST0 NC_AGP_ST1 NC_AGP_ST2

CK_33M_VIDEO

3

PCI0_GNT_VIDEO_N

33

PCI_RST_PLANAR_2_N

ROOM=RADEON

D24 C26 D25 D26 E23 E25 E24 E26 F26 G23 G25 G24 G26 H24 H26 H25 L23 L26 L24 M26 M24 N25 M25 N26 P23 P26 P24 R25 R24 R26 T23 T25

Y26 Y23 Y25

AA26

Y24

AA23

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

ST0 ST1 ST2

PCICLK

GNT RST

SBA7/IDSEL

PCI INTERFACE

AGP_BUSY

STP_AGP

AD_STB_0 AD_STB_1

AGPTEST

SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6

C/BE0 C/BE1 C/BE2 C/BE3

AD_ST0 AD_ST1

PAR

REQ INTR IRDY

SB_STB

STOP TRDY

FRAME

DEVSEL

RFB

SB_STB

AGPREF

SERR

W25

NC_AGP_SBA0

V24

NC_AGP_SBA1

V26

NC_AGP_SBA2

V23

NC_AGP_SBA3

U26

NC_AGP_SBA4

U24

NC_AGP_SBA5

T26

NC_AGP_SBA6

T24

VGA_IDSEL

F23

PCI0_CBE0_N

J25

PCI0_CBE1_N

L25

PCI0_CBE2_N

N23

PCI0_CBE3_N

F25

NC_AGP_AD_ST0

P25

NC_AGP_AD_ST1

J23

PCI0_PAR

AA25 AA24

ICH_PIRQ_VIDEO_N

K26

PCI0_IRDY_N

V25

NC_AGP_SB_STB

J24

PCI0_STOP_N

K24

PCI0_TRDY_N

K25

PCI0_FRAME_N

J26

PCI0_DEVSEL_N

W26 AB26 AB25

U25

NC_ATI_M6C8_AGP_SB_STB_N

F24

NC_ATI_M6C8_AGP_AD_STB0_N

N24

NC_ATI_M6C8_AGP_AD_STB1_N

B26

ATI_M6C8_AGP_AGPREF

C25

ATI_M6C8_AGP_AGPTEST

W24

SERIES GRAPHICS CONTROLLER

RADEON 7000M

Hetero 1 of 5

VIDEO

SUB*_T1839

VIDEO_SERR_N

36

PCI0_REQ_VIDEO_N

NC_ATI_M6C8_AGP_RFB_N NC_ATI_M6C8_AGP_AGP_BUSY_N NC_ATI_M6C8_AGP_STP_AGP_N

VIDEO_SERR_N

1 2

+3.3V

8.2K-5% R1612

21

150-5%

PROPAGATION_DELAY=L:S::1000

31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58

31,33,50,58

33 33 31,33,50,58

31,33,50,58 31,33,50,58 31,33,50,58 31,33,50,58

36

47-5%

NP*

TITLE

VIDEO

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

DWG NO.

DATE

D

New compared to RAGE-XL

1 2

R1555

0-5%

R450

12

COMPUTER CORPORATION

AUSTIN,TEXAS

LINDY PLANAR

SHEET

1

2

3

4

REV.

X03D1660

36 OF 611/13/2004

DCBA

A B C

1 2

330-5% 330-5% 330-5% 330-5%

ATI_M6C8_TX0M

37,50

ATI_M6C8_TX0P

37,50

ATI_M6C8_TX1M

37,50

ATI_M6C8_TX1P

1

37,50

ATI_M6C8_TX2M ATI_M6C8_TX2P

ATI_M6C8_TXCM ATI_M6C8_TXCP

R1666

R1667

21

R1668

21

1 2

R1669

2

+3.3V

3

1

NC_X4_1

C531

1 2

0.1uF 16V

x02_tj_081803

4

EN

NP*

ATI_M6C8_XTALOUT pin is No Connect when Oscillator is used

C688

21

22pF 50V

C689

21

22pF 50V

OSCILLATOR

X4

27.0000MHz

4

3.3V

VCC

3

OUT

GND

2

R574

1M-5%

1 2

SUB*_C1896

Subbed to 27MHz

R154

121-1%

NP*

OR

CRYSTAL

X2

1 2

21

x00_sd_051703

NP*

ATI_M6C8_XTALIN

21

R156

PROPAGATION_DELAY=L:S::825

ATI_M6C8_XTALOUT

25MHz-30ppm

PROPAGATION_DELAY=L:S::825

NP*

150-1%

todo not the correct cyrstal

ATI_M6C8_XTALIN

NP DEFAULT

NP

VIDEO

NC_ATI_M6C8_ZV_LCDDATA0 NC_ATI_M6C8_ZV_LCDDATA1 NC_ATI_M6C8_ZV_LCDDATA2 NC_ATI_M6C8_ZV_LCDDATA3 NC_ATI_M6C8_ZV_LCDDATA4 NC_ATI_M6C8_ZV_LCDDATA5 NC_ATI_M6C8_ZV_LCDDATA6 NC_ATI_M6C8_ZV_LCDDATA7 NC_ATI_M6C8_ZV_LCDDATA8 NC_ATI_M6C8_ZV_LCDDATA9 NC_ATI_M6C8_ZV_LCDDATA10 NC_ATI_M6C8_ZV_LCDDATA11 NC_ATI_M6C8_ZV_LCDDATA12 NC_ATI_M6C8_ZV_LCDDATA13 NC_ATI_M6C8_ZV_LCDDATA14 NC_ATI_M6C8_ZV_LCDDATA15 NC_ATI_M6C8_ZV_LCDDATA16 NC_ATI_M6C8_ZV_LCDDATA17 NC_ATI_M6C8_ZV_LCDDATA18 NC_ATI_M6C8_ZV_LCDDATA19 NC_ATI_M6C8_ZV_LCDDATA20 NC_ATI_M6C8_ZV_LCDDATA21 NC_ATI_M6C8_ZV_LCDDATA22 NC_ATI_M6C8_ZV_LCDDATA23 NC_ATI_M6C8_ZV_LCDCNTL0 NC_ATI_M6C8_ZV_LCDCNTL1 NC_ATI_M6C8_ZV_LCDCNTL2 NC_ATI_M6C8_ZV_LCDCNTL3

NC_ATI_M6C8_TXOUT_L0N NC_ATI_M6C8_TXOUT_LOP NC_ATI_M6C8_TXOUT_L1N NC_ATI_M6C8_TXOUT_L1P NC_ATI_M6C8_TXOUT_L2N NC_ATI_M6C8_TXOUT_L2P NC_ATI_M6C8_TXCLK_LN NC_ATI_M6C8_TXCLK_LP NC_ATI_M6C8_TXOUT_L3N NC_ATI_M6C8_TXOUT_L3P NC_ATI_M6C8_TXOUT_U0N NC_ATI_M6C8_TXOUT_U0P NC_ATI_M6C8_TXOUT_U1N NC_ATI_M6C8_TXOUT_U1P NC_ATI_M6C8_TXOUT_U2N NC_ATI_M6C8_TXOUT_U2P NC_ATI_M6C8_TXOUT_UN NC_ATI_M6C8_TXOUT_UP NC_ATI_M6C8_TXOUT_U3N NC_ATI_M6C8_TXOUT_U3P

NC_ATI_M6C8_LTGIO0 NC_ATI_M6C8_LTGIO1

37

NC_ATI_M6C8_LTGIO2

NC_ATI_M6C8_DIGON NC_ATI_M6C8_BLON_N

NC_ATI_M6C8_SSIN NC_ATI_M6C8_SSOUT

ATI_M6C8_XTALIN

37

ATI_M6C8_XTALOUT

37

R48

1K-5%

1 2

AA4

ZV_LCDDATA_0

AB1

ZV_LCDDATA_1

AB2

ZV_LCDDATA_2

AB3

ZV_LCDDATA_3

AB4

ZV_LCDDATA_4

AC1

ZV_LCDDATA_5

AC2

ZV_LCDDATA_6

AC3

ZV_LCDDATA_7

AD1

ZV_LCDDATA_8

AD2

ZV_LCDDATA_9

AD3

ZV_LCDDATA_10

AE1

ZV_LCDDATA_11

AE2

ZV_LCDDATA_12

AF1

ZV_LCDDATA_13

AF2

ZV_LCDDATA_14

AF3

ZV_LCDDATA_15

AE3

ZV_LCDDATA_16

AF4

ZV_LCDDATA_17

AE4

ZV_LCDDATA_18

AD4

ZV_LCDDATA_19

AF5

ZV_LCDDATA_20

AE5

ZV_LCDDATA_21

AD5

ZV_LCDDATA_22

AC5

ZV_LCDDATA_23

Y4 AA1 AA2 AA3

AC8 AD8 AC9 AD9 AE8 AF8 AE9 AF9

AC10 AD10 AD11 AC11 AE11 AF11 AD12 AC12 AE12 AF12 AD13 AE13

AD7 AD6 AC7

AB10

AB9

AE6 AE7

AF25 AF26

AC6

ZV_LCDCNTL_0 ZV_LCDCNTL_1 ZV_LCDCNTL_2 ZV_LCDCNTL_3

NC_TXOUT_L0N NC_TXOUT_L0P NC_TXOUT_L1N NC_TXOUT_L1P NC_TXOUT_L2N NC_TXOUT_L2P NC_TXCLK_LN NC_TXCLK_LP NC_TXOUT_L3N NC_TXOUT_L3P NC_TXOUT_U0N NC_TXOUT_U0P NC_TXOUT_U1N NC_TXOUT_U1P NC_TXOUT_U2N NC_TXOUT_U2P NC_TXCLK_UN NC_TXCLK_UP NC_TXOUT_U3N NC_TXOUT_U3P

LTGIO_0 LTGIO_1 LTGIO_2

DIGON BLON

SSIN SSOUT

XTALIN XTALOUT

TESTEN

OUTPUT INTERFACES

VGADDCDATA

VGADDCCLK

STEREOSYNC

DVIDDCCLK

DVIDDCDATA

CRT2DDCCLK CRT2DDCDAT

SERIES GRAPHICS CONTROLLER

RADEON 7000M

Hetero 2 of 5

SUB*_T1839

37

RADEON REFDES = VIDEO

GPIO_13 GPIO_12 GPIO_11 GPIO_10

GPIO_9 GPIO_8 GPIO_7 GPIO_6 GPIO_5 GPIO_4 GPIO_3 GPIO_2 GPIO_1 GPIO_0

HSYNC VSYNC

RSET

MONID_0 MONID_1

AUXWIN

TX0M TX0P TX1M TX1P TX2M TX2P TXCM TXCP

HPD

R2SET

C_R

Y_G COMP_B H2SYNC V2SYNC

T3 T4 U1 U2 U3 V1 V2 V3 V4 W1 W2 W3 Y1 Y2

AF24

R

AF23

G

AF22

B

AE24 AE23

AE22

AD24 AD25

AC26 AC25

AE25 AC22

AE19 AF19 AE20 AF20 AE21 AF21 AE18 AF18

AD20 AC20

AD21

AE16 AF16

VID_RED_FRONT

AF15

VID_GREEN_FRONT

AF14

VID_BLUE_FRONT VID_HS_FRONT

AE14 AF13

VID_VS_FRONT

AF6

VID_DDC_SCLK_FRONT

AF7

VID_DDC_SDA_FRONT

ATI_M6C8_GPIO13 ATI_M6C8_GPIO12 ATI_M6C8_GPIO11 NC_ATI_M6C8_GPIO10 NC_ATI_M6C8_GPIO9 ATI_M6C8_GPIO8 ATI_M6C8_GPIO7 ATI_M6C8_GPIO6 ATI_M6C8_GPIO5 ATI_M6C8_GPIO4 ATI_M6C8_GPIO3 ATI_M6C8_GPIO2 ATI_M6C8_GPIO1 ATI_M6C8_GPIO0

ATI_M6C8_RED ATI_M6C8_GREEN ATI_M6C8_BLUE ATI_M6C8_HSYNC ATI_M6C8_VSYNC

ATI_M6C8_RSET

NC_ATI_M6C8_MONID0 NC_ATI_M6C8_MONID1

ATI_M6C8_VGADDCDATA ATI_M6C8_VGADDCCLK

ATI_M6C8_STEREOSYNC NC_ATI_M6C8_AUXWIN

ATI_M6C8_TX0M ATI_M6C8_TX0P ATI_M6C8_TX1M ATI_M6C8_TX1P ATI_M6C8_TX2M ATI_M6C8_TX2P ATI_M6C8_TXCM ATI_M6C8_TXCP

ATI_M6C8_DVIDDCCLK ATI_M6C8_DVIDDCDATA

NC_ATI_M6C8_HPD

ATI_M6C8_R2SET

VID_RED_FRONT

32,37

VID_GREEN_FRONT

32,37

VID_BLUE_FRONT

32,37

37 37 37

37 37 37 37 37 37 37 37 37

38 38 38 38 38

R1252

1 2

PROPAGATION_DELAY=L:S::500

499-1%

37,50 37,50 37,50 37,50 37,50 37,50 37,50 37,50

R1285

1 2

75-1%

R1288

845-1%

75-1%

R1289

32,37 32,37 32,37 38

PROPAGATION_DELAY=L:S::500

38

38 38

21

38 38

37

4.7K

1 2

R1290

2 1

R1707

+3.3V

4.7K

2 1

R1706

50 50

GPIO6 GPIO4 10K

10K NP

NP

10K

NP

ATI_M6C8_STEREOSYNC

37

ATI_M6C8_GPIO12

37

ATI_M6C8_GPIO11

37

ATI_M6C8_GPIO8

37

ATI_M6C8_GPIO7

37

ATI_M6C8_GPIO6

37

ATI_M6C8_GPIO5

37

ATI_M6C8_GPIO4

37

ATI_M6C8_GPIO3

37

ATI_M6C8_GPIO2

37

ATI_M6C8_GPIO1

37

ATI_M6C8_GPIO0

37

ATI_M6C8_GPIO13

37

VIDEO

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

OPTION STRAPS

GPIO0GPIO1

NP

GPIO2GPIO3

NP

GPIO5

VGA

ENABLE

(Default)

DISABLE

GPIO12

NP NP

AGP1X Clock Feedback

Phase Adjustment

AGP Clk Phase Adjust.

between X1 and X2 Clk

DEFAULT

10KNP

33 MHz 3.3V PCI

NP 66 MHz 3.3V PCI per Pravind

GPIO8GPIO7

NP NORMAL OP.

10K SHUTDOWN

GPIO11GPIO13

ROM IDENTIFIER

+3.3V

R1263

NP

1 2

8.2K-5% R1265

NP

1 2

8.2K-5% R1266

NP

21

8.2K-5% R1267

NP

1 2

8.2K-5% R1268

NP

21

8.2K-5% R1275

12

8.2K-5% R1273

NP

12

8.2K-5% R1274

2 1

8.2K-5% R1272

NP

2 1

8.2K-5% R1271

NP

12

8.2K-5% R1270

NP

2 1

8.2K-5% R1269

NP

12

8.2K-5%

R4524

NP

21

27K

TITLE

DWG NO.

DATE

D

BUS_TYPE

ID DESABLE

No ROM

x02_sd_added alternate strappings

R4512

21

27K

R4513

1 2

27K

R4514

21

27K

R4515

1 2

27K

R4516

21

27K

R4517

NP

1 2

27K

R4518

21

27K

R4519

NP

1 2

27K

R4520

21

27K

R4521

1 2

27K

R4522

21

27K

R4523

1 2

27K

R1264

21

8.2K-5%

COMPUTER CORPORATION

AUSTIN,TEXAS

LINDY PLANAR

SHEET

* Please see Radeon M6 specs for other strapping configurations

1

2

3

4

REV.

X03D1660

37 OF 611/13/2004

DCBA

A B C

D

PRIMARY CRT

ROOM=VIDEO_CONN

1

68nH 300mA

1 2

2.2pF

50V-5%

1 2

2.2pF

50V-5%

1 2

2.2pF

50V-5%

L8

1 2

200mA

L7

1 2

200mA

x02_sd

+3.3V

L15

L14

68nH 300mA

L13

68nH 300mA

35,38

21

4.7K4.7K

R1287

R1286

1 2

L10

300mA

PROPAGATION_RULE=L:S::1000

1 2

R11

L11

300mA

PROPAGATION_RULE=L:S::1000

1 2

R10

21

C332

21

C330

+3.3V

12

C1310

x02_tj_090303

PROPAGATION_DELAY=L:S::1000

L124

1 2

FERRITE

1206

0.1uF 16V

ATI_M6C8_RED

37

P3V3_VIDEO_SYNC

ATI_M6C8_GREEN

37

75-1%

22uF 6.3V

C188

12

0.1uF 16V

C670

21

C189

1 2

0.1uF 16V

ATI_M6C8_BLUE

37

75-1%75-1%

L12

300mA

PROPAGATION_RULE=L:S::1000

1 2

R9

21

C331

2

U1 74VHC125

ATI_M6C8_HSYNC

37

PROPAGATION_DELAY=L:S::1450

ATI_M6C8_VSYNC

37

PROPAGATION_DELAY=L:S::1450

37

PROPAGATION_DELAY=L:S::1000

VID_HS_FRONT

SUB*_27KDT

Subbed to LCX

SUB*_27KDT Subbed to LCX

3

37

PROPAGATION_DELAY=L:S::1000

SUB*_27KDT Subbed to LCX

PROPAGATION_DELAY=L:S::500

2143

1

SUB*_27KDT Subbed to LCX

U1 74VHC125

14

PROPAGATION_DELAY=L:S::500

6

5

4

U1 74VHC125

9148

PROPAGATION_DELAY=L:S::500

10

U1 74VHC125

14

11

12

13

PROPAGATION_DELAY=L:S::500VID_VS_FRONT

1 2

1K-5%

+5.0V Riser

R1145

x03b_sd

12

330pF 50V

2 1

R1144

4.7K4.7K

+3.3V

VID_DDC_SCLK_FRONT

37

4

VID_DDC_SDA_FRONT

37

2 1

C169

+3.3V

R1301

1 2

+3.3V

21

R1302

4.7K

2N7002

Q59

G

1

pull-ups on control panel

S 2

D 3

2N7002

Q60

G

1

pull-ups on control panel

D 3

VID_DDC_OUT_SCLK_FRONT

VID_DDC_OUT_SDA_FRONT

PROPAGATION_DELAY=L:S::10000

R145

1 2

33-5%

50V-5%

PROPAGATION_DELAY=L:S::10000

R146

1 2

33-5%

50V-5%

R1292

33-5% R1291

1 2

33-5%

+5.0V Riser

R1300

+3.3V

37

2 1

4.7K 4.7K

12

ATI_M6C8_VGADDCDATA

ATI_M6C8_VGADDCCLK

NP

47pF

C246

21

NP

1 2

47pF

C596

VID_HS_OUT_FRONT

21

VID_VS_OUT_FRONT

R1147

x03b_sd

330pF 50V

R1146

C170

12

32

35,38

50V-5%

47pF

50V-5%

47pF

DDC_VCC

21

PROPAGATION_DELAY=L:S::1000

C245

21

PROPAGATION_DELAY=L:S::1000

1 2

C597

32

2N7002

Q58

G

1

S 2

2N7002

Q57

G

1

S 2

D 3

.01uF 50V

1 2

38

R1255

1 2

21

R1256

2.2K-5%

R_OUT G_OUT B_OUT

C1311

2.2K-5%

DDC_DATA

DDC_SCLK

A26 B25 A25 A24 B23 A23 C22 B22 C21 B21 A21 D20 C20 B20 A20 C19 B18 A18 C17 B17 A17 D16 C16 B16 B15 A15 D14 C14 B14 A14 D13 C13

B1 C1 C2 D1 D2 E1 E2 F1 G2 G3 H1 H2 H3 J1 J2 J3 L1 L2 L3 L4 M1 M2 M3 N1 N4 P1 P2 P3 P4 R1 R2 R3

SERIES GRAPHICS CONTROLLER

todo ask pravind, i'm not sure this is sufficiently strong

PROPAGATION_RULE=L:S::1000

PROPAGATION_DELAY=L:S::1000

38

R1254

100-5%

1 2

R1253

100-5%

1 2

38

NC_VGA4

NC_VGA11

DDC_OUT_SDA

HS_OUT VS_OUT

DDC_OUT_SCLK

R_OUT

38

G_OUT

38

B_OUT

38

NC_VGA4_1U

38

DDC_VCC

35,38

NC_VGA11_1U DDC_OUT_SDA

38

HS_OUT

38

VS_OUT

38

DDC_OUT_SCLK

38

X02_TJ_081803

38

NC_VGA1_16 NC_VGA1_17

VGA_CONN

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15

DDC

DSUB_VGA

SCREW LOCK

NP02

X00_GT_061203

VGA_CONN_1U

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

NC1

17

NC2

18

G1

19

G2

20

G3

21

G4

DSUB

SUB02_6U084 NP13

X00_tj_061603

NC_ATI_M6_DQ0 NC_ATI_M6_DQ1 NC_ATI_M6_DQ2 NC_ATI_M6_DQ3 NC_ATI_M6_DQ4 NC_ATI_M6_DQ5 NC_ATI_M6_DQ6 NC_ATI_M6_DQ7 NC_ATI_M6_DQ8 NC_ATI_M6_DQ9 NC_ATI_M6_DQ10 NC_ATI_M6_DQ11 NC_ATI_M6_DQ12 NC_ATI_M6_DQ13 NC_ATI_M6_DQ14 NC_ATI_M6_DQ15 NC_ATI_M6_DQ16 NC_ATI_M6_DQ17 NC_ATI_M6_DQ18 NC_ATI_M6_DQ19 NC_ATI_M6_DQ20 NC_ATI_M6_DQ21 NC_ATI_M6_DQ22 NC_ATI_M6_DQ23 NC_ATI_M6_DQ24 NC_ATI_M6_DQ25 NC_ATI_M6_DQ26 NC_ATI_M6_DQ27 NC_ATI_M6_DQ28 NC_ATI_M6_DQ29 NC_ATI_M6_DQ30 NC_ATI_M6_DQ31 NC_ATI_M6_DQ32 NC_ATI_M6_DQ33 NC_ATI_M6_DQ34 NC_ATI_M6_DQ35 NC_ATI_M6_DQ36 NC_ATI_M6_DQ37 NC_ATI_M6_DQ38 NC_ATI_M6_DQ39 NC_ATI_M6_DQ40 NC_ATI_M6_DQ41 NC_ATI_M6_DQ42 NC_ATI_M6_DQ43 NC_ATI_M6_DQ44 NC_ATI_M6_DQ45 NC_ATI_M6_DQ46 NC_ATI_M6_DQ47 NC_ATI_M6_DQ48 NC_ATI_M6_DQ49 NC_ATI_M6_DQ50 NC_ATI_M6_DQ51 NC_ATI_M6_DQ52 NC_ATI_M6_DQ53 NC_ATI_M6_DQ54 NC_ATI_M6_DQ55 NC_ATI_M6_DQ56 NC_ATI_M6_DQ57 NC_ATI_M6_DQ58 NC_ATI_M6_DQ59 NC_ATI_M6_DQ60 NC_ATI_M6_DQ61 NC_ATI_M6_DQ62 NC_ATI_M6_DQ63

VIDEO

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

DQ_0 DQ_1 DQ_2 DQ_3 DQ_4 DQ_5 DQ_6 DQ_7 DQ_8 DQ_9 DQ_10 DQ_11 DQ_12 DQ_13 DQ_14 DQ_15 DQ_16 DQ_17 DQ_18 DQ_19 DQ_20 DQ_21 DQ_22 DQ_23 DQ_24 DQ_25 DQ_26 DQ_27 DQ_28 DQ_29 DQ_30 DQ_31 DQ_32 DQ_33 DQ_34 DQ_35 DQ_36 DQ_37 DQ_38 DQ_39 DQ_40 DQ_41 DQ_42 DQ_43 DQ_44 DQ_45 DQ_46 DQ_47 DQ_48 DQ_49 DQ_50 DQ_51 DQ_52 DQ_53 DQ_54 DQ_55 DQ_56 DQ_57 DQ_58 DQ_59 DQ_60 DQ_61 DQ_62 DQ_63

VIDEO

MEMORY INTERFACE

RADEON 7000M

Hetero 3 of 5

SUB*_T1839

A_0 A_1 A_2 A_3 A_4 A_5 A_6 A_7 A_8

A_9 A_10 A_11 A_12 A_13

DQM_0 DQM_1 DQM_2 DQM_3 DQM_4 DQM_5 DQM_6 DQM_7

QS_0 QS_1 QS_2 QS_3 QS_4 QS_5 QS_6 QS_7

RAS

CAS

CS_0

CS_1

CKE

ROMCS

CLK0

CLK0_IN

CLK0

CLK0_IN

CLK1

CLK1_IN

CLK1

CLK1_IN

CLKFB

VREF

MEMVMODE

B13 A13 C12 B12 A12 D11 C11 B11 A11 C10 B10 A10 D9 C9

A22 D21 A16 C15 F2 G1 N2 N3

A19 B19 D18 C18 J4 K1 K2 K3

A9

C8

D8

WE

B9

B8

A8

Y3

A6 A7

B6 B7

A4 A5

B4 B5

B3

T2 T1

ATI_MEM_CLK_R

ATI_MEM_CLK_N_R

NC_ATI_M6_MA0 NC_ATI_M6_MA1 NC_ATI_M6_MA2 NC_ATI_M6_MA3 NC_ATI_M6_MA4 NC_ATI_M6_MA5 NC_ATI_M6_MA6 NC_ATI_M6_MA7 NC_ATI_M6_MA8 NC_ATI_M6_MA9 NC_ATI_M6_MA10 NC_ATI_M6_MA11 NC_ATI_M6_MA12 NC_ATI_M6_MA13

NC_ATI_M6_DQM0_N NC_ATI_M6_DQM1_N NC_ATI_M6_DQM2_N NC_ATI_M6_DQM3_N NC_ATI_M6_DQM4_N NC_ATI_M6_DQM5_N NC_ATI_M6_DQM6_N NC_ATI_M6_DQM7_N

NC_ATI_M6_QS0 NC_ATI_M6_QS1 NC_ATI_M6_QS2 NC_ATI_M6_QS3 NC_ATI_M6_QS4 NC_ATI_M6_QS5 NC_ATI_M6_QS6 NC_ATI_M6_QS7

NC_ATI_M6_RAS_N

NC_ATI_M6_CAS_N

NC_ATI_M6_WE_N

NC_ATI_M6_CS0_N

NC_ATI_M6_CS1_N

NC_ATI_M6_CKE

NC_ATI_M6_ROMCS_N

R143

21

ATI_MEM_CLK

33-5%

R144

21

ATI_MEM_CLK_N

33-5%

NC_ATI_M6_CLK1 NC_ATI_M6_CLK1_IN

NC_ATI_M6_CLK1_N NC_ATI_M6_CLK_IN_N

NC_ATI_M6_CLKFB

+1.8V Video +2.5V Video

R615

12

4.7K

0.1uF 16V 1 2

C187

TITLE

LINDY PLANAR

DWG NO.

DATE

PROPAGATION_DELAY=L:S::400 PROPAGATION_DELAY=L:S::400

Prop rules for clock feedbacks

PROPAGATION_DELAY=L:S::400 PROPAGATION_DELAY=L:S::400

x00_sd_052303

R1277

21

PROPAGATION_DELAY=L:S::750

1 2

1K-1%1K-1%

R1276

COMPUTER CORPORATION

AUSTIN,TEXAS

REV.

SHEET

38 OF 611/13/2004

1

2

3

4

X03D1660

DCBA

B D

CA

1-21-2004_9:58

1 2

C253

21

C255

21

C324

1 2

C426

21

C427

1 2

L45

BLM21A601S

C254

L133

1 2

BLM21A601S

L134

BLM21A601S

L46

BLM21A601S

L44

BLM21A601S

L43

BLM21A601S

L42

BLM21A601S

L41

BLM21A601S

+1.8V Video

+2.5V Video

21

+2.5V Video

+3.3V

D7

VDDR1_D7

E6

VDDR1_E6

E7

VDDR1_E7

E9

VDDR1_E9

E11

VDDR1_E11

E13

VDDR1_E13

E14

VDDR1_E14

E16

VDDR1_E16

E18

VDDR1_E18

E20

VDDR1_E20

E21

VDDR1_E21

G5

VDDR1_G5

H4

VDDR1_H4

J5

VDDR1_J5

K4

VDDR1_K4

L5

VDDR1_L5

M4

VDDR1_M4

N5

VDDR1_N5

P5

VDDR1_P5

R4

VDDR1_R4

T5

VDDR3_T5

U4

VDDR3_U4

V5

VDDR3_V5

W4

VDDR3_W4

Y5

VDDR3_Y5

AA5

VDDR3_AA5

AB5

VDDR3_AB5

AB6

VDDR3_AB6

AB15

VDDR3_AB15

AB16

VDDR3_AB16

AB18

VDDR3_AB18

AB20

VDDR3_AB20

AB21

VDDR3_AB21

AB22

VDDR3_AB22

AC4

VDDR3_AC4

AC17

VDDR3_AC17

AC23

VDDR3_AC23

AC24

VDDR3_AC24

C7

VDDM_C7

C23

VDDM_C23

D10

VDDM_D10

D12

VDDM_D12

D17

VDDM_D17

E3

VDDM_E3

F4

VDDM_F4

B24

VDDQM_B24

C6

VDDQM_C6

D6

VDDQM_D6

D15

VDDQM_D15

D19

VDDQM_D19

D22

VDDQM_D22

G4

VDDQM_G4

F3

VDDQM_F3

SERIES GRAPHICS CONTROLLER

VIDEO

VDDC_AB11 VDDC_AB12 VDDC_AB14 VDDC_AB17 VDDC_AB19

I\O POWER

VDDP_AA22 VDDP_AB23 VDDP_AB24

RADEON 7000M

Hetero 5 of 5

SUB*_T1839

VDDC_E8 VDDC_E10 VDDC_E12 VDDC_E15 VDDC_E17 VDDC_E19

VDDC_H5 VDDC_H22

VDDC_K5 VDDC_K22

VDDC_M5 VDDC_M22

VDDC_R5 VDDC_R22

VDDC_U5 VDDC_U22

VDDC_W5 VDDC_W22 VDDC_AB7 VDDC_AB8

VDDP_C24 VDDP_D23 VDDP_E22 VDDP_F22 VDDP_G22 VDDP_H23 VDDP_J22 VDDP_K23 VDDP_L22 VDDP_M23 VDDP_N22 VDDP_P22 VDDP_R23 VDDP_T22 VDDP_U23 VDDP_V22 VDDP_W23 VDDP_Y22

E8 E10 E12 E15 E17 E19 H5 H22 K5 K22 M5 M22 R5 R22 U5 U22 W5 W22 AB7 AB8 AB11 AB12 AB14 AB17 AB19

C24 D23 E22 F22 G22 H23 J22 K23 L22 M23 N22 P22 R23 T22 U23 V22 W23 Y22 AA22 AB23 AB24

- Place evenly around ASIC or as close as possible to it and preferably underneath the ASIC on the bottom side

of PCB

- Avoid placing decoupling caps to connecor pins with long traces (>25mils), instead, place caps as close

as possible and tie directly to power plane with short traces

- Each CAP should have its own POWER/GND pair, avoid sharing vias.

+1.8V Video

+3.3V

1

A1

VSS_A1

B2

VSS_B2

C3

VSS_C3

C4

VSS_C4

D3

VSS_D3

D4

VSS_D4

D5

VSS_D5

E4

VSS_E4

E5

VSS_E5

F5

VSS_F5

K10

VSS_K10

K11

VSS_K11

K12

VSS_K12

K13

VSS_K13

K14

VSS_K14

K15

VSS_K15

K16

VSS_K16

K17

VSS_K17

L10

VSS_L10

L11

VSS_L11

L12

VSS_L12

L13

VSS_L13

L14

VSS_L14

L15

VSS_L15

L16

VSS_L16

L17

VSS_L17

M10

VSS_M10

M11

VSS_M11

M12

VSS_M12

M13

VSS_M13

M14

VSS_M14

M15

2

3

M16 M17 N10 N11 N12 N13 N14 N15 N16 N17 P10 P11 P12 P13 P14 P15 P16 P17 R10 R11 R12 R13 R14 R15 R16 R17 T10 T11 T12 T13 T14 T15 T16 T17 U10 U11 U12 U13 U14 U15 U16 U17

VSS_M15 VSS_M16 VSS_M17 VSS_N10 VSS_N11 VSS_N12 VSS_N13 VSS_N14 VSS_N15 VSS_N16 VSS_N17 VSS_P10 VSS_P11 VSS_P12 VSS_P13 VSS_P14 VSS_P15 VSS_P16 VSS_P17 VSS_R10 VSS_R11 VSS_R12 VSS_R13 VSS_R14 VSS_R15 VSS_R16 VSS_R17 VSS_T10 VSS_T11 VSS_T12 VSS_T13 VSS_T14 VSS_T15 VSS_T16 VSS_T17 VSS_U10 VSS_U11 VSS_U12 VSS_U13 VSS_U14 VSS_U15 VSS_U16 VSS_U17

SERIES GRAPHICS CONTROLLER

VIDEO

LVDDR_AC13 LVDDR_AD14 LVSSR_AB13 LVSSR_AC14

TXVDDR_AC19 TXVDDR_AD19 TXVSSR_AC18 TXVSSR_AD18 TXVSSR_AD17

GROUND & CORE POWER

RADEON 7000M

Hetero 4 of 5

PVDD PVSS

LPVDD LPVSS

TPVDD TPVSS

A2VDD

A2VDDQ A2VSSN_1 A2VSSN_2

A2VSSQ

AVDD AVSSN AVSSQ

MPVDD MPVSS

VDDRH

AE26 AD26

AC13 AD14 AB13 AC14

AE10 AF10

ATI_TXVDDR NET_PHYSICAL_TYPE=PWR

AC19 AD19 AC18 AD18 AD17

ATI_TPVDD

AE17 AF17

ATI_A2VDD

AD16

ATI_A2VDDQ

AD15 AC15 AC16 AE15

ATI_AVDD

AD23 AD22 AC21

ATI_MPVDD

A2 A3

ATI_VDDRH

C5

Place all filter components close to Radeon 7000-M

NET_PHYSICAL_TYPE=PWR

ATI_PVDD

NET_PHYSICAL_TYPE=PWR

0.1uF 16V

10uF 6.3V

C1788

21

NET_PHYSICAL_TYPE=PWR

C1789

0.1uF 16V

C1605

C194

C193

C192

C191

C196

C1790

1 2

0.1uF 16V0.1uF 16V

0.1uF 16V

0.1uF 16V 1 2

10uF 6.3V

C1791

1 2

10uF 6.3V

10uF 6.3V 10uF 6.3V 10uF 6.3V 10uF 6.3V 10uF 6.3V

ATI RADEON M6C8 POWER DECOUPLING

ROOM=RADEON_CAP

+1.8V Video

0.1uF 16V C221

21

+2.5V Video

0.1uF 16V

1 2

C201

+3.3V

0.1uF 16V

1 2

C213

0.1uF 16V 1 2

C7021C71

0.1uF 16V

C202

21

0.1uF 16V

C214

21

0.1uF 16V

0.1uF 16V 1 2

C20321C204

0.1uF 16V 1 2

C21521C216

0.1uF 16V

1 2

C197

0.1uF 16V

0.1uF 16V 1 2

C198

21

0.1uF 16V

1 2

C20521C206

0.1uF 16V

1 2

C217

21

0.1uF 16V

C199

0.1uF 16V0.1uF 16V

C218

1uF 6.3V

C200

21

1uF 6.3V 0.1uF 16V

1 2

C207

1 2

C219

C632

21

C235

1 2

C220

21

1uF 6.3V

22uF 6.3V

0.1uF 16V

1 2

C434

21

1 2

1uF 6.3V

C233

1uF 6.3V

C222

C234

21

x02_tj_090303

22uF 6.3V

C251

21

22uF 6.3V

C468

1

2

3

C612

21

4 4

COMPUTER

RADEON REFDES = VIDEO

A B

VIDEO

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 39 OF 61

DC

CORPORATION AUSTIN,TEXAS

REV.

SHEET

X03

B D

CA

1

0.1uF 16V

22uF 6.3V

1 2

C593

R166

32

IDE_PRST_N

1 2

IDE_PRST_N_R

33-5%

PROPAGATION_DELAY=L:S::2000

40

22uF 6.3V

C592

21

+3.3V_AUX

2

+3.3V

1

R1665

1 2

8.2K-5%

PU_LPCPD_N

+3.3V

678

RN65

8.2K

123

3

R139

50V-10%

220pF

21

1 2

100-5%

C172

5,31,32,46

x00_sd_052203 x00_sd_052203

CPLD_TDO

5,32

CPLD_TDI

5

CPLD_TMS BMC_RESET_N_SIO

40

DISABLE_ETHERNET_1_N

40

DISABLE_ETHERNET_2_N

40

BMC_IRQ_N

44

GPI_EN_PASSWD_N

41

GPI_FVS_2_N

41,59

GPI_NVRAM_CLR_N

41

GPI_FVS_1_N

41,59

3/28 BMC_RESET_N ROUTED DIRECTLY TO DS1818 OUTPUT...REMOVE FROM PULLUP RAC_PRSNT_N has p/u on BMC page

CPLD_TCK CPLD_TCK_R

5,31,32,46

4 5

x00_sd_051803 changed p/u to p/d

+3.3V_AUX

1 2

8.2K-5%

R1792

R171321R1714

x00_sd_052203

RN71

8.2K-5% 123

678

40

if 0-ohm is depopped, pop resistor on pg. 46

BMC_MD1

44,46

SIO_PME_N

33

8.2K

+3.3V_AUX

4 5

+3.3V_AUX

NP*

8.2K-5%

1 2

R95

R99

BMC_RESET_N

44,46

4 4

NOTE: One and only one of resistors should be populated at a time

subsys done

1 2

0-5%

A B

BMC_RESET_N_SIO

40

+3.3V_AUX

U61

DISABLE_ETHERNET_1_N

40

DISABLE_ETHERNET_2_N

40

9148

VHC14

1411U61

10

VHC14

x00_sd_052303

2 3

1

RN68

2 3 4 5

8.2K

PROPAGATION_DELAY=L:S::1500

DISABLE_ETHERNET_1

DISABLE_ETHERNET_2

x03_sd - add p/d's x03b_sd - changed to 3.3vaux per nat

8.2K-5%

1 2

R170321R1702

33

+3.3V

36,44,46

876

RN64

54

8.2K

40

321

8

RN66

7 6

SIO_VSB5_PD

54

SP_RN66_5

8 7 6

8.2K

R424

0-5%

21

5,33,41,44,59

5,33,44,55,59 5,33,44,55,59 5,33,44,55,59 5,33,44,55,59

5,33,44,55,59 5,27,55,58,59

678

RN63

8.2K

123

4 5

+3.3V_AUX

24

25

CK_32K_VAUX_SIO CK_14M_SIO

3

NC_SIO_HD NC_SIO_PHD NC_SIO_SHD NC_SIO_SCHD

SIO_REF5V SIO_REF5V_STBY

PCI_RST_PLANAR_2_N IDE_PRST_N_R

NC_SIO_FPRST NC_SIO_RSMRST

NC_SIO_BKFD_CUT NC_SIO_LTCH_BF_CUT NC_SIO_SCK_BJT_GATE

NC_SIO_GRN_LED NC_SIO_YLW_LED

NC_SIO_PSON_N

NC_SIO_PG3V

40

ICH_PWR_ON_REQ

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 CK_33M_SIO

3

LPC_LDRQ0_N

33

LPC_LFRAME_N PCI_RST_PLANAR_N PU_LPCPD_N

40

SERIRQ

33

KB_GATE_A20_N

33

10V-10%

SP_IDE_RSTDRV_N

0.1uF 16V C1750

1 2

x00_gt_061803

1 2C429

1uF

NC_SIO_102

91

CLOCKI32

65

CLOCKI14

66

HD_LED

67

PRIMARY_HD

68

SECONDARY_HD

69

SCSI

70

REF5V

72

REF5V_STBY

73

PCIRST_OUT

74

PCIRST_OUT2

75

FPRST

92

RSMRST

77

BKFD_CUT

79

LATCHED_BF_CUT

80

SCK_BJT_GATE

87

SMB1_SCL

89

SMB1_SDA

88

MDTX/SMB2_SCL

90

MDRX/SMB2_SDA

94

GRN_LED

95

YLW_LED

81

PSON

82

PWRGD_PS

83

CPU_PRESENT

84

PWRGD_3V

85

SLPS3

86

SLPS5

62

LAD0

61

LAD1

59

LAD2

57

LAD3

55

PCI_CLK

54

LDRQ

56

LFRAME

63

PCI_RESET

52

LPCPD

53

SERIRQ

5

GA20

97

VCORF

99

SIOPME

100

AUD_LINK_RST

101

CDC_DWN_ENAB*/GPIO14

102

CDC_DWN_RST

103

GPIOE00

104

GPIOE01/FANTACH3

105

GPIOE02

106

GPIOE03/FANPWM1

108

GPIOE4/FANPWM2

109

GPIOE5/FANPWM3

111

GPIOE6/FANTACH1

112

GPIOE7/FANTACH2

113

3V_DDCSCL/GPIOE13/JYABT0

114

5V_DDCSCL/GPIOE11/JYABT1

115

3V_DDCSDA/GPIOE12/JYBBT0

116

5V_DDCSDA/GPIOE10/JYBBT1

123

JYAX

117

JYAY

118

JYBX

120

JYBY

64

IDE_RSTDRV

PC87373

0.1uF 16V 0.1uF 16V

C148

C149

1 2

0.1uF 16V C145

21

1 2

21

U8

40

DTR1*_BOUT1/XOR_OUT/BADDR*

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

0.1uF 16V C146

C147

1 2

+3.3V_AUX

0.1uF 16V C456

C144

21

SIO_VSB5_PD

VDD3_6 VDD3_31 VDD3_49 VDD3_60

VSB5_71 VSB3_76 VSB3_93

VSB3_107

DSKCHG

INDEX

WDATA WGATE

RDATA

HDSEL DENSEL DRATE0

SOUT1/TEST

RTS1/TRIS

SOUT2

DTR2*/BOUT2

STB/WRITE

BUSY/WAIT*

AFD/DSTRB

SLIN/ASTRB

KBDAT

KBCLK

KBRST

VSS_8 VSS_29 VSS_46 VSS_58 VSS_78 VSS_96

VSS_110

+3.3V

VBAT

DR0

MTR0

DIR

STEP

TRK0

SIN1

CTS1 DSR1 DCD1

RI1

RTS2

SIN2 CTS2 DSR2 DCD2

RI2

PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 ACK

SLCT

ERR

INIT

MDAT MCLK

x00_sd_061203 - vcc changed to +5vriser

+5.0V Riser

321

RN67

1K

876

54

NC_FLP_DRATE0

+3.3V +3.3V_AUX

321

RN23

1K

54

876

1K-1%

21

R108

1K-1%

0.1uF 16V 1 2

1 2

R268

C150

FLP_DSKCHG_N FLP_INDEX_N FLP_DR0_N FLP_MTR0_N FLP_DIR_N FLP_STEP_N FLP_WDATA_N FLP_WGATE_N FLP_TRK0_N FLP_WP_N FLP_RDATA_N FLP_HDSEL_N FLP_DENSEL

SIO_SOUTA SIO_RTSA_N SIO_SINA SIO_DTRA_N SIO_CTSA_N SIO_DSRA_N SIO_DCDA_N

SIO_RIA_N

32,40,59 32,40 32 32 32 32 32 32 32,40 32,40 32,40 32 32

48 48 48 48 48 48 48 48

AC termination to solve overshoot/undershoot issue.

ROOM=SIO

x03b_sd

0.1uF 16V 1K-1%

C1762

C1763

C6007

C6008

1 2

21

1 2

1K-1%0.1uF 16V

1014

1015

21

No p/d on BADDR sets I/O range to 2E-2F

21

1 2

1K-1%0.1uF 16V

1013

1 2

1K-1%0.1uF 16V

1012

21

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 40 OF 61

FLP_WP_N FLP_TRK0_N FLP_DSKCHG_N FLP_INDEX_N FLP_RDATA_N

C1761

21

1 2

1011

COMPUTER CORPORATION AUSTIN,TEXAS

SHEET

32,40 32,40 32,40,59 32,40 32,40

REV.

X03

0.1uF 16V C1200

1 2

4 5

8.2K

43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43

35 35 35 35 33

+3.3V

678

123

RN75

NC_RN75_8

6 31 49 60 98 71 76 93 107

9 20 18 19 17 16 15 14 13 12

WP

11 10 22 21

27 26 25 30 28 24 23 32

122 125 127 121 126 124 128 119

51 44 43 42 41 40 39 38 37 36 35 34

PE

33 50 45 48 47

4 3 2 1 7

8 29 46 58 78 96 110

8.2K-5% 8.2K-5% R499

NP*

21 1 2

R498

NC_SER_SOUTB NC_SER_RTSB NC_SER_DTRB SER_SINB SER_CTSB SER_DSRB SER_DCDB SER_RIB

RPRN_STB_N RPRN_PD0 RPRN_PD1 RPRN_PD2 RPRN_PD3 RPRN_PD4 RPRN_PD5 RPRN_PD6 RPRN_PD7 RPRN_ACK_N RPRN_BUSY RPRN_PE RPRN_SLCT RPRN_AFD_N RPRN_ERR_N RPRN_INIT_N RPRN_SLIN_N

KB_DATA KB_CLK MSE_DATA MSE_CLK KB_RST_N

SUPER I/O

DC

1

2

3

B D

CA

1

2

40,59

40,59 5,33,44,56,59 5,33,40,44,59

x02_sd

GPI_FVS_1_N GPI_FVS_2_N ICH_PWRBTN_N ICH_PWR_ON_REQ

1 2

8.2K-5% R98

.01uF 50V

21

C1305

+3.3V+3.3V

R83

220

21

+3.3V_AUX

U38

VHC14

R1244

1 2

3.01K-1%

+3.3V_AUX

10V-10%

1 2

1uF

VERT LATCH

SINGLE SHIELD

NO MOUNTING HOLES

8149

C1299

RAID Key

RAID_KEY

21 4

3

6

5

8

7

10

9

K

VFPCP_OSC_5V

ICH_SEG3_SCL

ICH_SEG3_SDA

NC_RAID_KEY_10

8.2K-5% R58

21

x02_tj_081803

R1200

1 2

43.2-1%

+3.3V_AUX

31,35

2 1

C1281

0.1uF 16V

D28

31

BAR43 BAR43

0.1uF 16V

0.1uF 16V 2 1

C173312C1628

x00_sd_052203

ADDED CURRENT LIMIT RES. --SWH 9/27 CHANGED RES. TO 100-OHM --SC 12/15

D29

31

0.1uF 16V

C1282

1 2

3.3VAUX_PWRGOOD_N

41

ROOM=VFPCP

VOLTAGE DOUBLER FOR 6V AUX POWER

1M-5%

+3.3V_AUX

DS1818

1 2

R1192

U9

2

VCC

RESET

GND

3

SUB=SUB*_Y1351

Q55

2N7002

1

G

1

100-5%

D

S

3

2

3.3v AUXGOOD GENERATION

X03_GT_011804

1K-5%

R173

12

3.3VAUX_PWRGOOD_BUFF_N

PROPAGATION_DELAY=L:S::1000 PROPAGATION_DELAY=L:S::1000

3.3VAUX_PWRGOOD

1.5K-5%

1 2

R57

U61

2141

VHC14 VHC14

5,41

3144

VHC14

U61

6145

4.7K

ROOM=3VAUXPG

41,45

44

VBAT

VFPCP

INTRUDED_COVER

31

S 2

INTRUSION_COVER_N

1 2

VFPCP

R1198

33,34,41,57

41,45

x00_sd_0518030

R1775

21

33-5%

3.3VAUX_PWRGOOD_RISER_R

1 2

R177621R1777

4.7K

2N7002

G

1

Q77

D 3

3.3VAUX_PWRGOOD_RISER

3.3VAUX_PWRGOOD_ICH_ESM

R3

21

50V-10%

270K

R334

21

1000pF

C1303

1

2

PART_NUMBER=79015

R151

21

1K-5%

50V-10%

1000pF

33-5%

31

33,46

U57

1142

VHC14

0-5%

R1181

NP

21

0-5%

C430

21

PART_NUMBER=79015

5,41

3.3VAUX_PWRGOOD INVERTER

R150

21

1K-5%

U57

R610

8149

1 2

VHC14 VHC14

1K-5%

U57

VHC14

4143

BAR43

31

50V-10%

1000pF

1 2

x00_sd_052903

PART_NUMBER=79015

1 2

R1182

+3.3V_AUX

BAR43

0.1uF 16V

2.2K-5%

C151

1 2

D

Q15

2N7002

3.3VAUX_PWRGOOD

1

G

S

ROOM=INTRUS

U57

6145

D37

VFPCP

41,45

G

1

S

INTRUSION_COVER_VAUX_N

2

Q78

D 3

C1658

2N7002

D6

31

R176

21

3

2

0.1uF 16V

21

C223

3.3VAUX_PWRGOOD_N

5

41

ROOM=5V_PUMP

+3.3V_AUX

JUMPERS

+3.3V

R354

21

8.2K-5% R353

1 2

8.2K-5%

1 3 5

ADD*_81526 ADD*_81526

81526 are the jumper plugs

+5V_AUX Charge Pump

Need about 100mA

3

IN

1

SKIP

2

SHDN

4

GND

U22

MAX682ESA

CXP CXN OUT

PGND

NP

R572

NP

1uF

1 2

C432

21

118K

10V-10%

1MHz switching frequency

Vout ripple = 80mV

J19

GPI_EN_PASSWD_N

GPI_NVRAM_CLR_N

40

1

2 4 6

NC_JMP_6NC_JMP_3

x00_sd_052203

ROOM=JUMPERS

NP

21

C35

7 6 8 5

.47uF

16V-10%

NP

10V-10%

1uF

1 2

NP

10V-10%

C470

+5V_AUX

1uF

21

2

C469

3

X00_GT_051303 X00_GT_052703

TH/SMT SKT

13254

3V COIN

-+

Required by product safety

R1183

1 2

1K-5%

BATTERY

SUB*_1311P ADD*_75481_BATTERY

D31

1 3

1N914

+3.3V_AUX

1 2

C1300

D32

31

1N914

1uF

10V-10%

10uF 6.3V

C1296

1 2

NP*

VBAT

ROOM=BAT

COIN BATTERY

R1184

1 2

1K-5%

33,34,41,57

Required by product safety

ESM_VBAT

+3.3V_AUX

4 5

8.2K

678

VFPCP

41,45

Q16

2N7002

G

x00_tj_051203

D30

31

BAR43

LOAD RESISTOR TO DETECT MISSING BATTERY

123

RN211

1

D 3

R1187

1 2

S 2

200K-1%

R1210

10M-5%10M-5%

1 2

R1211

1 2

A2D_BAT

0.1uF 16V C1284

1 2

+12V

21

R1652

+3.3V_AUX

Q113

D

3

2N7002

Q114

R1650

1 2

8.2K-5%

1

G

S

D

3

1

G

S

2

44

SYSTEM_PWRGOOD_FETS

5,24,35

8.2K-5%

1 2

R1651

330pF 50V

x03b_sd

SYSTEM_PWRGOOD_FETS_6V

330pF 50V

2 1

C72

C74

12

16V 10%

10uF

28,32

+3.3V_AUX

1uf cap shared with other charge pump

C1796

21

1 2

C1798

2.2uF 16V

+5V_AUX Charge Pump

U66

7

IN_7

14

IN_14

6

C1+

8

C1-

3

ENABLE

9

PGND_9

10

PGND_10

11

PGND_11

12

PGND_12

TPS60131PWP

WITH PIN FOR THERMAL PAD

SUB=SUB*_M3151

OUT_5

OUT_16

C2+

C2-

THRM_PIN

GND_1

GND_2 GND_19 GND_20

5 16

418

FBNC

17

PG

15

13

21

1 2 19 20

C1799

16V 10%

10uF

1 2

2.2uF 16V

X03_GT_011804

21

C1800

+5V_AUX

16V 10%

10uF

3

C1801

21

4 4

subsys done

PME

RISER_PCI_PME_N

5,31

x03b_sd

5,31

A B

ICH_PME_N

NC_RN211_7RISER_EXP_PME_N

5,33

Battery / Intrusion Detect / RAID Key / VAux Pwrgood

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

COMPUTER CORPORATION

TITLE

AUSTIN,TEXAS

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 41 OF 61

SHEET

DC

REV.

X03

B D

+3.3V

81

FAN_1U_1

1 2

.1uF

25V-20%

NP13

C1603 1 2

.1uF

3 4 5 6

1X6 2.5mm CONN

SUB*_3W439

NP13

FAN_1U_3

1 2 3 4 5 6

1X6 2.5mm CONN

SUB*_3W439

NP13

FAN_1U_5

1X6 2.5mm CONN

SUB9_3W439

NP*

1 2 3 4 5 6

42,52

NP*

FAN2_TACH

42

FAN8_TACH

42

FANPWR_ZONE1

FAN4_TACH

42

FAN10_TACH

42

FANPWR_ZONE3

x03_sd

21

C1606

.1uF

25V-20%

C1607

NP13

1 2

FAN1_TACH

42

FAN7_TACH

42

FANPWR_ZONE1

42,52

1

FAN3_TACH

42

FAN9_TACH

42

FANPWR_ZONE3

42,52

C1596

FAN5_TACH

42

FAN6_TACH

42

FANPWR_ZONE2

52

1 2

.1uF

25V-20%

21

C1599

NP13

ONLY POPULATED ON 1U SYSTEM

2

42

+12V

.1uF

1 2

C1618

25V-20%

42

FAN5_TACH

42

3

+12V

21

C1615

4 4

P/U's assist poor drive strength of H8

x00_sd

subsys done

+12V

FAN_1

21

FANSPEED_1_R

21

HL44020

CONN, 2x2

NP02

FAN_2

1 2 3 4

HL44020

CONN, 2x2

FAN_5

HL44020

NP02

42

25V-20%

FAN7_TACH

FAN8_TACH

43

NP02

21

43

FAN6_TACH

43

21 43

FANSPEED_2_R

FANSPEED_1_R

FAN1_TACH

21

x00_sd_051703 - caps

.1uF

C1619

25V-20%

+12V

FAN2_TACH

+12V +12V

CONN, 2x2

21

.1uF

1 2

C1617

25V-20%

.1uF

42

.1uF

25V-20%

C1616

+12V

1 2 3 4

CONN, 2x2

FAN_7_8

6

7

8

9

10

POWER

HEADER

SUB=NP02

42

+12V

21

C1620

42

x00_sd_052303

42

FAN_2U_6

HL44020

NP02

1

2

3

4

5

.1uF

25V-20%

42

21 43

+12V

ONLY POPULATED ON 2U and 5U SYSTEM

44,52

+3.3V

FANSPEED_1

FANSPEED_2

FANSPEED_3

1K-5%

R1768

21

1K-5%

1 2

1K-5%

R1767

R1766

21

A B

+12V

FAN3_TACH

42

.1uF

1 2

C1621

25V-20%

+12V

FAN4_TACH

FAN6_TACH

42

These connectors share TACH one is for 2U and the other is for 5U

FANSPEED_2_R

FANSPEED_3_R

x00_sd_051703 x00_tj_052803

3 1

BAR43

D64

FAN_1U_2

1 2 3 4 5 6

1X6 2.5mm CONN

SUB*_3W439

NP13

FAN_1U_4

1 2 3 4 5 6

1X6 2.5mm CONN

SUB*_3W439

.1uF

25V-20%

13

NP13

1 2 3 4

CONN, 2x2

42

BAR43

D65

FAN_3

HL44020

CONN, 2x2

3 1

FANSPEED_1_R

21 43

NP02

FAN_4

42

FANSPEED_1_R

21

43

NP02

FAN_6

21

43

HL44020

NP02

+12V

.1uF

1 2

C1614

25V-20%

D's and series R's not needed on 1U

NP02

D66

NP02

R1023

21

49.9-1%

NP02

R1024

1 2

49.9-1%

NP02

R1025

21

49.9-1%

FANSPEED_2_R

x00_tj_060603

FANSPEED_1_R

FANSPEED_2_R

FANSPEED_3_R

42

31

42

FAN1_TACH

FAN2_TACH

FAN3_TACH

FAN4_TACH

FAN7_TACH

FAN8_TACH

FAN9_TACH

FAN10_TACH

FAN5_TACH

FAN6_TACH

PS1A_TACH

PS1B_TACH

PS2A_TACH

PS2B_TACH

42

RN70

+3.3V

RN70

+3.3V

RN73

+3.3V

RN73

+3.3V

RN70

+3.3V

RN70

+3.3V

R1550

1 2

+3.3V

21

R1551

+3.3V

RN74

+3.3V

RN74

+3.3V

RN74

+3.3V

RN74

63

1 8

63

8.2K-5%

54

8.2K-5%

RN73 2 7

2 7

54

RN73

1 8

72

63

4 5

8.2K-5% 8.2K-5% 8.2K-5% 8.2K-5%

1 8

1.5K-5%

8.2K-5% 8.2K-5%8.2K-5%8.2K-5% 1 8

1.5K-5%

2 7

1.5K-5%

8.2K-5%8.2K-5%

R1553

8.2K-5%8.2K-5%

1.5K-5%

R1552

1 2

1.5K-5%

2 7

1.5K-5%

3 6

1.5K-5%

RN60

RN61

RN60

2 7

1.5K-5%

RN62

RN61

31

D20

BAR43

.01uF 50V

C785

D13

21

BAR43

1 3

D19

BAR43

1 3

63

54

21

81

54

D53

D54

D57

D58

D18

D17

D42

D41

D21

D22

D1

D2

1 3

31

1 3

31

1 3

31

1 3

31

1 3

x03_sd

BAR43

BAR43BAR43

NP* x03_sd

NP*

BAR43 BAR43

BAR43

BAR43BAR43

NP02

.01uF 50V

C781

21

.01uF 50V

C782

21

.01uF 50V

NP13

.01uF 50V.01uF 50V

NP13

.01uF 50V .01uF 50V

NP*

.01uF 50V.01uF 50V

.01uF 50V .01uF 50V

NP02

D14

D15

21

1 2

31

BAR43

1 3

C783

31

D16

BAR43

C66

D24

BAR43

1 3

31

C67

D23

BAR43

31

C65

D3

NP13

21

BAR43

Diodes and caps depop'ed for 2U/5U for tachs 9 and 10

1 2

C64

D4

NP13

1 3

BAR43

BMC_FAN5_TACH

C68

NP*

D44

BAR43

1 3

BMC_FAN6_TACH

31

C69

D43

NP*

BAR43

BMC_PS1A_TACH

C518

31

D55

BAR43

BMC_PS1B_TACH

C417

D56

1 3

BAR43

BMC_PS2A_TACH

C851

D59

NP02

BAR43

1 3

BMC_PS2B_TACH

31

C850

D60

NP02

BAR43

TO DO: ADD DECOUPLING

1u

2u/5u

led

00 1

1 2

2

3

3 4

4

5 6 7

8

2U & 5U

1u 2u 1a

2a 3a 4a 5a

1b 2b 3b

4b ps1 ps2

BMC_FAN1_TACH

BMC_FAN2_TACH

BMC_FAN3_TACH

BMC_FAN4_TACH

44

44,45

tach

1 2 3 4 5 6 7 8

9 10 11 12 13 14

Zone-2

BMC_FAN7_TACH

44

Zone-2

BMC_FAN8_TACH

BMC_FAN9_TACH

BMC_FAN10_TACH

44

44,45

2U & 5U

44,45

1U

Zone-1

44

ROOM=FANS_TACH_FRONT ROOM=FANS_TACH_REAR

44

ROOM=FANS_TACH_PS

44

ROOM=FANS_FRONT ROOM=FANS_REAR ROOM=FANS_5U

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

F1 F4

F1

46

CA

5u

1 1

2

3

4

5

5 65b 6

7 8

ps1 ps1a

ps2/7 ps2a/9

ps1b

ps2b/10

F6

j8

j17

F5

j7

1U

F5

p14

Zone-1

F3F2

p10 p12 p11 p13

F2 F3

F4

Zone-3

+3.3V_AUX

8.2K-5%

1 2

R1760

+3.3V_AUX

U20

FAN_LED8

LED_CTRL2

NP*

14

74LCX07

j6j5j3 j4

65

NP*

14

U20

9 8

74LCX07

+3.3V

LED0_GRN_DRV

42

LED0_AMB_DRV

42

LED1_AMB_DRV

42

LED2_AMB_DRV

42

LED1_GRN_DRV

LED2_GRN_DRV

LED3_GRN_DRV

LED3_AMB_DRV

BICOLOR

SG

Y

1 2

NP13

DF1_1 BICOLOR SG

3 4

Y

NP13

DF1_2

BICOLOR

SG

Y

1 2

NP13

DF1_3

BICOLOR

SG

3 4

Y

NP13

DF1_4

43

21

+3.3V

43

+3.3V

21

LED4_GRN_DRV

42

LED4_AMB_DRV

42

LED5_GRN_DRV

42

LED5_AMB_DRV

42

LED6_GRN_DRV

42

LED6_AMB_DRV

42

LED7_GRN_DRV

42

LED7_AMB_DRV

42

ONLY POPULATED ON 2U and 5U

ONLY POPULATED ON 1U

FAN_LED0

42,46

46

42,46

46

LED_CTRL0

FAN_LED1

46

LED_CTRL0

FAN_LED2

46

LED_CTRL0

FAN_LED3

46

LED_CTRL0

FAN_LED4

46

LED_CTRL0

FAN_LED5

46

LED_CTRL0

FAN_LED6

LED_CTRL1

FAN_LED7

LED_CTRL1

LED8_GRN_DRV

42

LED8_AMB_DRV

42

x03_sd

POPULATED ON 1U/2U/5U

5U

j10

F8

F7

Zone-3

R226

LED8_GRN_DRV

1 2

NP*

130-1%

R245

LED8_AMB_DRV

21

NP*

130-1%

BICOLOR SG

3 4

Y

DF_9

NP*

42

+3.3V

21

x03_sd repackage for cost savings

NAND GATES ARE LCX

+/-24ma drive

1 2

NP*

3 4

NP*

3 4

NP*

1 2

NP*

+3.3V_AUX

U4

+3.3V_AUX

U4

+3.3V_AUX

U20

11 10

NP*

+3.3V_AUX

U20

NP*

74LCX07

+3.3V_AUX

U20

NP*

74LCX07

+3.3V_AUX

U20

3 4

NP*

74LCX07

BICOLOR SG

Y

DF_5

BICOLOR SG

Y

DF_6

BICOLOR SG

Y

DF_7

BICOLOR SG

Y

DF_8

14

U4

1 2

74LCX07

PKG_TYPE=TSSOP14

14

U4

43

74LCX07

PKG_TYPE=TSSOP14

14

5 6

74LCX07

PKG_TYPE=TSSOP14 14

74LCX07

14

PKG_TYPE=TSSOP14

74LCX07

PKG_TYPE=TSSOP14

14

1213

PKG_TYPE=TSSOP14

14

21

PKG_TYPE=TSSOP14

14

28,42

PKG_TYPE=TSSOP14

+3.3V

LED0_GRN_DRV

+3.3V

42

LED0_AMB_DRV

42

LED1_GRN_DRV

42

LED1_AMB_DRV

42

LED2_GRN_DRV

42

LED2_AMB_DRV

42

LED3_GRN_DRV

42

LED3_AMB_DRV

42

x03_sd - depopped all

NP*

43

+3.3V

21

43

ONLY POPULATED ON 2U and 5U

x03_sd remove some parts for 2u/5u only

R197

28,42

14

1 2

74VHC00

SUB02_14PNP

28,42

145U31

4

74VHC00

SUB02_14PNP

28,42

14

9 10

74VHC00

SUB02_14PNP

89

28,42

1413U31

12

74VHC00

SUB02_14PNP

28,42

14

1 2

74VHC00

SUB9_14PNP NP*

28,42

145U32

4

74VHC00

SUB9_14PNP NP*

28,42

14

9 10

74VHC00

SUB9_14PNP NP*

14

U32

12 13

74VHC00

SUB9_14PNP NP*

TITLE

U32

U31

NP13

U31

NP13

U32

11

3

6

1 2

8

11

1 2

3

1 2

130-1%

6

130-1%

8

1 2

130-1%

R191

130-1%

R157

1 2

130-1%

1 2

130-1%

R199

130-1%

R200

130-1%

R201

130-1%

R202

130-1%

1 2

130-1%

R237

130-1%

R238

130-1%

R241

R242

R265

R251

NP13

R198

21

NP13

LED1_GRN_DRV

21

NP13

LED2_GRN_DRV

NP13

21

LED2_AMB_DRV

NP13

R203

21

LED3_GRN_DRV

NP13

R205

LED3_AMB_DRV

NP13

LED4_GRN_DRV

NP*

21

LED4_AMB_DRV

NP*

x03_sd - depopped

LED5_GRN_DRV

NP*

LED5_AMB_DRV

21

NP*

LED6_GRN_DRV

21

NP*

LED6_AMB_DRV

NP*

21

LED7_GRN_DRV

NP*

LED7_AMB_DRV

NP*

LED0_GRN_DRV

LED0_AMB_DRV

LED1_AMB_DRV

42

COMPUTER CORPORATION AUSTIN,TEXAS

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 42 OF 61

SHEET

DC

BICOLOR

SG

Y

1 2

DF_1

BICOLOR

SG

3 4

Y

NP*

DF_2

BICOLOR

SG

Y

1 2

NP*

DF_3

BICOLOR

SG

3 4

Y

DF_4

NP*

42

+3.3V

0.1uF 16V 1 2

REV.

X03

+3.3V

43

+3.3V

21

+3.3V

43

+3.3V

21

0.1uF 16V

C232

C231

21

1

2

3

B D

x00_sd_061203 - vcc changed to +5vriser

D27

1N914

C930

1 2

0.1uF 16V

LED_ID_BLUE

+5.0V Riser

13

Q83

2N7002

1

G

D

3

S

2

32,43,46

PRN_STB_N PRN_PD0 PRN_PD1 PRN_PD2 PRN_PD3 PRN_PD4 PRN_PD5 PRN_PD6 PRN_PD7 PRN_ACK_N PRN_BUSY PRN_PE PRN_SLCT

TO WITHSTAND SHORT CIRCUIT ON CONNECTOR

R362

1 2

8.2K-5%

1 2

100-5%

R751

R750

21

CYC_BLUE_DRV

LED_ID_YELLOW

USING MORE RESISTORS

OR DRAC3 AC ADAPTER PLUGGED IN

+5V_AUX

1

3906

Q54

43

Q79

2N7002

1

G

REAR ID LED & REAR CYCLOPS CONNECTOR

PARALLEL HEADER

81

4 5

4.7K-5%

RN123

3 6

4.7K-5%

RN123

2 7

ID_BUTTON_DB_N

TO BMC

RN125

4.7K-5%

RN125

4.7K-5%

2 7

4.7K-5%

RN125

21

U38

VHC14

330pF 50V

C964

RN124

1 2

C963

RN128

3 6 33-5%

RN128

4 5

33-5%

R864

1 2 100-1%

R788

1 2 33-5%

RN127

3 6 33-5%

RN127

4 5 33-5%

50V-10%

470pF

C1020

21

50V-10%

C1025

470pF

1 2

SW1

A B GND_1 GND_2

PUSHBUTTON

SUB*_5C785

ROOM=PPORT

330pF 50V

470pF

C1022

1 2

C961

50V-10%

470pF

21

C1019

330pF 50V

1 2

C1018

50V-10%

470pF

C960

8.2K-5%

C1026

1 2

50V-10%

470pF

R97

21

1 2

C1021

R63

1K-5%

330pF 50V

1 2

C959

21

6.3V-10%

4.7uF

330pF 50V

C965

21

6.3V-10%

1 2

4.7uF

C311

330pF 50V

1 2

C962

+3.3V_AUX

111410

1 2

C310

$0.03 5/10/01

NP*

1

RPRN_STB_N

40

RPRN_PD0

40

RPRN_PD1

40

RPRN_PD2

40

RPRN_PD3

40

RPRN_PD4

40

RPRN_PD5

40

RPRN_PD6

40

RPRN_PD7

40

RPRN_ACK_N

40

RPRN_BUSY

40

RPRN_PE

40

RPRN_SLCT

40

RPRN_AFD_N

40

RPRN_ERR_N

40

RPRN_INIT_N

2

40

RPRN_SLIN_N

50V-10%

470pF

33-5%

RN128

1 8

33-5% RN129

2 7

33-5% RN129

3 6

33-5%

R865

21

100-1%

R786

33-5%

RN127

2 7 33-5%

RN127

1 8 33-5%

50V-10%

470pF

C102421C1023

1 2

50V-10%

470pF

C1017

21

ID_BUTTON_RAW

32

FROM CONTROL PANEL

R787

1 2

RN128

2 7 33-5%

RN129

1 8

33-5% RN129

4 5

33-5%

50V-10%

470pF

21

50V-10%

3

+3.3V_AUX

1 2

C1608

21

x00_sd_051803 - added cap

3 4

SPST SWITCH

0.1uF 16V

ROOM=CYC_REAR

REAR ID BUTTON

8

BSPKRO

10V-10%

D

33,34

33

R259

1 2

ICH_SPKR

1.5K-5%

Q18

2N7002

GPO_SPKR_DISABLE

Q17

D

1

G

S

2N7002

3

2

3

1

G

S

2

x00_tj_051203

4 4

1

RN24

2 3

C173

1uF

4

21

33

ROOM=SPKR

VCC

7 6

1N914

5

13

D45

SPKROUT

32

RN123

63

4.7K-5%

44

1 8

4.7K-5%

RN125

4 5

4.7K-5%

RN123

4 5

4.7K-5%

63

RN124

4.7K-5%

RN124

2 7

4.7K-5% R875

1 2

81

RN124

4.7K-5%

Changes from Everglades/Boxster

Resistance redistributed:

LED changed to 3-pin version to prevent tipping during board installation.

Independant tuning resistors and current channel added for new LED config of (2).

High side is activated when needed rather than deactivated when opposing LED is on. This is needed to support new LED config of (2).

PULPTVCC

4.7K

R876

1 2

ROOM=CYC_REAR

32,43,46

x02_sd_removed connector and supporting components for 1U

A: A shorted cable would have violated power rating for Amber drive case. B: Amber turn-off could have caused large power rating violation for short time. C: Prevents power rating violation when Amber and Blue is on for below changes.

68-5% 68-5%

NP02

D

3

S

2

3

1 2

21

R440

NP02

R1662

68-5% 68-5%

NP02

CA

1 2

R439

NP02

BLM11A601S

R1661

21

L31

NP02

21

ROOM=PAR

NP02

R447

1 2

0-5%

YEL_CATH_REAR

12

NP02

C224

0.1uF 16V

not correct from everglades

PARA_CONN

21

3

4

5

6

7

8

9 10

11 12

14

13

16

15

18

17

2019 21 22 23 25 27 29 30

HDR2X15

W/EJECT LEVER

NP02

Pins 26, 27, and 28 shorted on cable.

BLUE: 23 mA @3.8V AMBER: 23 mA @2.1V

center pin is AMBER+

todo need to check new DS7's current and Vf numbers

43

24

26

28

BLUE_CATH_REAR

CYC_BLUE_DRV

CYC_AMB_DRV

x03b_sd

1

3

4

6

NP02

1 3 2

DC PWR JACK

NP02

DS7

BLUE

1

3

AMB

LED

BLU/AMB

+3.3V

8.2K-5%

CATH1

CATH2

CATH3

CATH4

BZA462A

43

J15

12

C247

21

U28

COMMON1 COMMON2

0.1uF 16V

2

R618

PARAPORT_PRES_N

2 5

CYC_AMB_DRV

B A

L32

21

BLM11A601S

NP02

100-5%

21

100-5%

R753

33,46

+3.3V_AUX

1 2

R752

2

3

39-5%

NP02

1

3906

Q76

1 2

39-5%

R45

SUB*_4M970

82-5%

21

3

2

R1660

21

NP02

D

S

R406

1 2

8.2K-5%

NP02

SUB*_4M970

82-5%

R337

Q80

2N7002

1

G

D

3

S

2

R339

SUB TO 82.5 OHM

21

NP02

Q121

2N7002

LED_ID_YELLOW

1

G

LED_ID_BLUE

1-21-2004_9:58

32,43,46

1

2

3

subsys done

Speaker Driver

A B

Parallel Port / ID Button / Rear Cyclops / Speaker

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

COMPUTER CORPORATION

TITLE

AUSTIN,TEXAS

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 43 OF 61

SHEET

DC

REV.

X03

A B C

BMC has 4X PLL for 29.5MHz for all baud rates to be supported w/ 0% err

D

+3.3V_AUX

Default = Falling edge causes NMI.

R213

8.2K-5%

1 2

BMC_A0

45

BMC_A1 BMC_A2 BMC_A3 BMC_A4 BMC_A5 BMC_A6 BMC_A7 BMC_A8

45

BMC_A9

45

BMC_A10

45

BMC_A11

45

BMC_A12

45

BMC_A13

45

BMC_A14

45

BMC_A15

45

BMC_A16

45

BMC_A17

45

BMC_FAN3_TACH BMC_FAN4_TACH BMC_FAN5_TACH BMC_FAN6_TACH BMC_FAN7_TACH

42

BMC_FAN8_TACH

42

BMC_D0 BMC_D1 BMC_D2 BMC_D3 BMC_D4

45

BMC_D5

45

BMC_D6

45

BMC_D7

45

BMC_D8

45

BMC_D9

45

BMC_D10

45

BMC_D11

45

BMC_D12

45

BMC_D13

45

BMC_D14

45

BMC_D15

45

BMC_HIGH_WR_N

45

BMC_LOW_WR_N

45

BMC_RD_N

BMC_GPIO_22

45

SRAM_CS_N

45

BMC_EXGP_CS_N

46

BMC_GPIO_23

45

A2D_BAT

41

A2D_ROMB_BAT

45

RAC_PRSNT_N BMC_GPI_71

45

BMC_GPI_72

45

BMC_GPI_73

45

L135

BLM18BD601SN1

HITACHI_NMI_N

PS_FAN_DAC1

31

PS_FAN_DAC2

31

21

0.1uF 16V C1794

21

BMC_AVREF

44

0.1uF 16V 1 2

1

45,46 45,46 45,46 45,46 45,46 45,46 45,46

42,45 42,45 42,45 42,45

x00_PL_052303: Add A16 and A17

2

45,46 45,46 45,46 45,46

45,46

3

x00_PL_060503: Moved PS_AC_GOOD to IRQ input

33,45,50

+3.3V_AUX

4

X02_PL_081903: Added Filtered AVCC rail

subsys done

11

NMI

112

P10/PW0/A0/AD0

110

P11/PW1/A1/AD1

109

P12/PW2/A2/AD2

108

P13/PW3/A3/AD3

107

P14/PW4/A4/AD4

106

P15/PW5/A5/AD5

105

P16/PW6/A6/AD6

104

P17/PW7/A7/AD7

103

P20/PW8/A8/AD8

102

P21/PW9/A9/AD9

101

P22/PW10/A10/AD10

100

P23/PW11/A11/AD11

99

P24/PW12/A12/AD12

98

P25/PW13/A13/AD13

97

P26/PW14/A14/AD14

96

P27/PW15/A15/AD15

41

PA0/KIN8/EVENT0/SSEOI/A16

40

PA1/KIN9/EVENT1/SSE2I/A17

39

PA2/KIN10/EVENT2/A18

38

PA3/KIN11/EVENT3/A19

37

PA4/KIN12/EVENT4/A20

35

PA5/KIN13/EVENT5/A21

34

PA6/KIN14/EVENT6/A22

33

PA7/KIN15/EVENT7/A23

78

P60/KIN0/FTCI/D0

79

P61/KIN1/FTOA/D1

80

P62/KIN2/FTIA/D2

81

P63/KIN3/FTIB/D3

82

P64/KIN4/FTIC/D4

83

P65/KIN5/FTID/D5

84

P66/KIN6/FTOB/D6

85

P67/KIN7/D7

121

P30/WUE8/D8

122

P31/WUE9/D9

123

P32/WUE10/D10

124

P33/WUE11/D11

125

P34/WUE12/D12

126

P35/WUE13/D13

127

P36/WUE14/D14

128

P37/WUE15/D15

20

P94/HWR

24

P90/LWR

21

P93/RD

22

P92/CPCS1

17

P97/WAIT/CS256

19

P95/AS/IOS

23

P91/AH

68

P70/AN0

69

P71/AN1

70

P72/EXIRQ2/AN2

71

P73/EXIRQ3/AN3

72

P74/EXIRQ4/AN4

73

P75/EXIRQ5/AN5

74

P76/EXIRQ6/AN6/DA0

75

P77/EXIRQ7/AN7/DA1

76

AVCC

77

AVREF

67

C1795

AVSS

BMC

55 56 57 58

54 53 52 51 61

62 63 64

PD2/PME

65 66

x00_PL_052303: moved PARAPORT_PRES_N from CPLD and removed EMP_EN x00_TL_061003: swapped PARAPORT_PRES_N and CTRLPNL_MUX_S0 to that CTRLPNL mux's can be on same port (1 write)

16 15 133 134 136 137

5 6 26 25

120 119 118 117 116 115 114 113

49 50 47 48 31 32 29 30 27 28 59 60

129 130 131 132 138 2 3 4

94 93 92 45 44 43 46

P85/EXIRQ13/EXTMI1/SCK1 P86/EXIRQ14/EXTMIX/SCK2

P87/EXIRQ15/EXTMIY/ADTRIG

P84/EXIRQ12/EXTMI0/SCK0

HITACHI 2178 BMC

HETERO 1 OF 2

SUB1=SUB02_W3169 SUB2=SUB13_T3353

PE3/LAD3 PE2/LAD2 PE1/LAD1 PE0/LAD0

PE4/LFRAME PE5/LRESET

PE6/LCLK

PE7/SERIRQ

PD5/LPCPD

PD4/CLKRUN

PD3/GA20

PD1/LSMI PD0/LSCI

P50/IRQ8/TXD0

P51/IRQ9/RXDO P52/IRQ10/IRTXD/TXD1 P53/IRQ11/IRRXD/RXD1

P54/IRQ12/TXD2 P55/IRQ13/RXD2

P56/IRQ14/PWX0 P57/IRQ15/PWX1

PC6/PWX2 PC7/PWX3

PB0/EVENT8

PB1/EVENT9 PB2/EVENT10 PB3/EVENT11 PB4/EVENT12 PB5/EVENT13 PB6/EVENT14 PB7/EVENT15

P81/EXIRQ9/SDA0

P80/EXIRQ8/SCL0 P83/EXIRQ11/SDA1 P82/EXIRQ10/SCL1

PC1/SDA2 PC0/SCL2 PC3/SDA3 PC2/SCL3 PC5/SDA4 PC4/SCL4 PD7/SDA5 PD6/SCL5

P40/IRQ0/TMI0 P41/IRQ1/TMI1 P42/IRQ2/TMO0 P43/IRQ3/TMO1 P44/IRQ4/TMIX P45/IRQ5/TMIY P46/IRQ6/TMOX P47/IRQ7/TMOY

PF0/EXPW0 PF1/EXPW1 PF2/EXPW2

ROOM=BMC

LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0

LPC_LFRAME_N

PCI_RST_PLANAR_2_N

CK_33M_BMC BMC_PIN_51 BMC_PIN_61

BMC_PIN_62

BMC_IRQ_N

CTRLPNL_MUX_S1

BMC_SMI_N

CTRLPNL_MUX_S0

BMC_CTS0_N BMC_RTS0_N

CTRLPNL_CLK

CTRLPNL_DATA

FANSPEED_1 FANSPEED_2 FANSPEED_3 FANSPEED_4

BMC_FAN9_TACH

BMC_FAN10_TACH

BMC_PS1A_TACH BMC_PS2A_TACH BMC_PS1B_TACH BMC_PS2B_TACH

BMC_FAN1_TACH BMC_FAN2_TACH

I2C_IPMB_SDA I2C_IPMB_SCL

I2C_NIC_SDA

I2C_NIC_SCL I2C_SEG2_VAUX_SDA I2C_SEG2_VAUX_SCL I2C_SEG3_VAUX_SDA I2C_SEG3_VAUX_SCL I2C_SEG4_VAUX_SDA I2C_SEG4_VAUX_SCL

I2C_SEG5_SDA I2C_SEG5_SCL

NIC_ALERT_N

PFAULT_LATCH_N

BMC_ALERT_N

PS_AC_GOOD

RAC_RDY_N

INTRUDED_COVER

IPMB_RST_N

ID_BUTTON_DB_N

PFAULT_RESET_R

BMC_RDY_N BMC_NMI_N

BMC_GPIO_45

ICH_PWR_ON_REQ

SYSTEM_PWRGOOD_ESM

BMC_ICH_PWRBTN_N

X00_PL_052903: Moved PWR_LED to CPLD X02_PL_091503: Moved PARAPORT_PRES_N to CPLD

x00_pl_052303: moved BMC_TYPE to CPLD

5,33,40,55,59 5,33,40,55,59 5,33,40,55,59 5,33,40,55,59

5,33,40,55,59 36,40,46 3 45 45

x00_PL_060503:Placed pin 51, 61, 62 on pullups

45 40 32 33,45 32

48 48

BMC_TX0

48

BMC_RX0

48 32 32

42,52 42,52 42,52 45

42 42 42 42 42 42 42 42

32,44,50,59 32,44,50,59 24,25,44,59 24,25,44,59 5,44,45,59 5,44,45,59 31,44,59 31,44,59 31,44,59 31,44,59 32,44,59 32,44,59

24,25,45 5,46 45,46 46 33,45,50 41 32,45,50 43

5,46 33,45,50

45

5,33,40,41,59

5,46,50

44

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

ECAD: Place these components as close

to the BMC as possible

R159

1 2

x02_tj_081803

BMC_XTAL

75-1%

X5

21

7.3728MHz

18pF

1 2

C158

50V-5%

X00_PL_082003: Replaced with Real Symbol

C159

R346

BMC_EXTAL

21

0-5%

18pF

1 2

50V-5%

x00_PL_060203: Moved CTRLPNL_MUX_S0/S1per Hitachi fdbk (no GPIOs when use LPC)

x00_PL_060503: changed to 0 ohm

ICH_PWRBTN_N

5,33,41,56,59

BMC_ICH_PWRBTN_N

44

+3.3V_AUX

8.2K-5%

1 2

R1864

+3.3V_AUX

U4

14

pullup is on page 33

1213

74LCX07

x03_sd repackage for cost savings

BMC - BB

W3169

14967PROG-PART SPEC DISK PROG BLANK PART

BMC - K/C

F3450

X0602

T3353 PROG-PART SPEC 14967 DISK PROG BLANK PART

x03_sd

D69

3 1

Diode turns this into

an open-drain driver

32,44,50,59 32,44,50,59 24,25,44,59 24,25,44,59

5,44,45,59 5,44,45,59

BAR43

31,44,59 31,44,59 31,44,59 31,44,59 32,44,59 32,44,59

GPE_NMI_N

+3.3V_AUX

33,56

I2C_IPMB_SDA I2C_IPMB_SCL I2C_NIC_SDA I2C_NIC_SCL I2C_SEG2_VAUX_SDA I2C_SEG2_VAUX_SCL I2C_SEG3_VAUX_SDA I2C_SEG3_VAUX_SCL I2C_SEG4_VAUX_SDA I2C_SEG4_VAUX_SCL I2C_SEG5_SDA I2C_SEG5_SCL

LAN_AUX

21

R470

+3.3V

4.7K

R471

1 2

R472

4.7K 1 2

U2919 X0602

+3.3V_AUX

21

R473

4.7K

R47621R475

4.7K

4.7K 1 2

+3.3V_AUX

21

R477

4.7K

+3.3V_AUX

NP

+3.3V_AUX

R478

4.7K

1 2

44

R1427

1 2

R1384

1 2

+3.3V_AUX

21

R480

22uF 6.3V

C460

21

x03_sd added cap

x00_TL_060303: Delete according to Hitachi

+3.3V_AUX

x00_tj_051203

0.1uF 16V .01uF 50V

C1340

PLLCAP is NC in BMC

0-5%

LOW=4X PLL

0-5%

1 2

44

C1

BMC_XTAL

BMC_EXTAL

12

NC_PLLCAP

BMC_GPIO_18

45

1 2

R504

0-5%

REAL_BMC_RESET_N

44

40,46

NC_RES0 BMC_STBY

45

BMC_FWE

45

BMC_MD1 BMC_MD2_N

46

ADD PULLDOWN ALSO ON MD PINS??

36 86

13

143 144

140 141

18

142

12

135

10

9

14

SUB*_R2879

1

VCC_1 VCC_36 VCC_86

VCL XTAL

EXTAL

PLLCAP PFSEL P96/PHI/EXCL

8

RES RESO STBY FWE

MD0 MD1 MD2

HITACHI 2178 BMC

HETERO 2 OF 2

x00_PL_060203: Add AND gate Pullup and Zero Ohm

THE MAX809 is PUSH-PULL

DS1818 is open drain with an internal pull-up

X00_GT_052203

1 2

C152

+3.3V_AUX

2

VCC

RESET

GND

0.1uF 16V 3

DS1818

SUB1=SUB_Y1351

U30

8.2K-5%

1

R1838

0-5%

BMC_RESET_N

NP01

J9

1 2

R1842

1 2

HUDI_RESET_N

46

x03_sd repackage for cost savings

3V Reference Circuit for A/D converter

NET_PHYSICAL_TYPE=PWR

+5V_AUX

+3.3V_AUX

R481

R479

4.7K

4.7K 1 2

1 2

R482

2.2K-5%

1 2

x03_pl_010604: Changed value per defect: 100324

BMC

R29

NP

49.9-1% R21

1 2

249 Ohm-1%

x02_pl_091703

21

TITLE

DWG NO.

DATE

LINDY PLANAR

D1660 X03 1/13/2004 44 OF 61

21

NP23

R313

R441

DCBA

BMC

40,46

+3.3V_AUX

U4

74LCX07

1 2

14.7K-1% 4.75K-1%

0.1uF 16V

2 1

NP01

14

0.1uF 16V

0.1uF 16V CB479

1 2

CB1

21

7

VSS_7

42

VSS_42

95

VSS_95

111

VSS_111

139

VSS_139

BMC_TRST_N

91

ETRST

ETCK ETDI ETDO ETMS

53U65

BMC_TCLK

90

BMC_TDI

89

BMC_TDO

88

BMC_TMS

87

REAL_BMC_RESET_N

+3.3V_AUX

4

74VHC1G08

1011

BMC_AVREF

TL431ACD

D35

1

8

236

7

COMPUTER CORPORATION

AUSTIN,TEXAS

REV.

SHEET

CB438

1 2

8.2K-5%

1 2

R1836

C744

2 1

10uF 6.3V

0.1uF 16V CB493

21

46 46 46 46 46

44

0.1uF 16V C464

21

1

2

3

4

B D

CA

+3.3V_AUX

0.1uF 16V C1759

x00_gt_061803

1 2

+3.3V_AUX

143U7

BMC_HIGH_WR_N

44,45

BMC_LOW_WR_N

1

44,45

1 2

74VHC08

BMC_WR_N

45,46

+3.3V_AUX

14

4 5

74VHC08

+3.3V_AUX

148U7

9

10

74VHC08

R1839

1 2

0-5%

NP*

R1840

0-5%

21

U7

6

SRAM_BHE_N

SRAM_BLE_N

R_SRAM_CS_N

45

42,44

44,45 44-46

44

BMC_HIGH_WR_N BMC_RD_N

BMC_LOW_WR_N BMC_RD_N

BMC_FAN6_TACH

this is A21

SRAM_CS_N

44-46 44-46 44-46 44-46 44-46 44-46 44-46 44,45 44,45 44,45 44,45 44,45 44,45 44,45 44,45 44,45

R_SRAM_CS_N

45

SRAM_BLE_N

45

SRAM_BHE_N

45

BMC_RD_N

44-46

BMC_WR_N

45,46

45

x00_PL_060203: Added Zero Ohms in case 2178 is not ready

Allows for BMC to I/F w/ SRAM : 16 bit reads / 8 or 16 bit writes

ROOM=BMC

BMC SRAM

2

5,44,45,59 5,44,45,59

X02_PL_091503: Added pullup to BMC_GPIO_45 X02_PL_081903: Added pullup to BMC_A0

X02_PL_081903: Added pullup to FANSPEED_4

+3.3V_AUX

3

8.2K-5%

1 2

8.2K-5%

FANSPEED_4

44

BMC_A0

44

BMC_GPI_72

44

BMC_PIN_62

44

BMC_PIN_61

44

BMC_GPIO_45

44

BMC_STBY

44

NIC_ALERT_N

24,25,44

BMC_ALERT_N

44,46

BMC_FWE

44

BMC_RDY_N

33,44,50

IPMB_RST_N

32,44,50

RAC_PRSNT_N

33,44,50

RAC_RDY_N

33,44,50

4

33,44

44 44

44

44 44

44

46 46

BMC_GPIO_22 BMC_GPIO_23

BMC_GPI_71

BMC_GPI_73

BMC_GPIO_18 BMC_PIN_51

BMC_SMI_N

BMC_TYPE0

BMC_TYPE1

subsys done

X03_GT_010703

8.2K-5%

1 2

4.7K

R639

R638

21

R4505

8.2K-5%

1 2

R63721R636

8.2K-5%

1 2

R4504

R1845

21

8.2K-5%

1 2

R63521R63421R628

A B

8.2K-5%

R1844

21

8.2K-5%

1 2

R1843

8.2K-5%

R6

21

8.2K-5%

1 2

R62921R630

8.2K-5%

1 2

R631

+3.3V_AUX

8.2K-5%

+3.3V_AUX

0.1uF 16V

BMC_SRAM

BMC_A1 BMC_A2 BMC_A3 BMC_A4 BMC_A5 BMC_A6 BMC_A7 BMC_A8 BMC_A9 BMC_A10 BMC_A11 BMC_A12 BMC_A13 BMC_A14 BMC_A15

BMC_A16

5

A0

4

A1

3

A2

2

A3

1

A4

44

A5

43

A6

42

A7

27

A8

26

A9

25

A10

24

A11

21

A12

20

A13

19

A14

18

A15

6

CS

39

BLE

40

BHE

41

OE

17

WE

VDD1 VDD2

VSS1 VSS2

I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8

I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15

33 11

12 34

BMC_D0

7

BMC_D1

8

BMC_D2

9

BMC_D3

10

BMC_D4

13

BMC_D5

14

BMC_D6

15

BMC_D7

16

BMC_D8

29

BMC_D9

30

BMC_D10

31

BMC_D11

32

BMC_D12

35

BMC_D13

36

BMC_D14

37

BMC_D15

38

44-46 44-46 44-46 44-46 44,45 44,45 44,45 44,45 44,45 44,45 44,45 44,45 44,45 44,45 44,45 44,45

SRAM,64kx16

p/n 17MEY

x00_PL_060203: removed implicit

X00_TL_051603

+3.3V_AUX

R1779

1 2

I2C_SEG2_VAUX_SCL I2C_SEG2_VAUX_SDA

NC_7460_TACH1 NC_7460_TACH2 NC_7460_TACH3

NC_7460_TACH4

NC_7460_PWM1 NC_7460_PWM2

Sets ADT7460 addr =2Eh

8.2K-5%

1

SCL

16

SDA

6

TACH1

7

TACH2

4

TACH3

9

TACH4/ADDRESS_SELECT/THERM

15

PWM1

5

PWM2/SMBALERT

8

PWM3/ADDRESS_ENABLE

U3

ADT7460

PROCESSOR TEMP PROBES

LOCAL Ambient TEMP CAN BE READ FROM THIS SENSOR

8.2K-5%

21

8.2K-5%

R1763

1 2

R1761

21

R1762

1 2

R1708

8.2K-5%

1 2

R1709

1 2

100-5%

R1710

1 2

R1711

ROOM=BMC

10V-10%

CB529

1 2

1uF

2.5V/SMBALERT

BMC_TYPE0

22uF 6.3V

1 2

CB535

0 0

1

1 1

CB524

21

+3.3V_AUX

0.1uF 16V

3

VCC

2

GND

13

D1+

12

D1-

11

D2+

10

D2-

14

NC_7460_SMBALERT_N

ADDRESS 2EH

BMC_TYPE1

10 0

+3.3V_AUX

21

C6009

1 2

C601021C6011

0.1uF 16V

C20

DELL Embedded BMC

ODM Embedded BMC

BMC Mezzanine

x00_PL_060203: Added external flash and pullup in case 2178 is not ready

21

this is A20

8.2K-5%

BMC_FAN5_TACH

42,44

BMC_RD_N

44-46

BMC_WR_N

45,46

NC_RY_BY_15

BMC_A1

44-46

BMC_A2

44-46

BMC_A3

44-46

BMC_A4

44-46

BMC_A5

44-46

BMC_A6

44-46

BMC_A7

44-46

BMC_A8

44,45

BMC_A9

44,45

BMC_A10

44,45

BMC_A11

44,45

BMC_A12

44,45

BMC_A13

44,45

BMC_A14

44,45

BMC_A15

44,45

BMC_A16

44,45

BMC_A17

44

BMC_FAN3_TACH

42,44

BMC_FAN4_TACH

42,44

0.1uF 16V

1 2

0.1uF 16V

+3.3V_AUX

NP

R1837

+3.3V_AUX

ROOM=PROC_2

0.1uF 16V

NP

C1592

C741

21

PART_NUMBER=79015

1000pF

50V-10%

21

PART_NUMBER=79015

1000pF

50V-10%

0.1uF 16V

C1590

1 2

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

NP

1 2

C1591

+3.3V_AUX

U_FLASH

NP

26

CE

28

OE

11

WE

47

BYTE

12

RESET

15

RY/BY

25

A0

24

A1

22

A3

21

A4

20

A5

19

A6

18

A7

8

A8

7

A9

6

A10

5

A11

4

A12

3

A13

2

A14

1

A15

48

A16

17

A17

16

A18

VCC

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8A2

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14

DQ15/A-1

VSS1 VSS2

NC1

NC2

NC3

NC4

37

29 31 33 35 38 40 42 44 3023 32 34 36 39 41 43 45

27 46

9 10 13 14

BMC_D0 BMC_D1 BMC_D2 BMC_D3 BMC_D4 BMC_D5 BMC_D6 BMC_D7 BMC_D8 BMC_D9 BMC_D10 BMC_D11 BMC_D12 BMC_D13 BMC_D14 BMC_D15

NC_UFLASH_9 NC_UFLASH_10 NC_UFLASH_13 NC_UFLASH_14

29LV/W800

44-46 44-46 44-46 44-46 44,45 44,45 44,45 44,45 44,45 44,45 44,45 44,45 44,45 44,45 44,45 44,45

x00_pl_060503

0.1uF 16V

0.1uF 16V C166521C1666

1 2

BMC LOG/FRU SEEPROM

+3.3V_AUX

0.1uF 16V 1 2

C248

2 1

220

R333

FW - SEL U3169

PROG-PART SPEC 14967 DISK PROG BLANK PART

U21

1

A0

VCC

2

A1

GND2

3 6

A2 SCL

4

SDA

GND1

24C02

SUB*_U3169

8 7

I2C_SEG2_VAUX_SCL

5

I2C_SEG2_VAUX_SDA

BLANK = 5E703 16KX8

Programmed P/N = XXXXX ???

T3355 5E703

5,44,45,59 5,44,45,59

1

2

TEMP near DIMMs

8

7

6

5

220

R589

12

0.1uF 16V 1 2

C629

+3.3V_AUX

A2D_ROMB_BAT

3

44

R1856

H1_THRM_AN

1 2

0-5%

R1857

1 2

0-5%

R1858

1 2

0-5%

R1859

1 2

0-5%

x00_gt_061903

H1_THRM_CA

H2_THRM_AN

H2_THRM_CA

I2C_SEG2_VAUX_SDA

5,44,45,59

12

x00_pl_060503

12

I2C_SEG2_VAUX_SCL

5,44,45,59

PROPAGATION_DELAY=L:S::500

NC_U27_3

R336

0-5%

21

U27

1

SDA

2

SCL

3

OS

4

GND

LM75

SUB*_5Y977

subbed to 3.3v flavor

VCC

A0

A1

A2

GOING WITH LM75 (No data low reset feature, but immune to noise..qual'd by CSD).

12

x00_sd_051703

LI_BAT_PACK_P

31

NET_PHYSICAL_TYPE=10

R544

1 2

3.01K-1%

NET_PHYSICAL_TYPE=10

VFPCP

41

Q94

2N7002

G

1

D 3

NET_PHYSICAL_TYPE=10

S 2

3.01K-1%

1 2

R545

RAID BATTERY A2D INPUT CIRCUIT

For ADT7460 ECAD to Ensure:

Chip is placed over ground plane. near CPUs. THRM_AN and THRM_CA signals are referencing ground plane.

·THRM_AN and THRM_CA signals are routed away from high voltage (+12V, etc.) traces.

·THRM_AN and THRM_CA signals are routed away from noisy traces (clocks, VRMs, etc.).

·THRM_AN and THRM_CA signals are routed as a differential pair, use guard traces around them.

·THRM_AN and THRM_CA signals are routed using wide traces to minimize noise pickup.

·Place differential cap near pins 10 & 11 and 12 & 13.

·Place common mode caps near pin 15 & 17.

BMC

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

45 OF 611/13/2004

45

X03

4

B D

+3.3V_AUX

4.7K-5%

2 7

1 8

RN208

4.7K-5%

4 5

RN208

1

BMC_TCLK

44

BMC_TRST_N

44

BMC_TDO

44

HUDI_RESET_N

44,46

BMC_TMS

44

BMC_TDI

44

HUDI_RESET_N

44,46

RESET SENSE LINE TO HUDI

4.7K

4.7K-5%

3 6

RN208

12

R535

4.7K

12

R536

NP01

1 3

7

HUDI

+3.3V_AUX

2 4 685

109 1211 1413

SENSE_HUDI_GND_N

46

CA

1

BMC HUDI JTAG

BMC_CPLD R3354

PROG-PART SPEC 14967 DISK PROG BLANK PART

R3356 8T177

2

x00_pl_060603

3

44,45 44,45 44,45 44,45 44,45

x00_pl_052103: added a7

x00_sd_051903

x00_pl_052103: added monitoring of IERR

x00_pl_052103: moved pins cuz pin 12 is input only

x00_pl_052103: added monitoring of THERMTRIP

x00_sd_061203 - connected nets

x00_pl_090803: Added PCI_RST to CPLD

x00_pl_052903: Moved PWR_LED to CPLD

x00_pl_052103: placed shifty bus here to connect to sys cpld

44,45 44,45 33,41

44,45 44,45 44,45 44,45

5,15 5,15

5,15

44,45

40,44 44,45

40,44,46

5,44,50

36,40,44

56

45 44

56

31 31 32 31 31

45

33

45

BMC_A1 BMC_A2 BMC_A3 BMC_A4 BMC_A5 BMC_A6 BMC_A7

3.3VAUX_PWRGOOD_ICH_ESM

BMC_D0 BMC_D1 BMC_D2 BMC_D3

NC_BMC_CS4_IERR3 H2_IERR_3V H1_IERR_3V

NMI_BUTTON_DISABLE

H1_THERMTRIP_3V

BMC_RD_N BMC_WR_N BMC_EXGP_CS_N BMC_RESET_N BMC_ALERT_N BMC_MD1 SYSTEM_PWRGOOD_ESM PWR_BUTTON_DISABLE PCI_RST_PLANAR_2_N

PS1_PRES_N PS2_PRES_N PWR_LED PS1_ALERT_N PS2_ALERT_N

SHIFTY_BMC_DATA_UP_R

5

SHIFTY_BMC_DATA_DN

5

NC_BMC_CS3_IERR4 BMC_TYPE1

CK_32K_VAUX_BMCCPLD

SHIFTY_BMC_CLK

5

SHIFTY_BMC_LATCH

5

BMC_TYPE0

BMC Extended GPIO CPLD

100

91 92 93 94 97 98 99

10 11 12

23 22 21 20 19 17 16 15 14

37 36 35 34 31 30 29 28 27

89 38 39 88

46 57 68 82

18 32 96

26

76

IO1/A0 IO2/A2 IO3/A4 IO4/A6 IO5/A8 IO6/A10 IO7/A12 IO8/A14

3

IO1/B0

4

IO2/B2

5

IO3/B4

6

IO4/B6

8

IO5/B8

9

IO6/B10 IO7/B12 IO8/B13 I9/B14

I1/C0 IO2/C2 IO3/C4 IO4/C5 IO5/C6 IO6/C8 IO7/C10 IO8/C12 IO9/C14

IO1/D0 IO2/D2 IO3/D4 IO4/D6 IO5/D8 IO6/D10 IO7/D12 IO8/D13 I9/D14

CLK0_I CLK1_I CLK2_I CLK3_I

GND_1_46 GND_1_57 GND_1_68 GND_1_82

7

GND_0_7 GND_0_18 GND_0_32 GND_0_96

1

GND_1 GND_26

GND_76

BMC_CPLD

VCC01_45 VCC01_63 VCC01_83

VCCO0_13 VCCO0_33 VCCO0_95

ISPM4128V 75T100C

SUB=SUB*_R3354

IO1/E0 IO2/E2 IO3/E4 IO4/E6

IO5/E8 IO6/E10 IO7/E12 IO8/E14

IO1/F0

IO2/F2

IO3/F4

IO4/F6

IO5/F8 IO6/F10 IO7/F12 IO8/F13

I9/F14

I1/G0 IO2/G2 IO3/G4 IO4/G5 IO5/G6 IO6/G8

IO7/G10 IO8/G12 IO9/G14

IO1/H0 IO2/H2 IO3/H4 IO4/H6 IO5/H8

IO6/H10 IO7/H12 IO8/H13

I9/H14

TCK TDI TDO TMS

VCC_25 VCC_40 VCC_75GND_51 VCC_90

41 42 43 44 47 48 49 50

53 54 55 56 58 59 60 61 62

73 72 71 70 69 67 66 65 64

87 86 85 84 81 80 79 78 77

24 2 74 52

45 63 83

13 33 95

25 40 7551 90

H1_CPU_PRES_N

H2_CPU_PRES_N VRD1_THERMTRIP_N VRD2_THERMTRIP_N

BACKPLANE_PRES_N

PARAPORT_PRES_N

SER_MODE_3B_N

LED_CTRL2

PFAULT_RESET_R PFAULT_LATCH_N

SER_MODE_0_1A_N

SER_MODE_1B_N

SER_MODE_2_N SER_MODE_3_N BMC_LISTEN_N

FAN_LED0

H2_THERMTRIP_3V

NC_THERMTRIP_CPU3

FAN_LED1 FAN_LED2 FAN_LED3 FAN_LED4 FAN_LED5 FAN_LED6 FAN_LED7 FAN_LED8

LED_CTRL0 LED_CTRL1 LED_ID_BLUE LED_ID_YELLOW

PS1_AC_GOOD PS2_AC_GOOD

PS_AC_GOOD NC_BMC_CS2

NC_THERMTRIP_CPU4

CPLD_TCK CPLD_TD1 CPLD_TD2 CPLD_TMS

5,31,32,40 5 5,31 5,31,32,40

5,12 5,12 5,9

x02_PL_091703: Connected VRD Thermtrip

5,9 5,32 33,43

x02_PL_091503: Moved PARAPORT_PRES_N to CPLD

48

x00_pl_052103: moved led_ctrl cuz pin 62 is input only

42

x02_sd

5,44

x02_sd

5,44

48

48,50

48 42

x00_pl_052103: moved fan_led0 cuz pin 73 is input only

5,15

42 42 42 42 42 42 42 42

42

42 32,43 32,43

X00_PL_052003: Changed BLINK_LEDx to LED_CTRLx

31

44

Note JTAG Chaining!!!

+3.3V_AUX

10V-10%

CB500

CB512

1 2

CB487

1uF

21

BMC BOOT MODE SEL JUMPER

+3.3V_AUX

R215

1 2

8.2K-5%

R214

1 2

8.2K-5%

NP*

p/u on pg. 40

J11

81526 are the jumper plugs

SENSE_HUDI_GND_N

BMC_MD1

x02_TJ_081803

NP*

1 2

FOR FLASH through Serial: pop Jumper J11.

CPLD detects and forces to serial Mode 1B

BMC goes into Boot mode automatically.

CPLD issues a long BMC reset

46

+3.3V_AUX

12 13

74VHC08

40,44,46

BMC BOOT OPTIONS

+3.3V_AUX

21

R167

8.2K-5%

14

U7

11

MD1 = 1, MD2 = 1: Normal Mode

MD1 = 0, MD2 = 0: Boot Mode

MD1 = 1, MD2 = 0: HUDI Mode

BMC_MD2_N

2

44

3

4

subsys done

ROOM=BMC

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004

DC

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

46 OF 61

4

X03

A B C

FW I2C Bus Segmentation

Segment Address Device

D

1

0 30h RAC 0 C0h Primary GEM 0 C2h Secondary GEM 0 C4h Primary 1x2 GEM

Primary GEM I2C bus 58h LM81 Primary GEM I2C bus 90h LM75 Primary GEM I2C bus AEh FRU

Secondary GEM I2C bus AAh FRU

Prim. 1x2 GEM I2C bus 90h LM75

2

Prim. 1x2 GEM I2C bus ACh FRU

1 82h Tabor_0 1 80h Tabor_1

1

2

2 4Ah Planar CPLD 2 5Ch Planar LM85 2 90h Planar LM75 2 A0h SEL

3

3 92h Riser Primary LM75

3

3 94h Riser Secondary LM75 (2U/5U) 3 96h Riser Tertiary LM75 (5U) 3 A2h Riser FRU

4 34h PS1 NE1617A 4 ACh PS1 FRU 4 7Ch PS1 I/O Expander 4 9Ch PS2 NE1617A 4 AEh PS2 FRU 4 7Eh PS2 I/O Expander

4

5 98h Control Panel LM75

TITLE

I2C ADDRESSES

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

LINDY PLANAR

DWG NO.

DATE

COMPUTER CORPORATION

AUSTIN,TEXAS

REV.

SHEET

47 OF 611/13/2004

4

X03D1660

DCBA

A B C

nc nc

D

+3.3V_AUX

SERIAL MUX

567

21

1

1 2

C15621C155

0.1uF 16V

1 2

C154

0.1uF 16V

C157

0.1uF 16V

1 2

C153

0.1uF 16V

SER_SOUT1

50

SER_SIN1

50

SER_DTR1_N

50

SER_DSR1_N

50

SER_RTS1_N

50

SER_CTS1_N

50

SER_DCD1_N

50

SER_RI1_N

50

x02_pl_091803: Pulled RI to 3.3VAux it is monitored at power off

+3.3V_AUX

2

SIO_SOUTA

40

SIO_SINA

40

SIO_DTRA_N

40

SIO_DSRA_N

40

SIO_RTSA_N

SIGNALS CONNECT TO SIO

BMC_RX0

44,48

BMC_TX0

44,48

BMC_CTS0_N

44,48

BMC_RTS0_N

44,48

+3.3V_AUX

3

8

RN85

1

NC_RN85_1

SER_SIN2

50

SER_SOUT2

50

SER_DSR2_N

50

SER_DTR2_N

48,50

SER_CTS2_N

50

SER_RTS2_N

50

NC_U16_17 NC_U16_3

X00_TL_061103_Added SIO_DCD to short to SIO_DSR via SER_DTR2_N.

567

8.2K

432

+3.3V_AUX

R566

8.2K-5%

1 2

R567

1 2

8.2K-5%

46

+3.3V_AUX

SER_MODE_2_N

NC_U11_19

NC_U11_11 NC_U11_13 NC_U11_15 NC_U11_17

SER_MODE_3B_N

+3.3V_AUX

21

R217

8.2K-5%

+3.3V_AUX

R216

1 2

40 40 40 40

R1765

8.2K-5%

1 2

1

1G

19

2G

2

1A1

4

1A2

6

1A3

8

1A4

11

2A1

13

2A2

15

2A3

17

2A4

SUB*_C2406

x02_tj_081803

8.2K-5% 1

1G

19

2G

2

1A1

4

1A2

6

1A3

8

1A4

11

2A1

13

2A2

15

2A3

17

2A4

SUB*_C2406

x02_tj_081803

SIO_CTSA_N SIO_DCDA_N SIO_RIA_N

U11

VCC

1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4

QS3244

U16

VCC

1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4

QS3244

+3.3V_AUX

21

R565

R564

1 2

+3.3V_AUX

20

18 16 14 12 9 7 5 3

20

18 16 14 12 9 7 5 3

8

RN82

8.2K-5% 1

876

RN81

8.2K-5% 123

NC_U11_9 NC_U11_7 NC_U11_5 NC_U11_3

8.2K

432

+3.3V

5

8.2K

4

46,50

x00_tj_050103

SER_MODE_3_N

BMC_LISTEN_N

46

SER_MODE_1B_N

46

44,48

44,48 44,48 44,48

46

6647D sub is an SSOP with more on the AVL

+3.3V_AUX

VCC

1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4

+3.3V_AUX

20

18 16 14 12 9 7 5 3

R229

1 2

8.2K-5% 1

19

2 4 6 8

11 13 15 17

U13

1G 2G

1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4

QS3244

SUB*_C2406

x02_tj_081803

+3.3V_AUX

21

R228

8.2K-5%

R1764

8.2K-5% 1

1G

19

BMC_RX0 NC_U14_4 NC_U14_16 NC_U14_6

BMC_TX0 BMC_RTS0_N BMC_CTS0_N

2G

2

1A1

4

1A2

6

1A3

8

1A4

11

2A1

13

2A2

15

2A3

17

2A4

SUB*_C2406

U14

QS3244

+3.3V_AUX

20

VCC

18

1Y1

16

1Y2

14

1Y3

12

1Y4

9

2Y1

7

2Y2

5

2Y3

3

2Y4

x02_tj_081803

+3.3V_AUX

SER_MODE_0_1A_N

R227

1 2

8.2K-5% 1

1G

19

2G

2

1A1

4

1A2

6

1A3

8

1A4

11

2A1

13

2A2

15

2A3

17

2A4

U15

QS3244

SUB*_C2406

VCC

1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4

+3.3V_AUX

20

18 16 14 12 9 7 5 3

x02_tj_081803

NC_U14_14 NC_U14_12NC_U14_8

NC_U14_3NC_U14_17

x03_tj_010604

R6008

1 2

33-5%

NC_SER_RPACK

876

RN209

123

5

8.2K

4

SER_SOUTA SER_SINA SER_DTRA_N SER_DSRA_N SER_RTSA_N SER_CTSA_N SER_DCDA_N SER_RIA_N

35 35 35 35

SIGNALS CONNECT TO XCVR

35 35 35 35

This page will not be ROOM'ed.

Explanation of U16 twisting logic.

BIOS

COM Tx Rx

CTS RTS

DTR

DSR DCD

RAC Uart-

Tx Rx

CTS RTS

DTR

DSR DCD

1

2

3

4

NULL MODEM BETWEEN BMC AND SIO

subsys done

NULL MODEM BETWEEN RAC AND SIO

BMC, Serial Port Muxing

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

DATE

DCBA

COMPUTER CORPORATION

AUSTIN,TEXAS

REV.

SHEET

48 OF 611/13/2004

4

X03D1660

A B C

D

1

2

1

2

3

4

THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP., EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE

SERIAL PORT MUXING LOGIC

REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

C

PROPRIETARY NOTE

TITLE

LINDY PLANAR

DWG NO.

D1660 X03

DATE

1/13/2004 49 OF 61

DBA

COMPUTER CORPORATION

AUSTIN,TEXAS

REV.

SHEET

3

4

B D

CA

1-21-2004_9:58

1

ROOM=RAC

+3.3V

RAC_CONN

A1

SER_DCD1_N

48

SER_DSR1_N

48

SER_SIN1

48

SER_RTS1_N

48

SER_SOUT1

48

SER_CTS1_N

48

SER_DTR1_N

48

SER_RI1_N

48

ICH_PIRQ_RAC_A_N

33

ICH_PIRQ_RAC_C_N

2

31,33,36,50,58

3

PCI_Clock splits on DC

PROPAGATION_DELAY=L:S::500

PCI0_AD21

150-5%

12

R1481

+3.3V_AUX

x03_sd changed port number

3

31,33,36,58

31,33,36,58 31,33,36,58 31,33,36,58

31,33,36,58

31,33,58

31,33,36,58

31,33,36,58 31,33,36,58 31,33,36,58

31,33,36,58 31,33,36,58

31,33,36,50,58

31,33,36,58 31,33,36,58 31,33,36,58

31,33,36,58 31,33,36,58

31,33,58

33

37

33

CK_33M_RAC

PCI0_REQ_RAC_N

33

PCI0_GNT_RAC_N

33

PCI0_AD2

PCI0_AD4 PCI0_AD6 PCI0_CBE0_N

PCI0_AD9 PCI0_AD11 PCI0_AD13

PCI0_AD15 PCI0_SERR_N PCI0_TRDY_N

PCI0_STOP_N PCI0_PAR PCI0_CBE2_N

PCI0_AD17 PCI0_AD19 PCI0_AD21

PCI0_AD23 PCI0_AD24 PCI0_AD26

PCI0_AD28 PCI0_AD30 PCI0_LOCK_N PCI0_SP_IDSEL

PCI0_REQ_RAC_IDE_N

33

I2C_IPMB_RAC_SCL

50

USB_RAC0-

USB_RAC0+

ATI_M6C8_TXCM

37

ATI_M6C8_TXCP

37

ATI_M6C8_TX2M

37

ATI_M6C8_TX2P

37

ATI_M6C8_TX1M

37

ATI_M6C8_TX1P

37

ATI_M6C8_TX0M

37

ATI_M6C8_TX0P

37

ATI_M6C8_DVIDDCDATA

SUB=SUB*_U1474

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

A21

A22

A23

A24

A25

A26

A27

A28

A29

A30

A31

A32

A33

A34

A35

A36

A37

A38

A39

A40

A41

A42

A43

A44

A45

A46

A47

A48

A49

A50

A51

A52

A53

A54

A55

A56

A57

A58

A59

A60

A61

A62

A63

A64

A65

A66

A67

A68

A69

A70

CONN2X70 PLUG

EXTENDED HEIGHT

B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70

B1

B2

B3

B4

B5

B6

B7

B8

B9

B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57

NC_RAC_CONN_A57

B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70

+5.0V Riser

SER_DSR2_N

SER_SIN2

SER_RTS2_N

SER_SOUT2

SER_CTS2_N

SER_DTR2_N

ICH_PIRQ_RAC_B_N ICH_PIRQ_RAC_D_N

PCI_RST_RAC_N

NC_RAC_CONN_B14

PCI0_AD0 PCI0_AD1 PCI0_AD3

PCI0_AD5 PCI0_AD7 PCI0_AD8

PCI0_AD10 PCI0_AD12 PCI0_AD14

PCI0_CBE1_N PCI0_PERR_N PCI0_IRDY_N

PCI0_DEVSEL_N

PCI0_FRAME_N

PCI0_AD16

PCI0_AD18 PCI0_AD20 PCI0_AD22

PCI0_CBE3_N

PCI0_AD25 PCI0_AD27

PCI0_AD29 PCI0_AD31

PCI0_GNT_RAC_IDE_N

I2C_IPMB_RAC_SDA

BMC_RDY_N

SER_MODE_3_N

SYSTEM_PWRGOOD_ESM

NC_RAC_CONN_A59

NC_RAC_CONN_B63 NC_RAC_CONN_A64 NC_RAC_CONN_A65 NC_RAC_CONN_A66

ATI_M6C8_DVIDDCCLK

48

48 48 48 48

48

33 33 5

31,33,36,58 31,33,36,58 31,33,36,58

31,33,36,58 31,33,58 31,33,36,58

31,33,36,58 31,33,36,58 31,33,36,58

31,33,36,58 31,33,36,58 31,33,36,50,58

31,33,36,58 31,33,36,58 31,33,36,58

31,33,36,58 31,33,36,58

33

50

33,44,45 46,48

5,44,46

RAC_RDY_N

+3.3V

37

IPMB_RST_N

+3.3V_AUX

PCIO_RACIDE_IDSEL

RAC Serial Mode is on.

32,44,45

33,44,45

32,44,59

+3.3V

1 2

C1662

+3.3V_AUX

1 2

C1752

RAC_PRSNT_N

21

C1663

0.1uF 16V0.1uF 16V

21

C1760

150-5%

R47

I2C_IPMB_SCL

1 2

C1664

0.1uF 16V

PROPAGATION_DELAY=L:S::500

PCI0_AD22

12

33,44,45

31,33,36,50,58

R448

21

I2C_IPMB_RAC_SCL

R449

0-5%

1 2

0-5%

+5.0V Riser

I2C_IPMB_RAC_SDAI2C_IPMB_SDA

0.1uF 16V 1 2

C17

+3.3V_AUX

R489

1 2

x02_sd_added cap

4.7K NP*

R491

21

4.7K NP*

50

2

3

ADD*_N1870 ADD*_N1870

4 4

ADD*_N1870 ADD*_N1870

Rilato RAC Daughter Card Interface Connector

subsys done

A B

Stand-offs for RAC card

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

50 OF 611/13/2004

X03

B D

CA

1-21-2004_9:58

1

1 2

12

R906

1uF 6.3V

+1.5V

21

C906

Q9

4

D ISL9N312AD3ST

1 G

3

S

R901

1 2

VCC

100-1%

8.2K-5%

x03_sd added res

1 2

R59

D40

1N914

10uF 6.3V

R902

1 2

4.75K-1%

5.11K-1%

SUB*_P3882

31

21

C902

1 2

511-1%

R907

1 2

1K-5%

1uF

C903

10V-10%

R900

R903

1M-5%

1 2

NP

VCC VCC

1 2

1K-5%

R909

21

1K-5%

0.1uF 16V

todo tune resistors, change to 0.1%

R904

SUB*_P3882

1 2

5.11K-1%5.11K-1%

21

R905

SUB*_P3882

R908

21

6521DRIVE2 6521FB2

NC_6521_13

1 2

15 16

13 14

5 4

x02_sd

VCC

1uF

C904

DRIVE2 FB2

DRIVE3 FB3

DRIVE4 FB4

GND COMP

HIP6521

1 2

C905

10V-10%

U6

VCC

OCSET

BOOT UGATE PHASE LGATE

PGND

FB

0.1uF 16V

11 12 7 8

NC_6521_8NC_6521_15

6 10

NC_6521_10

9 3

6521FBPWM NC_6521_4

6521OCSET

1K-5%

21

R911

1K-5%

+CPU_VTT

1 2

R910

C18

+

C19

2 1

560uF

4V-20%

1.2V CPU I/O (VTT)

Input Output Max Current Dest

Vout

5.11k, 1% Res's are subbed to P3882, 5.11k, 0.1%

2

+1.5v +1.2V

6.0A Peak, ~3.5A Thermal CPU I/O (VTT)

0.8*(1+R1/R2) = 1.21v

+CPU_VTT

C901

DC2DC_CPUVTT_EN

5,6,59

Note, this enable signal is active low for the 6521.

This is opposite of the 40W DCDC on page 6.

1

2

+3.3V_AUX

21

1K-1%

Q150

3904

R1932

1 2

R1931

3

1

2

2.49K-1%

(1.2v)

3

+CPU_VTT

R1930

1 2

499-1%

CPU_VTT_PWRGOOD

X03_GT_011404

This is inverted

5,6

4 4

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

51 OF 611/13/2004

X03

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

3

B D

CA

1-21-2004_9:58

1

+12V

1 2

C1741

10uF

C1742

16V 10%

21

10uF

C1743

16V 10%

Have p/u on pg 42

10uF

1 2

16V 10%

extra p/u's for derating

x02_sd

Have p/u on pg 42

FANSPEED_1

42,44

extra p/u's for derating

x02_sd

Have p/u on pg 42

21

NP13

R1892

FANSPEED_3

42,44

extra p/u's for derating

NP*

42,44

21

4.7K

NP13

R1899

NP*

4.7K

NP13

R1893

1 2

+3.3V

NP*

R1624

21

4.7K

NP*

R1895

NP*

FANSPEED_2

R1900

1 2

+3.3V

4.7K

21

R1896

1 2

+3.3V

R1631

4.7K

R1757

1 2

21

NP13

R1894

Q125

8.2K-5%

2N7002

4.7K

NP*

1 2

2N7002

21

NP13

R1901

Q123

8.2K-5%

2N7002

4.7K

NP13

NP*

1

G

NP13

21

R4506

Q127

8.2K-5%

G

NP*

4.7K

1

G

NP13

+12V

21

R1625

21

R1623

D

S

4.7K

NP*

1

+12V

NP13

R1617

3

2

+12V

R1632

R1633

D

S

R1616

1 2

D

3

S

2

4.7K

0-5%

1 2

3

2

4.7K

0-5%

4.7K

0-5%

NP13

R1618

560

NP*

R1626

1 2

560

NP13

NP*

R1634

560

x02_sd_allows faster switch speeds

Q132

NP*

3904

1

21

1

NP*

3906

Q133

Q134

3904

1

3906

Q135

Q136

NP*

3904

1

21

1

NP*

3906

Q137

21

10uF

C1740

16V 10%

2

3

resistor is NP* so that the rest of the circuit can be populated yet not used

VCC

NP13

3

21

4.7K

NP*

R1903

2

3

VCC

NP13

3

21

4.7K

NP*

R1904

2

3

21

4.7K

NP*

R1905

2

3

NOT POPULATED FOR ANY BUILD

D61

12

MBRS340T3

DPAK

3

S

G

1

C1593

1 2

.01uF 50V

C1594

1 2

NP13

D62

2 1

MBRS340T3

DPAK

3

S

NP13

G

1

.01uF 50V

1 2

NP13

VCC

MBRS340T3

NP*

DPAK

3

S

NP*

G

.01uF 50V

NP*

D

4

20P03

Q122

D

4

20P03

Q124

C1598

1 2

C1597

NP*

D63

12

D

1

C1602

1 2

.01uF 50V

C1601

1 2

NP*

4

20P03

Q126

NP*

R1621

R1619

1 2

R1620

1 2

SUB02_782NY

1 2

.604-1%

.604-1%.604-1%

R1622

1 2

.604-1%

SUB02_782NY

12

+

270uF

C1595

16V-20%

NP13

--STUART 12/9/2002

21

R1629

R1627

.604-1%

21

R1628

R1630

.604-1%

.604-1% .604-1%

+

2 1

270uF

C1600

16V-20%

NP13

--STUART 12/9/2002

SUB02_782NY

NP13

SUB ALL TO 1 OHM

NP13

SUB02_782NY

NP13

SUB02_782NY

NP13

SUB ALL TO 1 OHM

SUB02_782NY

SUB9_782NY

R1635

1 2

R1636

1 2

.604-1% .604-1%

SUB9_782NY

21

10uF

1 2

C1668

C1667

16V 10%

NP*

1 2

R1758

R1613

0-5%

21

NP13

FANPWR_ZONE2

NP0123

SUB ALL TO 1 OHM

NP0123

10uF

1 2

C1670

C1669

16V 10%

NP*

FANPWR_ZONE1

42

ROOM=FANS_FRONT

1 2

R1614

R1615

0-5%

21

NP13

x02_sd_added R1891 and R1892 for proper derating.

FANPWR_ZONE3

0-5%

R1891

0-5%

NP13

R4511

Number of zero-ohm's required:

21

NP13

Zero-ohm's rated at 1 A. Derating by 60% of power, current is derated to sqrt(60%) = 77.46%. Max current with derating per zero-ohm is .7746 A. Need 2A per fan, thus 4A total. Thus, need ceiling( 4 / .7746 ) zero-ohm's.

42

ROOM=FANS_FRONT

42

ROOM=FANS_REAR

21

10uF

16V 10%

NP*

= 6.

1

2

3

4 4

A B

x03_sd

FAN SPEED CONTROL

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

COMPUTER CORPORATION

TITLE

AUSTIN,TEXAS

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 52 OF 61

SHEET

DC

REV.

X03

B D

CA

1-21-2004_9:58

1

Micro-Vu, not part of design, implemented only on break-away board

DISPLAY- TOP

R6011

0-5%

NP*

21

R6012

MV_GND

x03b_sd

0-5%

NP*

MV_GND

MV_STRAP_0 MV_STRAP_1 MV_STRAP_2

1 2

R6013

53

44 45 46 47 48

2 3 4 7 8

9 10 14 15 16 17

43 18 19 42

29

5

13 37

53

53 53 53

IO1/A0/GOE0 IO2/A1 IO3/A2 IO4/A3 IO5/A4 IO6/A5 IO7/A6 IO8/A7 IO9/A8 IO10/A9 IO11/A10 IO12/A11 IO13/A12 IO14/A13 IO15/A14 IO16/A15

CLK0_I CLK1_I CLK2_I CLK3_I

GND_1_29

GND_0_5

GND_13 GND_37

ISPM4032V-75T48C

SUB23_C4139

MVU_CPLD

IO16/B15/GOE1

TQFP48

NP01

MV_3V

0.1uF 16V 2 1

IO1/B0 IO2/B1 IO3/B2 IO4/B3 IO5/B4 IO6/B5 IO7/B6 IO8/B7 IO9/B8

IO10/B9 IO11/B10 IO12/B11 IO13/B12 IO14/B13 IO15/B14

VCC0_1_30

VCCO_0_6

VCC_12 VCC_36

53

0.1uF 16V

C6002

12

NP01

TCK TDI TDO TMS

0.1uF 16V

C6003

NP01

2 1

20 21 22 23 24 26 27 28 31 32 33 34 38 39 40 41

11 1 35 25

30

6

12 36

NP01

C6004

SMVU_CPLD_TCK SMVU_CPLD_TDI SMVU_CPLD_TDO SMVU_CPLD_TMS

0.1uF 16V C6005

12

NP01

MV_STRAP_2

SMVU_D0 SMVU_D1 SMVU_D2 SMVU_D3 SMVU_D4 SMVU_D5 SMVU_D6

SMVU_WR_N

SMVU_A1 SMVU_A0

SMVU_BL_N

SMVU_RST_N

53 53 53 53

53 53 53 53 53 53 53 53 53 53 53 53 53

53 53 53 53

SMVU_CPLD_TCK SMVU_CPLD_TDO SMVU_CPLD_TDI SMVU_CPLD_TMS

8.2K-5%

NP01

1 2

MV_3V

R6000

MV_GND

53

MVU_JTAG

1 2 3 4 5 6

53

2

NP*

3

MV_5V

53

0.1uF 16V

0.1uF 16V C6001

C6000

2 1

12

NP01

MVU_DSPL

3 5 7

9 11 13

53

MVU_CON

HEADER

53

2X7

Samtec

5

D0

6

D1

7

D2

8

D3

9

D4

10

D5

11

D6

SLY2016

SUB23_5C454

NP01

21 4 6 8 10 12 14

SUB23_N3596

NP01

SMVU_D0

53

SMVU_D1

53

SMVU_D2

53

SMVU_D3

NC_CON_2

NC_CON_6

NC_CON_10

53

SMVU_D4

53

SMVU_D5

53

SMVU_D6

53

MV_3V

MV_5V

53

MV_GND

SQT-107-01-L-D-RA

2

3

21

3

4

VCC

1

WR

2

A1

3

A0

12

BL

13

CLR

14

GND

MV_GND

MV_CK_33M

MV_PCI_RST_N

MV_LPC_AD0 MV_LPC_AD1 MV_LPC_AD2 MV_LPC_AD3

MV_LPC_FRAME_N

Micro-Vu

2

31

Planar

SMVU_WR_N

SMVU_A1 SMVU_A0

SMVU_BL_N

SMVU_RST_N

53

53 53 53 53 53 53 53

MV_GND

53

53 53 53 53 53

1 2

0-5%

NP01

MV_STRAP_0

53

MV_PCI_RST_N

53

MV_LPC_AD0

53

MV_LPC_AD1

53

MV_LPC_AD2

53

MV_LPC_AD3

53

MV_LPC_FRAME_N

53

MV_STRAP_1

53

MV_CK_33M

53

MV_GND

53

4 4

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

X03

subsys done

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 53 OF 61

DC

B D

CA

1-21-2004_9:58

1

3.3VAux from PS

Voltage Depletion Detect

PwrGood Detect

VAUX_GOOD

2

P3V3AUX_PS

31,54

1uF 6.3V

C1622

1 2

8.2K-5%

1 2

53

TLV431A

R1780

VAKILL_1V24_REF

50V-10%

D67

2200pf

4

2 1

C1652

10K-1% 3.01K-1%

R1781

21

R1782

21

+3.3V_AUX

8.2K-5% R1832

21

VAKILL_287MV_REF

C1660

2200pf

50V-10%

5

4

8.2K-5%

12

U62 3

LMV339

+

2

V G

-

12

VAKILL_PWR_EN_N

1 2

R1783

VAUX_DEPLETED

R1784

21

1N914

D72

31

Reset

Q

SR FF

Set

8.2K-5%

1 2

R1786

R1831

U62 3

LMV339

7

+

V G

6

-

12

21

1

Q129

3.3VAux to systemPwr Supervisor Chip

+3.3V_AUX

R1852

P3V3AUX_PS

31,54

Q130

321

4

765 8

1 2 3

SI4463DYSI4463DY

4

+3.3V_AUX

85 6 7

1 2

0-5%

R1853

0-5%

R1854

1 2

0-5%

R1855

0-5%

21

x00_sd_061803

1

2

8.2K-5% R1797

12

C1629

2

VCC

RESET

GND

3

DS1818

U63

1

12

VAKILL_PG

3

0.1uF 16V

SUB=SUB*_Y1351

VAUXKILL_1V65_REF

U62 3

11

+

V G

10

-

12

VAKILL_PWR_KILL_N

LMV339

13

8.2K-5%8.2K-5%

1 2

R1785

U62 3

LMV339

9

+

14

V G

8

-

12

R1787

1 2

VAKILL_PWR_EN_N_RC

47K-5% 0.1uF 16V

x00_tj_061403

C1623

1 2

301-1%

Q131

2N7002

1 2

1

G

301-1%

R1789

R1788

21

D

3

S

2

ROOM=VAUX_RESET

x00_sd_051903

4 4

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

54 OF 61

X03

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004

DC

3

B D

CA

1-21-2004_9:58

1

21

C833

+3.3V

0.1uF 16V

21

C830

0.1uF 16V

C831

1 2

0.1uF 16V

21

C832

0.1uF 16V

ROOM=FWH

1

FWH U3146

+3.3V

R1314

U50

10

VCC1

31

VCC2

39

VCCA

11

VPP

FWH_WP_N

2

IC

12

RST

9

CLK

25

FWH0

26

FWH1

27

FWH2

28

FWH3

38

FWH4

24

ID0

23

ID1

22

ID2

21

ID3

20

TBL

19

WP

29

GND1

30

GND2

40

GNDA

CAMINO FWH

TSOP40

82802AB - 4Mb 82802AC - 8Mb

SUB*_U3146

FWH_IC

21

R760

PCI_RST_PLANAR_N

3

PROPAGATION_DELAY=L:S::500 PROPAGATION_DELAY=L:S::500

R52

1 2

470

8.2K-5% R50

470

CK_33M_FWH LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC_LFRAME_N

FWH_TBL_N

21

RN174

8.2K

59

8 7 6 5

FWH_ID0

5,27,40,58,59

5,33,40,44,59 5,33,40,44,59 5,33,40,44,59 5,33,40,44,59 5,33,40,44,59

+3.3V

21

4.7K

R1352

1 2 3

2

4

GPO_FWH_WP_N

33

FGPI4 FPGI3 FPGI2 FPGI1 FPGI0

RFU1 RFU2 RFU3 RFU4 RFU5 INIT

NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8

7 15 16 17 18 32 33 34 35 36 37

1 3 4 5 6 8 13 14

NC_FWH_RFU1 NC_FWH_RFU2 NC_FWH_RFU3 NC_FWH_RFU4 NC_FWH_RFU5

NC_FWH_NC1 NC_FWH_NC2 NC_FWH_NC3 NC_FWH_NC4 NC_FWH_NC5 NC_FWH_NC6 NC_FWH_NC7 NC_FWH_NC8

FWH_FGPI4

FWH_FGPI3 FWH_FGPI2 FWH_FGPI1 FWH_FGPI0

8.2K-5% 1 2 3 4

59

1 2

RN173

8.2K

8 7 6 5

H_INIT_N_3V

+3.3V

R1571

1 2

3

2

330-5%

Q73 3904

1

+3.3V

21

R1576

3

2

470

Q74 3904

1

R1575

470

PROG-PART SPEC 14967 DISK PROG BLANK PART

21

H_INIT_N

11,33

Y2955 N1992

2

5688T---Socket 6C739---SSMicro FWH 4Mbit

3

5906D---Intel FWH 8Mbit N1992---Multi Vender AVL

FWH

4 4

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

55 OF 611/13/2004

X03

subsys done

A B

FIRMWARE HUB

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

3

B D

CA

1

USB 2.0 Connection

+5.0V Riser

21

6V

FS6

1.5A

L116

FERRITE

x02_tj_081803

x00_tj_060603

16V-20%

C1204

100uF

+

USB_1

USB_2

1 2

USB

C1203

16V-20%

100uF

+

1 2 3 4

C6006

21

USB_P4-_L USB_P4+_L

USB_P5-_L USB_P5+_L

100uF

+

2

ROOM=SW

+3.3V_AUX

8.2K-5% R343

BTN_RST

1 2

3

PUSH BUTTON

NP01

3 4

21

RESET_BTN_N

x00_sd_051703 - refdes

5

21

C1287

length matched +/-10 mils

21

0.1uF 16V

X00_GT_051303

<500 mils

1 2

1812-1.5A

21

470pF

C1308

50V-10%

1 2

470pF

C1309

50V-10%

V_5P0_USB_BACK45_N

21

R1240

8.2K-5%

L122

2 1

3

CM CHOKE

DLW21SN900SQ2

L123

2 1

3

CM CHOKE

DLW21SN900SQ2

SUB*_8M262

12

4

SUB*_8M262

12

4

33

x03_sd changed port numbers

USB_BACK4-

USB_BACK4+

USB_BACK5-

USB_BACK5+

33

length matched +/-50 mils

33

length matched +/-50 mils

ROOM=USB

2

3

+3.3V_AUX

8.2K-5%

1 2

x03_sd

D68

BAR43

R1577

x00_sd_051703 - pu

ICH_PWRBTN_N

GPE_NMI_N

13

33,44

5,33,41,44,59

USB CONNECTORS & BUTTONS

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

COMPUTER CORPORATION

TITLE

AUSTIN,TEXAS

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 56 OF 61

SHEET

DC

REV.

X03

+3.3V_AUX

BTN_PWR_ON

NP01

32

3 4

BTN_NMI

32

3 4

2.7K-5% 2.7K-5% R573

21

1 2

R1440

R49

1K-5%

1 2

R51

1K-5%

21

10V-10%

1uF

46

1 2

C329

PWR_BUTTON_DISABLE

46

10V-10%

1 2

1uF

C327

NMI_BUTTON_DISABLE

Q146

2N7002

Q19

2N7002

1

G

8.2K-5%

1 2

R1850

+3.3V_AUX

111410

VHC14

GPE_NMI_BUTTON_N must be VAux output

D

3

1

G

S

2

A B

+3.3V_AUX

4 4

BTN_PWR

1 2

PUSH BUTTON

BTN_NMI

1 2

PUSH BUTTON

NP01

subsys done

U58

D36

8149

VHC14

Diode turns this into an open-drain driver

D

3

S

2

U58

GPE_NMI_BUTTON_N

Diode turns this into an open-drain driver

3 1

BAR43

B D

BMC Spares

Spares

1

+3.3V_AUX

5146

R1611

1K-5%

VBAT

33,34,41

R8

1 2

1K-5%

U57

111410

VHC14

1413U57

VHC14

12

2

CLIP13

P1 P2 V1 V2 V3 V4 V5 V6 V7 V8

V9 V10 V11 V12 V13 V14 V15 V16

SMT GND CLIP

86 SLOT

16 GND VIAS

BOTTOM ETCH .300"

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

3

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

4 4

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

SUB=SUB*_0342R

ADD1=ADD*_0342R

CLIP5

P1 P2 V1 V2 V3 V4 V5 V6 V7 V8

V9 V10 V11 V12 V13 V14 V15 V16

SMT GND CLIP

86 SLOT

16 GND VIAS

SUB=NP*

CLIP4

P1

P2

V1

V2

V3

V4

V5

V6

V7

V8

V9 V10 V11 V12 V13 V14 V15 V16

SMT GND CLIP

86 SLOT

16 GND VIAS

SUB=SUB*_0342R

ADD1=ADD*_0342R

CLIP1

P1

P2

V1

V2

V3

V4

V5

V6

V7

V8

V9 V10 V11 V12 V13 V14 V15 V16

SMT GND CLIP

86 SLOT

16 GND VIAS

SUB=SUB*_0342R

ADD1=ADD*_0342R

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

subsys done

+3.3V_AUX

U38121413U38

VHC14VHC14

Shroud Clips

+3.3V_AUX

1413U58

12

21

x00_sd_052903 - SP's were tied together

NC_U57_12

NC_U57_10

VHC14

SP_U58_12

Heatsink Hooks

CLIP3

P1 P2 V1 V2 V3 V4 V5 V6 V7 V8

V9 V10 V11 V12 V13 V14 V15 V16

SMT GND CLIP

86 SLOT

16 GND VIAS

SUB=SUB*_0342R

ADD1=ADD*_0342R

CLIP2

P1

P2

V1

V2

V3

V4

V5

V6

V7

V8

V9 V10 V11 V12 V13 V14 V15 V16

SMT GND CLIP

86 SLOT

16 GND VIAS

SUB=SUB*_0342R

ADD1=ADD*_0342R

CLIP6

P1

P2

V1

V2

V3

V4

V5

V6

V7

V8

V9 V10 V11 V12 V13 V14 V15 V16

SMT GND CLIP

86 SLOT

16 GND VIAS

SUB=SUB*_0342R

ADD1=ADD*_0342R

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

A B

CLIP10

P1 P2 V1 V2 V3 V4 V5 V6 V7 V8

V9 V10 V11 V12 V13 V14 V15 V16

SMT GND CLIP

86 SLOT

16 GND VIAS

BOTTOM ETCH .300"

SUB=SUB*_0342R

ADD1=ADD*_0342R

CLIP9

P1

P2

V1

V2

V3

V4

V5

V6

V7

V8

V9 V10 V11 V12 V13 V14 V15 V16

SMT GND CLIP

86 SLOT

16 GND VIAS

SUB=SUB*_0342R

ADD1=ADD*_0342R

CLIP11

P1 P2 V1 V2 V3 V4 V5 V6 V7 V8 V9

V10 V11 V12 V13 V14 V15 V16

SMT GND CLIP

86 SLOT

16 GND VIAS

BOTTOM ETCH .300"

SUB=SUB*_0342R

ADD1=ADD*_0342R

REG08 A NGO COUPON TEST

x00_tj_052003

SHD_1

1 2

HEATSINK

SHD_2

1 2

HEATSINK

SUB=SUB*_K4775

HS4

1 2

HEATSINK

HS_MID_PRES_N

HS2

1 2

HEATSINK

Z14

21

NEGCOMMON

x03_tj_121503

NC_SHD_1_1 NC_SHD_1_2

NC_SHD_2_1 NC_SHD_2_2

NC_COUPON1_2NC_COUPON1_1

Plunger

SLP2

SPRING-LOADED PLUNGER

X0403

PIN,LKG,PWA,44X.150

x00_tj_050503

x03_tj_010904

x00_tj_040703

HS3

HEATSINK

HS1

HEATSINK

NEED TO SUB IN EXTRA P/N ENGINEE_0342R

NC_SLP1

NC

x00_sd_052903

1

HEATSINK_PRES_N

2

0.1uF 16V C1659

1 2

Cap is to help reduce EMI build-up on heatsink.

1 2

CLIP7

P1 P2 V1 V2 V3 V4 V5 V6 V7 V8

V9 V10 V11 V12 V13 V14 V15 V16

SMT GND CLIP

86 SLOT

16 GND VIAS

SUB=SUB*_0342R

ADD1=ADD*_0342R

CLIP8

P1 P2 V1 V2 V3 V4 V5 V6 V7 V8

V9 V10 V11 V12 V13 V14 V15 V16

SMT GND CLIP

86 SLOT

16 GND VIAS

SUB=SUB*_0342R

ADD1=ADD*_0342R

CLIP12

P1 P2 V1 V2 V3 V4 V5 V6 V7 V8 V9

V10 V11 V12 V13 V14 V15 V16

SMT GND CLIP

86 SLOT

16 GND VIAS

BOTTOM ETCH .300"

SUB=SUB*_0342R

ADD1=ADD*_0342R

33

Z_IN1_48_END

GND_TAB

57

GND_TAB

57

GND_TAB

57

Z_IN1_48

3

RY

NP*

ZSE3PINS2R

COUPON TEST

Z_IN4_48

1 2 3

RY

NP*

ZSE3PINS2R

COUPON TEST

Z_BOT_48

3

RY

NP*

ZSE3PINS2R

COUPON TEST

IMP_IN1_48

21

+RX

PROPAGATION_DELAY=L:S:5995:6005

IMP_IN4_48

+RX

PROPAGATION_DELAY=L:S:5995:6005

IMP_BOT_48

21

+RX

PROPAGATION_DELAY=L:S:5995:6005

1

2

3

NP*

3

IMPEDENCE SINGLE END

TEST POINT

Z_IN4_48_END

1

2

3

NP*

3

IMPEDENCE SINGLE END

TEST POINT

Z_BOT_48_END

1

2

3

NP*

3

IMPEDENCE SINGLE END

TEST POINT

50 OHM TRACES (MEM1, HL1.5)

Z_IN1_50_END

Z_IN1_50

GND_TAB

57

GND_TAB

57

GND_TAB

57

GND_TAB

57

1 2

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

Z_IN2_50

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

Z_IN3_50

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

Z_IN4_50

1 2

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

IMP_IN1_50

+RX

IMP_IN2_50

21

+RX

21

IMP_IN3_50

+RX

IMP_IN4_50

+RX

1

2

3

NP*

3

IMPEDENCE SINGLE END

TEST POINT

Z_IN2_50_END

1

2

3

NP*

3

IMPEDENCE SINGLE END

TEST POINT

Z_IN3_50_END

1

2

3

NP*

3

IMPEDENCE SINGLE END

TEST POINT

Z_IN4_50_END

1

2

3

NP*

3

IMPEDENCE SINGLE END

TEST POINT

40 OHM TRACES (MEM2)

Z_IN1_40_END

GND_TAB

57

GND_TAB

57

GND_TAB

57

GND_TAB

57

Z_IN1_40

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

Z_IN2_40

1 2

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

Z_IN3_40

1 2

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

Z_IN4_40

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

IMP_IN1_40

21

+RX

IMP_IN2_40

+RX

IMP_IN3_40

+RX

IMP_IN4_40

21

+RX

1

2

3

NP*

3

IMPEDENCE SINGLE END

TEST POINT

Z_IN2_40_END

1

2

3

NP*

3

IMPEDENCE SINGLE END

TEST POINT

Z_IN3_40_END

1

2

3

NP*

3

IMPEDENCE SINGLE END

TEST POINT

Z_IN4_40_END

1

2

3

NP*

3

IMPEDENCE SINGLE END

TEST POINT

48 OHM TRACES (FSB)

100 OHM TRACES (Diff Clocks, Ethernet)

GND_TAB

57

GND_TAB

57

GND_TAB

57

GND_TAB

57

GND_TAB

57

GND_TAB

57

GND_TAB

57

GND_TAB

57

GND_TAB

57

GND_TAB

57

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

CA

PROPAGATION_DELAY=L:S:5995:6005 PROPAGATION_DELAY=L:S:5995:6005

Z_TOP_D100

1

RX

3

RY

NP*

ZDI4PINS2R

COUPON TEST

1

RX

3

RY

NP*

COUPON TEST

1

RX

3

RY

NP*

COUPON TEST

1 3

NP*

COUPON TEST

1 3

NP*

2

+

4

-

PROPAGATION_DELAY=L:S:5995:6005 PROPAGATION_DELAY=L:S:5995:6005

Z_IN1_D100

ZDI4PINS2R

Z_IN2_D100

ZDI4PINS2R

Z_IN4_D100 RX

RY ZDI4PINS2R

2

+

4

-

PROPAGATION_DELAY=L:S:5995:6005 PROPAGATION_DELAY=L:S:5995:6005

2

+

4

-

PROPAGATION_DELAY=L:S:5995:6005 PROPAGATION_DELAY=L:S:5995:6005

2

+

4

-

PROPAGATION_DELAY=L:S:5995:6005 PROPAGATION_DELAY=L:S:5995:6005

Z_BOT_D100 RX

RY ZDI4PINS2R

COUPON TEST

2

+

4

-

90 OHM TRACES (USB)

PROPAGATION_DELAY=L:S:5995:6005 PROPAGATION_DELAY=L:S:5995:6005

Z_TOP_D90

1

RX

3

RY

NP*

ZDI4PINS2R

COUPON TEST

1

RX

3

RY

NP*

COUPON TEST

1

RX

3

RY

NP*

COUPON TEST

1 3

NP*

COUPON TEST

1 3

NP*

2

+

4

-

PROPAGATION_DELAY=L:S:5995:6005 PROPAGATION_DELAY=L:S:5995:6005

Z_IN1_D90

ZDI4PINS2R

Z_IN2_D90

ZDI4PINS2R

RX RY ZDI4PINS2R

2

+

4

-

PROPAGATION_DELAY=L:S:5995:6005 PROPAGATION_DELAY=L:S:5995:6005

2

+

4

-

PROPAGATION_DELAY=L:S:5995:6005 PROPAGATION_DELAY=L:S:5995:6005

Z_IN4_D90

2

+

4

-

PROPAGATION_DELAY=L:S:5995:6005 PROPAGATION_DELAY=L:S:5995:6005

Z_BOT_D90

2

+

RX RY

ZDI4PINS2R

COUPON TEST

4

-

IMP_Z100D_TOP+ IMP_Z100D_TOP-

IMP_Z100D_IN1+ IMP_Z100D_IN1-

IMP_Z100D_IN2+ IMP_Z100D_IN2-

IMP_Z100D_IN4+ IMP_Z100D_IN4-

IMP_Z100D_BOT+ IMP_Z100D_BOT-

IMP_Z90D_TOP+ IMP_Z90D_TOP-

IMP_Z90D_IN1+ IMP_Z90D_IN1-

IMP_Z90D_IN2+ IMP_Z90D_IN2-

IMP_Z90D_IN4+ IMP_Z90D_IN4-

IMP_Z90D_BOT+ IMP_Z90D_BOT-

Z_TOP_D100_END

1

2

3

4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

Z_IN1_D100_END

1

2

3

4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

Z_IN2_D100_END

1

2

3

4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

Z_IN4_D100_END

1

2

3

4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

Z_BOT_D100_END

1

2

3

4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

Z_TOP_D90_END

1

2

3

4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

Z_IN1_D90_END

1

2

3

4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

Z_IN2_D90_END

1

2

3

4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

Z_IN4_D90_END

1

2

3

4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

Z_BOT_D90_END

1

2

3

4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

GND_TAB

57

GND_TAB

57

GND_TAB

57

GND_TAB

57

GND_TAB

57

GND_TAB

57

GND_TAB

57

GND_TAB

57

SPARES

1-21-2004_9:58

56 OHM TRACES (PCI, IDE,

Video, SE Clocks)

Z_TOP_56

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

Z_IN1_56

1 2

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

Z_IN2_56

1 2

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

Z_IN3_56

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

Z_IN4_56

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

Z_BOT_56

1 2

PROPAGATION_DELAY=L:S:5995:6005

3

RY

NP*

ZSE3PINS2R

COUPON TEST

IMP_TOP_56

21

+RX

IMP_IN1_56

+RX

IMP_IN2_56

+RX

IMP_IN3_56

21

+RX

IMP_IN4_56

21

+RX

IMP_BOT_56

+RX

Z_TOP_56_END

1 2 3

IMPEDENCE SINGLE END

TEST POINT

Z_IN1_56_END

1 2 3

IMPEDENCE SINGLE END

TEST POINT

Z_IN2_56_END

IMPEDENCE SINGLE END

TEST POINT

Z_IN3_56_END

IMPEDENCE SINGLE END

TEST POINT

Z_IN4_56_END

IMPEDENCE SINGLE END

TEST POINT

Z_BOT_56_END

IMPEDENCE SINGLE END

TEST POINT

85 OHM TRACES (PCI-Express)

PROPAGATION_DELAY=L:S:5995:6005 PROPAGATION_DELAY=L:S:5995:6005

Z_IN1_D85

1

RX

3

RY

NP*

ZDI4PINS2R

COUPON TEST

1

RX

3

RY

NP*

COUPON TEST

x00_tj_051203

2

+

4

-

PROPAGATION_DELAY=L:S:5995:6005 PROPAGATION_DELAY=L:S:5995:6005

Z_IN4_D85

2

+

4

-

ZDI4PINS2R

IMP_Z85D_IN1+ IMP_Z85D_IN1-

IMP_Z85D_IN4+ IMP_Z85D_IN4-

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

1/13/2004 57 OF 61 DC

Z_IN1_D85_END

1 2 3 4

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

Z_IN4_D85_END

NP*

IMPEDENCE DIFFERENTIAL

TEST POINT

COMPUTER CORPORATION AUSTIN,TEXAS

SHEET

1 2

NP*

3

1 2

NP*

3

1

2

3

NP*

3

1

2

3

NP*

3

1

2

3

NP*

3

1

2

3

NP*

3

1 2 3 4

1

2

3

4

REV.

X03

1

2

3

B D

CA

3.3V I/O Slot !!!

1

+3.3V

x00_sd_051703 - 3.3v

NC_TRST_EDG1

NC_TMS_EDG1 NC_TDI_EDG1

ICH_PIRQ_DEBUG_N

+3.3V

8

31,33,36,50,58 31,33,36,50,58 31,33,36,50,58 31,33,36,50,58

31,33,36,50,58

31,33,50,58 31,33,50,58 31,33,50,58

2

PCI0_DEVSEL_N PCI0_FRAME_N PCI0_TRDY_N PCI0_IRDY_N

PCI0_STOP_N PCI0_LOCK_N PCI0_PERR_N PCI0_SERR_N

PCI0_REQ64_N

58

PCI0_ACK64_N

58

1

RN78

7

2

6

3

5

4

8.2K

1

8

RN79

2

7

3

6

4

5

8.2K

8

1

RN80

7

2

6

3

SP_RN80_3 SP_RN80_6

5

4

8.2K

SP_RN80_5SP_RN80_4

31,33,36,50,58

PCI0_AD19

R223

2 1 100-5%

3

33,58

5,27,40,55,59

31,33,36,50

31,33,36,50 31,33,36,50

31,33,36,50

31,33,36,50 31,33,36,50

31,33,36,50,58

31,33,36,50 31,33,36,50

31,33,36,50

31,33,36,50 31,33,36,50

PCI_RST_PLANAR_N

PCI0_GNT_DEBUG_N

33

PCI0_AD30

PCI0_AD28 PCI0_AD26

PCI0_AD24 IDSEL_DEBUG

PROPAGATION_DELAY=L:S::1000

PCI0_AD22 PCI0_AD20

PCI0_AD18 PCI0_AD16

PCI0_FRAME_N

PCI0_TRDY_N

PCI0_STOP_N

PCI0_PAR PCI0_AD15

PCI0_AD13 PCI0_AD11

PCI0_AD9

PCI0_CBE0_N

PCI0_AD6 PCI0_AD4

PCI0_AD2 PCI0_AD0

PCI0_REQ64_N

58

NC_PRSVD0_EDG1

NC_PRSVD2_EDG1

NC_3V3_AUX

NC_PME_BUS

NC_IMPB_SCL NC_IMPB_SDA

Side A

+5.0V Riser

+12V

MCA_EDGE

60 59 58 57 56

A

55

C

54 53 52 51 50

49 48 47 46 45 44 43 42 41 40 39 38

ID

37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

PCI_DBG

Side B

120 119 118 117 116 115

B

114

D

113 112 111 110

109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61

NC_P61_-12V NC_TCK_EDG1

NC_TDO_EDG1

ICH_PIRQ_DEBUG_N

NC_PA_EDG1 NC_PRSVD1_EDG1 NC_PB_EDG1

NC_PRSVD3_EDG1

CK_33M_PCI0_DEBUG

PCI0_REQ_DEBUG_N

PCI0_AD31 PCI0_AD29

PCI0_AD27 PCI0_AD25

PCI0_CBE3_N

PCI0_AD23

PCI0_AD21 PCI0_AD19

PCI0_AD17

PCI0_CBE2_N

PCI0_IRDY_N

PCI0_DEVSEL_N

PCI0_LOCK_N PCI0_PERR_N

PCI0_SERR_N

PCI0_CBE1_N

PCI0_AD14

PCI0_AD12 PCI0_AD10

PCI0_AD8 PCI0_AD7

PCI0_AD5 PCI0_AD3

PCI0_AD1

PCI0_ACK64_N

NOTE: PCI SLOT DEVIATION: No -12V

33,58

3

33

31,33,36,50 31,33,36,50

31,33,36,50 31,33,36,50,58

31,33,36,50 31,33,36,50

31,33,36,50,58

31,33,50,58 31,33,50,58

31,33,50,58

31,33,36,50 31,33,36,50

31,33,36,50

58

ROOM=DBG_SLOT

+5.0V Riser

21

C244

C242

C237

1 2

C24121C240

1 2

0.1uF 16V

21

C238

0.1uF 16V

C239

0.1uF 16V

1 2

+3.3V

21

C243

0.1uF 16V

1 2

0.1uF 16V 0.1uF 16V

1

2

3

!!! WARNING !!!

Card edge connector signals swapped from normal This card edge is gender-bended into a connector and thus is oppisite normal

4 4

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

58 OF 611/13/2004

X03

subsys done

A B

PCI bus p/u's / PCI Debug Slot

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

D1660

DATE

DC

A B C

subsys done

D

1

H_INIT_N_3V

55

FWH_ID0

55

NC_LPC_DEBUG10

2

FVS Access Points

5,33,41,44,56

ECAD: space at least 125mil apart

1U PWA assembly

2U/5U PWA assembly

3

2U/5U Assembly Drawing

1U Assembly Drawing

REV Barcode

+3.3V

VCC

SMARTVU

12

CK_33M_SMARTVU

HEADER

2X7

3

PCI_RST_PLANAR_N

5

LPC_LAD0

7

LPC_LAD1

9

LPC_LAD2

11

LPC_LAD3

13

LPC_LFRAME_N

NP01

4 6

8 10 12 14

SmartVu

ICH_PWRBTN_N

TESTPAD

FLP_DSKCHG_N

32,40

TESTPAD

40,41,59

Schematic

ID Barcode

GPI_FVS_1_N

GPI_FVS_2_N

PWB

TESTPAD

P# F1667 P# H1754

ADD=ADD*_D1656_PWB

ADD2=ADD*_D1660_SCHEM

ADD3=ADD*_42610_BARCODE

ADD4=ADD*_42753_LABEL

ADD1=ADD13_D1657_ASSYDWG ADD6=ADD02_D1658_ASSYDWG

1

MH5

MH6

MH7

MH8

3 5,27,40,55,58,59 5,33,40,44,55,59 5,33,40,44,55,59 5,33,40,44,55,59 5,33,40,44,55,59 5,33,40,44,55,59

DumbView LED's

DEBUG_LED_3

5

DEBUG_LED_2

5

DEBUG_LED_1

5

DEBUG_LED_0

5

DS1

2 1

RED

DS2

12

RED

DS3

2 1

RED

DS4

12

RED

x00_sd_52903 - removed 2 leds

Debug Jumpers

+3.3V_AUX +3.3V

123

4 5

8.2K

RN72

DEBUG_JUMPER_0

5

DEBUG_JUMPER_1

5 40,41,59 40,41,59

GPI_FVS_1_N GPI_FVS_2_N

x00_sd_061303 - added p/n

ADD8=ADD02_J4286_VRDSHLD1 ADD9=ADD02_J4286_VRDSHLD2

678

X03_TJ_010704

P15

1

3

5 6

TSM 2X4 SMT HDR

SUB23_2R039

NP01

+3.3V_AUX

1 2 3 4

RN25

1K

8 7 6 5

1

Mictor Debug Headers

ROOM=DUMBVU

CK_33M_CPLD

3,5,59

2

4

87

NC_MCTR_A_7

MCTR_A

1 3 5 7

a3.7

9 11 13 15 17 19 21

a3.0

23

a2.7

25 27 29 31 33 35 37

a2.0

39 40 41 42 43

2x19

RECEPTACLE

NP*

dpn=5J738

GND

clk1 a1.7

a1.0 a0.7

a0.0

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38

CK_33M_CPLD SHIFTY_BCKPLN_DATA_UP SHIFTY_BCKPLN_DATA_DN_R SHIFTY_BCKPLN_LATCH_R SHIFTY_BCKPLN_CLK_R SHIFTY_RISER_DATA_UP SHIFTY_RISER_DATA_DN_R SHIFTY_RISER_LATCH_R SHIFTY_RISER_CLK_R

NC_MCTR_A_24

PCI_RST_PLANAR_N

LPC_LFRAME_N

LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0

5,27,40,55,58,59 5,33,40,44,55,59 5,33,40,44,55,59 5,33,40,44,55,59 5,33,40,44,55,59 5,33,40,44,55,59

ROOM=SYSCPLD

MCTR_B

1 3

3,5,59 5,32 5 5 5 5,31 5 5 5

x00_sd_061103 - h_vtt_pwrgood was duplicated on conn

CK_PWRDWN_N

3-5

PCI_RST_ICH_N

5,33

SYSTEM_PWRGOOD_CHIPSET_R

5

CPLD_DDR2_RESET

5

CPLD_H_VID_PWRGOOD_N

5

CK_VTT_PWRGD_N

3,5

VCORE1_PWRGOOD

5,7

VCORE2_PWRGOOD

5,8

VCORE_EN

5,7,8

NC_MCTR_B_7

NC_MCTR_B_25

NC_MCTR_B_37

CK_33M_CPLD

3,5,59

5

clk0clk0

7

a3.7

9 11 13 15 17 19 21

a3.0

23

a2.7

25 27 29 31 33 35 37

a2.0

39 40 41 42 43

2x19

RECEPTACLE

GND

NP*

dpn=5J738

clk1 a1.7

a1.0 a0.7

a0.0

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38

NC_MCTR_B_6

DC2DC_CPUVTT_EN

1V5_PWRGOOD

DC2DC_1V5_EN

1V8_PWRGOOD

DC2DC_1V8_EN

3V3_PWRGOOD

DC2DC_3V3_EN

5V_PWRGOOD

DC2DC_5V_EN

RISER_PWRGOOD

NC_MCTR_B_28

PS1_PWRGOOD

PS2_PWRGOOD PS1_ENABLE_N PS2_ENABLE_N

ICH_PWR_ON_REQ

5,6,51 5,6 5,6 5,6 5,6 5,6 5,6 5,6 5,6 5,31

5,31 5,31 5,31 5,31 5,33,40,41,44

2

3

I2C Headers

Misc. Mechanical Parts added to BOM

ADD1=ADD*_Y1372_INSLTR1

ADD2=ADD*_0585R_INSRVT1 ADD3=ADD*_0585R_INSRVT2

ADD4=ADD*_0585R_INSRVT3 ADD5=ADD*_0585R_INSRVT4 ADD1=ADD*_0585R_INSRVT5

ADD6=ADD02_X1357_STANDOFF1 ADD7=ADD02_X1357_STANDOFF2

ADD8=ADD02_Y1313_STANDOFF3 ADD9=ADD02_Y1313_STANDOFF4

4

ADD1=ADD13_D4979_FANBRKT1 ADD2=ADD13_D4979_FANBRKT2 ADD3=ADD13_D4979_FANBRKT3

ADD4=ADD13_45550_FANBRKT4 ADD5=ADD13_45550_FANBRKT5 ADD6=ADD13_45550_FANBRKT6

ADD7=ADD13_W1650_STANDOFF5

X03_TJ_110503

X03b_TJ_012004

X03_TJ_110503

X03_TJ_110503 X03_TJ_110503

X03_TJ_110503

X03b_TJ_012004

planar bottom insulator

+3.3V_AUX

planar bottom insulator rivets

ICH_VAUX_SCL_U5

35

ICH_VAUX_SDA_U5

35

1U riser standoff screws

1U riser standoffs

2U/5U Fan Bracket Mounting Studs

2U/5U Fan Bracket Mounting Studs Ret. Screws

2U/5U riser standoffs

x03b_tj_011904

J18

1 2 3 4

SUB=NP01

32,44,50 24,25,44

5,44,45

31,44 31,44 32,44

+3.3V_AUX

P5

I2C_IPMB_SCL I2C_NIC_SCL I2C_SEG2_VAUX_SCL I2C_SEG3_VAUX_SCL I2C_SEG4_VAUX_SCL I2C_SEG5_SCL

2 4 6 8 10 12

14

HEADER

2X7

1

I2C_IPMB_SDA

3

I2C_NIC_SDA

5

I2C_SEG2_VAUX_SDA

7

I2C_SEG3_VAUX_SDA

9

I2C_SEG4_VAUX_SDA

11

I2C_SEG5_SDA

13

NP01

32,44,50 24,25,44 5,44,45 31,44 31,44 32,44

PCI bus p/u's / PCI Debug Slot

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP., EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

C

TITLE

LINDY PLANAR

DWG NO.

D1660 X03

DATE

1/13/2004 59 OF 61

DBA

COMPUTER CORPORATION

AUSTIN,TEXAS

SHEET

4

REV.

B D

CA

Plane Split Stitching Caps

1-21-2004_9:58

1

USB Rear Plane Split Crossings

21

0.1uF 16V

+3.3V_AUX

21

C1767

0.1uF 16V

+3.3V_AUX

C1768

+3.3V_AUX

C1766

x00_gt_061903

2

21

0.1uF 16V

+1.5V

+3.3V_AUX

21

C1769

+1.5V +5.0V Riser

0.1uF 16V

CK_33M_RAC Plane Split Crossings

+1.5V

+3.3V_AUX

21

C1772

+1.5V

0.1uF 16V

+3.3V_AUX

21

C1770

x00_gt_061903

+1.5V

0.1uF 16V

+3.3V_AUX

21

C1771

0.1uF 16V

Legacy PCI Bus Plane Split Crossings

+3.3V_AUX

21

C1775

+3.3V_AUX

21

C1778

0.1uF 16V

+5.0V Riser

0.1uF 16V

x00_gt_061903

+3.3V_AUX

21

C1776

+3.3V_AUX

21

C1779

+5.0V Riser

0.1uF 16V

+5.0V Riser

0.1uF 16V

+3.3V_AUX

21

C1777

+3.3V_AUX

21

C1780

+5.0V Riser

0.1uF 16V

+5.0V Riser

0.1uF 16V

IDE Bus Plane Split Crossings

1

2

+3.3V_AUX

.01uF 50V

21

C1793

+3.3V

21

C1782

+1.5V

0.1uF 16V

+3.3V

1 2

C1781

0.1uF 16V

3

Random Stuff

+3.3V

+3.3V_AUX

21

1 2

C1783

0.1uF 16V

C1786

0.1uF 16V

PCI Express Plane Split Crossings

+3.3V_AUX

.01uF 50V

x00_tj_062303

1 2

x00_tj_061903

C1792

+1.5V

4 4

COMPUTER CORPORATION AUSTIN,TEXAS

REV.

SHEET

X03

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

LINDY PLANAR

DWG NO.

DATE

D1660

1/13/2004 60 OF 61

DC

3

LINDY PLANAR

D1660

X03

1/13/2004 61 OF 61