
Confidential
For Dell Only
1
1
Cover Sheet
2 System Block Diagram
Clock Distribution
3
CPU-CLK/Control/MISC/PEG
4
5
CPU-Memory
CPU-Power
6
7
CPU-GND
8
DDR III DIMM 1 / DIMM 2
9
DDR III DIMM 3 / DIMM 4
10
11
12
13
14
15
16
17
18
A A
19
20
21
22
23
24
25
26
27
28
29
30 Option Part
31~34 Manual Part
Clock-Gen_ICS9LPRS4180
PCH-PCI/E/DMI/USB/CLK
PCH-SATA/HOST/FAN/GPIO/VGA
PCH-SMB/LPC/AUDIO/RTC
PCH-POWER
PCH-GND/NVRAM
SIO-Fintek F71882FG
PCIE x16 & x1 Slots
PCI Slot 1 & 2
Gigabit LAN - BCM57780
Azalia Audio - ALC662
DVI / SATA / FAN / Com Port
Front / Rear USB Connectors
PCH Core Power
CPU_VTT
DDR Power
GPU Power - NCP5380
VRD11- NCP5395 3 Phase
ATX F_Panel/EMI/LED
CPU/PCH XDP
MS-7448
DELL Shen Yang / ECCO
CPU :
Intel Lynnfield/ Clarkdale Processor
System Chipset :
Intel Ibex Peak (P55)
On Board Chipset :
VRM 11.1 -- On-Semi NCP5395
Gigabit LAN -- BROADCOM BCM57780
HDA Codec -- Realtek ALC662
ACPI Controller -- uPI Solution
Super I/O -- FinTek F71882FG
SPI Flash 16Mb
Main Memory :
2 Channel DDR III * 4 (Max 16GB)
Expansion Slot :
PCI Express x16 Slot * 1
PCI Express x1 Slot * 1
PCI Slot * 2
Version : 1.0
Rev. A
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Cover Sheet
Cover Sheet
Cover Sheet
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
1
Date: Sheet of
MICRO-START INT'L CO.,LTD.
DELL Shen Yang
DELL Shen Yang
DELL Shen Yang
1.0
1.0
1.0
of
134Friday, August 14, 2009
134Friday, August 14, 2009
134Friday, August 14, 2009

Confidential
For Dell Only
5
4
3
2
1
D D
PCIE
16X
SLOT
For H57 Only
C C
REAR IO USB X 6 (0-5)
DVI-I
Connector
DVI (Port B)
VGA
INTEL
LGA 1156
DMI X4
IBEXPEAK
DDRIII 1066,1333
128bit
DDRIII 1066,1333
PCIE X1
SLOT
UNBUFFERED
DDRIII DIMM1
UNBUFFERED
DDRIII DIMM2
DDRIII FIRST LOGICAL DIMM
BROADCOM
BCM57780
UNBUFFERED
DDRIII DIMM3
UNBUFFERED
DDRIII DIMM4
DDRIII SECOND LOGICAL DIMM
PCH
USB-3USB-4USB-5
B B
FRONT IO USB X 6 (6-11)
USB-10USB-11
USB-6
USB-2
USB-7
USB-1
USB-8 USB-9
USB-0
SPI ROM
USB 2.0
SPI I/F
HD AUDIO I/F
SATA II 0~3
SATA#4 Re-Driver eSATA
HD AUDIO ALC662
SATA#0 SATA#1 SATA#2
Reserve
SATA#3
PCI SLOT #1 & 2
PCI BUS
KBD
MOUSE
COM
SIO F71882FG
3
COM
PORT
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Block Diagram
Block Diagram
Block Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
2
Date: Sheet of
MICRO-START INT'L CO.,LTD.
DELL Shen Yang
DELL Shen Yang
DELL Shen Yang
1
of
234Friday, August 14, 2009
234Friday, August 14, 2009
234Friday, August 14, 2009
1.0
1.0
1.0
A A
5
4

Confidential
For Dell Only
5
D D
4
3
PROCESSOR
2
1
Host 133MHz
C C
Host 133MHz
SATA 100MHz
DOT 96MHz
B B
CK505
DMI 100MHz
REF 14.318MHz
Ibex Peak
DMI 100MHz
PCIE GENII 100MHz
PCIE 100MHz
PCI 33MHz
PCIE 100MHz
PCI 33MHz
PCIE x16 SLOT
PCIE x1 SLOT
PCI SLOT
LOM
SIO
SIO 48MHz
A A
5
4
SIO
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Clock Distribution
Clock Distribution
Clock Distribution
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
DELL Shen Yang
DELL Shen Yang
DELL Shen Yang
1
of
334Friday, August 14, 2009
334Friday, August 14, 2009
334Friday, August 14, 2009
1.0
1.0
1.0

Confidential
For Dell Only
5
CPU1E
CPU1E
AA7
BCLK[0]
AA6
BCLK[0]*
AA3
PEG_CLK
AA4
PEG_CLK*
Y8
BCLK[1]*
AA8
BCLK[1]
AF37
TDI_M
AF38
TD0_M
AF34
RSTIN*
AH36
VCCPWRGOOD_1
AH35
VCCPWRGOOD_0
AG37
VTTPWRGOOD
AH37
SM_DRAMPWROK
AG35
PECI
AG39
CATERR*
AH34
PROCHOT*
AF35
THERMTRIP*
AH39
PM_SYNC
AB5
PM_EXT_TS[0]*
AB4
PM_EXT_TS[1]*
B11
COMP2
C11
COMP3
AG1
SM_RCOMP[0]
AD1
SM_RCOMP[1]
AE1
SM_RCOMP[2]
AF2
COMP1
AF36
COMP0
AK38
SKTOCC*
E8
CFG0
G8
CFG1
E10
CFG2
F10
CFG3/PEG_LANE_REVERSAL
H10
CFG4
H9
CFG5
E9
CFG6
F9
CFG7
G12
CFG8
H12
CFG9
K10
CFG10
K8
CFG11
J12
CFG12
L8
CFG13
K9
CFG14
K12
CFG15
H7
CFG16
L11
CFG17
J10
GFX_DPRSLPVR/RSVD
5 OF 12
5 OF 12
TP23TP23
R139R139
R141R141
CPU_VTT
R110 X_0R0402R110 X_0R0402
TP36TP36
CPU_133M_P_R
CPU_133M_N_R
H_TDO_TDI_M
CPURST#
PROC_PWROK
VCCP_PWRGD
PM_EXT_TS0
PM_EXT_TS1
TP_GFX_DPRSLPVR
CLK133M_CPU_P11
CLK133M_CPU_N11
CK_DMI_P11
CK_DMI_N11
D D
CPU_PWRGD13,29
C C
H_MCP_CFG1
H_MCP_CFG2
H_MCP_CFG5
B B
H_MCP_CFG6
H_MCP_CFG7
H_MCP_CFG3
H_MCP_CFG4
H_MCP_CFG15
H_MCP_CFG0
CLK133M_CPU_P
CLK133M_CPU_N
CK_DMI_P
CK_DMI_N
CPU_VTT
H_VTTPWRGD24,27
MEM_PWRGD13
H_PECI12,16
H_THERMTRIP#12
PM_SYNC12
R282 20R1%0402R282 20R1%0402
R268 20R1%0402R268 20R1%0402
R275 100R1%0402R275 100R1%0402
R285 24.9R1%0402R285 24.9R1%0402
R272 130R1%0402R272 130R1%0402
R273 49.9R1%0402R273 49.9R1%0402
R145 49.9R1%0402R145 49.9R1%0402
SKTOCC#16
1
2
3
4
5
6
7
8
R293 X_1.5KR0402R293 X_1.5KR0402
R291 X_1.5KR0402R291 X_1.5KR0402
R292 X_1.5KR0402R292 X_1.5KR0402
R290 X_1.5KR0402R290 X_1.5KR0402
R270 X_1.5KR0402R270 X_1.5KR0402
TP47TP47
TP45TP45
TP48TP48
TP43TP43
TP50TP50
TP44TP44
TP49TP49
TP46TP46
TP51TP51
R133
R133
X_49.9R1%0402
X_49.9R1%0402
H_VTTPWRGD
MEM_PWRGD
H_PECI
H_CATERR#
H_PROCHOT#
H_THERMTRIP#
PM_SYNC
RN4
RN4
X_8P4R-1.5KR
X_8P4R-1.5KR
R278R278
R279R279
H_COMP2
H_COMP3
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
H_COMP1
H_COMP0
SKTOCC#
H_MCP_CFG0
H_MCP_CFG1
H_MCP_CFG2
H_MCP_CFG3
H_MCP_CFG4
H_MCP_CFG5
H_MCP_CFG6
H_MCP_CFG7
H_MCP_CFG8
H_MCP_CFG9
H_MCP_CFG10
H_MCP_CFG11
H_MCP_CFG12
H_MCP_CFG13
H_MCP_CFG14
H_MCP_CFG15
H_MCP_CFG16
H_MCP_CFG17
4
VID[0]/MSID[0]
VID[1]/MSID[1]
VID[2]/MSID[2]
VID[3]/MSID[3]
VID[4]/MSID[4]
VID[5]/MSID[5]
VID[6]
VID[7]
PSI*
GFX_VR_EN
GFX_IMON/RSVD
GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]
FC_AE38
VTT_SELECT
FC_AG40
VCC_SENSE
VSS_SENSE
VTT_SENSE
VSS_SENSE_VTT
VAXG_SENSE
VSSAXG_SENSE
ISENSE
TDO
TCK
TMS
TRST*
PRDY*
PREQ*
DBR*
BCLK_ITP*
BCLK_ITP
TAPPWRGOOD
RESET_OBS*
BPM[0]*
BPM[1]*
BPM[2]*
BPM[3]*
BPM[4]*
BPM[5]*
BPM[6]*
BPM[7]*
MISC
MISC
TDI
U40
U39
U38
U37
U36
U35
U34
U33
AG38
F12
F6
G10
B12
E12
E11
C12
G11
J11
AE38
AF39
AG40
T35
T34
AE35
AE36
A13
B13
T40
AM38
AM37
AN37
AN40
AM39
AJ38
AK37
AL40
AK40
AK39
AK34
AL39
AL33
AL32
AK33
AK32
AM31
AL30
AK30
AK31
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
H_VID7
VCCP_PSI#
GFX_VR_EN
GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6
TP_MCP_VCCVTT_VID0
VTT_SELECT
TP_MCP_VCCVTT_VID2
CPU_VCC_SENSE
CPU_VSS_SENSE
CPU_VTT_SENSE
CPU_VTT_SENSE_RTN
CPU_GFX_VCC_SENSE
CPU_GFX_VSS_SENSE
VCCP_IMON
CPU_TDO
CPU_TDI
CPU_TCK
CPU_TMS
CPU_TRST#
XDP_CPU_PRDY#
XDP_CPU_PREQ#
FP_RST#
XDP_CPU_BCLK_N
XDP_CPU_BCLK_P
XDP_CPU_PWRGD
CPU_RESET_OUT#
XDP_CPU_BPM_N0
XDP_CPU_BPM_N1
XDP_CPU_BPM_N2
XDP_CPU_BPM_N3
XDP_CPU_BPM_N4
XDP_CPU_BPM_N5
XDP_CPU_BPM_N6
XDP_CPU_BPM_N7
Demo Board NC
GFX_VR_EN 26
GFX_VID0 26
GFX_VID1 26
GFX_VID2 26
GFX_VID3 26
GFX_VID4 26
GFX_VID5 26
GFX_VID6 26
CPU_GFX_VCC_SENSE 26
CPU_GFX_VSS_SENSE 26
H_VID[7..0] 27
VCCP_PSI# 27
TP26TP26
VTT_SELECT 24
TP24TP24
CPU_VCC_SENSE 27
CPU_VSS_SENSE 27
CPU_VTT_SENSE 24
CPU_VTT_SENSE_RTN 24
VCCP_IMON 27
CPU_TDO 29
CPU_TDI 29
CPU_TCK 29
CPU_TMS 29
CPU_TRST# 29
XDP_CPU_PRDY# 29
XDP_CPU_PREQ# 29
FP_RST# 13,28,29
XDP_CPU_BCLK_N 29
XDP_CPU_BCLK_P 29
XDP_CPU_PWRGD 29
CPU_RESET_OUT# 29
TP25TP25
TP27TP27
TP20TP20
TP18TP18
TP22TP22
TP21TP21
TP28TP28
TP19TP19
3
EXP_A_RXP_017
EXP_A_RXN_017
EXP_A_RXP_117
EXP_A_RXN_117
EXP_A_RXP_217
EXP_A_RXN_217
EXP_A_RXP_317
EXP_A_RXN_317
EXP_A_RXP_417
EXP_A_RXN_417
EXP_A_RXP_517
EXP_A_RXN_517
EXP_A_RXP_617
EXP_A_RXN_617
EXP_A_RXP_717
EXP_A_RXN_717
EXP_A_RXP_817
EXP_A_RXN_817
EXP_A_RXP_917
EXP_A_RXN_917
EXP_A_RXP_1017
EXP_A_RXN_1017
EXP_A_RXP_1117
EXP_A_RXN_1117
EXP_A_RXP_1217
EXP_A_RXN_1217
EXP_A_RXP_1317
EXP_A_RXN_1317
EXP_A_RXP_1417
EXP_A_RXN_1417
EXP_A_RXP_1517
EXP_A_RXN_1517
DMI_RX011
DMI_RX0#11
DMI_RX111
DMI_RX1#11
DMI_RX211
DMI_RX2#11
DMI_RX311
DMI_RX3#11
FDI_FSYNC012
FDI_LSYNC012
FDI_FSYNC112
FDI_LSYNC112
FDI_INT12
DMI_RX0
DMI_RX0#
DMI_RX1
DMI_RX1#
DMI_RX2
DMI_RX2#
DMI_RX3
DMI_RX3#
FDI_FSYNC0
FDI_LSYNC0
FDI_FSYNC1
FDI_LSYNC1
FDI_INT
C9
D9
B8
C8
A7
A6
B6
C6
A5
B5
B4
C4
C3
D3
D2
E2
E1
F1
G3
G2
G1
H1
J3
J2
J1
K1
L2
L3
P3
P4
T3
T4
R1
T1
U3
U2
U1
V1
W3
W2
2
CPU1C
CPU1C
PEG_RX[0]
PEG_RX[0]*
PEG_RX[1]
PEG_RX[1]*
PEG_RX[2]
PEG_RX[2]*
PEG_RX[3]
PEG_RX[3]*
PEG_RX[4]
PEG_RX[4]*
PEG_RX[5]
PEG_RX[5]*
PEG_RX[6]
PEG_RX[6]*
PEG_RX[7]
PEG_RX[7]*
PEG_RX[8]
PEG_RX[8]*
PEG_RX[9]
PEG_RX[9]*
PEG_RX[10]
PEG_RX[10]*
PEG_RX[11]
PEG_RX[11]*
PEG_RX[12]
PEG_RX[12]*
PEG_RX[13]
PEG_RX[13]*
PEG_RX[14]
PEG_RX[14]*
PEG_RE[15]
PEG_RX[15]*
DMI_RX[0]
DMI_RX[0]*
DMI_RX[1]
DMI_RX[1]*
DMI_RX[2]
DMI_RX[2]*
DMI_RX[3]
DMI_RX[3]*
CPU1D
CPU1D
AC4
AD4
AC3
AD3
AC2
FDI_FSYNC[0]
FDI_LSYNC[0]
DISPLAY
DISPLAY
LINK
LINK
FDI_FSYNC[1]
FDI_LSYNC[1]
FDI_INT
4 OF 12
4 OF 12
PEG_TX[0]
PEG_TX[0]*
PEG_TX[1]
PEG_TX[1]*
PEG_TX[2]
PEG_TX[2]*
PEG_TX[3]
PEG_TX[3]*
PEG_TX[4]
PEG_TX[4]*
PEG_TX[5]
PEG_TX[5]*
PEG_TX[6]
PEG_TX[6]*
PEG_TX[7]
PEG_TX[7]*
PEG_TX[8]
PEG
PEG
PEG_TX[8]*
PEG_TX[9]
PEG_TX[9]*
PEG_TX[10]
PEG_TX[10]*
PEG_TX[11]
PEG_TX[11]*
PEG_TX[12]
PEG_TX[12]*
PEG_TX[13]
PEG_TX[13]*
PEG_TX[14]
PEG_TX[14]*
PEG_TX[15]
PEG_TX[15]*
DMI_TX[0]
DMI_TX[0]*
DMI_TX[1]
DMI_TX[1]*
DMI_TX[2]
DMI_TX[2]*
DMI
DMI
DMI_TX[3]
DMI_TX[3]*
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
3 OF 12
3 OF 12
VDDIO
VDDIO
FDI_TX[0]
FDI_TX[0]*
FDI_TX[1]
FDI_TX[1]*
FDI_TX[2]
FDI_TX[2]*
FDI_TX[3]
FDI_TX[3]*
FDI_TX[4]
FDI_TX[4]*
FDI_TX[5]
FDI_TX[5]*
FDI_TX[6]
FDI_TX[6]*
FDI_TX[7]
FDI_TX[7]*
1
C7
D7
E7
E6
E5
F5
F3
F4
G6
G5
H4
H3
F7
G7
J6
J5
K3
K4
H8
J8
L6
L5
M4
M3
K7
L7
N6
N5
M8
N8
R5
R6
DMI_TX0
L1
DMI_TX0#
M1
DMI_TX1
N3
DMI_TX1#
N2
DMI_TX2
N1
DMI_TX2#
P1
DMI_TX3
R2
DMI_TX3#
R3
D11
C10
B10
A11
FDI_TX0
U6
FDI_TX0#
U5
FDI_TX1
V4
FDI_TX1#
V3
FDI_TX2
U8
FDI_TX2#
U7
FDI_TX3
W8
FDI_TX3#
W7
FDI_TX4
W5
FDI_TX4#
W4
FDI_TX5
R8
FDI_TX5#
R7
FDI_TX6
Y4
FDI_TX6#
Y3
FDI_TX7
Y6
FDI_TX7#
Y5
GRCOMP
R269 49.9R1%0402R269 49.9R1%0402
GRBIAS
EXP_A_TXP_0 17
EXP_A_TXN_0 17
EXP_A_TXP_1 17
EXP_A_TXN_1 17
EXP_A_TXP_2 17
EXP_A_TXN_2 17
EXP_A_TXP_3 17
EXP_A_TXN_3 17
EXP_A_TXP_4 17
EXP_A_TXN_4 17
EXP_A_TXP_5 17
EXP_A_TXN_5 17
EXP_A_TXP_6 17
EXP_A_TXN_6 17
EXP_A_TXP_7 17
EXP_A_TXN_7 17
EXP_A_TXP_8 17
EXP_A_TXN_8 17
EXP_A_TXP_9 17
EXP_A_TXN_9 17
EXP_A_TXP_10 17
EXP_A_TXN_10 17
EXP_A_TXP_11 17
EXP_A_TXN_11 17
EXP_A_TXP_12 17
EXP_A_TXN_12 17
EXP_A_TXP_13 17
EXP_A_TXN_13 17
EXP_A_TXP_14 17
EXP_A_TXN_14 17
EXP_A_TXP_15 17
EXP_A_TXN_15 17
DMI_TX0 11
DMI_TX0# 11
DMI_TX1 11
DMI_TX1# 11
DMI_TX2 11
DMI_TX2# 11
DMI_TX3 11
DMI_TX3# 11
R281
R281
750R1%0402
750R1%0402
FDI_TX0 12
FDI_TX0# 12
FDI_TX1 12
FDI_TX1# 12
FDI_TX2 12
FDI_TX2# 12
FDI_TX3 12
FDI_TX3# 12
FDI_TX4 12
FDI_TX4# 12
FDI_TX5 12
FDI_TX5# 12
FDI_TX6 12
FDI_TX6# 12
FDI_TX7 12
FDI_TX7# 12
CFG HL
0
SEE PEG CONFIG TABLE
RSVD
1
RSVD
2
NORM
3
DISABLE
4
RSVD
5
A A
67RSVD
REVERSED
ENABLED
RSVD
15 RSVD
DESCRIPTION
PEG SEL0
PEG SEL1
PEG SEL2
PEG LANE REVERSAL
DP PRESENCE
ENGINEERING EXPERIMENT
ENGINEERING EXPERIMENT
5
PEG CONFIG TABLE
SEL2 SEL1 SEL0
1
1
1
1 1 X 16
0 2 X 8
4
1
PCIE CONFIG
H_THERMTRIP#
H_PROCHOT#
H_CATERR#
CPU_TRST#
XDP_CPU_PRDY#
CPU_TMS
CPU_TDI
PM_SYNC
H_PECI
CPURST#
CPU_RESET_OUT#
CPU_TCK
Demo Board Empty
1
3
5
7
R147 X_51R0402R147 X_51R0402
R76 X_51R0402R76 X_51R0402
R77 X_51R0402R77 X_51R0402
R131 X_51R0402R131 X_51R0402
R144 X_51R0402R144 X_51R0402
R146 X_51R0402R146 X_51R0402
R80 X_51R0402R80 X_51R0402
R94 X_51R0402R94 X_51R0402
RN2
RN2
8P4R-51R0402
8P4R-51R0402
2
4
6
8
CPU_VTT
CPU_VTT
3
PLTRST#13,16,29
R136 X_1.3KR1%0402R136 X_1.3KR1%0402
C71
C71
C0.1u16Y0402
C0.1u16Y0402
CPURST#
R135
R135
X_665R1%0402
X_665R1%0402
Follow Intel MOW, reverve for CPU Reset. - 2/10
PLTRST#13,16,29
2
CPU_VTT
3VSB
R19
R19
10KR0402
10KR0402
R4 10KR0402R4 10KR0402
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
CE
B
Q2
Q2
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
CPU-CNTL/CLK/MISC
CPU-CNTL/CLK/MISC
CPU-CNTL/CLK/MISC
DELL Shen Yang
DELL Shen Yang
DELL Shen Yang
CE
B
1
R18
R18
150R0402
150R0402
CPURST#
Q1
Q1
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
434Friday, August 14, 2009
434Friday, August 14, 2009
434Friday, August 14, 2009
1.0
1.0
1.0
of

Confidential
For Dell Only
5
CPU1A
CPU1A
MEM_MA_ADD[15..0]8
D D
MEM_MA_WE_L8
MEM_MA_CAS_L8
MEM_MA_RAS_L8
MEM_MA_BANK08
MEM_MA_BANK18
MEM_MA_BANK28
MEM_MA_CS_L08
MEM_MA_CS_L18
MEM_MA_CS_L28
MEM_MA_CS_L38
MEM_MA_CKE08
MEM_MA_CKE18
MEM_MA_CKE28
MEM_MA_CKE38
MEM_MA_ODT08
MEM_MA_ODT18
MEM_MA_ODT28
C C
B B
MEM_MA_ODT38
MEM_MA_CLK_H08
MEM_MA_CLK_L08
MEM_MA_CLK_H18
MEM_MA_CLK_L18
MEM_MA_CLK_H28
MEM_MA_CLK_L28
MEM_MA_CLK_H38
MEM_MA_CLK_L38
DDR3_DRAMRST#8,9
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_WE_L
MEM_MA_CAS_L
MEM_MA_RAS_L
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_CS_L0
MEM_MA_CS_L1
MEM_MA_CS_L2
MEM_MA_CS_L3
MEM_MA_CKE0
MEM_MA_CKE1
MEM_MA_CKE2
MEM_MA_CKE3
MEM_MA_ODT0
MEM_MA_ODT1
MEM_MA_ODT2
MEM_MA_ODT3
MEM_MA_CLK_H0
MEM_MA_CLK_L0
MEM_MA_CLK_H1
MEM_MA_CLK_L1
MEM_MA_CLK_H2
MEM_MA_CLK_L2
MEM_MA_CLK_H3
MEM_MA_CLK_L3
DDR3_DRAMRST#
A A
AW18
AW14
AW13
AW12
AW11
AW24
AW10
AW23
AY15
AV15
AU15
AY13
AV14
AU14
AT19
AU13
AU24
AT11
AR10
AT22
AU22
AT20
AV20
AU19
AU12
AV21
AU21
AU23
AU10
AV10
AY10
AV23
AV24
AY24
AR22
AR21
AP18
AN18
AN21
AP21
AP19
AN19
AK22
AM22
AL23
AK23
AL10
AM10
AP10
AN10
AR11
AP11
AK11
AM11
AV8
AK9
AL9
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
SA_WE*
SA_CAS*
SA_RAS*
SA_BA[0]
SA_BA[1]
SA_BA[2]
SA_CS[0]*
SA_CS[1]*
SA_CS[2]*
SA_CS[3]*
SA_CKE[0]
SA_CKE[1]
SA_CKE[2]
SA_CKE[3]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_CK[0]
SA_CK[0]*
SA_CK[1]
SA_CK[1]*
SA_CK[2]
SA_CK[2]*
SA_CK[3]
SA_CK[3]*
SM_DRAMRST*
SA_CS[4]*
SA_CS[5]*
SA_CS[6]*
SA_CS[7]*
SA_DQS[8]
SA_DQS[8]*
SA_ECC_CB[0]
SA_ECC_CB[1]
SA_ECC_CB[2]
SA_ECC_CB[3]
SA_ECC_CB[4]
SA_ECC_CB[5]
SA_ECC_CB[6]
SA_ECC_CB[7]
DDR_A
DDR_A
1 OF 12
1 OF 12
SA_DQS[0]
SA_DQS[0]*
SA_DM[0]
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQS[1]
SA_DQS[1]*
SA_DM[1]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQS[2]
SA_DQS[2]*
SA_DM[2]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQS[3]
SA_DQS[3]*
SA_DM[3]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQS[4]
SA_DQS[4]*
SA_DM[4]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQS[5]
SA_DQS[5]*
SA_DM[5]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQS[6]
SA_DQS[6]*
SA_DM[6]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQS[7]
SA_DQS[7]*
SA_DM[7]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
AK3
AJ3
AJ2
AH1
AJ4
AL2
AL1
AG2
AH2
AK1
AK2
AP2
AP3
AN1
AN3
AN2
AR3
AR2
AM3
AM2
AP1
AR4
AU4
AU3
AU1
AT4
AU2
AW3
AW4
AT3
AT1
AV2
AV4
AY6
AW6
AV6
AW5
AY5
AU8
AY8
AU5
AV5
AV7
AW7
AR28
AT29
AN29
AN27
AT28
AP28
AP30
AN26
AR27
AR29
AN30
AV32
AW32
AW31
AU30
AU31
AV33
AU34
AV30
AW30
AU33
AW33
AW36
AV35
AU35
AW35
AY35
AV37
AU37
AY34
AW34
AV36
AW37
AR39
AR38
AT38
AT39
AT40
AN38
AN39
AU38
AU39
AP39
AP40
4
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DM0
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DM1
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DM2
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DM3
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DM4
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DM5
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DM6
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DM7
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
MEM_MA_DQS_H0 8
MEM_MA_DQS_L0 8
MEM_MA_DM0 8
MEM_MA_DQS_H1 8
MEM_MA_DQS_L1 8
MEM_MA_DM1 8
MEM_MA_DQS_H2 8
MEM_MA_DQS_L2 8
MEM_MA_DM2 8
MEM_MA_DQS_H3 8
MEM_MA_DQS_L3 8
MEM_MA_DM3 8
MEM_MA_DQS_H4 8
MEM_MA_DQS_L4 8
MEM_MA_DM4 8
MEM_MA_DQS_H5 8
MEM_MA_DQS_L5 8
MEM_MA_DM5 8
MEM_MA_DQS_H6 8
MEM_MA_DQS_L6 8
MEM_MA_DM6 8
MEM_MA_DQS_H7 8
MEM_MA_DQS_L7 8
MEM_MA_DM7 8
MEM_MA_DATA[63..0] 8
3
MEM_MB_ADD[15..0]9
MEM_MB_WE_L9
MEM_MB_CAS_L9
MEM_MB_RAS_L9
MEM_MB_BANK09
MEM_MB_BANK19
MEM_MB_BANK29
MEM_MB_CS_L09
MEM_MB_CS_L19
MEM_MB_CS_L29
MEM_MB_CS_L39
MEM_MB_CKE09
MEM_MB_CKE19
MEM_MB_CKE29
MEM_MB_CKE39
MEM_MB_ODT09
MEM_MB_ODT19
MEM_MB_ODT29
MEM_MB_ODT39
MEM_MB_CLK_H09
MEM_MB_CLK_L09
MEM_MB_CLK_H19
MEM_MB_CLK_L19
MEM_MB_CLK_H29
MEM_MB_CLK_L29
MEM_MB_CLK_H39
MEM_MB_CLK_L39
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_WE_L
MEM_MB_CAS_L
MEM_MB_RAS_L
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_CS_L0
MEM_MB_CS_L1
MEM_MB_CS_L2
MEM_MB_CS_L3
MEM_MB_CKE0
MEM_MB_CKE1
MEM_MB_CKE2
MEM_MB_CKE3
MEM_MB_ODT0
MEM_MB_ODT1
MEM_MB_ODT2
MEM_MB_ODT3
MEM_MB_CLK_H0
MEM_MB_CLK_L0
MEM_MB_CLK_H1
MEM_MB_CLK_L1
MEM_MB_CLK_H2
MEM_MB_CLK_L2
MEM_MB_CLK_H3
MEM_MB_CLK_L3
TP34TP34
AU20
AU18
AV18
AU17
AY18
AV17
AW17
AU16
AT17
AY16
AY25
AW16
AW15
AW28
AY12
AV11
AU26
AW27
AW26
AU25
AW25
AV12
AY27
AW29
AV26
AV29
AU27
AU29
AV27
AU28
AR17
AR16
AT15
AR15
AN17
AN16
AR19
AR18
AM23
AM24
AL24
AK24
AR14
AR13
AR12
AT13
AN15
AP14
AM12
AN12
AN14
AP13
AW8
AY9
AU9
AV9
CPU1B
CPU1B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
SB_WE*
SB_CAS*
SB_RAS*
SB_BA[0]
SB_BA[1]
SB_BA[2]
SB_CS[0]*
SB_CS[1]*
SB_CS[2]*
SB_CS[3]*
SB_CKE[0]
SB_CKE[1]
SB_CKE[2]
SB_CKE[3]
SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]
SB_CK[0]
SB_CK[0]*
SB_CK[1]
SB_CK[1]*
SB_CK[2]
SB_CK[2]*
SB_CK[3]
SB_CK[3]*
SB_CS[4]*
SB_CS[5]*
SB_CS[6]*
SB_CS[7]*
SB_DQS[8]
SB_DQS[8]*
SB_ECC_CB[0]
SB_ECC_CB[1]
SB_ECC_CB[2]
SB_ECC_CB[3]
SB_ECC_CB[4]
SB_ECC_CB[5]
SB_ECC_CB[6]
SB_ECC_CB[7]
DDR_B
DDR_B
2 OF 12
2 OF 12
2
MEM_MB_DQS_H0
SB_DQS[0]
SB_DQS[0]*
SB_DM[0]
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQS[1]
SB_DQS[1]*
SB_DM[1]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQS[2]
SB_DQS[2]*
SB_DM[2]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQS[3]
SB_DQS[3]*
SB_DM[3]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQS[4]
SB_DQS[4]*
SB_DM[4]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQS[5]
SB_DQS[5]*
SB_DM[5]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQS[6]
SB_DQS[6]*
SB_DM[6]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQS[7]
SB_DQS[7]*
SB_DM[7]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
AF4
AE5
AE4
AD7
AD6
AH8
AJ8
AC7
AC6
AF5
AE6
AH6
AJ5
AH4
AG5
AH7
AK6
AL4
AG6
AG4
AJ7
AK7
AN6
AM6
AM7
AL6
AN5
AP6
AR5
AL5
AM4
AN7
AP5
AR8
AP8
AT7
AT6
AR7
AR9
AM8
AN8
AR6
AL8
AT9
AT25
AR24
AN24
AN23
AP23
AR25
AR26
AT23
AP22
AP25
AT26
AP32
AR32
AN32
AT32
AP31
AR33
AM32
AT31
AR31
AR34
AT33
AR36
AR37
AM33
AR35
AT36
AN33
AP36
AP34
AT35
AN34
AP37
AL37
AM36
AK35
AL35
AM35
AJ36
AJ37
AN35
AM34
AJ35
AL36
MEM_MB_DQS_L0
MEM_MB_DM0
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DM1
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DM2
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DM3
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DM4
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DM5
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DM6
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DM7
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
MEM_MB_DQS_H0 9
MEM_MB_DQS_L0 9
MEM_MB_DM0 9
MEM_MB_DQS_H1 9
MEM_MB_DQS_L1 9
MEM_MB_DM1 9
MEM_MB_DQS_H2 9
MEM_MB_DQS_L2 9
MEM_MB_DM2 9
MEM_MB_DQS_H3 9
MEM_MB_DQS_L3 9
MEM_MB_DM3 9
MEM_MB_DQS_H4 9
MEM_MB_DQS_L4 9
MEM_MB_DM4 9
MEM_MB_DQS_H5 9
MEM_MB_DQS_L5 9
MEM_MB_DM5 9
MEM_MB_DQS_H6 9
MEM_MB_DQS_L6 9
MEM_MB_DM6 9
MEM_MB_DQS_H7 9
MEM_MB_DQS_L7 9
MEM_MB_DM7 9
1
MEM_MB_DATA[63..0] 9
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
CPU-Memory
CPU-Memory
CPU-Memory
DELL Shen Yang
DELL Shen Yang
DELL Shen Yang
1
1.0
1.0
1.0
of
534Friday, August 14, 2009
534Friday, August 14, 2009
534Friday, August 14, 2009

Confidential
For Dell Only
5
4
3
2
1
CPU1F
CPU1F
CPU
CPU
A23
VCC
A24
VCC
A26
VCC
A27
VCC
A33
VCC
A35
VCC
A36
VCC
A38
VCC_NCTF
D D
C C
B B
A A
B23
B25
B26
B28
B29
B31
B32
B34
B35
B37
B38
C23
C24
C25
C27
C28
C30
C31
C33
C34
C36
C37
C39
C40
D23
D24
D26
D27
D29
D30
D32
D33
D35
D36
D38
D39
E22
E23
E25
E26
E28
E29
E31
E32
E34
E35
E37
E38
E40
F21
F22
F24
F25
F27
F28
F30
F31
F33
F34
F36
F37
F39
F40
G20
G21
G23
G24
G26
G27
G29
G30
G32
G33
G35
G36
G38
G39
H19
H20
H22
H23
H25
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC_NCTF
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
POWER
POWER
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
6 OF 12
6 OF 12
VCCPVCCP
H26
H28
H29
H31
H32
H34
H35
H37
H38
H40
J18
J19
J21
J22
J24
J25
J27
J28
J30
J31
J33
J34
J36
J37
J39
J40
K17
K18
K20
K21
K23
K24
K26
K27
K29
K30
K32
K33
K35
K36
K38
K39
L17
L19
L20
L22
L23
L25
L26
L28
L29
L31
L32
L34
L35
L37
L38
L40
M17
M19
M21
M22
M24
M25
M27
M28
M30
M33
M34
M36
M37
M39
M40
N33
N35
N36
N38
N39
P33
P34
P35
P36
P37
P38
P39
P40
R33
R34
R35
R36
R37
R38
R39
R40
CPU_VTT
VCC1_8
AA33
AA34
AA35
AA36
AA37
AA38
AC33
AC34
AC35
AC36
AC37
AC38
AC39
AC40
AD33
AD34
AD35
AD36
AD37
AD38
AD39
AD40
AE33
AE34
AE39
AE40
AF33
AG33
AJ31
AJ32
AJ21
AJ25
AJ27
AJ29
AK20
AK21
AL20
AL21
AC8
AE8
AJ17
AJ19
AK19
AC5
AJ23
AG8
AF8
AF7
V33
V34
V35
V36
V37
V38
V39
V40
Y33
Y34
Y35
Y36
Y37
Y38
CPU1G
CPU1G
VTT_01
VTT_02
VTT_03
VTT_04
VTT_05
VTT_06
VTT_07
VTT_08
VTT_09
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53
VTT_54
VTT_55
VTT_56
VTT_57
VTT_58
VTT_60
VCCPLL_01
VCCPLL_02
VCCPLL_03
CPU
CPU
POWER
POWER
7 OF 12
7 OF 12
+CPU_GFX
M14
M15
M16
VCC1_8
A14
A15
A17
A18
B14
B15
B17
B18
C14
C15
C17
C18
C20
C21
D14
D15
D17
D18
D20
D21
E14
E15
E17
E18
E20
F14
F15
F17
F18
F19
G14
G15
G17
G18
H14
H15
H17
J14
J15
J16
K14
K15
K16
L14
L15
L16
CPU1H
CPU1H
VAXG_01
VAXG_02
VAXG_03
VAXG_04
VAXG_05
VAXG_06
VAXG_07
VAXG_08
VAXG_09
VAXG_10
VAXG_11
VAXG_12
VAXG_13
VAXG_14
VAXG_15
VAXG_16
VAXG_17
VAXG_18
VAXG_19
VAXG_20
VAXG_21
VAXG_22
VAXG_23
VAXG_24
VAXG_25
VAXG_26
VAXG_27
VAXG_28
VAXG_29
VAXG_30
VAXG_31
VAXG_32
VAXG_33
VAXG_34
VAXG_35
VAXG_36
VAXG_37
VAXG_38
VAXG_39
VAXG_40
VAXG_41
VAXG_42
VAXG_43
VAXG_44
VAXG_45
VAXG_46
VAXG_47
VAXG_48
VAXG_49
C478
C478
C22u6.3X50805
C22u6.3X50805
+CPU_GFX Decoupling
+CPU_GFX
C188
C188
22uF/6.3V/X5R/0805
22uF/6.3V/X5R/0805
+CPU_GFX
C194
C194
22uF/6.3V/X5R/0805
22uF/6.3V/X5R/0805
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
CPU
CPU
POWER
POWER
8 OF 12
8 OF 12
T6
T7
T8
V7
V8
AB7
VCCP
C173
C173
X_C1u16X5
X_C1u16X5
C198
C198
22uF/6.3V/X5R/0805
22uF/6.3V/X5R/0805
C476
C476
22uF/6.3V/X5R/0805
22uF/6.3V/X5R/0805
CPU_VTT
C155
C155
X_C1u16X5
X_C1u16X5
CPU_VTT
VCC_DDR
C127
C127
X_C1u16X5
X_C1u16X5
C209
C209
22uF/6.3V/X5R/0805
22uF/6.3V/X5R/0805
C473
C473
22uF/6.3V/X5R/0805
22uF/6.3V/X5R/0805
CPU1I
CPU1I
L10
VTT_67
M10
VTT_68
M11
VTT_69
M9
VTT_70
N7
VTT_71
P6
VTT_72
P7
VTT_73
P8
VTT_74
T2
VTT_75
V2
VTT_76
V6
VTT_77
W1
VTT_78
W6
VTT_79
AJ11
VDDQ_01
AJ13
VDDQ_02
AJ15
VDDQ_03
AT10
VDDQ_04
AT18
VDDQ_05
AT21
VDDQ_06
AU11
VDDQ_07
AV13
VDDQ_08
AV16
VDDQ_09
AV19
VDDQ_10
AV22
VDDQ_11
AV25
VDDQ_12
AV28
VDDQ_13
AW9
VDDQ_14
AY11
VDDQ_15
AY14
VDDQ_16
AY17
VDDQ_17
AY23
VDDQ_18
AY26
VDDQ_19
C120
C120
X_C1u16X5
X_C1u16X5
C189
C189
22uF/6.3V/X5R/0805
22uF/6.3V/X5R/0805
9 OF 12
9 OF 12
C105
C105
X_C1u16X5
X_C1u16X5
CPU
CPU
POWER
POWER
+1.5V_DDR3-Decoupling
VCC_DDR
C190
C190
C191
C22u6.3X50805
C22u6.3X50805
CPU SOCKET CAVITY CAPS
C22u6.3X50805
C22u6.3X50805
X_C22u6.3X50805
X_C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
X_C22u6.3X50805
X_C22u6.3X50805
C191
X_C22u6.3X50805
X_C22u6.3X50805
CPU_VTT
C137
C137
C136
C136
C22u6.3X50805
C22u6.3X50805
CPU_VTT
C192
C192
C181
C181
X_C22u6.3X50805
X_C22u6.3X50805
CPU SOCKET CAVITY CAPS
VCCP
C472
C472
C471
C471
C22u6.3X50805
C22u6.3X50805
VCCP
C135
C135
C179
C179
C22u6.3X50805
C22u6.3X50805
VCCP
C167
C167
C151
C151
C22u6.3X50805
C22u6.3X50805
VCCP
C149
C149
C150
C150
X_C22u6.3X50805
X_C22u6.3X50805
PLACE ALL 08056 CAPS INSIDE CPU SOCKET CAVITY
+CPU_VTT Decoupling
C152
C152
C22u6.3X50805
C22u6.3X50805
C180
C180
X_C22u6.3X50805
X_C22u6.3X50805
C153
C153
C22u6.3X50805
C22u6.3X50805
C169
C169
X_C22u6.3X50805
X_C22u6.3X50805
+CPU_VCCP-Decoupling
C470
C470
C22u6.3X50805
C22u6.3X50805
C178
C178
C22u6.3X50805
C22u6.3X50805
C166
C166
C22u6.3X50805
C22u6.3X50805
C148
C148
X_C22u6.3X50805
X_C22u6.3X50805
C468
C468
C22u6.3X50805
C22u6.3X50805
C177
C177
C22u6.3X50805
C22u6.3X50805
C165
C165
C22u6.3X50805
C22u6.3X50805
C134
C134
X_C22u6.3X50805
X_C22u6.3X50805
C477
C477
C4.7u10X51206-RH
C4.7u10X51206-RH
C168
C168
X_C22u6.3X50805
X_C22u6.3X50805
C469
C469
C22u6.3X50805
C22u6.3X50805
C176
C176
C22u6.3X50805
C22u6.3X50805
C164
C164
C22u6.3X50805
C22u6.3X50805
C133
C133
X_C22u6.3X50805
X_C22u6.3X50805
C474
C474
C4.7u10X51206-RH
C4.7u10X51206-RH
C475
C475
X_C4.7u10X51206-RH
X_C4.7u10X51206-RH
C132
C132
X_C22u6.3X50805
X_C22u6.3X50805
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
CPU-Power
CPU-Power
CPU-Power
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
DELL Shen Yang
DELL Shen Yang
DELL Shen Yang
1
of
634Friday, August 14, 2009
634Friday, August 14, 2009
634Friday, August 14, 2009
1.0
1.0
1.0

Confidential
For Dell Only
5
4
3
2
1
CPU1J
CPU1J
A16
VSS
A25
VSS
A28
VSS
A34
VSS
AB33
AB34
AB35
AB36
AB37
AB38
AB39
AB40
AC1
AD5
AD8
AE37
AF40
AG34
AG36
AG7
AH3
AH33
AH38
AH5
AJ12
AJ14
AJ16
AJ18
AJ20
AJ22
AJ24
AJ26
AJ28
AJ30
AJ33
AJ34
AJ40
AK10
AK17
AK36
AL11
AL13
AL16
AL19
AL22
AL25
AL28
AL31
AL34
AL38
AM1
AM40
AM5
AM9
AN13
AN20
AN22
AN25
AN28
AN31
AN36
AN4
AN9
AP12
AP15
AP16
AP17
AP20
AP24
AP26
AP27
AP29
AP33
A37
AA5
AB3
AB6
AB8
AE3
AE7
AF1
AF6
AJ1
AJ6
AJ9
AK4
AK5
AK8
AL3
AL7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D D
C C
B B
AP35
VSS
AP38
VSS
AP4
VSS
AP7
VSS
AP9
VSS
AR1
VSS
AR20
VSS
AR23
VSS
AR30
VSS
AR40
VSS
AT12
VSS
AT14
VSS
AT16
VSS
AT2
VSS
AT24
VSS
AT27
VSS
AT30
VSS
AT34
VSS
AT37
VSS
AT5
VSS
AT8
VSS
AU32
VSS
AU36
VSS
AU6
VSS
AU7
VSS
AV3
VSS
AV31
VSS
AV34
VSS
AV38
VSS
AY33
VSS
AY36
VSS
AY4
VSS
AY7
VSS
B16
VSS
B24
VSS
B27
VSS
B30
VSS
B33
VSS
B36
VSS
B7
VSS
B9
VSS
C13
VSS
C16
VSS
C19
VSS
C22
VSS
C26
VSS
C29
VSS
C32
VSS
C35
VSS
C38
VSS
C5
VSS
D10
VSS
D12
VSS
D13
VSS
D16
VSS
D19
VSS
D22
VSS
D25
VSS
D28
VSS
D31
VSS
D34
VSS
D37
VSS
D4
VSS
D40
VSS
D5
VSS
D6
VSS
D8
VSS
E13
VSS
E16
VSS
E19
VSS
E21
VSS
E24
VSS
E27
VSS
E3
VSS
E30
VSS
E33
VSS
E36
VSS
E39
VSS
E4
VSS
F11
VSS
F13
VSS
F16
VSS
F2
VSS
F20
VSS
F23
VSS
F26
VSS
F29
VSS
F32
VSS
F35
VSS
F38
VSS
G13
G16
G19
G22
G25
G28
G31
G34
G37
G40
H11
H13
H16
H18
H21
H24
H27
H30
H33
H36
H39
K11
K13
K19
K22
K25
K28
K31
K34
K37
K40
M13
M18
M20
M23
M26
M29
M32
M35
M38
N34
N37
N40
CPU1K
CPU1K
F8
VSS
VSS
VSS
VSS
VSS
VSS
CGC_TP_NCTF
VSS
VSS
VSS
VSS
G4
VSS
VSS
G9
VSS
VSS
VSS
VSS
VSS
H2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H5
VSS
H6
VSS
J13
VSS
J17
VSS
J20
VSS
J23
VSS
J26
VSS
J29
VSS
J32
VSS
J35
VSS
J38
VSS
J4
VSS
J7
VSS
J9
VSS
VSS
VSS
VSS
K2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K5
VSS
K6
VSS
L13
VSS
L18
VSS
L21
VSS
L24
VSS
L27
VSS
L30
VSS
L33
VSS
L36
VSS
L39
VSS
L4
VSS
L9
VSS
VSS
VSS
M2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
M6
M7
N4
P2
P5
R4
T33
T36
T37
T38
T5
U4
V5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
W33
W34
W35
W36
W37
B39
W38
Y7
AM14
AM13
AK15
AK16
AM25
AL29
AM30
AK29
AK28
AM29
AM28
AL27
AK27
AM26
AM27
AL26
AK26
AK25
AN11
L12
M12
AM21
AM20
AM19
AM18
T39
AL18
AK18
AM15
AM16
AL15
AL14
AL17
AM17
AK14
AK13
AL12
AK12
AY3
C2
D1
AY37
AW38
AV1
AW2
AV39
AU40
A4
B3
TP_CGC DIMM_VREFA
TP_MCP_AN11
R156R156
TP_MCP_AY3
TP_MCP_C2
TP_MCP_D1
TP_MCP_AY37
TP_MCP_AW38
TP_MCP_AV1
TP_MCP_AW2
TP_MCP_AV39
TP_MCP_AU40
TP_MCP_A4
TP_MCP_B3
NOTE:R286,R274 STUFFED,IF DDR3 DIMM VREFDQ OPTION 2 UNSTUFFED.
VREF_DQ_B
TP31TP31
VREF_DQ_A
R286 0R0402R286 0R0402
R274 0R0402R274 0R0402
close to DIMM
FOLLOW DDR3 DIMM VREFDQ Platform Design
Guide Change Option 3
TP35TP35
TP37TP37
TP2TP2
TP3TP3
TP33TP33
TP32TP32
TP39TP39
TP38TP38
TP30TP30
TP29TP29
TP40TP40
TP41TP41
DIMM_VREFB
AF3
AG3
AD2
AE2
AH40
AJ39
CPU1L
CPU1L
A12
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
RSVD
RSVD
RSVD
RSVD
RSVD
NC/SPARE
NC/SPARE
12 OF 12
12 OF 12
GND
10 OF 12
A A
10 OF 12
5
4
11 OF 12
11 OF 12
GND
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
CPU-GND
CPU-GND
CPU-GND
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
3
2
Date: Sheet of
MICRO-START INT'L CO.,LTD.
DELL Shen Yang
DELL Shen Yang
DELL Shen Yang
1
of
734Friday, August 14, 2009
734Friday, August 14, 2009
734Friday, August 14, 2009
1.0
1.0
1.0

Confidential
For Dell Only
5
4
3
2
1
DDRIII DIMM_A1 DDRIII DIMM_A2
167
NC/TEST4
VSS
229
79
48
RSVD
FREE1
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
VSS
VSS
232
235
187
FREE249FREE3
A10/AP
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS8#
DM0/DQS9
NC/DQS9#
RESET#
CK1(NU)
CK1#(NU)
VREFDQ
VREFCA
VSS
MEC1
239
MEC1
VCC3
C61 C0.1u16Y0402C61 C0.1u16Y0402
198
MEM_MA_ADD0
188
A0
MEM_MA_ADD1
181
A1
FREE4
MEM_MA_ADD2
61
A2
MEM_MA_ADD3
180
A3
MEM_MA_ADD4
59
A4
MEM_MA_ADD5
58
A5
MEM_MA_ADD6
178
A6
MEM_MA_ADD7
56
A7
MEM_MA_ADD8
177
A8
MEM_MA_ADD9
175
A9
MEM_MA_ADD10
70
MEM_MA_ADD11
55
A11
MEM_MA_ADD12
174
A12
MEM_MA_ADD13
196
A13
MEM_MA_ADD14
172
A14
MEM_MA_ADD15 MEM_MA_ADD15
171
A15
39
CB0
40
CB1
45
CB2
46
CB3
158
CB4
159
CB5
164
CB6
165
CB7
MEM_MA_DQS_H0
7
DQS0
MEM_MA_DQS_L0
6
MEM_MA_DQS_H1
16
DQS1
MEM_MA_DQS_L1
15
MEM_MA_DQS_H2
25
DQS2
MEM_MA_DQS_L2
24
MEM_MA_DQS_H3
34
DQS3
MEM_MA_DQS_L3
33
MEM_MA_DQS_H4
85
DQS4
MEM_MA_DQS_L4
84
MEM_MA_DQS_H5
94
DQS5
MEM_MA_DQS_L5
93
MEM_MA_DQS_H6
103
DQS6
MEM_MA_DQS_L6
102
MEM_MA_DQS_H7
112
DQS7
MEM_MA_DQS_L7
111
43
DQS8
42
MEM_MA_DM0
125
126
MEM_MA_DM1
134
135
MEM_MA_DM2
143
144
MEM_MA_DM3
152
153
MEM_MA_DM4
203
204
MEM_MA_DM5
212
213
MEM_MA_DM6
221
222
MEM_MA_DM7
230
231
161
162
MEM_MA_ODT0
195
ODT0
MEM_MA_ODT1
77
ODT1
MEM_MA_CKE0
50
CKE0
MEM_MA_CKE1
169
CKE1
MEM_MA_CS_L0
193
CS0#
MEM_MA_CS_L1
76
CS1#
MEM_MA_BANK0
71
BA0
MEM_MA_BANK1
190
BA1
MEM_MA_BANK2
52
BA2
MEM_MA_WE_L
73
WE#
MEM_MA_RAS_L
192
RAS#
MEM_MA_CAS_L
74
CAS#
DDR3_DRAMRST#
168
MEM_MA_CLK_H0
184
CK0
MEM_MA_CLK_L0
185
CK0#
MEM_MA_CLK_H1
63
MEM_MA_CLK_L1
64
VREF_DQ_A
1
VREF_CA_A
67
SMBCLK_DDR
118
SCL
SMBDATA_DDR
238
SDA
237
SA1
117
SA0
MEC2
MEC3
DDEIII-240_BLUE-R
DDEIII-240_BLUE-R
DIMM1(CHANNEL-A)
MEC2
MEC3
ADDRESS = 0:0 [SA1:SA0]
C0.1u16Y0402
C0.1u16Y0402
MEM_MA_ADD[15..0] 5
MEM_MA_DQS_H0 5
MEM_MA_DQS_L0 5
MEM_MA_DQS_H1 5
MEM_MA_DQS_L1 5
MEM_MA_DQS_H2 5
MEM_MA_DQS_L2 5
MEM_MA_DQS_H3 5
MEM_MA_DQS_L3 5
MEM_MA_DQS_H4 5
MEM_MA_DQS_L4 5
MEM_MA_DQS_H5 5
MEM_MA_DQS_L5 5
MEM_MA_DQS_H6 5
MEM_MA_DQS_L6 5
MEM_MA_DQS_H7 5
MEM_MA_DQS_L7 5
MEM_MA_DM0 5
MEM_MA_DM1 5
MEM_MA_DM2 5
MEM_MA_DM3 5
MEM_MA_DM4 5
MEM_MA_DM5 5
MEM_MA_DM6 5
MEM_MA_DM7 5
MEM_MA_ODT0 5
MEM_MA_ODT1 5
MEM_MA_CKE0 5
MEM_MA_CKE1 5
MEM_MA_CS_L0 5
MEM_MA_CS_L1 5
MEM_MA_BANK0 5
MEM_MA_BANK1 5
MEM_MA_BANK2 5
MEM_MA_WE_L 5
MEM_MA_RAS_L 5
MEM_MA_CAS_L 5
DDR3_DRAMRST# 5,9
MEM_MA_CLK_H0 5
MEM_MA_CLK_L0 5
MEM_MA_CLK_H1 5
MEM_MA_CLK_L1 5
C143
C143
SMBCLK_DDR9
SMBDATA_DDR9
3
C251
C251
C0.1u16Y0402
C0.1u16Y0402
SMBCLK_DDR
SMBDATA_DDR
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
R206 33R0402R206 33R0402
R211 33R0402R211 33R0402
VCC5
VCC_DDR
54
DIMM1
DIMM1
3
DQ0
VDD51VDD
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1
2
5
4
3
107
U13
U13
VCC
BUS_SEL
SCL
SDA
GND
X_uP6262
X_uP6262
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
VSS
VSS
VSS
VSS
VSS
110
113
116
119
OUT1
OUT2
OUT3
4
9
10
122
123
128
129
12
13
18
19
131
132
137
138
21
22
27
28
140
141
146
147
30
31
36
37
149
150
155
156
81
82
87
88
200
201
206
207
90
91
96
97
209
210
215
216
99
100
105
106
218
219
224
225
108
109
114
115
227
228
233
234
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
80
83
86
89
92
95
98
101
104
170
173
176
179
VDD
VDD
VDD
DDR3
DDR3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
121
124
127
130
133
136
139
142
145
148
151
VREF_DQ_A
8
7
6
MEM_MA_DATA[63..0]5
D D
C C
B B
UPI VOLTAGE CONSOLE
VREF_CA_A
VREF_CA_A
C139
C139
C0.1u16Y0402
C0.1u16Y0402
UPI VOLTAGE CONSOLE
VREF_DQ_A
VREF_DQ_A
C247
C247
C0.1u16Y0402
C0.1u16Y0402
MEM_MA_DATA[63..0]
R188 1KR1%0402R188 1KR1%0402
R190
R190
1KR1%0402
1KR1%0402
R320 1KR1%0402R320 1KR1%0402
R310
R310
1KR1%0402
1KR1%0402
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
VCC_DDR
VCC_DDR
UPI VOLTAGE CONSOLE(3+1)
A A
2.083325V
0x66:RH=18K,RL=13K
R209 X_13KR1%0402R209 X_13KR1%0402
SMBCLK
SMBDATA
5
VCC5
R208
R208
X_18KR1%0402
X_18KR1%0402
R204R204
R210R210
182
183
186
189
VDD
VDD
VDD
VSS
VSS
VSS
154
157
160
163
VREF_CA_B
4
VCC3
VTT_DDR
191
194
197
120
240
53
236
68
VTT
VDD
VSS
166
VTT
VDD
VDD
VDD
VDDSPD
NC/PAR_IN
NC/ERR_OUT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
199
202
205
208
211
214
217
220
223
226
VCC_DDR VCC3
54
DIMM3
DIMM3
3
DQ0
VDD51VDD
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
107
110
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
VSS
VSS
VSS
113
116
119
SMBCLK 10,13,17,25,29
SMBDATA 10,13,17,25,29
4
9
10
122
123
128
129
12
13
18
19
131
132
137
138
21
22
27
28
140
141
146
147
30
31
36
37
149
150
155
156
81
82
87
88
200
201
206
207
90
91
96
97
209
210
215
216
99
100
105
106
218
219
224
225
108
109
114
115
227
228
233
234
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
80
83
86
89
92
95
98
101
104
170
173
176
179
VDD
VDD
DDR3
DDR3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
121
124
127
130
133
136
139
142
145
148
151
2
VTT_DDR
182
183
186
189
191
194
197
236
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
154
157
160
163
166
199
202
205
208
79
167
120
240
53
48
187
198
68
MEM_MA_ADD0
VTT
VTT
RSVD
NC/TEST4
NC/PAR_IN
NC/ERR_OUT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
211
214
217
220
223
226
229
232
188
A0
MEM_MA_ADD1
181
A1
FREE1
FREE249FREE3
FREE4
MEM_MA_ADD2
61
A2
MEM_MA_ADD3
180
A3
MEM_MA_ADD4
59
A4
MEM_MA_ADD5
58
A5
MEM_MA_ADD6
178
A6
MEM_MA_ADD7
56
A7
MEM_MA_ADD8
177
A8
MEM_MA_ADD9
175
A9
MEM_MA_ADD10
70
A10/AP
MEM_MA_ADD11
55
A11
MEM_MA_ADD12
174
A12
MEM_MA_ADD13
196
A13
MEM_MA_ADD14
172
A14
171
A15
39
CB0
40
CB1
45
CB2
46
CB3
158
CB4
159
CB5
164
CB6
165
CB7
MEM_MA_DQS_H0
7
DQS0
MEM_MA_DQS_L0
6
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS8#
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
RESET#
CK1(NU)
CK1#(NU)
VREFDQ
VREFCA
VSS
VSS
MEC1
235
239
MEC1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
MEM_MA_DQS_H1
16
DQS1
MEM_MA_DQS_L1
15
MEM_MA_DQS_H2
25
DQS2
MEM_MA_DQS_L2
24
MEM_MA_DQS_H3
34
DQS3
MEM_MA_DQS_L3
33
MEM_MA_DQS_H4
85
DQS4
MEM_MA_DQS_L4
84
MEM_MA_DQS_H5
94
DQS5
MEM_MA_DQS_L5
93
MEM_MA_DQS_H6
103
DQS6
MEM_MA_DQS_L6
102
MEM_MA_DQS_H7
112
DQS7
MEM_MA_DQS_L7
111
43
DQS8
42
MEM_MA_DM0
125
126
MEM_MA_DM1
134
135
MEM_MA_DM2
143
144
MEM_MA_DM3
152
153
MEM_MA_DM4
203
204
MEM_MA_DM5
212
213
MEM_MA_DM6
221
222
MEM_MA_DM7
230
231
161
162
MEM_MA_ODT2
195
ODT0
MEM_MA_ODT3
77
ODT1
MEM_MA_CKE2
50
CKE0
MEM_MA_CKE3
169
CKE1
MEM_MA_CS_L2
193
CS0#
MEM_MA_CS_L3
76
CS1#
MEM_MA_BANK0
71
BA0
MEM_MA_BANK1
190
BA1
MEM_MA_BANK2
52
BA2
MEM_MA_WE_L
73
WE#
MEM_MA_RAS_L
192
RAS#
MEM_MA_CAS_L
74
CAS#
DDR3_DRAMRST#
168
MEM_MA_CLK_H2
184
CK0
MEM_MA_CLK_L2
185
CK0#
MEM_MA_CLK_H3
63
MEM_MA_CLK_L3
64
VREF_DQ_A
1
VREF_CA_A
67
SMBCLK_DDR
118
SCL
SMBDATA_DDR
238
SDA
237
SA1
117
SA0
MEC2
MEC3
MEC2
MEC3
DDR3 Chanel-A DIMM1/2
DDR3 Chanel-A DIMM1/2
DDR3 Chanel-A DIMM1/2
VCC3
C0.1u16Y0402
DDEIII-240_PINK-R
DDEIII-240_PINK-R
DIMM2(CHANNEL-A)
ADDRESS = 0:1 [SA1:SA0]
DELL Shen Yang
DELL Shen Yang
DELL Shen Yang
C0.1u16Y0402
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
1
MEM_MA_ODT2 5
MEM_MA_ODT3 5
MEM_MA_CKE2 5
MEM_MA_CKE3 5
MEM_MA_CS_L2 5
MEM_MA_CS_L3 5
MEM_MA_CLK_H2 5
MEM_MA_CLK_L2 5
MEM_MA_CLK_H3 5
MEM_MA_CLK_L3 5
C147
C147
C250
C250
C0.1u16Y0402
C0.1u16Y0402
834Friday, August 14, 2009
834Friday, August 14, 2009
834Friday, August 14, 2009
1.0
1.0
1.0
of

Confidential
For Dell Only
5
4
3
2
1
DDRIII DIMM_B1 DDRIII DIMM_B2
VCC_DDR
MEM_MB_DATA[63..0]5
54
DIMM2
MEM_MB_DATA0
D D
C C
B B
VREF_CA_B
VREF_DQ_B
VREF_CA_B
C156
C156
C0.1u16Y0402
C0.1u16Y0402
VREF_DQ_B
C252
C252
C0.1u16Y0402
C0.1u16Y0402
R196
R196
1KR1%0402
1KR1%0402
R307
R307
1KR1%0402
1KR1%0402
VCC_DDR
R197 1KR1%0402R197 1KR1%0402
VCC_DDR
R303 1KR1%0402R303 1KR1%0402
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
DIMM2
3
DQ0
VDD51VDD
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
VSS
VSS
VSS
VSS
107
110
113
116
119
VSS
4
9
10
122
123
128
129
12
13
18
19
131
132
137
138
21
22
27
28
140
141
146
147
30
31
36
37
149
150
155
156
81
82
87
88
200
201
206
207
90
91
96
97
209
210
215
216
99
100
105
106
218
219
224
225
108
109
114
115
227
228
233
234
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
80
83
86
89
92
95
98
101
104
170
173
176
179
VDD
VDD
VDD
DDR3
DDR3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
121
124
127
130
133
136
139
142
145
148
151
VCC3
VTT_DDR
182
183
186
189
191
194
197
236
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
154
157
160
163
166
199
202
205
208
79
167
120
240
53
48
187
198
68
MEM_MB_ADD0
VTT
VTT
RSVD
NC/TEST4
NC/PAR_IN
NC/ERR_OUT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
211
214
217
220
223
226
229
232
188
A0
181
A1
FREE1
FREE249FREE3
FREE4
61
A2
180
A3
59
A4
58
A5
178
A6
56
A7
177
A8
175
A9
70
A10/AP
55
A11
174
A12
196
A13
172
A14
171
A15
39
CB0
40
CB1
45
CB2
46
CB3
158
CB4
159
CB5
164
CB6
165
CB7
7
DQS0
6
DQS0#
16
DQS1
15
DQS1#
25
DQS2
24
DQS2#
34
DQS3
33
DQS3#
85
DQS4
84
DQS4#
94
DQS5
93
DQS5#
103
DQS6
102
DQS6#
112
DQS7
111
DQS7#
43
DQS8
42
DQS8#
125
DM0/DQS9
126
NC/DQS9#
134
DM1/DQS10
135
NC/DQS10#
143
DM2/DQS11
144
NC/DQS11#
152
DM3/DQS12
153
NC/DQS12#
203
DM4/DQS13
204
NC/DQS13#
212
DM5/DQS14
213
NC/DQS14#
221
DM6/DQS15
222
NC/DQS15#
230
DM7/DQS16
231
NC/DQS16#
161
DM8/DQS17
162
NC/DQS17#
195
ODT0
77
ODT1
50
CKE0
169
CKE1
193
CS0#
76
CS1#
71
BA0
190
BA1
52
BA2
73
WE#
192
RAS#
74
CAS#
168
RESET#
184
CK0
185
CK0#
63
CK1(NU)
64
CK1#(NU)
1
VREFDQ
67
VREFCA
118
SCL
238
SDA
237
SA1
117
SA0
VSS
VSS
MEC1
MEC2
MEC3
DDEIII-240_BLUE-R
DDEIII-240_BLUE-R
235
239
DIMM3(CHANNEL-B)
MEC1
MEC2
MEC3
ADDRESS = 1:0 [SA1:SA0]
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB_ODT0
MEM_MB_ODT1
MEM_MB_CKE0
MEM_MB_CKE1
MEM_MB_CS_L0
MEM_MB_CS_L1
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_CAS_L
DDR3_DRAMRST#
MEM_MB_CLK_H0
MEM_MB_CLK_L0
MEM_MB_CLK_H1
MEM_MB_CLK_L1
VREF_DQ_B
VREF_CA_B VREF_CA_B
SMBCLK_DDR SMBCLK_DDR
SMBDATA_DDR
VCC3
C0.1u16Y0402
C0.1u16Y0402
MEM_MB_ADD[15..0] 5
MEM_MB_DQS_H0 5
MEM_MB_DQS_L0 5
MEM_MB_DQS_H1 5
MEM_MB_DQS_L1 5
MEM_MB_DQS_H2 5
MEM_MB_DQS_L2 5
MEM_MB_DQS_H3 5
MEM_MB_DQS_L3 5
MEM_MB_DQS_H4 5
MEM_MB_DQS_L4 5
MEM_MB_DQS_H5 5
MEM_MB_DQS_L5 5
MEM_MB_DQS_H6 5
MEM_MB_DQS_L6 5
MEM_MB_DQS_H7 5
MEM_MB_DQS_L7 5
MEM_MB_DM0 5
MEM_MB_DM1 5
MEM_MB_DM2 5
MEM_MB_DM3 5
MEM_MB_DM4 5
MEM_MB_DM5 5
MEM_MB_DM6 5
MEM_MB_DM7 5
MEM_MB_ODT0 5
MEM_MB_ODT1 5
MEM_MB_CKE0 5
MEM_MB_CKE1 5
MEM_MB_CS_L0 5
MEM_MB_CS_L1 5
MEM_MB_BANK0 5
MEM_MB_BANK1 5
MEM_MB_BANK2 5
MEM_MB_WE_L 5
MEM_MB_RAS_L 5
MEM_MB_CAS_L 5
DDR3_DRAMRST# 5,8
MEM_MB_CLK_H0 5
MEM_MB_CLK_L0 5
MEM_MB_CLK_H1 5
MEM_MB_CLK_L1 5
C142
C142
C246
C246
C0.1u16Y0402
C0.1u16Y0402
VCC_DDR
C193
C193
C0.1u16Y0402
C0.1u16Y0402
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
VCC_DDR VCC3
54
DIMM4
DIMM4
3
DQ0
VDD51VDD
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
VSS
VSS
VSS
VSS
107
110
113
116
119
VSS
4
9
10
122
123
128
129
12
13
18
19
131
132
137
138
21
22
27
28
140
141
146
147
30
31
36
37
149
150
155
156
81
82
87
88
200
201
206
207
90
91
96
97
209
210
215
216
99
100
105
106
218
219
224
225
108
109
114
115
227
228
233
234
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
80
83
86
89
92
95
98
101
104
170
173
176
179
VDD
VDD
DDR3
DDR3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
121
124
127
130
133
136
139
142
145
148
151
VTT_DDR
182
183
186
189
191
194
197
236
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
154
157
160
163
166
199
202
205
208
79
167
120
240
53
48
187
198
68
MEM_MB_ADD0
VTT
VTT
RSVD
NC/TEST4
NC/PAR_IN
NC/ERR_OUT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
211
214
217
220
223
226
229
232
188
A0
181
A1
FREE1
FREE249FREE3
FREE4
61
A2
180
A3
59
A4
58
A5
178
A6
56
A7
177
A8
175
A9
70
A10/AP
55
A11
174
A12
196
A13
172
A14
171
A15
39
CB0
40
CB1
45
CB2
46
CB3
158
CB4
159
CB5
164
CB6
165
CB7
7
DQS0
6
DQS0#
16
DQS1
15
DQS1#
25
DQS2
24
DQS2#
34
DQS3
33
DQS3#
85
DQS4
84
DQS4#
94
DQS5
93
DQS5#
103
DQS6
102
DQS6#
112
DQS7
111
DQS7#
43
DQS8
42
DQS8#
125
DM0/DQS9
126
NC/DQS9#
134
DM1/DQS10
135
NC/DQS10#
143
DM2/DQS11
144
NC/DQS11#
152
DM3/DQS12
153
NC/DQS12#
203
DM4/DQS13
204
NC/DQS13#
212
DM5/DQS14
213
NC/DQS14#
221
DM6/DQS15
222
NC/DQS15#
230
DM7/DQS16
231
NC/DQS16#
161
DM8/DQS17
162
NC/DQS17#
195
ODT0
77
ODT1
50
CKE0
169
CKE1
193
CS0#
76
CS1#
71
BA0
190
BA1
52
BA2
73
WE#
192
RAS#
74
CAS#
168
RESET#
184
CK0
185
CK0#
63
CK1(NU)
64
CK1#(NU)
1
VREFDQ
67
VREFCA
118
SCL
238
SDA
237
SA1
117
SA0
VSS
VSS
MEC1
MEC2
MEC3
DDEIII-240_PINK-R
DDEIII-240_PINK-R
235
239
DIMM4(CHANNEL-B)
MEC1
MEC2
MEC3
ADDRESS = 1:1 [SA1:SA0]
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15MEM_MB_ADD15
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB_ODT2
MEM_MB_ODT3
MEM_MB_CKE2
MEM_MB_CKE3
MEM_MB_CS_L2
MEM_MB_CS_L3
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_CAS_L
DDR3_DRAMRST#
MEM_MB_CLK_H2
MEM_MB_CLK_L2
MEM_MB_CLK_H3
MEM_MB_CLK_L3
VREF_DQ_B
SMBDATA_DDR
VCC3
MEM_MB_ODT2 5
MEM_MB_ODT3 5
MEM_MB_CKE2 5
MEM_MB_CKE3 5
MEM_MB_CS_L2 5
MEM_MB_CS_L3 5
MEM_MB_CLK_H2 5
MEM_MB_CLK_L2 5
MEM_MB_CLK_H3 5
MEM_MB_CLK_L3 5
C0.1u16Y0402
C0.1u16Y0402
C144
C144
C242
C242
C0.1u16Y0402
C0.1u16Y0402
A A
SMBCLK_DDR
SMBDATA_DDR
5
4
3
SMBCLK_DDR 8
SMBDATA_DDR 8
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
DDR3 Chanel-B DIMM3/4
DDR3 Chanel-B DIMM3/4
DDR3 Chanel-B DIMM3/4
DELL Shen Yang
DELL Shen Yang
DELL Shen Yang
1
1.0
1.0
1.0
of
934Friday, August 14, 2009
934Friday, August 14, 2009
934Friday, August 14, 2009

Confidential
For Dell Only
5
D D
L17
L17
X_150L800mA-150_0805-RH
VCC3
VCC3
C C
X_150L800mA-150_0805-RH
CP11CP11
C334
C334
C10u10Y0805
C10u10Y0805
L20
L20
X_150L800mA-150_0805-RH
X_150L800mA-150_0805-RH
CP12CP12
C351
C351
C0.1u16Y0402
C0.1u16Y0402
C340
C340
C0.1u16Y0402
C0.1u16Y0402
C333
C333
C0.1u16Y0402
C0.1u16Y0402
C355
C355
C0.1u16Y0402
C0.1u16Y0402
C329
C329
C0.1u16Y0402
C0.1u16Y0402
C365
C365
C0.1u16Y0402
C0.1u16Y0402
C350
C350
C0.1u16Y0402
C0.1u16Y0402
4
VCC3_CLK1
C364
C364
C0.1u16Y0402
C0.1u16Y0402
VCC3_CLK2
3
VCC3
R366
R366
4.7KR0402
4.7KR0402
CLK133M_CLKGEN_OUT0#11
CLK133M_CLKGEN_OUT011
SMBCLK8,13,17,25,29
SMBDATA8,13,17,25,29
VCC3_CLK1
R365R365
R364R364
VCC3_CLK1
XOUT
XIN
VCC3_CLK1
18
19
20
21
22
23
24
25
26
27
28
32
31
30
U22
U22
RESET#
VDDCPU
CPUC_LR
CPUT_LR
GNDCPU
SCLK
SDATA
VDDREF
X2
X1
GNDREF
GND
GND
VDD
GND
9LRS4180AKLFT_MLF32-RH
9LRS4180AKLFT_MLF32-RH
33
VTTPWRG/PD#
DOT96T_LR
DOT96C_LR
VDDPCIEX
GNDPCIEX
PCIEC_LR
PCIEXT_LR
VDDSATA
SATA_LR
SATAC_LR
USB48M/FSLA
REF/FSLC
VDD
VDD96
GND96
VDDA
AGND
FSLB
2
1
2
3
5
6
7
12
13
14
15
9
10
11
16
17
4
8
29
VCC3_CLK1
R399 1KR0402R399 1KR0402
VCC3_CLK2
VCC3_CLK1
VCC3_CLK2
VCC3_CLK2
FSLA
FSLB
FSLC
R411 33R0402R411 33R0402
R398 33R0402R398 33R0402
VRM_GD 13,25,27
CLK96M_DOT_P 11
CLK96M_DOT_N 11
2/10 Modified.
CLK100M_DMI_IN_N 11
CLK100M_DMI_IN_P 11
CLK100M_SATA_P 11
CLK100M_SATA_N 11
SIO_48M 16
CLK14M_PCH 11
1
Y1
Y1
14.318MHZ16P_D-RH
14.318MHZ16P_D-RH
1 2
X_4.7KR0402
X_4.7KR0402
FSLC
FSLB
FSLA
4.7KR0402
4.7KR0402
XOUT
XIN
R390
R390
R389
R389
VCC3
R410
R410
X_4.7KR0402
X_4.7KR0402
R401
R401
4.7KR0402
4.7KR0402
R412
R412
4.7KR0402
4.7KR0402
R400
R400
X_4.7KR0402
X_4.7KR0402
2
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
CLOCK GEN SILEGO ICS9LPRS4180
CLOCK GEN SILEGO ICS9LPRS4180
CLOCK GEN SILEGO ICS9LPRS4180
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
MICRO-START INT'L CO.,LTD.
DELL Shen Yang
DELL Shen Yang
DELL Shen Yang
10 34Friday, August 14, 2009
10 34Friday, August 14, 2009
10 34Friday, August 14, 2009
1
1.0
1.0
1.0
of
C338 C22p50NC338 C22p50N
C346 C22p50NC346 C22p50N
B B
CLOCK EMI CAPS: DEFAULT EMPTY
SIO_48M
CLK14M_PCH
A A
5
4
C374 X_C10p50N0402C374 X_C10p50N0402
C363 X_C10p50N0402C363 X_C10p50N0402
3

Confidential
For Dell Only
5
PE4_TX17
PE4_TX#17
D D
PE1_LAN_TX19
PE1_LAN_TX#19
PE4_RX17
PE4_RX#17 PE0_CLK 17
PE1_LAN_RX19
PE1_LAN_RX#19
DMI_RX34
DMI_RX3#4
DMI_RX24
DMI_RX2#4
DMI_RX14
DMI_RX1#4
C C
B B
A A
DMI_RX04
DMI_RX0#4
DMI_TX34
DMI_TX3#4
DMI_TX24
DMI_TX2#4
DMI_TX14
DMI_TX1#4
DMI_TX04
DMI_TX0#4
FRAME#18
DEVSEL#18
PERR#18
SERR#18
PCI_PME#18
PCH_PCIRST#18
PREQ#318
PREQ#218
PREQ#118
PREQ#018
PIRQ#A18
PIRQ#B18
PIRQ#C18
PIRQ#D18
PIRQ#E18
PIRQ#F18
PIRQ#G18
PIRQ#H18
STOP#18
LOCK#18
PAR18
IRDY#18
TRDY#18
PGNT#313
PGNT#213
PGNT#118
PGNT#018
C311 C0.1u16X0402C311 C0.1u16X0402
C309 C0.1u16X0402C309 C0.1u16X0402
DMI_RX3
DMI_RX3#
DMI_RX2
DMI_RX2#
DMI_RX1
DMI_RX1#
DMI_RX0
DMI_RX0#
DMI_TX3
DMI_TX3#
DMI_TX2
DMI_TX2#
DMI_TX1
DMI_TX1#
DMI_TX0
DMI_TX0#
FRAME#
DEVSEL#
IRDY#
TRDY#
STOP#
LOCK#
PAR
PERR#
SERR#
PCI_PME#
CK_PCH_33M_FB
R439 33R0402R439 33R0402
PGNT#3
PGNT#2
PGNT#1
PGNT#0
PREQ#3
PREQ#2
PREQ#1
PREQ#0
PIRQ#A
PIRQ#B
PIRQ#C
PIRQ#D
PIRQ#E
PIRQ#F
PIRQ#G
PIRQ#H
5
PCI_RST#
TX1_P
TX1_N
AK12
AH11
AL11
AH10
AK11
AW5
AT11
AP12
AW4
J12
K12
D10
D11
H11
G11
G12
H12
L14
K14
G14
H14
G16
H16
D17
D18
B8
C7
B11
A12
C9
D8
B13
C12
D13
D14
C14
B15
A16
B17
C16
D15
K24
L24
G24
H24
F22
G22
H22
J22
H18
G18
D20
E20
C19
B20
B18
A19
AL7
AT6
AP7
AL6
AN8
AP6
AT4
AV6
AM3
BA9
AK6
AH8
AY4
AP4
AT8
AR4
BA5
AU8
AH7
PCH1A
PCH1A
PETP8
PETN8
PETP7
PETN7
PETP6
PETN6
PETP5
PETN5
PETP4
PETN4
PETP3
PETN3
PETP2
PETN2
PETP1
PETN1
PERP8
PERN8
PERP7
PERN7
PERP6
PERN6
PERP5
PERN5
PERP4
PERN4
PERP3
PERN3
PERP2
PERN2
PERP1
PERN1
DMI3TXP
DMI3TXN
DMI2TXP
DMI2TXN
DMI1TXP
DMI1TXN
DMI0TXP
DMI0TXN
DMI3RXP
DMI3RXN
DMI2RXP
DMI2RXN
DMI1RXP
DMI1RXN
DMI0RXP
DMI0RXN
IBEX_0
IBEX_0
PCH1B
PCH1B
FRAME_N
DEVSEL_N
IRDY_N
TRDY_N
STOP_N
PLOCK_N
PAR
PERR_N
SERR_N
PME_N
PCICLK
PCIRST_N
GNT3_N_GPIO55
GNT2_N_GPIO53
GNT1_N_GPIO51
GNT0_N
REQ3_N_GPIO54
REQ2_N_GPIO52
REQ1_N_GPIO50
REQ0_N
PIRQA_N
PIRQB_N
PIRQC_N
PIRQD_N
PIRQE_N_GPIO2
PIRQF_N_GPIO3
PIRQG_N_GPIO4
PIRQH_N_GPIO5
IBEX_0
IBEX_0
IBEXPEAK_A
IBEXPEAK_A
DMI PCI-E
DMI PCI-E
IBEXPEAK_A
IBEXPEAK_A
PCI
PCI
2 OF 9
2 OF 9
OC7_N_GPIO14
USB
USB
OC6_N_GPIO10
OC5_N_GPIO9
OC4_N_GPIO43
OC3_N_GPIO42
OC2_N_GPIO41
OC1_N_GPIO40
OC0_N_GPIO59
USBRBIAS_N
DMI_IRCOMP
DMI_ZCOMP
1 OF 9
1 OF 9
C_BE_N<3>
C_BE_N<2>
C_BE_N<1>
C_BE_N<0>
USBP13P
USBP13N
USBP12P
USBP12N
USBP11P
USBP11N
USBP10P
USBP10N
USBRBIAS
AD<31>
AD<30>
AD<29>
AD<28>
AD<27>
AD<26>
AD<25>
AD<24>
AD<23>
AD<22>
AD<21>
AD<20>
AD<19>
AD<18>
AD<17>
AD<16>
AD<15>
AD<14>
AD<13>
AD<12>
AD<11>
AD<10>
AD<9>
AD<8>
AD<7>
AD<6>
AD<5>
AD<4>
AD<3>
AD<2>
AD<1>
AD<0>
USBP9P
USBP9N
USBP8P
USBP8N
USBP7P
USBP7N
USBP6P
USBP6N
USBP5P
USBP5N
USBP4P
USBP4N
USBP3P
USBP3N
USBP2P
USBP2N
USBP1P
USBP1N
USBP0P
USBP0N
AN11
AH12
AN6
AK7
AN7
AL9
AV10
AL4
AT2
AL2
AT5
AL10
AY8
AM4
AM11
AM2
AN3
AU1
AP2
AU3
AR8
AW7
AR3
AW9
AV7
AR9
AV8
AP9
AY10
AU6
AP11
AT9
AW10
AP5
AY6
AV3
BA16
AY17
AL18
AK18
AT20
AR20
AV18
AV17
AN20
AM20
AY18
BA19
AW19
AV20
AL20
AK20
AW21
AY20
AV22
AV21
AP22
AR22
AY22
AW23
AY24
BA23
AY25
AW25
AM30
AL30
AL28
AP31
AP30
AK28
AT30
AT31
AV15
AY15
D21
C21
4
USBP11
USBN11
USBP10
USBN10
USBP9
USBN9
USBP8
USBN8
USBP7
USBN7
USBP6
USBN6
USBP5
USBN5
USBP4
USBN4
USBP3
USBN3
USBP2
USBN2
USBP1
USBN1
USBP0
USBN0
XDP_USB_OC#7
XDP_USB_OC#6
XDP_USB_OC#5
XDP_USB_OC#4
XDP_USB_OC#3
XDP_USB_OC#2
XDP_USB_OC#1
XDP_USB_OC#0
USBRBIAS
DMI_COMP
XDP_USB_OC#7
XDP_USB_OC#6
XDP_USB_OC#5
XDP_USB_OC#4
XDP_USB_OC#3
XDP_USB_OC#2
XDP_USB_OC#1
XDP_USB_OC#0
For PCH XDP
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C_BE#3
C_BE#2
C_BE#1
C_BE#0
4
USBP11 22
USBN11 22
USBP10 22
USBN10 22
USBP9 22
USBN9 22
USBP8 22
USBN8 22
USBP7 22
USBN7 22
USBP6 22
USBN6 22
USBP5 22
USBN5 22
USBP4 22
USBN4 22
USBP3 22
USBN3 22
USBP2 22
USBN2 22
USBP1 22
USBN1 22
USBP0 22
USBN0 22
R514R514
R513R513
R515R515
R521R521
R522R522
R523R523
R524R524
R525R525
R492 22.6R1%0402R492 22.6R1%0402
PCH_1P05
R337 49.9R1%0402R337 49.9R1%0402
RN15 X_8P4R-0R0402RN15 X_8P4R-0R0402
1
3
5
7
1
3
5
7
RN16 X_8P4R-0R0402RN16 X_8P4R-0R0402
AD[31..0]
C_BE#[3..0]
2
4
6
8
2
4
6
8
USB_OCP#6
USB_OCP#5 22
USB_OCP#4 22
USB_OCP#3 22
USB_OCP#2 22
USB_OCP#1 22
USB_OCP#0 22
XDP_USB_OC#_7 29
XDP_USB_OC#_6 29
XDP_USB_OC#_5 29
XDP_USB_OC#_4 29
XDP_USB_OC#_3 29
XDP_USB_OC#_2 29
XDP_USB_OC#_1 29
XDP_USB_OC#_0 29
AD[31..0] 18
C_BE#[3..0] 18
3VSB
CK_P_33M_PCI218
CK_P_33M_PCI118
R509
R509
10KR0402
10KR0402
3
PCH1C
PCH_1P05
R394
R394
90.9R1%0402
90.9R1%0402
CLK100M_DMI_IN_P10
CLK100M_DMI_IN_N10
CLK100M_SATA_P10
CLK100M_SATA_N10
CLK96M_DOT_P10
CLK96M_DOT_N10
R395 39R0402R395 39R0402
R431 39R0402R431 39R0402
R426 39R0402R426 39R0402
CLK14M_PCH10
TP10TP10
TP11TP11
TP53TP53
TP54TP54
LPC_PCLK16
CLK133M_CLKGEN_OUT010
CLK133M_CLKGEN_OUT0#10
XCLK_RCOMP
CK_P_33M_PCI4
PCH_PCLK3
PCH_PCLK2
PCH_PCK1
TP_CLK33M_PCI0
TP_CLKOUTFLEX3
TP_CLKOUTFLEX2
TP_CLKOUTFLEX0
XTAL_25M_PCH_OUT
XTAL_25M_PCH_IN
CLK133M_CLKGEN_OUT0
CLK133M_CLKGEN_OUT0#
CLK100M_SATA_P
CLK100M_SATA_N
CLK96M_DOT_P
CLK96M_DOT_N
CLK100M_DMI_IN_P
CLK100M_DMI_IN_N
CLK14M_PCH
PCICLK LOOPBACK
CK_P_33M_PCI4 CK_PCH_33M_FB
AA3
AD12
AD9
AF9
AD7
AF6
AL3
AB6
AK1
AD10
Y4
Y2
Y31
Y32
Y35
Y34
AL22
AM22
G20
H20
AF7
R381 51R0402R381 51R0402
BOOT DEVICE
LPC
PCH1C
XCLK_RCOMP
CLKOUT_PCI<4>
CLKOUT_PCI<3>
CLKOUT_PCI<2>
CLKOUT_PCI<1>
CLKOUT_PCI<0>
CLKOUTFLEX3_GPIO67
CLKOUTFLEX2_GPIO66
CLKOUTFLEX1_GPIO65
CLKOUTFLEX0_GPIO64
XTAL25_IN
XTAL25_OUT
CLKIN_HCLK_P
CLKIN_HCLK_N
CLKIN_SATA_P_CKSSCD_P
CLKIN_SATA_N_CKSSCD_N
CLKIN_DOT96P
CLKIN_DOT96N
CLKIN_DMI_P
CLKIN_DMI_N
REF14CLKIN
IBEX_0
IBEX_0
IBEXPEAK_A
IBEXPEAK_A
CLOCK
CLOCK
CLOCK_IN
CLOCK_IN
GNT1 GNT0
000
2
CLKOUT_HCLK0_P_CLKOUT_PCIE8_P
CLKOUT_HCLK0_N_CLKOUT_PCIE8_N
CLKOUT_PCIE_P<7>
CLKOUT_PCIE_N<7>
CLKOUT_PCIE_P<6>
CLKOUT_PCIE_N<6>
CLKOUT_PCIE_P<5>
CLKOUT_PCIE_N<5>
CLKOUT_PCIE_P<4>
CLKOUT_PCIE_N<4>
CLKOUT_PCIE_P<3>
CLKOUT_PCIE_N<3>
CLKOUT_PCIE_P<2>
CLKOUT_PCIE_N<2>
CLKOUT_PCIE_P<1>
CLKOUT_PCIE_N<1>
CLKOUT_PCIE_P<0>
CLKOUT_PCIE_N<0>
CLKOUT_PEG_A_P
CLKOUT_PEG_A_N
CLKOUT_PEG_B_P
CLKOUT_PEG_B_N
CLKOUT_DP_P_CLKOUT_HCLK1_0P
CLKOUT_DP_N_CLKOUT_HCLK1_0N
CLKOUT_DMI_P
CLKOUT_DMI_N
3 OF 9
3 OF 9
XTAL_25M_PCH_OUT
R397
R397
X_1MR0402
X_1MR0402
XTAL_25M_PCH_IN
K38
L38
T6
T7
TP_CLKOUT_PCIE_P6
V4
TP_CLKOUT_PCIE_N6
U4
Y9
Y8
P6
P7
M10
M9
M7
M6
T9
T10
W1
V2
Y7
Y6
V8
V7
H38
H37
J41
H40
X_C10p50N0402
X_C10p50N0402
C360 X_C27p50N0402C360 X_C27p50N0402
Y2
Y2
X_25MHZ18P_D-1
X_25MHZ18P_D-1
1 2
C372 X_C27p50N0402C372 X_C27p50N0402
C496
C496
CK_P_33M_PCI1
CK_P_33M_PCI2
C497
C497
X_C10p50N0402
X_C10p50N0402
CLK133M_CPU_P 4
CLK133M_CPU_N 4
TP7TP7
TP8TP8
CK_100M_LAN 19
CK_100M_LAN# 19
PE0_CLK# 17
PEA_CLK 17
PEA_CLK# 17
TP5TP5
TP4TP4
CK_DMI_P 4
CK_DMI_N 4
1
PCI
SPI
111
WEAK INTERNAL PULLUPS ON GNT#
PGNT#1
R445 X_1KR0402R445 X_1KR0402
PGNT#0
R438 X_1KR0402R438 X_1KR0402
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
3
2
Date: Sheet of
MICRO-START INT'L CO.,LTD.
IBEXPEAK-PCIE/DMI/USB/CLK
IBEXPEAK-PCIE/DMI/USB/CLK
IBEXPEAK-PCIE/DMI/USB/CLK
DELL Shen Yang
DELL Shen Yang
DELL Shen Yang
1
11 34Friday, August 14, 2009
11 34Friday, August 14, 2009
11 34Friday, August 14, 2009
1.0
1.0
1.0
of