5
4
3
2
1
COVER SHEET
MS-7440
D D
CPU:
Intel Dimondville
Version 0A
BLOCK DIAGRAM
Diamondville
Intel 945GSE
DDR2 SO-DIMM Slot
ICH7M
CLK GEN [ICS9LPRS113]
System Chipset:
Intel 945GSE (North Bridge)
Intel ICH7M(South Bridge)
SIO-Fintek F71882F
Card Reader RTS5158E
Giga LAN Realtek 8111C
C C
B B
On Board Chipset:
Clock Generator - ICS9LPRS113
HD AUDIO CODEC(ALC888)
Giga LAN -- Realtek RTL8111C
LVDS CHRONTEL - CH7308B(option)
SIO-Fintek F71882F
Card Reader RTS5158E
AMP - (TBD)
BIOS -- SPI
Main Memory:
DDR II SO-DIMM x 1 (Max 1GB)
CRT
LVDS & INV
SATA & CF Card
USB 0~5 CONNECTORS
Azalia - ALC888 & AMP
Mini PCI-E Slot
Front Panel & FAN Control
ACPI CONTROLLER
GMCH VCORE
CPU POWER
DC-IN POWER
MANUAL PARTS
Expansion Slots:
GPIO Setting
Internal Mini PCIE x1
1
2
3-4
5-8
9-10
11-14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32 Power sequence & RST
33 POWER MAP
MS-7440
MS-7440
MS-7440
1
34
35,36
Sheet of Date:
Sheet of Date:
Sheet of Date:
1 37
1 37
1 37
0B
0B
0B
CLK MAP
A A
Intersil PWM:
Controller:
5
ISL6261CRZ-T
4
3
History
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
2
COVER SHEET
COVER SHEET
COVER SHEET
Monday, December 29, 2008
Monday, December 29, 2008
Monday, December 29, 2008
5
4
3
2
1
MS-7440 VER : 0A
CPU
IMVP-6
ISL 6261CRZ
ATOM N270
D D
D-SUB
RGB
NORTH
BRIDGE
LCD Monitor
LVDS
LVDS
CH7308
(Optional)
LVDS
C C
HDD ODD
SATA 0,2
USB Port 0~3
(External)
Camera (Optional)
B B
Card Reader
RTS5158E
SDVO
945GSE
SATA II
USB 0~3
USB Port 4
USB Port 5
HOST
133MHZ 4X
INTEL
DMIx2
Interface
SOUTH
BRIDGE
INTEL
ICH7-M
Signal Channel DDRII
533 MHZ
PCI Express X 1
USB Port 6
Mini PCI-E Slot 1
USB Port 7
Touch Panel (Optional)
PCI Express X1
GLAN Realtek 8111C
DDR-SODIMM1
LPC
MIC
Head Phone
HD Audio
ALC888
HDA Link
SIO
A A
Amplifier(TBD)
Fintek
F71882FG
SPI
KB / MS
Hardware Monitor
Flash
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
Speaker
5
4
ROM
MSI
MSI
MSI
3
2
MICRO-STAR INT'L CO.,LTD
MS-7440
MS-7440
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Monday, December 29, 2008
Monday, December 29, 2008
Monday, December 29, 2008
MS-7440
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
1
Sheet of Date:
2 37
Sheet of Date:
2 37
Sheet of Date:
2 37
0B
0B
0B
5
H_A#[31:3] 5
H_RS#[2:0] 5
H_REQ#[4:0] 5
D D
H_ADSTB#0 5
VTT
RN2
VTT
RN2
1
3
5
7
8P4R-1KR0402
8P4R-1KR0402
H_ADSTB#1 5
R126 X_1KR0402 R126 X_1KR0402
R47 X_1KR0402 R47 X_1KR0402
R106 X_1KR0402 R106 X_1KR0402
R99 X_1KR0402 R99 X_1KR0402
R124 X_1KR0402 R124 X_1KR0402
C C
B B
H_A#[31:3]
H_RS#[2:0]
H_REQ#[4:0]
U10A
P21
H20
N20
R20
J19
N19
G20
M19
H21
L20
M20
K19
J20
L21
K20
D17
N21
J21
G19
P20
R19
C19
F19
E21
A16
D19
C14
C18
C20
E20
D20
B18
C15
B16
B17
C16
A17
B14
B15
A14
B19
AP1
M18
U18
T16
J4
R16
T15
R15
U17
D6
G6
H6
K4
K5
M15
L16
U10A
A[3]#
ADDR GROUP 0 ADDR GROUP 1
ADDR GROUP 0 ADDR GROUP 1
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
RSVD13
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#
RSVD14
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
NC1
NC2
NC3
NC4
NC5
NC6
NC7
QGZT-1.6G_FCBGA437-RH
QGZT-1.6G_FCBGA437-RH
THERMTRIP#
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
CONTROL
CONTROL
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
BR1#
XDP/ITP SIGNALS THERM
XDP/ITP SIGNALS THERM
PROCHOT#
THRMDA
THRMDC
BCLK[0]
BCLK[1]
H CLK
H CLK
RSVD15
RSVD16
RSVD17
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
AP0
T21T21
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_INTR
H_NMI
H_SMI#
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
T24T24
T35T35
H_A#32
2
H_A#34
4
H_A#33
6
H_A#35
8
H_A20M# 11
H_FERR# 11
H_IGNNE# 11
H_STPCLK# 11
H_INTR 11
H_NMI 11
H_SMI# 11
H_A20M#
H_IGNNE#
V19
Y19
U21
T21
T19
Y18
T20
F16
V16
W20
D15
W18
Y17
U20
W19
AA17
V20
K17
J18
H15
J15
K18
J16
M17
N16
M16
L17
K16
V15
G17
E4
E5
H17
V11
V12
C21
C1
A3
IERR#
H_INIT#_R
H_RS#0
H_RS#1
H_RS#2
PREQ#
HTCK
HTDI
HTMS
HTRST#
VTIN1
GNDHM
4
H_ADS# 5
H_BNR# 5
H_BPRI# 5
H_DEFER# 5
H_DRDY# 5
H_DBSY# 5
H_BREQ# 5
H_LOCK# 5
H_CPURST# 5
H_TRDY# 5
H_HIT# 5
H_HITM# 5
PROCHOT#
VTIN1 16
GNDHM 16
PM_THRMTRIP# 11
CK_H_CPU 15
CK_H_CPU# 15
R123 1KR1%0402 R123 1KR1%0402
R140 22R0402 R140 22R0402
IERR#
PREQ#
HTMS
HTDI
HTCK
HTRST#
3
U10B
DP#0
DP#1
W10
AA14
AA11
W12
AA16
W15
AA13
W13
W16
Y11
Y12
Y10
Y9
Y13
Y16
AA9
W9
Y14
Y15
V9
AA5
Y8
W3
U1
W7
W6
Y7
AA6
Y3
W2
V3
U2
T3
AA8
V2
W4
Y4
Y5
Y6
R4
A7
U5
V5
T17
R6
M6
N15
N6
P17
T6
J6
H5
G5
U10B
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
RSVD1
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
RSVD2
GTLREF
RSVD3
RSVD4
RSVD5
RSVD6
EXTBGREF
FORCEPR#
RSVD7
RSVD8
RSVD9
BSEL[0]
BSEL[1]
BSEL[2]
QGZT-1.6G_FCBGA437-RH
QGZT-1.6G_FCBGA437-RH
H_D#[63:0] 5
VTT
R111
R111
330R0402
330R0402
H_INIT# 11
H_DSTBN#0 5
H_DSTBP#0 5
H_DINV#0 5
H_D#[63:0] 5
VTT
R144
R144
68R0402
68R0402
H_DSTBN#1 5
H_DSTBP#1 5
H_DINV#1 5
RN4
RN4
2
4
6
8
8P4R-56R0402
8P4R-56R0402
VTT
T16T16
CPU_BSEL0 15
CPU_BSEL1 15
CPU_BSEL2 15
VTT
0.5" max
length
R46
R46
1KR1%0402
1KR1%0402
EXTBGREF
R70
R70
2KR1%0402
2KR1%0402
R405 56R0402 R405 56R0402
1
3
5
7
R139 56R0402 R139 56R0402
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
T18T18
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
T10T10
GTLREF
R75 X_1KR0402 R75 X_1KR0402
R84 X_1KR0402 R84 X_1KR0402
T19T19
T17T17
EXTBGREF
FORCEPR#
T20T20
T23T23
T14T14
C52
C52
C1u6.3Y0402-RH
C1u6.3Y0402-RH
BINIT#
EDM
HFPLL
MCERR#
RSP#
2
DATA GRP0
DATA GRP0
DATA GRP2 DATA GRP3
DATA GRP2 DATA GRP3
DATA GRP1
DATA GRP1
MISC
MISC
PWRGOOD
0.5" max
length
R54
R54
1KR1%0402
1KR1%0402
GTLREF
R68
R68
2KR1%0402
2KR1%0402
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
RSVD10
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
RSVD11
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
SLP#
RSVD12
CMREF
R3
R2
P1
N1
M2
P2
J3
N3
G3
H2
N2
L2
M3
J2
H1
J1
K2
K3
L1
M4
C2
G2
F1
D3
B4
E1
A5
C3
A6
F2
C6
B6
B3
C4
C7
D2
E2
F3
C5
D4
T1
T2
F20
F21
R18
R17
U4
V17
N18
A13
B7
C60
C60
C0.1u10X0402
C0.1u10X0402
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
DP#2
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
DP#3
HCOMP0
HCOMP1
HCOMP2
HCOMP3
H_DPRSTP#
H_DPSLP#
H_DPWR#
CPU_PWRGD
CPUSLP#
CORE_D
CPU_CMREF
T11T11
T13T13
0.5" max
length
CPU_CMREF
H_DPRSTP# 11,28
H_DPSLP# 11
H_DPWR# 5
CPU_PWRGD 11
CPUSLP# 5
T3T3
C72
C72
C0.1u10X0402
C0.1u10X0402
H_D#[63:0] 5
H_DSTBN#2 5
H_DSTBP#2 5
H_DINV#2 5
H_D#[63:0] 5
H_DSTBN#3 5
H_DSTBP#3 5
H_DINV#3 5
R44 27.4R1%0402-RH R44 27.4R1%0402-RH
R45 54.9R1%0402 R45 54.9R1%0402
R49 27.4R1%0402-RH R49 27.4R1%0402-RH
R50 54.9R1%0402 R50 54.9R1%0402
VTT VTT
R85
R85
1KR1%0402
1KR1%0402
R83
R83
2KR1%0402
2KR1%0402
1
0.5" max length
25 MIL AWAY FROM HIGH
SPEED SIGNAL
HCOMP0,2==>18MIL
HCOMP1,3==>5MIL
R5293,R5356 change to 0402
0529
VTT
R395
R395
X_1KR0402
X_1KR0402
H_DPWR#
R400
R400
X_1KR0402
X_1KR0402
VTT
R238
R238
X_1KR0402
X_1KR0402
CPU_PWRGD
A A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7440
MS-7440
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Monday, December 29, 2008
Monday, December 29, 2008
5
4
3
2
Monday, December 29, 2008
MS-7440
Diamondville signal
Diamondville signal
Diamondville signal
1
Sheet of Date:
Sheet of Date:
Sheet of Date:
3 37
3 37
3 37
0B
0B
0B
5
4
3
2
1
D D
C C
B B
A A
U10D
U10D
A2
VSS
A4
VSS
A8
VSS
A15
VSS
A18
VSS
A19
VSS
A20
VSS
B1
VSS
B2
VSS
B5
VSS
B8
VSS
B13
VSS
B20
VSS
B21
VSS
C8
VSS
C17
VSS
D1
VSS
D5
VSS
D8
VSS
D14
VSS
D18
VSS
D21
VSS
E3
VSS
E6
VSS
E7
VSS
E8
VSS
E15
VSS
E16
VSS
E19
VSS
F4
VSS
F5
VSS
F6
VSS
F7
VSS
F17
VSS
F18
VSS
G1
VSS
G4
VSS
G7
VSS
G9
VSS
G13
VSS
G21
VSS
H3
VSS
H4
VSS
H7
VSS
H9
VSS
H13
VSS
H16
VSS
H18
VSS
H19
VSS
J5
VSS
J7
VSS
J9
VSS
J13
VSS
J17
VSS
K1
VSS
K6
VSS
K7
VSS
K9
VSS
K13
VSS
K15
VSS
K21
VSS
L3
VSS
L4
VSS
L5
VSS
L6
VSS
L7
VSS
L9
VSS
L13
VSS
L15
VSS
L18
VSS
L19
VSS
M1
VSS
M5
VSS
M7
VSS
M9
VSS
M13
VSS
QGZT-1.6G_FCBGA437-RH
QGZT-1.6G_FCBGA437-RH
LAYOUT NOTE:
Route VCCSENSE and VSSSENSE
traces at 27.4Ohms with 50
mil spacing.
Place PU and PD within 1
inch of CPU.
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
GND
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N9
N7
N5
N4
M21
N13
N17
P3
P4
P5
P6
P7
P9
P13
P15
P16
P18
P19
R1
R5
R7
R9
R13
R21
T4
T5
T7
T9
T10
T11
T12
T13
T18
U3
U6
U7
U15
U16
U19
V1
V4
V6
V7
V8
V13
V14
V18
V21
W1
W5
W8
W11
W14
W17
W21
Y1
Y2
Y20
Y21
AA2
AA3
AA4
AA7
AA10
AA12
AA15
AA18
AA19
AA20
1.1V
4A
1.05V
VCORE
VTT
U10C
U10C
V10
VCCF
A9
VCCQ0
B9
VCCQ0
A10
VCC
A11
VCC
A12
VCC
B10
VCC
B11
VCC
B12
VCC
C10
VCC
C11
VCC
C12
VCC
D10
VCC
D11
VCC
D12
VCC
E10
VCC
E11
VCC
E12
VCC
F10
VCC
F11
VCC
F12
VCC
G10
VCC
G11
VCC
G12
VCC
H10
VCC
H11
VCC
H12
VCC
J10
VCC
J11
VCC
J12
VCC
K10
VCC
K11
VCC
K12
VCC
L10
VCC
L11
VCC
L12
VCC
M10
VCC
M11
VCC
M12
VCC
N10
VCC
N11
VCC
N12
VCC
P10
VCC
P11
VCC
P12
VCC
R10
VCC
R11
VCC
R12
VCC
QGZT-1.6G_FCBGA437-RH
QGZT-1.6G_FCBGA437-RH
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
POWER
POWER
VTT
VTT
VTT
VTT
VTT
VCCA
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCCSENSE
VSSSENSE
VTT
C9
D9
E9
F8
F9
G8
G14
H8
H14
J8
J14
K8
K14
L8
L14
M8
M14
N8
N14
P8
P14
R8
R14
T8
T14
U8
U9
U10
U11
U12
U13
U14
F14
F13
E14
E13
130mA
D7
VID0
F15
VID1
D16
VID2
E18
VID3
G15
VID4
G16
VID5
E17
VID6
G18
C13
D13
2.5A: before VCC stable
1.5A: after VCC stable
C425
C377
C377
C0.1u10X0402
C0.1u10X0402
VID0 28
VID1 28
VID2 28
VID3 28
VID4 28
VID5 28
VID6 28
C425
C1u6.3X50402-1
C1u6.3X50402-1
C367
C367
X_C10u6.3X50805
X_C10u6.3X50805
V_1P5_CORE
VCORE
C373
C417
C417
C1u6.3X50402-1
C1u6.3X50402-1
C372
C372
C1u6.3X50402-1
C1u6.3X50402-1
C374
C374
C1u6.3X50402-1
C1u6.3X50402-1
C373
C10u6.3X5-RH
C10u6.3X5-RH
C375
C375
C10u6.3X5-RH
C10u6.3X5-RH
Place in cavity
Place in cavity
C422
C397
C419
C380
C380
C1u6.3X50402-1
C1u6.3X50402-1
C371
C371
C0.1u10X0402
C0.1u10X0402
R100
R100
100R1%0402
100R1%0402 C424
R39 0R0402 R39 0R0402
R40 0R0402 R40 0R0402
R108
R108
100R1%0402
100R1%0402
VCC_SENSE 28
VSS_SENSE 28
C413
C413
C1u6.3X50402-1
C1u6.3X50402-1
C419
C1u6.3X50402-1
C1u6.3X50402-1
C385
C385
C1u6.3X50402-1
C1u6.3X50402-1
C397
C1u6.3X50402-1
C1u6.3X50402-1
C384
C384
C1u6.3X50402-1
C1u6.3X50402-1
C422
C1u6.3X50402-1
C1u6.3X50402-1
C424
C1u6.3X50402-1
C1u6.3X50402-1
Place in cavity
C395
C395
C10u6.3X5-RH
C10u6.3X5-RH
C411
C411
X_C10u6.3X5-RH
X_C10u6.3X5-RH
C408
C408
X_C10u6.3X5-RH
X_C10u6.3X5-RH
C394
C394
C10u6.3X5-RH
C10u6.3X5-RH
C403
C403
X_C10u6.3X5-RH
X_C10u6.3X5-RH
C406
C406
C10u6.3X5-RH
C10u6.3X5-RH
+
+
1 2
EC22
EC22
X_C220u2.5-RH-2
X_C220u2.5-RH-2
C393
C393
C10u6.3X5-RH
C10u6.3X5-RH
C409
C409
X_C10u6.3X5-RH
X_C10u6.3X5-RH
C386
C386
C1u6.3X50402-1
C1u6.3X50402-1
C421
C421
C1u6.3X50402-1
C1u6.3X50402-1
C398
C398
C10u6.3X5-RH
C10u6.3X5-RH
C407
C407
C10u6.3X5-RH
C10u6.3X5-RH
C379
C379
C1u6.3X50402-1
C1u6.3X50402-1
C382
C382
C1u6.3X50402-1
C1u6.3X50402-1
C410
C410
X_C10u6.3X5-RH
X_C10u6.3X5-RH
C399
C399
C10u6.3X5-RH
C10u6.3X5-RH
VCORE
C423
C423
C1u6.3X50402-1
C1u6.3X50402-1
VCORE
C420
C420
C1u6.3X50402-1
C1u6.3X50402-1
VCORE
VCORE
C383
C383
C1u6.3X50402-1
C1u6.3X50402-1
C381
C381
C1u6.3X50402-1
C1u6.3X50402-1
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7440
MS-7440
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Monday, December 29, 2008
Monday, December 29, 2008
5
4
3
2
Monday, December 29, 2008
MS-7440
Diamondville_Power/GND
Diamondville_Power/GND
Diamondville_Power/GND
Sheet of Date:
Sheet of Date:
Sheet of Date:
1
4 37
4 37
4 37
0B
0B
0B
5
D D
H_D#[63:0] 3
0.3125 * VTT
C C
VTT VTT
B B
Trace wide/spacing=10/20
R413
R413
221R1%0402
221R1%0402
HXSWING HYSWING
R415
R415
100R1%0402
100R1%0402
C445
C445
C0.1u10X0402
C0.1u10X0402
Trace wide/spacing=10/20
HXRCOMP
R148
R148
24.9R1%0402
24.9R1%0402
HYRCOMP
R110
R110
24.9R1%0402
24.9R1%0402
R103
R103
221R1%0402
221R1%0402
R122
R122
100R1%0402
100R1%0402
C98
C98
C0.1u10X0402
C0.1u10X0402
54.9R1%0402
54.9R1%0402
R102
R102
VTT VTT
R149
R149
54.9R1%0402
54.9R1%0402
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING
4
U9A
U9A
M5
M4
M3
M1
W2
W1
W4
W7
W5
AB4
AB8
W8
AA9
AA8
AB1
AB7
AA2
AB5
A10
C15
C4
F6
H9
H6
F7
E3
C2
C3
K9
F5
J7
K7
H8
E5
K8
J8
J2
J3
N1
K5
J5
H3
J4
N3
N8
N6
K3
N9
V8
V9
R6
T8
R2
N5
N2
R5
U7
R8
T4
T7
R3
T5
V6
V3
V2
V5
A6
J1
K1
H1
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
H_ADSTB#_0
H_ADSTB#_1
HOST
HOST
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
INTEL-QG82945GSE-A3-RH
INTEL-QG82945GSE-A3-RH
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_ADS#
H_VREF0
H_BNR#
H_BPRI#
H_BREQ0#
H_CPURST#
H_VREF1
HCLKN
HCLKP
H_DBSY#
H_DEFER#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
H_SLPCPU#
H_TRDY#
F8
D12
C13
A8
E13
E12
J12
B13
A13
G13
A12
D14
F14
J13
E17
H15
G15
G14
A15
B18
B15
E14
H13
C14
A17
E15
H17
D17
G17
F10
C12
H16
E2
B9
C7
G8
B10
E1
AA6
AA5
C10
H_DEFER#
C6
H_DINV#0
H5
H_DINV#1
J6
H_DINV#2
T9
H_DINV#3
U6
H_DPWR#
G7
H_DRDY#
E6
H_DSTBN#0
F3
H_DSTBN#1
M8
H_DSTBN#2
T1
H_DSTBN#3
AA3
H_DSTBP#0
F4
H_DSTBP#1
M7
H_DSTBP#2
T2
H_DSTBP#3
AB3
C8
B4
C5
H_REQ#0
G9
H_REQ#1
E9
H_REQ#2
G12
H_REQ#3
B8
H_REQ#4
F12
H_RS#0
A5
H_RS#1
B6
H_RS#2
G10
CPUSLP#
E8
E10
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_DBSY#
3
H_ADS# 3
H_ADSTB#0 3
H_ADSTB#1 3
H_BNR# 3
H_BPRI# 3
H_BREQ# 3
H_CPURST# 3
CK_H_MCH# 15
CK_H_MCH 15
H_DBSY# 3
H_DEFER# 3
H_DINV#0 3
H_DINV#1 3
H_DINV#2 3
H_DINV#3 3
H_DPWR# 3
H_DRDY# 3
H_DSTBN#0 3
H_DSTBN#1 3
H_DSTBN#2 3
H_DSTBN#3 3
H_DSTBP#0 3
H_DSTBP#1 3
H_DSTBP#2 3
H_DSTBP#3 3
H_HIT# 3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3
H_A#[31:3] 3
place <100mils from pin.
HVREF
C109
C109
C0.1u10X0402
C0.1u10X0402
H_REQ#[4:0] 3
H_RS#[2:0] 3
CPUSLP# 3
T22T22
VTT
R127
R127
100R1%0402
100R1%0402
R131
R131
200R1%0402
200R1%0402
2
U9G
U9G
W33
NC1
AM33
NC2
AL33
NC3
C33
NC4
B33
NC5
AN32
NC6
A32
NC7
AN31
NC8
W28
NC9
V27
NC10
W29
NC11
J24
NC12
H24
NC13
W32
NC14
G24
NC15
F24
NC16
E24
NC17
D24
NC18
K33
NC19
A31
NC20
E21
NC21
C23
NC22
AN19
NC23
AM19
NC24
AL19
NC25
AK19
NC26
AJ19
NC27
AH19
NC28
AN3
NC29
Y9
NC30
J19
NC31
H19
NC32
G19
NC33
F19
NC34
E19
NC35
D19
NC36
C19
NC37
B19
NC38
A19
NC39
Y8
NC40
G16
NC41
F16
NC42
E16
NC43
D16
NC44
C16
NC45
B16
NC46
AN2
NC47
A16
NC48
Y7
NC49
AM4
NC50
AF4
NC51
AD4
NC52
AL4
NC53
AK4
NC54
W31
NC55
AJ4
NC56
AH4
NC57
AG4
NC58
AE4
NC59
AM1
NC60
INTEL-QG82945GSE-A3-RH
INTEL-QG82945GSE-A3-RH
NC
NC
RESERVED26
RESERVED27
RESERVED28
RESERVED29
RESERVED30
RESERVED31
RESERVED32
RESERVED33
RESERVED34
RESERVED35
RESERVED36
RESERVED37
RESERVED38
RESERVED39
RESERVED40
RESERVED41
RESERVED42
1
NC61
NC62
NC63
NC64
NC65
NC66
NC67
NC68
NC69
NC70
NC71
NC72
W30
Y6
AL1
Y5
Y10
W10
W25
V24
U24
V10
U10
K18
Y25
Y24
AB22
AB21
AB19
AB16
AB14
AA12
W24
AA24
AB24
AB20
AB18
AB15
AB13
AB12
AB17
A A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7440
MS-7440
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Monday, December 29, 2008
Monday, December 29, 2008
5
4
3
2
Monday, December 29, 2008
MS-7440
Intel 945GSE (HOST)
Intel 945GSE (HOST)
Intel 945GSE (HOST)
1
Sheet of Date:
Sheet of Date:
Sheet of Date:
5 37
5 37
5 37
0B
0B
0B
5
D D
U9B
SM_CK0 9
SM_CK1 9
SM_CK#0 9
SM_CK#1 9
SM_CKE0 9,10
SM_CKE1 9,10
SM_CS#0 9,10
SM_CS#1 9,10
SM_ODT0 9,10
SM_ODT1 9,10
SM_VREF
SM_VREF
DMI_TXN0
DMI_TXN1
DMI_TXP0
DMI_TXP1
DMI_RXN0
DMI_RXN1
DMI_RXP0
DMI_RXP1
T9T9
T12T12
M_RCOMPN
M_RCOMPP
DMI_TXN0 12
DMI_TXN1 12
DMI_TXP0 12
DMI_TXP1 12
DMI_RXN0 12
DMI_RXN1 12
DMI_RXP0 12
DMI_RXP1 12
C C
VCC_DDR
R36 80.6R1%0402 R36 80.6R1%0402
R37 80.6R1%0402 R37 80.6R1%0402
B B
VCC_DDR
R59
R59
10KR1%0402
10KR1%0402
AF33
AM30
AG33
AN30
AN21
AN22
AF26
AF25
AG14
AF12
AK14
AH12
AJ21
AF11
AE12
AF14
AJ14
AJ12
AN12
AN14
AA33
Y29
Y32
Y28
Y31
V28
V31
V29
V32
AG1
AJ1
AF1
AK1
AE1
U9B
DMI_RXN_0
DMI_RXN_1
DMI_RXP_0
DMI_RXP_1
DMI_TXN_0
DMI_TXN_1
DMI_TXP_0
DMI_TXP_1
SM_CK_0
SM_CK_1
SM_CK_2
SM_CK_3
SM_CK#_0
SM_CK#_1
SM_CK#_2
SM_CK#_3
SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CKE_3
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
SM_OCDCOMP_0
SM_OCDCOMP_1
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMPN
SM_RCOMPP
SM_VREF_0
SM_VREF_1
INTEL-QG82945GSE-A3-RH
INTEL-QG82945GSE-A3-RH
C18
CFG_0
E18
CFG_1
G20
CFG_2
G18
CFG_3
J20
CFG_5
J18
CFG_6
DMI
DMI
K32
RESERVED1
K31
RESERVED2
C17
RESERVED7
F18
RESERVED8
A3
RESERVED9
CFG/RSVD
CFG/RSVD
DDR2 MUXING
DDR2 MUXING
PM_BMBUSY#
THRMTRIP#
PWROK
RSTIN#
D_REFCLKN
D_REFCLKP
CLKREQ#
E31
G21
F26
H26
J15
AB29
W27
A27
A26
J33
H33
J22
PM_ICHSYNC#
PM_EXTTS#_0
PM_EXTTS#_1
PM
PM
CLK
CLK
D_REFSSCLKN
D_REFSSCLKP
CFG_5
PM_EXTTS#0
MCH_CLKREQ#
4
R403
R403
X_2.2KR0402
X_2.2KR0402
LOW=DMIX2
MCH_ICH_SYNC# 12
PM_BMBUSY# 13
PM_DPRSLPVR 13,28
THERMTRIP_GMCH# 11
CHIP_PWGD 13,26
PLTRST# 12,16
MCH_BSEL0 15
MCH_BSEL1 15
MCH_BSEL2 15
R406
R406
2.2KR0402
2.2KR0402
CK_96M_DREF# 15
CK_96M_DREF 15
CLK_GFX_REFCLKN 15
CLK_GFX_REFCLKP 15
R408
R408
X_2.2KR0402
X_2.2KR0402
3
SXGA+ 1400x1050
60Hz
R409
R409
255R1%0402-RH
255R1%0402-RH
R104
R104
1.5KR1%0402
1.5KR1%0402
not connected according to
the design guide
0618
800x480
2
V_1P5_CORE
Disable TV
+1_5VRUN_PCIE
SDVO_RED# 20
SDVO_GREEN# 20
SDVO_BLUE# 20
SDVO_CLK# 20
SDVO_RED 20
SDVO_GREEN 20
SDVO_BLUE 20
SDVO_CLK 20
Layout within 500mil
of GMCH pin out.
SDVO_STALL# 20
SDVO_STALL 20
U9F
U9F
VGA_BLUE
VGA_GREEN
VGA_RED
SCLK_DDC_1
SDAT_DDC_1
LCD1CLK_1#
LCD1CLK_1
LCD2CLK_1#
LCD2CLK_1
LCD1DO0_1#
LCD1DO1_1#
LCD1DO2_1#
LCD1DO0_1
LCD1DO1_1
LCD1DO2_1
LCD2DO0_1#
LCD2DO1_1#
LCD2DO2_1#
LCD2DO0_1
LCD2DO1_1
LCD2DO2_1
AA26
H27
J27
Y26
H20
H22
A24
A23
E25
F25
C25
D25
F27
D27
H25
H30
G29
F28
E28
G28
H28
K30
K27
J29
J30
K29
D30
C30
A30
A29
G31
F32
D31
H31
G32
C31
F33
D33
F30
E33
D32
F29
SDVO_CTRLDATA
SDVO_CTRLCLK
G_CLKN
G_CLKP
CRT_DDC_CLK
CRT_DDC_DATA
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_VSYNC
CRT_HSYNC
CRT_IREF
L_BKLTCTL
L_BKLTEN
L_CLKCTLA
L_CTLBDATA
L_DDC_CLK
L_DDC_DATA
L_VDDEN
L_IBG
L_VBG
L_VREFH
L_VREFL
LA_CLKN
LA_CLKP
LB_CLKN
LB_CLKP
LA_DATAN_0
LA_DATAN_1
LA_DATAN_2
LA_DATAP_0
LA_DATAP_1
LA_DATAP_2
LB_DATAN_0
LB_DATAN_1
LB_DATAN_2
LB_DATAP_0
LB_DATAP_1
LB_DATAP_2
EXP_A_COMPI
EXP_A_ICOMPO
SDVO_TVCLKIN#
SDVOB_INT#
SDVO_FLDSTALL#
MISC
MISC
SDVO_TVCLKIN
SDVOB_INT
SDVO_FLDSTALL
SDVO
SDVO
SDVOB_RED#
SDVOB_GREEN#
SDVOB_BLUE#
SDVOB_CLKN
SDVOB_RED
SDVOB_GREEN
SDVOB_BLUE
SDVOB_CLKP
TV_DACA
TV_DACB
TV_DACC
TV_IREF
TV_IRTNA
TV
TV
TV_IRTNB
LVDS VGA
LVDS VGA
TV_IRTNC
TV_DCONSEL0
TV_DCONSEL1
INTEL-QG82945GSE-A3-RH
INTEL-QG82945GSE-A3-RH
SDVO_CTRL_DATA 20
SDVO_CTRL_CLK 20
CK_PE_100M_MCH# 15
CK_PE_100M_MCH 15
MCH_DDC_CLK 19
MCH_DDC_DATA 19
VGA_BLUE 19
VGA_GREEN 19
VGA_RED 19
VSYNC 19
HSYNC 19
L_BKLTCTL_GSE 20
VCC3
R412 39R0402 R412 39R0402
R414 39R0402 R414 39R0402
L_BKLTCTL_GSE
SCLK_DDC_1 20
SDAT_DDC_1 20
LCD1CLK_1# 20
LCD1CLK_1 20
LCD2CLK_1# 20
LCD2CLK_1 20
LCD1DO0_1# 20
LCD1DO1_1# 20
LCD1DO2_1# 20
LCD1DO0_1 20
LCD1DO1_1 20
LCD1DO2_1 20
LCD2DO0_1# 20
LCD2DO1_1# 20
LCD2DO2_1# 20
LCD2DO0_1 20
LCD2DO1_1 20
LCD2DO2_1 20
L_BKLTEN_1
R51 10KR0402 R51 10KR0402
R52 10KR0402 R52 10KR0402
LVDS_VDDEN_1
L_BKLTEN_1 20
LVDS_VDDEN_1 20
R28
M28
N30
R30
T29
M30
P30
T30
P28
N32
P32
T32
N28
M32
P33
R32
A21
C20
E20
G23
B21
C21
D21
G26
J26
R404 24.9R1%0402 R404 24.9R1%0402
SDVO_STALL#
SDVO_STALL
SDVO_Red#
SDVO_Green#
SDVO_Blue#
SDVO_Clk#
SDVO_Red
SDVO_Green
SDVO_Blue
SDVO_Clk
1
R48
R48
10KR1%0402
10KR1%0402
as close as
945GM
C59
C59
C0.1u10X0402
C0.1u10X0402
C79
C79
C0.1u10X0402
C0.1u10X0402
C82
C82
C2.2u6.3Y
C2.2u6.3Y
MCH_CLKREQ#
VCC3
R416 X_10KR0402 R416 X_10KR0402
DPRSLPVR: Enable power savings by speeding up the C4 exit latency.
un-stuffed, if support C4E feature.
VCC3
A A
5
PM_DPRSLPVR
PM_EXTTS#0
4
R410 10KR0402 R410 10KR0402
R411 10KR0402 R411 10KR0402
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7440
MS-7440
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Monday, December 29, 2008
Monday, December 29, 2008
3
2
Monday, December 29, 2008
MS-7440
Intel 945GSE ( DMI / VGA)
Intel 945GSE ( DMI / VGA)
Intel 945GSE ( DMI / VGA)
Sheet of Date:
Sheet of Date:
Sheet of Date:
1
6 37
6 37
6 37
0B
0B
0B
5
SA_MD[0..63] 9
D D
C C
B B
SA_MD0
SA_MD1
SA_MD2
SA_MD3
SA_MD4
SA_MD5
SA_MD6
SA_MD7
SA_MD8
SA_MD9
SA_MD10
SA_MD11
SA_MD12
SA_MD13
SA_MD14
SA_MD15
SA_MD16
SA_MD17
SA_MD18
SA_MD19
SA_MD20
SA_MD21
SA_MD22
SA_MD23
SA_MD24
SA_MD25
SA_MD26
SA_MD27
SA_MD28
SA_MD29
SA_MD30
SA_MD31
SA_MD32
SA_MD33
SA_MD34
SA_MD35
SA_MD36
SA_MD37
SA_MD38
SA_MD39
SA_MD40
SA_MD41
SA_MD42
SA_MD43
SA_MD44
SA_MD45
SA_MD46
SA_MD47
SA_MD48
SA_MD49
SA_MD50
SA_MD51
SA_MD52
SA_MD53
SA_MD54
SA_MD55
SA_MD56
SA_MD57
SA_MD58
SA_MD59
SA_MD60
SA_MD61
SA_MD62
SA_MD63
AC31
AB28
AE33
AF32
AC33
AB32
AB31
AE31
AH31
AK31
AL28
AK27
AH30
AL32
AJ28
AJ27
AH32
AF31
AH27
AF28
AJ32
AG31
AG28
AG27
AN27
AM26
AJ26
AJ25
AL27
AN26
AH25
AG26
AM12
AL11
AM11
AK11
AG11
AG19
AG21
AG20
U9C
U9C
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
AH9
SA_DQ_34
AK9
SA_DQ_35
SA_DQ_36
SA_DQ_37
AM8
SA_DQ_38
AK8
SA_DQ_39
AG9
SA_DQ_40
AF9
SA_DQ_41
AF8
SA_DQ_42
AK6
SA_DQ_43
AF7
SA_DQ_44
SA_DQ_45
AJ6
SA_DQ_46
AH6
SA_DQ_47
AN6
SA_DQ_48
AM6
SA_DQ_49
AK3
SA_DQ_50
AL2
SA_DQ_51
AM5
SA_DQ_52
AL5
SA_DQ_53
AJ3
SA_DQ_54
AJ2
SA_DQ_55
AG2
SA_DQ_56
AF3
SA_DQ_57
AE7
SA_DQ_58
AF6
SA_DQ_59
AH5
SA_DQ_60
AG3
SA_DQ_61
AG5
SA_DQ_62
AF5
SA_DQ_63
SB_CAS#
SB_RAS#
SB_WE#
INTEL-QG82945GSE-A3-RH
INTEL-QG82945GSE-A3-RH
SA_BS_0
SA_BS_1
SA_BS_2
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_CAS#
SA_RAS#
DDR2 SYSTEM MEMORY
DDR2 SYSTEM MEMORY
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
SB_BS_0
SB_BS_1
SB_BS_2
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
AK12
AH11
AG17
AB30
AL31
AF30
AK26
AL9
AG7
AK5
AH3
AC28
AJ30
AK33
AL25
AN9
AH8
AM2
AE3
AC29
AK30
AJ33
AM25
AN8
AJ8
AM3
AE2
AJ15
AM17
AM15
AH15
AK15
AN15
AJ18
AF19
AN17
AL17
AG16
AL18
AG18
AL14
AJ17
AK18
AN28
AM28
AH17
AH21
AJ20
AE27
AN20
AL21
AK21
AK22
AL22
AH22
AG22
AF21
AM21
AE21
AL20
AE22
AE26
AE20
4
SA_BS0
SA_BS1
SA_BS2
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS#0
SA_DQS#1
SA_DQS#2
SA_DQS#3
SA_DQS#4
SA_DQS#5
SA_DQS#6
SA_DQS#7
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
SA_BS[0..2] 9,10
SA_DM[0..7] 9
SA_DQS[0..7] 9
SA_DQS#[0..7] 9
SA_MA[0..13] 9,10
SA_CAS# 9,10
SA_RAS# 9,10
T2T2
T8T8
SA_WE# 9,10
3
VTT
VTT
W22
W21
W20
W14
AB10
AA10
T25
R25
P25
N25
M25
P24
N24
M24
Y22
V22
U22
T22
R22
P22
N22
M22
Y21
V21
U21
T21
R21
P21
N21
M21
Y20
V20
U20
T20
R20
P20
N20
M20
Y19
P19
N19
M19
Y18
P18
N18
M18
Y17
P17
N17
M17
Y16
P16
N16
M16
Y15
P15
N15
M15
Y14
V14
U14
T14
R14
P14
N14
M14
T10
R10
P10
N10
L10
D1
M10
A18
U9H
U9H
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VTT_NCTF1
VTT_NCTF2
VTT_NCTF3
VTT_NCTF4
VTT_NCTF5
VTT_NCTF6
RSVD_3
RSVD_4
RSVD_5
RSVD_6
NCTF
NCTF
INTEL-QG82945GSE-A3-RH
INTEL-QG82945GSE-A3-RH
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VSS_NCTF13
VSS_NCTF14
VSS_NCTF15
VSS_NCTF16
VSS_NCTF17
VSS_NCTF18
VSS_NCTF19
CFG_19
RESERVED10
RESERVED11
RESERVED12
RESERVED13
RESERVED14
RESERVED15
RESERVED16
RESERVED17
RESERVED18
RESERVED19
RESERVED20
RESERVED21
RESERVED22
RESERVED23
RESERVED24
RESERVED25
AD25
AC25
AB25
AD24
AC24
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
K14
AD13
Y13
W13
V13
U13
T13
R13
P13
N13
M13
AD12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
AD11
AD10
K10
AN33
AA25
V25
U25
AA22
AA21
AA20
AA19
AA18
AA17
AA16
AA15
AA14
AA13
A4
A33
B2
AN1
C1
K28
K25
K26
R24
T24
K21
K19
K20
K24
K22
J17
K23
K17
K12
K13
K16
K15
2
V_1P5_CORE
CFG_19: DMI Lane Reversal
0= default (internal pull-down)
1= Reversal Lanes
(945GMS does not support)
1
F23
AG25
AE25
B23
AJ22
AF22
G22
AM22
E22
J21
H21
F21
VSS
AM20
W19
D20
AF20
AK20
AH20
R19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R1
AF18
AH18
AM18
U18
H18
D18
AK17
V17
T17
F17
B17
AH16
U16
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A A
5
VSS
VSS
VSS
VSSM2VSSK2VSSH2VSSF2VSSV1VSS
AH26
AB2
VSS
VSS
E27
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSU8VSS
VSS
VSSW3VSS
VSSB3VSS
VSS
VSS
T3
AF2
AK2
AD3
AH2
4
VSSV4VSSR4VSSN4VSSK4VSSH4VSSE4VSS
AL3
AJ5
AA4
AE6
AB6
AN5
AG6
VSS
VSS
VSS
VSSW6VSST6VSSM6VSSK6VSS
VSS
VSSB5VSS
VSSV7VSSR7VSSN7VSSH7VSSE7VSSB7VSS
AL6
AL8
AE8
AA7
AG8
3
VSSW9VSSR9VSSM9VSSJ9VSSF9VSSC9VSSA9VSS
VSS
AN11
F13
B14
B12
H14
D13
H12
AL12
AG12
AJ9
AB9
AM9
AJ11
AE11
VSS
VSS
AE14
VSS
VSS
VSS
VSS
AH14
VSS
VSS
AM14
G33
U9E
U9E
INTEL-QG82945GSE-A3-RH
INTEL-QG82945GSE-A3-RH
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J16
F15
R15
D15
W15
AL15
AG15
MSI
MSI
MSI
2
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7440
MS-7440
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Monday, December 29, 2008
Monday, December 29, 2008
Monday, December 29, 2008
MS-7440
Intel 945GSE ( DDR )
Intel 945GSE ( DDR )
Intel 945GSE ( DDR )
1
Sheet of Date:
Sheet of Date:
Sheet of Date:
7 37
7 37
7 37
0B
0B
0B
AH33
Y33
V33
R33
AK32
AG32
AE32
AC32
AA32
U32
H32
E32
C32
AM31
AJ31
AA31
U31
T31
R31
P31
N31
M31
J31
F31
AL30
AG30
AE30
AC30
AA30
Y30
V30
U30
G30
E30
B30
AA29
U29
R29
P29
N29
M29
H29
E29
B29
AK28
AH28
AE28
AA28
U28
T28
J28
D28
AM27
AF27
AB27
AA27
Y27
U27
T27
R27
P27
N27
M27
G27
C27
B27
AL26
W26
U26
AN25
AK25
J25
G25
A25
H23
5
2940mA
945 GSE Power
VTT=> 3.72A
V_1P5_CORE=> 2.13A
VCC_DDR=> 1.72A
D D
V_2P5_MCH=>142mA
VCC3=> 40mA
V_1P5_CORE
L22
L22
1u500mA_0805-RH-1
1u500mA_0805-RH-1
L23
L23
1u500mA_0805-RH-1
C C
1u500mA_0805-RH-1
L6
L6
120L500mA-350_0402-RH
120L500mA-350_0402-RH
L5
L5
120L500mA-350_0402-RH
120L500mA-350_0402-RH
OK
OK
50mA
C85
C85
C0.1u10X0402
C0.1u10X0402
50mA
C81
C81
C0.1u10X0402
C0.1u10X0402
45mA
C73
C73
C0.1u10X0402
C0.1u10X0402
45mA
C61
C61
C0.1u10X0402
C0.1u10X0402
OK
OK
+
+
1 2
EC26
EC26
C470u2.5pSO-RH
C470u2.5pSO-RH
+
+
1 2
EC27
EC27
C470u2.5pSO-RH
C470u2.5pSO-RH
C359
C359
C22u6.3X50805-RH
C22u6.3X50805-RH
C356
C356
C22u6.3X50805-RH
C22u6.3X50805-RH
OK
+1_5VRUN_DPLLA
+1_5VRUN_DPLLB
+1_5VRUN_HPLL
+1_5VRUN_MPLL
VTT
50mA
50mA
45mA
45mA
Place close to 945GMS
V_1P5_CORE
B B
VTT
A A
L21
L21
91n1.5A_1210-RH
91n1.5A_1210-RH
L20 1u25mA L20 1u25mA
D10
D10
S-BAS40WS_SOD323-RH
S-BAS40WS_SOD323-RH
R407 10R0402 R407 10R0402
C369
C369
C10u6.3X50805
C10u6.3X50805
R65 1R1% R65 1R1%
C10u6.3X50805
C10u6.3X50805
V_2P5_MCH
C363
C363
C370
C370
C10u6.3X50805
C10u6.3X50805
L7
L7
180L1.5A-90
180L1.5A-90
C0.1u10X0402
C0.1u10X0402
+1_5VRUN_PCIE
C64
C64
C0.1u10X0402
C0.1u10X0402
C112
C112
+
+
1 2
EC23
EC23
C220u6.3pSO-1
C220u6.3pSO-1
C113
C113
C0.022u16X0402-RH
C0.022u16X0402-RH
400mA
+1_5VRUN_3GPLL
C115
C115
C10u6.3X5-RH
C10u6.3X5-RH
+
+
1 2
EC21
EC21
C330u2.5pSO-1
C330u2.5pSO-1
780mA
VTT
70mA
+2_5VRUN_CRT
4
C389
C389
C390
C390
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
V_1P5_CORE
1250mA
DDR2 DLL
DDR2
FSB HSIO
Place in cavity
C414
C414
C4.7u6.3X5
C4.7u6.3X5
C4.7u6.3X5
C4.7u6.3X5
C396
C396
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C416
C416
C405
C405
C404
C404
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C401
C401
C111 C0.47u6.3X50402 C111 C0.47u6.3X50402
C114
C114
C0.47u6.3X50402
C0.47u6.3X50402
C77
C77
C0.47u6.3X50402
C0.47u6.3X50402
C91
C91
C0.47u6.3X50402
C0.47u6.3X50402
W18
W17
W16
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AC27
AD26
AC26
AB26
AE19
AE18
AF17
AE17
AF16
AE16
AF15
AE15
3
U9D
U9D
T26
VCC
R26
VCC
P26
VCC
N26
VCC
M26
VCC
V19
VCC
U19
VCC
T19
VCC
VCC
V18
VCC
T18
VCC
R18
VCC
VCC
U17
VCC
R17
VCC
VCC
V16
VCC
T16
VCC
R16
VCC
V15
VCC
U15
VCC
T15
VCC
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
J14
VCCAUX
J10
VCCAUX
H10
VCCAUX
AE9
VCCAUX
AD9
VCCAUX
U9
VCCAUX
AD8
VCCAUX
AD7
VCCAUX
AD6
VCCAUX
A14
VTT
D10
VTT
P9
VTT
L9
VTT
D9
VTT
P8
VTT
L8
VTT
D8
VTT
P7
VTT
L7
VTT
D7
VTT
A7
VTT
P6
VTT
L6
VTT
G6
VTT
D6
VTT
U5
VTT
P5
VTT
L5
VTT
G5
VTT
D5
VTT
Y4
VTT
U4
VTT
P4
VTT
L4
VTT
G4
VTT
D4
VTT
Y3
VTT
U3
VTT
P3
VTT
L3
VTT
G3
VTT
D3
VTT
Y2
VTT
U2
VTT
P2
VTT
L2
VTT
G2
VTT
D2
VTT
AA1
VTT
F1
VTT
VCCATVDACA
VCCATVDACA
VCCATVDACB
VCCATVDACB
VCCATVDACC
VCCATVDACC
VCCDTVDAC
VCCDQTVDAC
POWER
POWER
VCCDHMPLL
VCCDHMPLL
VCCACRTDAC
VCCACRTDAC
VSSACRTDAC
B20
A20
B22
A22
D22
C22
D23
VCCATVBG
E23
VSSATVBG
F20
F22
C28
VCCDLVDS
B28
VCCDLVDS
A28
VCCDLVDS
E26
VCCHV
D26
VCCHV
C26
VCCHV
AB33
VCCSM
AM32
VCCSM
AN29
VCCSM
AM29
VCCSM
AL29
VCCSM
AK29
VCCSM
AJ29
VCCSM
AH29
VCCSM
AG29
VCCSM
AF29
VCCSM
AE29
VCCSM
AN24
VCCSM
AM24
VCCSM
AL24
VCCSM
AK24
VCCSM
AJ24
VCCSM
AH24
VCCSM
AG24
VCCSM
AF24
VCCSM
AE24
VCCSM
AN18
VCCSM
AN16
VCCSM
AM16
VCCSM
AL16
VCCSM
AK16
VCCSM
AJ16
VCCSM
AN13
VCCSM
AM13
VCCSM
AL13
VCCSM
AK13
VCCSM
AJ13
VCCSM
AH13
VCCSM
AG13
VCCSM
AF13
VCCSM
AE13
VCCSM
AN4
VCCSM
AM10
VCCSM
AL10
VCCSM
AK10
VCCSM
AH1
VCCSM
AH10
VCCSM
AG10
VCCSM
AF10
VCCSM
AE10
VCCSM
AN7
VCCSM
AM7
VCCSM
AL7
VCCSM
AK7
VCCSM
AJ7
VCCSM
AH7
VCCSM
AN10
VCCSM
AJ10
VCCSM
AD1
VCCAMPLL
AD2
VCCAHPLL
B26
VCCADPLLA
J32
VCCADPLLB
AE5
AD5
D29
VCCTXLVDS
C29
VCCTXLVDS
U33
VCC3G
T33
VCC3G
V26
VCCA3GPLL
N33
VCCA3GBG
M33
VSSA3GBG
J23
VCCSYNC
C24
B24
B25
B31
VCCALVDS
B32
VSSALVDS
P1
VTT
L1
VTT
G1
VTT
U1
VTT
Y1
VTT
INTEL-QG82945GSE-A3-RH
INTEL-QG82945GSE-A3-RH
V_1P5_CORE
VTT
to disable lvds,
connect VCCTCLVDAS and VCCALVDS to GND
modify 2008.05.20
120mA
Disable TV
C50
C50
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C49
C49
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C51
C51
C1u6.3Y0402-RH
C1u6.3Y0402-RH
+1_5VRUN_MPLL
+1_5VRUN_HPLL
+1_5VRUN_DPLLA
+1_5VRUN_DPLLB
+1_5VRUN_PCIE
2
C53
C53
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C365
C365
C48
C48
C1u6.3Y0402-RH
C1u6.3Y0402-RH
150MA
C0.1u10X0402
C0.1u10X0402
C437
C437
C0.1u10X0402
C0.1u10X0402
C438
C438
C0.1u10X0402
C0.1u10X0402
C354
C354
C4.7u6.3X5
C4.7u6.3X5
Place in cavity
V_1P5_CORE
C89
C89
10mA
V_2P5_MCH
C415
C415
C10u10Y0805
C10u10Y0805
+2_5VRUN_CRT
V_2P5_MCH
C88
C88
C0.1u10X0402
C0.1u10X0402
C453
C453
C10u10Y0805
C10u10Y0805
C452
C452
C10u10Y0805
C10u10Y0805
C355
C355
C4.7u6.3X5
C4.7u6.3X5
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
20mA
V_1P5_CORE
VCC3
2mA
40mA
1720mA
DDR2 One Channel
VCC_DDR
+
+
1 2
EC1
EC1
C330u2.5pSO-1
C330u2.5pSO-1
60mA
C428
C402
C402
C400
C400
V_2P5_MCH
C86
C86
C0.1u10X0402
C0.1u10X0402
C428
C4.7u6.3X5
C4.7u6.3X5
C427
C427
C4.7u6.3X5
C4.7u6.3X5
1
V_2P5_MCH
+1_5VRUN_3GPLL
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7440
MS-7440
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Monday, December 29, 2008
Monday, December 29, 2008
5
4
3
2
Monday, December 29, 2008
MS-7440
Intel 945GSE ( Power)
Intel 945GSE ( Power)
Intel 945GSE ( Power)
1
Sheet of Date:
Sheet of Date:
Sheet of Date:
8 37
8 37
8 37
0B
0B
0B
5
DIMM1A
SA_MD0
SA_MD1
SA_MD2
SA_MD3
SA_MD4
SA_MD5
SA_MD6
D D
C C
B B
SA_MD7
SA_MD8
SA_MD9
SA_MD10
SA_MD11
SA_MD12
SA_MD13
SA_MD14
SA_MD15
SA_MD16
SA_MD17
SA_MD18
SA_MD19
SA_MD20
SA_MD21
SA_MD22
SA_MD23
SA_MD24
SA_MD25
SA_MD26
SA_MD27
SA_MD28
SA_MD29
SA_MD30
SA_MD31
SA_MD32
SA_MD33
SA_MD34
SA_MD35
SA_MD36
SA_MD37
SA_MD38
SA_MD39
SA_MD40
SA_MD41
SA_MD42
SA_MD43
SA_MD44
SA_MD45
SA_MD46
SA_MD47
SA_MD48
SA_MD49
SA_MD50
SA_MD51
SA_MD52
SA_MD53
SA_MD54
SA_MD55
SA_MD56
SA_MD57
SA_MD58
SA_MD59
SA_MD60
SA_MD61
SA_MD62
SA_MD63
DIMM1A
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
DIMM-200PS_BLACK-RH-1
DIMM-200PS_BLACK-RH-1
N13-2000220-A10
Bottom
A10/AP
A16_BA2
CK0#
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
SA_MA0
102
A0
SA_MA1
101
A1
SA_MA2
100
A2
SA_MA3
99
A3
SA_MA4
98
A4
SA_MA5
97
A5
SA_MA6
94
A6
SA_MA7
92
A7
SA_MA8
93
A8
SA_MA9
91
A9
SA_MA10
105
SA_MA11
90
A11
SA_MA12
89
A12
SA_MA13
116
A13
86
A14
84
A15
SA_BS2
85
SA_BS0
107
BA0
SA_BS1
106
BA1
SM_CS#0
110
S0#
SM_CS#1
115
S1#
SM_CK0
30
CK0
SM_CK#0
32
SM_CK1
164
CK1
SM_CK#1
166
SM_CKE0
79
SM_CKE1
80
SA_CAS#
113
SA_RAS#
108
SA_WE#
109
SA_SA0
198
SA0
SA_SA1
200
SA1
SMBCLK_DDR
197
SCL
SMBDATA_DDR
195
SDA
SM_ODT0
114
SM_ODT1
119
SA_DM0
10
SA_DM1
26
SA_DM2
52
SA_DM3
67
SA_DM4
130
SA_DM5
147
SA_DM6
170
SA_DM7
185
SA_DQS0
13
SA_DQS1
31
SA_DQS2
51
SA_DQS3
70
SA_DQS4
131
SA_DQS5
148
SA_DQS6
169
SA_DQS7
188
SA_DQS#0
11
SA_DQS#1
29
SA_DQS#2
49
SA_DQS#3
68
SA_DQS#4
129
SA_DQS#5
146
SA_DQS#6
167
SA_DQS#7
186
4
SM_CS#0 6,10
SM_CS#1 6,10
SM_CK0 6
SM_CK#0 6
SM_CK1 6
SM_CK#1 6
SM_CKE0 6,10
SM_CKE1 6,10
SA_CAS# 7,10
SA_RAS# 7,10
SA_WE# 7,10
SM_ODT0 6,10
SM_ODT1 6,10
SA_MD[0..63]
SA_DM[0..7]
SA_DQS[0..7]
SA_DQS#[0..7]
SA_MA[0..13]
SA_BS[0..2]
C24
C24
X_C0.01u16X0402
X_C0.01u16X0402
C43
C43
X_C0.01u16X0402
X_C0.01u16X0402
SA_SA1
SA_SA0
R16 10KR0402 R16 10KR0402
R15 10KR0402 R15 10KR0402
Layout note: Place capacitors between and
near DDR connector if possible.
C11
C11
C0.1u10X0402
C0.1u10X0402
C12
C12
C0.1u10X0402
C0.1u10X0402
VCC_DDR
VCC_DDR
C13
C13
1000p_0402
1000p_0402
SA_MD[0..63] 7
SA_DM[0..7] 7
SA_DQS[0..7] 7
SA_DQS#[0..7] 7
SA_MA[0..13] 7,10
SA_BS[0..2] 7,10
R29
R29
10KR1%0402
10KR1%0402
SMDDR_VREF
R26
R26
10KR1%0402
10KR1%0402
3
VCC3
C22
C22
C2.2u6.3Y
C2.2u6.3Y
SMDDR_VREF
C17
C17
C2.2u6.3Y
C2.2u6.3Y
ADDRESS: 000
0xA0
C16
C16
C0.1u10X0402
C0.1u10X0402
C23
C23
C0.1u10X0402
C0.1u10X0402
C18
C18
C0.1u10X0402
C0.1u10X0402
VCC_DDR
DIMM1B
DIMM1B
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
MEC1
MEC1
MEC2
MEC2
203
203
204
204
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
DIMM-200PS_BLACK-RH-1
DIMM-200PS_BLACK-RH-1
2
18
VSS16
24
VSS17
41
VSS18
53
VSS19
42
VSS20
54
VSS21
59
VSS22
65
VSS23
60
VSS24
66
VSS25
127
VSS26
139
VSS27
128
VSS28
145
VSS29
165
VSS30
171
VSS31
172
VSS32
177
VSS33
187
VSS34
178
VSS35
190
VSS36
9
VSS37
21
VSS38
33
VSS39
155
VSS40
34
VSS41
132
VSS42
144
VSS43
156
VSS44
168
VSS45
2
VSS46
3
VSS47
15
VSS48
27
VSS49
39
VSS50
149
VSS51
161
VSS52
28
VSS53
40
VSS54
138
VSS55
150
VSS56
162
VSS57
1
VCC_DDR
C4
C2.2u6.3YC4C2.2u6.3Y
SMBCLK_DDR
SMBDATA_DDR
A A
5
R27 22R0402 R27 22R0402
R28 22R0402 R28 22R0402
SMBCLK_ISO 13,15,24
SMBDATA_ISO 13,15,24
4
C6
C2.2u6.3YC6C2.2u6.3Y
C8
C2.2u6.3YC8C2.2u6.3Y
C9
C2.2u6.3YC9C2.2u6.3Y
3
C10
C10
C2.2u6.3Y
C2.2u6.3Y
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7440
MS-7440
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Monday, December 29, 2008
Monday, December 29, 2008
2
Monday, December 29, 2008
MS-7440
DDR2 SO-DIMM1 Slot
DDR2 SO-DIMM1 Slot
DDR2 SO-DIMM1 Slot
Sheet of Date:
Sheet of Date:
Sheet of Date:
1
9 37
9 37
9 37
0B
0B
0B
5
D D
SA_MA[0..13]
SA_BS[0..2]
VTT_DDR
RN11
SA_MA13
SM_ODT0 6,9
SM_CS#0 6,9
C C
SM_ODT1 6,9
SM_CS#1 6,9
SM_ODT0
SM_CS#0
SA_BS1 SA_MA3
SA_MA6
SA_MA7
SA_MA11
VTT_DDR
SM_CKE0
SM_ODT1
SM_CS#1
SA_BS0
SA_WE#
SM_CKE0 6,9
SA_WE# 7,9
RN11
1
3
5
7
8P4R-56R0402
8P4R-56R0402
RN13
RN13
1
3
5
7
8P4R-56R0402
8P4R-56R0402
RN14
RN14
1
3
5
7
8P4R-56R0402
8P4R-56R0402
2
4
6
8
2
4
6
8
2
4
6
8
4
SA_MA[0..13] 7,9
SA_BS[0..2] 7,9
3
VTT_DDR
RN15
SA_RAS# 7,9
SA_CAS# 7,9
SM_CKE1 6,9
SA_RAS#
SA_MA4
SA_MA0
SA_MA2
SA_MA8
SA_MA9
SA_MA12
SA_BS2
SA_CAS#
SM_CKE1
RN15
1
2
3
4
5
6
7
8
8P4R-56R0402
8P4R-56R0402
RN20
RN20
1
2
3
4
5
6
7
8
8P4R-56R0402
8P4R-56R0402
R3 56R0402 R3 56R0402
R4 56R0402 R4 56R0402
RN21
RN21
1
3
5
7
8P4R-56R0402
8P4R-56R0402
SA_MA5
2
4
SA_MA1
6
SA_MA10
8
2
1
C55
C54
C47
C47
X_C0.1u10X0402
X_C0.1u10X0402
VTT_DDR
B B
C56
C56
X_C0.1u10X0402
X_C0.1u10X0402
C54
X_C0.1u10X0402
X_C0.1u10X0402
C70
C70
C0.1u10X0402
C0.1u10X0402
Layout note: Place one cap close to every 2 pullup resistors terminated to +0.9V.
A A
5
C55
X_C0.1u10X0402
X_C0.1u10X0402
C93
C93
C0.1u10X0402
C0.1u10X0402
C95
C95
C0.1u10X0402
C0.1u10X0402
4
C97
C97
C0.1u10X0402
C0.1u10X0402
C101
C101
C0.1u10X0402
C0.1u10X0402
C103
C103
X_C0.1u10X0402
X_C0.1u10X0402
C105
C105
C0.1u10X0402
C0.1u10X0402
3
C106
C106
C0.1u10X0402
C0.1u10X0402
C107
C107
C0.1u10X0402
C0.1u10X0402
C126
C126
X_C100p16N0402
X_C100p16N0402
EMI
C127
C127
X_C100p16N0402
X_C100p16N0402
C128
C128
X_C2.2u6.3Y
X_C2.2u6.3Y
2
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7440
MS-7440
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Monday, December 29, 2008
Monday, December 29, 2008
Monday, December 29, 2008
MS-7440
DDR2 Termination
DDR2 Termination
DDR2 Termination
1
Sheet of Date:
Sheet of Date:
Sheet of Date:
10 37
10 37
10 37
0B
0B
0B
5
4
3
2
1
D D
VCC3_SB
VBAT
X
D13
D13
S-BAT54C_SOT23
S-BAT54C_SOT23
C C
AC_SDOUT 23
AC_BITCLK 23
AC_SYNC 23
AC_RST# 23
Y
BAT_D
BAT1
Z
R269
R269
1KR0402
1KR0402
C129
C129
X_C33p50N0402
X_C33p50N0402
C223
C223
C1u10X50402-RH
C1u10X50402-RH
1
2
RN19
RN19
1
3
5
7
8P4R-39R0402
8P4R-39R0402
R268 20KR1%0402 R268 20KR1%0402
3 4
BAT1
BAT1
BH1X2HS-1.25PITCH_WHITE
BH1X2HS-1.25PITCH_WHITE
ACZ_SDOUT
2
ACZ_BIT_CLK_ICH7
4
ACZ_SYNC
6
ACZ_RST#
8
C211
C211
C1u10X50402-RH
C1u10X50402-RH R232 56R0402 R232 56R0402
For EMI
B B
VCC3
VCC3
C252 C15p50N0402 C252 C15p50N0402
32.768KHZ12.5P_S-RH-2
32.768KHZ12.5P_S-RH-2
C244 C15p50N0402 C244 C15p50N0402
RTCRST#
VBAT
VBAT
AC_SDIN0 23
SATALED# 25
Layout within 500mil
of ICH7M pin out.
R160 33R0402 R160 33R0402
VCC3
R243
R243
10KR0402
10KR0402
R571 8.2KR0402 R571 8.2KR0402
R573 4.7KR0402 R573 4.7KR0402
Y2
Y2
1 2
R450 1MR0402 R450 1MR0402
R480 330KR0402 R480 330KR0402
0B Change
C206
C206
X_C0.1u16Y0402
X_C0.1u16Y0402
SATA_RX#0 21
SATA_RX0 21
SATA_TX#0 21
SATA_TX0 21
SATA_RX#1 21
SATA_RX1 21
SATA_TX#1 21
SATA_TX1 21
CK_ICHSATA# 15
CK_ICHSATA 15
R479 24.9R1%0402 R479 24.9R1%0402
IDE_IRQ
PD_IORDY
SB_RTCX1
R295
R295
10MR
10MR
SB_RTCX2
INTRUDER#
INTVRMEN
ACZ_BIT_CLK_ICH7
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
SATALED#
SATARBIAS
U20A
U20A
AB1
RTXC1
AB2
RTCX2
AA3
RTCRST#
Y5
INTRUDER#
W4
INTVRMEN
W1
EE_CS
Y1
EE_SHCLK
Y2
EE_DOUT
W3
EE_DIN
V3
LAN_CLK
U3
LAN_RSTSYNC
U5
LAN_RXD0
V4
LAN_RXD1
T5
LAN_RXD2
U7
LAN_TXD0
V6
LAN_TXD1
V7
LAN_TXD2
U1
ACZ_BIT_CLK
R6
ACZ_SYNC
R5
ACZ_RST#
T2
ACZ_SDIN0
T3
ACZ_SDIN1
T1
ACZ_SDIN2
T4
ACZ_SDOUT
AF18
SATALED#
AF3
SATA0RXN
AE3
SATA0RXP
AG2
SATA0TXN
AH2
SATA0TXP
AF7
SATA2RXN
AE7
SATA2RXP
AG6
SATA2TXN
AH6
SATA2TXP
AF1
SATA_CLKN
AE1
SATA_CLKP
AH10
SATARBIAS#
AG10
SATARBIAS
AF15
DIOR#
AH15
DIOW#
AF16
DDACK#
AH16
IDEIRQ
AG16
IORDY
AE15
DDREQ
INTEL-82801GBM-B0-RH
INTEL-82801GBM-B0-RH
RTC
RTC
LPC
LPC
LAN
LAN
GPIO49/CPUPWRGD
CPU IDE
CPU IDE
AC-97/AZALIA
AC-97/AZALIA
SATA
SATA
ICH7-M
ICH7-M
PARTA
PARTA
LAD0
LAD1
LAD2
LAD3
LDRQ0#
LDRQ1#/GPIO23
LFRAME#
A20GATE
A20M#
CPUSLP#
FERR#
IGNNE#
INT3_3V#
INIT#
INTR
RCIN#
NMI
SMI#
STPCLK#
THERMTRIP#
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
DA0
DA1
DA2
DCS1#
DCS3#
LPC_AD0
AA6
LPC_AD1
AB5
LPC_AD2
AC4
LPC_AD3
Y6
AC3
GPIO23
AA5
R583 4.7KR0402 R583 4.7KR0402
AB3
A20GATE
AE22
AH28
AG27
H_DPRSTP#_R
AF24
TP1
TP2
AH25
AG26
AG24
AG22
AG21
AF22
AF25
AG23
AH24
AF23
AH22
AF26
AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15
AH17
AE17
AF17
AE16
AD16
H_DPSLP#_R
CPU_PWRGD
FWH_INIT#
H_INIT#
H_INTR
KBRST#
H_NMI
H_SMI#
THERMTRIP_SB
LPC_FRAME# 16
A20GATE 16
R245 0R0402 R245 0R0402
R246 0R0402 R246 0R0402
H_FERR# 3
CPU_PWRGD 3
H_IGNNE# 3
FWH_INIT# 16
KBRST# 16
H_NMI 3
H_SMI# 3
H_STPCLK# 3
R438 24R0402 R438 24R0402
LPC_AD0 16
LPC_AD1 16
LPC_AD2 16
LPC_AD3 16
LPC_DRQ#0 16
VCC3
H_A20M# 3
H_DPRSTP#
H_DPSLP#
H_INIT# 3
H_INTR 3
Layout within 2"
of ICH7M
GPIO23 20
H_DPRSTP# 3,28
H_DPSLP# 3
VTT
R439
R439
56R0402
56R0402
R440 0R0402 R440 0R0402
H_DPRSTP#
H_DPSLP#
H_FERR#
H_STPCLK#
KBRST#
A20GATE
Layout within 2"
of R439
PM_THRMTRIP# 3
THERMTRIP_GMCH# 6
R247 X_1KR0402 R247 X_1KR0402
R239 X_1KR0402 R239 X_1KR0402
R244 X_1KR0402 R244 X_1KR0402
1
3
5
7
RN7
RN7
2
4
6
8
8P4R-10KR0402
8P4R-10KR0402
VTT
VCC3
A A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7440
MS-7440
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Monday, December 29, 2008
Monday, December 29, 2008
5
4
3
2
Monday, December 29, 2008
MS-7440
ICH7M ( CPU,LPC,SATA,HDA)
ICH7M ( CPU,LPC,SATA,HDA)
ICH7M ( CPU,LPC,SATA,HDA)
Sheet of Date:
11 37
Sheet of Date:
11 37
Sheet of Date:
1
11 37
0B
0B
0B
5
D D
U20D
F26
F25
E28
E27
H26
H25
G28
G27
K26
K25
J28
J27
M26
M25
L28
L27
P26
P25
N28
N27
T25
T24
R28
R27
R2
P6
P1
P5
P2
D3
C4
D5
D4
E5
C3
A2
B3
PERn1
PERp1
PETn1
PETp1
PERn2
PERp2
PETn2
PETp2
PERn3
PERp3
PETn3
PETp3
PERn4
PERp4
PETn4
PETp4
PERn5/Reserved+
PERp5/Reserved+
PETn5/Reserved+
PETp5/Reserved+
PERn6/Reserved+
PERp6/Reserved+
PETn6/Reserved+
PETp6/Reserved+
SPI_CLK
SPI_CS#
SPI_ARB
SPI_MOSI
SPI_MISO
OC0#
OC1#
OC2#
OC3#
OC4#
OC5# / GPIO29
OC6# / GPIO30
OC7# / GPIO31
U20D
PCI-Express
PCI-Express
SPI
SPI
ICH7-M
ICH7-M
PARTD
PARTD
INTEL-82801GBM-B0-RH
INTEL-82801GBM-B0-RH
R289 47R0402 R289 47R0402
R494 0R0402 R494 0R0402
R493 47R0402 R493 47R0402
USB_OCP#2
USB_OCP#3
RX_LANN1
RX_LANP1
TX_LANN1_C
TX_LANP1_C
RX_PE2N
RX_PE2P
TX_PE2N_C
TX_PE2P_C
TX_PE3N_C
TX_PE3P_C
SPI_CS_F# SPI_CS#
TP1TP1
SPI_MISO
RX_LANN1 18
RX_LANP1 18
TX_LANN1 18
C C
B B
TX_LANP1 18
RX_PE2N 24
RX_PE2P 24
TX_PE2N 24
TX_PE2P 24
RX_PE3N 24
RX_PE3P 24
TX_PE3N 24
TX_PE3P 24
place Cap close to
ICH7 within 250mils
VCC3_SB
RN18
RN18
1
3
5
7
8P4R-10KR0402
8P4R-10KR0402
VCC3_SB
RN17
RN17
1
3
5
7
8P4R-10KR0402
8P4R-10KR0402
C492 C0.1u16X0402 C492 C0.1u16X0402
C488 C0.1u16X0402 C488 C0.1u16X0402
C486 C0.1u16X0402 C486 C0.1u16X0402
C485 C0.1u16X0402 C485 C0.1u16X0402
C491 C0.1u16X0402 C491 C0.1u16X0402
C495 C0.1u16X0402 C495 C0.1u16X0402
SPI_CLK SPI_CLK_F
2
4
SPI_MOSI SPI_MOSI_F
6
8
USB_OCP#0 22
USB_OCP#1 22
USB_OCP#2 22
USB_OCP#1
2
USB_OCP#2
4
USB_OCP#0
6
USB_OCP#3
8
4
V26
DMI0RXN
V25
DMI0RXP
U28
DMI0TXN
U27
DMI0TXP
Y26
DMI1RXN
Y25
DMI1RXP
W28
DMI1TXN
W27
DMI1TXP
AB26
DMI2RXN
AB25
DMI2RXP
AA28
DMI2TXN
AA27
DMI2TXP
AD25
DMI3RXN
AD24
DMI3RXP
AC28
DMI3TXN
AC27
DMI3TXP
AE28
DMI_CLKN
AE27
DMI_CLKP
Direct Media Interface
( DMI )
Direct Media Interface
( DMI )
USB
USB
DMI_ZCOMP
DMI_IRCOMP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBRBIAS#
USBRBIAS
C25
D25
F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3
D2
D1
DMI_RXN0 6
DMI_RXP0 6
DMI_TXN0 6
DMI_TXP0 6
DMI_RXN1 6
DMI_RXP1 6
DMI_TXN1 6
DMI_TXP1 6
CK_PE_100M_ICH# 15
CK_PE_100M_ICH 15
DMI_IRCOMP_R
USBRBIAS
Please within
500mils of
ICH7
R442 24.9R1%0402 R442 24.9R1%0402
USBN0 22
USBP0 22
USBN1 22
USBP1 22
USBN2 22
USBP2 22
USBN3 22
USBP3 22
USBN4 22
USBP4 22
USBN5 17
USBP5 17
USBN6 24
USBP6 24
USBN7 22
USBP7 22
R287
R287
25.5R1%0402
25.5R1%0402
3
L_ICH7_1.5V
USB 0 : USB CONN.
USB 1 : USB CONN.
USB 2 : USB CONN.
USB 3 : USB CONN.
USB 4 : CAMERA
USB 5 : Card Reader
USB 6 : MINI PCIE 1
USB 7 : MINI PCIE 2
Please within
500mils of
ICH
PIRQ#A
PIRQ#B
PIRQ#C
PIRQ#D
U20B
U20B
E18
AD0
C18
AD1
A16
AD2
F18
AD3
E16
AD4
A18
AD5
E17
AD6
A17
AD7
A15
AD8
C14
AD9
E14
AD10
D14
AD11
B12
AD12
C13
AD13
G15
AD14
G13
AD15
E12
AD16
C11
AD17
D11
AD18
A11
AD19
A10
AD20
F11
AD21
F10
AD22
E9
AD23
D9
AD24
B9
AD25
A8
AD26
A6
AD27
C7
AD28
B6
AD29
E6
AD30
D6
AD31
Interrupt I/F
Interrupt I/F
A3
PIRQA#
B4
PIRQB#
C5
PIRQC#
B5
PIRQD#
AE5
RSVD[1]
AD5
RSVD[2]
AG4
RSVD[3]
AH4
RSVD[4]
AD9
RSVD[5]
INTEL-82801GBM-B0-RH
INTEL-82801GBM-B0-RH
PCI
PCI
ICH7-M
ICH7-M
PARTB
PARTB
MISC
MISC
REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
REQ4#/GPIO22
GNT4#/GPIO48
GPIO1/REQ5#
GPIO17/GNT5#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
RSVD[6]
RSVD[7]
RSVD[8]
MCH_SYNC#
PREQ#0
D7
PREQ#1
E7
PREQ#1
C16
D16
PREQ#2
C17
D17
PREQ#3
E13
PGNT#3
F13
PREQ#4
A13
PGNT#4
A14
PREQ#5
C8
PGNT#5
D8
B15
C12
D12
C15
IRDY#
A7
E10
PAR
B18
DEVSEL#
A12
PERR#
C9
LOCK#
E11
SERR#
B10
STOP#
F15
TRDY#
F14
FRAME#
F16
PLTRST#
C26
ICH_PCLK
A9
B19
PME# has internal pull +3VSUS
GPIO2
G8
GPIO3
F7
GPIO4
F8
GPIO5
G7
AE9
AG8
AH8
F21
TP3
AH20
PLTRST# 6,16
ICH_PCLK 15
T27T27
MCH_ICH_SYNC# 6
2
the top-blick swap mode
NO STUFF by default.
STUFF for A16 swap override
R472 X_1KR0402 R472 X_1KR0402
1
GNT5# GNT4# ROUTING
Flash Cycles Routed
001
to SPI
Flash Cycles Routed
1
to PCI
Flash Cycles Routed
1 1
to LPC
PGNT4# Internal Pull-High
PGNT#4
R254 X_1KR0402 R254 X_1KR0402
PGNT#5
R258 1KR0402 R258 1KR0402
8P4R-8.2KR0402-1
8P4R-8.2KR0402-1
7
5
PREQ#0
3
GPIO3
1
RN27
RN27
RN25
RN25
PIRQ#B
1
PIRQ#A
3
PIRQ#C
5
PIRQ#D
7
8P4R-8.2KR0402-1
8P4R-8.2KR0402-1
RN26
RN26
PERR#
7
LOCK#
5
PREQ#3
3
TRDY#
1
8P4R-8.2KR0402-1
8P4R-8.2KR0402-1
RN28
RN28
IRDY#
1
PREQ#5
3
DEVSEL#
5
PREQ#4
7
8P4R-8.2KR0402-1
8P4R-8.2KR0402-1
RN30
RN30
GPIO5
7
GPIO4
5
GPIO2
3
SERR#
1
8P4R-8.2KR0402-1
8P4R-8.2KR0402-1
RN31
RN31
STOP#
7
FRAME#
5
PREQ#1
3
PREQ#2
1
8P4R-8.2KR0402-1
8P4R-8.2KR0402-1
VCC3
8
6
4
2
2
4
6
8
8
6
4
2
2
4
6
8
8
6
4
2
8
6
4
2
C525
C525
C0.1u10X0402
C0.1u10X0402
U43
U43
VCC
HOLD#
SCLK
VCC3_SB
C535
C535
C10u10Y0805
C10u10Y0805
8
SPI_HOLD#
7
SPI_CLK
6
SPI_MOSI
5
SI
R477
R477
10KR0402
10KR0402
3
R471
R471
3.3KR0402
3.3KR0402
R470 X_0R0402 R470 X_0R0402
SPI_HOLD_GPO# 13
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7440
MS-7440
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Monday, December 29, 2008
Monday, December 29, 2008
2
Monday, December 29, 2008
MS-7440
ICH7M ( PCI, USB, DMI, PCIE)
ICH7M ( PCI, USB, DMI, PCIE)
ICH7M ( PCI, USB, DMI, PCIE)
Sheet of Date:
12 37
Sheet of Date:
12 37
Sheet of Date:
1
12 37
0B
0B
0B
SPI DEBUG PROT
Place close to SPI ROM
VCC3_SB
A A
SPI_CS_F#
SPI_HOLD#
JSPI1
JSPI1
1 2
SPI_MOSI_F SPI_MISO
3 4
SPI_CLK_F
6
5
7 8
9
H2X5[1]M-2PITCH_BLACK-RH
H2X5[1]M-2PITCH_BLACK-RH
Part Number : N31-2051451-H06
5
SPI FLASH
SPI_CS#
SPI_MISO SPI_MISO_F
R481 47R0402 R481 47R0402
BIOS_WP#
BIOS_WP# 13
4
R482
R482
1KR0402
1KR0402
R483
R483
X_2.2KR0402
X_2.2KR0402
VCC3_SB
MX25L4005AM2C-12G-RH
MX25L4005AM2C-12G-RH
Closer to SB.
1
CS#
2
SO
3
WP#
4
GND