MSI MS-7425 Schematic 0A_080605
1
1Cover Sheet
Block Diagram
Intel LGA775 CPU
Intel G31 - MCH
DDR II System Memory CHA
DDR II VTT Decoupling
Intel ICH7 - PCI & DMI & CPU & IRQ
Intel ICH7 - LPC & ATA & USB & GPIO
Intel ICH7 - POWER
DVI CH7307C
PCI SLOT & MINI-PCIE PORT
LPC I/O - Fintek 71882FG
Clock - RTM 876-665
Azalia - ALC888
A A
ATA33/66/100 IDE & SATA Connectors
USB Connectors
ATX Connetcor & Front Panel
ACPI CONTROLLER UPI
NB CORE POWER & DDR POWER
VGA Connector
VRD11 - ISL6322 3-Phase
2
3-5
6-9
10
11
12
13
14
15
16
17
18LAN REALTEK RTL8111C
19
20
21
22
23
24
25
26
27
MS-7425
CPU:
Intel Prescott ( L2=2MB ) - 3.4G & Above
Intel Cendar Mill (65nm) - 3.73G & Above
Intel Smithfield (90nm Dual core)
Intel Conroe (65W Dual core)
System Chipset:
Intel G31 - MCH (North Bridge)
Intel ICH7R (South Bridge)
On Board Chipset:
BIOS -- SPI EEPROM
HD -- ALC888
LPC Super I/O -- F71882FG
LAN-- REALTEK RTL8111C Co-lay RTL8101E
CLOCK -- RTM 876-665
DVI -- CH7307C
Main Memory:
DDR II *1 (Max 2GB)
Expansion Slots:
MINI-PCIE SLOT * 1
PCI SLOT * 1
Version 0A
RICH PWM:
VRD11 - ISL6322 3-Phase
Controller: 3 PHASES
1
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7425
MS-7425
Cover ShEET
Cover ShEET
Cover ShEET
MS-7425
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, June 05, 2008
Date:
Thursday, June 05, 2008
Date:
Thursday, June 05, 2008
Sheet of
Sheet of
Sheet of
132
132
132
0A
0A
0A
Block Diagram
1
Supports Intel CoreTM2 Duo processors and IntelR Core.2
Quad processors
2DDR II
DIMM
Modules
Supports only un-buffered non-ECC DDR2
DIMMs
PCI Slot
PCI
MINI-PCIE Slot
PCIE
LPC SIO
Fintek
DVI
Connector
VRD11
ISL6322
3-Phase PWM
Analog
Video
Out
CH7307
RGB
SDVOB
UltraDMA
33/66/100
Intel LGA775 Processor
133/200/266/333
MHz
FSB 800/1066/1333
FSB
G31
DMI
2 GB/s point-to-point DMI to ICH7 (1 GB/s each direction)
DDR2 667/800
DDRII
IDE Primary
A A
SATA 0~1
USB Port 0~7
HD
ALC888
SATA2
USB2.0
HD
PCIE
ICH7
LPC Bus
SPI
RTL8111C /RTL8101E
71882FG
EEPROM
SPI
Serial*2
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7425
MS-7425
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Wednesday, June 11, 2008
Date:
Wednesday, June 11, 2008
Date:
1
Wednesday, June 11, 2008
MS-7425
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Sheet of
Sheet of
Sheet of
232
232
232
0A
0A
0A
5
4
3
2
1
VCC_SENSE
CPU SIGNAL BLOCK
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
PECI
VTIN1
GNDHM
H_TRMTRIP#
H_PROCHOT#
H_IGNNE#
ICH_H_SMI#
H_A20M#
H_TESTHI13
CP23CP23
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
H_A#[3..35]6
VID5
VID7
VID6
AJ3
AK3
AM7
AM5
AN6
VID6
ITP_CLK1
ITP_CLK0
RSVD/VID7
VSS_MB_REGULATION
VCC_MB_REGULATION
D14#
D13#
D12#D8D11#
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B12
B10
A11
A10
C11
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
G5
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
U5A
U5A
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
PECI
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_D#53
H_A#35
AJ6
A35#
D53#
D52#
C14
H_D#52
H_A#34
H_A#33
AJ5
AH5
A34#
D51#
A14
C15
H_D#51
H_D#50
H_A#32
AH4
A33#
A32#
D50#
D49#
D17
H_D#49
H_A#31
H_A#30
AG5
AG4
A31#
D48#
D20
G22
H_D#48
H_D#47
H_A#29
AG6
A30#
A29#
D47#
D46#
D22
H_D#46
H_A#28
H_A#27
AF4
AF5
A28#
D45#
E22
G21
H_D#45
H_D#44
H_A#26
AB4
A27#
A26#
D44#
D43#
F21
H_D#43
H_A#24
H_A#25
AC5
AB5
A25#
D42#
F20
E21
H_D#42
H_D#41
H_A#23
AA5
A24#
A23#
D41#
D40#
E19
H_D#40
H_A#22
H_A#21
AD6
AA4
A22#
D39#
F18
E18
H_D#39
H_D#38
H_A#18
H_A#20
H_A#19
A21#
A20#Y4A19#Y6A18#W6A17#
D38#
D37#
D36#
F17
G17
H_D#37
H_D#35
H_D#36
H_A#17
H_A#16
H_A#15
H_A#14
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D35#
D34#
D33#
D32#
E16
E15
G18
G16
H_D#31
H_D#32
H_D#33
H_D#34
D31#
G15
H_A#12
H_A#13
D30#
F15
G14
H_D#29
H_D#30
H_A#11
D29#
D28#
F14
H_D#28
H_A#10
H_A#9
U6
D27#
E13
G13
H_D#26
H_D#27
H_A#8
H_A#5
H_A#6
H_A#7
H_A#3
H_A#4
L5
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D26#
D25#
D24#
D23#
D22#
D21#
F12
F11
E10
D13
D10
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
AC2
AN4
AN3
DBR#
VSS_SENSE
VCC_SENSE
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
D11
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
AN5
C12
D D
H_DBI#[0..3]6
H_IERR#4
H_FERR#12
H_STPCLK#12
H_INIT#12
H_DBSY#6
H_DRDY#6
H_TRDY#6
H_ADS#6
C C
H_CPUSLP#12
B B
A A
H_LOCK#6
H_BNR#6
H_HIT#6
H_HITM#6
H_BPRI#6
H_DEFER#6
PECI17
VTIN117
GNDHM17
H_TRMTRIP#12
H_PROCHOT#4
H_IGNNE#12
ICH_H_SMI#12
H_A20M#12
CP31CP31
H_BPM#1
Kentsfield
CPU_BSEL017,19
CPU_BSEL117,19
CPU_BSEL217,19
H_D#[0..63]6 H_ADSTB#1 6
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
H_PWRGD4,12
H_CPURST#4,6
VID2
VID3
VID1
VID4
VID0
AL4
AK4
AL6
AM3
AL5
AM2
VID5
VID4
VID3
VID2
VID1
VID0
VID_SELECT
GTLREF_SEL
FC5/CPU_GTLREF2
RSVD/CPU_GTLREF3
TESTHI12
TESTHI11
TESTHI10
FORCEPH
RSVD#G6
LINT1/NMI
LINT0/INTR
B4
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
C30
C30
X_C10u16X51206-RH
X_C10u16X51206-RH
VSS_SENSE
VID[0..7] 27
AN7
H1
GTLREF0
H2
GTLREF1
H29
E24
GTLREF2
F2
G10
AG3
BPM5#
AF2
BPM4#
AG2
BPM3#
AD2
BPM2#
AJ1
BPM1#
AJ2
BPM0#
J6
REQ4#
K6
REQ3#
M6
REQ2#
J5
REQ1#
K4
REQ0#
W2
P1
H5
G4
TESTHI9
G3
TESTHI8
F24
TESTHI7
G24
TESTHI6
G26
TESTHI5
G27
TESTHI4
G25
TESTHI3
F25
TESTHI2
W3
TESTHI1
F26
TESTHI0
AK6
G6
G28
BCLK1#
F28
BCLK0#
A3
RS2#
F5
RS1#
B3
RS0#
U3
AP1#
U2
AP0#
F3
BR0#
T2
COMP5
J2
COMP4
R1
COMP3
G2
COMP2
T1
COMP1
A13
COMP0
J17
DP3#
H16
DP2#
H15
DP1#
J16
DP0#
AD5
ADSTB1#
R6
ADSTB0#
C17
DSTBP3#
G19
DSTBP2#
E12
DSTBP1#
B9
DSTBP0#
A16
DSTBN3#
G20
DSTBN2#
G12
DSTBN1#
C8
DSTBN0#
L1
K1
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
VCC_SENSE 27
VSS_SENSE 27
VTT_OUT_RIGHT
R49
R49
680R/4
680R/4
CPU_GTLREF0
CPU_GTLREF1
GTLREF_SEL
MCH_GTLREF_CPU
CPU_GTLREF2
CPU_GTLREF3
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
FORCEPH
RSVD_G6
H_RS#2
H_RS#1
H_RS#0
TEST-U3
TEST-U2
H_COMP5
H_COMP4
R99 49.9R1%/4R99 49.9R1%/4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
TEST-J17
TEST-H16
TEST-H15
TEST-J16
T1T1
R121 51R/4R121 51R/4
R123 51R/4R123 51R/4
R59 X_130R1%/4R59 X_130R1%/4
R97 X_51R/4R97 X_51R/4
T2T2
T3T3
T4T4
T5T5
T6T6
T7T7
H_ADSTB#0 6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 12
H_INTR 12
VID_SEL 27
CPU_GTLREF0 4
CPU_GTLREF1 4
MCH_GTLREF_CPU 6
CPU_GTLREF2 4
CPU_GTLREF3 4
H_BPM#0 5
H_REQ#[0..4] 6
H_TESTHI12 5
H_BPM#2
CP14CP14
H_BPM#3
CP19CP19
V_FSB_VTT
VTT_OUT_RIGHT
VTT_OUT_LEFT
CK_H_CPU# 19
CK_H_CPU 19
H_RS#[0..2] 6
Kentsfield
V_FSB_VTT
H_TESTHI1 5
VTT_OUT_RIGHT 4
H_BR#0 4,6
VTT_OUT_LEFT 4,5
VID2
VID0
VID5
VID4
VID7
VID3
VID6
VID1
H_BPM#0
H_BPM#1
H_BPM#5
H_BPM#3
H_TRST#
H_BPM#4
H_TDO
H_TCK
H_TDI
H_BPM#2
H_TMS
H_TESTHI9
H_TESTHI10
H_TESTHI11
H_TESTHI12
H_TESTHI8
H_TESTHI13
H_COMP75
PULL HIGHT PULL DOWN
RN3 8P4R-680/4RN3 8P4R-680/4
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
RN2 8P4R-680/4RN2 8P4R-680/4
RN4
RN4
1
2
3
4
5
6
7
8
8P4R-51/4
8P4R-51/4
RN6
RN6
1
2
3
4
5
6
7
8
8P4R-51/4
8P4R-51/4
RN5
RN5
1
2
3
4
5
6
7
8
8P4R-51/4
8P4R-51/4
RN9
RN9
1
2
3
4
5
6
7
8
8P4R-51/4
8P4R-51/4
R85 51R1%0402R85 51R1%0402
R91 51R1%0402R91 51R1%0402
H_COMP6
H_COMP7
H_COMP0
H_COMP3
H_COMP5
H_COMP1
H_COMP2
X_C0.1U16Y2
X_C0.1U16Y2
R83 49.9R1%/4R83 49.9R1%/4
R67 49.9R1%/4R67 49.9R1%/4
R128 49.9R1%/4R128 49.9R1%/4
RN8
RN8
1
2
3
4
5
6
7
8
8P4R-49.9R1%-1
8P4R-49.9R1%-1
R101 49.9R1%/4R101 49.9R1%/4
C46
C46
VTT_OUT_RIGHT
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_OUT_RIGHT 4H_COMP65
VTT_OUT_LEFT 4,5
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7425
MS-7425
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, June 05, 2008
Date:
Thursday, June 05, 2008
Date:
5
4
3
2
Thursday, June 05, 2008
MS-7425
LGA775 - Signal
LGA775 - Signal
LGA775 - Signal
1
Sheet of
Sheet of
Sheet of
332
332
332
0A
0A
0A
5
VCCP
AF9
AF8
AF22
AF21
U5B
AF19
AF18
AF15
AF14
AF12
AF11
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AE9
AD8
AC8
AB8
AA8
U5B
VCCP
VCC#AF19
VCC#AF18
VCC#AF15
VCC#AF14
VCC#AF12
VCC#AF11
VCC#AE9
VCC#AE23
VCC#AE22
VCC#AE21
VCC#AE19
VCC#AE18
VCC#AE15
VCC#AE14
VCC#AE12
VCC#AE11
VCC#AD8
VCC#AD30
VCC#AD29
VCC#AD28
VCC#AD27
VCC#AD26
VCC#AD25
VCC#AD24
VCC#AD23
VCC#AC8
VCC#AC30
VCC#AC29
VCC#AC28
VCC#AC27
VCC#AC26
VCC#AC25
VCC#AC24
VCC#AC23
VCC#AB8
VCC#AA8
VCC#AF22
VCC#AF21
VCC#Y30
VCC#Y8
Y8
Y29
Y30
VCC#AF9
VCC#AF8
VCC#Y28
VCC#Y29
Y28
D D
C C
VCCP
AG14
AG12
AG11
VCC#AG12
VCC#AG11
VCC#Y26
VCC#Y27
Y25
Y26
Y27
AG19
AG18
AG15
VCC#AG18
VCC#AG15
VCC#AG14
VCC#Y24
VCC#Y25
Y23
Y24
AG21
VCC#AG21
VCC#AG19
VCC#W30
VCC#W8W8VCC#Y23
W30
AG26
AG25
AG22
VCC#AG26
VCC#AG25
VCC#AG22
VCC#W27
VCC#W28
VCC#W29
W27
W28
W29
AG29
AG28
AG27
VCC#AG29
VCC#AG28
VCC#AG27
VCC#W24
VCC#W25
VCC#W26
W24
W25
W26
AG30
AG9
AG8
VCC#AG9
VCC#AG8
VCC#AG30
VCC#U8
VCC#V8
VCC#W23
V8
U8
W23
AH11
VCC#AH11
VCC#U30
U30
AH15
AH14
AH12
VCC#AH15
VCC#AH14
VCC#AH12
VCC#U27
VCC#U28
VCC#U29
U27
U28
U29
AH21
AH19
AH18
VCC#AH21
VCC#AH19
VCC#AH18
VCC#U24
VCC#U25
VCC#U26
U24
U25
U26
4
AH26
AH25
AH22
VCC#AH26
VCC#AH25
VCC#AH22
VCC#T30
VCC#T8
VCC#U23
T8
T30
U23
AH27
AH28
AH29
VCC#AH27
VCC#AH28
VCC#T28
VCC#T29
T27
T28
T29
AH8
AH9
AH30
VCC#AH8
VCC#AH29
VCC#AH30
VCC#T25
VCC#T26
VCC#T27
T24
T25
T26
AJ11
AJ12
VCC#AH9
VCC#AJ11
VCC#AJ12
VCC#R8
VCC#T23
VCC#T24
R8
T23
AJ14
AJ15
VCC#AJ14
VCC#P8
P8
N8
AJ18
AJ19
VCC#AJ15
VCC#AJ18
VCC#N30
VCC#N8
N29
N30
AJ21
AJ22
VCC#AJ19
VCC#AJ21
VCC#AJ22
VCC#N27
VCC#N28
VCC#N29
N27
N28
AJ8
AJ25
AJ26
VCC#AJ25
VCC#AJ26
VCC#N25
VCC#N26
N24
N25
N26
AJ9
AK11
VCC#AJ8
VCC#AJ9
VCC#AK11
VCC#M8
VCC#N23
VCC#N24
M8
N23
AK12
AK14
AK15
VCC#AK12
VCC#AK14
VCC#AK15
VCC#M28
VCC#M29
VCC#M30
M28
M29
M30
AK18
AK19
AK21
VCC#AK18
VCC#AK19
VCC#AK21
VCC#M25
VCC#M26
VCC#M27
M25
M26
M27
AK22
AK25
AK26
VCC#AK22
VCC#AK25
VCC#AK26
VCC#L8
VCC#M23
VCC#M24
L8
M23
M24
AK8
AK9
VCC#AK8
VCC#AK9
VCC#K30
VCC#K8
K8
K30
AL11
AL12
AL14
VCC#AL11
VCC#AL12
VCC#K28
VCC#K29
K27
K28
K29
3
AL15
AL18
AL19
VCC#AL14
VCC#AL15
VCC#AL18
VCC#K25
VCC#K26
VCC#K27
K24
K25
K26
AL21
AL22
AL25
VCC#AL19
VCC#AL21
VCC#AL22
VCC#J9
VCC#K23
VCC#K24
J8
J9
K23
AL26
AL29
AL30
VCC#AL25
VCC#AL26
VCC#AL29
VCC#J29
VCC#J30
VCC#J8
J28
J29
J30
AL8
AL9
AM11
VCC#AL8
VCC#AL9
VCC#AL30
VCC#J26
VCC#J27
VCC#J28
J25
J26
J27
AM12
AM14
AM15
VCC#AM11
VCC#AM12
VCC#AM14
VCC#AM15
VCC#J22
VCC#J23
VCC#J24
VCC#J25
J22
J23
J24
AM18
AM19
AM21
VCC#AM18
VCC#AM19
VCC#AM21
VCC#J19
VCC#J20
VCC#J21
J19
J20
J21
AM22
AM25
AM26
VCC#AM22
VCC#AM25
VCC#AM26
VCC#J14
VCC#J15
VCC#J18
J14
J15
J18
AM8
AM29
AM30
VCC#AM8
VCC#AM29
VCC#AM30
VCC#J11
VCC#J12
VCC#J13
J11
J12
J13
AM9
AN11
AN12
VCC#AM9
VCC#AN11
VCC#AN9
VCC#J10
J10
AN8
AN9
AN14
AN15
AN18
VCC#AN12
VCC#AN14
VCC#AN15
VCC#AN18
VTT_OUT_RIGHT
VCC#AN26
VCC#AN29
VCC#AN30
VCC#AN8
AN26
AN29
AN30
AN19
AN21
AN22
VCCA
VSSA
VCC#AN19
VCC#AN21
VCC#AN22
VCCPLL
VCC-IOPLL
VTT#A25
VTT#A26
VTT#A27
VTT#A28
VTT#A29
VTT#A30
VTT#B25
VTT#B26
VTT#B27
VTT#B28
VTT#B29
VTT#B30
VTT#C25
VTT#C26
VTT#C27
VTT#C28
VTT#C29
VTT#C30
VTT#D25
VTT#D26
VTT#D27
VTT#D28
VTT#D29
VTT#D30
VTTPWRGD
VTT_OUT_LEFT
VTT_SEL
RSVD#F29
VCC#AN25
1122334
AN25
2
A23
B23
D23
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
AM6
AA1
J1
F27
F29
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
4
H_VCCA
H_VSSA
H_VCCPLL
H_VCCA
VTT_PWG
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
V_FSB_VTT
C128
C128
C10U10Y5
C10U10Y5
C10U10Y5
C10U10Y5
CAPS FOR FSB GENERIC
VTT_SEL 24
C125
C125
V_FSB_VTT
C122
C122
C10U10Y5
C10U10Y5
1
*GTLREF VOLTAGE SHOULD BE
0.67 * VTT = 0.8V (At VTT=1.2V)
VTT_OUT_RIGHT
B B
VTT_OUT_RIGHT
R80 100R1%/2R80 100R1%/2
C45
C45
X_10u/10V/Y/12
X_10u/10V/Y/12
R86 100R1%/2R86 100R1%/2
GTL_REF0
R87
R87
200R1%/2
200R1%/2
GTL_REF1
R90
R90
200R1%/2
200R1%/2
R88 10R/4R88 10R/4
C53
C53
C1u16Y/6
C1u16Y/6
R94 10R/4R94 10R/4
C54
C54
C1u16Y/6
C1u16Y/6
C58
C58
220p50N/4
220p50N/4
C62
C62
220p50N/4
220p50N/4
CPU_GTLREF0 3
CPU_GTLREF1 3
R100 100R1%/2R100 100R1%/2
R70 100R1%/2R70 100R1%/2
GTL_REF3VTT_OUT_LEFT
R102
R102
200R1%/2
200R1%/2
GTL_REF2VTT_OUT_LEFT
R78
R78
200R1%/2
200R1%/2
R103 10R/4R103 10R/4
C64
C64
C1u16Y/6
C1u16Y/6
R77 10R/4R77 10R/4
C48
C48
C1u16Y/6
C1u16Y/6
C65
C65
220p50N/4
220p50N/4
C47
C47
220p50N/4
220p50N/4
CPU_GTLREF2 3
CPU_GTLREF3 3
VTT_PWRGOOD
PLACE AT CPU END OF ROUTE
A A
VTT_OUT_RIGHT3
VTT_OUT_LEFT3,5
VTT_OUT_RIGHT
VTT_OUT_LEFT
5
R72 130R1%/4R72 130R1%/4
R74 62R/4R74 62R/4
R82 62R/4R82 62R/4
R96 X_100R/2R96 X_100R/2
R104 62R/4R104 62R/4
H_PROCHOT#
H_IERR#
H_CPURST#
H_PWRGD
H_BR#0
H_PROCHOT# 3
H_IERR# 3
H_CPURST# 3,6
H_PWRGD 3,12
H_BR#0 3,6
4
VID_GD#24,27
3
VTT_OUT_RIGHT
R55 1KR/2R55 1KR/2
*PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
*TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS
V_FSB_VTT V_1P5_CORE
L3
L3
L10U_100mA_0805
L10U_100mA_0805
21
C104
C104
C103
C103
C10U10Y5
C10U10Y5
C1u16Y/6
C1u16Y/6
R66
R66
1.2V VTT_PWRGOOD
680R/4
680R/4
VTT_PWG
CE
Q13
Q13
B
2N3904
2N3904
2
H_VCCA
C112
C112
X_C10U10Y5
X_C10U10Y5
H_VSSA
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
MSI
MSI
MSI
CP3
CP3
H_VCCPLL
X_COPPER
X_COPPER
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
LGA775 - Power
LGA775 - Power
LGA775 - Power
Date:
Thursday, June 05, 2008
Date:
Thursday, June 05, 2008
Date:
Thursday, June 05, 2008
C116
C116
X_C1u16Y/6
X_C1u16Y/6
MS-7425
MS-7425
MS-7425
1
C121
C121
C0.01u25X/2
C0.01u25X/2
Sheet of
Sheet of
Sheet of
432
432
432
C124
C124
C10U10Y5
C10U10Y5
0A
0A
0A
5
4
3
2
1
MSID1 MSID0
U5C
U5C
D D
C C
B B
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE20
AE24
AE25
AE26
AE27
AE28
AE29
AE30
AF10
AF13
AF16
AF17
AF20
AF23
AF24
AF25
AF26
AF27
AF28
AF29
AF30
A12
VSS#A12
A15
VSS#A15
A18
VSS#A18
A2
VSS#A2
A21
VSS#A21
A6
VSS#A6
A9
VSS#A9
VSS#AA23
VSS#AA24
VSS#AA25
VSS#AA26
VSS#AA27
VSS#AA28
VSS#AA29
AA3
VSS#AA3
VSS#AA30
AA6
VSS#AA6
AA7
VSS#AA7
AB1
VSS#AB1
VSS#AB23
VSS#AB24
VSS#AB25
VSS#AB26
VSS#AB27
VSS#AB28
VSS#AB29
VSS#AB30
AB7
VSS#AB7
VSS#AC3
VSS#AC6
VSS#AC7
VSS#AD4
VSS#AD7
VSS#AE10
VSS#AE13
VSS#AE16
VSS#AE17
AE2
VSS#AE2
VSS#AE20
VSS#AE24
VSS#AE25
VSS#AE26
VSS#AE27
VSS#AE28
VSS#AE29
VSS#AE30
AE5
VSS#AE5
AE7
VSS#AE7
VSS#AF10
VSS#AF13
VSS#AF16
VSS#AF17
VSS#AF20
VSS#AF23
VSS#AF24
VSS#AF25
VSS#AF26
VSS#AF27
VSS#AF28
VSS#AF29
AF3
VSS#AF3
VSS#AF30
AF6
VSS#AF6
AF7
VSS#AF7
Y2
W4
VSS#Y7Y7VSS#Y5Y5VSS#Y2
VSS#W7W7VSS#W4
VSS#AG10
VSS#AG13
VSS#AG16
AG10
AG13
AG16
AG17
V6
V30
VSS#V7V7VSS#V6
VSS#AG17
VSS#AG20
VSS#AG23
AG20
AG23
AG24
V3
V29
V28
VSS#V3
VSS#V30
VSS#V29
VSS#AG24
VSS#AG7
VSS#AH1
AH1
AG7
AH10
V27
V26
V25
VSS#V28
VSS#V27
VSS#V26
VSS#AH10
VSS#AH13
VSS#AH16
AH13
AH16
AH17
V24
V23
U7
VSS#V25
VSS#V24
VSS#V23
VSS#AH17
VSS#AH20
VSS#AH23
AH20
AH23
AH24
T3
VSS#T7T7VSS#T6T6VSS#T3
VSS#U7
VSS#AH24
VSS#AH3
VSS#AH6
AH3
AH6
AH7
R5
VSS#R7R7VSS#R5
VSS#AH7
VSS#AJ10
VSS#AJ13
AJ10
AJ13
R30
R29
R28
VSS#R30
VSS#R29
VSS#AJ16
VSS#AJ17
AJ16
AJ17
AJ20
R27
R26
R25
VSS#R28
VSS#R27
VSS#R26
VSS#AJ20
VSS#AJ23
VSS#AJ24
AJ23
AJ24
AJ27
R24
R23
R2
VSS#R25
VSS#R24
VSS#R23
VSS#AJ27
VSS#AJ28
VSS#AJ29
AJ28
AJ29
AJ30
P4
P30
VSS#P7P7VSS#P4
VSS#R2
VSS#AJ30
VSS#AJ4
VSS#AJ7
AJ4
AJ7
AK10
P29
P28
P27
VSS#P30
VSS#P29
VSS#P28
VSS#AK10
VSS#AK13
VSS#AK16
AK13
AK16
AK17
P26
P25
P24
VSS#P27
VSS#P26
VSS#P25
VSS#AK17
VSS#AK2
VSS#AK20
AK2
AK20
AK23
P23
VSS#N7N7VSS#N6N6VSS#N3
VSS#P24
VSS#P23
VSS#AK23
VSS#AK24
VSS#AK27
AK24
AK27
AK28
N3
M1
VSS#M7M7VSS#M1
VSS#AK28
VSS#AK29
VSS#AK30
AK5
AK29
AK30
L6
VSS#L7L7VSS#L6
VSS#AK5
VSS#AK7
VSS#AL10
AK7
AL10
L30
L29
L3
VSS#L3
VSS#L30
VSS#AL13
VSS#AL16
AL13
AL16
AL17
L28
L27
VSS#L29
VSS#L28
VSS#L27
VSS#AL17
VSS#AL20
VSS#AL23
AL20
AL23
L26
L25
L24
VSS#L26
VSS#L25
VSS#AL24
VSS#AL27
AL24
AL27
AL28
K5
L23
VSS#K7K7VSS#K5
VSS#L24
VSS#L23
VSS#AL28
VSS#AL7
VSS#AM1
AL7
AM1
AM10
K2
J7
VSS#K2
VSS#AM10
VSS#AM13
VSS#AM16
AM13
AM16
AM17
H7
H8
H9
VSS#J4J4VSS#J7
VSS#H8
VSS#H9
VSS#AM17
VSS#AM20
VSS#AM23
AM20
AM23
AM24
H28
H3
H6
VSS#H3
VSS#H6
VSS#H7
VSS#AM24
VSS#AM27
VSS#AM28
AM4
AM27
AM28
H26
H27
VSS#H26
VSS#H27
VSS#H28
VSS#AM4
VSS#AN1
VSS#AN10
AN1
AN10
H23
H24
H25
VSS#H24
VSS#H25
VSS#AN13
VSS#AN16
AN13
AN16
AN17
H20
H21
H22
VSS#H21
VSS#H22
VSS#H23
VSS#AN17
VSS#AN2
VSS#AN20
AN2
AN20
AN23
H17
H18
H19
VSS#H18
VSS#H19
VSS#H20
VSS#AN23
VSS#AN24
VSS#AN27
AN24
AN27
AN28
H12
H13
H14
VSS#H13
VSS#H14
VSS#H17
VSS#AN28
VSS#B1B1VSS#B11
B11
B14
H10
H11
F7
VSS#F7
VSS#H10
VSS#H11
VSS#H12
RSVD/COMP8
RSVD#AE4
RSVD#D1
RSVD#D14
RSVD#E5
RSVD#E6
RSVD#E7
RSVD#E23
RSVD#F23
RSVD#J3
RSVD#N4
RSVD#P5
RSVD#AC4
IMPSEL#
VSS#F22
VSS#F19
VSS#F16
VSS#F13
VSS#F10
VSS#E28
VSS#E27
VSS#E26
VSS#E25
VSS#E20
VSS#E17
VSS#E14
VSS#E11
VSS#D24
VSS#D21
VSS#D18
VSS#D15
VSS#D12
VSS#C24
VSS#C22
VSS#C19
VSS#C16
VSS#C13
VSS#C10
VSS#B14
VSS#B17
VSS#B20
VSS#B24
B17
B20
B24
Y3
COMP6
AE3
COMP7
B13
AE4
D1
D14
E5
E6
E7
E23
F23
AL3
RSVD
J3
N4
P5
AC4
F6
V1
MSID1
W1
MSID0
U1
FC28
G1
FC27
E29
FC26
A24
FC23
F4
VSS#F4
F22
F19
F16
F13
F10
E8
VSS#E8
E28
E27
E26
E25
E20
E2
VSS#E2
E17
E14
E11
D9
VSS#D9
D6
VSS#D6
D5
VSS#D5
D3
VSS#D3
D24
D21
D18
D15
D12
C7
VSS#C7
C4
VSS#C4
C24
C22
C19
C16
C13
C10
B8
VSS#B8
B5
VSS#B5
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
H_COMP6
H_COMP7
H_COMP8
R127 24.9R1%/4R127 24.9R1%/4
T8T8
T9T9
T10T10
T11T11
IMPSEL# MSID1
MSID1
MSID0
CP32CP32
CP33CP33
T12T12
R118 X_51R/4R118 X_51R/4
H_COMP6 3
H_COMP7 3
H_TESTHI13 VTT_OUT_LEFT 3,4
H_TESTHI12
H_BPM#0
H_TESTHI12 3
H_BPM#0 3
RN7 8P4R-51/4RN7 8P4R-51/4
H_TESTHI1
MSID0
IMPSEL#
Kentsfield
05 Per FMB
05 Value FMB
1
2
3
4
5
6
7
8
0
0
0
1
A A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7425
MS-7425
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, June 05, 2008
Date:
Thursday, June 05, 2008
Date:
5
4
3
2
Thursday, June 05, 2008
MS-7425
LGA775 - GND
LGA775 - GND
LGA775 - GND
1
Sheet of
Sheet of
Sheet of
532
532
532
0A
0A
0A
8
H_A#[3..35]3
H_REQ#[0..4]3
D D
C C
B B
H_RS#[0..2]3
H_D#[0..63]3
H_DBI#[0..3]3
Place the Pull-up R close to ICH7
ICH_SYNC#13
H_A#[3..35]
H_REQ#[0..4]
H_RS#[0..2]
H_D#[0..63]
H_DBI#[0..3]
X_1KR/2
X_1KR/2
R146
X_1KR/2
R146
X_1KR/2
R126 0R/2R126 0R/2
R125
R125
H_ADSTB#03
H_ADSTB#13
H_ADS#3
H_TRDY#3
H_DRDY#3
H_DEFER#3
H_HITM#3
H_HIT#3
H_LOCK#3
H_BR#03,4
H_BNR#3
H_BPRI#3
H_DBSY#3
VCC3VCC3
CK_H_MCH19
CK_H_MCH#19
CHIP_PWGD8,13,24
H_CPURST#3,4
PLTRST#8,12,17
C439
X_C220p16X/4
C439
X_C220p16X/4
R359
16.5R1%/4-RH
R359
16.5R1%/4-RH
7
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
PLTRST#
ICH_SYNC#_R
HXRCOMP
HXSCOMP
HXSCOMPB
HXSWING
MCH_GTLREF_CPU
U40A
U40A
J42
L39
J40
L37
L36
K42
N32
N34
M38
N37
M36
R34
N35
N38
U37
N39
R37
P42
R39
V36
R38
U36
U33
R35
V33
V35
Y34
V42
V38
Y36
Y38
Y39
AA37
M34
U34
F40
L35
L38
G43
J37
W40
Y40
W41
T43
Y43
U42
V41
AA42
W42
G39
U40
U41
AA41
U39
R32
U32
AM17
C31
AM18
J13
D23
C25
D25
B25
D24
B24
V_1P25_CORE
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HA32#
HA33#
HA34#
HA35#
HADSTB0#
HADSTB1#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HADS#
HTRDY#
HDRDY#
HDEFER#
HITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HRS0#
HRS1#
HRS2#
HCLKP
HCLKN
PWROK
HCPURST#
RSTIN#
ICH_SYNC#
HRCOMP
HSCOMP
HSCOMP#
HSWING
HDVREF
HAVREF
P29
VTT_1
P27
VTT_2
VCC_1
AJ12
P26
VTT_3
VCC_2
AJ11
P24
VTT_4
VCC_3
AJ10
P23
VTT_5
VCC_4
AJ9
N29
VTT_6
VCC_5
AJ8
N26
VTT_7
VCC_6
AJ7
N24
VTT_8
VCC_7
AJ6
N23
VTT_9
VCC_8
AJ5
M29
M24
VTT_10
VCC_9
AJ4
AJ3
6
M23
L24
VTT_11
VTT_12
VCC_10
VCC_11
AJ2
AH4
L23
K24
VTT_13
VTT_14
VCC_12
VCC_13
AH2
AH1
K23
J24
VTT_15
VTT_16
VCC_14
VCC_15
AG13
AG12
J23
H24
VTT_17
VTT_18
VCC_16
VCC_17
AG11
AG10
H23
G26
VTT_19
VTT_20
VCC_18
VCC_19
AG9
AG8
G24
G23
VTT_21
VTT_22
VCC_20
VCC_21
AG7
AG6
F26
F24
VTT_23
VTT_24
VCC_22
VCC_23
AG5
AG4
F23
E29
VTT_25
VTT_26
VCC_24
VCC_25
AG3
AG2
E27
E26
VTT_27
VTT_28
VCC_26
VCC_27
AF13
AF12
E23
D29
VTT_29
VTT_30
VCC_28
VCC_29
AF11
AD24
D28
D27
VTT_31
VTT_32
VCC_30
VCC_31
AD22
AD20
5
C30
C29
VTT_33
VTT_34
VCC_32
VCC_80
AC25
AC23
C27
B30
VTT_35
VTT_36
VCC_34
VCC_35
AC21
AC19
B29
B28
VTT_37
VTT_38
VCC_36
VCC_37
AC6
AC13
B27
A30
VTT_39
VTT_40
VCC_38
VCC_39
AB24
AB22
A28
R27
VTT_41
VTT_42
VCC_40
VCC_41
AB20
AA25
R26
R24
VTT_43
VTT_44
VCC_42
VCC_43
AA23
AA21
R23
VTT_45
VTT_46
VCC_44
VCC_45
AA19
AA13
AG19
AG18
VCC_84
VCC_46
VCC_47
Y24
AA3
AG17
AG15
VCC_85
VCC_86
VCC_48
VCC_49
Y22
Y20
AG14
AF26
VCC_87
VCC_88
VCC_50
VCC_51
Y13
4
AF25
AF24
AF22
VCC_89
VCC_90
VCC_91
VCC_52Y6VCC_53
VCC_54
V13
V12
V10
AF20
AF18
VCC_93
VCC_94
VCC_55
VCC_56V9VCC_57
U13
AF17
AF15
AF14
VCC_95
VCC_96
VCC_97
VCC_58
VCC_59U9VCC_60U6VCC_61U3VCC_62
U10
AE27
AE26
AE25
AE23
AE21
AE19
AE17
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_63
VCC_64N9VCC_65N8VCC_66N6VCC_67N3VCC_68L6VCC_69J6VCC_70J3VCC_71J2VCC_72G2VCC_73
N12
N11
AD27
AD26
VCC_105
VCC_106
VCC_107
AD18
AD17
VCC_108
VCC_109
AD15
AD14
VCC_110
VCC_111
F11
AC27
AC26
AC17
AC15
VCC_112
VCC_113
VCC_114
VCC_74F9VCC_75D4VCC_76
C13
3
AC14
AB27
AB26
VCC_115
VCC_116
VCC_117
VCC_77C9VCC_78
VCC_79
P20
Y11
AG25
AB18
AB17
VCC_118
VCC_119
VCC_120
VCC_81
VCC_82
VCC_83
AG21
AG20
AA27
AA26
VCC_121
VCC_122
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63
HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDSTBP0#
HDSTBN0#
HDSTBP1#
HDSTBN1#
HDSTBP2#
HDSTBN2#
HDSTBP3#
HDSTBN3#
INTEL-G31
INTEL-G31
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
2
V_1P25_COREV_FSB_VTT
H_D#0
R40
H_D#1
P41
H_D#2
R41
H_D#3
N40
H_D#4
R42
H_D#5
M39
H_D#6
N41
H_D#7
N42
H_D#8
L41
H_D#9
J39
H_D#10
L42
H_D#11
J41
H_D#12
K41
H_D#13
G40
H_D#14
F41
H_D#15
F42
H_D#16
C42
H_D#17
D41
H_D#18
F38
H_D#19
G37
H_D#20
E42
H_D#21
E39
H_D#22
E37
H_D#23
C39
H_D#24
B39
H_D#25
G33
H_D#26
A37
H_D#27
F33
H_D#28
E35
H_D#29
K32
H_D#30
H32
H_D#31
B34
H_D#32
J31
H_D#33
F32
H_D#34
M31
H_D#35
E31
H_D#36
K31
H_D#37
G31
H_D#38
K29
H_D#39
F31
H_D#40
J29
H_D#41
F29
H_D#42
L27
H_D#43
K27
H_D#44
H26
H_D#45
L26
H_D#46
J26
H_D#47
M26
H_D#48
C33
H_D#49
C35
H_D#50
E41
H_D#51
B41
H_D#52
D42
H_D#53
C40
H_D#54
D35
H_D#55
B40
H_D#56
C38
H_D#57
D37
H_D#58
B33
H_D#59
D33
H_D#60
C34
H_D#61
B35
H_D#62
A32
H_D#63
D32
H_DBI#0
M40
H_DBI#1
J33
H_DBI#2
G29
H_DBI#3
E33
L40
M43
G35
H33
G27
H27
B38
D38
H_DSTBP#0 3
H_DSTBN#0 3
H_DSTBP#1 3
H_DSTBN#1 3
H_DSTBP#2 3
H_DSTBN#2 3
H_DSTBP#3 3
H_DSTBN#3 3
1
V_FSB_VTT
HXSWING S/B 1/4*VTT +/- 2%
R122
R122
301R1%/4
301R1%/4
A A
HXSWING_R HXSWING
R124 51R/4R124 51R/4
C153
R150
R150
100R/2
100R/2
C153
C0.1U16Y2
C0.1U16Y2
8
V_FSB_VTT
V_FSB_VTT
R143 49.9R1%/4R143 49.9R1%/4
R152 49.9R1%/4R152 49.9R1%/4
7
HXSCOMP
C110
C110
C2.7p25N/4
C2.7p25N/4
HXSCOMPB
C440
C440
C2.7p25N/4
C2.7p25N/4
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V
R147 100R/2R147 100R/2
V_FSB_VTT
R149
R149
200R1%/2
200R1%/2
6
R148 51R/4R148 51R/4
C0.1U16Y2
C0.1U16Y2
5
C140
C140
MCH_GTLREF_CPU
C141
C141
X_C220p16X/4
X_C220p16X/4
MCH_GTLREF_CPU 3
4
C441
C441
C0.1U16Y2
C0.1U16Y2
V_FSB_VTT
3
C175
C175
C0.1U16Y2
C0.1U16Y2
C152
C152
C0.1U16Y2
C0.1U16Y2
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7425
MS-7425
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, June 05, 2008
Date:
Thursday, June 05, 2008
Date:
Thursday, June 05, 2008
2
MS-7425
G31 - CPU Signals
G31 - CPU Signals
G31 - CPU Signals
Sheet of
Sheet of
Sheet of
632
632
632
1
0A
0A
0A
8
DATA_A[0..63]10
MAA_A[0..14]10,11
D D
C C
B B
A A
DATA_A[0..63]
MAA_A[0..14]
SCS_A#010,11
SCS_A#110,11
RAS_A#10,11
CAS_A#10,11
WE_A#10,11
ODT_A010,11
ODT_A110,11
SBS_A010,11
SBS_A110,11
SBS_A210,11
DQS_A010
DQS_A#010
DQS_A110
DQS_A#110
DQS_A210
DQS_A#210
DQS_A310
DQS_A#310
DQS_A410
DQS_A#410
DQS_A510
DQS_A#510
DQS_A610
DQS_A#610
DQS_A710
DQS_A#710
P_DDR_A210
N_DDR_A210
P_DDR_A110
N_DDR_A110
P_DDR_A010
N_DDR_A010
VCC_DDR
R160 20R1%/2R160 20R1%/2
R162 20R1%/2R162 20R1%/2 R203
R170 20R1%/2R170 20R1%/2
R199 20R1%/2R199 20R1%/2
C158
C158
C0.1U16Y2
C0.1U16Y2
8
DQM_A[0..7]10
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
P_DDR_A2
N_DDR_A2
P_DDR_A1
N_DDR_A1
P_DDR_A0
N_DDR_A0
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
7
DQM_A[0..7]
AN7
AN8
AW5
AW7
AN5
SDQ_B0
SDQ_A0
AR5
AR4
DATA_A0
DATA_A1
SDQ_B1
SDQ_B2
SDQ_A1
SDQ_A2
AV3
AV2
DATA_A3
DATA_A2
AN6
SDQ_B3
SDQ_B4
SDQ_A3
SDQ_A4
AP3
AP2
DATA_A4
DATA_A5
U40B
U40B
AW35
SCS_A0#
BA35
SCS_A1#
BA34
SCS_A2#
BB38
SCS_A3#
BB33
SRAS_A#
AY35
SCAS_A#
BB34
SWE_A#
BA31
SMA_A0
BB25
SMA_A1
BA26
SMA_A2
BA25
SMA_A3
AY25
SMA_A4
BA23
SMA_A5
AY24
SMA_A6
AY23
SMA_A7
BB23
SMA_A8
BA22
SMA_A9
AY33
SMA_A10
BB22
SMA_A11
AW21
SMA_A12
AY38
SMA_A13
BA21
SMA_A14
AY37
SODT_A0
BA38
SODT_A1
BB35
SODT_A2
BA39
SODT_A3
BA33
SBS_A0
AW32
SBS_A1
BB21
SBS_A2
AU4
SDQS_A0
AR3
SDQS_A0#
BB3
SDQS_A1
BA4
SDQS_A1#
BB9
SDQS_A2
BA9
SDQS_A2#
AT20
SDQS_A3
AU18
SDQS_A3#
AR41
SDQS_A4
AR40
SDQS_A4#
AL41
SDQS_A5
AL40
SDQS_A5#
AG42
SDQS_A6
AG41
SDQS_A6#
AC42
SDQS_A7
AC41
SDQS_A7#
AU31
SCLK_A0
AR31
SCLK_A0#
AP27
SCLK_A1
AN27
SCLK_A1#
AV33
SCLK_A2
AW33
SCLK_A2#
AP29
SCLK_A3
AP31
SCLK_A3#
AM26
SCLK_A4
AM27
SCLK_A4#
AT33
SCLK_A5
AU33
SCLK_A5#
AN2
SRCOMP0
AN3
SRCOMP1
BB40
SRCOMP2
BA40
SRCOMP3
7
AN9
AU7
SDQ_B5
SDQ_B6
SDQ_A5
SDQ_A6
AV4
AU1
DATA_A6
DATA_A7
AT11
AU11
SDQ_B7
SDQ_B8
SDQ_A7
SDQ_A8
AY2
AY3
DATA_A8
DATA_A9
AP13
AR13
SDQ_B9
SDQ_B10
SDQ_A9
SDQ_A10
BB5
AY6
DATA_A11
DATA_A10
6
SBS_A[0..2]10,11
SCS_A#[0..1]10,11
SCKE_A[0..1]10,11
ODT_A[0..1]10,11
AR11
AU9
SDQ_B11
SDQ_B12
SDQ_B13
SDQ_A11
SDQ_A12
SDQ_A13
AW2
AW3
DATA_A12
DATA_A13
6
AV12
AU12
SDQ_B14
SDQ_A14
BA5
BB4
DATA_A14
DATA_A15
AU15
AV13
SDQ_B15
SDQ_B16
SDQ_B17
SDQ_A15
SDQ_A16
SDQ_A17
AY7
BC7
DATA_A16
DATA_A18
DATA_A17
AU17
AT17
SDQ_B18
SDQ_B19
SDQ_A18
SDQ_A19
AY11
AW11
DATA_A19
DATA_A20
AU13
AM13
SDQ_B20
SDQ_B21
SDQ_A20
SDQ_A21
BB6
BA6
DATA_A21
DATA_A22
AV15
AW17
SDQ_B22
SDQ_B23
SDQ_A22
SDQ_A23
BA10
BB10
DATA_A24
DATA_A23
AV24
AT23
SDQ_B24
SDQ_B25
SDQ_A24
SDQ_A25
AT18
AR18
DATA_A25
DATA_A26
AT26
AP26
AU23
SDQ_B26
SDQ_B27
SDQ_A26
SDQ_A27
AT21
AP17
AU21
DATA_A27
DATA_A28
AW23
AR24
SDQ_B28
SDQ_B29
SDQ_B30
SDQ_A28
SDQ_A29
SDQ_A30
AP20
AN17
DATA_A29
DATA_A30
AN26
AW37
SDQ_B31
SDQ_B32
SDQ_A31
SDQ_A32
AV20
AV42
DATA_A32
DATA_A31
5
AV38
AN36
SDQ_B33
SDQ_B34
SDQ_A33
SDQ_A34
AP42
AU40
DATA_A33
DATA_A34
5
AN37
AU35
SDQ_B35
SDQ_B36
SDQ_A35
SDQ_A36
AV40
AN39
DATA_A36
DATA_A35
AR35
AN35
SDQ_B37
SDQ_B38
SDQ_A37
SDQ_A38
AV41
AR42
DATA_A38
DATA_A37
AR37
AM35
SDQ_B39
SDQ_B40
SDQ_A39
SDQ_A40
AP41
AN41
DATA_A39
DATA_A40
AM38
AJ34
SDQ_B41
SDQ_B42
SDQ_A41
SDQ_A42
AK42
AM39
DATA_A42
DATA_A41
AL38
AR39
SDQ_B43
SDQ_B44
SDQ_A43
SDQ_A44
AK41
AN40
DATA_A44
DATA_A43
AM34
AL37
SDQ_B45
SDQ_A45
AL42
AN42
DATA_A45
DATA_A46
AL32
AG38
SDQ_B46
SDQ_B47
SDQ_B48
SDQ_A46
SDQ_A47
SDQ_A48
AJ40
AL39
DATA_A48
DATA_A47
DATA_A49
AJ38
AF35
SDQ_B49
SDQ_B50
SDQ_A49
SDQ_A50
AF39
AH43
DATA_A50
DATA_A51
AF33
AJ37
SDQ_B51
SDQ_B52
SDQ_A51
SDQ_A52
AJ42
AE40
DATA_A52
DATA_A53
AJ35
AG33
SDQ_B53
SDQ_B54
SDQ_A53
SDQ_A54
AJ41
AF41
DATA_A54
DATA_A55
4
AF34
AD36
SDQ_B55
SDQ_B56
SDQ_A55
SDQ_A56
AF42
AD40
DATA_A56
DATA_A57
4
AC33
AA34
AA36
AD34
AF38
AC34
AA33
SDQ_B57
SDQ_B58
SDQ_B59
SDQ_B60
SDQ_B61
SDQ_B62
SDQ_B63
SDQ_A57
SDQ_A58
SDQ_A59
SDQ_A60
SDQ_A61
SDQ_A62
SDQ_A63
AB41
AA40
AE42
AE41
AB42
AD43
AC39
DATA_A63
DATA_A62
DATA_A61
DATA_A59
DATA_A58
DATA_A60
PLACE 0.1UF CAP CLOSE TO MCH
AY12
AW12
SCKE_B0
SCKE_B1
SCKE_A0
SCKE_A1
AY20
BC20
SCKE_A1
SCKE_A0
BB11
BA11
SCKE_B2
SCKE_B3
SCKE_A2
SCKE_A3
AY21
BA19
AR7
AW9
SDM_B0
SDM_A0
BA2
AR2
DQM_A1
DQM_A0
SDM_B1
SDM_A1
DQM_A2
AW13
AP23
AU37
AM37
AG39
SDM_B2
SDM_B3
SDM_B4
SDM_B5
SDM_A2
SDM_A3
SDM_A4
SDM_A5
AY9
AN18
AU43
AG40
AM43
DQM_A3
DQM_A4
DQM_A5
DQM_A6
SCKE_A1 10,11
SCKE_A0 10,11
3
AD38
SDM_B6
SDM_B7
SDQS_B0#
SDQS_B1#
SDQS_B2#
SDQS_B3#
SDQS_B4#
SDQS_B5#
SDQS_B6#
SDQS_B7#
SCLK_B0#
SCLK_B1#
SCLK_B2#
SCLK_B3#
SCLK_B4#
SCLK_B5#
SMRCOMPVOL
SMRCOMPVOH
SDM_A6
SDM_A7
AC40
DQM_A7
3
SCS_B0#
SCS_B1#
SCS_B2#
SCS_B3#
SRAS_B#
SCAS_B#
SWE_B#
SMA_B0
SMA_B1
SMA_B2
SMA_B3
SMA_B4
SMA_B5
SMA_B6
SMA_B7
SMA_B8
SMA_B9
SMA_B10
SMA_B11
SMA_B12
SMA_B13
SMA_B14
SODT_B0
SODT_B1
SODT_B2
SODT_B3
SBS_B0
SBS_B1
SBS_B2
SDQS_B0
SDQS_B1
SDQS_B2
SDQS_B3
SDQS_B4
SDQS_B5
SDQS_B6
SDQS_B7
SCLK_B0
SCLK_B1
SCLK_B2
SCLK_B3
SCLK_B4
SCLK_B5
SVREF
INTEL-G31
INTEL-G31
BB27
BB30
AY27
AY31
AW26
AW29
BA27
BB17
AY17
BA17
BC16
AW15
BA15
BB15
BA14
AY15
BB14
AW18
BB13
BA13
AY29
AY13
BA29
BA30
BB29
BB31
AY19
BA18
BC12
AV6
AU5
AR12
AP12
AP15
AR15
AT24
AU26
AW39
AU39
AL35
AL34
AG35
AG36
AC36
AC37
AV31
AW31
AU27
AT27
AV32
AT32
AU29
AR29
AV29
AW27
AN33
AP32
AM6
AM8
AM10
MCH_VREF_A
DDR_RCOMPVOL
DDR_RCOMPVOH
C155 C0.01u25X/2C155 C0.01u25X/2
R203
1KR1%/2
1KR1%/2
R205
R205
3.01KR1%/4
3.01KR1%/4
DDR_RCOMPVOH = 0.8 * VCC_DDR
DDR_RCOMPVOL = 0.2 * VCC_DDR
MSI
MSI
MSI
2
R155
R155
1KR1%/2
1KR1%/2
1KR1%/2
1KR1%/2
C442
C0.1U16Y2
C442
C0.1U16Y2
C438
C438
VCC_DDR
MS-7425
MS-7425
MS-7425
R209 1KR1%/2R209 1KR1%/2
C0.01u25X/2
C0.01u25X/2
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
G31 - Memory Signals
G31 - Memory Signals
G31 - Memory Signals
Date:
Thursday, June 05, 2008
Date:
Thursday, June 05, 2008
Date:
Thursday, June 05, 2008
2
R202
R202
VCC_DDR
C443
C443
C0.1U16Y2
C0.1U16Y2
Sheet of
Sheet of
Sheet of
1
C157
C157
X_C68p10N/4
X_C68p10N/4
732
732
732
1
0A
0A
0A
8
V_1P25_CORE
Close to MCH A.S.A.P
1
2
3
4
5
6
7
8
RN27 8P4R-4.7KR0402RN27 8P4R-4.7KR0402
EXP_EN: PCI Express* SDVO
D D
Concurrent Select
0 = Only SDVO or PCI Express
Operational
1 = SDVO and PCI Express
operating simultaneously via
PCIExpress* Graphics port
R211 0R/2R211 0R/2
PCIE static lane reversal
HIGH ATX(NORMAL)
BTX
LOW
V_1P25_CORE
C C
EXP_SLR
B B
I = 225mA
V_1P25_CORE
A A
I = 90.6mA
V_1P25_CORE
R98
R98
1KR1%/2
1KR1%/2
R84
R84
X_1KR1%/2
X_1KR1%/2
V_1P25_CORE
Route solder side
4mils width
V_1P5_MCH
R219 0R/6R219 0R/6
R220 0R/6R220 0R/6
L5 L10U_100mA_0805L5 L10U_100mA_0805
C10U10Y5
C10U10Y5
L6 L10U_100mA_0805L6 L10U_100mA_0805
C10U10Y5
C10U10Y5
8
DMI_ITP_MRP_2
DMI_ITP_MRP_3
DMI_ITP_MRP_0
DMI_ITP_MRP_1
V_1P25_CORE
R212
R212
X_1KR
X_1KR
EXP_EN
DMI_ITP_MRP_012
DMI_ITN_MRN_012
DMI_ITP_MRP_112
DMI_ITN_MRN_112
DMI_ITP_MRP_212
DMI_ITN_MRN_212
DMI_ITP_MRP_312
DMI_ITN_MRN_312
CK_PE_100M_MCH19
CK_PE_100M_MCH#19
SDVO_CTRL_DATA15
SDVO_CTRL_CLK15
MCH_BSEL0A19
MCH_BSEL1A19
MCH_BSEL2A19
R218 X_0R/2R218 X_0R/2
CP9
CP9
X_COPPER
X_COPPER
C182
C0.1U16Y2
C182
C0.1U16Y2
V_1P25_CORE
L10 X_80L4_30_1206L10 X_80L4_30_1206
CP10 X_COPPERCP10 X_COPPER
CP12 X_COPPERCP12 X_COPPER
C212
C212
C217
C217
SDVOB_INT+15
SDVOB_INT-15
SDVO_CTRL_DATA
SDVO_CTRL_CLK
V_3P3_DAC_FILTERED
C189
C0.1U16Y2
C189
C0.1U16Y2
VCCA_MPLL
C213
C213
C0.1U16Y2
C0.1U16Y2
VCCA_DPLLB
C218
C218
C0.1U16Y2
C0.1U16Y2
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
MCH_BSEL0A
MCH_BSEL1A
MCH_BSEL2A
EXP_SLR
EXP_EN
VCC_CL_PLL
VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
VCCD_CRT
VCCDQ_CRT
C59
C4.7U10Y5
C59
C4.7U10Y5
21
7
VCC3
7
V_1P25_CORE
U40C
U40C
F15
EXP_RXP0
G15
EXP_RXN0
K15
EXP_RXP1
J15
EXP_RXN1
F12
EXP_RXP2
E12
EXP_RXN2
J12
EXP_RXP3
H12
EXP_RXN3
J11
EXP_RXP4
H11
EXP_RXN4
F7
EXP_RXP5
E7
EXP_RXN5
E5
EXP_RXP6
F6
EXP_RXN6
C2
EXP_RXP7
D2
EXP_RXN7
G6
EXP_RXP8
G5
EXP_RXN8
L9
EXP_RXP9
L8
EXP_RXN9
M8
EXP_RXP10
M9
EXP_RXN10
M4
EXP_RXP11
L4
EXP_RXN11
M5
EXP_RXP12
M6
EXP_RXN12
R9
EXP_RXP13
R10
EXP_RXN13
T4
EXP_RXP14
R4
EXP_RXN14
R6
EXP_RXP15
R7
EXP_RXN15
W2
DMI_RXP0
V1
DMI_RXN0
Y8
DMI_RXP1
Y9
DMI_RXN1
AA7
DMI_RXP2
AA6
DMI_RXN2
AB3
DMI_RXP3
AA4
DMI_RXN3
B12
GCLKP
B13
GCLKN
G17
SDV0_CTRLDATA
E17
SDVO_CTRLCLK
G20
BSEL0
J20
BSEL1
J18
BSEL2
G18
MTYPE
E18
EXP_SLR
J17
EXP_EN
Y32
VCC_CL_PLL
C23
VCCA_HPLL
A24
VCCA_MPLL
A22
VCCA_DPLLA
C22
VCCA_DPLLB
B15
VCCA_EXPPLL
C17
VCCA_DAC_17
B16
VCCA_DAC_18
A16
VCCA_EXP_19
C21
VCCD_CRT_20
B21
VCCDQ_CRT_21
D16
VSS_1
B17
VCC33
INTEL-G31
INTEL-G31
V_1P25_PCIEXPRESS
C193
C10U10Y5
C193
C10U10Y5
C194
C0.1U16Y2
C194
C0.1U16Y2
AL26
VCC_CL_1
VCC_EXP_1
VCC_EXP_2
AD11
AD10
AL24
VCC_CL_2
VCC_EXP_3
AD9
AL23
AL21
AL20
AL18
AL17
AL15
AK30
VCC_CL_3
VCC_CL_4
VCC_CL_5
VCC_CL_6
VCC_CL_7
VCC_CL_8
VCC_EXP_4
VCC_EXP_5
VCC_EXP_6
VCC_EXP_7
VCC_EXP_8
VCC_EXP_9
AD8
AD7
AD6
AD5
AD4
AD2
AD1
I = 90.6mA
V_1P25_CORE
I = 67.9mA
V_1P25_CORE
6
AK29
AK27
AJ31
AG31
VCC_CL_9
VCC_CL_10
VCC_CL_11
VCC_CL_12
VCC_EXP_10
VCC_EXP_11
VCC_EXP_12
VCC_EXP_13
AE4
AC4
AC3
AC2
VCC_DDR
L10U_100mA_0805
L10U_100mA_0805
C10U10Y5
C10U10Y5
L10U_100mA_0805
L10U_100mA_0805
C10U10Y5
C10U10Y5
6
AF31
AD32
AC32
AA32
VCC_CL_13
VCC_CL_14
VCC_CL_15
VCC_CL_16
VCC_EXP_14
VCC_EXP_15
VCC_EXP_16
AE3
AE2
BC39
L7
L7
C214
C214
L11
L11
C230
C230
AJ30
AJ29
AJ27
VCC_CL_17
VCC_CL_18
VCC_CL_19
VCCSM_1
VCCSM_2
VCCSM_3
BC34
BC30
BC26
AG30
AG29
AG27
VCC_CL_20
VCC_CL_21
VCC_CL_22
VCCSM_4
VCCSM_5
VCCSM_6
BC22
BC18
BC14
VCCA_DPLLA
C215
C215
C0.1U16Y2
C0.1U16Y2
C279
C279
C0.1U16Y2
C0.1U16Y2
AG26
AF30
AF29
VCC_CL_23
VCC_CL_24
VCC_CL_25
VCC_CL_26
VCCSM_7
VCCSM_8
VCCSM_9
VCCSM_10
BB39
BB37
BB32
VCCA_HPLL
AF27
AD30
AD29
VCC_CL_27
VCC_CL_28
VCCSM_11
VCCSM_12
BB28
BB26
BB24
5
AC30
AC29
AL12
AL11
VCC_CL_29
VCC_CL_30
VCC_CL_31
VCC_CL_32
VCC_CL_33
VCCSM_13
VCCSM_14
VCCSM_15
VCCSM_16
VCCSM_17
BB20
BB18
BB16
BB12
I = 71.6mA
V_1P25_CORE
I = 0.36mA
VCC3
5
AL10
AL9
AL8
AL7
AL6
AL5
VCC_CL_34
VCC_CL_35
VCC_CL_36
VCC_CL_37
VCC_CL_38
VCC_CL_39
VCCSM_18
VCCSM_19
VCCSM_20
VCCSM_21
VCCSM_22
AY32
AV26
AV18
AW24
AW20
C191 C1u16Y/6C191 C1u16Y/6
L9 0.1u50mAL9 0.1u50mA
C10U10Y5
C10U10Y5
AL4
AL3
AL2
AK26
AK24
AK23
VCC_CL_40
VCC_CL_41
VCC_CL_42
VCC_CL_43
VCC_CL_44
VCC_SMCLK_4
VCC_SMCLK_3
VCC_SMCLK_2
VCC_SMCLK_1
BA43
BB42
AY42
BA42
BB41
V_CKDDR
L13
L13
L10U_100mA_0805
L10U_100mA_0805
C209
C209
C10U10Y5
C10U10Y5
21
C450
C450
AK21
AK20
AK18
AK17
AK15
AK3
AK2
AK1
AJ13
VCC_CL_45
VCC_CL_46
VCC_CL_47
VCC_CL_48
VCC_CL_49
VCC_CL_50
VCC_CL_51
VCC_CL_52
VCC_CL_53
VCC_SMCLK_5
RESERVED_2
RESERVED_4
RESERVED_5
RESERVED_6
RESERVED_3
RESERVED_1
H18
BB2
BB19
AN21
AN32
AM31
AW42
L12 L10U_100mA_0805L12 L10U_100mA_0805
R349 X_1R1%/6R349 X_1R1%/6
R357 X_1R1%/6R357 X_1R1%/6
VCCA_GPLL
C0.1U16Y2
C0.1U16Y2
V_3P3_DAC_FILTERED
C446
C0.1U16Y2
C446
C0.1U16Y2
4
AD31
AC31
AA31
Y31
VCC_CL_54
VCC_CL_55
VCC_CL_56
VCC_CL_57
VCC_CL_58
RESERVED_7
RESERVED_8
RESERVED_9
RESERVED_10
RESERVED_11
AL31
AF32
AG32
AM21
21
C445
C445
C447
C447
C0.01u25X/2
C0.01u25X/2
4
AJ26
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
VCC_CL_59
VCC_CL_60
VCC_CL_61
VCC_CL_62
VCC_CL_63
VCC_CL_64
VCC_CL_65
RESERVED_12
RESERVED_13
RESERVED_14
RESERVED_15
RESERVED_16
RESERVED_17
RESERVED_18
Y12
U30
U31
AA9
AJ32
AA10
AA11
VCC_DDR
C195 X_C10U10Y5C195 X_C10U10Y5
3
AJ15
AJ14
AA30
AA29
Y30
Y29
V30
V29
U29
U27
AL13
AK14
AL29
AL27
SDVOB_RP
D11
EXP_TXP0
EXP_TXN0
EXP_TXP1
VCC_CL_66
VCC_CL_67
VCC_CL_68
VCC_CL_69
VCC_CL_70
VCC_CL_71
VCC_CL_72
VCC_CL_73
VCC_CL_74
RESERVED_25
RESERVED_21
RESERVED_22
RESERVED_23
RESERVED_24
U12
U11
R12
R13
AP21
RESERVED_27
RESERVED_26
F13
V31
T16T16
RESERVED_19
RESERVED_20
R29
R30
VCCA_HPLL ---- >50mA ; Min Vout -- 1.121V
VCCA_MPLL ---- >130mA ; Min Vout -- 1.128V
VCCA_DPLLA --- >80mA ; Min Vout -- 1.132V
VCCA_DPLLB --- >80mA ; Min Vout -- 1.131V
VCCA_DAC ----- 70mA ; Min Vout -- 3.14V
VCCD_CRT ----- 20mA ; Min Vout -- 1.425V
VCCDQ_CRT ---- 0.5mA ; Min Vout -- 1.425V
VCCA_EXPPLL -- 50mA ; Min Vout -- 1.129V
VCC_SMCLK ---- 250mA
BSEL
2
0
1
0
0
0
0
1
EXP_TXN1
VCC_CL_75
VCC_CL_76
VCC_CL_77
VCC_CL_78
VCC_CL_79
EXP_TXP2
EXP_TXN2
EXP_TXP3
EXP_TXN3
EXP_TXP4
EXP_TXN4
EXP_TXP5
EXP_TXN5
EXP_TXP6
EXP_TXN6
EXP_TXP7
EXP_TXN7
EXP_TXP8
EXP_TXN8
EXP_TXP9
EXP_TXN9
EXP_TXP10
EXP_TXN10
EXP_TXP11
EXP_TXN11
EXP_TXP12
EXP_TXN12
EXP_TXP13
EXP_TXN13
EXP_TXP14
EXP_TXN14
EXP_TXP15
EXP_TXN15
DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3
EXP_COMPO
EXP_COMPI
DDC_DATA
DDC_CLK
DREFCLKP
DREFCLKN
CL_PWROK
CL_RST#
CL_VERF
CL_DATA
ALLZTEST
XORTEST
TEST2
TEST1
TEST0
RESERVED_28
A43
BC1
AA39
BC43
T19T19
T18T18
T17T17
TABLE
PSB FREQUENCY
200 MHZ (800)1
133 MHZ (533)
3
HSYNC
VSYNC
GREEN
GREEN#
REFSET
CL_CLK
TESTIN#
RED
BLUE
RED#
BLUE#
D12
B11
A10
C10
D9
B9
B7
D7
D6
B5
B6
B3
B4
F2
E2
F4
G4
J4
K3
L2
K1
N2
M2
P3
N4
R2
P1
U2
T2
V3
U4
V7
V6
W4
Y4
AC8
AC9
Y2
AA2
AC11
AC12
C15
D15
B18
C19
B20
C18
D19
D20
L13
M13
C14
D13
A20
AM15
AA12
AM5
AD13
AD12
K20
F20
A14
SDVOB_RN
SDVOB_GP
SDVOB_GN
SDVOB_BP
SDVOB_BN
SDVOB_CP
SDVOB_CN
C160 C0.1U16Y2C160 C0.1U16Y2
C161 C0.1U16Y2C161 C0.1U16Y2
C444 C0.1U16Y2C444 C0.1U16Y2
C164 C0.1U16Y2C164 C0.1U16Y2
C165 C0.1U16Y2C165 C0.1U16Y2
C167 C0.1U16Y2C167 C0.1U16Y2
C168 C0.1U16Y2C168 C0.1U16Y2
C172 C0.1U16Y2C172 C0.1U16Y2
GRCOMP
HSYNC
VSYNC
VGA_RED
VGA_GREEN
VGA_BLUE
REFSET
MCH_CLPWROK
CL_RST#
CL_VREF_MCH
2
C163 C0.1U16Y2C163 C0.1U16Y2
C174 C0.1U16Y2C174 C0.1U16Y2
C206 C0.1U16Y2C206 C0.1U16Y2
C211 C0.1U16Y2C211 C0.1U16Y2
C236 C0.1U16Y2C236 C0.1U16Y2
C238 C0.1U16Y2C238 C0.1U16Y2
C239 C0.1U16Y2C239 C0.1U16Y2
C240 C0.1U16Y2C240 C0.1U16Y2
Close to MCH
DMI_MTP_IRP_0 12
DMI_MTN_IRN_0 12
DMI_MTP_IRP_1 12
DMI_MTN_IRN_1 12
DMI_MTP_IRP_2 12
DMI_MTN_IRN_2 12
DMI_MTP_IRP_3 12
DMI_MTN_IRN_3 12
R210 24.9R1%/4R210 24.9R1%/4
MCH_DDC_DATA
MCH_DDC_CLK
CK_96M_DREF
CK_96M_DREF#
R221 1.3KR1%/4R221 1.3KR1%/4
T13T13
T14T14
T15T15
V_1P25_PCIEXPRESS
HSYNC 26
VSYNC 26
VGA_RED 26
VGA_GREEN 26
VGA_BLUE 26
MCH_DDC_DATA 26
MCH_DDC_CLK 26
CK_96M_DREF 19
CK_96M_DREF# 19
R273 0R/2R273 0R/2
C178
C178
C10p25N/4
C10p25N/4
MCH CORE DECOUPLING
PLTRST# 6,12,17
R276
R276
1.65KR1%/4
1.65KR1%/4
CL_RST# CL_VREF_MCH
C196
C196
R278
R278
X_C0.01u25X/2
X_C0.01u25X/2
1KR/2
1KR/2
CL_VREF_MCH = 0.352V (FOR NOW)
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Date:
Date:
2
MCH CORE DECOUPLING
V_1P25_CORE
SDVOB_R+ 15
SDVOB_R- 15
SDVOB_G+ 15
SDVOB_G- 15
SDVOB_B+ 15
SDVOB_B- 15
SDVOB_C+ 15
SDVOB_C- 15
CHIP_PWGD 6,13,24
V_1P25_CORE
R277
R277
1KR/2
1KR/2
C199
MS-7425
MS-7425
MS-7425
C199
C0.01u25X/2
C0.01u25X/2
R358
R358
392R1%/4
392R1%/4
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
G31-CPU Signals
G31-CPU Signals
G31-CPU Signals
Thursday, June 05, 2008
Thursday, June 05, 2008
Thursday, June 05, 2008
1
C424
C424
C10U10Y5
C10U10Y5
C425
C425
C10U10Y5
C10U10Y5
C87
C87
C0.1U16Y2
C0.1U16Y2
C426
C426
C10U10Y5
C10U10Y5
C427
C427
C0.1U16Y2
C0.1U16Y2
C428
C428
C0.1U16Y2
C0.1U16Y2
C429
C429
C10U10Y5
C10U10Y5
C430
C430
C10U10Y5
C10U10Y5
C431
C431
C0.1U16Y2
C0.1U16Y2
Sheet of
Sheet of
Sheet of
832
832
832
1
0A
0A
0A
5
4
3
2
1
BC42
NC_2
BC2
NC_3
BB43
NC_4
BB1
NC_5
B43
NC_6
B42
T21T21
NC_7
A42
NC_8B2NC_9
M42
A41
C43
R21
W20
W22
W24
AA18
AC18
AE18
AE20
AE22
AE24
AF19
AF21
AF23
AY40
BA1
BC3
VSS_278
VSS_277
VSS_276
VSS_275
VSS_274
VSS_273
BC41
VSS_272
VSS_271
M11
L12
VSS
VCC
VSS_293A3VSS_292A5VSS_291
VSS_290C1VSS_289
VSS_288E1VSS_287
VSS_286
VSS_285
VSS_284
VSS_283
VSS_282
VSS_281
VSS_280
VSS_279
M33
M35
VSS_270
VSS_269
M37
VSS_267
VSS_268
N10
VSS_266N5VSS_265N7VSS_264
VSS_263
VSS_262
VSS_261
VSS_260
VSS_259
VSS_258
VSS_257
VSS_256
VSS_255
VSS_254
VSS_253
VSS_252
VSS_251
VSS_250
VSS_249
VSS_248
VSS_247
VSS_246
VSS_245
VSS_244
VSS_243
VSS_242
VSS_241
VSS_240
VSS_239
VSS_238
VSS_237
VSS_236
VSS_235
VSS_234
VSS_233
VSS_232
VSS_231
VSS_230
VSS_229
VSS_228
VSS_227
VSS_226
VSS_225
VSS_224
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199
VSS_198
VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189
VSS_188
N13
N21
N27
N31
N33
N36
P2
P17
P18
P21
P30
P43
R3
R5
R8
R11
R31
R33
R36
T1
T42
U5
U7
U8
U35
U38
V2
V5
V8
V11
V32
V34
V37
V39
V43
W3
Y1
Y5
Y7
Y10
Y19
Y21
Y23
Y25
Y33
Y35
Y37
Y42
AA5
AA8
AA20
AA22
AA24
AA35
AA38
AB1
AB2
AB19
AB21
AB23
AB25
AB43
AC5
AC7
AC10
AC20
AC22
AC24
AC35
AC38
AD19
AD21
AD23
AD25
AD33
AD35
Place close to GMCH
VCC_DDR
MCH MEMORY DECOUPLING
V_1P25_CORE
C449
C449
C2.2u6.3Y/6
C2.2u6.3Y/6
C451
C451
C2.2u6.3Y/6
C2.2u6.3Y/6
C420
C420
C2.2u6.3Y/6
C2.2u6.3Y/6
C421
C421
C2.2u6.3Y/6
C2.2u6.3Y/6
C422
C422
C2.2u6.3Y/6
C2.2u6.3Y/6
C423
C423
C2.2u6.3Y/6
C2.2u6.3Y/6
C432
C432
C10U10Y5
C10U10Y5
C433
C433
C10U10Y5
C10U10Y5
C434
C434
C10U10Y5
C10U10Y5
C435
C435
C10U10Y5
C10U10Y5
C98
C98
C10U10Y5
C10U10Y5
T20T20
V_1P25_CORE
AA17
AA15
AA14
Y27
Y26
Y18
Y17
Y15
Y14
W27
W26
W25
W23
W21
W19
W18
W17
V27
V26
V25
V24
V23
V22
V21
V20
V19
V18
V17
V15
V14
U26
U25
U24
U23
U22
U21
U20
U19
U18
U17
U15
U14
R20
R18
R17
R15
R14
P15
P14
AG24
AG23
VCC_168
VCC_169
VCC_170
VCC_171
VCC_172
VCC_173
AG22
VCC_174
U40D
U40D
D D
C C
B B
BC37
BC32
BC28
BC24
BC10
AY41
AW43
AW41
AW1
AV37
AV35
AV27
AV23
AV21
AV17
AV11
AU42
AU38
AU32
AU24
AU20
AT31
AT29
AT15
AT13
AT12
AR38
AR33
AR32
AR27
AR26
AR23
AR21
AR20
AR17
AP43
AP24
AP18
AN38
AN31
AN29
AN24
AN23
AN20
AN15
AN13
AN12
AN11
AM42
AM40
AM36
AM33
AM29
AM24
AM23
AM20
AM11
AM9
AM7
AM4
AM2
AM1
AL36
AL33
AK43
BC5
BB7
AY4
AV9
AV7
AU6
AU2
AR9
AR6
AP1
AN4
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VCC_123
VCC_124
VCC_125
VCC_126
VCC_127
VCC_128
VCC_129
VCC_130
VCC_131
VCC_132
VCC_133
VCC_134
VCC_135
VCC_136
VCC_137
VCC_138
VCC_139
VCC_140
VCC_141
VCC_142
VCC_143
VCC_144
VCC_145
VCC_146
VCC_147
VCC_148
VCC_149
VCC_150
VCC_151
VCC_152
VCC_153
VCC_154
VCC_155
VCC_156
VCC_157
VCC_158
VCC_159
VCC_160
VCC_161
VCC_162
VCC_163
VCC_164
VCC_165
VCC_166
VCC_167
M20
L17
N17
N18
N15
RESERVED_29
RESERVED_30
RESERVED_31
RESERVED_32
L15
RESERVED_33
RESERVED_34
L18
M18
F17
K17
RESERVED_35
RESERVED_36
RESERVED_37
RESERVED_38
N20
NC_1
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96M7VSS_97M1VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105L7VSS_106L5VSS_107L3VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114K2VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120J9VSS_121J7VSS_122J5VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137G9VSS_138G7VSS_139G1VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145F3VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154E9VSS_155E3VSS_156
VSS_157
VSS_158
VSS_159
VSS_160D3VSS_161
VSS_162
VSS_163C6VSS_164C5VSS_165C4VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180A7VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
INTEL-G31
J38
J35
J32
J27
L33
L32
L31
L29
L21
L20
L11
K43
K26
K21
K18
AF9
AF8
AF7
AF6
M27
M21
M17
M15
AJ39
AJ36
AJ33
AF43
AF37
AF36
AF10
AH42
AG37
AG34
A A
5
M10
K13
4
J21
K12
H31
H29
H21
H20
H17
H15
H13
G42
G38
G32
G21
F37
F35
F27
F21
F18
E43
E32
E24
E21
E20
E15
E13
E11
D40
D31
D21
G13
G12
G11
3
D17
B37
B32
B31
B26
B23
B22
B19
B14
B10
A39
A34
A26
A18
C26
C11
A12
AF5
AF3
INTEL-G31
AF2
AF1
AD42
AD39
AD37
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7425
MS-7425
G31 - GND
G31 - GND
G31 - GND
MS-7425
1
Sheet of
Sheet of
Sheet of
932
932
932
0A
0A
0A
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, June 05, 2008
Date:
Thursday, June 05, 2008
Date:
2
Thursday, June 05, 2008
8
7
6
5
4
3
2
1
172
VDDQ5
VSS
166
187
VDDQ6
VSS
169
184
VDDQ7
VSS
198
VCC3VCC_DDR
189
67
178
238
161
162
167
168
CB042CB143CB248CB349CB4
CB5
CB6
CB7
DQS_A0
7
219
VSS
VSS
222
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2#(DU)
VSS
VSS
VSS
225
228
231
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK2(DU)
SCL
SDA
VREF
SA0
SA1
SA2
VSS
VSS
DDRII-240_GREEN
DDRII-240_GREEN
234
237
DQS_A#0
6
DQS_A1
16
DQS_A#1
15
DQS_A2
28
DQS_A#2
27
DQS_A3
37
DQS_A#3
36
DQS_A4
84
DQS_A#4
83
DQS_A5
93
DQS_A#5
92
DQS_A6
105
DQS_A#6
104
DQS_A7
114
DQS_A#7
113
46
45
MAA_A0
188
MAA_A1
183
MAA_A2
63
MAA_A3
182
MAA_A4
61
MAA_A5
60
MAA_A6
180
MAA_A7
58
MAA_A8
179
MAA_A9
177
MAA_A10
70
MAA_A11
57
MAA_A12
176
MAA_A13
196
MAA_A14
174
173
SBS_A2
54
SBS_A1
190
SBS_A0
71
WE_A#
73
CAS_A#
74
RAS_A#
192
DQM_A0
125
126
DQM_A1
134
135
DQM_A2
146
147
DQM_A3
155
156
DQM_A4
202
203
DQM_A5
211
212
DQM_A6
223
224
DQM_A7
232
233
164
165
ODT_A0
195
ODT_A1
77
SCKE_A0
52
SCKE_A1
171
SCS_A#0
193
SCS_A#1
76
185
186
137
138
220
221
120
119
DIMM_VREF_A DIMM_VREF_A
1
239
240
101
VDDQ8
VDDQ9
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
201
204
207
210
213
216
DQS_A0 7
DQS_A#0 7
DQS_A1 7
DQS_A#1 7
DQS_A2 7
DQS_A#2 7
DQS_A3 7
DQS_A#3 7
DQS_A4 7
DQS_A#4 7
DQS_A5 7
DQS_A#5 7
DQS_A6 7
DQS_A#6 7
DQS_A7 7
DQS_A#7 7
SBS_A2 7,11
SBS_A1 7,11
SBS_A0 7,11
WE_A# 7,11
CAS_A# 7,11
RAS_A# 7,11
ODT_A0 7,11
ODT_A1 7,11
SCKE_A0 7,11
SCKE_A1 7,11
SCS_A#0 7,11
SCS_A#1 7,11
P_DDR_A0
N_DDR_A0
P_DDR_A1
N_DDR_A1
P_DDR_A2
N_DDR_A2
SMBCLK_DDR
SMBDATA_DDR
C210
C210
C0.1U16Y2
C0.1U16Y2
PLACE CLOSE TO DIMM PIN
ADDRESS: 000
MAA_A[0..14] 7,11
DQM_A[0..7] 7
P_DDR_A0 7
N_DDR_A0 7
P_DDR_A1 7
N_DDR_A1 7
P_DDR_A2 7
N_DDR_A2 7
VCC_DDR
R200 1KR1%/2R200 1KR1%/2
R197
R197
1KR1%/2
1KR1%/2
DDR2 DIMM 1
DIMM1
DATA_A[0..63]7
D D
C C
B B
A A
DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
DIMM1
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
3
DQ0
4
DQ1
9
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
2
VSS
5
VSS
8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
68
19
55
102
NC2
NC1
RC118RC0
NC/TEST
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
115
75
VDD051VDD156VDD262VDD372VDD478VDD5
VDD3
VSS
VSS
VSS
VSS
VSS
VSS
118
121
124
127
130
133
191
194
181
175
170
197
VDD6
VDD7
VDD8
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VDDQ469VDDQ7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
136
139
142
145
148
151
154
157
160
163
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
SMBCLK_DDR
SMBDATA_DDR
8
7
R69 22R/2R69 22R/2
R71 22R/2R71 22R/2
6
SMBCLK_ISO 13,16,19,24,27
SMBDATA_ISO 13,16,19,24,27
5
MS-7425
MS-7425
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, June 05, 2008
Date:
Thursday, June 05, 2008
Date:
4
3
Thursday, June 05, 2008
2
MS-7425
DDR II DIMM A & B
DDR II DIMM A & B
DDR II DIMM A & B
Sheet of
Sheet of
Sheet of
10 32
10 32
10 32
1
0A
0A
0A
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