MSI MS-7423 Schematic 20080813_1

1

3~5

1
2

Asteroid-Z

COVER SHEET
BLOCK DIAGRAM
Intel LGA775-CPU

MS-7423N1

CLOCK Generator-IDTCV184-2
Eaglelake-Q
DDR3 DIMM 1 & 2
CH7308 - LVDS Interface
ICH10
MINI PCIE Slot, SATA Slots
LAN-Boazman
TPM/FAN/LPC Debug Port
HD AUDIO ALC262
SIO-SCH5617

A A

LPT/ COM/PS2
VGA CONNECTOR
USB CONNECTORS 24
ACPI CONTROLLER MS7
DIMM/GMCH/AMT POWER
iAMTCL_POWER

6

7~11

12
13

14~16

17
18
19
20
21
22
23

25
26
27

Version 10

CPU:

Wolfdate, Conroe, Conroe-1M,
; TDP max=65W, FSB 1333/1066/800

System Chipset:

Intel Q45 (North Bridge)
Intel ICH10DO (South Bridge)

On Board Chipset:

BIOS -- SPI FLASH 32MB
HD AUDIO Codec -- ALC262
LPC Super I/O -- SMSC SCH5617
LAN --INTEL 82567LM Boazman
Clock GEN-IDTCV184-2
TPM - SLB9635 TT1.2
PCMCIA - Ricon 5C812/PCI

Expansion Slots:

Half mini PCIE SLOT * 1

Intersil 6334 3Phase
ATX/Front Panel
Card Reader Ricon 5C812/PCI/CARDBUS SLOT
Manual Parts
GPIO MAP
POWER MAP
POWEROK MAP
RESET MAP

28
29

30~31

32
33
34
35
36

37 ~ 38HISTORY

Main Memory:

DDR III * 2 - 1066 w/o ECC

Intersil PWM:

Controller: Intersil 6334 3Phase

1

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

COVER SHEET

COVER SHEET

COVER SHEET

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

MICRO-START INT'L CO.,LTD.

MS-7423

MS-7423

MS-7423

10

10

1 38Thursday, June 19, 2008

1 38Thursday, June 19, 2008

1 38Thursday, June 19, 2008

10

1

NEC Asteroid-Z Block Diagram

Internal
Connector

VRM 11
Intersil 6334
3-Phase PWM

Intel LGA775 Processor

MS7

FSB

2 DDR III

CLOCK
GENERATOR
IDTCV184-2

DIMM

SIDE and UNDER CHASSIS I/O

LVDS
Connector

Intel NB
Q45

DDR III

Modules

Analog
Video
Out

DMI

PCIE

MINI PCIE

PCI

Card Controller

Card BUS

Ricoh 5C812 TYPE II x 2

Intel SB

2 SATA

A A

Connector

SERIAL ATA BUS

ICH10DO

LPC Bus

PCI-E

HD AUDIO

Realtek

LAN

Intel Boazman

Gigabit LAN
Connector

Line-In
MIC-In

ALC262

Line-Out

Floopy

Panel
Inverter
Connector

Front
Panel

Brightness Control

TPM 1.2

SPI FLASH

INTERNAL
SPEAKER

LPC SIO

SMSC SCH5617

USB

1

TI TPA0202

Line-Out Behavior Define

Line-Out

Mode 1

Mode 2

Plug-In

Plug-Out

Front
Panel

Internal
Speaker

Off

On

USB2.0
USB Port0~3

USB Port4~5

Serial

Parallel

PS/2

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

MICRO-START INT'L CO.,LTD.

MS-7423 10

MS-7423 10

MS-7423 10

2 38Thursday, June 19, 2008

2 38Thursday, June 19, 2008

2 38Thursday, June 19, 2008

5

4

3

2

1

CPU SIGNAL BLOCK

H_A#[3..35]7

D D

U7A

H_DBI#[0..3]7

H_IERR#4

H_FERR#4,15

H_STPCLK#15

H_INIT#15

H_DBSY#7
H_DRDY#7
H_TRDY#7

H_ADS#7
H_LOCK#7
H_BNR#7
H_HIT#7

C C

VTT_OUT_LEFT H_TEST_C9

VTT_OUT_RIGHT

B B

H_HITM#7

H_BPRI#7
H_DEFER#7

TRMTRIP#4,15

H_PROCHOT#4,21,28

H_IGNNE#15
ICH_H_SMI#15

H_A20M#15
H_SLP#8,21

R132 51R0402R132 51R0402

R121 51R0402R121 51R0402
R133 X_62R0402R133 X_62R0402

H_FSBSEL04,6,8
H_FSBSEL14,6,8
H_FSBSEL24,6,8

H_PWRGD4,15

H_CPURST#4,7,8,21

H_D#[0..63]7

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

CPU_GTLREF1

H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK

H_SLP#

CPU_GTLREF0

H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54

A8
G11
D19
C20

F2
AB2
AB3

R3

M3
AD3

P3

H4

B2

C1

E3

D2

C3

C2

D4

E4

G8

G7
AD1

AF1
AC1
AG1
AE1
AL1
AK1

M2
AE8
AL2

N2

P2

K3

L2
AH2

N5
AE6

C9
G10
D16
A20

Y1

V2
AA2

G29
H30
G30

N1
G23
B22

A22
A19
B19
B21
C21
B18
A17
B16
C18

U7A

DBI0#
DBI1#
DBI2#
DBI3#

GTLREF2
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#

DBSY#
DRDY#
TRDY#

ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#

TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13

RSVD
RESERVED0
RESERVED1
RESERVED2
GTLREF3
RESERVED4
RESERVED5

BOOTSELECT
LL_ID0
LL_ID1

BSEL0
BSEL1
BSEL2

PWRGOOD
RESET#
D63#

D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#

H_D#53

B15

D53#

D52#

C14

H_D#52

D51#

A14

C15

H_D#51

H_D#50

D50#

D49#

D17

H_D#49

H_A#35

H_A#34

AJ6

AJ5

A35#

D48#

D20

G22

H_D#47

H_D#48

H_A#33

AH5

A34#

A33#

D47#

D46#

D22

H_D#46

H_A#32

H_A#31

AH4

AG5

A32#

D45#

E22

G21

H_D#45

H_D#44

H_A#30

AG4

A31#

A30#

D44#

D43#

F21

H_D#43

H_A#28

H_A#29

AG6

AF4

A29#

D42#

F20

E21

H_D#41

H_D#42

H_A#26

H_A#27

AF5

A28#

A27#

D41#

D40#

E19

H_D#40

H_D#39

AB4

A26#

D39#

E18

H_A#25

H_A#24

AC5

AB5

A25#

D38#

F18

F17

H_D#37

H_D#38

H_A#23

AA5

A24#

A23#

D37#

D36#

G17

H_D#36

H_A#22

H_A#21

AD6

AA4

A22#

D35#

E16

G18

H_D#34

H_D#35

H_A#19

H_A#20

A21#

A20#Y4A19#Y6A18#W6A17#

D34#

D33#

D32#

E15

G16

H_D#33

H_D#32

H_A#18

H_A#17

AB6

D31#

F15

G15

H_D#30

H_D#31

H_A#13

H_A#16

H_A#12

H_A#14

H_A#15

A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#

D30#

D29#

D28#

D27#

D26#

D25#

F14

E13

D13

G14

G13

H_D#28

H_D#27

H_D#29

H_D#25

H_D#26

H_A#10

H_A#8

H_A#9

U6

A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#

D24#

D23#

D22#

F12

F11

D10

H_D#23

H_D#22

H_D#21

H_D#24 H_A#11

H_A#6

H_A#4

H_A#5

H_A#7

D21#

D20#D7D19#E9D18#F9D17#F8D16#G9D15#

E10

H_D#17

H_D#19

H_D#18

H_D#20

H_A#3

L5

D11

H_D#15

H_D#16

AC2

DBR#

D14#

B12

C12

H_D#13

H_D#14

AN3

AN4

VCC_SENSE

D13#

D12#D8D11#

C11

H_D#11

H_D#12

VID7

AN5

AN6

AJ3

AK3

AM7

RSVD

ITP_CLK1

ITP_CLK0

VSS_SENSE

VSS_MB_REGULATION

VCC_MB_REGULATION

D10#

D9#

D8#

D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#

B10

A11

A10

H_D#7

H_D#9

H_D#6

H_D#4

H_D#8

H_D#5

H_D#10

VID6

AM5

VID6#

H_D#3

VID5

AL4

VID5#

H_D#2

VID3

VID4

AK4

AL6

VID4#

VID_SELECT

GTLREF_SEL

CS_GTLREF

FORCEPH

LINT1/NMI

LINT0/INTR

B4

H_D#0

H_D#1

VID[0..7] 28

VID0

VID1

VID2

AM3

AL5

AM2

VID3#

VID2#

VID1#

VID0#

AN7
H1

GTLREF0

H2

GTLREF1

H29
E24
AG3

BPM5#

AF2

BPM4#

AG2

BPM3#

AD2

BPM2#

AJ1

BPM1#

AJ2

BPM0#

G5

PCREQ#

J6

REQ4#

K6

REQ3#

M6

REQ2#

J5

REQ1#

K4

REQ0#

W2

TESTHI12

P1

TESTHI11

H5

TESTHI10

G4

TESTHI9

G3

TESTHI8

F24

TESTHI7

G24

TESTHI6

G26

TESTHI5

G27

TESTHI4

G25

TESTHI3

F25

TESTHI2

W3

TESTHI1

F26

TESTHI0

AK6
G6

RSVD

G28

BCLK1#

F28

BCLK0#

A3

RS2#

F5

RS1#

B3

RS0#

U3

AP1#

U2

AP0#

F3

BR0#

T2

COMP5

J2

COMP4

R1

COMP3

G2

COMP2

T1

COMP1

A13

COMP0

J17

DP3#

H16

DP2#

H15

DP1#

J16

DP0#

AD5

ADSTB1#

R6

ADSTB0#

C17

DSTBP3#

G19

DSTBP2#

E12

DSTBP1#

B9

DSTBP0#

A16

DSTBN3#

G20

DSTBN2#

G12

DSTBN1#

C8

DSTBN0#

L1
K1

ZIF-SOCK775-15u-in

ZIF-SOCK775-15u-in

VCC_VRM_SENSE 28

VSS_VRM_SENSE 28

R104 680R0402-1R104 680R0402-1

CPU_GTLREF0
CPU_GTLREF1
TP_GTLREF_SEL

R95 X_0R0402R95 X_0R0402

H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0

PECI
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0

H_TESTHI12
DPSLP#
H_TESTHI10
H_TESTHI9
H_TESTHI8

H_TESTHI2_7
H_TESTHI1
H_TESTHI0

H_RS#2
H_RS#1
H_RS#0

H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0

TP7TP7
TP8TP8
TP10TP10
TP9TP9

VTT_OUT_RIGHT

CPU_GTLREF0 4
CPU_GTLREF1 4

MCH_GTLREF_CPU 7

R208 X_0R0402R208 X_0R0402
R122 X_0R0402R122 X_0R0402
R129 X_0R0402R129 X_0R0402
R189 X_0R0402R189 X_0R0402

PECI 21

H_REQ#[0..4] 7

H_TESTHI12 5

DPSLP# 15

R58 51R0402R58 51R0402
R68 51R0402R68 51R0402

R105 X_130R1%0402R105 X_130R1%0402

R182 X_62R0402R182 X_62R0402

H_FORCE# 28
CK_H_CPU# 6
CK_H_CPU 6

H_RS#[0..2] 7

TP11TP11
TP12TP12

R136 X_49.9R1%0603R136 X_49.9R1%0603
R170 X_49.9R1%0603R170 X_49.9R1%0603
R146 49.9R1%0402R146 49.9R1%0402
R194 49.9R1%0402R194 49.9R1%0402
R144 49.9R1%0603R144 49.9R1%0603
R143 49.9R1%0603R143 49.9R1%0603

H_ADSTB#1 7
H_ADSTB#0 7
H_DSTBP#3 7
H_DSTBP#2 7
H_DSTBP#1 7
H_DSTBP#0 7
H_DSTBN#3 7
H_DSTBN#2 7
H_DSTBN#1 7
H_DSTBN#0 7
H_NMI 15
H_INTR 15

TP3TP3

H_TESTHI8
H_TESTHI9
H_TEST_C9

H_TESTHI8
H_TESTHI9
H_TESTHI10
DPSLP#
H_SLP#
H_TESTHI1

TP_CPU_G1 5

R147 51R0402R147 51R0402
R197 51R0402R197 51R0402
R204 51R0402R204 51R0402

R159 51R0402R159 51R0402
R154 X_51R0402R154 X_51R0402
R164 X_51R0402R164 X_51R0402

R127 51R0402R127 51R0402

V_FSB_VTT

Power name change from V_1P1_CORE
to V_FSB_VTT for 0C

VTT_OUT_RIGHT 4,5
VTT_OUT_LEFT 4,5

R152 take out, PM_DPRSTR_N
connect directly to COMP5 for 0B

H_BR#0 4,7

PM_DPRSTR_N 8,15

VTT_OUT_LEFT 4,5

C162

C162
X_C0.1U16Y0402

X_C0.1U16Y0402

VTT_OUT_LEFT

RN3 8P4R-51R0402RN3 8P4R-51R0402

1

2

3

4

5

6

7

8

R118 51R0402R118 51R0402

VTT_OUT_RIGHT

C115 C0.1U16Y0402C115 C0.1U16Y0402
C134 C0.1U16Y0402C134 C0.1U16Y0402

R110 51R0402R110 51R0402
R117 62R0402R117 62R0402
R128 62R0402R128 62R0402

R113 X_62R0402R113 X_62R0402
R116 62R0402R116 62R0402
R115 62R0402R115 62R0402

PLACE BPM TERMINATION NEAR CPU

RN4

RN4

8P4R-680R-LF

8P4R-680R-LF

VID2

1

VID4
VID0
VID1

VID7
VID6
VID3
VID5

2

3

4

5

6

7

8

RN2

RN2

8P4R-680R-LF

8P4R-680R-LF

1

2

3

4

5

6

7

8

(a) R109, R111 not mount for 0B

(b) R109 and R111 remove because they
unused for 1.0

H_BPM#2
H_BPM#3
H_BPM#0
H_BPM#1
H_BPM#4
H_BPM#5
H_TDI
H_TMS

VTT_OUT_RIGHT

H_TDO

H_TRST#

H_TCK

A A

BSEL

1

2

0

0
0

1

0

0

1 0 0 333 MHZ (1333)

5

4

3

FSB FREQUENCY

0

267 MHZ (1067)

0
0

200 MHZ (800)
133 MHZ (533)

1

2

TABLE

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

MICRO-START INT'L CO.,LTD.

INTEL LGA775 CPU SIGNAL

INTEL LGA775 CPU SIGNAL

INTEL LGA775 CPU SIGNAL

MS-7423

MS-7423

MS-7423

1

3 38Tuesday, August 12, 2008

3 38Tuesday, August 12, 2008

3 38Tuesday, August 12, 2008

10

10

10

5

VCCP

4

3

2

1

AF21

U7B

VCCP

D D

C C

ZIF-SOCK775-15u-in

ZIF-SOCK775-15u-in

VTT_OUT_LEFT

B B

GTLREF VOLTAGE SHOULD
BE 0.63xVTT

VCC5

GPIO_1815

R248

R248
10KR0402

10KR0402
R249

R249
10KR0402

10KR0402

57.6R1%0402-RH

57.6R1%0402-RH

U7B

AF19

VCC

AF18

VCC

AF15

VCC

AF14

VCC

AF12

VCC

AF11

VCC

AE9

VCC

AE23

VCC

AE22

VCC

AE21

VCC

AE19

VCC

AE18

VCC

AE15

VCC

AE14

VCC

AE12

VCC

AE11

VCC

AD8

VCC

AD30

VCC

AD29

VCC

AD28

VCC

AD27

VCC

AD26

VCC

AD25

VCC

AD24

VCC

AD23

VCC

AC8

VCC

AC30

VCC

AC29

VCC

AC28

VCC

AC27

VCC

AC26

VCC

AC25

VCC

AC24

VCC

AC23

VCC

AB8

VCC

AA8

VCC

VCCP

R195

R195

R183

R183

49.9R1%0402

49.9R1%0402

Q37

Q37

2
5

NN-CMKT3904_SOT363-6-RH

NN-CMKT3904_SOT363-6-RH

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCU8VCCV8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCW8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

Y8

Y30

R205

R205
100R1%0402

100R1%0402 C96

R188

R188
100R1%0402

100R1%0402

6
1
3
4

Y27

Y28

Y29

CPU_GTLR0

CPU_GTLR1

Y25

Y26

Y23

Y24

W30

C153

C153
C1U10X0603

C1U10X0603

C152

C152
C1U10X0603

C1U10X0603

R231

R231
576/4/1

576/4/1

W24

W25

W26

W27

W28

W29

R190 10R0402R190 10R0402

R176 10R0402R176 10R0402

CPU_GTLR1

W23

U26

U27

U28

U29

U30

CPU_GTLREF0

C141

C141
X_C220P16X0402

X_C220P16X0402

CPU_GTLREF1VTT_OUT_LEFT

C138

C138
C220P16X0402

C220P16X0402

AH28

AH29

AH30

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

U25

VCC

U23

U24

VCC

VCC

VCC

VCC

VCC

VCC

VCCT8VCC

T27

T28

T29

T30

CPU_GTLREF0 3

CPU_GTLREF1 3

T26

C138 mount for 0C

VCC

VCC

AH8

AH9

AJ11

AJ12

AJ14

AJ15

AJ18

AJ19

AJ21

AJ22

AJ25

AJ26

AJ8

AJ9

AK11

AK12

AK14

AK15

AK18

AK19

AK21

AK22

AK25

AK26

AK8

AK9

AL11

AL12

AL14

AL15

AL18

AL19

AL21

AL22

AL25

AL26

AL29

AL30

AL8

AL9

AM11

AM12

AM14

AM15

AM18

AM19

AM21

AM22

AM25

AM26

AM29

AM30

AM8

AM9

AN11

AN12

AN14

AN15

AN18

AN19

AN21

AN22

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCPLL

VCC-IOPLL

VTTPWRGD

VTT_OUT_RIGHT

VTT_OUT_LEFT

VTT_SEL

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCJ8VCCJ9VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCK8VCCL8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCM8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCN8VCCP8VCCR8VCC

VCC

VCC

J10

J11

J12

J13

J14

J15

J18

J19

J20

J21

J22

J23

J24

J25

J26

J27

J28

J29

T23

T24

T25

N30

N23

N24

N25

N26

N27

N28

N29

V_1P5_ICH

M27

M28

M29

M30

M24

M25

M26

CP1 X_COPPERCP1 X_COPPER

1 2

K27

K28

K29

K30

M23

J30

K23

K24

K25

K26

H_VCCPLL

C96
C10U10Y0805

C10U10Y0805

C99

C99
C0.1U16Y0402

C0.1U16Y0402

AN9

HS11HS22HS33HS4

AN8

AN25

AN26

AN29

AN30

remove L1, R100, C87, C80, C92, add Q92, R612, R613 for 0B

VCC3

R613

R613

10KR0402

10KR0402

6

GPIO_3215

NN-CMKT3904_SOT363-6-RH

NN-CMKT3904_SOT363-6-RH

R612

R612
10KR0402

10KR0402

2
5

Q92

Q92

1
3
4

H_PROCHOT# 3,21,28

AH27

AH26

AH25

AH22

AH21

AH19

AH18

AH15

AH14

AH12

AH11

AG9

AG8

AG30

AG29

AG28

AG27

AG26

AG25

AG22

AG21

AG19

AG18

AG15

AG14

AG12

AG11

AF9

AF8

AF22

change to test point for 0B

A23
B23
D23
C23

A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30

VTT_PWG

AM6

VTT_OUT_RIGHT

AA1

VTT_OUT_LEFT

J1

VTT_SEL

F27
F29

TP15TP15
TP16TP16

TP17TP17

VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns

VID_GD#28

R181 10KR0402R181 10KR0402

VCCA
VSSA

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

RSVD

4

VTT_OUT_RIGHT

H_VCCPLL

VTT_SEL 25

BIOS wirters Guide
PDG:page109

V_FSB_VTT

Power name change from V_1P1_CORE
to V_FSB_VTT for 0C

V_FSB_VTT

C68 C10U10Y0805C68 C10U10Y0805
C79 C10U10Y0805C79 C10U10Y0805
C73 C10U10Y0805C73 C10U10Y0805

CAPS FOR FSB GENERIC

VTT_OUT_RIGHT

C149

C149

C1U10X

C1U10X

VCC5_SB

R178 680R0402-1R178 680R0402-1

R219

R219
1KR0402

1KR0402
R207 4.7KR0402-1R207 4.7KR0402-1

Q31

Q31

N-SST3904_SOT23

N-SST3904_SOT23

VTT_PWG

Q28

Q28

N-SST3904_SOT23

N-SST3904_SOT23

C137

C137

X_C1U10X

X_C1U10X

Q35

Q35

R224

R243

R243

VCC5

10KR0402

10KR0402
R215

GPIO_2015

A A

VTT_OUT_RIGHT3,5

VTT_OUT_LEFT3,5

R215
10KR0402

10KR0402

PLACE AT CPU END OF ROUTE

VTT_OUT_RIGHT

VTT_OUT_LEFT

6

2

1

5

3
4

NN-CMKT3904_SOT363-6-RH

NN-CMKT3904_SOT363-6-RH

5

R224

1.3K/4/1

1.3K/4/1

CRB 576/1.3K

R106 X_130R1%0402-LFR106 X_130R1%0402-LF
R119 62R0402R119 62R0402

R151 X_100R0402-1R151 X_100R0402-1
R217 62R0402R217 62R0402
R126 62R0402R126 62R0402

CPU_GTLR1

H_PROCHOT#
H_IERR#

H_PWRGD
H_BR#0
H_CPURST#

H_PROCHOT# 3,21,28
H_IERR# 3

H_PWRGD 3,15
H_BR#0 3,7
H_CPURST# 3,7,8,21

4

VCC3

R233

R233

10KR0402

10KR0402

6

2

H_PROCHOT#

R218

R218
10KR0402

10KR0402

NN-CMKT3904_SOT363-6-RH

NN-CMKT3904_SOT363-6-RH

1

5

3
4

Q91

Q91

remove Q34, Q36, add Q91 for 0B

3

VCC3

R202

R202
10KR0402

10KR0402

THERM# 15

FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED

V_FSB_VTT

Power name change from V_1P1_CORE
to V_FSB_VTT for 0C

RN1

RN1

H_FSBSEL1

1

2

H_FSBSEL0

3

4

H_FSBSEL2

5

6

7

8

8P4R-470R0402-LF

8P4R-470R0402-LF

H_FSBSEL1 3,6,8
H_FSBSEL0 3,6,8
H_FSBSEL2 3,6,8

PLACE AT ICH END OF ROUTE

VTT_OUT_RIGHT

R153 62R0402R153 62R0402
R135 62R0402R135 62R0402

2

TRMTRIP# 3,15
H_FERR# 3,15

Title

Title

Title

INTEL LGA775 POWER

INTEL LGA775 POWER

INTEL LGA775 POWER

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

MS-7423 10

Custom

MS-7423 10

Custom

MS-7423 10

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

4 38Tuesday, August 12, 2008

4 38Tuesday, August 12, 2008

4 38Tuesday, August 12, 2008

5

TP6TP6

TP5TP5

TP13TP13

X_49.9R1%0402

X_49.9R1%0402
R112

VTT_OUT_RIGHT3,4

D D

R98

R98

X_1KR0402

X_1KR0402

C C

B B

R112

R141

R141
X_49.9R1%0402

X_49.9R1%0402

PSI#8,28

AA23
AA24
AA25
AA26
AA27
AA28
AA29

AA30

AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30

AC3
AC6
AC7
AD4

AD7
AE10
AE13
AE16
AE17

AE2
AE20
AE24
AE25
AE26
AE27
AE28

PSI#

H_COMP7

AE3

AE4

D14

AE29

VSS

AE30

RSVD

COMP6Y3COMP7

VSS

VSS

VSS

AE5

AE7

RSVDD1RSVD

VSS

AF10

AF13

E23

VSS

AF16

RSVD

VSS

AF17

VSS

AF20

RSVDE5RSVDE6RSVDE7RSVD

VSS

VSS

AF23

AF24

U7C

U7C

A12

VSS

A15

VSS

A18

VSS

A2

VSS

A21

VSS

A24

VSS

A6

VSS

A9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AA3

VSS
VSS

AA6

VSS

AA7

VSS

AB1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AB7

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

R131 and R145 remove because
they are unused for 10

R148 24.9R1%0402R148 24.9R1%0402

R130 51R0402R130 51R0402

H_COMP8

F23

F6

B13

P5

RSVD

RSVDJ3RSVDN4RSVD

AF28

VSS

AF29

VSS

MSID[1]V1MSID[0]

VSS

VSS

VSS

VSS

VSS

AF3

AF6

AF7

AF30

AG10

VSS

AF25

VSS

AF26

IMPSEL#

VSS

VSS

AF27

W1

VSS

AG13

AC4

RSVD

VSS

AG16

VSS

AG17

4

VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS

VSS

VSS

VSS

VSS

VSS

VSS

AH1

AG7

AH10

AG20

AG23

AG24

AH13

VSS

AH16

VSS

V30

AH17

VSS

VSSV3VSS

VSS

AH20

V29

VSS

AH23

V28

VSS

VSS

AH24

V27

V26

VSS

VSS

VSS

VSS

AH3

AH6

V25

V24

V23

VSS

VSS

VSS

VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS

VSS

VSS

VSS

VSS

AH7

AJ10

AJ13

AJ16

H_TESTHI12 3

VSS

VSS

VSS

AJ17

AJ20

AJ23

AJ24

VSS

AJ27

VSS

AJ28

VSS

R30

AJ29

VSS

R29

AJ30

VSS

VSS

3

VSS

VSS

L26

VSS

VSS

AM13

L25

VSS

VSS

AM16

L24

VSS

VSS

AM17

L23

VSS

VSS

AM20

VSSK7VSS

VSS

AM23

K5

VSS

AM24

K2

VSS

AM27

VSS

AM28

AM4

VSS

VSS

VSS

VSS

AN1

AN10

AN13

R28

R27

R26

R25

R24

R23

P30

P29

P28

P27

P26

P25

P24

P23

VSS

VSS

VSS

VSS

VSS

VSS

VSSR2VSSP7VSSP4VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AJ4

AJ7

AK10

AK13

AK16

AK17

AK2

AK20

AK23

AK24

AK27

AK28

AK29

AK30

AK5

AK7

AL10

AL13

L30

VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AL16

AL17

AL20

AL23

AL24

AL27

AL28

VSSL3VSS

VSS

AL3

L29

L28

L27

VSS

VSS

VSS

AL7

AM1

AM10

VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS

VSS

AN16

VSS

AN17

2

H17

H18

H19

H20

H21

H22

H23

H24

H25

H26

H27

H28

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSB1VSS

B11

AN24

AN27

AN28

B14

AN2

AN20

AN23

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

ZIF-SOCK775-15u-in

ZIF-SOCK775-15u-in

H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17

R198 51R0402R198 51R0402

TP_CPU_W29

1

TP_CPU_G1 3
VTT_OUT_LEFT 3,4

TP4TP4

CPU DECOUPLING CAPACITORS

VCCP

A A

5

EC34

EC34
C22u6.3X1206

C22u6.3X1206
EC32

EC32
C22u6.3X1206

C22u6.3X1206
EC31

EC31
C22u6.3X1206

C22u6.3X1206

4

10u/6.3V/X5R,1206,80/-20%

VCCP

EC30

EC30
C22u6.3X1206

C22u6.3X1206
EC29

EC29
C22u6.3X1206

C22u6.3X1206
EC26

EC26
C22u6.3X1206

C22u6.3X1206

Place these caps within socket cavity

VCCP VCCP

EC19

EC19
C22u6.3X1206

C22u6.3X1206
EC21

EC21
C22u6.3X1206

C22u6.3X1206
EC28

EC28
C22u6.3X1206

C22u6.3X1206

EC25

EC25
C22u6.3X1206

C22u6.3X1206
EC24

EC24
C22u6.3X1206

C22u6.3X1206
EC22

EC22
C22u6.3X1206

C22u6.3X1206

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

INTEL LGA775 GND

INTEL LGA775 GND

INTEL LGA775 GND

10

10

MS-7423

MS-7423

MS-7423

1

5 38Tuesday, August 12, 2008

5 38Tuesday, August 12, 2008

5 38Tuesday, August 12, 2008

10

5

4

3

2

1

CLOCK Generator ­IDTCV184-2

U6

VDD_CK

D D

VDD_48

VDD_CLK_IO

PLL_XI
PLL_XO

CK_PWRGD15

C C

R53 1KR0402R53 1KR0402

SMBDATA_ISO17,21,25

SMBCLK_ISO17,21,25
SMBDATA12,15,21
SMBCLK12,15,21

R27 0R0402R27 0R0402

R25 0R0402R25 0R0402
R28 X_0R0402R28 X_0R0402
R26 X_0R0402R26 X_0R0402

U6

47

VDDCPU

31

VDDSRC

16

VDD

2

VDDPCI

9

VDD48

53

VDDREF

41

VDDI/OCPU

12

VDDI/O96MHZ

37

VDDSRCI/O

26

VDDSRCI/O

20

VDDPLL3I/O

52

X1

51

X2

48

CK_PWRGD/PD#

55

SDATA

56

SCLK

40

IO_VOUT

44

GNDCPU

15

GND

34

GNDSRC

23

GNDSRC

19

GND

11

GND48

8

GNDPCI

50

GNDREF

IDTCV184-2APAG8_TSSOP56-RH

IDTCV184-2APAG8_TSSOP56-RH

DOT96T/SRCT0
DOT96C/SRCC0

SRCT2/SATAT
SRCT2/SATAT

SRCT3/CR#_C
SRCC3/CR#_D

PCI_STOP#/SRCT5

CPU_STOP#/SRCC5

SRCT7/CR#_F
SRCC7/CR#_E

CPUT2_ITP/SRCT8

CPUC2_ITP/SRCC8

PCI4/SRC5_EN
PCI_F5/ITP_EN

FSLA/USB_48MHz

FSLB/TEST_MODE

REF0/FSLC/TESTSEL

CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1

SRCT1/SE1

SRCC1/SE2

SRCT4
SRCC4

SRCT6
SRCC6

PCI0/CR#A
PCI1/CR#B

PCI2/TME

PCI3

46

CPUCLK# CK_H_CPU#

45

MCHCLK

43

MCHCLK# CK_H_MCH#

42

CK_DOT96 CK_96M_DREF

13

CK_DOT96# CK_96M_DREF#

14
17

18

CK_PE_SRC2

21

CK_PE_SRC2#

22
24

25

CK_PE_SRC4

27

CK_PE_SRC4# CK_PE_100M_ICH#

28

CK_PE_SRC5

30

CK_PE_SRC5#

29

CK_PE_SRC6

33

CK_PE_SRC6# CK_PE_100M_MCH#

32

CK_PE_SRC9

36
35

39
38

PCICLK0 SIO_PCLKIO_VOUT

1
3

PCICLK2

4

PCICLK3

5

PCICLK4

6
7

USB_48M

10

FSB

49

CK_14M

54

R94 0R0402R94 0R0402
R93 0R0402R93 0R0402

R72 1KR0402R72 1KR0402

R44 1KR0402R44 1KR0402

R5533R0402-2 R5533R0402-2
R6233R0402-2 R6233R0402-2
R6533R0402-2 R6533R0402-2
R7033R0402-2 R7033R0402-2

R6333R0402-2 R6333R0402-2
R6733R0402-2 R6733R0402-2

R7733R0402-2 R7733R0402-2
R8133R0402-2 R8133R0402-2

R8933R0402-2 R8933R0402-2
R9133R0402-2 R9133R0402-2

R8533R0402-2 R8533R0402-2
R9033R0402-2 R9033R0402-2

R7933R0402-2 R7933R0402-2
R8233R0402-2 R8233R0402-2

R3333R0402-2 R3333R0402-2
R3833R0402-2 R3833R0402-2

R4110KR0402 R4110KR0402
R4533R0402-2 R4533R0402-2
R5133R0402-2 R5133R0402-2

R5933R0402-2 R5933R0402-2

R3233R0402-2 R3233R0402-2
R3733R0402-2 R3733R0402-2

CK_H_CPUCPUCLK

CK_H_MCH

CK_ICHSATA
CK_ICHSATA#

CK_PE_100M_ICH

PCI_STOP#
CPU_STOP#

CK_PE_100M_MCH

CK_PE_100M_PCIE1
CK_PE_100M_PCIE1#CK_PE_SRC9#

TPM_PCLKPCICLK1

CK_PCMCIA
ICH_PCLKPCICLK5

CK_48M_USB_ICH

CK_FSBSEL0

SIO_14
CK_14M_ICH
CK_FSBSEL2

CK_H_CPU 3
CK_H_CPU# 3
CK_H_MCH 7
CK_H_MCH# 7

CK_96M_DREF 8
CK_96M_DREF# 8

CK_ICHSATA 15
CK_ICHSATA# 15

CK_PE_100M_ICH 14
CK_PE_100M_ICH# 14

PCI_STOP# 15
CPU_STOP# 15

CK_PE_100M_MCH 7
CK_PE_100M_MCH# 7

CK_MINI_PCIE 17
CK_MINI_PCIE# 17

SIO_PCLK 21
TPM_PCLK 19

CK_PCMCIA 30

ICH_PCLK 14
CK_48M_USB_ICH 14

SIO_14 21
CK_14M_ICH 15

VDD_48 VDD_CK

VDD_CK Decoupling

Place near each VDD_CK Pins

FB5

FB5

80L3_70_0805

80L3_70_0805

C0.1U16Y0402

C0.1U16Y0402

C0.1U16Y0402

C0.1U16Y0402

C0.1U16Y0402

C0.1U16Y0402

C0.1U16Y0402

C0.1U16Y0402

C0.1U16Y0402

C0.1U16Y0402

C43

C43

C57

C57

C436

C436

C24

C24

C449

C449

C434

C434
C1U6.3X50402

C1U6.3X50402

1 2

C440

C440
C1U6.3X50402

C1U6.3X50402

1 2

C448

C448
C1U6.3X50402

C1U6.3X50402

1 2

C435

C435
C1U6.3X50402

C1U6.3X50402

1 2

C441

C441
C1U6.3X50402

C1U6.3X50402

1 2

Strapping risistor

PCICLK2

PCICLK5

PCICLK4

R40

10KR0402

10KR0402

R52

R52

10KR0402

10KR0402

R46

R46

10KR0402

10KR0402

VCC3

C47p50NC29 C47p50NC29

C47p50NC28 C47p50NC28

PLL_XI

Y1

Y1

14.318MHZ32P_D-1-RH

14.318MHZ32P_D-1-RH

PLL_XO

C437

C437

C0.1U16Y0402

C0.1U16Y0402

C438

C438
C1U6.3X50402

C1U6.3X50402

1 2

R40

C28, C29 are changed from 27pF to 47pF for 0B

B B

CPU Frequency select

VDD_CK & VDD_CLK_IO Power

For EMI
reserver

H_FSBSEL1 FSB

H_FSBSEL13,4,8
H_FSBSEL03,4,8
H_FSBSEL23,4,8

H_FSBSEL0
H_FSBSEL2

VDD_CK VDD_CK

A A

H_FSBSEL2 H_FSBSEL0

R76 X_0R0402R76 X_0R0402
R42 X_0R0402R42 X_0R0402

R36

R36
1KR0402

1KR0402

R43

R43

4.7KR0402-1

4.7KR0402-1

5

R50 1KR0402R50 1KR0402

H_FSBSEL0 USB_48M
H_FSBSEL2

R78 X_10KR0402R78 X_10KR0402

R39 X_10KR0402R39 X_10KR0402

Q12

Q12

N-SST3904_SOT23

N-SST3904_SOT23

Q11

Q11

N-SST3904_SOT23

N-SST3904_SOT23

CK_14M

CK_FSBSEL0
CK_FSBSEL2

R74

R74

1KR0402

1KR0402

Q15

Q15

N-SST3904_SOT23

N-SST3904_SOT23

R83

R83

4.7KR0402-1

4.7KR0402-1

Q16

Q16

N-SST3904_SOT23

N-SST3904_SOT23

R31

R31
10KR0402

10KR0402

R22 X_0RR22 X_0R

Q8P-SI2303BDS-T1-E3_SOT23-3-RH Q8P-SI2303BDS-T1-E3_SOT23-3-RH

G

IO_VOUT

R73 33R0402-2R73 33R0402-2

DS

C25

C25
C4.7U10Y0805

C4.7U10Y0805

C38

C38

X_C10P50N

X_C10P50N

VDD_CK

R30

R30
15R0805

15R0805

Q10

Q10
N-SST3904_SOT23

N-SST3904_SOT23

C444

C444

C447

C447

C10U10Y0805

C10U10Y0805
C0.1U16Y0402

C0.1U16Y0402

+

+

C15

C15
X_C10U16X51206-RH

X_C10U16X51206-RH

Place near each VDD_CLK_IO Pins

VDD_CLK_IO

C439

C439

C443

C443

C450

C450

C445

C445

C10U10Y0805

C10U10Y0805
C0.1U16Y0402

C0.1U16Y0402

C10U10Y0805

C10U10Y0805
C0.1U16Y0402

C0.1U16Y0402

2

C91

C91

C446

C446

C10U10Y0805

C10U10Y0805
C0.1U16Y0402

C0.1U16Y0402

C66

C66

C442

C442

C0.1U16Y0402

C0.1U16Y0402

C0.1U16Y0402

C0.1U16Y0402

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

VDD_CK

R64

R64

R35

R35

47KR0402-1

R34

R34

47KR0402-1

CK_48M_USB_ICH

R69

R69
33KR0402

33KR0402

47KR0402-1

47KR0402-1

CK_14M_ICH

33KR0402

33KR0402

4

VCC3_SB

SLP_M15,27

3

SIO_PCLK

CK_PCMCIA

ICH_PCLK
TPM_PCLK
CK_48M_USB_ICH
SIO_14
CK_14M_ICH

CLOCK Generator-IDTCV184-2APAG8

CLOCK Generator-IDTCV184-2APAG8

CLOCK Generator-IDTCV184-2APAG8

Tuesday, August 12, 2008

Tuesday, August 12, 2008

Tuesday, August 12, 2008

C27 X_C22P50N0402C27 X_C22P50N0402

C34 X_C10P50N0402C34 X_C10P50N0402

C36 X_C10P50N0402C36 X_C10P50N0402
C31 X_C10P50N0402C31 X_C10P50N0402
C54 X_C10P25N0402C54 X_C10P25N0402
C26 X_C10P50N0402C26 X_C10P50N0402
C30 X_C10P25N0402C30 X_C10P25N0402

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

10

10

MS-7423

MS-7423

MS-7423

1

6

6

6

10

38

38

38

5

U15A

U15A

H_A#3

H_A#[3..35]3

D D

C C

B B

H_REQ#[0..4]3

H_ADSTB#03
H_ADSTB#13

H_DSTBP#03
H_DSTBN#03
H_DSTBP#13
H_DSTBN#13
H_DSTBP#23
H_DSTBN#23
H_DSTBP#33
H_DSTBN#33

H_DBI#[0..3]3

H_ADS#3

H_TRDY#3
H_DRDY#3
H_DEFER#3
H_HITM#3

H_HIT#3
H_LOCK#3
H_BR#03,4
H_BNR#3
H_BPRI#3

H_DBSY#3

H_RS#[0..2]3

H_CPURST#3,4,8,21

H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

H_RS#0
H_RS#1
H_RS#2

AA35

AA37
AA36

L36
L37
J38
F40

H39

L38

L43
N39
N35
N37

J41
N40
M45
R35
T36
R36
R34
R37
R39
U38
T37
U34
U40
T34
Y36
U35

U37
Y37
Y34
Y38

G38
K35

J39
C43
G39

J40
T39

C39
B39
K31

J31

J25
K25
C32
D32

B40

F33

F26
D30

J42

L40

J43
G44
K44
H45
H40

L42

J44
H37
H42
G43

L44
G42

D27

N25

FSB_AB_3
FSB_AB_4
FSB_AB_5
FSB_AB_6
FSB_AB_7
FSB_AB_8
FSB_AB_9
FSB_AB_10
FSB_AB_11
FSB_AB_12
FSB_AB_13
FSB_AB_14
FSB_AB_15
FSB_AB_16
FSB_AB_17
FSB_AB_18
FSB_AB_19
FSB_AB_20
FSB_AB_21
FSB_AB_22
FSB_AB_23
FSB_AB_24
FSB_AB_25
FSB_AB_26
FSB_AB_27
FSB_AB_28
FSB_AB_29
FSB_AB_30
FSB_AB_31
FSB_AB_32
FSB_AB_33
FSB_AB_34
FSB_AB_35

FSB_REQB_0
FSB_REQB_1
FSB_REQB_2
FSB_REQB_3
FSB_REQB_4

FSB_ADSTBB_0
FSB_ADSTBB_1

FSB_DSTBPB_0
FSB_DSTBNB_0
FSB_DSTBPB_1
FSB_DSTBNB_1
FSB_DSTBPB_2
FSB_DSTBNB_2
FSB_DSTBPB_3
FSB_DSTBNB_3

FSB_DINVB_0
FSB_DINVB_1
FSB_DINVB_2
FSB_DINVB_3

FSB_ADSB
FSB_TRDYB
FSB_DRDYB
FSB_DEFERB
FSB_HITMB
FSB_HITB
FSB_LOCKB
FSB_BREQ0B
FSB_BNRB
FSB_BPRIB
FSB_DBSYB
FSB_RSB_0
FSB_RSB_1
FSB_RSB_2
FSB_CPURSTB

RSVD_05

1 OF 7

1 OF 7

AC82Q45

AC82Q45

SYM_REV = 1.5

SYM_REV = 1.5

FSB

FSB

4

FSB_DB_0
FSB_DB_1
FSB_DB_2
FSB_DB_3
FSB_DB_4
FSB_DB_5
FSB_DB_6
FSB_DB_7
FSB_DB_8

FSB_DB_9
FSB_DB_10
FSB_DB_11
FSB_DB_12
FSB_DB_13
FSB_DB_14
FSB_DB_15
FSB_DB_16
FSB_DB_17
FSB_DB_18
FSB_DB_19
FSB_DB_20
FSB_DB_21
FSB_DB_22
FSB_DB_23
FSB_DB_24
FSB_DB_25
FSB_DB_26
FSB_DB_27
FSB_DB_28
FSB_DB_29
FSB_DB_30
FSB_DB_31
FSB_DB_32
FSB_DB_33
FSB_DB_34
FSB_DB_35
FSB_DB_36
FSB_DB_37
FSB_DB_38
FSB_DB_39
FSB_DB_40
FSB_DB_41
FSB_DB_42
FSB_DB_43
FSB_DB_44
FSB_DB_45
FSB_DB_46
FSB_DB_47
FSB_DB_48
FSB_DB_49
FSB_DB_50
FSB_DB_51
FSB_DB_52
FSB_DB_53
FSB_DB_54
FSB_DB_55
FSB_DB_56
FSB_DB_57
FSB_DB_58
FSB_DB_59
FSB_DB_60
FSB_DB_61
FSB_DB_62
FSB_DB_63

FSB_SWING
FSB_RCOMP

FSB_DVREF

FSB_ACCVREF

HPL_CLKINP
HPL_CLKINN

F44
C44
D44
C41
E43
B43
D40
B42
B38
F38
A38
B37
D38
C37
D37
B36
E37
J35
H35
F37
G37
J33
L33
G33
L31
M31
M30
J30
G31
K30
M29
G30
J29
F29
H29
L25
K26
L29
J26
M26
H26
F25
F24
G25
H24
L24
J24
N24
C28
B31
F35
C35
B35
D35
D31
A34
B32
F31
D28
A29
C30
B30
E27
B28

B24
A23

C22
B23

P29
P30

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

HXSWING
HXRCOMP

MCH_GTLREF

CK_H_MCH 6

CK_H_MCH# 6

H_D#[0..63] 3

R255

R255

16.5R1%/2

16.5R1%/2

5mil trace

3

F6
G7
H6
G4

J6

J7

L6

L7
N9

N10

N7
N6
R7
R6
R9

R10
U10

U9
U6
U7

AA9

AA10

R4
P4

AA7

SDVO_STALL+13

SDVO_STALL-13

DMI_ITP_MRP_014
DMI_ITN_MRN_014
DMI_ITP_MRP_114
DMI_ITN_MRN_114
DMI_ITP_MRP_214
DMI_ITN_MRN_214
DMI_ITP_MRP_314
DMI_ITN_MRN_314

CK_PE_100M_MCH6

CK_PE_100M_MCH#6

SDVO_CTRL_DATA13
SDVO_CTRL_CLK13

EXP_A_RXP_13
EXP_A_RXN_13

DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3

CK_PE_100M_MCH
CK_PE_100M_MCH#

SDVO_CTRL_DATA

SDVO_CTRL_CLK

AB10

AD10
AD11

AE10

AB13

AD13

AA6
AB9

AB3
AA2

AD7
AD8
AE9

AE6
AE7
AF9
AF8

D9
E9

J13

G13

2

U15B

U15B

PEG_RXP_0
PEG_RXN_0
PEG_RXP_1
PEG_RXN_1
PEG_RXP_2
PEG_RXN_2
PEG_RXP_3
PEG_RXN_3
PEG_RXP_4
PEG_RXN_4
PEG_RXP_5
PEG_RXN_5
PEG_RXP_6
PEG_RXN_6
PEG_RXP_7
PEG_RXN_7
PEG_RXP_8
PEG_RXN_8
PEG_RXP_9
PEG_RXN_9
PEG_RXP_10
PEG_RXN_10
PEG_RXP_11
PEG_RXN_11
PEG_RXP_12
PEG_RXN_12
PEG_RXP_13
PEG_RXN_13
PEG_RXP_14
PEG_RXN_14
PEG_RXP_15
PEG_RXN_15

DMI_RXP_0
DMI_RXN_0
DMI_RXP_1
DMI_RXN_1
DMI_RXP_2
DMI_RXN_2
DMI_RXP_3
DMI_RXN_3

EXP_CLKP
EXP_CLKN
SDVO_CTRLDATA
SDVO_CTRLCLK
RSVD_23
RSVD_22

AC82Q45

AC82Q45

SYM_REV = 1.5

SYM_REV = 1.5

PCIE

PCIE

DMI

DMI

PEG_TXP_0
PEG_TXN_0
PEG_TXP_1
PEG_TXN_1
PEG_TXP_2
PEG_TXN_2
PEG_TXP_3
PEG_TXN_3
PEG_TXP_4
PEG_TXN_4
PEG_TXP_5
PEG_TXN_5
PEG_TXP_6
PEG_TXN_6
PEG_TXP_7
PEG_TXN_7
PEG_TXP_8
PEG_TXN_8
PEG_TXP_9

PEG_TXN_9
PEG_TXP_10
PEG_TXN_10
PEG_TXP_11
PEG_TXN_11
PEG_TXP_12
PEG_TXN_12
PEG_TXP_13
PEG_TXN_13
PEG_TXP_14
PEG_TXN_14
PEG_TXP_15
PEG_TXN_15

DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
DMI_TXP_2
DMI_TXN_2
DMI_TXP_3
DMI_TXN_3

EXP_RCOMPO

EXP_COMPI

EXP_ICOMPO

EXP_RBIAS

C11
B11

PCI-E (X16) slot unused

A10
B9
C9
D8
B8
C7
B7
B6
B3
B4
D2
C2
H2
G2
J2
K2
K1
L2
P2
M2
T2
R1
U2
V2
W4
V3
AA4
Y4
AC1
AB2

AC2
AD2
AD4
AE4
AE2
AF2
AF4
AG4

Y7
Y8
Y6
AG1

EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15

DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3

GRCOMP

EXP_RBIAS

SDVO INTERFACESDVO INTERFACE

R568

R568

49.9R1%0402

49.9R1%0402

R353

R353
750R1%0402

750R1%0402

1

SDVOB_Clk+ 13
SDVOB_Clk- 13
SDVOB_Blue+ 13
SDVOB_Blue- 13
SDVOB_Green+ 13
SDVOB_Green- 13
SDVOB_Red+ 13
SDVOB_Red- 13

DMI_MTP_IRP_0 14
DMI_MTN_IRN_0 14
DMI_MTP_IRP_1 14
DMI_MTN_IRN_1 14
DMI_MTP_IRP_2 14
DMI_MTN_IRN_2 14
DMI_MTP_IRP_3 14
DMI_MTN_IRN_3 14

V_1P1_CORE

HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/4*VTT +/- 2%

PLACE DIVIDER RESISTOR NEAR VTT

V_FSB_VTT V_FSB_VTT

R264

A A

5

R264
301R1%0402

301R1%0402

R256

R256
100R1%0402

100R1%0402

R263

R263

49.9R1%0402

49.9R1%0402
C191

C191
C0.1U16Y0402

C0.1U16Y0402

HXSWING

GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.8V
100 OHM OVER 200 RESISTORS

MCH_GTLREF_CPU

R247

R247

49.9R1%0402

49.9R1%0402

C170
C1U16Y

C1U16Y

C184

C184
X_C2200P50X

X_C2200P50X

4

R226

R226

57.6R1%0402-RH

57.6R1%0402-RH

R220

R220
100R1%0402

100R1%0402 C170

Power name change from V_1P1_CORE
to V_FSB_VTT for 0C

MCH_GTLREF_CPU 3

MCH_GTLREF

3

C452

C452

C0.1U16Y0402

C0.1U16Y0402

V_FSB_VTT

C199

C199

C0.1U16Y0402

C0.1U16Y0402

C253

C253
C0.1U16Y0402

C0.1U16Y0402

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

MICRO-START INT'L CO.,LTD.

Eaglelake FSB/PCIE

Eaglelake FSB/PCIE

Eaglelake FSB/PCIE

10

10

MS-7423

MS-7423

MS-7423

1

7 38Tuesday, August 12, 2008

7 38Tuesday, August 12, 2008

7 38Tuesday, August 12, 2008

10

5

4

3

2

1

DIMM1 decouping cap DIMM2 decouping cap

U15E

U15E

T14T14
T15T15

EXP_SLR

T12T12

EXP_EN
ITPM_EN

T13T13

MCH_TCEN

T11T11
T10T10
T16T16

CL_VREF_MCH

R380

R380
0R0402

0R0402

T9T9

SEL0
SEL1
SEL2

AN13

AW2

AN10
AN11

AN17

AW44

AN16
AD42

W30

BE44

BD45

AK15

F17
G16
P15
M20
N17
K16
F15
G15
H17
L17

M17
J17
G20
J16
M16
J15
J20
F20

AY4
AY2

AN8

AR7

AN9

B45

U32

R42
BE2
BD1

A44

B14

BSEL0
BSEL1
BSEL2
ALLZTEST
XORTEST
RSVD_36
EXP_SLR
RSVD_17
EXP_SM
ITPM_ENB

RSVD_10
CEN
BSCANTEST
RSVD_12
RSVD_13
RSVD_14
RSVD_15
DUALX8_ENABLE

CL_DATA
CL_CLK
CL_VREF
CL_RSTB
CL_PWROK

JTAG_TDI
JTAG_TDO
JTAG_TCK
JTAG_TMS

NC_01
NC_02
NC_03
NC_04
NC_05
NC_06
NC_07
NC_08
NC_09
NC_10
NC_11
NC_12
NC_13
NC_18
NC_19

5 OF 7

5 OF 7

AC82Q45

AC82Q45

R567 X_1KR0402R567 X_1KR0402
R558 X_1KR0402R558 X_1KR0402

Low : BTX

R565 X_1KR0402R565 X_1KR0402

R566

R566

X_1KR0402

X_1KR0402

R562

R562

X_1KR0402

X_1KR0402

R564

R564

X_1KR0402

X_1KR0402

R560

R560

X_1KR0402

X_1KR0402

CL_N_DATA15

CL_N_CLK15

CL_RST15

MCH_CLPWROK15,27

C257

C257
C0.1U16Y0402

C0.1U16Y0402

R262 10KR0402R262 10KR0402
R261 10KR0402R261 10KR0402
R260 10KR0402R260 10KR0402

VCC3

R559

D D

C C

B B

R559

1KR0402

1KR0402

R557

R557

X_0R0402

X_0R0402

EXP_EN: PCI Express* SDVO
Concurrent Select

0: Only SDVO or PCI-E Operational
1: SDVO and PCI-E operating

simultaneously via PCI Express-G
port

V_1P1_CL

H_FSBSEL03,4,6
H_FSBSEL13,4,6
H_FSBSEL23,4,6

MCH CL VREF:0.349V

R374

R374
1KR1%0402

1KR1%0402

CL_VREF_MCH

R375

R375
464R1%0402

464R1%0402

SYM_REV = 1.5

SYM_REV = 1.5

VGA

VGA

MISC

MISC

CRT_HSYNC
CRT_VSYNC

CRT_RED

CRT_GREEN

CRT_BLUE

CRT_IRTN

CRT_DDC_DATA

CRT_DDC_CLK

DAC_IREF

DPL_REFCLKINP

DPL_REFCLKINN

DPL_REFSSCLKINP

DPL_REFSSCLKINN

RSTINB

PWROK

ICH_SYNCB

HDA_BCLK
HDA_RSTB

HDA_SDI

HDA_SDO

HDA_SYNC

DDPC_CTRLCLK

DDPC_CTRLDATA

DPRSTPB

SLPB

RSVD_18
RSVD_19
RSVD_20
RSVD_21
RSVD_25
RSVD_26
RSVD_27
RSVD_28
RSVD_29
RSVD_30
RSVD_31
RSVD_32
RSVD_33
RSVD_34
RSVD_35

HSYNC_R

D14

VSYNC_R

C14

VGA_RED

B18

VGA_GREEN

D18

VGA_BLUE

C18
F13

MCH_DDC_DATA

L15

MCH_DDC_CLK

M15

DACREFSET

B15

CK_96M_DREF

E15

CK_96M_DREF#

D15

R291

R291

G8

10KR0402

10KR0402

G9

AN6
AR4
K15

AU4
AV4
AU2
AV1
AU3

J11
F11
P43
P42

A45
B2
BE1
BE45
R15
R14
T15
T14
AB15
R32
R31
U31
U30
L11

R259

R259

L13

X_10KR0402

X_10KR0402

R284 0R0402R284 0R0402
R281 0R0402R281 0R0402

R279

R279

PLTRST# 13,15,19,21

PWRGD_3V 15,25

ICH_SYNC# 15

R386 0R0402R386 0R0402

PM_DPRSTR_N

R297 0R0402R297 0R0402

TP14TP14

VGA_RED 23
VGA_GREEN 23
VGA_BLUE 23

MCH_DDC_DATA 23
MCH_DDC_CLK 23

1.02KR1%0402

1.02KR1%0402

CK_96M_DREF 6
CK_96M_DREF# 6

V_1P1_CORE

12

RN13

RN13

34

0R/4/8P4R

0R/4/8P4R

56
78

H_SLP#

VCC3

HSYNC 23
VSYNC 23

R279 change
from 1Kohm
to 1.02Kohm
for 0C

PM_DPRSTR_N 3,15
H_SLP# 3,21

VCC_DDR

VTT_DDR

C341

C341

C0.1U16Y0402

C0.1U16Y0402

VCC_DDR

C315 X_C10U10Y0805C315 X_C10U10Y0805

VCC_DDR

C322

C322
C1U10X

C1U10X
C317

C317
C1U10X

C1U10X
C321

C321
C1U10X

C1U10X
C320

C320
C1U10X

C1U10X

C318

C318
C4.7U10Y0805

C4.7U10Y0805
C339

C339
X_C4.7U10Y0805

X_C4.7U10Y0805

V_3P3_CL V_3P3_CL

C350

C350
C0.1U16Y0402

C0.1U16Y0402

+

+

EC60 CD820u2.5Fp-1

EC60 CD820u2.5Fp-1

1 2

EC60 change from 1000uF to 820uF for 0B

VCC_DDR

VTT_DDR

C351

C351

C0.1U16Y0402

C0.1U16Y0402

VCC_DDR

C338 X_C10U10Y0805C338 X_C10U10Y0805

VCC_DDR

EC59 X_CD820u2.5Fp-1

EC59 X_CD820u2.5Fp-1

VCC_DDR

EC58 CD820u2.5Fp-1

EC58 CD820u2.5Fp-1

EC58 mount for 0B

C347

C347
C1U10X

C1U10X
C344

C344
C1U10X

C1U10X
C343

C343
C1U10X

C1U10X
C340

C340
C1U10X

C1U10X

C319

C319
C4.7U10Y0805

C4.7U10Y0805
C342

C342
X_C4.7U10Y0805

X_C4.7U10Y0805

C335

C335
C0.1U16Y0402

C0.1U16Y0402

+

+

1 2

+

+

1 2

PSI(POWER STATE INDICATOR)

VCC5

?

?

4

C133

C133

C0.1U16Y0402

C0.1U16Y0402

P-P4402FAG_TSOP6-RH

P-P4402FAG_TSOP6-RH

PSI#_N28

Q34

Q34

X_N-2N7002_SOT23

X_N-2N7002_SOT23

A A

PSI#5,28

51

Q23

Q23

3

2

DS

G

H_CPURST#3,4,7,21

H_CPURST#3,4,7,21

PDG:page 438 ,Please put near PWM

VCC5

VCC5

5.1KR0402

5.1KR0402

C10U6.3X50805

C10U6.3X50805

VCC5

R171

R171
1KR0402

1KR0402
R158

R158
X_1KR0402

X_1KR0402

R186

R186

C148

C148

R172

R172
1KR0402

1KR0402
R163

R163
1KR0402

1KR0402

Q26

Q26
X_NN-CMKT3904_SOT363-6-RH

X_NN-CMKT3904_SOT363-6-RH

6

2

1

5

3
4

6

2

1

5

3
4

Q27

Q27
NN-CMKT3904_SOT363-6-RH

NN-CMKT3904_SOT363-6-RH

(a) R158 no mount, Q27 mount, remove R142, reserve Q34 for 0B

(b) Q34.D swap with Q34.S for 10

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Eaglelake VGA/MISC

Eaglelake VGA/MISC

Eaglelake VGA/MISC

10

10

MS-7423

MS-7423

MS-7423

1

8 38Tuesday, August 12, 2008

8 38Tuesday, August 12, 2008

8 38Tuesday, August 12, 2008

10

5

U15C

U15C

BC41

T6T6

MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14

CAS_A#
RAS_A#

P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A

DDR3_RST#
DDR3_PWROK
SCS_A#1
MAA_A0
WE_A#
DDR3_B_ODT3

5

T24T24

T22T22

SBS_A0
SBS_A1
SBS_A2

SCS_A#0

T19T19

SCKE_A0
SCKE_A1

ODT_A0
ODT_A1

VCC_DDR

DDR_A_MA_0

BC35

DDR_A_MA_1

BB32

DDR_A_MA_2

BC32

DDR_A_MA_3

BD32

DDR_A_MA_4

BB31

DDR_A_MA_5

AY31

DDR_A_MA_6

BA31

DDR_A_MA_7

BD31

DDR_A_MA_8

BD30

DDR_A_MA_9

AW43

DDR_A_MA_10

BC30

DDR_A_MA_11

BB30

DDR_A_MA_12

AM42

DDR_A_MA_13

BD28

DDR_A_MA_14

AW42

DDR_A_WEB

AU42

DDR_A_CASB

AV42

DDR_A_RASB

AV45

DDR_A_BS_0

AY44

DDR_A_BS_1

BC28

DDR_A_BS_2

AU43

DDR_A_CSB_0

AR40

DDR_A_CSB_1

AU44

DDR_A_CSB_2

AM43

DDR_A_CSB_3

BB27

DDR_A_CKE_0

BD27

DDR_A_CKE_1

BA27

DDR_A_CKE_2

AY26

DDR_A_CKE_3

AR42

DDR_A_ODT_0

AM44

DDR_A_ODT_1

AR44

DDR_A_ODT_2

AL40

DDR_A_ODT_3

AY37

DDR_A_CK_0

BA37

DDR_A_CKB_0

AW29

DDR_A_CK_1

AY29

DDR_A_CKB_1

AU37

DDR_A_CK_2

AV37

DDR_A_CKB_2

AU33

DDR_A_CK_3

AT33

DDR_A_CKB_3

AT30

DDR_A_CK_4

AR30

DDR_A_CKB_4

AW38

DDR_A_CK_5

AY38

DDR_A_CKB_5

BC24

DDR3_DRAMRSTB

AR6

DDR3_DRAM_PWROK

AR43

DDR3_A_CSB1

BB40

DDR3_A_MA0

AT44

DDR3_A_WEB

AV40

DDR3_B_ODT3

3 OF 7

3 OF 7

AC82Q45

AC82Q45

R432 1KR1%0402R432 1KR1%0402

R429

R429

1KR1%0402

1KR1%0402 C290

SYM_REV = 1.5

SYM_REV = 1.5

DDR_A

DDR_A

MCH_VREF_A

C288

C288

C0.1U16Y0402

C0.1U16Y0402

DDR_A_DQS_0

DDR_A_DQSB_0

DDR_A_DQS_1

DDR_A_DQSB_1

DDR_A_DQS_2

DDR_A_DQSB_2

DDR_A_DQS_3

DDR_A_DQSB_3

DDR_A_DQS_4

DDR_A_DQSB_4

DDR_A_DQS_5

DDR_A_DQSB_5

DDR_A_DQS_6

DDR_A_DQSB_6

DDR_A_DQS_7

DDR_A_DQSB_7

DDR_A_DM_0
DDR_A_DM_1
DDR_A_DM_2
DDR_A_DM_3
DDR_A_DM_4
DDR_A_DM_5
DDR_A_DM_6
DDR_A_DM_7

DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7
DDR_A_DQ_8

DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15
DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23
DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31
DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39
DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47
DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55
DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63

PLACE 0.1UF CAP CLOSE TO MCH

MAA_A[0..14]12

D D

CAS_A#12
RAS_A#12

SBS_A[0..2]12

SCS_A#[0..1]12

SCKE_A[0..1]12

ODT_A[0..1]12

C C

P_DDR0_A12
N_DDR0_A12

T23T23

T25T25

P_DDR2_A12
N_DDR2_A12

DDR3_RST#12

B B

A A

WE_A#12

4

DQS_A0

BC5

DQS_A#0

BD4

DQS_A1

BB9

DQS_A#1

BC9

DQS_A2

BD15

DQS_A#2

BB15

DQS_A3

AR22

DQS_A#3

AT22

DQS_A4

AH43

DQS_A#4

AH42

DQS_A5

AD43

DQS_A#5

AE42

DQS_A6

Y43

DQS_A#6

Y42

DQS_A7

T44

DQS_A#7

T43

DQM_A0

BC3

DQM_A1

BD9

DQM_A2

BD14

DQM_A3

AV22

DQM_A4

AK42

DQM_A5

AE45

DQM_A6

AA45

DQM_A7

T42

DATA_A0

BC2

DATA_A1

BD3

DATA_A2

BD7

DATA_A3

BB7

DATA_A4

BB2

DATA_A5

BA3

DATA_A6

BE6

DATA_A7

BD6

DATA_A8

BB8

DATA_A9

AY8

DATA_A10

BD11

DATA_A11

BB11

DATA_A12

BC7

DATA_A13

BE8

DATA_A14

BD10

DATA_A15

AY11

DATA_A16

BB14

DATA_A17

BC14

DATA_A18

BC16

DATA_A19

BB16

DATA_A20

BC11

DATA_A21

BE12

DATA_A22

BA15

DATA_A23

BD16

DATA_A24

AW21

DATA_A25

AY22

DATA_A26

AV24

DATA_A27

AY24

DATA_A28

AU21

DATA_A29

AT21

DATA_A30

AR24

DATA_A31

AU24

DATA_A32

AL41

DATA_A33

AK43

DATA_A34

AG42

DATA_A35

AG44

DATA_A36

AL42

DATA_A37

AK44

DATA_A38

AH44

DATA_A39

AG41

DATA_A40

AF43

DATA_A41

AF42

DATA_A42

AC44

DATA_A43

AC42

DATA_A44

AF40

DATA_A45

AF44

DATA_A46

AD44

DATA_A47

AC41

DATA_A48

AB43

DATA_A49

AA42

DATA_A50

W42

DATA_A51

W41

DATA_A52

AB42

DATA_A53

AB44

?

?

DATA_A54

Y44

DATA_A55

Y40

DATA_A56

V42

DATA_A57

U45

DATA_A58

R40

DATA_A59

P44

DATA_A60

V44

DATA_A61

V43

DATA_A62

R41

DATA_A63

R44

4

DQS_A0 12
DQS_A#0 12
DQS_A1 12
DQS_A#1 12
DQS_A2 12
DQS_A#2 12
DQS_A3 12
DQS_A#3 12
DQS_A4 12
DQS_A#4 12
DQS_A5 12
DQS_A#5 12
DQS_A6 12
DQS_A#6 12
DQS_A7 12
DQS_A#7 12

DQM_A[0..7] 12

DATA_A[0..63] 12

SLP_S4#15,21,25,27

remove C291 because C288(decoupling cap)
should be placed as close as possible to
DDR_VREF pin of GMCH for 10

remove Q54, Q56, add Q36, R385 mount,
R387& R388 not mount
C262 change from 1uF to 12nF for 0B

VCC5_SB

R387

R387

X_1KR1%0402

X_1KR1%0402

R388

R388

X_1KR1%0402

X_1KR1%0402

X_NN-CMKT3904_SOT363-6-RH

X_NN-CMKT3904_SOT363-6-RH

2
5

DDR3_PWROK#

3

U15D

BD24

BB23
BB24

BD23

BB22
BD22
BC22
BC20

BB20
BD20
BC26
BD19

BB19

BE38

BA19
BD36

BC37
BD35

BD26

BB26
BD18

BB35
BD39

BB37
BD40

BC18

AY20

BE17

BB18
BD37

BC39

BB38
BD42

AY33

AW33

AV31

AW31
AW35

AY35

AT31
AU31

AP31

AP30

AW37

AV35

BB44

AY42

BA43
BC43
BC44

AN29
AN30

AJ33

AK33

VCC_DDR

C287

C287

C0.1u16X0402

C0.1u16X0402

U15D

DDR_B_MA_0
DDR_B_MA_1
DDR_B_MA_2
DDR_B_MA_3
DDR_B_MA_4
DDR_B_MA_5
DDR_B_MA_6
DDR_B_MA_7
DDR_B_MA_8
DDR_B_MA_9
DDR_B_MA_10
DDR_B_MA_11
DDR_B_MA_12
DDR_B_MA_13
DDR_B_MA_14

DDR_B_WEB
DDR_B_CASB
DDR_B_RASB

DDR_B_BS_0
DDR_B_BS_1
DDR_B_BS_2

DDR_B_CSB_0
DDR_B_CSB_1
DDR_B_CSB_2
DDR_B_CSB_3

DDR_B_CKE_0
DDR_B_CKE_1
DDR_B_CKE_2
DDR_B_CKE_3

DDR_B_ODT_0
DDR_B_ODT_1
DDR_B_ODT_2
DDR_B_ODT_3

DDR_B_CK_0
DDR_B_CKB_0
DDR_B_CK_1
DDR_B_CKB_1
DDR_B_CK_2
DDR_B_CKB_2
DDR_B_CK_3
DDR_B_CKB_3
DDR_B_CK_4
DDR_B_CKB_4
DDR_B_CK_5
DDR_B_CKB_5

DDR_VREF

DDR_RPD
DDR_RPU
DDR_SPD
DDR_SPU

RSVD_01
RSVD_02
RSVD_03
RSVD_04

4 OF 7

4 OF 7

AC82Q45

AC82Q45

C287 change from Y5V to X7R;
C290 change from 0603 type/Y5V to 0402 type/X7R for 0B

DDR3_PWROK 15

C262

C262
C0.012u50X

C0.012u50X

MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8

MAA_B9

MAA_B10
MAA_B11
MAA_B12
MAA_B13
MAA_B14

WE_B#
CAS_B#
RAS_B#

SBS_B0
SBS_B1
SBS_B2

SCS_B#0
SCS_B#1

SCKE_B0
SCKE_B1

ODT_B0
ODT_B1

P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B

MCH_VREF_A

SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3

MAA_B[0..14]12

WE_B#12
CAS_B#12
RAS_B#12

SBS_B[0..2]12

SCS_B#[0..1]12

SCKE_B[0..1]12

ODT_B[0..1]12

P_DDR0_B12
N_DDR0_B12

T20T20

T21T21

P_DDR2_B12
N_DDR2_B12

VCC_DDR

R366

R366
10KR0402

10KR0402

Q36

Q36

6
1

R385

R385

3
4

100KR0402

100KR0402

3

2

SYM_REV = 1.5

SYM_REV = 1.5

DDR_B

DDR_B

R418 80.6R1%0402R418 80.6R1%0402
R417 80.6R1%0402R417 80.6R1%0402
R415 249R1%0402R415 249R1%0402
R416 80.6R1%0402R416 80.6R1%0402

C290
C0.1u16X0402

C0.1u16X0402

2

DDR_B_DQS_0

DDR_B_DQSB_0

DDR_B_DQS_1

DDR_B_DQSB_1

DDR_B_DQS_2

DDR_B_DQSB_2

DDR_B_DQS_3

DDR_B_DQSB_3

DDR_B_DQS_4

DDR_B_DQSB_4

DDR_B_DQS_5

DDR_B_DQSB_5

DDR_B_DQS_6

DDR_B_DQSB_6

DDR_B_DQS_7

DDR_B_DQSB_7

DDR_B_DM_0
DDR_B_DM_1
DDR_B_DM_2
DDR_B_DM_3
DDR_B_DM_4
DDR_B_DM_5
DDR_B_DM_6
DDR_B_DM_7

DDR_B_DQ_0
DDR_B_DQ_1
DDR_B_DQ_2
DDR_B_DQ_3
DDR_B_DQ_4
DDR_B_DQ_5
DDR_B_DQ_6
DDR_B_DQ_7
DDR_B_DQ_8

DDR_B_DQ_9
DDR_B_DQ_10
DDR_B_DQ_11
DDR_B_DQ_12
DDR_B_DQ_13
DDR_B_DQ_14
DDR_B_DQ_15
DDR_B_DQ_16
DDR_B_DQ_17
DDR_B_DQ_18
DDR_B_DQ_19
DDR_B_DQ_20
DDR_B_DQ_21
DDR_B_DQ_22
DDR_B_DQ_23
DDR_B_DQ_24
DDR_B_DQ_25
DDR_B_DQ_26
DDR_B_DQ_27
DDR_B_DQ_28
DDR_B_DQ_29
DDR_B_DQ_30
DDR_B_DQ_31
DDR_B_DQ_32
DDR_B_DQ_33
DDR_B_DQ_34
DDR_B_DQ_35
DDR_B_DQ_36
DDR_B_DQ_37
DDR_B_DQ_38
DDR_B_DQ_39
DDR_B_DQ_40
DDR_B_DQ_41
DDR_B_DQ_42
DDR_B_DQ_43
DDR_B_DQ_44
DDR_B_DQ_45
DDR_B_DQ_46
DDR_B_DQ_47
DDR_B_DQ_48
DDR_B_DQ_49
DDR_B_DQ_50
DDR_B_DQ_51
DDR_B_DQ_52
DDR_B_DQ_53
DDR_B_DQ_54
DDR_B_DQ_55
DDR_B_DQ_56
DDR_B_DQ_57
DDR_B_DQ_58
DDR_B_DQ_59
DDR_B_DQ_60
DDR_B_DQ_61
DDR_B_DQ_62
DDR_B_DQ_63

SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3

1

DQS_B0

AW8

DQS_B#0

AW9

DQS_B1

AT15

DQS_B#1

AU15

DQS_B2

AR20

DQS_B#2

AR17

DQS_B3

AU26

DQS_B#3

AT26

DQS_B4

AR38

DQS_B#4

AR37

DQS_B5

AK34

DQS_B#5

AL34

DQS_B6

AF37

DQS_B#6

AF36

DQS_B7

AB35

DQS_B#7

AD35

DQM_B0

AY6

DQM_B1

AR15

DQM_B2

AU17

DQM_B3

AV25

DQM_B4

AU39

DQM_B5

AL37

DQM_B6

AJ35

DQM_B7

AD37

DATA_B0

AV7

DATA_B1

AW4

DATA_B2

BA9

DATA_B3

AU11

DATA_B4

AU7

DATA_B5

AU8

DATA_B6

AW7

DATA_B7

AY9

DATA_B8

AY13

DATA_B9

AP15

DATA_B10

AW15

DATA_B11

AT16

DATA_B12

AU13

DATA_B13

AW13

DATA_B14

AP16

DATA_B15

AU16

DATA_B16

AY17

DATA_B17

AV17

DATA_B18

AR21

DATA_B19

AV20

DATA_B20

AP17

DATA_B21

AW16

DATA_B22

AT20

DATA_B23

AN20

DATA_B24

AT25

DATA_B25

AV26

DATA_B26

AU29

DATA_B27

AV29

DATA_B28

AW25

DATA_B29

AR25

DATA_B30

AP26

DATA_B31

AR29

DATA_B32

AR36

DATA_B33

AU38

DATA_B34

AN35

DATA_B35

AN37

DATA_B36

AV39

DATA_B37

AW39

DATA_B38

AU40

DATA_B39

AU41

DATA_B40

AL35

DATA_B41

AL36

DATA_B42

AK36

DATA_B43

AJ34

DATA_B44

AN39

DATA_B45

AN40

DATA_B46

AK37

DATA_B47

AL39

DATA_B48

AJ38

DATA_B49

AJ37

DATA_B50

AF38

DATA_B51

AE37

?

?

DATA_B52

AK40

DATA_B53

AJ40

DATA_B54

AF34

DATA_B55

AE35

DATA_B56

AD40

DATA_B57

AD38

DATA_B58

AB40

DATA_B59

AA39

DATA_B60

AE36

DATA_B61

AE39

DATA_B62

AB37

DATA_B63

AB38

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

DQS_B0 12
DQS_B#0 12
DQS_B1 12
DQS_B#1 12
DQS_B2 12
DQS_B#2 12
DQS_B3 12
DQS_B#3 12
DQS_B4 12
DQS_B#4 12
DQS_B5 12
DQS_B#5 12
DQS_B6 12
DQS_B#6 12
DQS_B7 12
DQS_B#7 12

DQM_B[0..7] 12

DATA_B[0..63] 12

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Eaglelake Memory

Eaglelake Memory

Eaglelake Memory

MS-7423

MS-7423

MS-7423

1

10

10

9 38Tuesday, August 12, 2008

9 38Tuesday, August 12, 2008

9 38Tuesday, August 12, 2008

10

5

4

3

2

1

Power name change from
V_1P1_CORE to
V_FSB_VTT for 0C

D D

C C

V_1P5_ICH

remove R569,
add CP4 for 10

(a) remove R365 for 0C

V_1P1_CORE

B B

V_1P5_ICH

(b) R381 not mount;
add R365,C622;
add R569 and
reserve R632
for 10

A A

If has noise stuff L01-1006014-J07
,IND INDUCTOR,10uH,10%,0805,100mA,1.0Ohm,,RoHS COMPLIANCE

V_1P1_CL

V_1P1_CL

R235

R235
0R0603

0R0603

CP4

CP4

1 2

X_COPPER

X_COPPER

V_3P3_DAC_FILTERED

V_1P5_EXP_FB

C622 C4.7u6.3X5-1C622 C4.7u6.3X5-1
R365 0R0603R365 0R0603

R381 X_0R0603R381 X_0R0603

R569 0R0402R569 0R0402

R632

R632

X_0R0402

X_0R0402

V_CKDDR

C251

C251

C1U16Y

C1U16Y

V_1P1_CORE

V_1P1_CORE

U15F

U15F

V_FSB_VTT

A25

VTT_FSB_01

B25

VTT_FSB_02

B26

VTT_FSB_03

C24

VTT_FSB_04

C26

VTT_FSB_05

D22

VTT_FSB_06

D23

VTT_FSB_07

D24

VTT_FSB_08

E23

VTT_FSB_09

F21

VTT_FSB_10

F22

VTT_FSB_11

G21

VTT_FSB_12

G22

VTT_FSB_13

H21

VTT_FSB_14

H22

VTT_FSB_15

J21

VTT_FSB_16

J22

VTT_FSB_17

K21

VTT_FSB_18

K22

VTT_FSB_19

L21

VTT_FSB_20

L22

VTT_FSB_21

M21

VTT_FSB_22

M22

VTT_FSB_23

N20

VTT_FSB_24

N21

VTT_FSB_25

N22

VTT_FSB_26

P20

VTT_FSB_27

P21

VTT_FSB_28

P22

VTT_FSB_29

P24

VTT_FSB_30

R20

VTT_FSB_31

R21

VTT_FSB_32

R23

VTT_FSB_34

R24

VTT_FSB_35

R22

VTT_FSB_36

VCCD_CRT

B20

VCCDQ_CRT

VCCA_GPLL

B16

AK32
AL31

AL32
AM31
AM30

L7

A21
B22
B12
U33

D20
C20

D19
B19

E19
A17

AG2
AR2

B17

VCCAPLL_EXP
VCCA_MPLL
VCCA_HPLL
VCCDPLL_EXP
VCCD_HPLL

VCCA_DPLLA
VCCA_DPLLB

VCCA_DAC_01
VCCA_DAC_02

VCC3_3_1
VCC_EXP

VCCAVRM_EXP
VCC_HDA

VSS_369

VCC_SMCLK_04
VCC_SMCLK_03
VCC_SMCLK_02
VCC_SMCLK_01
VCCCML_DDR

V_1P1_CL

0R0805L70R0805

VCCA_MPLL
VCCA_HPLL
VCCA_GPLLD
V_1P1_HPL

VCCA_DPLLA
VCCA_DPLLB

VCC3

R362

R362
0R0603

0R0603

Separate when AMT is
supported

5

?

?

AB24

AB22

AB20

AA30

AA27

AA29

AA25

AA21

AA23

AA19

SYM_REV = 1.5

SYM_REV = 1.5

VCC_09

VCC_08

VCC_07

VCC_05

VCC_06

VCC_04

VCC_02

VCC_03

VCC_01

6 OF 7

6 OF 7

AC82Q45

AC82Q45

VCC_CL_06

VCC_CL_05

VCC_CL_04

VCC_CL_03

VCC_CL_02

VCC_CL_01

AJ15

AK14

AM22

AM24

AM25

AM26

AM29

remove R257;
L7 change from 10uH to 0ohm for 0B

R258 1R1%R258 1R1% R210 1R1%R210 1R1%

C194

C194

C10U10Y0805

C10U10Y0805

AB30

AB29

AB26

VCC_13

VCC_12

VCC_10

VCC_11

VCC_CL_10

VCC_CL_09

VCC_CL_08

VCC_CL_07

AM17

AM20

AM21

VCCA_GPLL

AC19

AC17

AC16

VCC_16

VCC_15

VCC_14

VCC_CL_13

VCC_CL_12

VCC_CL_11

AL30

AM15

AM16

AC21

AC23

VCC_17

VCC_CL_14

AJ32

AK31

C195

C195
C0.1U16Y0402

C0.1U16Y0402

AC29

AC27

AC25

VCC_21

VCC_20

VCC_18

VCC_19

VCC_CL_18

VCC_CL_17

VCC_CL_16

VCC_CL_15

AF32

AE32

AE33

AD16

AD17

AD20

VCC_22

VCC_23

VCC_24

VCC_CL_21

VCC_CL_20

VCC_CL_19

AB33

AD32

AD33

V_1P1_CL

4

AD22

AB32

AE21

AE17

AE19

AE16

AD29

AD26

AD24

VCC_30

VCC_31

VCC_29

VCC_28

VCC_27

VCC_25

VCC_26

VCC_CL_24

VCC_CL_23

VCC_CL_22

VCC_CL_28

VCC_CL_27

VCC_CL_26

VCC_CL_25

Y32

Y33

AP1

AP2

AM4

AA32

AA33

If has noise stuff L01-22A7013-M09
,IND INDUCTOR,2.2uH,20%,0603,120mA,0.4Ohm,RoHS COMPLIANCE

R209

R209
0R0603

0R0603

AF19

AF17

AE27

AE29

AF16

AE25

AE23

VCC_38

VCC_35

VCC_36

VCC_37

VCC_34

VCC_33

VCC_32

POWER

POWER

VCC_CL_35

VCC_CL_34

VCC_CL_33

VCC_CL_32

VCC_CL_31

VCC_CL_30

VCC_CL_29

AM2

AM3

AL24

AL25

AL26

AL27

AL29

VCCA_MPLL

AF20

AF21

AF22

VCC_40

VCC_41

VCC_42

VCC_39

VCC_CL_39

VCC_CL_38

VCC_CL_37

VCC_CL_36

AL21

AL22

AL23

AF26

AF25

AF24

AF23

VCC_45

VCC_44

VCC_43

VCC_CL_42

VCC_CL_41

VCC_CL_40

AL16

AL17

AL19

AL20

R212 1R1%R212 1R1%

AF27

VCC_46

VCC_CL_43

AL15

AG17

AG16

AF29

VCC_50

VCC_49

VCC_48

VCC_47

VCC_CL_47

VCC_CL_46

VCC_CL_45

VCC_CL_44

AL11

AL12

AL14

AG24

AG20

AG22

VCC_53

VCC_51

VCC_52

VCC_CL_48

VCC_CL_50

VCC_CL_49

AL8

AL9

AL10

AJ19

AJ17

AJ16

AG29

AG26

VCC_57

VCC_56

VCC_55

VCC_54

VCC_CL_54

VCC_CL_53

VCC_CL_52

VCC_CL_51

AL2

AL4

AL5

AL6

AL7

V_1P1_CL

C147

C147
C10U10Y0805

C10U10Y0805

3

AJ21

AJ25

AJ23

VCC_59

VCC_58

VCC_61

VCC_60

VCC_CL_58

VCC_CL_57

VCC_CL_56

VCC_CL_55

AL1

AK29

AK30

W27

W25

W23

W21

U29

W19

U27

U26

U25

U24

U23

U22

U21

T29

T26

T27

T25

T24

T21

R29

R27

R26

R25

VCC_86

VCC_85

VCC_84

VCC_83

VCC_81

VCC_82

VCC_80

VCC_79

VCC_78

VCC_77

VCC_76

VCC_75

VCC_74

VCC_73

VCC_71

VCC_72

VCC_70

VCC_69

VCC_66

VCC_65

VCC_64

VCC_63

VCC_62

VCC_CL_83

VCC_CL_80

VCC_CL_79

VCC_CL_78

VCC_CL_77

VCC_CL_76

VCC_CL_75

VCC_CL_74

VCC_CL_73

VCC_CL_72

VCC_CL_71

VCC_CL_70

VCC_CL_69

VCC_CL_68

VCC_CL_67

VCC_CL_66

VCC_CL_65

VCC_CL_64

VCC_CL_63

VCC_CL_62

VCC_CL_61

VCC_CL_60

VCC_CL_59

AJ30

AJ31

AF31

AE31

AK16

AK17

AK19

AK20

AK21

AK22

AK23

AK24

AK25

AK26

AK27

If has noise stuff L01-27BA013-M09
,IND INDUCTOR,0.27uH,5%,0603,110mA,3.4Ohm,RoHS COMPLIANCE

R211

R211
0R0603

0R0603

AG31

AG30

AD31

AC31

AB31

VCC_CL_81

Y31

AJ27

AJ29

AA31

VCCA_HPLL

VCC_CL_82

Y30

Y22

Y20

W29

VCC_89

VCC_88

VCC_87

VCC_CL_84

VCC_CL_85

Y29

W31

C161

C161
C2.2U6.3Y

C2.2U6.3Y

Y26

Y24

VCC_90

VCC_91

T22

VCC_96

VCC_98

VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104

VCC_EXP_1
VCC_EXP_2
VCC_EXP_3
VCC_EXP_4

VCC_EXP_5
VCC_EXP_06
VCC_EXP_07
VCC_EXP_08
VCC_EXP_09
VCC_EXP_10
VCC_EXP_11
VCC_EXP_12
VCC_EXP_13
VCC_EXP_14
VCC_EXP_15
VCC_EXP_16
VCC_EXP_17
VCC_EXP_18
VCC_EXP_19
VCC_EXP_20
VCC_EXP_21
VCC_EXP_22
VCC_EXP_23
VCC_EXP_24
VCC_EXP_25
VCC_EXP_26
VCC_EXP_27
VCC_EXP_28
VCC_EXP_29
VCC_EXP_30
VCC_EXP_31
VCC_EXP_32
VCC_EXP_33
VCC_EXP_34
VCC_EXP_35
VCC_EXP_36
VCC_EXP_37
VCC_EXP_38

VCC_SM_01

VCC_SM_02

VCC_SM_03

VCC_SM_04

VCC_SM_05

VCC_SM_06

VCC_SM_07

VCC_SM_08

VCC_SM_09

VCC_SM_10

VCC_SM_11

VCC_SM_12

VCC_SM_13

VCC_SM_14

VCC_SM_15

2

T23

VCC_97

V_1P1_CORE

AC4
AF3
F9
H4
L3
P3
V4

AJ1
AJ2
AK2
AK3
AK4
AK13
AK12
AK11
AK10
AK9
AK8
AK7
AK6
AJ14
AJ13
AJ12
AJ11
AJ10
AJ9
AJ8
AJ7
AJ6
AG15
AF15
AF14
AE15
AE14
AD15
AD14
AC15
AB14
AA15
AA14
Y15
Y14
W15
U15
U14

VCC_DDR

AP44
AT45
AV44
AY40
BA41
BB39
BD21
BD25
BD29
BD34
BD38
BE23
BE27
BE31
BE36

V_1P1_CORE

V_1P1_CORE

V_CKDDR

VCC3

V_1P1_CORE

V_1P1_CORE

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

V_3P3_DAC_FILTERED

C247 C10U10Y0805C247 C10U10Y0805
C248

C248

L23

L23

10u100mA_0805-RH

10u100mA_0805-RH

R348 1R1%R348 1R1%
R349 1R1%R349 1R1%

VCCD_CRT

C0.1U16Y0402

C0.1U16Y0402

R552 1R1%R552 1R1%

C451

C451

C4.7u6.3X50805

C4.7u6.3X50805

L3 10U100m_0805L3 10U100m_0805

L2 10U100m_0805L2 10U100m_0805

R553

R553

40.2R1%0402

40.2R1%0402

X_C10U10Y0805

X_C10U10Y0805

R556 1R1%R556 1R1%
R555 1R1%R555 1R1%

C10U10Y0805

C10U10Y0805

C453

C453

X_C0.1U16Y0402

X_C0.1U16Y0402

+

+

12

+

+

12

MS-7423

MS-7423

MS-7423

V_1P5_EXP_FB

VCCA_GPLLD

C454

C454

VCC_DDR

C175

C175
C1U16Y

C1U16Y

V_3P3_DAC_FILTERED

EC69

EC69
X_C22u6.3X1206

X_C22u6.3X1206

VCCA_DPLLA

C168

C168
C0.1U16Y0402

C0.1U16Y0402

VCCA_DPLLB

C167

C167
C0.1U16Y0402

C0.1U16Y0402

10 38Thursday, August 07, 2008

10 38Thursday, August 07, 2008

1

10 38Thursday, August 07, 2008

R554 1R1%0402R554 1R1%0402

R551

R551

39.2R1%

39.2R1%

L9 10u100mA_0805-RHL9 10u100mA_0805-RH

EC47

EC47
C22u6.3X1206

C22u6.3X1206

C177

C177

EC37

EC37

C470u4pSO

C470u4pSO

EC36

EC36

C470u4pSO

C470u4pSO

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Eaglelake Power

Eaglelake Power

Eaglelake Power

C455

C455
C0.1U16Y0402

C0.1U16Y0402

10

10

10

5

4

3

2

1

All cap place close to GMCH

<$LOCATION>

<$LOCATION>

A3

A43

B44

BC1

BC45

BD2

BD44

BE3

F1

VSS_361

VSS_362

VSS_103

VSS_104

VSS_105

AN21

AN22

VSS_360

VSS_359

VSS_106

VSS_107

AN24

AN25

VSS_358

VSS_357

VSS_108

VSS_109

AN26

AN33

BE43

Y9

VSS_356

VSS_110

AN36

AN38

Y35

Y39

VSS_353

VSS_354

VSS_355

VSS_111

VSS_112

VSS_113

AN7

AP20

Y27

Y3

VSS_351

VSS_352

VSS_114

VSS_115

AP21

AP22

Y23

Y25

VSS_349

VSS_350

VSS_116

VSS_117

AP24

AP25

Y2

Y21

VSS_347

VSS_348

VSS_118

VSS_119

AP29

AP45

4

Y17

Y19

VSS_345

VSS_346

VSS_120

VSS_121

AR10

AR11

Y13

Y16

VSS_343

VSS_344

VSS_122

VSS_123

AR13

AR16

Y11

Y12

VSS_341

VSS_342

VSS_124

VSS_125

AR3

AR26

W5

Y10

VSS_339

VSS_340

VSS_126

VSS_127

AR31

AR33

W44

W45

VSS_337

VSS_338

VSS_128

VSS_129

AR35

AR39

W24

W26

VSS_335

VSS_336

VSS_130

VSS_131

AR8

AR9

W2

W20

W22

W17

W16

W1

U8

U44

VSS_332

VSS_333

VSS_334

VSS_331

VSS_330

VSS_329

VSS_328

VSS_327

GND

GND

VSS_132

VSS_133

VSS_134

VSS_135

VSS_139

VSS_138

VSS_137

VSS_136

AT1

AT2

AT11

AT13

AT17

AT35

AT29

AT24

U39

U36

VSS_326

VSS_325

VSS_141

VSS_140

AU22

AU20

U20

U19

VSS_324

VSS_323

VSS_143

VSS_142

AU30

AU25

U17

U16

VSS_322

VSS_321

VSS_145

VSS_144

AU5

AU35

U13

U12

VSS_320

VSS_319

VSS_147

VSS_146

AU9

AU6

U1

U11

VSS_317

VSS_318

VSS_149

VSS_148

AV13

AV11

T8

T9

VSS_316

VSS_150

AV16

AV15

T6

T7

VSS_314

VSS_315

VSS_152

VSS_151

AV2

AV21

T4

T40

VSS_311

VSS_312

VSS_313

VSS_153

VSS_155

VSS_154

AV33

AV30

3

T35

T38

VSS_309

VSS_310

VSS_157

VSS_156

AV6

AV38

T32

T33

VSS_307

VSS_308

VSS_159

VSS_158

AV9

AV8

T30

T31

VSS_305

VSS_306

VSS_161

VSS_160

AW17

AW11

T20

T3

VSS_303

VSS_304

VSS_163

VSS_162

AW22

AW20

T17

T19

VSS_301

VSS_302

VSS_165

VSS_164

AW26

AW24

T13

T16

VSS_299

VSS_300

VSS_167

VSS_166

AW3

AW30

T11

T12

VSS_297

VSS_298

VSS_169

VSS_168

AY1

AY15

R8

T10

VSS_295

VSS_296

VSS_171

VSS_170

AY21

AY16

R45

R5

VSS_293

VSS_294

VSS_173

VSS_172

AY30

AY25

R30

R38

VSS_291

VSS_292

VSS_175

VSS_174

B10

AY45

R19

R2

VSS_289

VSS_290

VSS_177

VSS_176

B27

B21

R16

R17

VSS_288

VSS_178

B34

B29

R11

R12

VSS_285

VSS_286

VSS_287

VSS_181

VSS_180

VSS_179

BA5

BA23

P26

P31

VSS_283

VSS_284

VSS_182

VSS_183

BB21

BB25

P17

P25

VSS_281

VSS_282

VSS_184

VSS_185

BB6

BB28

P16

VSS_280

VSS_279
VSS_278
VSS_277
VSS_276
VSS_275
VSS_274
VSS_273
VSS_272
VSS_271
VSS_270
VSS_269
VSS_268
VSS_267
VSS_266
VSS_265
VSS_264
VSS_263
VSS_262
VSS_261
VSS_260
VSS_259
VSS_258
VSS_257
VSS_256
VSS_255
VSS_254
VSS_253
VSS_252
VSS_251
VSS_250
VSS_249
VSS_248
VSS_247
VSS_246
VSS_245
VSS_244
VSS_243
VSS_242
VSS_241
VSS_240
VSS_239
VSS_238
VSS_237
VSS_236
VSS_235
VSS_234
VSS_233
VSS_232
VSS_231
VSS_230
VSS_229
VSS_228
VSS_227
VSS_226
VSS_225
VSS_224
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199

VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189

VSS_187
VSS_186

N8
N38
N36
N33
N30
N29
N26
N16
N13
N11
M44
M25
M24
M1
L9
L8
L4
L39
L35
L30
L26
L20
L16
L10
K45
K33
K29
K24
K20
K17
K13
K11
J9
J8
J5
J4
J37
J3
H9
H8
H7
H44
H38
H33
H31
H30
H25
H20
H16
H15
H13
H11
H1
G35
G3
G29
G26
G24
G17
G11
F8
F45
F42
F4
F30
F2
F16
E5
E41
E31
E3
D7
D6
D39
D26
D25
D21
D16
D11
C5
C3

BE40
BE34
BE29
BE25
BE21
BE19
BE15
BE10
BD8

BD17
BD12

AD30

VSS

AC30

VSS

AF30

VSS

AE30

VSS

2

SYM_REV = 1.5

SYM_REV = 1.5

VSS_368

VSS_367A6VSS_365

VSS_096

VSS_097

VSS_098

VSS_099

AJ45

AK35

AK38

VSS_366

VSS_100

VSS_101

AL38

AK39

C45

VSS_364C1VSS_363

VSS_102

AL44

AL45

BD43

C16

U15G

U15G

A12

VSS_001

A15
A19
A27
A31

D D

C C

B B

A A

A36
A40

A8

AA1
AA11
AA12
AA13
AA16
AA17
AA20
AA22
AA24
AA26
AA34
AA38
AA40
AA44

AA8
AB11
AB12
AB16
AB17
AB19
AB21
AB23
AB25
AB27
AB34
AB36
AB39

AB4

AB6

AB7

AB8

AC20
AC22
AC24
AC26
AC45

AC5

AD12
AD19
AD21
AD23
AD25
AD27

AD3

AD34
AD36
AD39

AD6

AD9

AE1
AE11
AE12
AE13
AE20
AE22
AE24
AE26
AE34
AE38
AE40
AE44

AE8
AF10
AF11
AF12
AF13
AF33
AF35
AF39

AF6

AF7
AG19
AG21
AG23
AG25
AG27
AG45

AG5
AH2
AH3

AH4
AJ20
AJ22
AJ24
AJ26

5

VSS_002
VSS_003
VSS_004
VSS_005
VSS_006
VSS_007
VSS_008
VSS_009
VSS_010
VSS_011
VSS_012
VSS_013
VSS_014
VSS_015
VSS_016
VSS_017
VSS_018
VSS_019
VSS_020
VSS_021
VSS_022
VSS_023
VSS_024
VSS_025
VSS_026
VSS_027
VSS_028
VSS_029
VSS_030
VSS_031
VSS_032
VSS_033
VSS_034
VSS_035
VSS_036
VSS_037
VSS_038
VSS_039
VSS_040
VSS_041
VSS_042
VSS_043
VSS_044
VSS_045
VSS_046
VSS_047
VSS_048
VSS_049
VSS_050
VSS_051
VSS_052
VSS_053
VSS_054
VSS_055
VSS_056
VSS_057
VSS_058
VSS_059
VSS_060
VSS_061
VSS_062
VSS_063
VSS_064
VSS_065
VSS_066
VSS_067
VSS_068
VSS_069
VSS_070
VSS_071
VSS_072
VSS_073
VSS_074
VSS_075
VSS_076
VSS_077
VSS_078
VSS_079
VSS_080
VSS_081
VSS_082
VSS_083
VSS_084
VSS_085
VSS_086
VSS_087
VSS_088
VSS_089
VSS_090
VSS_091
VSS_092
VSS_093

VSS_371

VSS_372

VSS_094

VSS_095

AJ36

AJ39

7OF 7

7OF 7

AC82Q45

AC82Q45

AJ44

MCH memory decouping cap

VCC_DDR

C286 C2.2U6.3YC286 C2.2U6.3Y
C285 C2.2U6.3YC285 C2.2U6.3Y
C284 C2.2U6.3YC284 C2.2U6.3Y
C282 C2.2U6.3YC282 C2.2U6.3Y
C267 C2.2U6.3YC267 C2.2U6.3Y
C292 C2.2U6.3YC292 C2.2U6.3Y

V_1P1_CL decouping cap

V_1P1_CL

C482

C482
C484

C484
C485

C485
C483

C483

C10U10Y0805

C10U10Y0805
C10U10Y0805

C10U10Y0805
X_C10U10Y0805

X_C10U10Y0805
X_C10U10Y0805

X_C10U10Y0805

V_1P1_Core decouping cap

V_1P1_CORE

C479

C479
C468

C468
C480

C480
C467

C467
C478 C1U10XC478 C1U10X
C464 C1U10XC464 C1U10X
C477 C1U10XC477 C1U10X
C475 C1U10XC475 C1U10X
C472 C1U10XC472 C1U10X
C481 C1U10XC481 C1U10X
C461 X_C2.2U6.3YC461 X_C2.2U6.3Y
C463 X_C2.2U6.3YC463 X_C2.2U6.3Y

C10U10Y0805

C10U10Y0805

C10U10Y0805

C10U10Y0805
C10U10Y0805

C10U10Y0805

X_C10U10Y0805

X_C10U10Y0805

V_FSB_VTT decouping cap(FSB)

Power name change from

V_FSB_VTT

C473 C2.2U6.3YC473 C2.2U6.3Y
C465 C2.2U6.3YC465 C2.2U6.3Y
C470 C2.2U6.3YC470 C2.2U6.3Y
C460 C0.1U16Y0402C460 C0.1U16Y0402
C471 C0.1U16Y0402C471 C0.1U16Y0402
C474 C0.1U16Y0402C474 C0.1U16Y0402

V_1P1_CORE to
V_FSB_VTT for 0C

V_1P1_Core decouping cap(PCIE)

V_1P1_CORE

C466 C2.2U6.3YC466 C2.2U6.3Y

C462 C2.2U6.3YC462 C2.2U6.3Y

C469 C2.2U6.3YC469 C2.2U6.3Y

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

MICRO-START INT'L CO.,LTD.

Eaglelake GND

Eaglelake GND

Eaglelake GND

10

10

MS-7423

MS-7423

MS-7423

1

11 38Monday, July 14, 2008

11 38Monday, July 14, 2008

11 38Monday, July 14, 2008

10

5

VCC_DDR

DATA_A[0..63]9

DATA_A0
DATA_A1

R481

R481
1KR1%0402

1KR1%0402

DATA_A2
DATA_A3
DATA_A4

122

DATA_A5

123

DATA_A6

128

DATA_A7

129

DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12

131

DATA_A13

132

DATA_A14

137

DATA_A15

138

DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20

140

DATA_A21

141

DATA_A22

146

DATA_A23

147

DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28

149

DATA_A29

150

DATA_A30

155

DATA_A31

156

DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36

200

DATA_A37

201

DATA_A38

206

DATA_A39

207

DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44

209

DATA_A45

210

DATA_A46

215

DATA_A47

216

DATA_A48
DATA_A49

100

DATA_A50

105

DATA_A51

106

DATA_A52

218

DATA_A53

219

DATA_A54

224

DATA_A55

225

DATA_A56

108

DATA_A57

109

DATA_A58

114

DATA_A59

115

DATA_A60

227

DATA_A61

228

DATA_A62

233

DATA_A63

234

101

104

DIMM_VREF_CA_A DIMM_VREF_DQ_A

R478

R478

1KR1%0402

1KR1%0402

5

D D

C C

B B

A A

VCC_DDR VCC_DDR

54

DIMM1

DIMM1

3

DQ0

VDD51VDD
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

107

VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD

VSS

VSS

VSS

VSS

VSS

110

113

116

119

121

C334

C334

C0.1U16Y0402

C0.1U16Y0402

4
9

10

12
13
18
19

21
22
27
28

30
31
36
37

81
82
87
88

90
91
96
97

99

2
5

8
11
14
17
20
23
26
29
32
35
38
41
44
47
80
83
86
89
92
95
98

VSS

170

173

176

179

182

183

VDD

VDD

VDD

VDD

VDD

DDR3

DDR3

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

124

127

130

133

136

139

142

145

148

151

154

157

186

189

191

194

VDD

VDD

VDD

VSS

VSS

VSS

160

163

166

199

R475

R475
1KR1%0402

1KR1%0402

VDD

VSS

4

V_3P3_CL VTT_DDR

68

236

120

197

240

VTT

VTT

VDD

VDDSPD

NC/PAR_IN

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

202

205

208

211

214

217

220

223

R477

R477

1KR1%0402

1KR1%0402

4

167

53

48

79

RSVD

FREE1

NC/TEST4

NC/ERR_OUT

DM1/DQS10
DM2/DQS11
DM3/DQS12
DM4/DQS13
DM5/DQS14
DM6/DQS15
DM7/DQS16
DM8/DQS17

VSS

VSS

VSS

VSS

226

229

232

235

FREE249FREE3

DM0/DQS9

NC/DQS9#
NC/DQS10#
NC/DQS11#
NC/DQS12#
NC/DQS13#
NC/DQS14#
NC/DQS15#
NC/DQS16#
NC/DQS17#

CK1#(NU)

VSS

239

187

198

MAA_A0

188

A0

MAA_A1

181

A1

FREE4

MAA_A2

61

A2

MAA_A3

180

A3

MAA_A4

59

A4

MAA_A5

58

A5

MAA_A6

178

A6

MAA_A7

56

A7

MAA_A8

177

A8

MAA_A9

175

A9

MAA_A10

70

A10/AP

RESET#

CK1(NU)

VREFDQ
VREFCA

MEC1

MEC1

MAA_A11

55

A11

MAA_A12

174

A12

MAA_A13

196

A13

MAA_A14

172

A14

171

A15

39

CB0

40

CB1

45

CB2

46

CB3

158

CB4

159

CB5

164

CB6

165

CB7

DQS_A0

7

DQS0

DQS_A#0

6

DQS0#

DQS_A1

16

DQS1

DQS_A#1

15

DQS1#

DQS_A2

25

DQS2

DQS_A#2

24

DQS2#

DQS_A3

34

DQS3

DQS_A#3

33

DQS3#

DQS_A4

85

DQS4

DQS_A#4

84

DQS4#

DQS_A5

94

DQS5

DQS_A#5

93

DQS5#

DQS_A6

103

DQS6

DQS_A#6

102

DQS6#

DQS_A7

112

DQS7

DQS_A#7

111

DQS7#

43

DQS8

42

DQS8#

DQM_A0

125
126

DQM_A1

134
135

DQM_A2

143
144

DQM_A3

152
153

DQM_A4

203
204

DQM_A5

212
213

DQM_A6

221
222

DQM_A7

230
231
161
162

ODT_A0

195

ODT0

ODT_A1

77

ODT1

SCKE_A0

50

CKE0

SCKE_A1

169

CKE1

SCS_A#0

193

CS0#

SCS_A#1

76

CS1#

SBS_A0

71

BA0

SBS_A1

190

BA1

SBS_A2

52

BA2

WE_A#

73

WE#

RAS_A#

192

RAS#

CAS_A#

74

CAS#

168

P_DDR2_A

184

CK0

N_DDR2_A

185

CK0#

P_DDR0_A

63

N_DDR0_A

64

DIMM_VREF_DQ_A

1

DIMM_VREF_CA_A

67

SMBCLK_DDR

118

SCL

SMBDATA_DDR

238

SDA

237

SA1

117

SA0

MEC2

MEC3

DDRIII-240P_BLACK-RH-2

DDRIII-240P_BLACK-RH-2

MEC2

MEC3

PLACE CLOSE TO DIMM PIN

C349

C349

C0.1U16Y0402

C0.1U16Y0402

3

SMBCLK_DDR

SMBDATA_DDR

PLACE CLOSE TO DIMM PIN

VCC_DDR VCC_DDR

MAA_A[0..14] 9

DQS_A0 9
DQS_A#0 9
DQS_A1 9
DQS_A#1 9
DQS_A2 9
DQS_A#2 9
DQS_A3 9
DQS_A#3 9
DQS_A4 9
DQS_A#4 9
DQS_A5 9
DQS_A#5 9
DQS_A6 9
DQS_A#6 9
DQS_A7 9
DQS_A#7 9

DQM_A[0..7] 9

WE_A# 9
CAS_A# 9

DDR3_RST# 9

P_DDR2_A 9
N_DDR2_A 9
P_DDR0_A 9
N_DDR0_A 9

SMBUS
0A1H

ADDRESS: 0000
0xA0

R480

R480
1KR1%0402

1KR1%0402

R496 33R0402-2R496 33R0402-2

R497 33R0402-2R497 33R0402-2

ODT_A[0..1] 9
SCKE_A[0..1] 9
SCS_A#[0..1] 9
SBS_A[0..2] 9

DIMM_VREF_CA_B DIMM_VREF_DQ_B

R472

R472

1KR1%0402

1KR1%0402

3

SMBCLK 6,15,21

SMBDATA 6,15,21

DATA_B[0..63]9

DATA_B0
DATA_B1
DATA_B2
DATA_B3
DATA_B4
DATA_B5
DATA_B6
DATA_B7
DATA_B8
DATA_B9
DATA_B10
DATA_B11
DATA_B12
DATA_B13
DATA_B14
DATA_B15
DATA_B16
DATA_B17
DATA_B18
DATA_B19
DATA_B20
DATA_B21
DATA_B22
DATA_B23
DATA_B24
DATA_B25
DATA_B26
DATA_B27
DATA_B28
DATA_B29
DATA_B30
DATA_B31
DATA_B32
DATA_B33
DATA_B34
DATA_B35
DATA_B36
DATA_B37
DATA_B38
DATA_B39
DATA_B40
DATA_B41
DATA_B42
DATA_B43
DATA_B44
DATA_B45
DATA_B46
DATA_B47
DATA_B48
DATA_B49
DATA_B50
DATA_B51
DATA_B52
DATA_B53
DATA_B54
DATA_B55
DATA_B56
DATA_B57
DATA_B58
DATA_B59
DATA_B60
DATA_B61
DATA_B62
DATA_B63

PLACE CLOSE TO DIMM PIN PLACE CLOSE TO DIMM PIN

C337

C337

C0.1U16Y0402

C0.1U16Y0402

DIMM2

DIMM2

3
4
9

10
122
123
128
129

12

13

18

19
131
132
137
138

21

22

27

28
140
141
146
147

30

31

36

37
149
150
155
156

81

82

87

88
200
201
206
207

90

91

96

97
209
210
215
216

99
100
105
106
218
219
224
225
108
109
114
115
227
228
233
234

2
5

8
11
14
17
20
23
26
29
32
35
38
41
44
47
80
83
86
89
92
95
98

101
104

R474

R474
1KR1%0402

1KR1%0402

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VCC_DDR

VSS

107

2

54

VDD51VDD

VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD

VSS

VSS

VSS

VSS

VSS

VSS

VSS

110

113

116

119

121

124

127

R476

R476

1KR1%0402

1KR1%0402

2

VSS

VSS

130

133

170

173

VDD

DDR3

DDR3

VSS

VSS

VSS

VSS

136

139

142

145

C348

C348

C0.1U16Y0402

C0.1U16Y0402

1

V_3P3_CL VTT_DDR

167

53

68

236

176

179

182

183

186

189

VDD

VDD

VDD

VDD

VDD

VSS

VSS

VSS

VSS

VSS

148

151

154

157

160

163

120

191

194

197

VDD

VDD

VDD

VDD

VDDSPD

VSS

VSS

VSS

VSS

VSS

VSS

VSS

166

199

202

205

208

211

214

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

VTT

VSS

240

217

VTT

VSS

220

NC/PAR_IN

VSS

VSS

223

226

48

187

198

79

MAA_B0

188

A0

MAA_B1

RSVD

NC/TEST4

NC/ERR_OUT

VSS

VSS

VSS

229

232

181

A1

FREE1

FREE249FREE3

FREE4

MAA_B2

61

A2

MAA_B3

180

A3

MAA_B4

59

A4

MAA_B5

58

A5

MAA_B6

178

A6

MAA_B7

56

A7

MAA_B8

177

A8

MAA_B9

175

A9

MAA_B10

70

A10/AP

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS8#

DM0/DQS9
NC/DQS9#

DM1/DQS10

NC/DQS10#

DM2/DQS11

NC/DQS11#

DM3/DQS12

NC/DQS12#

DM4/DQS13

NC/DQS13#

DM5/DQS14

NC/DQS14#

DM6/DQS15

NC/DQS15#

DM7/DQS16

NC/DQS16#

DM8/DQS17

NC/DQS17#

RESET#

CK1(NU)

CK1#(NU)

VREFDQ
VREFCA

VSS

VSS

MEC1

235

239

MEC1

MAA_B11

55

A11

MAA_B12

174

A12

MAA_B13

196

A13

MAA_B14

172

A14

171

A15

39

CB0

40

CB1

45

CB2

46

CB3

158

CB4

159

CB5

164

CB6

165

CB7

DQS_B0

7

DQS0

DQS_B#0

6

DQS_B1

16

DQS1

DQS_B#1

15

DQS_B2

25

DQS2

DQS_B#2

24

DQS_B3

34

DQS3

DQS_B#3

33

DQS_B4

85

DQS4

DQS_B#4

84

DQS_B5

94

DQS5

DQS_B#5

93

DQS_B6

103

DQS6

DQS_B#6

102

DQS_B7

112

DQS7

DQS_B#7

111
43

DQS8

42

DQM_B0

125
126

DQM_B1

134
135

DQM_B2

143
144

DQM_B3

152
153

DQM_B4

203
204

DQM_B5

212
213

DQM_B6

221
222

DQM_B7

230
231
161
162

ODT_B0

195

ODT0

ODT_B1

77

ODT1

SCKE_B0

50

CKE0

SCKE_B1

169

CKE1

SCS_B#0

193

CS0#

SCS_B#1

76

CS1#

SBS_B0

71

BA0

SBS_B1

190

BA1

SBS_B2

52

BA2

WE_B#

73

WE#

RAS_B#

192

RAS#

CAS_B#

74

CAS#

DDR3_RST#DDR3_RST#

168

P_DDR0_B

184

CK0

N_DDR0_B

185

CK0#

P_DDR2_B

63

N_DDR2_B

64

DIMM_VREF_DQ_B

1

DIMM_VREF_CA_B

67

SMBCLK_DDR

118

SCL

SMBDATA_DDR

238

SDA

237

SA1

117

SA0

MEC2

MEC3

DDRIII-240P_BLACK-RH-2

DDRIII-240P_BLACK-RH-2

SMBUS

MEC2

MEC3

0A5H
ADDRESS: 0100
0xA4

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

DDR3 DIMM 1 & 2

DDR3 DIMM 1 & 2

DDR3 DIMM 1 & 2

MS-7423

MS-7423

MS-7423

1

MAA_B[0..14] 9

DQS_B0 9
DQS_B#0 9
DQS_B1 9
DQS_B#1 9
DQS_B2 9
DQS_B#2 9
DQS_B3 9
DQS_B#3 9
DQS_B4 9
DQS_B#4 9
DQS_B5 9
DQS_B#5 9
DQS_B6 9
DQS_B#6 9
DQS_B7 9
DQS_B#7 9

DQM_B[0..7] 9

ODT_B[0..1] 9
SCKE_B[0..1] 9
SCS_B#[0..1] 9
SBS_B[0..2] 9

WE_B# 9
RAS_B# 9RAS_A# 9
CAS_B# 9

P_DDR0_B 9
N_DDR0_B 9
P_DDR2_B 9
N_DDR2_B 9

V_3P3_CL

12 38Tuesday, August 12, 2008

12 38Tuesday, August 12, 2008

12 38Tuesday, August 12, 2008

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10

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