MSI MS-7420N1 Schematic B
5
CONTENT SHEET
4
3
2
1
Cover Sheet, Block diagram
D D
Intel LGA775 CPU
CLOCK Generator-IIDTCV184-2APAG8
Eaglelake FSB/PCIE
Eaglelake VGA/MSIC
Eaglelake Memory
1-2
3-5
6
7
8
9
NEC:LunarEagle
MSI:MS-7420N1
Version:0A
Eaglelake Power
Eaglelake GND
DDR3 DIMM 1 & 2
C C
PCI -EXPRESS X16-PORT
ICH10 PCI/DMI/USB/PCI_E
ICH10 Host/SATA/Lan/LPC/Misc
ICH10 Power & GND
RISER& SATA Slots
LAN-Boazman
CPU/PSU/SYS FAN & TPM1.2
HD AUDIO-ALC262
B B
SIO SMSC SCH5617 & FDD
KB/MS/LPT/COM Port
VGA CONNECTOR
USB CONNECTORS
ACPI CONTROLLER MS7
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
CPU:
Conroe family processors /WolfDale/Yorkfield in LGA775 Package.
System Chipset:
Intel EagleLake-Q+Intel ICH10-DO
On Board Device:
BIOS -- SPI Flash 32M
LAN --INTEL 82567LM Boazman
Super I/O -- SMSC5617
AUDIO -- Realtek HD ALC262
Clock GEN-IDTCV184-2
TPM-SLB 9635 TT1.2
Main Memory:
Due-channel DDR-III * 2 (1066MHZ)
Intersil PWM:
Controller: Intersil ISL6334 (3 Phases)
Expansion Slots:
PCI-E(X16) Slot *1
Riser Slot :(PCIx1/PCI-E(x1)x1)
DIMM/GMCH POWER
iAMT POWER
A A
Intersil 6326 3Phase
ATX CONNECTOR/SPEAKER
26
27
28
29
30~31GPIO PIN definition & MANUAL
POWER DELIVERY & POWER OK 32~33
5
4
MS-6497N1
MS-7420-0A
MS-4046-2A
MS-4085-10
MS-4048-3A
MS-4121-10
ERP Number
601-7420-A10
604-4046-020
Mainboard
Power Buttom/LED board
Functiom
604-4085-020 Front Audio Board
604-4048-040
Front USB Board
604-4121-010 Riser Card
3
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
COVER SHEET
COVER SHEET
COVER SHEET
0A
0A
MS-7420N1
MS-7420N1
MS-7420N1
1
134Monday, January 28, 2008
134Monday, January 28, 2008
134Monday, January 28, 2008
0A
of
of
of
1
Block Diagram
VRM 11
Intersil 6334
3-Phase PWM
PCI EXPRESS
PCI EXPRESS X16
X16
Connector
Analog
RGB
Video
Out
SATA
A A
SATA 0~1,4
USB
USB Port 0~7
Azalia
ALC262
Audio Codec
GLCI/LCI
GIGA LAN
INTEL 82567
SPI
SPI
FLASH
Intel LGA775 Processor
FSB
EAGLELAKE-Q
GMCH
DMI
ICH10
(DO)
LPC Bus
DDRIII
PCI X1
PCI EXPRESS X1
LPC Bus
LPC SIO
SMSC
SCH5617
DDR III
DIMM
Modules
x2
Riser Slot 1
TPM1.2-SLB9635TT
Board Stack-up (6 layers)
(1080 Prepreg Considerations)
Solder Mask
Prepreg 2.7~3.5 mils (typical 3mils)
Prepreg 2.7~3.5 mils (typical 3mils)
CORE 43mils
Prepreg 2.7~3.5 mils (typical 3mils)
Prepreg 2.7~3.5 mils (typical 3mils)
Solder Mask
Single End 50ohm Top/Bottom : 4mils
USB2.0 - 90ohm : 15/4.5/7.5/4.5/15
SATA - 95ohm : 15/4/8/4/15
LAN - 100ohm : 15/4/8/4/15
PCIE - 95ohm : 15/4/8/4/15
IEEE1394 - 110ohm : 15/4/9/4/15
Differencial Clock : 18/4/10/4/18
Example Fab Drawing Note (1080 Prepreg PCB)
Trace
Differential
Width
Spacing
(mils)
(mils)
NA
6.5
NA
7.5
NA
9.5
NA
8.1
3.9
7.5
4.5
Eaglelake(GMCH) Impedance Requirements by Interface
Interface
FSB(All)
Controller Link
DDR2(DQ,DQS,DM,CLK,CLK#)
DDR2(Control)
DDR2(Command)
DDR3(CLK,CLK#)
DDR3(DQ,DQS,DM)
DDR3(Control)
DDR3(Command)
PCI Express,DMI
VGA
1/2 oz. Copper & 1.4mils plating=2mils
1 oz.(1.2mils) Copper
1 oz.(1.2mils) Copper
1 oz.(1.2mils) Copper
1 oz.(1.2mils) Copper
1/2 oz. Copper & 1.4mils plating=2mils
Target Impedance
50-ohm,single-ended4.0
40-ohm,single-ended
37-ohm,single-ended
32-ohm,single-ended
95-ohm,differential
90-ohm,differential
Impedance Required
4x signals 42-ohm,others 50-hom,single-ended
50-ohm,single-ended
40-ohm,single-ended
43-ohm,single-ended
33-ohm,single-ended
36-ohm,single-ended
50/37-ohm,single-ended
36-ohm,single-ended
32-ohm,single-ended
95-ohm,differential
37-ohm,single-ended at MCH breakout,then
50-ohm,single-ended to VGA connector
Tolerance
15%
15%
15%
15%
20%,reference only
20%,reference only
Line_In
Line_Out
Mouse
Keyboard
.
.
.
.
.
.
.
.
.
.
.
.
VGA
.....
.....
.....
USB2
USB3
USB5
USB4
.............
............
Keyboard
Mouse
GigaLanPrint Port
Floopy Parallel Serial
1
ICH10 Impedance Requirements by Interface
Interface
PCI
Controller Link
Miscellaneous
PCI Express,DMI
SATA
USB
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Impedance Required
50-ohm,single-ended
50-ohm,single-ended
50-ohm,single-ended
95-ohm,differential
95-ohm,differential
90-ohm,differential
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
MS-7420N1
MS-7420N1
MS-7420N1
of
234Monday, January 21, 2008
of
234Monday, January 21, 2008
of
234Monday, January 21, 2008
0A
0A
0A
5
4
3
2
1
CPU SIGNAL BLOCK
H_A#[3..35]7
D D
U20A
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
U20A
DBI0#
DBI1#
DBI2#
DBI3#
GTLREF2
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD
RESERVED0
RESERVED1
RESERVED2
GTLREF3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_D#53
H_DBI#[0..3]7
H_IERR#4
H_FERR#4,15
H_STPCLK#15
H_INIT#15
H_DBSY#7
H_DRDY#7
H_TRDY#7
H_ADS#7
H_LOCK#7
H_BNR#7
H_HIT#7
C C
VTT_OUT_LEFT H_TEST_C9
VTT_OUT_RIGHT
B B
H_HITM#7
H_BPRI#7
H_DEFER#7
TRMTRIP#4,15
H_PROCHOT#4,21,28
H_IGNNE#15
ICH_H_SMI#15
H_A20M#15
H_SLP#8,21
R477 51R0402R477 51R0402
R460 X_62R0402R460 X_62R0402
H_FSBSEL04,6,8
H_FSBSEL14,6,8
H_FSBSEL24,6,8
H_PWRGD4,15
H_CPURST#4,7,8,21
H_D#[0..63]7
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
CPU_GTLREF1
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
CPU_TMPA_A
VTIN_GND_C
H_SLP#
CPU_GTLREF0
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
D53#
D52#
C14
H_D#52
D51#
A14
C15
H_D#51
H_D#50
D50#
D49#
D17
H_D#49
H_A#35
H_A#34
AJ6
AJ5
A35#
D48#
D20
G22
H_D#47
H_D#48
H_A#33
AH5
A34#
A33#
D47#
D46#
D22
H_D#46
H_A#32
H_A#31
AH4
AG5
A32#
D45#
E22
G21
H_D#45
H_D#44
H_A#30
AG4
A31#
A30#
D44#
D43#
F21
H_D#43
H_A#28
H_A#29
AG6
AF4
A29#
D42#
F20
E21
H_D#41
H_D#42
H_A#27
AF5
A28#
A27#
D41#
D40#
E19
H_D#40
H_A#25
H_A#26
AB4
AC5
A26#
D39#
F18
E18
H_D#39
H_D#38
H_A#24
AB5
A25#
A24#
D38#
D37#
F17
H_D#37
H_A#22
H_A#23
AA5
AD6
A23#
D36#
G17
G18
H_D#35
H_D#36
H_A#21
AA4
A22#
A21#
D35#
D34#
E16
H_D#34
H_A#19
H_A#18
H_A#20
A20#Y4A19#Y6A18#W6A17#
D33#
D32#
D31#
E15
G16
G15
H_D#33
H_D#31
H_D#32
H_A#17
AB6
F15
H_D#30
H_A#13
H_A#16
H_A#12
H_A#14
H_A#15
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D30#
D29#
D28#
D27#
D26#
D25#
F14
E13
D13
G14
G13
H_D#28
H_D#27
H_D#29
H_D#25
H_D#26
H_A#10
H_A#8
H_A#9
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D24#
D23#
D22#
F12
F11
E10
D10
H_D#23
H_D#22
H_D#21
H_D#24 H_A#11
H_A#3
H_A#6
H_A#4
H_A#5
H_A#7
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
H_D#17
H_D#19
H_D#18
H_D#20
H_D#16
L5
AC2
D11
C12
H_D#15
H_D#14
DBR#
D14#
D13#
B12
H_D#13
AN3
H_D#12
AN4
VCC_SENSE
D12#D8D11#
C11
H_D#11
VID7
VID6
AM7
AN5
AJ3
AK3
AN6
RSVD
ITP_CLK1
ITP_CLK0
VSS_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B10
A11
A10
H_D#7
H_D#9
H_D#3
H_D#6
H_D#4
H_D#8
H_D#5
H_D#10
VID4
VID5
AM5
AL4
AK4
VID6#
VID5#
VID_SELECT
GTLREF_SEL
CS_GTLREF
H_D#2
H_D#1
VID3
AL6
VID4#
VID3#
GTLREF0
GTLREF1
TESTHI12
TESTHI11
TESTHI10
FORCEPH
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
B4
H_D#0
VCC_VRM_SENSE 28
VSS_VRM_SENSE 28
VID[0..7] 28
VID0
VID1
VID2
AM3
AL5
AM2
VID2#
VID1#
VID0#
AN7
H1
H2
H29
E24
AG3
BPM5#
AF2
BPM4#
AG2
BPM3#
AD2
BPM2#
AJ1
BPM1#
AJ2
BPM0#
G5
PCREQ#
J6
REQ4#
K6
REQ3#
M6
REQ2#
J5
REQ1#
K4
REQ0#
W2
P1
H5
G4
TESTHI9
G3
TESTHI8
F24
TESTHI7
G24
TESTHI6
G26
TESTHI5
G27
TESTHI4
G25
TESTHI3
F25
TESTHI2
W3
TESTHI1
F26
TESTHI0
AK6
G6
RSVD
G28
BCLK1#
F28
BCLK0#
A3
RS2#
F5
RS1#
B3
RS0#
U3
AP1#
U2
AP0#
F3
BR0#
T2
COMP5
J2
COMP4
R1
COMP3
G2
COMP2
T1
COMP1
A13
COMP0
J17
DP3#
H16
DP2#
H15
DP1#
J16
DP0#
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
R407 680R0402-1R407 680R0402-1
CPU_GTLREF0
CPU_GTLREF1
TP_GTLREF_SEL
R264 X_0R0402R264 X_0R0402
H_BPM#5
H_BPM#4
H_BPM#3
R467 X_0R0402R467 X_0R0402
H_BPM#2
R507 X_0R0402R507 X_0R0402
H_BPM#1
R494 X_0R0402R494 X_0R0402
H_BPM#0
R505 X_0R0402R505 X_0R0402
PECI
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
DPSLP#
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
H_RS#2
H_RS#1
H_RS#0
H_COMP5
R466 X_49.9R1%0603R466 X_49.9R1%0603
H_COMP4
R454 X_49.9R1%0603R454 X_49.9R1%0603
H_COMP3
R473 49.9R1%0402R473 49.9R1%0402
H_COMP2
R484 49.9R1%0402R484 49.9R1%0402
H_COMP1
R465 49.9R1%0603R465 49.9R1%0603
H_COMP0
R379 49.9R1%0603R379 49.9R1%0603
TP5TP5
TP6TP6
TP7TP7
TP8TP8
VTT_OUT_RIGHT
CPU_GTLREF0 4
CPU_GTLREF1 4
MCH_GTLREF_CPU 7
PECI 21
H_REQ#[0..4] 7
H_TESTHI12 5
DPSLP# 15
R265 51R0402R265 51R0402
R260 51R0402R260 51R0402
R486 X_130R1%0402R486 X_130R1%0402
R502 X_62R0402R502 X_62R0402
H_FORCE# 28
CK_H_CPU# 6
CK_H_CPU 6
H_RS#[0..2] 7
TP11TP11R483 51R0402R483 51R0402
TP12TP12
H_ADSTB#1 7
H_ADSTB#0 7
H_DSTBP#3 7
H_DSTBP#2 7
H_DSTBP#1 7
H_DSTBP#0 7
H_DSTBN#3 7
H_DSTBN#2 7
H_DSTBN#1 7
H_DSTBN#0 7
H_NMI 15
H_INTR 15
TP2TP2
H_TESTHI8
For kentsfield(Quad
H_TESTHI9
core) reserve
H_TEST_C9
TP_CPU_G1 5
H_TESTHI8
H_TESTHI9
H_TESTHI10
DPSLP#
R457 X_51R0402R457 X_51R0402
H_SLP#
R456 X_51R0402R456 X_51R0402
H_TESTHI1
V_1P1_CORE
R458 51R0402R458 51R0402
R468 51R0402R468 51R0402
R500 51R0402R500 51R0402
R455 51R0402R455 51R0402
R497 51R0402R497 51R0402
VTT_OUT_RIGHT 4,5
VTT_OUT_LEFT 4,5
H_BR#0 4,7
VTT_OUT_LEFT 4,5
C389
C389
X_C0.1U16Y0402
X_C0.1U16Y0402
VTT_OUT_LEFT
VTT_OUT_RIGHT
C349 C0.1U16Y0402C349 C0.1U16Y0402
C393 C0.1U16Y0402C393 C0.1U16Y0402
H_COMP5
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
CPU_TMPA_A
VTIN_GND_C
RN23 8P4R-51R0402RN23 8P4R-51R0402
1
2
3
4
5
6
7
8
R471 51R0402R471 51R0402
R472 51R0402R472 51R0402
R479 62R0402R479 62R0402
R478 62R0402R478 62R0402
R463 X_62R0402R463 X_62R0402
R464 62R0402R464 62R0402
R462 62R0402R462 62R0402
H_BPM#2
H_BPM#3
H_BPM#0
H_BPM#1
H_BPM#4
H_BPM#5
H_TDI
H_TMS
H_TDO
H_TRST#
H_TCK
PLACE BPM TERMINATION NEAR CPU
R474 0R0402R474 0R0402
RN21
RN21
8P4R-680R-LF
8P4R-680R-LF
1
3
5
7
RN26
RN26
8P4R-680R-LF
8P4R-680R-LF
1
3
5
7
R414 0R0402R414 0R0402
R415 0R0402R415 0R0402
2
4
6
8
2
4
6
8
PM_DPRSTR_N 8,15
VTT_OUT_RIGHT
CPU_TMPA 21
VTIN_GND 21
A A
BSEL
1
2
0
0
0
1
0
0
1 0 0 333 MHZ (1333)
5
4
3
FSB FREQUENCY
0
267 MHZ (1067)
0
0
200 MHZ (800)
133 MHZ (533)
1
2
TABLE
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
INTEL LGA775 CPU SIGNAL
INTEL LGA775 CPU SIGNAL
INTEL LGA775 CPU SIGNAL
MS-7420N1
MS-7420N1
MS-7420N1
1
of
334Wednesday, January 23, 2008
of
334Wednesday, January 23, 2008
of
334Wednesday, January 23, 2008
0A
0A
0A
5
VCCP
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
U20B
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
VCCP
U20B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCT8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y30
Y23
Y24
Y25
Y26
Y27
Y28
Y29
W30
W29
W28
W27
W26
W25
W24
W23
U28
U29
U30
T30
U23
U24
U25
U26
U27
VCCP
D D
C C
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
AH27
VCC
VCC
T29
AH28
VCC
VCC
T28
AH29
VCC
VCC
T27
AH30
VCC
VCC
T26
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
AJ11
T23
4
VCC
AJ12
VCC
AJ14
VCC
AJ15
VCC
VCCN8VCCP8VCCR8VCC
AJ18
N30
VCC
VCC
AJ19
N29
VCC
VCC
AJ21
N28
VCC
VCC
AJ22
N27
VCC
VCC
AJ25
VCC
VCC
N26
AJ26
N25
VCC
VCC
3
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
A23
VCCA
B23
VSSA
D23
VCCPLL
C23
VCC-IOPLL
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
AM6
VTTPWRGD
VTT_SEL
RSVD
HS11HS22HS33HS4
4
AA1
J1
F27
F29
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30
K23
K24
K25
K26
K27
K28
K29
N23
N24
M27
M28
M29
M30
K30
M23
M24
M25
M26
AN9
AN8
AN30
AN29
AN26
AN25
2
H_VCCA
H_VSSA
H_VCCPLL
H_VCCIOPLL
VTT_PWG
VTT_OUT_RIGHT
VTT_OUT_LEFT
1
V_1P1_CORE
V_1P1_CORE
C218 C10U10Y0805C218 C10U10Y0805
C219 C10U10Y0805C219 C10U10Y0805
C220 C10U10Y0805C220 C10U10Y0805
CAPS FOR FSB GENERIC
VTT_OUT_LEFT
B B
A A
VTT_OUT_LEFT
VTT_OUT_RIGHT3,5
VTT_OUT_LEFT3,5
VCC5
GPIO_1815
VCC5
GPIO_2015
R482
R482
57.6R1%0402-RH
57.6R1%0402-RH
R487
R487
49.9R1%0402
49.9R1%0402
R498
R498
10KR0402
10KR0402
R510
R510
10KR0402
10KR0402
R509
R509
10KR0402
10KR0402
R503
R503
10KR0402
10KR0402
VTT_OUT_RIGHT
VTT_OUT_LEFT
5
CPU_GTLR0
R470 10R0402-LFR470 10R0402-LF
C371
R481
R481
100R1%/2
100R1%/2
R480
R480
100R1%/2
100R1%/2
G1
G2
MBT3904D
MBT3904D
G1
G2
MBT3904D
MBT3904D
CPU_GTLR1
Q68
Q68
Q67
Q67
C372
C372
C1U10X
C1U10X
R469 10R0402-LFR469 10R0402-LF
C391
C391
C1U10X
C1U10X
D1
S1
D2
S2
D1
S1
D2
S2
C371
X_C220P16X0402
X_C220P16X0402
C369
C369
X_C220P16X0402
X_C220P16X0402
R508
R508
576/4/1
576/4/1
R506
R506
1.3K/4/1
1.3K/4/1
CRB 576/1.3K
CPU_GTLR1
CPU_GTLR1
PLACE AT CPU END OF ROUTE
R490 X_130R1%0402-LFR490 X_130R1%0402-LF
R491 62R0402R491 62R0402 R493 62R0402R493 62R0402
R492 X_100R0402-1R492 X_100R0402-1
R501 62R0402R501 62R0402
R496 62R0402R496 62R0402
H_PROCHOT#
H_IERR#
H_PWRGD
H_BR#0
H_CPURST#
H_PROCHOT# 3,21,28
H_IERR# 3
H_PWRGD 3,15
H_BR#0 3,7
H_CPURST# 3,7,8,21
4
CPU_GTLREF0 3
CPU_GTLREF1 3
BIOS wirters Guide
PDG:page109
V_1P1_CORE
V_1P5_ICH
H_PROCHOT#
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
R246
R246
X_0R0805-LF
X_0R0805-LF
L14 X_10U125m_0805-1L14 X_10U125m_0805-1
C209
C209
X_C22U6.3X50805
X_C22U6.3X50805
C222
C222
C0.1U16Y0402
C0.1U16Y0402
THERM# 15
CP3 X_COPPERCP3 X_COPPER
1 2
R512
R512
10KR0402
10KR0402
R489
R489
10KR0402
10KR0402
R488
R488
X_0R0402-LF-1
X_0R0402-LF-1
C213
C213
X_C1U10X
X_C1U10X
H_VCCPLL
C215
C215
C10U10Y0805
C10U10Y0805
VCC3 VCC3
R511
R511
10KR0402
10KR0402
Q70
Q70
Q69
Q69
N-SST3904_SOT23
N-SST3904_SOT23
N-SST3904_SOT23
N-SST3904_SOT23
3
H_VCCIOPLL
H_VCCA
C224
C224
X_C1U10X
X_C1U10X
H_VSSA
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_1P1_CORE
V_1P1_CORE
120mA
VTT_OUT_RIGHT
RN6
RN6
H_FSBSEL1
1
2
H_FSBSEL0
3
4
H_FSBSEL2
5
6
7
8
8P4R-470R0402-LF
8P4R-470R0402-LF
PLACE AT ICH END OF ROUTE
R495 62R0402R495 62R0402
2
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
VID_GD#25,28
R485 10KR0402R485 10KR0402
H_FSBSEL1 3,6,8
H_FSBSEL0 3,6,8
H_FSBSEL2 3,6,8
TRMTRIP# 3,15
H_FERR# 3,15
VTT_OUT_RIGHT
VCC5_SB
C385
C385
C1U10X
C1U10X
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
R438 680R0402-1R438 680R0402-1
R451
R451
1KR0402
1KR0402
R452 4.7KR0402-1R452 4.7KR0402-1
Q66
Q66
N-SST3904_SOT23
N-SST3904_SOT23
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
INTEL LGA775 POWER
INTEL LGA775 POWER
INTEL LGA775 POWER
VTT_PWG
Q64
Q64
N-SST3904_SOT23
N-SST3904_SOT23
MS-7420N1
MS-7420N1
MS-7420N1
1
of
434Tuesday, January 29, 2008
of
434Tuesday, January 29, 2008
of
434Tuesday, January 29, 2008
C354
C354
X_C1U10X
X_C1U10X
0A
0A
0A
5
TP4TP4
TP3TP3
TP10TP10
X_49.9R1%0402
X_49.9R1%0402
R461
VTT_OUT_RIGHT3,4
D D
R275
R275
X_1KR0402
X_1KR0402
C C
B B
R461
R459
R459
X_49.9R1%0402
X_49.9R1%0402
PSI#8,28
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
R376 24.9R1%0402R376 24.9R1%0402
R475 X_51R0402R475 X_51R0402
VSS
AF29
RSVDJ3RSVDN4RSVD
VSS
VSS
AF3
AF30
VSS
R476 X_51R0402R476 X_51R0402
P5
MSID[1]V1MSID[0]
VSS
VSS
VSS
AF6
AF7
AG10
E23
VSS
AF16
RSVD
VSS
AF17
VSS
F23
RSVDE5RSVDE6RSVDE7RSVD
VSS
VSS
VSS
AF20
AF23
AF24
AF25
R499 51R0402R499 51R0402
H_COMP8
F6
IMPSEL#
VSS
VSS
AF26
B13
AF27
RSVD
VSS
AF28
PSI#
H_COMP7
AE3
AE4
VSS
AE29
AE30
RSVD
COMP6Y3COMP7
VSS
VSS
VSS
AE5
AE7
D14
RSVDD1RSVD
VSS
AF10
AF13
U20C
U20C
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
4
BIOS wirters Guide
PDG:page109
W1
VSS
AG13
AC4
RSVD
VSS
AG16
VSS
AG17
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
VSS
VSS
AG20
AG23
VSS
AG24
AG7
VSS
AH1
VSS
VSS
AH10
VSS
AH13
VSS
AH16
V30
VSS
AH17
VSSV3VSS
VSS
AH20
V29
VSS
AH23
V28
VSS
VSS
AH24
V27
AH3
VSS
VSS
V26
VSS
VSS
AH6
V25
V24
V23
VSS
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
AH7
AJ10
AJ13
AJ16
H_TESTHI12 3
VSS
VSS
VSS
AJ17
AJ20
AJ23
AJ24
VSS
AJ27
VSS
AJ28
VSS
R30
AJ29
VSS
R29
AJ30
VSS
VSS
3
R28
R27
R26
R25
R24
R23
P30
P29
P28
P27
P26
P25
P24
P23
VSS
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
VSS
AL17
VSS
AL20
VSS
AL23
VSS
AL24
VSS
AL27
VSS
L30
AL28
VSS
VSSL3VSS
VSS
AL3
L29
L28
L27
VSS
VSS
VSS
VSS
VSS
AL7
AM1
AM10
L26
VSS
VSS
AM13
L25
VSS
VSS
AM16
L24
VSS
VSS
AM17
L23
VSS
VSS
AM20
VSSK7VSS
VSS
AM23
K5
VSS
AM24
K2
VSS
AM27
VSS
AM28
AM4
VSS
AN1
VSS
VSS
AN10
VSS
AN13
AN16
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
VSS
AN17
H28
AN2
VSS
VSS
H27
VSS
VSS
AN20
H26
VSS
VSS
AN23
H25
VSS
VSS
AN24
2
H24
VSS
VSS
AN27
H23
VSS
VSS
AN28
H22
VSS
H18
H19
H20
H21
VSS
VSS
VSS
VSS
VSSB1VSS
VSS
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
B11
B14
1
H17
VSS
H14
VSS
H13
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
R504 51R0402R504 51R0402
TP_CPU_W29
TP_CPU_G1 3
VTT_OUT_LEFT 3,4
TP1TP1
7
8
9
2
CPU DECOUPLING CAPACITORS
VCCP
A A
5
EC36
EC36
C22u6.3X1206
C22u6.3X1206
EC37
EC37
C22u6.3X1206
C22u6.3X1206
EC38
EC38
C22u6.3X1206
C22u6.3X1206
4
10u/6.3V/X5R,1206,80/-20%
VCCP
EC39
EC39
C22u6.3X1206
C22u6.3X1206
EC40
EC40
C22u6.3X1206
C22u6.3X1206
EC35
EC35
C22u6.3X1206
C22u6.3X1206
Place these caps within socket cavity
VCCP VCCP
EC43
EC43
C22u6.3X1206
C22u6.3X1206
EC44
EC44
C22u6.3X1206
C22u6.3X1206
EC45
EC45
C22u6.3X1206
C22u6.3X1206
EC46
EC46
C22u6.3X1206
C22u6.3X1206
EC47
EC47
C22u6.3X1206
C22u6.3X1206
EC48
EC48
C22u6.3X1206
C22u6.3X1206
3
1
MH6MH6
2
6
5
3
4
7
8
MH8MH8
9
2
1
6
5
3
4
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
7
8
9
2
1
MH7MH7
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
6
5
3
4
INTEL LGA775 GND
INTEL LGA775 GND
INTEL LGA775 GND
MS-7420N1
MS-7420N1
MS-7420N1
1
MH5MH5
7
8
9
2
1
6
5
3
4
0A
0A
0A
of
534Wednesday, January 23, 2008
of
534Wednesday, January 23, 2008
of
534Wednesday, January 23, 2008
5
4
3
2
1
CLOCK Generator - IDTCV184-2
U13
VDD_CK
D D
VDD_48
VDD_CLK_IO
PLL_XI
PLL_XO
CK_PWRGD15
C C
R165 1KR0402R165 1KR0402
SMBDATA_ISO21,25
SMBCLK_ISO21,25
SMBDATA12,13,15,17,21
SMBCLK12,13,15,17,21
R139 0R0402R139 0R0402
R122 0R0402R122 0R0402
R140 X_0R0402R140 X_0R0402
R123 X_0R0402R123 X_0R0402
Strapping risistor
R147
PCICLK2
overclock disable
PCICLK3
PCICLK5
For SRCCLK8
PCICLK4
enable CPU_STOP# /PCI_STOP#
R147
10KR0402
10KR0402
R150
R150
10KR0402
10KR0402
R160
R160
10KR0402
10KR0402
R159
R159
10KR0402
10KR0402
VCC3
U13
47
31
16
2
9
53
41
12
37
26
20
52
51
48
55
56
40
44
15
34
23
19
11
8
50
IDTCV184-2APAG8_TSSOP56-RH
IDTCV184-2APAG8_TSSOP56-RH
C27P50NC118 C27P50NC118
Y1
Y1
14.318MHZ32P
14.318MHZ32P
C27P50NC117 C27P50NC117
VDDCPU
VDDSRC
VDD
VDDPCI
VDD48
VDDREF
VDDI/OCPU
VDDI/O96MHZ
VDDSRCI/O
VDDSRCI/O
VDDPLL3I/O
X1
X2
CPU_STOP#/SRCC5
CK_PWRGD/PD#
SDATA
SCLK
IO_VOUT
GNDCPU
GND
GNDSRC
GNDSRC
GND
GND48
GNDPCI
REF0/FSLC/TESTSEL
GNDREF
PLL_XI
PLL_XO
DOT96T/SRCT0
DOT96C/SRCC0
SRCT2/SATAT
SRCT2/SATAT
SRCT3/CR#_C
SRCC3/CR#_D
PCI_STOP#/SRCT5
SRCT7/CR#_F
SRCC7/CR#_E
CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8
PCI4/SRC5_EN
PCI_F5/ITP_EN
FSLA/USB_48MHz
FSLB/TEST_MODE
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
SRCT1/SE1
SRCC1/SE2
SRCT4
SRCC4
SRCT6
SRCC6
PCI0/CR#A
PCI1/CR#B
PCI2/TME
PCI3
46
CPUCLK# CK_H_CPU#
45
MCHCLK
43
MCHCLK# CK_H_MCH#
42
CK_DOT96 CK_96M_DREF
13
CK_DOT96# CK_96M_DREF#
14
17
18
CK_PE_SRC2
21
CK_PE_SRC2#
22
CK_PE_SRC3
24
CK_PE_SRC3# CK_PE_100M_16PORT#
25
CK_PE_SRC4
27
CK_PE_SRC4# CK_PE_100M_ICH#
28
CK_PE_SRC5
30
CK_PE_SRC5#
29
CK_PE_SRC6
33
CK_PE_SRC6# CK_PE_100M_MCH#
32
CK_PE_SRC9
36
35
39
38
PCICLK0 SIO_PCLKIO_VOUT
1
3
PCICLK2
4
PCICLK3
5
PCICLK4
6
7
USB_48M
10
FSB
49
CK_14M
54
R208 0R0402R208 0R0402
R212 0R0402R212 0R0402
R178 1KR0402R178 1KR0402
R152 1KR0402R152 1KR0402
R17633R0402-2 R17633R0402-2
R18133R0402-2 R18133R0402-2
R17933R0402-2 R17933R0402-2
R18733R0402-2 R18733R0402-2
R18033R0402-2 R18033R0402-2
R18933R0402-2 R18933R0402-2
R20433R0402-2 R20433R0402-2
R20633R0402-2 R20633R0402-2
R20733R0402-2 R20733R0402-2
R20933R0402-2 R20933R0402-2
R21333R0402-2 R21333R0402-2
R21833R0402-2 R21833R0402-2
R20133R0402-2 R20133R0402-2
R20533R0402-2 R20533R0402-2
R19633R0402-2 R19633R0402-2
R20233R0402-2 R20233R0402-2
R11933R0402-2 R11933R0402-2
R14133R0402-2 R14133R0402-2
R15433R0402-2 R15433R0402-2
R16933R0402-2 R16933R0402-2
R17333R0402-2 R17333R0402-2
R14533R0402-2 R14533R0402-2
R14933R0402-2 R14933R0402-2
CK_H_CPUCPUCLK
CK_H_MCH
CK_ICHSATA
CK_ICHSATA#
CK_PE_100M_16PORT
CK_PE_100M_ICH
PCI_STOP#
CPU_STOP#
CK_PE_100M_MCH
CK_PE_100M_PCIE1
CK_PE_100M_PCIE1#CK_PE_SRC9#
TPM_PCLKPCICLK1
PCI_CLK1
ICH_PCLKPCICLK5
CK_48M_USB_ICH
CK_FSBSEL0
SIO_14
CK_14M_ICH
CK_FSBSEL2
CK_H_CPU 3
CK_H_CPU# 3
CK_H_MCH 7
CK_H_MCH# 7
CK_96M_DREF 8
CK_96M_DREF# 8
CK_ICHSATA 15
CK_ICHSATA# 15
CK_PE_100M_16PORT 13
CK_PE_100M_16PORT# 13
CK_PE_100M_ICH 14
CK_PE_100M_ICH# 14
PCI_STOP# 15
CPU_STOP# 15
CK_PE_100M_MCH 7
CK_PE_100M_MCH# 7
CK_PE_100M_PCIE1 17
CK_PE_100M_PCIE1# 17
SIO_PCLK 21
TPM_PCLK 19
PCI_CLK1 17
ICH_PCLK 14
CK_48M_USB_ICH 14
SIO_14 21
CK_14M_ICH 15
VDD_48 VDD_CK
VDD_CK Decoupling
Place near each VDD_CK Pins
FB1
FB1
80L3_70_0805
80L3_70_0805
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C126
C126
C140
C140
C164
C164
C121
C121
C119
C119
C127
C127
C131
C131
C1U6.3X50402
C1U6.3X50402
1 2
C148
C148
C1U6.3X50402
C1U6.3X50402
1 2
C163
C163
C1U6.3X50402
C1U6.3X50402
1 2
C177
C177
C1U6.3X50402
C1U6.3X50402
1 2
C120
C120
C1U6.3X50402
C1U6.3X50402
1 2
C133
C133
C1U6.3X50402
C1U6.3X50402
1 2
B B
CPU Frequency select
H_FSBSEL1 FSB
H_FSBSEL13,4,8
H_FSBSEL03,4,8
H_FSBSEL23,4,8
H_FSBSEL0
H_FSBSEL2
VDD_CK VDD_CK
A A
H_FSBSEL2 H_FSBSEL0
R191 X_0R0402R191 X_0R0402
R161 X_0R0402R161 X_0R0402
R157
R157
1KR0402
1KR0402
R171
R171
4.7KR0402-1
4.7KR0402-1
5
R158 1KR0402R158 1KR0402
H_FSBSEL0 USB_48M
H_FSBSEL2
R184 X_10KR0402R184 X_10KR0402
R155 X_10KR0402R155 X_10KR0402
Q22
Q22
N-SST3904_SOT23
N-SST3904_SOT23
Q28
Q28
N-SST3904_SOT23
N-SST3904_SOT23
CK_14M
CK_FSBSEL0
CK_FSBSEL2
R203
R203
1KR0402
1KR0402
Q31
Q31
N-SST3904_SOT23
N-SST3904_SOT23
R194
R194
4.7KR0402-1
4.7KR0402-1
Q33
Q33
N-SST3904_SOT23
N-SST3904_SOT23
VDD_CK
R172
R172
R185
R164
R164
R185
47KR0402-1
47KR0402-1
CK_48M_USB_ICH
R174
R174
33KR0402
33KR0402
SLP_M15,27
47KR0402-1
47KR0402-1
CK_14M_ICH
33KR0402
33KR0402
4
VDD_CK & VDD_CLK_IO Power
R163 X_0RR163 X_0R
IO_VOUT
DS
Q25P-SI2303BDS-T1-E3_SOT23-3-RH Q25P-SI2303BDS-T1-E3_SOT23-3-RH
G
C150
C150
C4.7U10Y0805
C4.7U10Y0805
R148 33R0402-2R148 33R0402-2
C139
C139
X_C10P50N
X_C10P50N
VCC3_SB
3
R186
R186
10KR0402
10KR0402
VDD_CK
R156
R156
15R0805
15R0805
Q29
Q29
N-SST3904_SOT23
N-SST3904_SOT23
C165
C165
C151
C151
C10U10Y0805
C10U10Y0805
C0.1U16Y0402
C0.1U16Y0402
+
+
C123
C123
X_C10U16X51206-RH
X_C10U16X51206-RH
Place near each VDD_CLK_IO Pins
VDD_CLK_IO
C159
C159
C10U10Y0805
C10U10Y0805
C0.1U16Y0402
C0.1U16Y0402
C180
C180
C167
C167
C10U10Y0805
C10U10Y0805
C0.1U16Y0402
C0.1U16Y0402
2
C155
C155
C173
C173
C175
C175
C10U10Y0805
C10U10Y0805
C0.1U16Y0402
C0.1U16Y0402
C168
C168
C162
C162
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
For EMI reserver
SIO_PCLK
PCI_CLK1
ICH_PCLK
TPM_PCLK
CK_48M_USB_ICH
SIO_14
CK_14M_ICH
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
CLOCK Generator-IDTCV184-2APAG8
CLOCK Generator-IDTCV184-2APAG8
CLOCK Generator-IDTCV184-2APAG8
Wednesday, January 23, 2008
Wednesday, January 23, 2008
Wednesday, January 23, 2008
C113 X_C22P50N0402C113 X_C22P50N0402
C135 X_C10P50N0402C135 X_C10P50N0402
C144 X_C10P50N0402C144 X_C10P50N0402
C125 X_C10P50N0402C125 X_C10P50N0402
C154 X_C10P25N0402C154 X_C10P25N0402
C130 X_C10P50N0402C130 X_C10P50N0402
C138 X_C10P25N0402C138 X_C10P25N0402
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
0A
0A
MS-7420N1
MS-7420N1
MS-7420N1
1
6
6
6
0A
of
of
of
34
34
34
5
NB1A
NB1A
H_A#3
H_A#[3..35]3
D D
C C
B B
H_REQ#[0..4]3
H_ADSTB#03
H_ADSTB#13
H_DSTBP#03
H_DSTBN#03
H_DSTBP#13
H_DSTBN#13
H_DSTBP#23
H_DSTBN#23
H_DSTBP#33
H_DSTBN#33
H_DBI#[0..3]3
H_ADS#3
H_TRDY#3
H_DRDY#3
H_DEFER#3
H_HITM#3
H_HIT#3
H_LOCK#3
H_BR#03,4
H_BNR#3
H_BPRI#3
H_DBSY#3
H_RS#[0..2]3
H_CPURST#3,4,8,21
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_RS#0
H_RS#1
H_RS#2
M45
AA35
AA37
AA36
L36
L37
J38
F40
H39
L38
L43
N39
N35
N37
J41
N40
R35
T36
R36
R34
R37
R39
U38
T37
U34
U40
T34
Y36
U35
U37
Y37
Y34
Y38
G38
K35
J39
C43
G39
J40
T39
C39
B39
K31
J31
J25
K25
C32
D32
B40
F33
F26
D30
J42
L40
J43
G44
K44
H45
H40
L42
J44
H37
H42
G43
L44
G42
D27
N25
FSB_AB_3
FSB_AB_4
FSB_AB_5
FSB_AB_6
FSB_AB_7
FSB_AB_8
FSB_AB_9
FSB_AB_10
FSB_AB_11
FSB_AB_12
FSB_AB_13
FSB_AB_14
FSB_AB_15
FSB_AB_16
FSB_AB_17
FSB_AB_18
FSB_AB_19
FSB_AB_20
FSB_AB_21
FSB_AB_22
FSB_AB_23
FSB_AB_24
FSB_AB_25
FSB_AB_26
FSB_AB_27
FSB_AB_28
FSB_AB_29
FSB_AB_30
FSB_AB_31
FSB_AB_32
FSB_AB_33
FSB_AB_34
FSB_AB_35
FSB_REQB_0
FSB_REQB_1
FSB_REQB_2
FSB_REQB_3
FSB_REQB_4
FSB_ADSTBB_0
FSB_ADSTBB_1
FSB_DSTBPB_0
FSB_DSTBNB_0
FSB_DSTBPB_1
FSB_DSTBNB_1
FSB_DSTBPB_2
FSB_DSTBNB_2
FSB_DSTBPB_3
FSB_DSTBNB_3
FSB_DINVB_0
FSB_DINVB_1
FSB_DINVB_2
FSB_DINVB_3
FSB_ADSB
FSB_TRDYB
FSB_DRDYB
FSB_DEFERB
FSB_HITMB
FSB_HITB
FSB_LOCKB
FSB_BREQ0B
FSB_BNRB
FSB_BPRIB
FSB_DBSYB
FSB_RSB_0
FSB_RSB_1
FSB_RSB_2
FSB_CPURSTB
RSVD_05
1 OF 7
1 OF 7
ELK_CRB
ELK_CRB
SYM_REV = 1.5
SYM_REV = 1.5
FSB
FSB
FSB_ACCVREF
4
FSB_DB_0
FSB_DB_1
FSB_DB_2
FSB_DB_3
FSB_DB_4
FSB_DB_5
FSB_DB_6
FSB_DB_7
FSB_DB_8
FSB_DB_9
FSB_DB_10
FSB_DB_11
FSB_DB_12
FSB_DB_13
FSB_DB_14
FSB_DB_15
FSB_DB_16
FSB_DB_17
FSB_DB_18
FSB_DB_19
FSB_DB_20
FSB_DB_21
FSB_DB_22
FSB_DB_23
FSB_DB_24
FSB_DB_25
FSB_DB_26
FSB_DB_27
FSB_DB_28
FSB_DB_29
FSB_DB_30
FSB_DB_31
FSB_DB_32
FSB_DB_33
FSB_DB_34
FSB_DB_35
FSB_DB_36
FSB_DB_37
FSB_DB_38
FSB_DB_39
FSB_DB_40
FSB_DB_41
FSB_DB_42
FSB_DB_43
FSB_DB_44
FSB_DB_45
FSB_DB_46
FSB_DB_47
FSB_DB_48
FSB_DB_49
FSB_DB_50
FSB_DB_51
FSB_DB_52
FSB_DB_53
FSB_DB_54
FSB_DB_55
FSB_DB_56
FSB_DB_57
FSB_DB_58
FSB_DB_59
FSB_DB_60
FSB_DB_61
FSB_DB_62
FSB_DB_63
FSB_SWING
FSB_RCOMP
FSB_DVREF
HPL_CLKINP
HPL_CLKINN
F44
C44
D44
C41
E43
B43
D40
B42
B38
F38
A38
B37
D38
C37
D37
B36
E37
J35
H35
F37
G37
J33
L33
G33
L31
M31
M30
J30
G31
K30
M29
G30
J29
F29
H29
L25
K26
L29
J26
M26
H26
F25
F24
G25
H24
L24
J24
N24
C28
B31
F35
C35
B35
D35
D31
A34
B32
F31
D28
A29
C30
B30
E27
B28
B24
A23
C22
B23
P29
P30
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
HXSWING
HXRCOMP
MCH_GTLREF
CK_H_MCH 6
CK_H_MCH# 6
H_D#[0..63] 3
R353
R353
16.5R1%/2
16.5R1%/2
5mil trace
3
EXP_A_RXP_013
EXP_A_RXN_013
EXP_A_RXP_113
EXP_A_RXN_113
EXP_A_RXP_213
EXP_A_RXN_213
EXP_A_RXP_313
EXP_A_RXN_313
EXP_A_RXP_413
EXP_A_RXN_413
EXP_A_RXP_513
EXP_A_RXN_513
EXP_A_RXP_613
EXP_A_RXN_613
EXP_A_RXP_713
EXP_A_RXN_713
EXP_A_RXP_813
EXP_A_RXN_813
EXP_A_RXP_913
EXP_A_RXN_913
EXP_A_RXP_1013
EXP_A_RXN_1013
EXP_A_RXP_1113
EXP_A_RXN_1113
EXP_A_RXP_1213
EXP_A_RXN_1213
EXP_A_RXP_1313
EXP_A_RXN_1313
EXP_A_RXP_1413
EXP_A_RXN_1413
EXP_A_RXP_1513
EXP_A_RXN_1513
DMI_ITP_MRP_014
DMI_ITN_MRN_014
DMI_ITP_MRP_114
DMI_ITN_MRN_114
DMI_ITP_MRP_214
DMI_ITN_MRN_214
DMI_ITP_MRP_314
DMI_ITN_MRN_314
CK_PE_100M_MCH6
CK_PE_100M_MCH#6
SDVO_CTRL_DATA13
SDVO_CTRL_CLK13
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXP_7
EXP_A_RXN_7
EXP_A_RXP_8
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
SDVO_CTRL_DATA
SDVO_CTRL_CLK
AA9
AA10
AA7
AA6
AB10
AB9
AB3
AA2
AD10
AD11
AD7
AD8
AE9
AE10
AE6
AE7
G13
AB13
AD13
F6
G7
H6
G4
J6
J7
L6
L7
N9
N10
N7
N6
R7
R6
R9
R10
U10
U9
U6
U7
R4
P4
AF9
AF8
D9
E9
J13
2
NB1B
NB1B
PEG_RXP_0
PEG_RXN_0
PEG_RXP_1
PEG_RXN_1
PEG_RXP_2
PEG_RXN_2
PEG_RXP_3
PEG_RXN_3
PEG_RXP_4
PEG_RXN_4
PEG_RXP_5
PEG_RXN_5
PEG_RXP_6
PEG_RXN_6
PEG_RXP_7
PEG_RXN_7
PEG_RXP_8
PEG_RXN_8
PEG_RXP_9
PEG_RXN_9
PEG_RXP_10
PEG_RXN_10
PEG_RXP_11
PEG_RXN_11
PEG_RXP_12
PEG_RXN_12
PEG_RXP_13
PEG_RXN_13
PEG_RXP_14
PEG_RXN_14
PEG_RXP_15
PEG_RXN_15
DMI_RXP_0
DMI_RXN_0
DMI_RXP_1
DMI_RXN_1
DMI_RXP_2
DMI_RXN_2
DMI_RXP_3
DMI_RXN_3
EXP_CLKP
EXP_CLKN
SDVO_CTRLDATA
SDVO_CTRLCLK
RSVD_23
RSVD_22
ELK_CRB
ELK_CRB
SYM_REV = 1.5
SYM_REV = 1.5
PCIE
PCIE
DMI
DMI
PEG_TXP_0
PEG_TXN_0
PEG_TXP_1
PEG_TXN_1
PEG_TXP_2
PEG_TXN_2
PEG_TXP_3
PEG_TXN_3
PEG_TXP_4
PEG_TXN_4
PEG_TXP_5
PEG_TXN_5
PEG_TXP_6
PEG_TXN_6
PEG_TXP_7
PEG_TXN_7
PEG_TXP_8
PEG_TXN_8
PEG_TXP_9
PEG_TXN_9
PEG_TXP_10
PEG_TXN_10
PEG_TXP_11
PEG_TXN_11
PEG_TXP_12
PEG_TXN_12
PEG_TXP_13
PEG_TXN_13
PEG_TXP_14
PEG_TXN_14
PEG_TXP_15
PEG_TXN_15
DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
DMI_TXP_2
DMI_TXN_2
DMI_TXP_3
DMI_TXN_3
EXP_RCOMPO
EXP_COMPI
EXP_ICOMPO
EXP_RBIAS
C11
B11
A10
B9
C9
D8
B8
C7
B7
B6
B3
B4
D2
C2
H2
G2
J2
K2
K1
L2
P2
M2
T2
R1
U2
V2
W4
V3
AA4
Y4
AC1
AB2
AC2
AD2
AD4
AE4
AE2
AF2
AF4
AG4
Y7
Y8
Y6
AG1
EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5
EXP_A_TXP_6
EXP_A_TXN_6
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
GRCOMP
EXP_RBIAS
R373
R373
49.9R1%0402
49.9R1%0402
R394
R394
750R1%0402
750R1%0402
1
EXP_A_TXP_0 13
EXP_A_TXN_0 13
EXP_A_TXP_1 13
EXP_A_TXN_1 13
EXP_A_TXP_2 13
EXP_A_TXN_2 13
EXP_A_TXP_3 13
EXP_A_TXN_3 13
EXP_A_TXP_4 13
EXP_A_TXN_4 13
EXP_A_TXP_5 13
EXP_A_TXN_5 13
EXP_A_TXP_6 13
EXP_A_TXN_6 13
EXP_A_TXP_7 13
EXP_A_TXN_7 13
EXP_A_TXP_8 13
EXP_A_TXN_8 13
EXP_A_TXP_9 13
EXP_A_TXN_9 13
EXP_A_TXP_10 13
EXP_A_TXN_10 13
EXP_A_TXP_11 13
EXP_A_TXN_11 13
EXP_A_TXP_12 13
EXP_A_TXN_12 13
EXP_A_TXP_13 13
EXP_A_TXN_13 13
EXP_A_TXP_14 13
EXP_A_TXN_14 13
EXP_A_TXP_15 13
EXP_A_TXN_15 13
DMI_MTP_IRP_0 14
DMI_MTN_IRN_0 14
DMI_MTP_IRP_1 14
DMI_MTN_IRN_1 14
DMI_MTP_IRP_2 14
DMI_MTN_IRN_2 14
DMI_MTP_IRP_3 14
DMI_MTN_IRN_3 14
V_1P1_CORE
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/4*VTT +/- 2%
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.8V
100 OHM OVER 200 RESISTORS
PLACE DIVIDER RESISTOR NEAR VTT
V_1P1_CORE V_1P1_CORE
R324
A A
5
R324
301R1%0402
301R1%0402
R323
R323
100R1%0402
100R1%0402
R332
R332
49.9R1%0402
49.9R1%0402
C263
C263
C0.1U16Y0402
C0.1U16Y0402
HXSWING
R312
R312
57.6R1%0402-RH
57.6R1%0402-RH
R308
R308
100R1%0402
100R1%0402
4
MCH_GTLREF_CPU
R331
R331
49.9R1%0402
49.9R1%0402
C261
C261
C1U16Y
C1U16Y
MCH_GTLREF
C270
C270
X_C2200P50X
X_C2200P50X
MCH_GTLREF_CPU 3
C0.1U16Y0402
C0.1U16Y0402
3
C277
C277
V_1P1_CORE
C287
C287
C0.1U16Y0402
C0.1U16Y0402
C281
C281
C0.1U16Y0402
C0.1U16Y0402
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
Eaglelake FSB/PCIE
Eaglelake FSB/PCIE
Eaglelake FSB/PCIE
0A
0A
MS-7420N1
MS-7420N1
MS-7420N1
1
734Wednesday, January 23, 2008
734Wednesday, January 23, 2008
734Wednesday, January 23, 2008
0A
of
of
of
5
4
3
2
1
DIMM1 decouping cap DIMM1 decouping cap
NB1E
NB1E
T15T15
T17T17
EXP_SLR
T12T12
EXP_EN
ITPM_EN
T14T14
MCH_TCEN
T11T11
T13T13
T16T16
CL_VREF_MCH
R422
R422
0R0402
0R0402
T10T10
SEL0
SEL1
SEL2
G16
M20
G15
M17
G20
M16
AY4
AY2
AN13
AW2
AN8
AR7
AN10
AN11
AN9
AN17
AW44
AN16
AD42
W30
BE44
BE2
BD45
BD1
AK15
F17
P15
N17
K16
F15
H17
L17
J17
J16
J15
J20
F20
B45
U32
R42
A44
B14
BSEL0
BSEL1
BSEL2
ALLZTEST
XORTEST
RSVD_36
EXP_SLR
RSVD_17
EXP_SM
ITPM_ENB
RSVD_10
CEN
BSCANTEST
RSVD_12
RSVD_13
RSVD_14
RSVD_15
DUALX8_ENABLE
CL_DATA
CL_CLK
CL_VREF
CL_RSTB
CL_PWROK
JTAG_TDI
JTAG_TDO
JTAG_TCK
JTAG_TMS
NC_01
NC_02
NC_03
NC_04
NC_05
NC_06
NC_07
NC_08
NC_09
NC_10
NC_11
NC_12
NC_13
NC_18
NC_19
5 OF 7
5 OF 7
ELK_CRB
ELK_CRB
R322 X_1KR0402R322 X_1KR0402
R352 X_1KR0402R352 X_1KR0402
Low : BTX
R298 0R0402R298 0R0402
R335 X_1KR0402R335 X_1KR0402
R340
R340
X_1KR0402
X_1KR0402
R304
R304
X_1KR0402
X_1KR0402
R319
R319
X_1KR0402
X_1KR0402
R330
R330
X_1KR0402
X_1KR0402
CL_N_DATA15
CL_N_CLK15
CL_RST15
MCH_CLPWROK15,27
R307 10KR0402R307 10KR0402
R301 10KR0402R301 10KR0402
R320 10KR0402R320 10KR0402
H_FSBSEL03,4,6
H_FSBSEL13,4,6
H_FSBSEL23,4,6
D D
EXP_EN_HDR13
V_1P1_CL
C C
MCH CL VREF:0.349V
R436
R436
1KR1%0402
1KR1%0402
CL_VREF_MCH
R428
R428
464R1%0402
464R1%0402
C346
C346
C0.1U16Y0402
C0.1U16Y0402
SYM_REV = 1.5
SYM_REV = 1.5
VGA
VGA
MISC
MISC
CRT_HSYNC
CRT_VSYNC
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_IRTN
CRT_DDC_DATA
CRT_DDC_CLK
DAC_IREF
DPL_REFCLKINP
DPL_REFCLKINN
DPL_REFSSCLKINP
DPL_REFSSCLKINN
RSTINB
PWROK
ICH_SYNCB
HDA_BCLK
HDA_RSTB
HDA_SDI
HDA_SDO
HDA_SYNC
DDPC_CTRLCLK
DDPC_CTRLDATA
DPRSTPB
SLPB
RSVD_18
RSVD_19
RSVD_20
RSVD_21
RSVD_25
RSVD_26
RSVD_27
RSVD_28
RSVD_29
RSVD_30
RSVD_31
RSVD_32
RSVD_33
RSVD_34
RSVD_35
HSYNC_R
D14
VSYNC_R
C14
VGA_RED
B18
VGA_GREEN
D18
VGA_BLUE
C18
F13
MCH_DDC_DATA
L15
MCH_DDC_CLK
M15
DACREFSET
B15
CK_96M_DREF
E15
CK_96M_DREF#
D15
R299
R299
G8
10KR0402
10KR0402
G9
AN6
AR4
K15
AU4
AV4
AU2
AV1
AU3
J11
F11
P43
R360 0R0402R360 0R0402
P42
A45
B2
BE1
BE45
R15
R14
T15
T14
AB15
R32
R31
U31
U30
L11
R309
R309
L13
X_10KR0402
X_10KR0402
R336 0R0402R336 0R0402
R337 0R0402R337 0R0402
R351 1KR0402R351 1KR0402
PLTRST# 15,17,19,21
PWRGD_3V 15,25
ICH_SYNC# 15
R420 0R0402R420 0R0402
12
34
56
78
PM_DPRSTR_N
TP9TP9
VGA_RED 23
VGA_GREEN 23
VGA_BLUE 23
MCH_DDC_DATA 23
MCH_DDC_CLK 23
CK_96M_DREF 6
CK_96M_DREF# 6
V_1P1_CORE
RN25
RN25
0R/4/8P4R
0R/4/8P4R
H_SLP#
VCC3
HSYNC 23
VSYNC 23
PM_DPRSTR_N 3,15
H_SLP# 3,21
VCC_DDR
VTT_DDR
V_3P3_CL V_3P3_CL
C481
C481
C0.1U16Y0402
C0.1U16Y0402
VCC_DDR
C486 X_C10U10Y0805C486 X_C10U10Y0805
VCC_DDR
+
+
EC60 CD1000u63EL11.5-RH-1
EC60 CD1000u63EL11.5-RH-1
C483
C483
C1U10X
C1U10X
C484
C484
C1U10X
C1U10X
C462
C462
C1U10X
C1U10X
C466
C466
C1U10X
C1U10X
C464
C464
C4.7U10Y0805
C4.7U10Y0805
C465
C465
X_C4.7U10Y0805
X_C4.7U10Y0805
C503
C503
C0.1U16Y0402
C0.1U16Y0402
VCC_DDR
VTT_DDR
C502
C502
C0.1U16Y0402
C0.1U16Y0402
VCC_DDR
C352 X_C10U10Y0805C352 X_C10U10Y0805
VCC_DDR
EC59 X_CD820U2.5FP-1
EC59 X_CD820U2.5FP-1
C499
C499
C1U10X
C1U10X
C498
C498
C1U10X
C1U10X
C501
C501
C1U10X
C1U10X
C500
C500
C1U10X
C1U10X
C521
C521
C4.7U10Y0805
C4.7U10Y0805
C496
C496
X_C4.7U10Y0805
X_C4.7U10Y0805
C480
C480
C0.1U16Y0402
C0.1U16Y0402
+
+
1 2
ITPM_ENB
Itegrated TPM Enable:
0=Enable iTPM
B B
A A
5
1=Disable iTPM
DualX8_Enable
0=2X8 PCIe Ports Enable
1=1X16 PCIe Port Enable
Primary _PEG_Presence
DEMO BOARD CHANGE
?
?
Primary PCIe port Detect:
0=PCIe Card is in Primary Slot
1=PCIe Card is not in Primary Slot
PIN H L
EXP_SLR
Normal
Concurrent
EXP_EN
MCH_TCEN
Enable
4
Reverse
Non-concurrent
Disable
Description
PCI_E Lane Reversal
PCI_E/SDVO co-existence
TLS confidentiality
PSI(POWER STATE INDICATOR)
VCC5
R252
R252
VCC5
1KR0402
C0.1U16Y0402
C0.1U16Y0402
P-P4402FAG_TSOP6-RH
P-P4402FAG_TSOP6-RH
PSI#_N28
PSI#5,28
C233
C233
R243
R243
X_0R0402
X_0R0402
4
51
Q39
Q39
H_CPURST#3,4,7,21
3
2
H_CPURST#3,4,7,21
VCC5
5.1KR0402
5.1KR0402
C10U6.3X50805
C10U6.3X50805
VCC5
1KR0402
R272
R272
1KR0402
1KR0402
R241
R241
C207
C207
R273
R273
1KR0402
1KR0402
R242
R242
1KR0402
1KR0402
PDG:page 438 ,Please put near PWM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Q40
Q40
D1
G1
S1
G2
D2
S2
MBT3904D
MBT3904D
Q41
Q41
D1
G1
S1
G2
D2
S2
MBT3904D
MBT3904D
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Eaglelake VGA/MISC
Eaglelake VGA/MISC
Eaglelake VGA/MISC
MS-7420N1
MS-7420N1
MS-7420N1
1
834Tuesday, January 29, 2008
834Tuesday, January 29, 2008
834Tuesday, January 29, 2008
0A
0A
0A
of
of
of
5
NB1C
NB1C
BC41
T20T20
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14
CAS_A#
RAS_A#
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
DDR3_RST#
DDR3_PWROK
SCS_A#1
MAA_A0
WE_A#
DDR3_B_ODT3
5
T6T6
T22T22
SBS_A0
SBS_A1
SBS_A2
SCS_A#0
T18T18
SCKE_A0
SCKE_A1
ODT_A0
ODT_A1
VCC_DDR
R453 1KR1%0402R453 1KR1%0402
DDR_A_MA_0
BC35
DDR_A_MA_1
BB32
DDR_A_MA_2
BC32
DDR_A_MA_3
BD32
DDR_A_MA_4
BB31
DDR_A_MA_5
AY31
DDR_A_MA_6
BA31
DDR_A_MA_7
BD31
DDR_A_MA_8
BD30
DDR_A_MA_9
AW43
DDR_A_MA_10
BC30
DDR_A_MA_11
BB30
DDR_A_MA_12
AM42
DDR_A_MA_13
BD28
DDR_A_MA_14
AW42
DDR_A_WEB
AU42
DDR_A_CASB
AV42
DDR_A_RASB
AV45
DDR_A_BS_0
AY44
DDR_A_BS_1
BC28
DDR_A_BS_2
AU43
DDR_A_CSB_0
AR40
DDR_A_CSB_1
AU44
DDR_A_CSB_2
AM43
DDR_A_CSB_3
BB27
DDR_A_CKE_0
BD27
DDR_A_CKE_1
BA27
DDR_A_CKE_2
AY26
DDR_A_CKE_3
AR42
DDR_A_ODT_0
AM44
DDR_A_ODT_1
AR44
DDR_A_ODT_2
AL40
DDR_A_ODT_3
AY37
DDR_A_CK_0
BA37
DDR_A_CKB_0
AW29
DDR_A_CK_1
AY29
DDR_A_CKB_1
AU37
DDR_A_CK_2
AV37
DDR_A_CKB_2
AU33
DDR_A_CK_3
AT33
DDR_A_CKB_3
AT30
DDR_A_CK_4
AR30
DDR_A_CKB_4
AW38
DDR_A_CK_5
AY38
DDR_A_CKB_5
BC24
DDR3_DRAMRSTB
AR6
DDR3_DRAM_PWROK
AR43
DDR3_A_CSB1
BB40
DDR3_A_MA0
AT44
DDR3_A_WEB
AV40
DDR3_B_ODT3
R448
R448
1KR1%0402
1KR1%0402
3 OF 7
3 OF 7
ELK_CRB
ELK_CRB
SYM_REV = 1.5
SYM_REV = 1.5
DDR_A
DDR_A
MCH_VREF_A
C366
C366
C0.1U16Y0402
C0.1U16Y0402
DDR_A_DQS_0
DDR_A_DQSB_0
DDR_A_DQS_1
DDR_A_DQSB_1
DDR_A_DQS_2
DDR_A_DQSB_2
DDR_A_DQS_3
DDR_A_DQSB_3
DDR_A_DQS_4
DDR_A_DQSB_4
DDR_A_DQS_5
DDR_A_DQSB_5
DDR_A_DQS_6
DDR_A_DQSB_6
DDR_A_DQS_7
DDR_A_DQSB_7
DDR_A_DM_0
DDR_A_DM_1
DDR_A_DM_2
DDR_A_DM_3
DDR_A_DM_4
DDR_A_DM_5
DDR_A_DM_6
DDR_A_DM_7
DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7
DDR_A_DQ_8
DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15
DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23
DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31
DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39
DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47
DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55
DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63
MAA_A[0..14]12
D D
CAS_A#12
RAS_A#12
SBS_A[0..2]12
SCS_A#[0..1]12
SCKE_A[0..1]12
ODT_A[0..1]12
C C
P_DDR0_A12
N_DDR0_A12
T21T21
T24T24
P_DDR2_A12
N_DDR2_A12
DDR3_RST#12
B B
A A
WE_A#12
4
DQS_A0
BC5
DQS_A#0
BD4
DQS_A1
BB9
DQS_A#1
BC9
DQS_A2
BD15
DQS_A#2
BB15
DQS_A3
AR22
DQS_A#3
AT22
DQS_A4
AH43
DQS_A#4
AH42
DQS_A5
AD43
DQS_A#5
AE42
DQS_A6
Y43
DQS_A#6
Y42
DQS_A7
T44
DQS_A#7
T43
DQM_A0
BC3
DQM_A1
BD9
DQM_A2
BD14
DQM_A3
AV22
DQM_A4
AK42
DQM_A5
AE45
DQM_A6
AA45
DQM_A7
T42
DATA_A0
BC2
DATA_A1
BD3
DATA_A2
BD7
DATA_A3
BB7
DATA_A4
BB2
DATA_A5
BA3
DATA_A6
BE6
DATA_A7
BD6
DATA_A8
BB8
DATA_A9
AY8
DATA_A10
BD11
DATA_A11
BB11
DATA_A12
BC7
DATA_A13
BE8
DATA_A14
BD10
DATA_A15
AY11
DATA_A16
BB14
DATA_A17
BC14
DATA_A18
BC16
DATA_A19
BB16
DATA_A20
BC11
DATA_A21
BE12
DATA_A22
BA15
DATA_A23
BD16
DATA_A24
AW21
DATA_A25
AY22
DATA_A26
AV24
DATA_A27
AY24
DATA_A28
AU21
DATA_A29
AT21
DATA_A30
AR24
DATA_A31
AU24
DATA_A32
AL41
DATA_A33
AK43
DATA_A34
AG42
DATA_A35
AG44
DATA_A36
AL42
DATA_A37
AK44
DATA_A38
AH44
DATA_A39
AG41
DATA_A40
AF43
DATA_A41
AF42
DATA_A42
AC44
DATA_A43
AC42
DATA_A44
AF40
DATA_A45
AF44
DATA_A46
AD44
DATA_A47
AC41
DATA_A48
AB43
DATA_A49
AA42
DATA_A50
W42
DATA_A51
W41
DATA_A52
AB42
DATA_A53
AB44
?
?
DATA_A54
Y44
DATA_A55
Y40
DATA_A56
V42
DATA_A57
U45
DATA_A58
R40
DATA_A59
P44
DATA_A60
V44
DATA_A61
V43
DATA_A62
R41
DATA_A63
R44
SLP_S4#15,21,25,27
4
DQS_A0 12
DQS_A#0 12
DQS_A1 12
DQS_A#1 12
DQS_A2 12
DQS_A#2 12
DQS_A3 12
DQS_A#3 12
DQS_A4 12
DQS_A#4 12
DQS_A5 12
DQS_A#5 12
DQS_A6 12
DQS_A#6 12
DQS_A7 12
DQS_A#7 12
DQM_A[0..7] 12
DATA_A[0..63] 12
VCC5_SB
R447 1KR1%0402R447 1KR1%0402
N-SST3904_SOT23
N-SST3904_SOT23
R439
R439
1KR1%0402
1KR1%0402
DDR3_PWROK#
CE
B
Q63
Q63
3
VCC_DDR
N-SST3904_SOT23
N-SST3904_SOT23
Q59
Q59
3
MAA_B[0..14]12
WE_B#12
CAS_B#12
RAS_B#12
SBS_B[0..2]12
SCS_B#[0..1]12
SCKE_B[0..1]12
ODT_B[0..1]12
P_DDR0_B12
N_DDR0_B12
T19T19
T23T23
P_DDR2_B12
N_DDR2_B12
PLACE 0.1UF CAP CLOSE TO MCH
R427
R427
10KR0402
10KR0402
DDR3_PWROK
CE
B
C345
C345
C1U10X
C1U10X
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
MAA_B14
WE_B#
CAS_B#
RAS_B#
SBS_B0
SBS_B1
SBS_B2
SCS_B#0
SCS_B#1
SCKE_B0
SCKE_B1
ODT_B0
ODT_B1
P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B
MCH_VREF_A
C363
C363
C0.1U16Y0402
C0.1U16Y0402
DDR3_PWROK 15
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
BD24
BB23
BB24
BD23
BB22
BD22
BC22
BC20
BB20
BD20
BC26
BD19
BB19
BE38
BA19
BD36
BC37
BD35
BD26
BB26
BD18
BB35
BD39
BB37
BD40
BC18
AY20
BE17
BB18
BD37
BC39
BB38
BD42
AY33
AW33
AV31
AW31
AW35
AY35
AT31
AU31
AP31
AP30
AW37
AV35
BB44
AY42
BA43
BC43
BC44
AN29
AN30
AJ33
AK33
VCC_DDR
C356
C356
C0.1U16Y0402
C0.1U16Y0402
NB1D
NB1D
DDR_B_MA_0
DDR_B_MA_1
DDR_B_MA_2
DDR_B_MA_3
DDR_B_MA_4
DDR_B_MA_5
DDR_B_MA_6
DDR_B_MA_7
DDR_B_MA_8
DDR_B_MA_9
DDR_B_MA_10
DDR_B_MA_11
DDR_B_MA_12
DDR_B_MA_13
DDR_B_MA_14
DDR_B_WEB
DDR_B_CASB
DDR_B_RASB
DDR_B_BS_0
DDR_B_BS_1
DDR_B_BS_2
DDR_B_CSB_0
DDR_B_CSB_1
DDR_B_CSB_2
DDR_B_CSB_3
DDR_B_CKE_0
DDR_B_CKE_1
DDR_B_CKE_2
DDR_B_CKE_3
DDR_B_ODT_0
DDR_B_ODT_1
DDR_B_ODT_2
DDR_B_ODT_3
DDR_B_CK_0
DDR_B_CKB_0
DDR_B_CK_1
DDR_B_CKB_1
DDR_B_CK_2
DDR_B_CKB_2
DDR_B_CK_3
DDR_B_CKB_3
DDR_B_CK_4
DDR_B_CKB_4
DDR_B_CK_5
DDR_B_CKB_5
DDR_B
DDR_B
DDR_VREF
DDR_RPD
DDR_RPU
DDR_SPD
DDR_SPU
RSVD_01
RSVD_02
RSVD_03
RSVD_04
4 OF 7
4 OF 7
ELK_CRB
ELK_CRB
2
SYM_REV = 1.5
SYM_REV = 1.5
R437 80.6R1%0402R437 80.6R1%0402
R444 80.6R1%0402R444 80.6R1%0402
R442 249R1%0402R442 249R1%0402
R443 80.6R1%0402R443 80.6R1%0402
C365
C365
C1U10X
C1U10X
2
DDR_B_DQS_0
DDR_B_DQSB_0
DDR_B_DQS_1
DDR_B_DQSB_1
DDR_B_DQS_2
DDR_B_DQSB_2
DDR_B_DQS_3
DDR_B_DQSB_3
DDR_B_DQS_4
DDR_B_DQSB_4
DDR_B_DQS_5
DDR_B_DQSB_5
DDR_B_DQS_6
DDR_B_DQSB_6
DDR_B_DQS_7
DDR_B_DQSB_7
DDR_B_DM_0
DDR_B_DM_1
DDR_B_DM_2
DDR_B_DM_3
DDR_B_DM_4
DDR_B_DM_5
DDR_B_DM_6
DDR_B_DM_7
DDR_B_DQ_0
DDR_B_DQ_1
DDR_B_DQ_2
DDR_B_DQ_3
DDR_B_DQ_4
DDR_B_DQ_5
DDR_B_DQ_6
DDR_B_DQ_7
DDR_B_DQ_8
DDR_B_DQ_9
DDR_B_DQ_10
DDR_B_DQ_11
DDR_B_DQ_12
DDR_B_DQ_13
DDR_B_DQ_14
DDR_B_DQ_15
DDR_B_DQ_16
DDR_B_DQ_17
DDR_B_DQ_18
DDR_B_DQ_19
DDR_B_DQ_20
DDR_B_DQ_21
DDR_B_DQ_22
DDR_B_DQ_23
DDR_B_DQ_24
DDR_B_DQ_25
DDR_B_DQ_26
DDR_B_DQ_27
DDR_B_DQ_28
DDR_B_DQ_29
DDR_B_DQ_30
DDR_B_DQ_31
DDR_B_DQ_32
DDR_B_DQ_33
DDR_B_DQ_34
DDR_B_DQ_35
DDR_B_DQ_36
DDR_B_DQ_37
DDR_B_DQ_38
DDR_B_DQ_39
DDR_B_DQ_40
DDR_B_DQ_41
DDR_B_DQ_42
DDR_B_DQ_43
DDR_B_DQ_44
DDR_B_DQ_45
DDR_B_DQ_46
DDR_B_DQ_47
DDR_B_DQ_48
DDR_B_DQ_49
DDR_B_DQ_50
DDR_B_DQ_51
DDR_B_DQ_52
DDR_B_DQ_53
DDR_B_DQ_54
DDR_B_DQ_55
DDR_B_DQ_56
DDR_B_DQ_57
DDR_B_DQ_58
DDR_B_DQ_59
DDR_B_DQ_60
DDR_B_DQ_61
DDR_B_DQ_62
DDR_B_DQ_63
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
1
DQS_B0
AW8
DQS_B#0
AW9
DQS_B1
AT15
DQS_B#1
AU15
DQS_B2
AR20
DQS_B#2
AR17
DQS_B3
AU26
DQS_B#3
AT26
DQS_B4
AR38
DQS_B#4
AR37
DQS_B5
AK34
DQS_B#5
AL34
DQS_B6
AF37
DQS_B#6
AF36
DQS_B7
AB35
DQS_B#7
AD35
DQM_B0
AY6
DQM_B1
AR15
DQM_B2
AU17
DQM_B3
AV25
DQM_B4
AU39
DQM_B5
AL37
DQM_B6
AJ35
DQM_B7
AD37
DATA_B0
AV7
DATA_B1
AW4
DATA_B2
BA9
DATA_B3
AU11
DATA_B4
AU7
DATA_B5
AU8
DATA_B6
AW7
DATA_B7
AY9
DATA_B8
AY13
DATA_B9
AP15
DATA_B10
AW15
DATA_B11
AT16
DATA_B12
AU13
DATA_B13
AW13
DATA_B14
AP16
DATA_B15
AU16
DATA_B16
AY17
DATA_B17
AV17
DATA_B18
AR21
DATA_B19
AV20
DATA_B20
AP17
DATA_B21
AW16
DATA_B22
AT20
DATA_B23
AN20
DATA_B24
AT25
DATA_B25
AV26
DATA_B26
AU29
DATA_B27
AV29
DATA_B28
AW25
DATA_B29
AR25
DATA_B30
AP26
DATA_B31
AR29
DATA_B32
AR36
DATA_B33
AU38
DATA_B34
AN35
DATA_B35
AN37
DATA_B36
AV39
DATA_B37
AW39
DATA_B38
AU40
DATA_B39
AU41
DATA_B40
AL35
DATA_B41
AL36
DATA_B42
AK36
DATA_B43
AJ34
DATA_B44
AN39
DATA_B45
AN40
DATA_B46
AK37
DATA_B47
AL39
DATA_B48
AJ38
DATA_B49
AJ37
DATA_B50
AF38
DATA_B51
AE37
?
?
DATA_B52
AK40
DATA_B53
AJ40
DATA_B54
AF34
DATA_B55
AE35
DATA_B56
AD40
DATA_B57
AD38
DATA_B58
AB40
DATA_B59
AA39
DATA_B60
AE36
DATA_B61
AE39
DATA_B62
AB37
DATA_B63
AB38
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
DQS_B0 12
DQS_B#0 12
DQS_B1 12
DQS_B#1 12
DQS_B2 12
DQS_B#2 12
DQS_B3 12
DQS_B#3 12
DQS_B4 12
DQS_B#4 12
DQS_B5 12
DQS_B#5 12
DQS_B6 12
DQS_B#6 12
DQS_B7 12
DQS_B#7 12
DQM_B[0..7] 12
DATA_B[0..63] 12
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Eaglelake Memory
Eaglelake Memory
Eaglelake Memory
MS-7420N1
MS-7420N1
MS-7420N1
1
0A
0A
0A
of
934Wednesday, January 23, 2008
of
934Wednesday, January 23, 2008
of
934Wednesday, January 23, 2008
5
4
3
2
1
V_1P1_CORE
?
?
AA27
AA29
AA25
AA21
AA23
AA19
NB1F
NB1F
V_1P1_CORE
A25
VTT_FSB_01
B25
VTT_FSB_02
D D
C C
V_1P5_ICH
V_1P1_CORE
B B
A A
V_1P1_CL
V_1P5_ICH
V_1P5_ICH
V_1P1_CL
R313
R313
0R0603
0R0603
R311
R311
0R0603
0R0603
V_3P3_DAC_FILTERED
V_1P5_EXP_FB
R399
R399
X_0R0603
X_0R0603
R404
R404
0R0603
0R0603
V_CKDDR
C364
C364
C1U16Y
C1U16Y
V_1P1_CORE
B26
VTT_FSB_03
C24
VTT_FSB_04
C26
VTT_FSB_05
D22
VTT_FSB_06
D23
VTT_FSB_07
D24
VTT_FSB_08
E23
VTT_FSB_09
F21
VTT_FSB_10
F22
VTT_FSB_11
G21
VTT_FSB_12
G22
VTT_FSB_13
H21
VTT_FSB_14
H22
VTT_FSB_15
J21
VTT_FSB_16
J22
VTT_FSB_17
K21
VTT_FSB_18
K22
VTT_FSB_19
L21
VTT_FSB_20
L22
VTT_FSB_21
M21
VTT_FSB_22
M22
VTT_FSB_23
N20
VTT_FSB_24
N21
VTT_FSB_25
N22
VTT_FSB_26
P20
VTT_FSB_27
P21
VTT_FSB_28
P22
VTT_FSB_29
P24
VTT_FSB_30
R20
VTT_FSB_31
R21
VTT_FSB_32
R23
VTT_FSB_34
R24
VTT_FSB_35
R22
VTT_FSB_36
VCCD_CRT
B20
VCCDQ_CRT
VCCA_GPLL
B16
VCCA_MPLL
VCCA_HPLL
VCCA_GPLLD
V_1P1_HPL
VCCA_DPLLA
VCCA_DPLLB
VCC3
R421
R421
0R0603
0R0603
Separate when AMT is
supported
5
VCCAPLL_EXP
A21
VCCA_MPLL
B22
VCCA_HPLL
B12
VCCDPLL_EXP
U33
VCCD_HPLL
D20
VCCA_DPLLA
C20
VCCA_DPLLB
D19
VCCA_DAC_01
B19
VCCA_DAC_02
E19
VCC3_3_1
A17
VCC_EXP
AG2
VCCAVRM_EXP
AR2
VCC_HDA
B17
VSS_369
AK32
VCC_SMCLK_04
AL31
VCC_SMCLK_03
AL32
VCC_SMCLK_02
AM31
VCC_SMCLK_01
AM30
VCCCML_DDR
V_1P1_CL
L20 1U500m_0805-RHL20 1U500m_0805-RH
SYM_REV = 1.5
SYM_REV = 1.5
VCC_04
VCC_02
VCC_03
VCC_01
6 OF 7
6 OF 7
ELK_CRB
ELK_CRB
VCC_CL_01
AJ15
AK14
R344 1R1%R344 1R1%
R343 1R1%R343 1R1%
C10U10Y0805
C10U10Y0805
VCC_05
VCC_06
VCC_CL_03
VCC_CL_02
AM29
AB22
AB20
AA30
VCC_09
VCC_08
VCC_07
VCC_CL_06
VCC_CL_05
VCC_CL_04
AM24
AM25
AM26
C272
C272
AB29
AB24
AB26
VCC_12
VCC_10
VCC_11
VCC_CL_09
VCC_CL_08
VCC_CL_07
AM20
AM21
AM22
VCCA_GPLL
AB30
AC16
VCC_13
VCC_14
VCC_CL_11
VCC_CL_10
AM16
AM17
AC21
AC19
AC17
VCC_17
VCC_16
VCC_15
VCC_CL_14
VCC_CL_13
VCC_CL_12
AL30
AK31
AM15
AC29
AC27
AC23
AC25
VCC_21
VCC_20
VCC_18
VCC_19
VCC_CL_18
VCC_CL_17
VCC_CL_16
VCC_CL_15
AJ32
AF32
AE32
AE33
C280
C280
C0.1U16Y0402
C0.1U16Y0402
AD16
AD17
AD20
VCC_22
VCC_23
VCC_24
VCC_CL_21
VCC_CL_20
VCC_CL_19
AB33
AD32
AD33
V_1P1_CL
4
AD26
AD22
AD24
VCC_27
VCC_25
VCC_26
VCC_CL_24
VCC_CL_23
VCC_CL_22
AA32
AA33
AB32
AD29
VCC_28
VCC_CL_25
Y33
AE27
AE29
AF16
AE25
AE23
AE21
AE17
AE19
AE16
VCC_35
VCC_36
VCC_37
VCC_34
VCC_33
VCC_32
VCC_30
VCC_31
VCC_29
POWER
POWER
VCC_CL_28
VCC_CL_27
VCC_CL_26
Y32
AP2
VCC_CL_34
VCC_CL_33
VCC_CL_32
VCC_CL_31
VCC_CL_30
VCC_CL_29
AP1
AM2
AM3
AM4
AL26
AL27
AL29
If has noise stuff L01-22A7013-M09
,IND INDUCTOR,2.2uH,20%,0603,120mA,0.4Ohm,RoHS COMPLIANCE
R315
R315
0R0603
0R0603
AF20
AF21
AF19
AF17
VCC_40
VCC_39
VCC_38
VCC_CL_37
VCC_CL_36
VCC_CL_35
AL22
AL23
AL24
AL25
VCCA_MPLL
AF24
AF23
AF22
VCC_44
VCC_43
VCC_41
VCC_42
VCC_CL_41
VCC_CL_40
VCC_CL_39
VCC_CL_38
AL19
AL20
AL21
AG16
AF29
AF26
AF27
AF25
VCC_49
VCC_48
VCC_46
VCC_47
VCC_45
VCC_CL_46
VCC_CL_45
VCC_CL_44
VCC_CL_43
VCC_CL_42
AL12
AL14
AL15
AL16
AL17
R318 1R1%R318 1R1%
R317 1R1%R317 1R1%
AG20
AG22
AG17
VCC_51
VCC_52
VCC_50
VCC_CL_48
VCC_CL_47
VCC_CL_49
AL9
AL10
AL11
AJ16
AG29
AG26
AG24
VCC_55
VCC_54
VCC_53
VCC_CL_52
VCC_CL_51
VCC_CL_50
AL5
AL6
AL7
AL8
C254
C254
C10U10Y0805
C10U10Y0805
AJ21
AJ19
AJ17
VCC_59
VCC_58
VCC_57
VCC_56
VCC_CL_56
VCC_CL_55
VCC_CL_54
VCC_CL_53
AL1
AL2
AL4
V_1P1_CL
3
W21
U29
W19
U27
U26
U25
U24
U23
U22
U21
T29
T26
T27
T25
T24
T21
R29
R27
R26
R25
AJ25
AJ23
VCC_81
VCC_82
VCC_80
VCC_79
VCC_78
VCC_77
VCC_76
VCC_75
VCC_74
VCC_73
VCC_71
VCC_72
VCC_70
VCC_69
VCC_66
VCC_65
VCC_64
VCC_63
VCC_62
VCC_61
VCC_60
VCC_CL_79
VCC_CL_78
VCC_CL_77
VCC_CL_76
VCC_CL_75
VCC_CL_74
VCC_CL_73
VCC_CL_72
VCC_CL_71
VCC_CL_70
VCC_CL_69
VCC_CL_68
VCC_CL_67
VCC_CL_66
VCC_CL_65
VCC_CL_64
VCC_CL_63
VCC_CL_62
VCC_CL_61
VCC_CL_60
VCC_CL_59
VCC_CL_58
VCC_CL_57
AF31
AE31
AD31
AC31
AB31
Y31
AA31
VCCA_HPLL
AK30
If has noise stuff L01-27BA013-M09
,IND INDUCTOR,0.27uH,5%,0603,110mA,3.4Ohm,RoHS COMPLIANCE
R316
R316
0R0603
0R0603
AG31
AG30
AJ30
AJ31
AK16
AK17
AK19
AK20
AK21
AK22
AK23
AK24
AK25
AK26
AK27
AK29
W27
W25
W23
VCC_86
VCC_85
VCC_84
VCC_83
VCC_CL_83
VCC_CL_80
VCC_CL_82
VCC_CL_81
Y30
AJ27
AJ29
Y22
Y20
W29
VCC_89
VCC_88
VCC_87
VCC_CL_84
VCC_CL_85
Y29
W31
C269
C269
C2.2U6.3Y
C2.2U6.3Y
Y26
Y24
VCC_90
VCC_91
T22
T23
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_EXP_1
VCC_EXP_2
VCC_EXP_3
VCC_EXP_4
VCC_EXP_5
VCC_EXP_06
VCC_EXP_07
VCC_EXP_08
VCC_EXP_09
VCC_EXP_10
VCC_EXP_11
VCC_EXP_12
VCC_EXP_13
VCC_EXP_14
VCC_EXP_15
VCC_EXP_16
VCC_EXP_17
VCC_EXP_18
VCC_EXP_19
VCC_EXP_20
VCC_EXP_21
VCC_EXP_22
VCC_EXP_23
VCC_EXP_24
VCC_EXP_25
VCC_EXP_26
VCC_EXP_27
VCC_EXP_28
VCC_EXP_29
VCC_EXP_30
VCC_EXP_31
VCC_EXP_32
VCC_EXP_33
VCC_EXP_34
VCC_EXP_35
VCC_EXP_36
VCC_EXP_37
VCC_EXP_38
VCC_SM_01
VCC_SM_02
VCC_SM_03
VCC_SM_04
VCC_SM_05
VCC_SM_06
VCC_SM_07
VCC_SM_08
VCC_SM_09
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
2
V_1P1_CORE
AC4
AF3
F9
H4
L3
P3
V4
AJ1
AJ2
AK2
AK3
AK4
AK13
AK12
AK11
AK10
AK9
AK8
AK7
AK6
AJ14
AJ13
AJ12
AJ11
AJ10
AJ9
AJ8
AJ7
AJ6
AG15
AF15
AF14
AE15
AE14
AD15
AD14
AC15
AB14
AA15
AA14
Y15
Y14
W15
U15
U14
VCC_DDR
AP44
AT45
AV44
AY40
BA41
BB39
BD21
BD25
BD29
BD34
BD38
BE23
BE27
BE31
BE36
V_1P1_CORE
V_1P1_CORE
V_CKDDR
VCC3
V_1P1_CORE
V_1P1_CORE
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
V_3P3_DAC_FILTERED
R306
R306
40.2R1%0402
40.2R1%0402
R327 1R1%0402R327 1R1%0402
R314
R314
39.2R1%
39.2R1%
C229 C10U10Y0805C229 C10U10Y0805
C265
C265
L18 1U500m_0805-RHL18 1U500m_0805-RH
L25 1U500m_0805-RHL25 1U500m_0805-RH
R450 1R1%R450 1R1%
R449 1R1%R449 1R1%
VCCD_CRT
C274
C274
C0.1U16Y0402
C0.1U16Y0402
R287 1R1%R287 1R1%
C4.7U10X50805
C4.7U10X50805
L15 10U100m_0805L15 10U100m_0805
CD470U6.3EL11.5-RH
CD470U6.3EL11.5-RH
L16 10U100m_0805L16 10U100m_0805
CD470U6.3EL11.5-RH
CD470U6.3EL11.5-RH
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
V_1P5_EXP_FB
X_C10U10Y0805
X_C10U10Y0805
R338 1R1%R338 1R1%
R341 1R1%R341 1R1%
C273
C273
C10U10Y0805
C10U10Y0805
EC53
EC53
C22u6.3X1206
C22u6.3X1206
C271
C271
C1U16Y
C1U16Y
V_3P3_DAC_FILTERED
C259
C259
C256
C256
X_C0.1U16Y0402
X_C0.1U16Y0402
VCCA_DPLLA
+
+
12
EC23
EC23
VCCA_DPLLB
+
+
12
EC24
EC24
Eaglelake Power
Eaglelake Power
Eaglelake Power
MS-7420N1
MS-7420N1
MS-7420N1
1
VCCA_GPLLD
VCC_DDR
EC27
EC27
X_C22u6.3X1206
X_C22u6.3X1206
C275
C275
C0.1U16Y0402
C0.1U16Y0402
C267
C267
C0.1U16Y0402
C0.1U16Y0402
10 34Wednesday, January 23, 2008
10 34Wednesday, January 23, 2008
10 34Wednesday, January 23, 2008
C266
C266
C0.1U16Y0402
C0.1U16Y0402
of
of
of
0A
0A
0A
5
4
3
2
1
All cap place close to GMCH
?
?
A3
A43
B44
BC1
BC45
BD2
BD44
BE3
F1
VSS_361
VSS_362
VSS_104
VSS_105
AN21
AN22
VSS_360
VSS_359
VSS_106
VSS_107
AN24
AN25
VSS_358
VSS_357
VSS_108
VSS_109
AN26
AN33
BE43
Y9
VSS_356
VSS_355
VSS_110
VSS_111
AN36
AN38
Y35
Y39
VSS_353
VSS_354
VSS_112
VSS_113
AN7
AP20
Y27
Y3
VSS_351
VSS_352
VSS_114
VSS_115
AP21
AP22
Y23
Y25
VSS_349
VSS_350
VSS_116
VSS_117
AP24
AP25
Y2
Y21
VSS_347
VSS_348
VSS_118
VSS_119
AP29
AP45
4
Y17
Y19
VSS_345
VSS_346
VSS_120
VSS_121
AR10
AR11
Y13
Y16
VSS_343
VSS_344
VSS_122
VSS_123
AR13
AR16
Y11
Y12
VSS_341
VSS_342
VSS_124
VSS_125
AR3
AR26
W5
Y10
VSS_339
VSS_340
VSS_126
VSS_127
AR31
AR33
W44
W45
VSS_337
VSS_338
VSS_128
VSS_129
AR35
AR39
W24
W26
VSS_335
VSS_336
VSS_130
VSS_131
AR8
AR9
W2
W20
W22
W17
W16
W1
U8
U44
VSS_332
VSS_333
VSS_334
VSS_331
VSS_330
VSS_329
VSS_328
VSS_327
GND
GND
VSS_132
VSS_133
VSS_134
VSS_135
VSS_139
VSS_138
VSS_137
VSS_136
AT1
AT2
AT11
AT13
AT17
AT35
AT29
AT24
U39
U36
VSS_326
VSS_325
VSS_141
VSS_140
AU22
AU20
U20
U19
VSS_324
VSS_323
VSS_143
VSS_142
AU30
AU25
U17
U16
VSS_322
VSS_321
VSS_145
VSS_144
AU5
AU35
U13
U12
VSS_320
VSS_319
VSS_147
VSS_146
AU9
AU6
U1
U11
VSS_317
VSS_318
VSS_149
VSS_148
AV13
AV11
T8
T9
VSS_315
VSS_316
VSS_151
VSS_150
AV16
AV15
T6
T7
VSS_313
VSS_314
VSS_153
VSS_152
AV2
AV21
T4
T40
VSS_311
VSS_312
VSS_155
VSS_154
AV33
AV30
3
T35
T38
VSS_309
VSS_310
VSS_157
VSS_156
AV6
AV38
T32
T33
VSS_307
VSS_308
VSS_159
VSS_158
AV9
AV8
T30
T31
VSS_305
VSS_306
VSS_161
VSS_160
AW17
AW11
T20
T3
VSS_303
VSS_304
VSS_163
VSS_162
AW22
AW20
T17
T19
VSS_301
VSS_302
VSS_165
VSS_164
AW26
AW24
T13
T16
VSS_299
VSS_300
VSS_167
VSS_166
AW3
AW30
T11
T12
VSS_297
VSS_298
VSS_169
VSS_168
AY1
AY15
R8
T10
VSS_295
VSS_296
VSS_171
VSS_170
AY21
AY16
R45
R5
VSS_293
VSS_294
VSS_173
VSS_172
AY30
AY25
R30
R38
VSS_291
VSS_292
VSS_175
VSS_174
B10
AY45
R19
R2
VSS_289
VSS_290
VSS_177
VSS_176
B27
B21
R16
R17
VSS_287
VSS_288
VSS_179
VSS_178
B34
B29
R11
R12
VSS_285
VSS_286
VSS_181
VSS_180
BA5
BA23
P26
P31
VSS_283
VSS_284
VSS_182
VSS_183
BB21
BB25
P17
P25
VSS_281
VSS_282
VSS_184
VSS_185
BB6
BB28
P16
VSS_280
VSS_279
VSS_278
VSS_277
VSS_276
VSS_275
VSS_274
VSS_273
VSS_272
VSS_271
VSS_270
VSS_269
VSS_268
VSS_267
VSS_266
VSS_265
VSS_264
VSS_263
VSS_262
VSS_261
VSS_260
VSS_259
VSS_258
VSS_257
VSS_256
VSS_255
VSS_254
VSS_253
VSS_252
VSS_251
VSS_250
VSS_249
VSS_248
VSS_247
VSS_246
VSS_245
VSS_244
VSS_243
VSS_242
VSS_241
VSS_240
VSS_239
VSS_238
VSS_237
VSS_236
VSS_235
VSS_234
VSS_233
VSS_232
VSS_231
VSS_230
VSS_229
VSS_228
VSS_227
VSS_226
VSS_225
VSS_224
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199
VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189
VSS_187
VSS_186
VSS
VSS
VSS
VSS
N8
N38
N36
N33
N30
N29
N26
N16
N13
N11
M44
M25
M24
M1
L9
L8
L4
L39
L35
L30
L26
L20
L16
L10
K45
K33
K29
K24
K20
K17
K13
K11
J9
J8
J5
J4
J37
J3
H9
H8
H7
H44
H38
H33
H31
H30
H25
H20
H16
H15
H13
H11
H1
G35
G3
G29
G26
G24
G17
G11
F8
F45
F42
F4
F30
F2
F16
E5
E41
E31
E3
D7
D6
D39
D26
D25
D21
D16
D11
C5
C3
BE40
BE34
BE29
BE25
BE21
BE19
BE15
BE10
BD8
BD17
BD12
AD30
AC30
AF30
AE30
2
SYM_REV = 1.5
SYM_REV = 1.5
VSS_368
VSS_366
VSS_367A6VSS_365
VSS_097
VSS_098
VSS_099
VSS_100
AJ45
AK35
AK38
AK39
VSS_364C1VSS_363
VSS_101
VSS_102
AL38
AL44
C45
VSS_103
AL45
BD43
C16
NB1G
NB1G
A12
VSS_001
A15
A19
A27
A31
D D
C C
B B
A A
A36
A40
A8
AA1
AA11
AA12
AA13
AA16
AA17
AA20
AA22
AA24
AA26
AA34
AA38
AA40
AA44
AA8
AB11
AB12
AB16
AB17
AB19
AB21
AB23
AB25
AB27
AB34
AB36
AB39
AB4
AB6
AB7
AB8
AC20
AC22
AC24
AC26
AC45
AC5
AD12
AD19
AD21
AD23
AD25
AD27
AD3
AD34
AD36
AD39
AD6
AD9
AE1
AE11
AE12
AE13
AE20
AE22
AE24
AE26
AE34
AE38
AE40
AE44
AE8
AF10
AF11
AF12
AF13
AF33
AF35
AF39
AF6
AF7
AG19
AG21
AG23
AG25
AG27
AG45
AG5
AH2
AH3
AH4
AJ20
AJ22
AJ24
AJ26
5
VSS_002
VSS_003
VSS_004
VSS_005
VSS_006
VSS_007
VSS_008
VSS_009
VSS_010
VSS_011
VSS_012
VSS_013
VSS_014
VSS_015
VSS_016
VSS_017
VSS_018
VSS_019
VSS_020
VSS_021
VSS_022
VSS_023
VSS_024
VSS_025
VSS_026
VSS_027
VSS_028
VSS_029
VSS_030
VSS_031
VSS_032
VSS_033
VSS_034
VSS_035
VSS_036
VSS_037
VSS_038
VSS_039
VSS_040
VSS_041
VSS_042
VSS_043
VSS_044
VSS_045
VSS_046
VSS_047
VSS_048
VSS_049
VSS_050
VSS_051
VSS_052
VSS_053
VSS_054
VSS_055
VSS_056
VSS_057
VSS_058
VSS_059
VSS_060
VSS_061
VSS_062
VSS_063
VSS_064
VSS_065
VSS_066
VSS_067
VSS_068
VSS_069
VSS_070
VSS_071
VSS_072
VSS_073
VSS_074
VSS_075
VSS_076
VSS_077
VSS_078
VSS_079
VSS_080
VSS_081
VSS_082
VSS_083
VSS_084
VSS_085
VSS_086
VSS_087
VSS_088
VSS_089
VSS_090
VSS_091
VSS_092
VSS_093
VSS_371
VSS_372
VSS_094
VSS_095
AJ36
AJ39
7OF 7
7OF 7
ELK_CRB
ELK_CRB
VSS_096
AJ44
MCH memory decouping cap
VCC_DDR
C362 C2.2U6.3YC362 C2.2U6.3Y
C359 C2.2U6.3YC359 C2.2U6.3Y
C361 C2.2U6.3YC361 C2.2U6.3Y
C360 C2.2U6.3YC360 C2.2U6.3Y
C367 C2.2U6.3YC367 C2.2U6.3Y
C344 C2.2U6.3YC344 C2.2U6.3Y
V_1P1_CL decouping cap
V_1P1_CL
C338
C338
C339
C339
C337
C337
C340
C340
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
X_C10U10Y0805
X_C10U10Y0805
X_C10U10Y0805
X_C10U10Y0805
V_1P1_Core decouping cap
V_1P1_CORE
C253
C253
C290
C290
C296
C296
C302
C302
C298 C1U10XC298 C1U10X
C286 C1U10XC286 C1U10X
C300 C1U10XC300 C1U10X
C200 C1U10XC200 C1U10X
C211 C1U10XC211 C1U10X
C310 C1U10XC310 C1U10X
C258 X_C2.2U6.3YC258 X_C2.2U6.3Y
C276 X_C2.2U6.3YC276 X_C2.2U6.3Y
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
X_C10U10Y0805
X_C10U10Y0805
V_1P1_Core decouping cap(FSB)
V_1P1_CORE
C240 C2.2U6.3YC240 C2.2U6.3Y
C245 C2.2U6.3YC245 C2.2U6.3Y
C246 C2.2U6.3YC246 C2.2U6.3Y
C243 C0.1U16Y0402C243 C0.1U16Y0402
C244 C0.1U16Y0402C244 C0.1U16Y0402
C242 C0.1U16Y0402C242 C0.1U16Y0402
V_1P1_Core decouping cap(PCIE)
V_1P1_CORE
C330 C2.2U6.3YC330 C2.2U6.3Y
C329 C2.2U6.3YC329 C2.2U6.3Y
C331 C2.2U6.3YC331 C2.2U6.3Y
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
Eaglelake GND
Eaglelake GND
Eaglelake GND
0A
0A
MS-7420N1
MS-7420N1
MS-7420N1
1
11 34Wednesday, January 23, 2008
11 34Wednesday, January 23, 2008
11 34Wednesday, January 23, 2008
0A
of
of
of
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