5
4
3
2
1
MSI
MS-7405 Ver:0A
D D
C C
B B
CPU:
AMD M2 Athlon 64/Athlon 64 FX
System Chipset:
ATI RS485/RS690
ATI SB460/SB600
On Board Chipset:
Winbond Super I/O -- W83627DHG Ver.C
LAN -- RTL8110SC
HD Codec --ALC888
BIOS -- SPI ROM
Main Memory:
DDR * 4 (Max 4GB)
Expansion Slots:
PCI-E X 1 *3
PCI-E X 16 *1
PWM:
Controller--Intersil ISL6566CR 3 Phase
Clock Generator:
Controller--RTM 870T-691
Title Page
Cover Sheet 1
Block Diagram
AMD M2 940
System Memory
DDR2 Terminations
ATI RS690
CLOCK GENERATOR RTM 870T-691
ATI SB600
DAE-3 Circuit
PCI-Express X 16 ,X1
I/O W83627DHG Ver.C / FDD/TPM
LAN RTL8101E/RTL8111B
HD Audio - ALC888
1394 Controller-VT6308
USB connectors
PWM - ISL6566CR
MS-6 ACPI Controller & MS-6+
IDE / SATA / FAN / LPT
ATX Connector / Front Panel / KB / CON
VGA Connector
GPIO/PCI Config.
MANUAL PARTS
Revision history
Option Part
POWER MAP
POWER OK MAP
RESET MAP
2
3,4,5
6,7
8
9-12
13
14-18
19
20
21
22
23
24
25
26
27-28
29
30
31
32
33
34
35
36
37
38
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
Cover Sheet
Cover Sheet
Cover Sheet
1
MS-7405
MS-7405
MS-7405
Last Revision Date:
Last Revision Date:
Last Revision Date:
Monday, May 14, 2007
Monday, May 14, 2007
Monday, May 14, 2007
Sheet
Sheet
Sheet
Rev
Rev
Rev
0A
0A
0A
of
of
of
13 9
13 9
13 9
5
4
3
2
1
BLOCK DIAGRAM
D D
POWER
SUPPLY
CONNECTOR
VREG
SOCKET 940
K9
DDR2 SDRAM CONN 0
128-BIT 400/533MHZ
HT 16X16 1GHZ
PEX X16
C C
ATA 133
PRIMARY IDE
PEX X1
PCI EXPRESS
PCI EXPRESS
ATI
RS690
465 BGA
ATI
SB600
HT 8X8 1GHZ
AZAILIA/AC97
VGA CONN
PCI 33MHZ
Realtek ALC 888(HD, 7.1Channel)
DDR2 SDRAM CONN 2
DDR2 SDRAM CONN 1
DDR2 SDRAM CONN3
LAN-RTL8100C
IEEE1394-VT6308
564 BGA
PCI SLOT 1
X4 - SATA CONN
B B
FLOPPY CONN
PS2/KBRD CONN
PARALLEL CONN
COM1-2 CONN
INTEGRATED SATA 1/2
SIO
LPC SUPER I/O
W83627DHG
LPC BUS 33MHZ
X8 USB2.0 (SB460)
X10 USB2.0 (SB600)
BACK PANEL CONN
USB2 PORTS 0-1
DOUBLE STACK
USB2 PORTS 2-3
X2/GBIT LAN
FRONT PANEL HDR
USB2 PORTS 4-5
PCI SLOT 2
USB2 PORTS 6-7
SPI
A A
5
4
3
USB2 PORTS 8-9
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
2
Block Diagram
MS-7405
MS-7405
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
MS-7405
Last Revision Date:
Last Revision Date:
Last Revision Date:
Monday, May 14, 2007
Monday, May 14, 2007
Monday, May 14, 2007
Sheet
Sheet
Sheet
1
23 9
23 9
23 9
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
C166
C166
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
475P/1206
475P/1206
CPU1A
CPU1A
HYPERTRANSPORT
HYPERTRANSPORT
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)
L0_CTLOUT_H(1)
L0_CTLOUT_L(1)
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
VCCA_1V2 VDDA25
C167
C167
C191
C191
X_475P/1206
X_475P/1206
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
475P/1206
475P/1206
HT_CADIN_H[15..0] 9
HT_CADIN_L[15..0] 9
HT_CADOUT_H[15..0] 9
HT_CADOUT_L[15..0] 9
D D
VCCA_1V2
C C
B B
VCCA_1V2
C186
C186
224P/16v/6
224P/16v/6
HT_CLKIN_H1 9
HT_CLKIN_L1 9
HT_CLKIN_H0 9
HT_CLKIN_L0 9
R116 49.9/4 R116 49.9/4
R117 49.9/4 R117 49.9/4
HT_CTLIN_H0 9
HT_CTLIN_L0 9
HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
C175
C175
224P/16v/6
224P/16v/6
X_224P/16v/6
X_224P/16v/6
C179
C179
C199
C199
X_224P/16v/6
X_224P/16v/6
N6
L0_CLKIN_H(1)
P6
L0_CLKIN_L(1)
N3
L0_CLKIN_H(0)
N2
L0_CLKIN_L(0)
V4
L0_CTLIN_H(1)
V5
L0_CTLIN_L(1)
U1
L0_CTLIN_H(0)
V1
L0_CTLIN_L(0)
U6
L0_CADIN_H(15)
V6
L0_CADIN_L(15)
T4
L0_CADIN_H(14)
T5
L0_CADIN_L(14)
R6
L0_CADIN_H(13)
T6
L0_CADIN_L(13)
P4
L0_CADIN_H(12)
P5
L0_CADIN_L(12)
M4
L0_CADIN_H(11)
M5
L0_CADIN_L(11)
L6
L0_CADIN_H(10)
M6
L0_CADIN_L(10)
K4
L0_CADIN_H(9)
K5
L0_CADIN_L(9)
J6
L0_CADIN_H(8)
K6
L0_CADIN_L(8)
U3
L0_CADIN_H(7)
U2
L0_CADIN_L(7)
R1
L0_CADIN_H(6)
T1
L0_CADIN_L(6)
R3
L0_CADIN_H(5)
R2
L0_CADIN_L(5)
N1
L0_CADIN_H(4)
P1
L0_CADIN_L(4)
L1
L0_CADIN_H(3)
M1
L0_CADIN_L(3)
L3
L0_CADIN_H(2)
L2
L0_CADIN_L(2)
J1
L0_CADIN_H(1)
K1
L0_CADIN_L(1)
J3
L0_CADIN_H(0)
J2
L0_CADIN_L(0)
For S3 issue(LDT RST can not still low)
LDT_PWRGD 14
224P/16v/6
224P/16v/6
C180
C180
HT_CLKOUT_H1 9
HT_CLKOUT_L1 9
HT_CLKOUT_H0 9
HT_CLKOUT_L0 9
HT_CTLOUT_H0 9
HT_CTLOUT_L0 9
HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3 HT_CADIN_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
LDT_STOP# 11,14
LDT_RST# 14
4
C201
C201
X_224P/16v/6
X_224P/16v/6
LDT_STOP#
LDT_PWRGD
LDT_RST#
C196
C196
TP15TP15
TP14TP14
LDT_RST#
LDT_PWRGD
LDT_STOP#
X_224P/16v/6
X_224P/16v/6
1
3
5
7
+1.8V_S0
RN56
RN56
2
4
6
8
X_8P4R-330R
X_8P4R-330R
3
for DHG Remove R512, R514, add R513, R515
for SB600 or EHG Remove R515, R513, add R514, R512
THERM_SIC
THERM_SID
near cpu
C673
C58
C58
C673
C22U6.3X1206/B
C22U6.3X1206/B
C10
D10
A8
B8
C9
D8
C7
AL3
AL6
AK6
AL10
AJ10
AH10
AL9
A5
G2
G1
E12
F12
AH11
AJ11
A10
B10
F10
E9
AJ7
F6
D6
E7
F8
C5
AH9
E5
AJ5
AG9
AG8
AH7
AJ6
VDDA1
VDDA2
CLKIN_H
CLKIN_L
PWROK
LDTSTOP_L
RESET_L
CPU_PRESENT_L
SIC
SID
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
VTT_SENSE
M_VREF
M_ZN
M_ZP
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
TEST5
TEST4
TEST3
TEST2
C50
C50
224P/16v/6
224P/16v/6
C45
C45
X_C1000P50X
X_C1000P50X
TP24TP24
TP27TP27
TP16TP16
TP22TP22
TP6TP6
TP1TP1
R43 300/4 R43 300/4
R42 300/4 R42 300/4
TP10TP10
TP11TP11
TP13TP13
TP8TP8
TP18TP18
R512 X_0/4 R512 X_0/4
R513 X_0/4 R513 X_0/4
R514 X_0/4 R514 X_0/4
R515 X_0/4 R515 X_0/4
C64
C64
3300P/50V/4
3300P/50V/4
LDT_PWRGD
LDT_STOP#
LDT_RST#
CPU_PRESENT_L
CPU_TDI
CPU_TRST_L
CPU_TCK
CPU_TMS
CPU_DBREQ_L
COREFB+
COREFBCPU_VTT_SENSE
CPU_TEST25_H
CPU_TEST25_L
CPU_SIC 14
SIO_THERM_SIC 21
CPU_SID 14
SIO_THERM_SID 21
C56
VCC_DDR
R109
R109
300/4
300/4
R112
R112
39.2R1%
39.2R1%
R113
R113
39.2R1%
39.2R1%
C56
C3900P25X
C3900P25X
C3900P25X
C3900P25X
CPU_STRAP_HI_E11
CPU_STRAP_LO_F11
C55
C55
R104
R104
300/4
300/4
THERM_SIC
THERM_SID
R280
R280
X_300/4
X_300/4
169R1%
169R1%
475P/1206
475P/1206
R73
R73
CPUCLKIN
CPUCLKIN#
COREFB+ 26
COREFB- 26
CPU_M_VREF
THERMDC_CPU 21
THERMDA_CPU 21
CPU_CLK 13
CPU_CLK# 13
VCC_DDR
CPU1D
CPU1D
MISC
MISC
THERMTRIP_L
PROCHOT_L
DBRDY
VDDIO_FB_H
VDDIO_FB_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
2
VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)
TDO
PSI_L
TEST8
80S/0805L480S/0805
2 1
D2
D1
C1
E3
E2
E1
AK7
AL7
AK10
B6
AK11
AL11
F1
V8
V7
C11
D11
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
VCC_DDR
R57
R57
15/6/1
15/6/1
VDDA25 VDDA_25
L4
VID4
VID3
VID2
VID1
VID0
CPU_THRIP_L#
CPU_TDO
CPU_DBRDY
CPU_VDDIOFB_H
CPU_PSI_L
R108 300/4 R108 300/4
R54
R54
15/6/1
15/6/1
0.1u/25V/4
0.1u/25V/4
1
VID[0..4] 26
VCC_DDR
TP9TP9
R18
R18
300/4
300/4
TP26TP26
TP7TP7
CPU_VDDIOFB_H 28
TP12TP12
C160
C160
102P/50V/X7R/4
102P/50V/X7R/4
R52
R52
80.6R1%
80.6R1%
TP21TP21
TP17TP17
TP20TP20
TP19TP19
VCC_DDR
CPU_M_VREF
C59
C65
C65
C59
C1000P16X
C1000P16X
R106
R106
300/4
300/4
CPU_PRESENT_L
CPU_TEST25_H
CPU_TEST25_L
VCC_DDR VCC_DDR
R511
R511
R510
R510
300/4
300/4
4.7K/4
4.7K/4
Q45 N-MMBT3904_NL_SOT23 Q45 N-MMBT3904_NL_SOT23
R111 44.2RST R111 44.2RST
R114 44.2RST R114 44.2RST
C161
C161
102P/50V/X7R/4
102P/50V/X7R/4
R118 1K/4 R118 1K/4
R67 510R R67 510R
R72 510R R72 510R
VCC_DDR
CPU_THRIP# 27
VCCA_1V2
VCC_DDR
R105
R105
300/4
300/4
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
RN58
LDT_STOP#
LDT_PWRGD
LDT_RST#
For SB600
5
4
RN58
1
3
5
7
8P4R-680R
8P4R-680R
2
4
6
8
3
2
Micro Star Restricted Secret
Title
Title
Title
ATHLON64 HT I/F CTRL & DEBUG
ATHLON64 HT I/F CTRL & DEBUG
ATHLON64 HT I/F CTRL & DEBUG
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
MS-7405
MS-7405
MS-7405
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Monday, May 14, 2007
Monday, May 14, 2007
Monday, May 14, 2007
Sheet
Sheet
Sheet
33 9
33 9
33 9
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
4
3
2
1
MEM_MA_DQS_L[7..0] 6,7
MEM_MA_DQS_H[7..0] 6,7
MEM_MA_DM[7..0] 6,7
D D
CPU1B
CPU1B
MEMORY INTERFACE A
MEM_MA0_CLK_H2 6,8
MEM_MA0_CLK_L2 6,8
MEM_MA0_CLK_H1 6,8
MEM_MA0_CLK_L1 6,8
MEM_MA0_CLK_H0 6,8
MEM_MA0_CLK_L0 6,8
MEM_MA0_CS_L1 6,8
MEM_MA0_CS_L0 6,8
MEM_MA0_ODT0 6,8
MEM_MA1_CLK_H2 7,8
MEM_MA1_CLK_L2 7,8
MEM_MA1_CLK_H1 7,8
MEM_MA1_CLK_L1 7,8
MEM_MA1_CLK_H0 7,8
MEM_MA1_CLK_L0 7,8
MEM_MA1_CS_L1 7,8
MEM_MA1_CS_L0 7,8
MEM_MA1_ODT0 7,8
C C
MEM_MA_ADD[15..0] 6,7,8
B B
MEM_MA_CAS_L 6,7,8
MEM_MA_WE_L 6,7,8
MEM_MA_RAS_L 6,7,8
MEM_MA_BANK2 6,7,8
MEM_MA_BANK1 6,7,8
MEM_MA_BANK0 6,7,8
MEM_MA_CKE1 7,8
MEM_MA_CKE0 6,8
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CS_L1
MEM_MA0_CS_L0
MEM_MA0_ODT0
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA1_CS_L1
MEM_MA1_CS_L0
MEM_MA1_ODT0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
AG21
AG20
G19
H19
U27
U26
AC25
AA24
AC28
AE20
AE19
G20
G21
V27
W27
AD27
AA25
AC27
AB25
AB27
AA26
N25
Y27
AA27
M25
M27
N24
AC26
N26
P25
Y25
N27
R24
P27
R25
R26
R27
T25
U25
T27
W24
AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
D29
C29
C25
D25
E19
F19
F15
G15
AF15
AF19
AJ25
AH29
B29
E24
E18
H15
L27
MEMORY INTERFACE A
MA0_CLK_H(2)
MA0_CLK_L(2)
MA0_CLK_H(1)
MA0_CLK_L(1)
MA0_CLK_H(0)
MA0_CLK_L(0)
MA0_CS_L(1)
MA0_CS_L(0)
MA0_ODT(0)
MA1_CLK_H(2)
MA1_CLK_L(2)
MA1_CLK_H(1)
MA1_CLK_L(1)
MA1_CLK_H(0)
MA1_CLK_L(0)
MA1_CS_L(1)
MA1_CS_L(0)
MA1_ODT(0)
MA_CAS_L
MA_WE_L
MA_RAS_L
MA_BANK(2)
MA_BANK(1)
MA_BANK(0)
MA_CKE(1)
MA_CKE(0)
MA_ADD(15)
MA_ADD(14)
MA_ADD(13)
MA_ADD(12)
MA_ADD(11)
MA_ADD(10)
MA_ADD(9)
MA_ADD(8)
MA_ADD(7)
MA_ADD(6)
MA_ADD(5)
MA_ADD(4)
MA_ADD(3)
MA_ADD(2)
MA_ADD(1)
MA_ADD(0)
MA_DQS_H(7)
MA_DQS_L(7)
MA_DQS_H(6)
MA_DQS_L(6)
MA_DQS_H(5)
MA_DQS_L(5)
MA_DQS_H(4)
MA_DQS_L(4)
MA_DQS_H(3)
MA_DQS_L(3)
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)
MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)
MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)
MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)
MA_DQS_H(8)
MA_DQS_L(8)
MA_DM(8)
MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)
MEM_MA_DATA63
AE14
MEM_MA_DATA62
AG14
MEM_MA_DATA61
AG16
MEM_MA_DATA60
AD17
MEM_MA_DATA59
AD13
MEM_MA_DATA58
AE13
MEM_MA_DATA57
AG15
MEM_MA_DATA56
AE16
MEM_MA_DATA55
AG17
MEM_MA_DATA54
AE18
MEM_MA_DATA53
AD21
MEM_MA_DATA52
AG22
MEM_MA_DATA51
AE17
MEM_MA_DATA50
AF17
MEM_MA_DATA49
AF21
MEM_MA_DATA48
AE21
MEM_MA_DATA47
AF23
MEM_MA_DATA46
AE23
MEM_MA_DATA45
AJ26
MEM_MA_DATA44
AG26
MEM_MA_DATA43
AE22
MEM_MA_DATA42
AG23
MEM_MA_DATA41
AH25
MEM_MA_DATA40
AF25
MEM_MA_DATA39
AJ28
MEM_MA_DATA38
AJ29
MEM_MA_DATA37
AF29
MEM_MA_DATA36
AE26
MEM_MA_DATA35
AJ27
MEM_MA_DATA34
AH27
MEM_MA_DATA33
AG29
MEM_MA_DATA32
AF27
MEM_MA_DATA31
E29
MEM_MA_DATA30
E28
MEM_MA_DATA29
D27
MEM_MA_DATA28
C27
MEM_MA_DATA27
G26
MEM_MA_DATA26
F27
MEM_MA_DATA25
C28
MEM_MA_DATA24
E27
MEM_MA_DATA23
F25
MEM_MA_DATA22
E25
MEM_MA_DATA21
E23
MEM_MA_DATA20
D23
MEM_MA_DATA19
E26
MEM_MA_DATA18
C26
MEM_MA_DATA17
G23
MEM_MA_DATA16
F23
MEM_MA_DATA15
E22
MEM_MA_DATA14
E21
MEM_MA_DATA13
F17
MEM_MA_DATA12
G17
MEM_MA_DATA11
G22
MEM_MA_DATA10
F21
MEM_MA_DATA9
G18
MEM_MA_DATA8
E17
MEM_MA_DATA7
G16
MEM_MA_DATA6
E15
MEM_MA_DATA5
G13
MEM_MA_DATA4
H13
MEM_MA_DATA3
H17
MEM_MA_DATA2
E16
MEM_MA_DATA1
E14
MEM_MA_DATA0
G14
J28
J27
J25
K25
J26
G28
G27
L24
K27
H29
H27
MEM_MA_DATA[63..0] 6,7
MEM_MB_ADD[15..0] 6,7,8
MEM_MB_DQS_L[7..0] 6,7
MEM_MB_DQS_H[7..0] 6,7
MEM_MB_DM[7..0] 6,7
CPU1C
CPU1C
MEMORY INTERFACE B
MEM_MB0_CLK_H2 6,8
MEM_MB0_CLK_L2 6,8
MEM_MB0_CLK_H1 6,8
MEM_MB0_CLK_L1 6,8
MEM_MB0_CLK_H0 6,8
MEM_MB0_CLK_L0 6,8
MEM_MB0_CS_L1 6,8
MEM_MB0_CS_L0 6,8
MEM_MB0_ODT0 6,8
MEM_MB1_CLK_H2 7,8
MEM_MB1_CLK_L2 7,8
MEM_MB1_CLK_H1 7,8
MEM_MB1_CLK_L1 7,8
MEM_MB1_CLK_H0 7,8
MEM_MB1_CLK_L0 7,8
MEM_MB1_CS_L1 7,8
MEM_MB1_CS_L0 7,8
MEM_MB1_ODT0 7,8
MEM_MB_CAS_L 6,7,8
MEM_MB_WE_L 6,7,8
MEM_MB_RAS_L 6,7,8
MEM_MB_BANK2 6,7,8
MEM_MB_BANK1 6,7,8
MEM_MB_BANK0 6,7,8
MEM_MB_CKE1 7,8
MEM_MB_CKE0 6,8
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CS_L1
MEM_MB0_CS_L0
MEM_MB0_ODT0
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB1_CS_L1
MEM_MB1_CS_L0
MEM_MB1_ODT0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_CKE1
MEM_MB_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
AJ19
AK19
AE30
AC31
AD29
AL19
AL18
W29
W28
AE29
AB31
AD31
AC29
AC30
AB29
AA31
AA28
M31
M29
AE31
AA29
AA30
AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29
AJ14
AH17
AJ23
AK29
A18
A19
U31
U30
C19
D19
N31
N28
N29
N30
P29
P31
R29
R28
R31
R30
T31
T29
U29
U28
D31
C31
C24
C23
D17
C17
C14
C13
C30
A23
B17
B13
MEMORY INTERFACE B
MB0_CLK_H(2)
MB0_CLK_L(2)
MB0_CLK_H(1)
MB0_CLK_L(1)
MB0_CLK_H(0)
MB0_CLK_L(0)
MB0_CS_L(1)
MB0_CS_L(0)
MB0_ODT(0)
MB1_CLK_H(2)
MB1_CLK_L(2)
MB1_CLK_H(1)
MB1_CLK_L(1)
MB1_CLK_H(0)
MB1_CLK_L(0)
MB1_CS_L(1)
MB1_CS_L(0)
MB1_ODT(0)
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK(2)
MB_BANK(1)
MB_BANK(0)
MB_CKE(1)
MB_CKE(0)
MB_ADD(15)
MB_ADD(14)
MB_ADD(13)
MB_ADD(12)
MB_ADD(11)
MB_ADD(10)
MB_ADD(9)
MB_ADD(8)
MB_ADD(7)
MB_ADD(6)
MB_ADD(5)
MB_ADD(4)
MB_ADD(3)
MB_ADD(2)
MB_ADD(1)
MB_ADD(0)
MB_DQS_H(7)
MB_DQS_L(7)
MB_DQS_H(6)
MB_DQS_L(6)
MB_DQS_H(5)
MB_DQS_L(5)
MB_DQS_H(4)
MB_DQS_L(4)
MB_DQS_H(3)
MB_DQS_L(3)
MB_DQS_H(2)
MB_DQS_L(2)
MB_DQS_H(1)
MB_DQS_L(1)
MB_DQS_H(0)
MB_DQS_L(0)
MB_DM(7)
MB_DM(6)
MB_DM(5)
MB_DM(4)
MB_DM(3)
MB_DM(2)
MB_DM(1)
MB_DM(0)
MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)
MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)
MB_DQS_H(8)
MB_DQS_L(8)
MB_DM(8)
MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)
AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_DATA[63..0] 6,7
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
ATHLON64 DDR MEMORY I/F
ATHLON64 DDR MEMORY I/F
ATHLON64 DDR MEMORY I/F
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
MS-7405
MS-7405
MS-7405
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Monday, May 14, 2007
Monday, May 14, 2007
Monday, May 14, 2007
Sheet
Sheet
Sheet
43 9
43 9
43 9
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
VCCP
CPU1F
CPU1F
VDD1
VDD1
A4
VDD1
A6
VDD2
AA8
VDD3
AA10
VDD4
AA12
VDD5
AA14
VDD6
AA16
VDD7
AA18
VDD8
AB7
VDD9
D D
C C
B B
AB11
AC10
AE10
AB9
AC4
AC5
AC8
AD2
AD3
AD7
AD9
AF7
AF9
AG4
AG5
AG7
AH2
AH3
E10
F11
G10
G12
H11
H23
K11
K13
K15
K17
K19
K21
K23
Y17
Y19
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
B3
VDD28
B5
VDD29
B7
VDD30
C2
VDD31
C4
VDD32
C6
VDD33
C8
VDD34
D3
VDD35
D5
VDD36
D7
VDD37
D9
VDD38
E4
VDD39
E6
VDD40
E8
VDD41
VDD42
F5
VDD43
F7
VDD44
F9
VDD45
VDD46
G6
VDD47
G8
VDD48
VDD49
VDD50
H7
VDD51
VDD52
VDD53
J8
VDD54
J12
VDD55
J14
VDD56
J16
VDD57
J18
VDD58
J20
VDD59
J22
VDD60
J24
VDD61
K7
VDD62
K9
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
L4
VDD71
L5
VDD72
L8
VDD73
L10
VDD74
L12
VDD75
VDD150
VDD151
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS240
VSS241
A3
A7
A9
A11
AA4
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE9
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
Y14
Y16
VCCP
M11
M13
M15
M17
M19
N10
N12
N14
N16
N18
P11
P13
P15
P17
P19
R10
R12
R14
R16
R18
R20
U10
U12
U14
U16
U18
U20
V11
V13
V15
V17
V19
V21
W10
W12
W14
W16
W18
W20
Y11
Y13
Y15
Y21
L14
VDD1
L16
VDD2
L18
VDD3
M2
VDD4
M3
VDD5
M7
VDD6
M9
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
N8
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
P7
VDD19
P9
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
R4
VDD26
R5
VDD27
R8
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
T2
VDD35
T3
VDD36
T7
VDD37
T9
VDD38
T11
VDD39
T13
VDD40
T15
VDD41
T17
VDD42
T19
VDD43
T21
VDD44
U8
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
V9
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
W4
VDD59
W5
VDD60
W8
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
Y2
VDD68
Y3
VDD69
Y7
VDD70
Y9
VDD71
VDD72
VDD73
VDD74
VDD75
CPU1G
CPU1G
VDD2
VDD2
4
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
AK20
AK22
AK24
AK26
AK28
AK30
AL5
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18
H22
H24
H26
H28
H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
Y18
VCCP
AA20
AA22
AB13
AB15
AB17
AB19
AB21
AB23
AC12
AC14
AC16
AC18
AC20
AC22
AD11
AD23
AE12
AF11
M21
M23
W22
3
VCC_DDR
VCCA_1V2
VTT_DDR
VCCP
C645
C645
X_224P/16v/6
X_224P/16v/6
AJ4
AJ3
AJ2
AJ1
D12
C12
B12
A12
AB24
AB26
AB28
AB30
AC24
AD26
AD28
AD30
AF30
M24
M26
M28
M30
P24
P26
P28
P30
T24
T26
T28
T30
V25
V26
V28
V30
Y24
Y26
Y28
Y29
C648
C648
X_224P/16v/6
X_224P/16v/6
CPU1H
CPU1H
VDD3
VDD3
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
L20
VDD19
L22
VDD20
VDD21
VDD22
N20
VDD23
N22
VDD24
P21
VDD25
P23
VDD26
R22
VDD27
T23
VDD28
U22
VDD29
V23
VDD30
VDD31
Y23
VDD32
5
GND
6
GND
7
GND
8
GND
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VCCP
N17
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
W7
Y20
Y22
VLDT_A1
VLDT_A2
VLDT_A3
VLDT_A4
VTT1
VTT2
VTT3
VTT4
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
C647
C647
CPU1I
CPU1I
VDDIO
VDDIO
224P/16v/6
224P/16v/6
VLDT_B1
VLDT_B2
VLDT_B3
VLDT_B4
VTT5
VTT6
VTT7
VTT8
VTT9
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
For EMI
C649
C649
0.01u/50V/6/X7R
0.01u/50V/6/X7R
H6
H5
H2
H1
AK12
AJ12
AH12
AG12
AL12
K24
K26
K28
K30
L7
L9
L11
L13
L15
L17
L19
L21
L23
M8
M10
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15
2
VCC_DDR
VLDT_RUN_B
VTT_DDR
C678
C678
X_0.1u/25V/4
X_0.1u/25V/4
C670
C670
X_180P
X_180P
4.7u/10V/8
4.7u/10V/8
C73
C73
C84
C84
X_C10000P50Y5
X_C10000P50Y5
C215
C215
180P
180P
C681
C681
X_0.1u/25V/4
X_0.1u/25V/4
C77
C77
C75
C75
X_C10000P50Y5
X_C10000P50Y5
X_C10000P50Y5
X_C10000P50Y5
For AMD requirement
VCCA_1V2
C208
C208
C205
C205
180P
180P
180P
180P
Close to CPU
C682
C682
X_0.1u/25V/4
X_0.1u/25V/4
C210
C210
180P
180P
C683
C683
X_0.1u/25V/4
X_0.1u/25V/4
C212
C212
180P
180P
1
C684
C684
X_0.1u/25V/4
X_0.1u/25V/4
C633
C633
C640
C640
X_C22U6.3X1206/B
X_C22U6.3X1206/B
X_C22U6.3X1206/B
X_C22U6.3X1206/B
VTT_DDR
C157
C157
C274
C274
224P/16v/6
224P/16v/6
224P/16v/6
224P/16v/6
A A
VTT_DDR
C238
C238
C34
C34
224P/16v/6
224P/16v/6
224P/16v/6
224P/16v/6
C207
C207
C4.7U10Y0805
C4.7U10Y0805
C213
C213
C4.7U10Y0805
C4.7U10Y0805
5
C202
C202
X_C4.7U10Y0805
X_C4.7U10Y0805
C291
C291
X_C4.7U10Y0805
X_C4.7U10Y0805
C194
C194
X_180P
X_180P
C187
C187
X_180P
X_180P
C184
C184
X_180P
X_180P
C226
C226
180P
180P
C62
C62
C1000P50X
C1000P50X
C237
C237
C1000P50X
C1000P50X
C229
C229
C1000P50X
C1000P50X
C51
C51
C1000P50X
C1000P50X
C634
C634
X_224P/16v/6
X_224P/16v/6
VCC_DDR VCC3
C671 103P/16V/4 C671 103P/16V/4
4
C638
C638
224P/16v/6
224P/16v/6
3
C204
C204
224P/16v/6
224P/16v/6
C635
C635
C10U6.3X51206/B
C10U6.3X51206/B
X_C22U6.3X1206/B
X_C22U6.3X1206/B
C263
C263
C189
C189
C4.7U10Y0805
C4.7U10Y0805
C4.7U10Y0805
C4.7U10Y0805
C642
C642
C627
C627
C10U6.3X51206/B
C10U6.3X51206/B
C10U6.3X51206/B
C10U6.3X51206/B
+
+
EC22
EC22
1000u/6.3V/8*11.5
1000u/6.3V/8*11.5
X_C22U6.3X1206/B
X_C22U6.3X1206/B
C636
C636
VCC_DDR VCC_DDR
C646
C646
X_C22U6.3X1206/B
X_C22U6.3X1206/B
C133
C133
C641
C641
X_C22U6.3X1206
X_C22U6.3X1206
C632
C632
X_C22U6.3X1206/B
X_C22U6.3X1206/B
C22
C22
C4.7U10Y0805
C4.7U10Y0805
2
C628
C628
C10U6.3X51206/B
C10U6.3X51206/B
C195
C195
C4.7U10Y0805
C4.7U10Y0805
C639
C639
X_C22U6.3X1206/B
X_C22U6.3X1206/B
C631
C631
224P/16v/6
224P/16v/6
C70
C70
X_C22U6.3X1206
X_C22U6.3X1206
C220
C220
C197
C197
224P/16v/6
224P/16v/6
0.01u/50V/6/X7R
0.01u/50V/6/X7R
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
C643
C644
C644
C643
C10U6.3X51206/B
C10U6.3X51206/B
C669
C669
180P
180P
MS-7405
MS-7405
MS-7405
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
C630
C630
C10U6.3X51206/B
C10U6.3X51206/B
C22U6.3X1206/B
C22U6.3X1206/B
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
ATHLON64 PWR & GND
ATHLON64 PWR & GND
ATHLON64 PWR & GND
C95
C95
C629
C629
X_C22U6.3X1206
X_C22U6.3X1206
C10U6.3X51206/B
C10U6.3X51206/B
Monday, May 14, 2007
Monday, May 14, 2007
Monday, May 14, 2007
of
of
of
53 9
53 9
53 9
Rev
Rev
Rev
0A
0A
0A
5
4
3
2
1
MEM_MA_DQS_H[7..0] 4,7
MEM_MA_DQS_L[7..0] 4,7
D D
MEM_MA_DM[7..0] 4,7
C C
SCL 7,13,15
SDA 7,13,15
MEM_MA_BANK2 4,7,8
MEM_MA_BANK1 4,7,8
MEM_MA_BANK0 4,7,8
MEM_MA_ADD[15..0] 4,7,8
B B
MEM_MA0_CLK_H0 4,8
MEM_MA0_CLK_L0 4,8
MEM_MA0_CLK_H1 4,8
MEM_MA0_CLK_L1 4,8
MEM_MA0_CLK_H2 4,8
MEM_MA0_CLK_L2 4,8
MEM_MA_CKE0 4,8
MEM_MA_RAS_L 4,7,8
MEM_MA_CAS_L 4,7,8
A A
MEM_MA0_CS_L0 4,8
MEM_MA0_CS_L1 4,8
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA_CKE0
MEM_MA_RAS_L
MEM_MA_CAS_L
MEM_MA0_CS_L0
MEM_MA0_CS_L1
5
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
SCL
SDA
VCC_DDR
69
170
VDD5
197
VDD6
64
VDD753VDD859VDD9
175
VDD1067VDD11
VDDQ1
VDDQ2
172
178
184
187
189
VDD1
VDD2
VDD3
DQS17_H
DQS17_L
DQS16_H
DQS16_L
DQS15_H
DQS15_L
DQS14_H
DQS14_L
DQS13_H
DQS13_L
DQS12_H
DQS12_L
DQS11_H
DQS11_L
DQS10_H
DQS10_L
DQS9_H
DQS9_L
DQS8_H
DQS8_L
DQS7_H
DQS7_L
DQS6_H
DQS6_L
DQS5_H
DQS5_L
DQS4_H
DQS4_L
DQS3_H
DQS3_L
DQS2_H
DQS2_L
DQS1_H
DQS1_L
DQS0_H
DQS0_L
SA2
SA1
SA0
SCL
SDA
BA2
BA1
BA0
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CK0_H
CK0_L
CK1_H
CK1_L
CK2_H
CK2_L
RESET_L
CKE0
CKE1
RAS_L
CAS_L
S0_L
S1_L
VDD4
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
7
6
101
240
239
120
119
54
190
71
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
168
167
162
161
49
48
43
42
185
186
137
138
220
221
18
52
171
192
74
193
76
181
VDDQ3
191
194
VDDQ4
VDDQ5
VDDQ651VDDQ756VDDQ862VDDQ9
VCC3
78
238
72
DIMM1DIMM1
VDDQ1075VDDQ11
VDDSPD
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
WE_L
VREF
ODT0
ODT1
ERR_OUT_L
PAR_IN
MEM_MA_DATA63
236
MEM_MA_DATA62
235
MEM_MA_DATA61
230
MEM_MA_DATA60
229
MEM_MA_DATA59
117
MEM_MA_DATA58
116
MEM_MA_DATA57
111
MEM_MA_DATA56
110
MEM_MA_DATA55
227
MEM_MA_DATA54
226
MEM_MA_DATA53
218
MEM_MA_DATA52
217
MEM_MA_DATA51
108
MEM_MA_DATA50
107
MEM_MA_DATA49
99
MEM_MA_DATA48
98
MEM_MA_DATA47
215
MEM_MA_DATA46
214
MEM_MA_DATA45
209
MEM_MA_DATA44
208
MEM_MA_DATA43
96
MEM_MA_DATA42
95
MEM_MA_DATA41
90
MEM_MA_DATA40
89
MEM_MA_DATA39
206
MEM_MA_DATA38
205
MEM_MA_DATA37
200
MEM_MA_DATA36
199
MEM_MA_DATA35
87
MEM_MA_DATA34
86
MEM_MA_DATA33
81
MEM_MA_DATA32
80
MEM_MA_DATA31
159
MEM_MA_DATA30
158
MEM_MA_DATA29
153
MEM_MA_DATA28
152
MEM_MA_DATA27
40
MEM_MA_DATA26
39
MEM_MA_DATA25
34
MEM_MA_DATA24
33
MEM_MA_DATA23
150
MEM_MA_DATA22
149
MEM_MA_DATA21
144
MEM_MA_DATA20
143
MEM_MA_DATA19
31
MEM_MA_DATA18
30
MEM_MA_DATA17
25
MEM_MA_DATA16
24
MEM_MA_DATA15
141
MEM_MA_DATA14
140
MEM_MA_DATA13
132
MEM_MA_DATA12
131
MEM_MA_DATA11
22
MEM_MA_DATA10
21
MEM_MA_DATA9
13
DQ9
MEM_MA_DATA8
12
DQ8
MEM_MA_DATA7
129
DQ7
MEM_MA_DATA6
128
DQ6
MEM_MA_DATA5
123
DQ5
MEM_MA_DATA4
122
DQ4
MEM_MA_DATA3
10
DQ3
MEM_MA_DATA2
9
DQ2
MEM_MA_DATA1
4
DQ1
MEM_MA_DATA0
3
DQ0
MEM_MA_WE_L
73
VDDR_VREF
1
102
TEST
MEM_MA0_ODT0
195
77
55
68
19
NC1
4
MEM_MA_DATA[63..0] 4,7
MEM_MA_WE_L 4,7,8
X_0.1u/25V/4
X_0.1u/25V/4
MEM_MA0_ODT0 4,8
VDDR_VREF
C618
C618
MEM_MB_DQS_H[7..0] 4,7
MEM_MB_DQS_L[7..0] 4,7
MEM_MB_DM[7..0] 4,7
MEM_MB_BANK2 4,7,8
MEM_MB_BANK1 4,7,8
MEM_MB_BANK0 4,7,8
MEM_MB_ADD[15..0] 4,7,8
MEM_MB0_CLK_H0 4,8
MEM_MB0_CLK_L0 4,8
MEM_MB0_CLK_H1 4,8
MEM_MB0_CLK_L1 4,8
MEM_MB0_CLK_H2 4,8
MEM_MB0_CLK_L2 4,8
MEM_MB_CKE0 4,8
MEM_MB_RAS_L 4,7,8
MEM_MB_CAS_L 4,7,8
MEM_MB0_CS_L0 4,8
MEM_MB0_CS_L1 4,8
VCC3
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
SCL
SDA
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB_CKE0
MEM_MB_RAS_L
MEM_MB_CAS_L
MEM_MB0_CS_L0
MEM_MB0_CS_L1
3
VCC_DDR
69
170
VDD5
197
VDD6
64
VDD753VDD859VDD9
175
VDD1067VDD11
VDDQ1
VDDQ2
172
178
184
187
189
VDD1
VDD2
VDD3
DQS17_H
DQS17_L
DQS16_H
DQS16_L
DQS15_H
DQS15_L
DQS14_H
DQS14_L
DQS13_H
DQS13_L
DQS12_H
DQS12_L
DQS11_H
DQS11_L
DQS10_H
DQS10_L
DQS9_H
DQS9_L
DQS8_H
DQS8_L
DQS7_H
DQS7_L
DQS6_H
DQS6_L
DQS5_H
DQS5_L
DQS4_H
DQS4_L
DQS3_H
DQS3_L
DQS2_H
DQS2_L
DQS1_H
DQS1_L
DQS0_H
DQS0_L
SA2
SA1
SA0
SCL
SDA
BA2
BA1
BA0
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CK0_H
CK0_L
CK1_H
CK1_L
CK2_H
CK2_L
RESET_L
CKE0
CKE1
RAS_L
CAS_L
S0_L
S1_L
VDD4
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
7
6
101
240
239
120
119
54
190
71
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
168
167
162
161
49
48
43
42
185
186
137
138
220
221
18
52
171
192
74
193
76
181
VDDQ3
191
VDDQ4
194
VDDQ5
72
VDDQ651VDDQ756VDDQ862VDDQ9
VCC3
78
VDDQ1075VDDQ11
238
VDDSPD
WE_L
VREF
ODT0
ODT1
ERR_OUT_L
PAR_IN
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
TEST
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
NC1
DIMM2DIMM2
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
73
1
102
195
77
55
68
19
2
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_WE_L
VDDR_VREF
MEM_MB0_ODT0
MEM_MB_DATA[63..0] 4,7
MEM_MB_WE_L 4,7,8
VDDR_VREF
C619
C619
C1000P10X0402
C1000P10X0402
MEM_MB0_ODT0 4,8
SCL
SDA
VCC_DDR
C19
C19
R24
R24
49.9
49.9
0.1u/25V/4
0.1u/25V/4
R22
R22
49.9
49.9
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
SCL 7,13,15
SDA 7,13,15
VDDR_VREF
VDDR_VREF
C621
C621
0.1u/25V/4
0.1u/25V/4
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
FIRST LOGICAL DDR DIMM
FIRST LOGICAL DDR DIMM
FIRST LOGICAL DDR DIMM
MS-7405
MS-7405
MS-7405
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Monday, May 14, 2007
Monday, May 14, 2007
Monday, May 14, 2007
Sheet
Sheet
Sheet
63 9
63 9
63 9
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
4
3
2
1
MEM_MA_DQS_H[7..0] 4,6
MEM_MA_DQS_L[7..0] 4,6
D D
MEM_MA_DM[7..0] 4,6
C C
SCL 6,13,15
SDA 6,13,15
MEM_MA_BANK2 4,6,8
MEM_MA_BANK1 4,6,8
MEM_MA_BANK0 4,6,8
MEM_MA_ADD[15..0] 4,6,8
B B
MEM_MA1_CLK_H0 4,8
MEM_MA1_CLK_L0 4,8
MEM_MA1_CLK_H1 4,8
MEM_MA1_CLK_L1 4,8
MEM_MA1_CLK_H2 4,8
MEM_MA1_CLK_L2 4,8
MEM_MA_CKE1 4,8
A A
MEM_MA_RAS_L 4,6,8
MEM_MA_CAS_L 4,6,8
MEM_MA1_CS_L0 4,8
MEM_MA1_CS_L1 4,8
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
VCC3
SCL
SDA
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
MEM_MA_CKE1 MEM_MB_CKE1
MEM_MA_RAS_L
MEM_MA_CAS_L
MEM_MA1_CS_L0
MEM_MA1_CS_L1
5
VCC_DDR VCC3
69
VDD4
170
189
197
64
VDD5
VDD6
VDD753VDD859VDD9
VDD1067VDD11
172
178
184
187
VDD1
VDD2
DQS17_H
DQS17_L
DQS16_H
DQS16_L
DQS15_H
DQS15_L
DQS14_H
DQS14_L
DQS13_H
DQS13_L
DQS12_H
DQS12_L
DQS11_H
DQS11_L
DQS10_H
DQS10_L
DQS9_H
DQS9_L
DQS8_H
DQS8_L
DQS7_H
DQS7_L
DQS6_H
DQS6_L
DQS5_H
DQS5_L
DQS4_H
DQS4_L
DQS3_H
DQS3_L
DQS2_H
DQS2_L
DQS1_H
DQS1_L
DQS0_H
DQS0_L
SA2
SA1
SA0
SCL
SDA
BA2
BA1
BA0
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CK0_H
CK0_L
CK1_H
CK1_L
CK2_H
CK2_L
RESET_L
CKE0
CKE1
RAS_L
CAS_L
S0_L
S1_L
VDD3
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
7
6
101
240
239
120
119
54
190
71
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
168
167
162
161
49
48
43
42
185
186
137
138
220
221
18
52
171
192
74
193
76
175
VDDQ1
181
VDDQ2
191
VDDQ3
194
VDDQ4
VDDQ5
VDDQ651VDDQ756VDDQ862VDDQ9
78
238
72
DIMM3DIMM3
VDDQ1075VDDQ11
VDDSPD
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
WE_L
VREF
TEST
ODT0
ODT1
ERR_OUT_L
PAR_IN
4
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
NC1
MEM_MA_DATA63
236
MEM_MA_DATA62
235
MEM_MA_DATA61
230
MEM_MA_DATA60
229
MEM_MA_DATA59
117
MEM_MA_DATA58
116
MEM_MA_DATA57
111
MEM_MA_DATA56
110
MEM_MA_DATA55
227
MEM_MA_DATA54
226
MEM_MA_DATA53
218
MEM_MA_DATA52
217
MEM_MA_DATA51
108
MEM_MA_DATA50
107
MEM_MA_DATA49
99
MEM_MA_DATA48
98
MEM_MA_DATA47
215
MEM_MA_DATA46
214
MEM_MA_DATA45
209
MEM_MA_DATA44
208
MEM_MA_DATA43
96
MEM_MA_DATA42
95
MEM_MA_DATA41
90
MEM_MA_DATA40
89
MEM_MA_DATA39
206
MEM_MA_DATA38
205
MEM_MA_DATA37
200
MEM_MA_DATA36
199
MEM_MA_DATA35
87
MEM_MA_DATA34
86
MEM_MA_DATA33
81
MEM_MA_DATA32
80
MEM_MA_DATA31
159
MEM_MA_DATA30
158
MEM_MA_DATA29
153
MEM_MA_DATA28
152
MEM_MA_DATA27
40
MEM_MA_DATA26
39
MEM_MA_DATA25
34
MEM_MA_DATA24
33
MEM_MA_DATA23
150
MEM_MA_DATA22
149
MEM_MA_DATA21
144
MEM_MA_DATA20
143
MEM_MA_DATA19
31
MEM_MA_DATA18
30
MEM_MA_DATA17
25
MEM_MA_DATA16
24
MEM_MA_DATA15
141
MEM_MA_DATA14
140
MEM_MA_DATA13
132
MEM_MA_DATA12
131
MEM_MA_DATA11
22
MEM_MA_DATA10
21
MEM_MA_DATA9
13
MEM_MA_DATA8
12
MEM_MA_DATA7
129
MEM_MA_DATA6
128
MEM_MA_DATA5
123
MEM_MA_DATA4
122
MEM_MA_DATA3
10
MEM_MA_DATA2
9
MEM_MA_DATA1
4
MEM_MA_DATA0
3
MEM_MA_WE_L
73
1
102
MEM_MA1_ODT0
195
77
55
68
19
MEM_MA_WE_L 4,6,8
MEM_MA1_ODT0 4,8
MEM_MA_DATA[63..0] 4,6
VDDR_VREF VDDR_VREF
3
MEM_MB_DM[7..0] 4,6
MEM_MB_DQS_L[7..0] 4,6
MEM_MB_DQS_H[7..0] 4,6
VCC_DDR VCC3
181
VDDQ2
VDDQ3
191
194
VDDQ4
VDDQ5
VDDQ651VDDQ756VDDQ862VDDQ9
78
238
72
DIMM4DIMM4
VDDQ1075VDDQ11
VDDSPD
ERR_OUT_L
PAR_IN
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
WE_L
VREF
TEST
ODT0
ODT1
MEM_MB_DATA63
236
MEM_MB_DATA62
235
MEM_MB_DATA61
230
MEM_MB_DATA60
229
MEM_MB_DATA59
117
MEM_MB_DATA58
116
MEM_MB_DATA57
111
MEM_MB_DATA56
110
MEM_MB_DATA55
227
MEM_MB_DATA54
226
MEM_MB_DATA53
218
MEM_MB_DATA52
217
MEM_MB_DATA51
108
MEM_MB_DATA50
107
MEM_MB_DATA49
99
MEM_MB_DATA48
98
MEM_MB_DATA47
215
MEM_MB_DATA46
214
MEM_MB_DATA45
209
MEM_MB_DATA44
208
MEM_MB_DATA43
96
MEM_MB_DATA42
95
MEM_MB_DATA41
90
MEM_MB_DATA40
89
MEM_MB_DATA39
206
MEM_MB_DATA38
205
MEM_MB_DATA37
200
MEM_MB_DATA36
199
MEM_MB_DATA35
87
MEM_MB_DATA34
86
MEM_MB_DATA33
81
MEM_MB_DATA32
80
MEM_MB_DATA31
159
MEM_MB_DATA30
158
MEM_MB_DATA29
153
MEM_MB_DATA28
152
MEM_MB_DATA27
40
MEM_MB_DATA26
39
MEM_MB_DATA25
34
MEM_MB_DATA24
33
MEM_MB_DATA23
150
MEM_MB_DATA22
149
MEM_MB_DATA21
144
MEM_MB_DATA20
143
MEM_MB_DATA19
31
MEM_MB_DATA18
30
MEM_MB_DATA17
25
MEM_MB_DATA16
24
MEM_MB_DATA15
141
MEM_MB_DATA14
140
MEM_MB_DATA13
132
MEM_MB_DATA12
131
MEM_MB_DATA11
22
MEM_MB_DATA10
21
MEM_MB_DATA9
13
DQ9
MEM_MB_DATA8
12
DQ8
MEM_MB_DATA7
129
DQ7
MEM_MB_DATA6
128
DQ6
MEM_MB_DATA5
123
DQ5
MEM_MB_DATA4
122
DQ4
MEM_MB_DATA3
10
DQ3
MEM_MB_DATA2
9
DQ2
MEM_MB_DATA1
4
DQ1
MEM_MB_DATA0
3
DQ0
MEM_MB_WE_L
73
1
102
MEM_MB1_ODT0
195
77
55
68
19
NC1
MEM_MB1_ODT0 4,8
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
MEM_MB_DATA[63..0] 4,6
MEM_MB_WE_L 4,6,8
C622
C622
0.1u/25V/4
0.1u/25V/4
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
MS-7405
MS-7405
MS-7405
Last Revision Date:
Last Revision Date:
Last Revision Date:
Monday, May 14, 2007
Monday, May 14, 2007
Monday, May 14, 2007
Sheet
Sheet
Sheet
73 9
73 9
1
73 9
Rev
Rev
Rev
0A
0A
0A
of
of
of
69
170
VDD5
197
VDD6
64
VDD753VDD859VDD9
175
VDD1067VDD11
VDDQ1
172
178
184
187
189
VDD1
VDD2
VDD3
DQS17_H
DQS17_L
DQS16_H
DQS16_L
DQS15_H
DQS15_L
DQS14_H
DQS14_L
DQS13_H
DQS13_L
DQS12_H
DQS12_L
DQS11_H
DQS11_L
DQS10_H
DQS10_L
DQS9_H
DQS9_L
DQS8_H
DQS8_L
DQS7_H
DQS7_L
DQS6_H
DQS6_L
DQS5_H
DQS5_L
DQS4_H
DQS4_L
DQS3_H
DQS3_L
DQS2_H
DQS2_L
DQS1_H
DQS1_L
DQS0_H
DQS0_L
SA2
SA1
SA0
SCL
SDA
BA2
BA1
BA0
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CK0_H
CK0_L
CK1_H
CK1_L
CK2_H
CK2_L
RESET_L
CKE0
CKE1
RAS_L
CAS_L
S0_L
S1_L
2
VDD4
164
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
7
6
101
240
239
120
119
54
190
71
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
168
167
162
161
49
48
43
42
185
186
137
138
220
221
18
52
171
192
74
193
76
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
VCC3
SCL 6,13,15
SDA 6,13,15
MEM_MB_BANK2 4,6,8
MEM_MB_BANK1 4,6,8
MEM_MB_BANK0 4,6,8
MEM_MB_ADD[15..0] 4,6,8
MEM_MB1_CLK_H0 4,8
MEM_MB1_CLK_L0 4,8
MEM_MB1_CLK_H1 4,8
MEM_MB1_CLK_L1 4,8
MEM_MB1_CLK_H2 4,8
MEM_MB1_CLK_L2 4,8
MEM_MB_CKE1 4,8
MEM_MB_RAS_L 4,6,8
MEM_MB_CAS_L 4,6,8
MEM_MB1_CS_L0 4,8
MEM_MB1_CS_L1 4,8
MEM_MB_DQS_L0 MEM_MA_DQS_L0
SCL
SDA
MEM_MB_RAS_L
MEM_MB_CAS_L
MEM_MB1_CS_L0
MEM_MB1_CS_L1
5
4
3
2
1
VTT_DDR
MEM_MB_ADD15 4,6,7
MEM_MB_ADD14 4,6,7
MEM_MB_BANK2 4,6,7
MEM_MA_ADD9 4,6,7
MEM_MA_ADD11 4,6,7
MEM_MB_ADD12 4,6,7
D D
C C
MEM_MB_ADD9 4,6,7
MEM_MA_ADD7 4,6,7
MEM_MA_ADD6 4,6,7
MEM_MB_ADD6 4,6,7
MEM_MB_ADD5 4,6,7
MEM_MA_ADD5 4,6,7
MEM_MB_ADD1 4,6,7
MEM_MB_ADD2 4,6,7
MEM_MA_ADD1 4,6,7
MEM_MA_ADD2 4,6,7
MEM_MB_ADD10 4,6,7
MEM_MB_BANK0 4,6,7
MEM_MB_RAS_L 4,6,7
MEM_MB0_CS_L0 4,6
MEM_MA_BANK0 4,6,7
MEM_MB_BANK1 4,6,7
MEM_MA_RAS_L 4,6,7
MEM_MA0_CS_L0 4,6
MEM_MA_ADD13 4,6,7
MEM_MB1_CS_L1 4,7
MEM_MA0_CS_L1 4,6
MEM_MA1_CS_L1 4,7
MEM_MA1_CS_L0 4,7
MEM_MA1_ODT0 4,7
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_BANK2
MEM_MA_ADD9
MEM_MA_ADD11
MEM_MB_ADD12
MEM_MB_ADD9
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MA_ADD5
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MB_ADD10
MEM_MB_BANK0
MEM_MB_RAS_L
MEM_MB0_CS_L0
MEM_MA_BANK0
MEM_MB_BANK1
MEM_MA_RAS_L
MEM_MA0_CS_L0
MEM_MA_ADD13
MEM_MB1_CS_L1
MEM_MA0_CS_L1
MEM_MA1_CS_L1
MEM_MA1_CS_L0
MEM_MA1_ODT0
RN15 8P4R-47R0402 RN15 8P4R-47R0402
1
2
3
4
5
6
7
RN16 8P4R-47R0402 RN16 8P4R-47R0402
RN18 8P4R-47R0402 RN18 8P4R-47R0402
RN20 8P4R-47R0402 RN20 8P4R-47R0402
RN23 8P4R-47R0402 RN23 8P4R-47R0402
RN22 8P4R-47R0402 RN22 8P4R-47R0402
RN26 8P4R-47R0402 RN26 8P4R-47R0402
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
R115 47R0402 R115 47R0402
R122 47R0402 R122 47R0402
MEM_MA0_CLK_H2 4,6
MEM_MA0_CLK_L2 4,6
MEM_MA0_CLK_H1 4,6
MEM_MA0_CLK_L1 4,6
MEM_MA0_CLK_H0 4,6
MEM_MA0_CLK_L0 4,6
MEM_MB0_CLK_H2 4,6
MEM_MB0_CLK_L2 4,6
MEM_MB0_CLK_H1 4,6
MEM_MB0_CLK_L1 4,6
MEM_MB0_CLK_H0 4,6
MEM_MB0_CLK_L0 4,6
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
C182
C182
C1.5P/4
C1.5P/4
C63
C63
C1.5P/4
C1.5P/4
C107
C107
C1.5P/4
C1.5P/4
C173
C173
C1.5P/4
C1.5P/4
C47
C47
C1.5P/4
C1.5P/4
C113
C113
C1.5P/4
C1.5P/4
0.1u/25V/4
0.1u/25V/4
VTT_DDR
C224
C224
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
C223
C223
C165
C165
0.1u/25V/4
0.1u/25V/4
C22P50N0402 C93 C22P50N0402 C93
C22P50N0402 C90 C22P50N0402 C90
C22P50N0402 C185 C22P50N0402 C185
C22P50N0402 C99 C22P50N0402 C99
C22P50N0402 C100 C22P50N0402 C100
C22P50N0402 C141 C22P50N0402 C141
C22P50N0402 C106 C22P50N0402 C106
C22P50N0402 C110 C22P50N0402 C110
C22P50N0402 C105 C22P50N0402 C105
C22P50N0402 C115 C22P50N0402 C115
C22P50N0402 C108 C22P50N0402 C108
C22P50N0402 C114 C22P50N0402 C114
C22P50N0402 C120 C22P50N0402 C120
C22P50N0402 C126 C22P50N0402 C126
C22P50N0402 C131 C22P50N0402 C131
C22P50N0402 C143 C22P50N0402 C143
C22P50N0402 C154 C22P50N0402 C154
C22P50N0402 C162 C22P50N0402 C162
C22P50N0402 C145 C22P50N0402 C145
C22P50N0402 C96 C22P50N0402 C96
C22P50N0402 C146 C22P50N0402 C146
C22P50N0402 C151 C22P50N0402 C151
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
Decoupling Between Processor and DIMMs
Layout: Spread out on VTT pour
0.1u/25V/4
0.1u/25V/4
0.1u/25V/4
C192
C192
0.1u/25V/4
0.1u/25V/4
0.1u/25V/4
0.1u/25V/4
C305
C305
C88
C88
C102
C102
X_0.1u/25V/4
X_0.1u/25V/4
0.1u/25V/4
0.1u/25V/4
C221
C221
0.1u/25V/4
0.1u/25V/4
0.1u/25V/4
0.1u/25V/4
C147
C147
C188
C188
0.1u/25V/4
0.1u/25V/4
0.1u/25V/4
C232
C232
C216
C216
0.1u/25V/4
0.1u/25V/4
C22P50N0402 C101 C22P50N0402 C101
C22P50N0402 C98 C22P50N0402 C98
C22P50N0402 C190 C22P50N0402 C190
C22P50N0402 C109 C22P50N0402 C109
C22P50N0402 C111 C22P50N0402 C111
C22P50N0402 C163 C22P50N0402 C163
C22P50N0402 C117 C22P50N0402 C117
C22P50N0402 C124 C22P50N0402 C124
C22P50N0402 C116 C22P50N0402 C116
C22P50N0402 C129 C22P50N0402 C129
C22P50N0402 C121 C22P50N0402 C121
C22P50N0402 C128 C22P50N0402 C128
C22P50N0402 C132 C22P50N0402 C132
C22P50N0402 C135 C22P50N0402 C135
C22P50N0402 C138 C22P50N0402 C138
C22P50N0402 C150 C22P50N0402 C150
C22P50N0402 C170 C22P50N0402 C170
C22P50N0402 C176 C22P50N0402 C176
C22P50N0402 C168 C22P50N0402 C168
C22P50N0402 C104 C22P50N0402 C104
C22P50N0402 C153 C22P50N0402 C153
C22P50N0402 C159 C22P50N0402 C159
X_0.1u/25V/4
X_0.1u/25V/4
C123
C123
C85
C85
VCC_DDR VCC_DDR
0.1u/25V/4
0.1u/25V/4
0.1u/25V/4
0.1u/25V/4
C144
C144
C119
C119
0.1u/25V/4
0.1u/25V/4
For EMI
VTT_DDR
C689
C687
C685
VTT_DDR
MEM_MB_CKE1 4,7
MEM_MB_CKE0 4,6
MEM_MA_BANK2 4,6,7
MEM_MA_ADD12 4,6,7
MEM_MA_ADD8 4,6,7
MEM_MB_ADD11 4,6,7
MEM_MB_ADD7 4,6,7
MEM_MB_ADD8 4,6,7
B B
A A
MEM_MB_ADD4 4,6,7
MEM_MB_ADD3 4,6,7
MEM_MA_ADD4 4,6,7
MEM_MA_ADD3 4,6,7
MEM_MA_ADD0 4,6,7
MEM_MA_ADD10 4,6,7
MEM_MB_ADD0 4,6,7
MEM_MA_BANK1 4,6,7
MEM_MB_WE_L 4,6,7
MEM_MB_CAS_L 4,6,7
MEM_MA_WE_L 4,6,7
MEM_MA_CAS_L 4,6,7
MEM_MA_CKE1 4,7
MEM_MA_CKE0 4,6
MEM_MA_ADD15 4,6,7
MEM_MA_ADD14 4,6,7
MEM_MA0_ODT0 4,6
MEM_MB0_ODT0 4,6
MEM_MB_ADD13 4,6,7
MEM_MB0_CS_L1 4,6
MEM_MB1_CS_L0 4,7
MEM_MB1_ODT0 4,7
5
MEM_MB_CKE1
MEM_MB_CKE0
MEM_MA_BANK2
MEM_MA_ADD12
MEM_MA_ADD8
MEM_MB_ADD11
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD0
MEM_MA_ADD10
MEM_MB_ADD0
MEM_MA_BANK1
MEM_MB_WE_L
MEM_MB_CAS_L
MEM_MA_WE_L
MEM_MA_CAS_L
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA0_ODT0
MEM_MB0_ODT0
MEM_MB_ADD13
MEM_MB0_CS_L1
MEM_MB1_CS_L0
MEM_MB1_ODT0
RN14 8P4R-47R0402 RN14 8P4R-47R0402
1
2
3
4
5
6
7
RN17 8P4R-47R0402 RN17 8P4R-47R0402
RN19 8P4R-47R0402 RN19 8P4R-47R0402
RN21 8P4R-47R0402 RN21 8P4R-47R0402
RN24 8P4R-47R0402 RN24 8P4R-47R0402
RN13 8P4R-47R0402 RN13 8P4R-47R0402
RN25 8P4R-47R0402 RN25 8P4R-47R0402
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
R119 47R0402 R119 47R0402
R120 47R0402 R120 47R0402
MEM_MA1_CLK_H2 4,7
MEM_MA1_CLK_L2 4,7
MEM_MA1_CLK_H1 4,7
MEM_MA1_CLK_L1 4,7
MEM_MA1_CLK_H0 4,7
MEM_MA1_CLK_L0 4,7
MEM_MB1_CLK_H2 4,7
MEM_MB1_CLK_L2 4,7
MEM_MB1_CLK_H1 4,7
MEM_MB1_CLK_L1 4,7
MEM_MB1_CLK_H0 4,7
MEM_MB1_CLK_L0 4,7
4
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
C183
C183
C1.5P/4
C1.5P/4
C53
C53
C1.5P/4
C1.5P/4
C118
C118
C1.5P/4
C1.5P/4
C177
C177
C1.5P/4
C1.5P/4
C49
C49
C1.5P/4
C1.5P/4
C122
C122
C1.5P/4
C1.5P/4
0.1u/25V/4
0.1u/25V/4
VTT_DDR VCC_DDR
C92
C92
0.1u/25V/4
0.1u/25V/4
C218
C218
0.1u/25V/4
0.1u/25V/4
3
X_0.1u/25V/4
X_0.1u/25V/4
VTT_DDR
C323
C323
C94
C94
C222
C222
C685
C198
C198
0.1u/25V/4
0.1u/25V/4
0.1u/25V/4
0.1u/25V/4
0.1u/25V/4
0.1u/25V/4
X_0.1u/25V/4
X_0.1u/25V/4
0.1u/25V/4
0.1u/25V/4
C324
C324
C67
C67
0.1u/25V/4
0.1u/25V/4
C326
C326
C686
C686
0.1u/25V/4
0.1u/25V/4
X_0.1u/25V/4
X_0.1u/25V/4
C66
C66
0.1u/25V/4
0.1u/25V/4
C327
C327
2
C687
0.1u/25V/4
0.1u/25V/4
X_0.1u/25V/4
X_0.1u/25V/4
C273
C273
0.1u/25V/4
0.1u/25V/4
C348
C348
C688
C688
0.1u/25V/4
0.1u/25V/4
C689
X_0.1u/25V/4
X_0.1u/25V/4
C97
C97
0.1u/25V/4
0.1u/25V/4
C355
C355
0.1u/25V/4
0.1u/25V/4
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
C690
C690
X_0.1u/25V/4
X_0.1u/25V/4
X_0.1u/25V/4
X_0.1u/25V/4
C140
C140
C155
C155
0.1u/25V/4
0.1u/25V/4
VCC_DDR
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
DDR Terminatior
DDR Terminatior
DDR Terminatior
C691
C691
0.1u/25V/4
0.1u/25V/4
MS-7405
MS-7405
MS-7405
C692
C692
X_0.1u/25V/4
X_0.1u/25V/4
Last Revision Date:
Last Revision Date:
Last Revision Date:
Monday, May 14, 2007
Monday, May 14, 2007
Monday, May 14, 2007
Sheet
Sheet
Sheet
83 9
83 9
83 9
1
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
D D
C C
B B
VDDHT_PKG
HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
HT_CLKOUT_H1 3
HT_CLKOUT_L1 3
HT_CLKOUT_H0 3
HT_CLKOUT_L0 3
HT_CTLOUT_H0 3
HT_CTLOUT_L0 3
R137 49.9/4 R137 49.9/4
HT_RXCALN
HT_RXCALP
4
W19
W20
AC21
AB22
AB20
AA20
AA19
AA25
AA24
AB23
AA23
AB24
AB25
AC24
AC25
W21
W22
W25
R19
R18
R21
R22
U22
U21
U18
U19
Y19
T24
R25
U25
U24
V23
U23
V24
V25
Y24
P24
P25
A24
C24
U12A
U12A
RS485
RS485
HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD0P
HT_RXCAD0N
HT_RXCLK1P
HT_RXCLK1N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCTLP
HT_RXCTLN
HT_RXCALP
HT_RXCALN
3
PART 1 OF 5
PART 1 OF 5
HYPER TRANSPORT I/F
HYPER TRANSPORT I/F
HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCTLP
HT_TXCTLN
HT_TXCALP
HT_TXCALN
P21
P22
P18
P19
M22
M21
M18
M19
L18
L19
G22
G21
J20
J21
F21
F22
N24
N25
L25
M24
K25
K24
J23
K23
G25
H24
F25
F24
E23
F23
E24
E25
L21
L22
J24
J25
N23
P23
C25
D24
HT_TXCALP
HT_TXCALN
HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
R138 100/4/1 R138 100/4/1 R152 49.9/4 R152 49.9/4
2
HT_CLKIN_H1 3
HT_CLKIN_L1 3
HT_CLKIN_H0 3
HT_CLKIN_L0 3
HT_CTLIN_H0 3
HT_CTLIN_L0 3
1
HT_CADIN_H[15..0] 3
HT_CADIN_L[15..0] 3
HT_CADOUT_H[15..0] 3
HT_CADOUT_L[15..0] 3
A A
5
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Rev
Rev
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
4
3
http://www.msi.com.tw
2
RS485/RS690-HT LINK I/F
RS485/RS690-HT LINK I/F
RS485/RS690-HT LINK I/F
MS-7405
MS-7405
MS-7405
Last Revision Date:
Last Revision Date:
Last Revision Date:
Monday, May 14, 2007
Monday, May 14, 2007
Monday, May 14, 2007
Sheet
Sheet
Sheet
93 9
93 9
93 9
1
Rev
0A
0A
0A
of
of
of
A
4 4
TO PCIE x 16 SLOT TO PCIE x 16 SLOT
3 3
TO SB600
TO SB600
TO PCIE x 1 SLOT :PCI_EX1
TO SB600
TO SB600
2 2
B
U12B
U12B
AB7
AB6
W11
W12
AA11
AB11
AA7
AB9
AA9
W14
W15
AA12
AB12
AA14
AB14
W4
W5
W9
G5
G4
J8
J7
J4
J5
L8
L7
L4
L5
M8
M7
M4
M5
P8
P7
P4
P5
R4
R5
R7
R8
U4
U5
Y4
Y5
V9
Y7
RS485
RS485
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
PCEH_ISET
PCEH_TXISET
PED_RX0 20
PED_RX0* 20
PED_RX1 20
PED_RX1* 20
PED_RX2 20
PED_RX2* 20
PED_RX3 20
PED_RX3* 20
PED_RX4 20
PED_RX4* 20
PED_RX5 20
PED_RX5* 20
PED_RX6 20
PED_RX6* 20
PED_RX7 20
PED_RX7* 20
PED_RX8 20
PED_RX8* 20
PED_RX9 20
PED_RX9* 20
PED_RX10 20
PED_RX10* 20
PED_RX11 20
PED_RX11* 20
PED_RX12 20
PED_RX12* 20
PED_RX13 20
PED_RX13* 20
PED_RX14 20
PED_RX14* 20
PED_RX15 20
PED_RX15* 20
A_RX2P 14
A_RX2N 14
A_RX3P 14
A_RX3N 14
PE1_RX 20
PE1_RX* 20
RX_LANP0 22
RX_LANN0 22
A_RX0P 14
A_RX0N 14
A_RX1P 14
A_RX1N 14
R184 X_1.47KR1%0402 R184 X_1.47KR1%0402
A_RX2P
A_RX2N
A_RX3P
A_RX3N
PE1_RX
PE1_RX*
RX_LANP0
RX_LANN0
*
* *
C
PART 2 OF 5
PART 2 OF 5
PCIE GFX I/F
PCIE GFX I/F
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
PCEH_PCAL
PCEH_NCAL
J1
H2
K2
K1
K3
L3
L1
L2
N2
N1
P2
P1
P3
R3
R1
R2
T2
U1
V2
V1
V3
W3
W1
W2
Y2
AA1
AA2
AB2
AB1
AC1
AE3
AE4
A_TX2P0
AD8
A_TX2N0
AE8
A_TX3P0
AD7
A_TX3N0
AE7
PE1_TX
AD4
PE1_TX*
AE5
TX_LANP0
AD5
TX_LANN0
AD6
A_TX0P_C
AE9
A_TX0N_C
AD10
A_TX1P_C
AC8
A_TX1N_C
AD9
R191 562R1%0402 R191 562R1%0402
AD11
R195 2KR1%0402 R195 2KR1%0402 R189 X_8.25K/6/1 R189 X_8.25K/6/1
AE11
PED_TX0 20
PED_TX0* 20
PED_TX1 20
PED_TX1* 20
PED_TX2 20
PED_TX2* 20
PED_TX3 20
PED_TX3* 20
PED_TX4 20
PED_TX4* 20
PED_TX5 20
PED_TX5* 20
PED_TX6 20
PED_TX6* 20
PED_TX7 20
PED_TX7* 20
PED_TX8 20
PED_TX8* 20
PED_TX9 20
PED_TX9* 20
PED_TX10 20
PED_TX10* 20
PED_TX11 20
PED_TX11* 20
PED_TX12 20
PED_TX12* 20
PED_TX13 20
PED_TX13* 20
PED_TX14 20
PED_TX14* 20
PED_TX15 20
PED_TX15* 20
C347 C0.1U10X0402 C347 C0.1U10X0402
C345 C0.1U10X0402 C345 C0.1U10X0402
C354 C0.1U10X0402 C354 C0.1U10X0402
C350 C0.1U10X0402 C350 C0.1U10X0402
C717 0.1u/16V/4 C717 0.1u/16V/4
C718 0.1u/16V/4 C718 0.1u/16V/4
C322 C0.1U10X0402 C322 C0.1U10X0402
C316 C0.1U10X0402 C316 C0.1U10X0402
C341 C0.1U10X0402 C341 C0.1U10X0402
C338 C0.1U10X0402 C338 C0.1U10X0402
*
VDDA12_PKG2
D
A_TX2P 14
A_TX2N 14
A_TX3P 14
A_TX3N 14
PE1_TX 20
PE1_TX* 20
TXLANP 22
TXLANN 22
A_TX0P 14
A_TX0N 14
A_TX1P 14
A_TX1N 14
TO SB600
TO SB600
TO PCIE x 1 SLOT :PCI_EX1
TO SB600
TO SB600
E
connect to PCIEX2
slot 2007/3/22
AVIOD STUB
RS690/485 2/4-LANE ALINK CONFIGURATION
RS690/RS485 CHANGE TABLE
R184
1 1
NB/DIFF
RS690
RS485
A
R189
DNI
8.25K
10K
R195 R191
2K 562R DNI
150R 100R
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
B
C
D
http://www.msi.com.tw
RS485/RS690-PCIE I/F
RS485/RS690-PCIE I/F
RS485/RS690-PCIE I/F
MS-7405
MS-7405
MS-7405
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
E
Monday, May 14, 2007
Monday, May 14, 2007
Monday, May 14, 2007
10 39
10 39
10 39
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
4
3
2
1
1 2
CP11 CP11
1 2
CP23 CP23
LPVSS AVSSQ
NOTE: CONNECT TO GND CLOSE TO FIRST CAP
CP13 CP13
VCC3
D D
add TV OUT interface
2007/3/24
+1.8V_S0
CP25 CP25
C C
LDT_STOP# 3,14
VCC3
B B
R245
R245
R233
R233
A A
I2C_CLK
STRP_DATA
4.7K/4
4.7K/4
4.7K/4
4.7K/4
VCC3
R228
R228
X_10K/4
X_10K/4
R2302KR230
2K
R229
R229
X_2K
X_2K
<GroupName>
<GroupName>
NOTE: Providing access to STRAP_DATA
+1.8V_S0
R249
R249
4.7K/4
4.7K/4
Q34
Q34
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
R154 4.7K/4 R154 4.7K/4
VCC3
C346
C346
X_0.1u/16V/4
X_0.1u/16V/4
8
7
6
5
X__AT24C04N-10SU-2.7-RH
X__AT24C04N-10SU-2.7-RH
VCCA_1V2
U13
U13
VCC
WP
SCL
SDA
VCC3
GND
A0
A1
A2
DDC_DATA
1 2
L32 X_28L900m_100_0805 L32 X_28L900m_100_0805
CP7CP7
1 2
L15 X_28L900m_100_0805 L15 X_28L900m_100_0805
R257
R257
1K/4
1K/4
L30 _28L900m_100_0805 L30 _28L900m_100_0805
I2C_CLK
I2C_DATA
1
2
3
4
C312
C312
_4.7u/10V/8
_4.7u/10V/8
R230-R232 PLACED
WITHIN 1' OF NB
C246
C246
4.7u/10V/8
4.7u/10V/8
2007/3/24
COUT 31
YOUT 31
COMP_B 31
C243
C243
1u/6.3V/4
1u/6.3V/4
HTREFCLK 13
NB_OSC_14M 13
NBSRCCLK 13
NBSRCCLK# 13
SBLINKCLK 13
SBLINKCLK# 13
LOAD_ROM#:LOAD ROM STRAP ENABLE
PULL HIGH
(internally
pulled high)
PULL
LOW
and I2C_CLK pins is MANDATORY.
5
1 2
L19 X_28L900m_100_0805 L19 X_28L900m_100_0805
CP20 CP20
+1.8V_S0
1 2
R181 X_0/4 R181 X_0/4
CP15 CP15
+1.8V_S0
1 2
L21 X_28L900m_100_0805 L21 X_28L900m_100_0805
AVSSQ
R134
R134
75/4/1
75/4/1
C344
C344
4.7u/10V/8
4.7u/10V/8
LDT_STOP_NB#
R234 X_2.7K/4 R234 X_2.7K/4
R244 X_2.7K/4 R244 X_2.7K/4
R259 X_2.7K/4 R259 X_2.7K/4
R262 X_2.7K/4 R262 X_2.7K/4
R135
R135
75/4/1
75/4/1
C340
C340
1u/6.3V/4
1u/6.3V/4
TV_SWITCH 20
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5
C252
C252
1u/6.3V/4
1u/6.3V/4
R136
R136
75/4/1
75/4/1
TV_SWITCH
AVDD
AVDD
C264
C264
4.7u/10V/8
4.7u/10V/8
AVDDDI
C296
C296
1u/6.3V/4
1u/6.3V/4
AVDDQ
C254
C254
0.1u/16V/4
0.1u/16V/4
DAC_SCL 31
DAC_SDAT 31
PCI_RST1# 21,27
NB_PWRGD 27,28
ALLOW_LDTSTOP 14
SB_OSC_INT_R
R227 X_2.7K/4 R227 X_2.7K/4
R236 X_2.7K/4 R236 X_2.7K/4
2007/3/24
TMDS_HPD1 20,31
C260
C260
0.1u/16V/4
0.1u/16V/4
R 31
G 31
B 31
VSYNC# 31
HSYNC# 31
BMREQ# 14
I2C_CLK 20,31
I2C_DATA 31
DDC_DATA 20,31
R176
R176
PLLVDD
R246 4.7K/4 R246 4.7K/4
DFT_GPIO2
DFT_GPIO5
DFT_GPIO4
DFT_GPIO3
STRP_DATA
R
G
B
715R
715R
RSET
R153 10K/4 R153 10K/4
DFT_GPIO0
LOAD_ROM#
I2C_CLK
I2C_DATA
TMDS_HPD1
DDC_DATA
R237
R237
4.7K/4
4.7K/4
AA15
AB15
B22
C22
G17
H17
A20
B20
A21
A22
C21
C20
D19
E19
F19
G19
B21
A10
B10
B24
B25
C10
C11
C23
B23
B11
A11
C14
C6
A5
B6
A6
C5
B5
C2
F2
E1
G1
G2
D6
D7
C8
C7
B8
A8
B2
A2
B4
B3
C3
A3
U12C
U12C
RS485
RS485
AVDD1
AVDD2
AVSSN1
AVSSN2
AVDDDI
AVSSDI
AVDDQ
AVSSQ
C_R
Y_G
COMP_B
RED
GREEN
BLUE
DACVSYNC
DACHSYNC
RSET
DACSCL
DACSDA
PLLVDD
PLLVSS
HTPVDD
HTPVSS
SYSRESET#
POWERGOOD
LDTSTOP#
ALLOW_LDTSTOP
HTTSTCLK
HTREFCLK
TVCLKIN
OSCIN
OSCOUT
GFX_CLKP
GFX_CLKN
SB_CLKP
SB_CLKN
DFT_GPIO0
DFT_GPIO1
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5
BMREQb
I2C_CLK
I2C_DATA
THERMALDIODE_P
THERMALDIODE_N
TMDS_HPD
DDC_DATA
TESTMODE
STRP_DATA
PART 3 OF 5
PART 3 OF 5
CRT/TVOUT
CRT/TVOUT
PLL PWR
PLL PWR
PM
PM
CLOCKs
CLOCKs
MIS.
MIS.
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
LVTM DVO
LVTM DVO
LVDDR18D_1
LVDDR18D_2
LVDDR18A_1
LVDDR18A_2
LVDS_DIGON
LVDS_BLON
LVDS_BLEN
DVO_VSYNC
DVO_HSYNC
DVO_IDCKP
DVO_IDCKN
RS690 RS690 only (NC for RS485)
DFT_GPIO1 DFT_GPIO[4:2] DFT_GPIO5
Bypass the loading
of EEPROM straps
and use Hardware
default values
DEFAULT
I2C Master can
load strap values
from EEPROM if
connected, or use
default values if
not connected
4
DFT_GPIO0
Memory
side port
not available
DEFAULT
Memory
side port
available
These pin straps are used to configure PCI-E GPP mode:
111: register defined (register default to Config E)
110: 4-0-0-0-0 Config A
101: 4-4 Config B
100: 4-2-2 Config C
011: 4-2-1-1 Config D
010: 4-1-1-1-1 Config E
others: register defined (register default to Config E)
3
DEFAULT
HDMI_L0P
B14
HDMI_L0N
B15
HDMI_L1P
B13
HDMI_L1N
A13
HDMI_L2P
H14
HDMI_L2N
G14
D17
E17
A15
B16
C17
C18
B17
A17
A18
B18
HDMI_CLKP
E15
TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN
LPVDD
LPVSS
LVSSR1
LVSSR3
LVSSR5
LVSSR6
LVSSR7
LVSSR8
LVSSR12
LVSSR13
DVO_D0
DVO_D1
DVO_D2
DVO_D3
DVO_D4
DVO_D5
DVO_D6
DVO_D7
DVO_D8
DVO_D9
DVO_D10
DVO_D11
DVO_DE
Enable debug bus via the memory
IO pads, if available in the package
use default values
use the memory data bus
to output the debug bus
D15
H15
G15
D14
E14
A12
B12
C12
C13
A16
A14
D12
C19
C15
C16
F14
F15
E12
G12
F12
AD14
AD15
AE15
AD16
AE16
AC17
AD18
AE19
AD19
AE20
AD20
AE21
AD13
AC13
AE13
AE17
AD17
HDMI_CLKN
LPVDD
LVDDR18D
LVDDR18A HTPVDD
PE2_TX
PE2_TX*
PE2_RX
PE2_RX*
PE3_TX
PE3_TX*
PE3_RX
PE3_RX*
DEFAULT
0.1u/16V/4
0.1u/16V/4
C351
C351
0.1u/16V/4
0.1u/16V/4
2
HDMI_L0P 31
HDMI_L0N 31
HDMI_L1P 31
HDMI_L1N 31
HDMI_L2P 31
HDMI_L2N 31
HDMI_CLKP 31
HDMI_CLKN 31
C321
C321
1u/6.3V/4
1u/6.3V/4
C353
C353
1u/10V/6
1u/10V/6
0.1u/16V/4
0.1u/16V/4
C319
C319
C303
C303
C310
C310
LPVSS
1u/10V/6
1u/10V/6
HDMI fuction
2007/3/24
CP22 CP22
1 2
L29 X_28L900m_100_0805 L29 X_28L900m_100_0805
CP32 CP32
1 2
L27 X_28L900m_100_0805 L27 X_28L900m_100_0805
CP38 CP38
1 2
L33 X_28L900m_100_0805 L33 X_28L900m_100_0805
PE3_TX 20
PE3_TX* 20
PE3_RX 20
PE3_RX* 20
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
N-2N7002_SOT23
N-2N7002_SOT23
Q49
Q49
R255 4.7K/4 R255 4.7K/4
R256 4.7K/4 R256 4.7K/4
Q48
Q48
N-2N7002_SOT23
N-2N7002_SOT23
PE2_TX 20
PE2_TX* 20
PE2_RX 20
PE2_RX* 20
TO PCIE x 1 SLOT :
PCI_EX2 2007/3/22
TO PCIE x 1 SLOT :PCI_EX3
RS485/RS690-SYSTEM I/F
RS485/RS690-SYSTEM I/F
RS485/RS690-SYSTEM I/F
MS-7405
MS-7405
MS-7405
Last Revision Date:
Last Revision Date:
Last Revision Date:
Monday, May 14, 2007
Monday, May 14, 2007
Monday, May 14, 2007
Sheet
Sheet
Sheet
11 39
11 39
11 39
of
of
1
of
+1.8V_S0
+12V
VCC3
Rev
Rev
Rev
0A
0A
0A
5
U12E
U12E
D D
VCCA_1V2
0.5A
RS485
RS485
VSS62
B7
VSS61
H12
VSS60
AC16
VSS59
M13
4
VSS57
D4
VSS56
F17
AC15
M3
VSSA51
VSS54
VSS55
A23
AE6
AE10
VSSA50
VSS53
H23
M17
AC4
P9
VSSA48
VSSA49
VSS52
VSS51
R17
AE14
Y15
VSSA46
VSSA47
VSS49
VSS50
T25
AC10
G6
VSSA44
VSSA45
VSS48
T23
AE22
AD3
AC9
VSSA42
VSSA43
VSS45
VSS46C4VSS47
R23
AC6
AC7
VSSA40
VSSA41
VSS44
AC22
AD1
AC5
VSSA39
VSS42
G24
AC14
R9
AA3
VSSA37
VSSA38
VSS40
VSS41
D25
AC23
Y14
VSSA94
VSSA95
VSS38
VSS39
Y22
W6
AC2
Y3
Y9
Y11
Y12
VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA93
GROUND
GROUND
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
Y25
R20
U20
H25
W23
W24
AD25
Y1
VSSA30
VSS30
VSS31
R14
VSS29
R12
U3
U6
VSSA28
VSS28
P20
P15
3
U2
T3
VSSA26
VSSA27
VSS26
VSS27
L24
P13
R6
VSSA24
VSSA25
VSS25
N14
N3
VSSA22
VSS22
VSS23
N12
P6
T1
VSSA20
VSSA21
VSS20
VSS21
M23
M25
M6
J3
VSSA19
VSS19
M11
M20
L6
M2
VSSA17
VSSA18
VSS17
VSS18
L20
L23
F1
VSSA15
VSSA16
VSS15
VSS16
L12
L14
J6
VSSA13
VSS13
VSS14
J12
G23
H3
VSSA11
VSS11
VSS12
J22
J2
G3
VSSA10
VSS10
M15
AE18
VSS9
R24
VSS8
P11
V15
VSSA7A1VSSA8H1VSSA9
VSS7
Y23
VSS6
G11
VSSA5F3VSSA6
V14
VSSA4
VSS4E9VSS5
V11
VSSA3
VSS3
D23
V12
VSSA2
PAR 5 OF 5
PAR 5 OF 5
VSS2
F11
A25
VSS1
2
VCCA_1V2
3.5A
1
CP9CP9
C C
10u/10V/8
10u/10V/8
VCCA_1V2
B B
VCCA_1V2
**
*
A A
R156
R156
X_0/6
X_0/6
1 2
C265
C265
+1.8V_S0
1.5A
VCC3 VDDR3
+1.8V_S0
_28L900m_100_0805
_28L900m_100_0805
R217:
RS485: 0 Ohm RESISTOR
RS690: 220 Ohm 500mA FERRITE BEAD
CURRENT MEASUREMENT
C266
C266
10u/10V/8
10u/10V/8
L26 X_28L900m_100_0805 L26 X_28L900m_100_0805
CP21 CP21
1 2
L40
L40
_28L900m_100_0805
_28L900m_100_0805
L41 X_28L900m_100_0805 L41 X_28L900m_100_0805
1 2
L22 X_28L900m_100_0805 L22 X_28L900m_100_0805
1 2
L45
L45
CP16 CP16
CP26 CP26
*
**
5
X_10u/10V/8
X_10u/10V/8
C279
C279
X_1u/6.3V/4
X_1u/6.3V/4
C256
C256
X_1u/6.3V/4
X_1u/6.3V/4
C284
C284
X_1u/6.3V/4
X_1u/6.3V/4
C370
C370
C358
C358
4.7u/10V/8
4.7u/10V/8
C280
C280
X_1u/6.3V/4
X_1u/6.3V/4
C365
C365
4.7u/10V/8
4.7u/10V/8
C261
C261
X_1u/6.3V/4
X_1u/6.3V/4
C283
C283
1u/6.3V/4
1u/6.3V/4
C369
C369
10u/10V/8
10u/10V/8
C278
C278
1u/6.3V/4
1u/6.3V/4
C363
C363
1u/10V/6
1u/10V/6
C262
C262
X_1u/6.3V/4
X_1u/6.3V/4
C368
C368
X_1u/6.3V/4
X_1u/6.3V/4
C650
C650
0.1u/16V/6
0.1u/16V/6
C359
C359
1u/6.3V/4
1u/6.3V/4
背面
C255
C255
0.1u/25V/4
0.1u/25V/4
背面
C655
C655
0.1u/16V/6
0.1u/16V/6
For EMI
C656
C656
0.1u/16V/6
0.1u/16V/6
DDR
VDDHT_PKG
VDDA12_PKG1
VDDA12_PKG2
+1.8V_S0
C693
C693
X_0.1u/16V/4
X_0.1u/16V/4
4
VDD_HT
VDD18
VDDA18
10u/10V/8
10u/10V/8
C374
C374
AE24
AD24
AD22
AB17
AE23
W17
AC18
AD21
AC19
AC20
AB19
AD23
AA17
AE25
AC3
AD2
AC12
AD12
AE12
AC11
Y17
J14
J15
AE2
AB3
AB4
AE1
E11
D11
D22
U7
W7
E7
F7
F9
G9
M1
U12D
U12D
PART 4 OF 5
PART 4 OF 5
VDD_HT1
VDD_HT2
VDD_HT5
VDD_HT6
VDD_HT9
VDD_HT10
VDD_HT11
VDD_HT12
VDD_HT13
VDD_HT14
VDD_HT15
VDD_HT16
VDD_HT17
VDD_HT18
VDD_HT19
VDD18_1
VDD18_2
VDDA18_1
VDDA18_2
VDDA18_3
VDDA18_4
VDDA18_5
VDDA18_6
VDDA18_7
VDDA18_8
VDDR3_2
VDDR3_1
VDDR_1
VDDR_2
VDDR_3
VDDA12/VDDPLL_1
VDDA12/VDDPLL_2
VSSA12/VSSPLL_1
VSSA12/VSSPLL_2
VDDHT_PKG
VDDA12_PKG1
VDDA12_PKG2
VDDA_12_1
VDDA_12_2
VDDA_12_3
VDDA_12_4
VDDA_12_5
VDDA_12_6
VDDA_12_7
VDDA_12_8
VDDA_12_9
VDDA_12_10
VDDA_12_11
VDDA_12_12
POWER
POWER
RS485
RS485
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
3
D1
G7
E2
C1
E3
D2
M9
F4
B1
D3
L9
E6
L11
L13
L15
M12
R15
M14
N11
N13
N15
J11
H11
P12
P14
R11
R13
A19
B19
U11
U14
P17
L17
J19
D20
G20
A9
B9
C9
D9
A7
A4
U12
U15
VDDA_12
背面
0.1u/25V/4
0.1u/25V/4
C251
C251
0.1u/25V/4
0.1u/25V/4
C259
C259
0.1u/16V/6
0.1u/16V/6
C653
C653
背面
0.1u/16V/6
0.1u/16V/6
C657
C657
0.1u/16V/6
0.1u/16V/6
C652
C652
0.1u/16V/6
0.1u/16V/6
2
CP27 CP27
C367
C367
C360
C360
10u/10V/8
10u/10V/8
1u/10V/6
1u/10V/6
10A
C651
C651
C654
C654
0.1u/16V/6
0.1u/16V/6
10u/10V/8
10u/10V/8
NB RS485 POWER STATES
Power Signal
VDDHT
VDDR,VDDRCK
VDD18
VDDC
VDDA18
VDDA12
AVDDDI
PLLVDD
HTPVDD
VDDR3
LPVDD
LVDDR18D
LVDDR18A OFF ON ON OFF OFF
R253
R253
CURRENT MEASUREMENT
X_0/6
X_0/6
1 2
C366
C366
X_10u/10V/8
X_10u/10V/8
VCCA_1V2
C247
C247
C244
C244
X_10u/10V/8
X_10u/10V/8
S3
S0
S1
ON
ON
OFF
ON
ON
ON
ON
ON
OFF
ON
ON
OFF
ON
ON
OFF
ON
ON
OFF
ON
ON
OFF AVDD
ON
ON
OFF
ON
ON
OFF
ON
ON
OFF
ON
ON
OFF
ON
ON
OFF
ON
ON
OFF
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
RS485/RS690-POWER
RS485/RS690-POWER
RS485/RS690-POWER
S4/S5
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
MS-7405
MS-7405
MS-7405
G3
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
Last Revision Date:
Last Revision Date:
Last Revision Date:
Monday, May 14, 2007
Monday, May 14, 2007
Monday, May 14, 2007
Sheet
Sheet
Sheet
12 39
12 39
12 39
1
Rev
Rev
Rev
0A
0A
0A
of
of
of