MSI MS-7403 Schematic 0A

CONTENT SHEET

1

Cover Sheet, Block diagram
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Power
Intel LGA775 CPU - GND
Intel Broadwater - CPU
Intel Broadwater - Memory
Intel Broadwater - PCI Express
Intel Broadwater - GND
ICH8
DDR2 DIMM 1
Clock Gen ICS9LPR502
W83627DHG / LPC / TPM
PS2 / COM Port
SATA / RTC / FAN Control
LAN 82566DM - NINEVEH/EKRON

A A

Azalia Codec (ALC888)
ATX, IDE Connector & F_Panel
JMB368
USB Connector / Card Reader

1-2

3
4
5
6
7
8

9
10-12
13-15

16
17
18
19
20
21
22
23
24

MS-7403

CPU:

System Chipset:

On Board Device:

Main Memory:

Intersil PWM:

Intel Pentium 4 Cedar Mill / Prescott , Pentium D Smithfield /
Presler and Conroe family processors in LGA775 Package.

Intel BroadwaterG Q965/G965 (North Bridge)
Intel ICH8DO/ICH8DH (South Bridge)

BIOS -- SPI Flash 16M
Azalia Codec -- ALC888
LPC Super I/O -- W83627DHG
LAN -- 82566DM (NINEVEH/EKRON)
CLOCK Gen -- ICS 9LPR502 (56pin)
PCI-E to PATA -- JMB368
HDMI -- CH7315B

DDR-II *1 (Max 2GB)

Controller: Intersil ISL6306/9626 (4 Phases)
Driver: Intersil ISL6612

min-iTX

Version: 0A

MS7 ACPI Controller/AMT Power
VRD 11 - ISL6306/6326 (4 Phases)
VGA Connector
GPIO & JUMPER SETTING
Revision History
Manual Parts

25-26

27
28
30
31

32
DC-IN Power 33
Power Delivery / PWOK / Reset Map

34-36

Option Function

STD

Broadwater/ICH8/W83627DHG/ALC888/82566DM/PCIE to IDE

1

Orcad Configure

cfg-STD

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Date:

Date:

BOM

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7403

MS-7403

MS-7403

COVER SHEET

COVER SHEET

Tuesday, March 27, 2007

Tuesday, March 27, 2007

Tuesday, March 27, 2007

COVER SHEET

Sheet of

Sheet of

Sheet of

0A

0A

0A

136

136

136

1

Block Diagram

Board Stack-up

VRD 11

ISL6306/6326

3-Phase PWM

Chrontel 7315B

HDMI

Analog

Video Out

A A

CARD Reader Port 1

SDVO

RGB

USB2.0

Intel LGA775 Processor

FSB 533/800/1066

FSB

Broadwater
Q965/G965

Control link

DMI

DDRII

DDR2 533/667/800

2 DDR II
DIMM
Modules

(1080 Prepreg Considerations)

Solder Mask

PREPREG 2.7mils

CORE 50mils

Solder Mask

PREPREG 2.7mils

Single End 50ohm Top/Bottom : 4mils
USB2.0 - 90ohm : 15/4.5/7.5/4.5/15
SATA - 95ohm : 15/4/8/4/15
LAN - 100ohm : 15/4/8/4/15
IDE : 15/4/8/4/15

1.9mils Cu plus plating

1.9mils Cu plus plating

1 oz. (1.2mils)
Cu Power
Plane

1 oz. (1.2mils)
Cu GND
Plane

SATA-II 0

USB Port 0~5

HD Audio Codec

ALC888

PCIE to PATA

JMB368

IDE

SATA2

USB2.0

HD Audio Link

PCI Express x1

SPI

Flash ROM

ICH8DO/ICH8DH

SPI

LPC Bus

TPM

SLB9635

optional

Debug Port

LPC

GLCI/LCI

LPC SIO
Winbond

(W83627DHG)

Keyboard

Mouse

1

Serial *2

LAN

Nineveh(GIGA):82566-DM/82566-DC

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7403

MS-7403

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Tuesday, March 27, 2007

Date:

Tuesday, March 27, 2007

Date:

Tuesday, March 27, 2007

MS-7403

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

Sheet of

Sheet of

Sheet of

236

236

236

0A

0A

0A

8

D D

OK

H_DBI#[0..3]6

CPU_GTLREF24

OK

H_IERR#4

H_FERR#4,10

OK

H_STPCLK#10

OK

OK
OK
OK

OK

C C

B B

OK

A A

OK
OK
OK
OK
OK
OK

OK

OK
OK
OK

H_D#[0..63]6

H_INIT#10

H_DBSY#6

H_DRDY#6

H_TRDY#6

H_ADS#6

H_LOCK#6

H_BNR#6

H_HIT#6
H_HITM#6
H_BPRI#6

H_DEFER#6

THERMDA18
THERMDC18

TRMTRIP#4,10

H_PROCHOT#4,11

H_IGNNE#10

ICH_H_SMI#10

H_A20M#10

CPU_GTLREF34

CPU_BSEL015
CPU_BSEL115
CPU_BSEL215

OK

OK

H_CPURST#4,6

8

H_PWRGD4,11

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

CPU_GTLREF2

H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK

THERMDA
THERMDC

H_TESTHI13

H_TESTHIC9
CPU_GTLREF3

OK

H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54

7

G11
D19
C20

AB2
AB3

AD3

AD1
AF1
AC1
AG1
AE1

AL1

AK1
AE8

AL2

AH2
AE6
G10

D16

A20

AA2
G29

H30
G30

G23

B22
A22
A19
B19
B21

C21

B18
A17
B16

C18

7

H_A#[3..35]6

A8

F2

R3

M3

P3

H4

B2

C1

E3

D2
C3
C2
D4

E4
G8
G7

M2

N2

P2

K3

L2

N5
C9

Y1

V2

N1

U1A

U1A

DBI0#
DBI1#
DBI2#
DBI3#

EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#

DBSY#
DRDY#
TRDY#

ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#

TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13

RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5

BOOTSELECT
LL_ID0
LL_ID1

BSEL0
BSEL1
BSEL2

PWRGOOD
RESET#
D63#

D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#

D53#

B15

H_D#53

D52#

D51#

C14

C15

H_D#51

H_D#52

D50#

D49#

A14

D17

H_D#50

H_D#49

6

CPU SIGNAL BLOCK

H_A#28

H_A#27

H_A#31

H_A#32

H_A#35

AJ6

D20

H_D#48

H_A#34

AJ5

A35#

A34#

D48#

D47#

G22

H_D#47

H_A#33

AH5

AH4

A33#

A32#

D46#

D45#

E22

D22

H_D#46

H_D#45

H_A#30

AG5

AG4

A31#

A30#

D44#

D43#

F21

G21

H_D#43

H_D#44

H_A#29

AG6

AF4

A29#

A28#

D42#

D41#

F20

E21

H_D#42

H_D#41

H_A#26

AF5

AB4

A27#

D40#

E19

E18

H_D#39

H_D#40

6

H_A#25

AC5

A26#

A25#

D39#

D38#

F18

H_D#38

H_A#23

H_A#24

AB5

AA5

A24#

A23#

D37#

D36#

F17

G17

H_D#36

H_D#37

H_A#22

H_A#21

AD6

AA4

A22#

A21#

D35#

D34#

E16

G18

H_D#34

H_D#35

H_A#18

H_A#20

H_A#19

A20#Y4A19#Y6A18#W6A17#

D33#

D32#

E15

G16

G15

H_D#31

H_D#32

H_D#33

H_A#16

H_A#17

H_A#15

H_A#14

AB6

A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#

D31#

D30#

D29#

D28#

F15

F14

G14

G13

H_D#29

H_D#28

H_D#30

H_D#27

H_A#13

D27#

D26#

E13

H_D#26

H_A#11

H_A#12

D25#

F12

D13

H_D#25

H_D#24

5

H_A#8

H_A#10

H_A#9

U6

A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#

D24#

D23#

D22#

D21#

F11

E10

D10

H_D#23

H_D#21

H_D#22

5

H_A#3

H_A#4

H_A#5

H_A#6

H_A#7

L5

D20#D7D19#E9D18#F9D17#F8D16#G9D15#

H_D#20

H_D#17

H_D#18

H_D#19

H_D#16

AC2

DBR#

D14#

D11

C12

H_D#14

H_D#15

AN3

VCC_SENSE

D13#

D12#D8D11#

B12

H_D#13

H_D#12

AN5

AN4

VSS_SENSE

VCC_MB_REGULATION

D10#

B10

C11

H_D#10

H_D#11

AN6

VSS_MB_REGULATION

D9#

A11

A10

H_D#8

H_D#9

4

R1 X_0_0402R1 X_0_0402

VID7

VID6

VID4

VID5

AM7

AM5

AL4

AJ3

AK4

AK3

VID6#

VID5#

VID_SELECT

ITP_CLK1

ITP_CLK0

RSVD#AM7

GTLREF_SEL

D8#

D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#

H_D#2

H_D#5

H_D#6

H_D#3

H_D#7

H_D#4

H_D#1

4

VCC_VRM_SENSE
VSS_VRM_SENSE

VID2

VID3

VID1

VID0

AL6

AM3

AL5

AM2

VID4#

VID3#

VID2#

VID1#

VID0#

GTLREF0
GTLREF1

GTLREF2

BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#

PCREQ#

REQ4#
REQ3#
REQ2#
REQ1#
REQ0#

TESTHI12
TESTHI11
TESTHI10

TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0

FORCEPH

RSVD#G6

BCLK1#
BCLK0#

RS2#
RS1#
RS0#

AP1#
AP0#

BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0

DP3#

DP2#

DP1#

DP0#

ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

LINT1/NMI

LINT0/INTR

ZIF-SOCK775

ZIF-SOCK775

B4

H_D#0

VID[0..7] 26

AN7
H1
H2

GTLREF_SEL

H29

CPU_MCH_GTLREF

E24

H_BPM#5

AG3

H_BPM#4

AF2

H_BPM#3

AG2

H_BPM#2

AD2

H_BPM#1

AJ1

H_BPM#0

AJ2
G5

H_REQ#4

J6

H_REQ#3

K6

H_REQ#2

M6

H_REQ#1

J5

H_REQ#0

K4

H_TESTHI12

W2

H_TESTHI11

P1

H_TESTHI10

H5

H_TESTHI9

G4

H_TESTHI8

G3
F24
G24
G26
G27
G25
F25
W3
F26

FORCEPH

AK6

RSVD_G6

G6
G28

F28

H_RS#2

A3

H_RS#1

F5

H_RS#0

B3

TEST-U3

U3

TEST-U2

U2
F3

H_COMP5

T2

H_COMP4

J2

H_COMP3

R1

H_COMP2

G2

H_COMP1

T1

H_COMP0

A13

TEST-J17

J17

TEST-H16

H16

TEST-H15

H15

TEST-J16

J16
AD5

R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1

VTT_OUT_RIGHT

R2

R2
680_0402

680_0402

CPU_GTLREF0
CPU_GTLREF1

R3 X_0_0402R3 X_0_0402

H_TESTHI2_7
H_TESTHI1
H_TESTHI0

R15 49.9_1%_0402R15 49.9_1%_0402
R16 49.9_1%_0402R16 49.9_1%_0402
R17 49.9_1%_0402R17 49.9_1%_0402
R18 49.9_1%_0402R18 49.9_1%_0402
R19 49.9_1%_0402R19 49.9_1%_0402
R20 49.9_1%_0402R20 49.9_1%_0402

3

FP_RST# 11,21

VCC_VRM_SENSE 26
VSS_VRM_SENSE 26

OK

VRD_VIDSEL 26
CPU_GTLREF0 4
CPU_GTLREF1 4

T1T1

CPU_MCH_GTLREF 6

H_BPM#0 5
ICH8_PECI 10,16
IO_PECI 16
H_REQ#[0..4] 6

R5 0_0402R5 0_0402
R7 0_0402R7 0_0402

H_BPM#2
H_BPM#3

FOR KENTSFILED

R11 51_0402R11 51_0402
R12 51_0402R12 51_0402

R13 X_130R_0402R13 X_130R_0402
R14 X_51_0402R14 X_51_0402

CK_H_CPU# 15
CK_H_CPU 15

H_RS#[0..2] 6

T2T2
T3T3

T4T4
T5T5
T6T6
T7T7

H_ADSTB#1 6
H_ADSTB#0 6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 10
H_INTR 10

3

2

RN1

RN1

680-8P4R

680-8P4R

VID2

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

RN2

RN2

680-8P4R

680-8P4R

1 2
3 4
5 6
7 8

RN3 51_0402-8P4RRN3 51_0402-8P4R

1 2
3 4
5 6
7 8

RN4 51_0402-8P4RRN4 51_0402-8P4R

1 2
3 4
5 6
7 8

RN5 51_0402-8P4RRN5 51_0402-8P4R

1 2
3 4
5 6
7 8

RN6 51_0402-8P4RRN6 51_0402-8P4R

R184 51_0402R184 51_0402
R4 51_0402R4 51_0402

R6 51_0402R6 51_0402
R8 51_0402R8 51_0402
R9 51_0402R9 51_0402
R10 0_0402R10 0_0402

VTT_OUT_RIGHT

H_BPM#1

OK

OK

VID0
VID5
VID4
VID7
VID3
VID6
VID1

H_BPM#0
H_BPM#1
H_BPM#5
H_BPM#3

H_TRST#
H_BPM#4
H_TDO
H_TCK

H_TDI
H_BPM#2
H_TMS

H_TESTHI12
H_TESTHI1
H_TESTHI11

H_TESTHI10

H_TESTHI8
H_TESTHI9
H_TESTHI13

H_TESTHIC9

FOR KENTSFILED

V_FSB_VTT 4,6,12,15,16,24

VTT_OUT_RIGHT
VTT_OUT_LEFT

OK

OK

MSI

MSI

MSI

H_BR#0 4,6

VTT_OUT_RIGHT 4,5
VTT_OUT_LEFT 4,5

VTT_OUT_LEFT

C4

C4

0.1u_16V_0402

0.1u_16V_0402

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Tuesday, March 27, 2007

Date:

Tuesday, March 27, 2007

Date:

Tuesday, March 27, 2007

2

OK

OK

MS-7403

MS-7403

MS-7403

LGA775 - SIGNALS

LGA775 - SIGNALS

LGA775 - SIGNALS

OK

1

VTT_OUT_RIGHT

C1

C1

0.1u_16V_0402

0.1u_16V_0402

OK

OK

OK

VTT_OUT_LEFT

C3

C3

0.1u_16V_0402

0.1u_16V_0402

Sheet of

Sheet of

Sheet of

336

336

336

1

C2

C2

0.1u_16V_0402

0.1u_16V_0402

OK

OK

0A

0A

0A

8

VCCP

AF22

AF21

AF9

VCC#AF19
VCC#AF18
VCC#AF15
VCC#AF14
VCC#AF12
VCC#AF11
VCC#AE9
VCC#AE23
VCC#AE22
VCC#AE21
VCC#AE19
VCC#AE18
VCC#AE15
VCC#AE14
VCC#AE12
VCC#AE11
VCC#AD8
VCC#AD30
VCC#AD29
VCC#AD28
VCC#AD27
VCC#AD26
VCC#AD25
VCC#AD24
VCC#AD23
VCC#AC8
VCC#AC30
VCC#AC29
VCC#AC28
VCC#AC27
VCC#AC26
VCC#AC25
VCC#AC24
VCC#AC23
VCC#AB8
VCC#AA8

AF8

VCC#AF9

VCC#AF8

VCC#AF22

VCC#AF21

VCC#Y28

VCC#Y29

VCC#Y30

VCC#Y8

Y8

Y28

Y29

Y30

U1B

U1B

VCCP

D D

C C

AF19
AF18
AF15
AF14
AF12
AF11

AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11

AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23

AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23

AB8

AA8

VCCP

7

AG30

AG29

AG28

AG27

AG26

AG25

AG22

AG21

AG19

AG18

AG15

AG14

AG12

AG11

VCC#AG25

VCC#AG22

VCC#AG21

VCC#AG19

VCC#AG18

VCC#AG15

VCC#AG14

VCC#AG12

VCC#AG11

VCC#W28

VCC#W29

VCC#W30

VCC#W8

VCC#Y23

VCC#Y24

VCC#Y25

VCC#Y26

VCC#Y27

W8

Y23

Y24

Y25

Y26

Y27

W30

W29

W28

W27

VCC#AG28

VCC#AG27

VCC#AG26

VCC#W25

VCC#W26

VCC#W27

W25

W26

VCC#AG30

VCC#AG29

VCC#W24

W23

W24

AG8

VCC#AG8

VCC#V8V8VCC#W23

AG9

VCC#AG9

VCC#U8

U8

AH12

AH11

VCC#AH12

VCC#AH11

VCC#U29

VCC#U30

U29

U30

AH14

VCC#AH14

VCC#U28

U28

AH18

AH15

VCC#AH18

VCC#AH15

VCC#U26

VCC#U27

U26

U27

AH21

AH19

VCC#AH21

VCC#AH19

VCC#U24

VCC#U25

U24

U25

AH22

U23

VCC#AH22

AH25

VCC#AH25

VCC#T8T8VCC#U23

6

AH8

AH9

AJ11

AJ12

AJ14

AJ15

AJ18

AJ19

AH27

AH26

AH28

AH29

AH30

VCC#AH8

VCC#AH9

VCC#AH27

VCC#AH26

VCC#AH28

VCC#AH29

VCC#AH30

VCC#T24

VCC#T25

VCC#T26

VCC#T27

VCC#T28

VCC#T29

VCC#T30

T23

T24

T25

T26

T27

T28

T29

T30

AJ21

VCC#AJ11

VCC#AJ12

VCC#AJ14

VCC#AJ15

VCC#AJ18

VCC#AJ19

VCC#N29

VCC#N30

VCC#N8

VCC#P8P8VCC#R8

VCC#T23

N8

R8

N28

N29

N30

AJ22

AJ25

VCC#AJ21

VCC#AJ22

VCC#N27

VCC#N28

N26

N27

AJ26

AJ8

VCC#AJ25

VCC#AJ26

VCC#N25

VCC#N26

N24

N25

5

AK11

AJ9

VCC#AJ8

VCC#AJ9

VCC#N24

N23

AK12

VCC#AK11

VCC#M8M8VCC#N23

M30

4

AL11

AL12

AL14

AL15

AL18

AL19

AL21

AL22

AL25

AL26

AL29

AL30

AL8

AL9

AM11

AM12

AM14

AM15

AM18

AM19

VCC#AM11

VCC#AM12

VCC#J24

VCC#J25

J23

J24

VCC#AM14

VCC#AM15

VCC#J22

VCC#J23

J21

J22

AM21

VCC#AM18

VCC#AM19

VCC#J20

VCC#J21

J19

J20

AK14

AK15

AK18

AK19

AK21

AK22

AK25

AK26

AK8

AK9

VCC#AL8

VCC#AK8

VCC#AK9

VCC#AL11

VCC#AL12

VCC#AL14

VCC#AL15

VCC#AL18

VCC#AL19

VCC#AL21

VCC#AK12

VCC#AK14

VCC#AK15

VCC#AK18

VCC#AK19

VCC#AK21

VCC#AK22

VCC#AK25

VCC#AK26

VCC#K28

VCC#K29

VCC#K30

VCC#K8K8VCC#L8L8VCC#M23

VCC#M24

VCC#M25

VCC#M26

VCC#M27

VCC#M28

VCC#M29

VCC#M30

K28

K29

K30

M23

M24

M25

M26

M27

M28

M29

VCC#AL22

VCC#K24

VCC#K25

VCC#K26

VCC#K27

K23

K24

K25

K26

K27

VCC#AL25

VCC#J8J8VCC#J9J9VCC#K23

J30

VCC#AL26

VCC#AL29

VCC#J29

VCC#J30

J28

J29

VCC#AL30

VCC#J27

VCC#J28

J26

J27

VCC#AL9

VCC#J26

J25

AM22

AM25

VCC#AM21

VCC#AM22

VCC#J18

VCC#J19

J15

J18

AM26

AM29

VCC#AM25

VCC#AM26

VCC#J14

VCC#J15

J13

J14

AM30

AM8

VCC#AM29

VCC#AM30

VCC#J12

VCC#J13

J11

J12

3

AM9

VCC#AM8

VCC#AM9

VCC#J10

VCC#J11

J10

AN11

AN12

VCC#AN11

VCC#AN12

VCC#AN8

VCC#AN9

AN8

AN9

AN14

AN15

AN18

AN19

VCC#AN14

VCC#AN15

VCC#AN18

VCC#AN19

VTT_OUT_RIGHT

VTT_OUT_LEFT

VCC#AN25

VCC#AN26

VCC#AN29

VCC#AN30

AN25

AN26

AN29

AN30

AN21

AN22

VCCA
VSSA

VCC#AN21

VCC#AN22

VCCPLL

VCC-IOPLL

VTT#A25
VTT#A26
VTT#A27
VTT#A28
VTT#A29
VTT#A30
VTT#B25
VTT#B26
VTT#B27
VTT#B28
VTT#B29

VTT#B30
VTT#C25
VTT#C26
VTT#C27
VTT#C28
VTT#C29
VTT#C30
VTT#D25
VTT#D26
VTT#D27
VTT#D28
VTT#D29
VTT#D30

VTTPWRGD

VTT_SEL

RSVD#F29

1122334

4

ZIF-SOCK775

ZIF-SOCK775

A23
B23
D23
C23

A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30

VTT_PWG

AM6

VTT_OUT_RIGHT

AA1

VTT_OUT_LEFT

J1

VTT_SEL

F27
F29

2

H_VCCA
H_VSSA
H_VCCPLL
H_VCCA

V_FSB_VTT

C6

C6

C5

C5

10u_10V_0805

10u_10V_0805

10u_10V_0805

10u_10V_0805

CAPS FOR FSB GENERIC

VTT_SEL 24

1

C7

C7

10u_10V_1206

10u_10V_1206

VTT_OUT_RIGHT

B B

VTT_OUT_RIGHT

VTT_OUT_RIGHT

VTT_OUT_RIGHT

R21 124_1%_0402R21 124_1%_0402

R23

R23
210_1%_0402

210_1%_0402

R24 124_1%_0402R24 124_1%_0402

R26

R26
210_1%_0402

210_1%_0402

R27 124_1%_0402R27 124_1%_0402

R29

R29
210_1%_0402

210_1%_0402

R30 124_1%_0402R30 124_1%_0402

R32

R32
210_1%_0402

210_1%_0402

PLACE AT CPU END OF ROUTE

A A

VTT_OUT_LEFT3,5

VTT_OUT_RIGHT

VTT_OUT_LEFT

R33 130R_1%_0402R33 130R_1%_0402
R35 62_0402R35 62_0402

R37 62_0402R37 62_0402
R38 X_100_0402R38 X_100_0402
R40 62_0402R40 62_0402

PLACE AT ICH END OF ROUTE

V_FSB_VTT3,6,12,15,16,24

8

V_FSB_VTT

R41 62_0402R41 62_0402
R42 62_0402R42 62_0402

7

R22 10_0402R22 10_0402
C9

C9
1u_16V_0402

1u_16V_0402

R25 10_0402R25 10_0402

C11
1u_16V_0402

1u_16V_0402

R28 10_0402R28 10_0402
C19

C19
1u_16V_0402

1u_16V_0402

R31 10_0402R31 10_0402

C21

C21
1u_16V_0402

1u_16V_0402

H_PROCHOT#
H_IERR#

H_CPURST#
H_PWRGD
H_BR#0

TRMTRIP#
H_FERR#

C10

C10
220p_0402

220p_0402

C12

C12
220p_0402

220p_0402

C20

C20
220p_0402

220p_0402

C22

C22
220p_0402

220p_0402

CPU_GTLREF0 3

*GTLREF VOLTAGE SHOULD BE

0.63*VTT = 0.756V

CPU_GTLREF1 3

CPU_GTLREF2 3

*GTLREF VOLTAGE SHOULD BE

0.63*VTT = 0.756V

CPU_GTLREF3 3

Reserve for Kentsfield (quad Core)

H_PROCHOT# 3,11VTT_OUT_RIGHT3,5
H_IERR# 3

H_CPURST# 3,6
H_PWRGD 3,11
H_BR#0 3,6

TRMTRIP# 3,10
H_FERR# 3,10

6

*PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
*TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS

V_FSB_VTT V_1P5_ICH

L1 X_10u_0.1A_0805L1 X_10u_0.1A_0805C11

CP2

CP2

X_COPPER

X_COPPER

C13

C13
1u_16V_0402

1u_16V_0402

C14

C14
10u_10V_0805

10u_10V_0805

H_VCCA

H_VSSA

VTT_PWRGOOD

R36

R36
1K_0402

1K_0402

R39 1K_0402R39 1K_0402

4

VTT_OUT_RIGHT

R34

R34
680_0402

680_0402

Q1

3904Q13904

1.25V VTT_PWRGOOD

VTT_PWG

MSI

MSI

MSI

3

VCC5_SB

VID_GD#24,26

5

CP1

CP1

X_COPPER

X_COPPER

VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7403

MS-7403

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Wednesday, March 28, 2007

Date:

Wednesday, March 28, 2007

Date:

Wednesday, March 28, 2007

2

MS-7403

LGA775 - POWER

LGA775 - POWER

LGA775 - POWER

H_VCCPLL

C17

C17

.01u_0402

.01u_0402

Sheet of

Sheet of

Sheet of

C18

C18
10u_10V_0805

10u_10V_0805

436

436

436

1

0A

0A

0A

8

7

6

5

4

3

2

1

H_BPM#0

VTT_OUT_LEFT

L29

L28

L27

L26

L25

L24

VSS#L29

VSS#AL7

AM1

VSS#L28

VSS#AM1

L23

VSS#L27

VSS#L26

VSS#L25

VSS#L24

VSS#L23

VSS#AM10

VSS#AM13

VSS#AM16

VSS#AM17

VSS#AM20

AM10

AM13

AM16

AM17

AM20

AM23

L3

VSS#L3

VSS#AL3

AL3

AL7

51_0402

51_0402

TP3TP3

RSVD#E5E5RSVD#E6E6RSVD#E7

VSS#AF17

VSS#AF20

AF20

R45

R45

TP1TP1

AF23

1

1

F23

E7

RSVD#F23

VSS#AF23

VSS#AF24

VSS#AF25

AF24

AF25

OK OK

R46

R46

24.9_1%_0402

24.9_1%_0402

R48

R48

51_0402

51_0402

H_COMP8

N4

F6

B13

J3

IMPSEL#

RSVD#J3

RSVD#N4

RSVD#B13

VSS#AF26

VSS#AF27

VSS#AF28

VSS#AF29

VSS#AF3

VSS#AF30

AF3

AF26

AF27

AF28

AF29

AF30

P5

AF6

RSVD#P5

VSS#AF6

AF7

VSS#AF7

VTT_OUT_LEFT

R47

R47
X_51_0402

X_51_0402

R49

R49
51_0402

51_0402

VSS#P24

VSS#AK7

M1

L30

N3

VSS#N7N7VSS#N6N6VSS#N3

VSS#AL13

AL16

L6

VSS#L7L7VSS#L6

VSS#M7M7VSS#M1

VSS#L30

VSS#AL16

VSS#AL17

VSS#AL20

VSS#AL23

VSS#AL24

VSS#AL27

VSS#AL28

AL17

AL20

AL23

AL24

AL27

AL28

P23

VSS#P23

VSS#AL10

AL10

AL13

R30

R29

R28

R27

R26

R25

R24

Y2

V6

W1

AC4

MSID[1]V1MSID[0]

VSS#Y7Y7VSS#Y5Y5VSS#Y2

RSVD#AC4

VSS#AG10

VSS#AG13

VSS#AG16

VSS#AG17

VSS#AG20

VSS#AG23

VSS#AG24

AG10

AG13

AG7

AG16

AG17

AG20

AG23

AG24

V3

W4

V30

V29

V28

V27

VSS#V7V7VSS#V6

VSS#V3

VSS#W7W7VSS#W4

VSS#V30

VSS#V29

VSS#V28

VSS#AG7

VSS#AH1

VSS#AH10

VSS#AH13

VSS#AH16

VSS#AH17

VSS#AH20

VSS#AH23

VSS#AH24

AH1

AH10

AH13

AH3

AH16

AH17

AH20

AH23

AH24

U1

R5

V26

V25

V24

VSS#V27

VSS#V26

VSS#V25

VSS#AH3

VSS#AH6

VSS#AH7

AH6

AH7

AJ10

T3

V23

VSS#T7T7VSS#T6T6VSS#T3

VSS#U7U7VSS#U1

VSS#V24

VSS#V23

VSS#AJ10

VSS#AJ13

AJ13

VSS#R7R7VSS#R5

VSS#R30

VSS#AJ16

VSS#AJ17

VSS#AJ20

VSS#AJ23

VSS#AJ24

VSS#AJ27

VSS#AJ28

VSS#AJ29

AJ16

AJ17

AJ20

AJ23

AJ24

AJ27

AJ28

AJ29

AJ30

R23

P4

R2

P30

P29

P28

P27

P26

P25

P24

VSS#P7P7VSS#P4

VSS#R2

VSS#P30

VSS#P29

VSS#P28

VSS#P27

VSS#P26

VSS#R29

VSS#R28

VSS#R27

VSS#R26

VSS#R25

VSS#R24

VSS#R23

VSS#AJ30

VSS#AJ4

VSS#AJ7

VSS#AK10

VSS#AK13

VSS#AK16

VSS#AK17

VSS#AK2

VSS#AK20

VSS#AK23

AJ4

AJ7

AK2

AK10

AK13

AK16

AK17

AK20

AK23

VSS#P25

VSS#AK24

VSS#AK27

VSS#AK28

VSS#AK29

VSS#AK30

VSS#AK5

AK5

AK24

AK7

AK27

AK28

AK29

AK30

OK

VTT_OUT_RIGHT3,4

R44

R44

R43

D D

CP3

CP3

X_COPPER

X_COPPER

C C

B B

R43

49.9_1%_0402

49.9_1%_0402

U1C

U1C

A12

VSS#A12

A15

VSS#A15

A18

VSS#A18

A2

VSS#A2

A21

VSS#A21

A24

VSS#A24

A6

VSS#A6

A9

VSS#A9

AA23

VSS#AA23

AA24

VSS#AA24

AA25

VSS#AA25

AA26

VSS#AA26

AA27

VSS#AA27

AA28

VSS#AA28

AA29

VSS#AA29

AA3

VSS#AA3

AA30

VSS#AA30

AA6

VSS#AA6

AA7

VSS#AA7

AB1

VSS#AB1

AB23

VSS#AB23

AB24

VSS#AB24

AB25

VSS#AB25

AB26

VSS#AB26

AB27

VSS#AB27

AB28

VSS#AB28

AB29

VSS#AB29

AB30

VSS#AB30

AB7

VSS#AB7

AC3

VSS#AC3

AC6

VSS#AC6

AC7

VSS#AC7

AD4

VSS#AD4

AD7

VSS#AD7

AE10

VSS#AE10

AE13

VSS#AE13

AE16

VSS#AE16

AE17

VSS#AE17

AE2

VSS#AE2

AE20

VSS#AE20

AE24

VSS#AE24

AE25

VSS#AE25

AE26

VSS#AE26

AE27

VSS#AE27

AE28

VSS#AE28

H_COMP6

VSS#AE29

AE29

AE30

49.9_1%_0402

49.9_1%_0402

H_COMP7

D1

AE4

AE3

COMP6Y3COMP7

RSVD#AE4

VSS#AE30

VSS#AE5

VSS#AE7

AE5

AE7

AF10

TP2TP2

1
E23

D14

RSVD#D1

RSVD#E23

RSVD#D14

VSS#AF10

VSS#AF13

VSS#AF16

AF13

AF16

AF17

VSS#K7K7VSS#K5

VSS#AM23

K5

VSS#AM24

AM24

K2

J7

VSS#J4J4VSS#J7

VSS#K2

VSS#AM27

VSS#AM28

VSS#AM4

AM4

AM27

AM28

H_BPM#0 3
VTT_OUT_LEFT 3,4

H9

VSS#H3H3VSS#H6H6VSS#H7H7VSS#H8H8VSS#H9

VSS#AN1

VSS#AN10

VSS#AN13

VSS#AN16

VSS#AN17

AN1

AN10

AN13

AN16

AN17

H28

AN2

FOR KENTSFILED

H17

H18

H19

H20

H21

H22

H23

H24

H25

H26

H27

VSS#H28

VSS#AN2

VSS#AN20

VSS#AN23

VSS#AN24

VSS#AN27

VSS#AN28

VSS#B1B1VSS#B11

VSS#B14

B11

AN20

AN23

AN24

B14

AN27

AN28

VSS#H12
VSS#H11
VSS#H10

VSS#G1

VSS#F7

VSS#F4
VSS#F22
VSS#F19
VSS#F16
VSS#F13
VSS#F10

VSS#E8
VSS#E29
VSS#E28
VSS#E27
VSS#E26
VSS#E25
VSS#E20

VSS#E2
VSS#E17
VSS#E14
VSS#E11

VSS#D9

VSS#D6

VSS#D5

VSS#D3
VSS#D24
VSS#D21
VSS#D18
VSS#D15
VSS#D12

VSS#C7

VSS#C4
VSS#C24
VSS#C22
VSS#C19
VSS#C16
VSS#C13
VSS#C10

VSS#B8

VSS#B5

VSS#B24
VSS#B20
VSS#B17

ZIF-SOCK775

ZIF-SOCK775

H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17

H14

VSS#H14

H13

VSS#H13

VSS#H17

VSS#H18

VSS#H19

VSS#H20

VSS#H21

VSS#H22

VSS#H23

VSS#H24

VSS#H25

VSS#H26

VSS#H27

VTT_OUT_LEFT

R50

R50
51_0402

51_0402
R51 0_0402R51 0_0402

H_BPM#0

CP4

CP4

X_COPPER

X_COPPER

1

CPU DECOUPLING CAPACITORS

VCCP VCCP

EC1

EC1
22u_6.3V_1206

22u_6.3V_1206
EC5

EC5
22u_6.3V_1206

A A

22u_6.3V_1206
EC9

EC9
22u_6.3V_1206

22u_6.3V_1206

VCCP

EC2

EC2
22u_6.3V_1206

22u_6.3V_1206
EC6

EC6
22u_6.3V_1206

22u_6.3V_1206
EC10

EC10
22u_6.3V_1206

22u_6.3V_1206

EC3

EC3
22u_6.3V_1206

22u_6.3V_1206
EC7

EC7
22u_6.3V_1206

22u_6.3V_1206
EC11

EC11
22u_6.3V_1206

22u_6.3V_1206

VCCP

EC4

EC4
22u_6.3V_1206

22u_6.3V_1206
EC8

EC8
22u_6.3V_1206

22u_6.3V_1206
EC12

EC12
22u_6.3V_1206

22u_6.3V_1206

Place these caps within socket cavity

8

7

6

5

4

TP4TP4

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7403

MS-7403

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Tuesday, March 27, 2007

Date:

Tuesday, March 27, 2007

Date:

3

Tuesday, March 27, 2007

2

MS-7403

LGA775 - GND

LGA775 - GND

LGA775 - GND

Sheet of

Sheet of

Sheet of

536

536

536

1

0A

0A

0A

8

PWRGD11,24

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

HXRCOMP
HXSCOMP
HXSCOMPB
HXSWING

MCH_GTLREF

H_A#[3..35]3

OK

D D

H_ADSTB#03

OK

C C

OK

B B

A A

H_ADSTB#13

H_REQ#[0..4]3

OK

OK
OK
OK
OK
OK

H_LOCK#3

OK

H_BR#03,4

OK

H_BNR#3

OK

H_BPRI#3

OK

H_RS#[0..2]3

CK_H_MCH#15

OK

H_CPURST#3,4

ICH_SYNC#11

R52 16.9_1%R52 16.9_1%

V_FSB_VTT

V_FSB_VTT

R53 49.9_1%_0402R53 49.9_1%_0402

R57 49.9_1%_0402R57 49.9_1%_0402

8

H_ADS#3
H_TRDY#3
H_DRDY#3
H_DEFER#3
H_HITM#3
H_HIT#3

H_DBSY#3

CK_H_MCH15

PLTRST#10,24

V_FSB_VTT3,4,12,15,16,24

J42
L39
J40
L37

L36
K42
N32
N34
M38
N37
M36
R34
N35
N38
U37
N39
R37
P42
R39
V36
R38
U36
U33
R35
V33
V35
Y34
V42
V38
Y36
Y38
Y39

AA37

M34
U34

F40

L35

L38
G43

J37

W40

Y40

W41

T43
Y43
U42
V41

AA42

W42

G39
U40

U41

AA41

U39
R32

U32

AM17

C31

AM18

J13

D23
C25
D25
B25

D24
B24

V_1P25_CORE

HXSCOMP

HXSCOMPB

7

U2A

U2A

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HA32#
HA33#
HA34#
HA35#

HADSTB0#
HADSTB1#

HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#

HADS#
HTRDY#
HDRDY#
HDEFER#
HITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#

HRS0#
HRS1#
HRS2#

HCLKP
HCLKN

PWROK
HCPURST#

RSTIN#
ICH_SYNC#

HRCOMP
HSCOMP
HSCOMP#
HSWING

HDVREF
HAVREF

7

P29

VTT_1

P27

VTT_2

VCC_1

AJ12

P26

VTT_3

VCC_2

AJ11

OK

P24

AJ10

P23

VTT_4

VTT_5

VCC_3

VCC_4

AJ9

N29

N26

N24

VTT_6

VTT_7

VTT_8

VCC_5

VCC_6

VCC_7

AJ8

AJ7

AJ6

V_FSB_VTT

6

N23

M29

M24

M23

L24

L23

K24

K23

J24

J23

H24

H23

G26

G24

G23

VTT_9

VTT_10

VTT_11

VTT_12

VTT_13

VTT_14

VTT_15

VTT_16

VTT_17

VTT_18

VTT_19

VTT_20

VTT_21

VTT_22

VTT_23

VCC_8

VCC_9

VCC_10

VCC_11

VCC_12

VCC_13

VCC_14

VCC_15

VCC_16

VCC_17

VCC_18

VCC_19

VCC_20

VCC_21

VCC_22

AJ5

AJ4

AJ3

AJ2

AH4

AH2

AH1

AG9

AG8

AG7

AG11

AG10

AG6

AG13

AG12

HXSWING SHOULD BE 0.25*VTT

R54

R54
301_1%_0402

301_1%_0402

R59

R59
100_0402

100_0402

R56 49.9_1%_0402R56 49.9_1%_0402
C28

C28
.01u_0402

.01u_0402

6

F26

F24

VTT_24

VCC_23

AG5

AG4

F23

E29

VTT_25

VTT_26

VCC_24

VCC_25

AG3

AG2

E27

VTT_27

VTT_28

VCC_26

VCC_27

AF13

E26

E23

VTT_29

VTT_30

VCC_28

VCC_29

AF12

AF11

HXSWING

D29

VTT_31

VCC_30

AD24

D28

D27

VTT_32

VCC_31

AD22

AD20

C30

VTT_33

VTT_34

VCC_32

VCC_80

AC25

5

C29

C27

VTT_35

VCC_34

AC23

AC21

5

B30

B29

VTT_36

VTT_37

VCC_35

VCC_36

AC19

AC13

OK

B28

VTT_38

VTT_39

VCC_37

VCC_38

AC6

B27

A30

A28

VTT_40

VTT_41

VTT_42

VCC_39

VCC_40

VCC_41

AB24

AB22

AB20

V_FSB_VTT

R27

R26

VTT_43

VCC_42

AA25

AA23

R24

VTT_44

VTT_45

VCC_43

VCC_44

AA21

R23

AG19

AG18

AG17

AG15

AG14

AF26

AF25

VTT_46

VCC_84

VCC_85

VCC_86

VCC_87

VCC_88

VCC_89

VCC_90

VCC_45

VCC_46

VCC_47

VCC_48

VCC_49

VCC_50

VCC_51

VCC_52Y6VCC_53

Y24

Y22

Y20

Y13

V13

AA3

AA19

AA13

*GTLREF VOLTAGE SHOULD BE

0.63*VTT=0.756V

R55

R55
124_1%_0402

124_1%_0402

R60

R60

1u_16V_0402

1u_16V_0402

210_1%_0402

210_1%_0402

4

V_1P25_CORE

AF24

AF22

AF20

AF18

AF17

AF15

VCC_91

VCC_93

VCC_94

VCC_95

VCC_96

VCC_97

VCC_54

VCC_55

VCC_56V9VCC_57

VCC_58

VCC_59U9VCC_60U6VCC_61U3VCC_62

V12

V10

U13

U10

CPU_MCH_GTLREF

R58 51_0402R58 51_0402
C15

C15

4

AF14

VCC_98

AE27

VCC_99

AE26

AE25

VCC_100

VCC_101

VCC_63

N12

N11

C30

C30
220p_0402

220p_0402

AE23

3

AE21

AE19

AE17

AD27

AD26

AD18

AD17

AD15

AD14

VCC_102

VCC_103

VCC_104

VCC_105

VCC_106

VCC_107

VCC_108

VCC_109

VCC_110

VCC_64N9VCC_65N8VCC_66N6VCC_67N3VCC_68L6VCC_69J6VCC_70J3VCC_71J2VCC_72G2VCC_73

F11

CPU_MCH_GTLREF 3

MCH_GTLREF

3

AC27

VCC_111

AC26

AC17

VCC_112

VCC_113

VCC_74F9VCC_75D4VCC_76

C13

VCC_114

AC15

VCC_115

VCC_77C9VCC_78

AC14

VCC_116

P20

OK

AB27

VCC_117

VCC_79

Y11

AB26

VCC_118

VCC_81

AG25

AB18

AB17

AA27

VCC_119

VCC_120

HDSTBP0#
HDSTBN0#

HDSTBP1#
HDSTBN1#

HDSTBP2#
HDSTBN2#

HDSTBP3#
HDSTBN3#

VCC_82

VCC_83

Broadwater-Q

Broadwater-Q

AG21

AG20

MSI

MSI

MSI

2

AA26

VCC_121

VCC_122

HDINV#0
HDINV#1
HDINV#2
HDINV#3

H_D#0

R40

HD0

H_D#1

P41

HD1

H_D#2

R41

HD2

H_D#3

N40

HD3

H_D#4

R42

HD4

H_D#5

M39

HD5

H_D#6

N41

HD6

H_D#7

N42

HD7

H_D#8

L41

HD8

H_D#9

J39

HD9

H_D#10

L42

HD10

H_D#11

J41

HD11

H_D#12

K41

HD12

H_D#13

G40

HD13

H_D#14

F41

HD14

H_D#15

F42

HD15

H_D#16

C42

HD16

H_D#17

D41

HD17

H_D#18

F38

HD18

H_D#19

G37

HD19

H_D#20

E42

HD20

H_D#21

E39

HD21

H_D#22

E37

HD22

H_D#23

C39

HD23

H_D#24

B39

HD24

H_D#25

G33

HD25

H_D#26

A37

HD26

H_D#27

F33

HD27

H_D#28

E35

HD28

H_D#29

K32

HD29

H_D#30

H32

HD30

H_D#31

B34

HD31

H_D#32

J31

HD32

H_D#33

F32

HD33

H_D#34

M31

HD34

H_D#35

E31

HD35

H_D#36

K31

HD36

H_D#37

G31

HD37

H_D#38

K29

HD38

H_D#39

F31

HD39

H_D#40

J29

HD40

H_D#41

F29

HD41

H_D#42

L27

HD42

H_D#43

K27

HD43

H_D#44

H26

HD44

H_D#45

L26

HD45

H_D#46

J26

HD46

H_D#47

M26

HD47

H_D#48

C33

HD48

H_D#49

C35

HD49

H_D#50

E41

HD50

H_D#51

B41

HD51

H_D#52

D42

HD52

H_D#53

C40

HD53

H_D#54

D35

HD54

H_D#55

B40

HD55

H_D#56

C38

HD56

H_D#57

D37

HD57

H_D#58

B33

HD58

H_D#59

D33

HD59

H_D#60

C34

HD60

H_D#61

B35

HD61

H_D#62

A32

HD62

H_D#63

D32

HD63

H_DBI#0

M40

H_DBI#1

J33

H_DBI#2

G29

H_DBI#3

E33
L40

M43
G35

H33
G27

H27
B38

D38

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Tuesday, March 27, 2007

Date:

Tuesday, March 27, 2007

Date:

Tuesday, March 27, 2007

H_DSTBP#0 3
H_DSTBN#0 3

H_DSTBP#1 3
H_DSTBN#1 3

H_DSTBP#2 3
H_DSTBN#2 3

H_DSTBP#3 3
H_DSTBN#3 3

V_FSB_VTT

1u_16V_0402

1u_16V_0402

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7403

MS-7403

MS-7403

Broadwater - CPU

Broadwater - CPU

Broadwater - CPU

2

C16

C16

H_D#[0..63] 3

C25

C25

0.1u_16V_0402

0.1u_16V_0402

Sheet of

Sheet of

Sheet of

1

H_DBI#[0..3] 3

OK

OK

636

636

636

1

OK

OK

0A

0A

0A

8

D D

SCS_A#[0..1]13,14

RAS_A#13,14
CAS_A#13,14
WE_A#13,14

MAA_A[0..14]13,14

C C

B B

VCC_DDR

C31

C31

0.1u_16V_0402

0.1u_16V_0402

ODT_A[0..1]13,14

SBS_A[0..2]13,14

DQS_A013
DQS_A#013
DQS_A113
DQS_A#113
DQS_A213
DQS_A#213
DQS_A313
DQS_A#313
DQS_A413
DQS_A#413
DQS_A513
DQS_A#513
DQS_A613
DQS_A#613
DQS_A713
DQS_A#713

P_DDR0_A13
N_DDR0_A13
P_DDR1_A13
N_DDR1_A13
P_DDR2_A13
N_DDR2_A13

R61 20_1%_0402R61 20_1%_0402
R62 20_1%_0402R62 20_1%_0402
R63 20_1%_0402R63 20_1%_0402 R64 1K_0402R64 1K_0402
R65 20_1%_0402R65 20_1%_0402

SCS_A#0
SCS_A#1

RAS_A#
CAS_A#
WE_A#

MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14

ODT_A0
ODT_A1

SBS_A0
SBS_A1
SBS_A2

DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7

P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A

SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3

AW35

BA35
BA34
BB38

BB33
AY35
BB34

BA31
BB25
BA26
BA25
AY25
BA23
AY24
AY23
BB23
BA22
AY33
BB22

AW21

AY38
BA21

AY37
BA38
BB35
BA39

BA33

AW32

BB21

AT20
AU18
AR41
AR40

AL41

AL40
AG42
AG41
AC42
AC41

AU31
AR31
AP27
AN27
AV33

AW33

AP29
AP31
AM26
AM27

AT33
AU33

BB40
BA40

AU4
AR3
BB3
BA4
BB9
BA9

AN2
AN3

7

U2B

U2B

SCS_A0#
SCS_A1#
SCS_A2#
SCS_A3#

SRAS_A#
SCAS_A#
SWE_A#

SMA_A0
SMA_A1
SMA_A2
SMA_A3
SMA_A4
SMA_A5
SMA_A6
SMA_A7
SMA_A8
SMA_A9
SMA_A10
SMA_A11
SMA_A12
SMA_A13
SMA_A14

SODT_A0
SODT_A1
SODT_A2
SODT_A3

SBS_A0
SBS_A1
SBS_A2

SDQS_A0
SDQS_A0#
SDQS_A1
SDQS_A1#
SDQS_A2
SDQS_A2#
SDQS_A3
SDQS_A3#
SDQS_A4
SDQS_A4#
SDQS_A5
SDQS_A5#
SDQS_A6
SDQS_A6#
SDQS_A7
SDQS_A7#

SCLK_A0
SCLK_A0#
SCLK_A1
SCLK_A1#
SCLK_A2
SCLK_A2#
SCLK_A3
SCLK_A3#
SCLK_A4
SCLK_A4#
SCLK_A5
SCLK_A5#

SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3

AN7

AN8

SDQ_B0

SDQ_A0

AR5

AR4

AW5

AW7

SDQ_B1

SDQ_B2

SDQ_A1

SDQ_A2

AV3

AV2

AN5

AN6

SDQ_B3

SDQ_B4

SDQ_A3

SDQ_A4

AP3

AP2

AN9

AU7

SDQ_B5

SDQ_B6

SDQ_B7

SDQ_A5

SDQ_A6

SDQ_A7

AV4

AU1

AT11

AU11

SDQ_B8

SDQ_A8

AY2

AY3

AP13

AR13

SDQ_B9

SDQ_B10

SDQ_A9

SDQ_A10

BB5

AY6

AR11

AU9

SDQ_B11

SDQ_B12

SDQ_B13

SDQ_A11

SDQ_A12

SDQ_A13

AW2

AW3

6

AV12

AU12

SDQ_B14

SDQ_B15

SDQ_A14

SDQ_A15

BA5

BB4

AU15

AV13

SDQ_B16

SDQ_B17

SDQ_A16

SDQ_A17

AY7

BC7

AU17

AT17

SDQ_B18

SDQ_B19

SDQ_A18

SDQ_A19

AY11

AW11

AU13

AM13

SDQ_B20

SDQ_B21

SDQ_A20

SDQ_A21

BB6

BA6

AV15

AW17

AV24

SDQ_B22

SDQ_B23

SDQ_A22

SDQ_A23

AT18

BA10

BB10

AT23

AT26

SDQ_B24

SDQ_B25

SDQ_B26

SDQ_A24

SDQ_A25

SDQ_A26

AR18

AU21

AP26

AU23

SDQ_B27

SDQ_B28

SDQ_A27

SDQ_A28

AT21

AP17

AW23

AR24

SDQ_B29

SDQ_B30

SDQ_A29

SDQ_A30

AP20

AN17

AN26

AW37

SDQ_B31

SDQ_B32

SDQ_A31

SDQ_A32

AV20

AV42

AV38

AN36

SDQ_B33

SDQ_B34

SDQ_A33

SDQ_A34

AP42

AU40

5

AN37

AU35

SDQ_B35

SDQ_B36

SDQ_A35

SDQ_A36

AV40

AN39

AR35

AN35

AR37

SDQ_B37

SDQ_B38

SDQ_A37

SDQ_A38

AV41

AP41

AR42

AM35

AM38

SDQ_B39

SDQ_B40

SDQ_B41

SDQ_A39

SDQ_A40

SDQ_A41

AN41

AM39

AJ34

AL38

AR39

SDQ_B42

SDQ_B43

SDQ_A42

SDQ_A43

AK42

AK41

AN40

AM34

AL37

SDQ_B44

SDQ_B45

SDQ_B46

SDQ_A44

SDQ_A45

SDQ_A46

AL42

AN42

AL32

AG38

SDQ_B47

SDQ_B48

SDQ_A47

SDQ_A48

AJ40

AL39

AJ38

AF35

SDQ_B49

SDQ_B50

SDQ_A49

SDQ_A50

AF39

AH43

AF33

AJ37

SDQ_B51

SDQ_B52

SDQ_A51

SDQ_A52

AJ42

AE40

AJ35

AG33

SDQ_B53

SDQ_B54

SDQ_A53

SDQ_A54

AJ41

AF41

AF34

AD36

SDQ_B55

SDQ_B56

SDQ_A55

SDQ_A56

AF42

AD40

AC33

AA34

SDQ_B57

SDQ_B58

SDQ_A57

SDQ_A58

AB41

AD43

4

AA36

AD34

SDQ_B59

SDQ_B60

SDQ_A59

SDQ_A60

AA40

AE42

AF38

AC34

SDQ_B61

SDQ_B62

SDQ_A61

SDQ_A62

AE41

AC39

AA33

AY12

SDQ_B63

SDQ_A63

AB42

BC20

AW12

BB11

SCKE_B0

SCKE_B1

SCKE_B2

SCKE_A0

SCKE_A1

SCKE_A2

AY20

AY21

BA11

AR7

SCKE_B3

SCKE_A3

AR2

BA19

AW9

AW13

SDM_B0

SDM_B1

SDM_A0

SDM_A1

BA2

AY9

AP23

AU37

SDM_B2

SDM_B3

SDM_A2

SDM_A3

AN18

AU43

AM37

AG39

SDM_B4

SDM_B5

SDM_A4

SDM_A5

AG40

AM43

AD38

SDM_B6

SDM_B7

SDQS_B0#
SDQS_B1#
SDQS_B2#
SDQS_B3#
SDQS_B4#
SDQS_B5#
SDQS_B6#
SDQS_B7#

SMRCOMPVOL
SMRCOMPVOH

SDM_A6

SDM_A7

Broadwater-Q

Broadwater-Q

AC40

3

SCS_B0#
SCS_B1#
SCS_B2#
SCS_B3#

SRAS_B#
SCAS_B#

SWE_B#
SMA_B0

SMA_B1
SMA_B2
SMA_B3
SMA_B4
SMA_B5
SMA_B6
SMA_B7
SMA_B8

SMA_B9
SMA_B10
SMA_B11
SMA_B12
SMA_B13
SMA_B14

SODT_B0
SODT_B1
SODT_B2
SODT_B3

SBS_B0
SBS_B1

SBS_B2
SDQS_B0
SDQS_B1
SDQS_B2
SDQS_B3
SDQS_B4
SDQS_B5
SDQS_B6
SDQS_B7

SCLK_B0

SCLK_B0#

SCLK_B1

SCLK_B1#

SCLK_B2

SCLK_B2#

SCLK_B3

SCLK_B3#

SCLK_B4

SCLK_B4#

SCLK_B5

SCLK_B5#

SVREF

BB27
BB30
AY27
AY31

AW26
AW29
BA27

BB17
AY17
BA17
BC16
AW15
BA15
BB15
BA14
AY15
BB14
AW18
BB13
BA13
AY29
AY13

BA29
BA30
BB29
BB31

AY19
BA18
BC12

AV6
AU5
AR12
AP12
AP15
AR15
AT24
AU26
AW39
AU39
AL35
AL34
AG35
AG36
AC36
AC37

AV31
AW31
AU27
AT27
AV32
AT32
AU29
AR29
AV29
AW27
AN33
AP32

AM6
AM8

AM10

MCH_VREF_A

C32

C32

.01u_0402

.01u_0402

DDR_RCOMPVOL

3.01K_1%_0402

3.01K_1%_0402

DDR_RCOMPVOH

C33

C33
.01u_0402

.01u_0402

2

R66

R66

DDR_RCOMPVOL = 0.2 * VCC_DDR

R67 1K_0402R67 1K_0402

VCC_DDR

DDR_RCOMPVOH = 0.8 * VCC_DDR

1

DQM_A1

SCKE_A0

DATA_A8

DATA_A4

DATA_A1

DATA_A2

DATA_A0

DATA_A[0..63]13

A A

8

7

DATA_A3

DATA_A10

DATA_A5

DATA_A12

DATA_A7

DATA_A6

DATA_A13

DATA_A9

DATA_A11

DATA_A20

DATA_A17

DATA_A15

DATA_A18

DATA_A14

DATA_A16

6

DATA_A25

DATA_A26

DATA_A24

DATA_A22

DATA_A19

DATA_A21

DATA_A23

DATA_A31

DATA_A29

DATA_A33

DATA_A27

DATA_A28

DATA_A34

DATA_A32

DATA_A30

DATA_A41

DATA_A45

DATA_A46

DATA_A44

DATA_A43

DATA_A39

DATA_A36

DATA_A38

DATA_A42

DATA_A37

DATA_A40

DATA_A35

5

DATA_A53

DATA_A51

DATA_A48

DATA_A47

DATA_A49

DATA_A50

DATA_A58

DATA_A52

DATA_A59

DATA_A57

DATA_A55

DATA_A56

DATA_A54

SCKE_A[0..1]13,14

DQM_A[0..7]13

4

SCKE_A1

DATA_A61

DATA_A63

DATA_A60

DATA_A62

DQM_A4

DQM_A2

DQM_A6

DQM_A0

DQM_A3

DQM_A7

DQM_A5

VCC_DDR

R68 1K_0402R68 1K_0402

3

MCH_VREF_A

R69

MSI

MSI

MSI

R69
1K_0402

1K_0402

C34

C34

0.1u_16V_0402

0.1u_16V_0402

PLACE 0.1UF CAP
CLOSE TO MCH

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7403

MS-7403

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Tuesday, March 27, 2007

Date:

Tuesday, March 27, 2007

Date:

Tuesday, March 27, 2007

2

MS-7403

Broadwater - Memory

Broadwater - Memory

Broadwater - Memory

Sheet of

Sheet of

Sheet of

736

736

736

1

0A

0A

0A

8

SDVO_INT28

SDVO_INT#28

D D

DMI_ITP_MRP_010
DMI_ITN_MRN_010
DMI_ITP_MRP_110
DMI_ITN_MRN_110
DMI_ITP_MRP_210
DMI_ITN_MRN_210
DMI_ITP_MRP_310

C C

V_1P25_CORE

V_1P25_CL_MCH

V_1P5_ICH

VCCD_CRT

B B

VCCDQ_CRT

DMI_ITN_MRN_310

CK_PE_100M_MCH15

CK_PE_100M_MCH#15

SDVO_CtrlData28
SDVO_CtrlClk28

R73 1K_0402R73 1K_0402
R75 X_1K_0402R75 X_1K_0402
R171 1K_0402R171 1K_0402

R76 0_0402R76 0_0402

R80 0_0402R80 0_0402
R81 0_0402R81 0_0402

C86

C86

0.1u_16V_0402

0.1u_16V_0402

C89

C89

0.1u_16V_0402

0.1u_16V_0402

DMI_ITP_MRP_0 DMI_MTP_IRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1

DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3

CK_PE_100M_MCH
CK_PE_100M_MCH#

SDVO_CtrlData
SDVO_CtrlClk

H_BSL0

H_BSL015

H_BSL1

H_BSL115

H_BSL2

H_BSL215

EXP_SLR
EXP_EN

VCC_CL_PLL MCH_DDC_DATA
VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL

V_3P3_DAC_FILTERED

VCCA_EXP
VCCD_CRT
VCCDQ_CRT

VCC3

C87

C87
.01u_0402

.01u_0402

C90

C90
22000p_0402

22000p_0402

V_1P25_CL_MCH

A A

8

V_1P25_CL_MCH

U2C

U2C

F15

EXP_RXP0

G15

EXP_RXN0

K15

EXP_RXP1

J15

EXP_RXN1

F12

EXP_RXP2

E12

EXP_RXN2

J12

EXP_RXP3

H12

EXP_RXN3

J11

EXP_RXP4

H11

EXP_RXN4

F7

EXP_RXP5

E7

EXP_RXN5

E5

EXP_RXP6

F6

EXP_RXN6

C2

EXP_RXP7

D2

EXP_RXN7

G6

EXP_RXP8

G5

EXP_RXN8

L9

EXP_RXP9

L8

EXP_RXN9

M8

EXP_RXP10

M9

EXP_RXN10

M4

EXP_RXP11

L4

EXP_RXN11

M5

EXP_RXP12

M6

EXP_RXN12

R9

EXP_RXP13

R10

EXP_RXN13

T4

EXP_RXP14

R4

EXP_RXN14

R6

EXP_RXP15

R7

EXP_RXN15

W2

DMI_RXP0

V1

DMI_RXN0

Y8

DMI_RXP1

Y9

DMI_RXN1

AA7

DMI_RXP2

AA6

DMI_RXN2

AB3

DMI_RXP3

AA4

DMI_RXN3

B12

GCLKP

B13

GCLKN

G17

SDV0_CTRLDATA

E17

SDVO_CTRLCLK

G20

BSEL0

J20

BSEL1

J18

BSEL2

G18

MTYPE

E18

EXP_SLR

J17

EXP_EN

Y32

VCC_CL_PLL

C23

VCCA_HPLL

A24

VCCA_MPLL

A22

VCCA_DPLLA

C22

VCCA_DPLLB

B15

VCCA_EXPPLL

C17

VCCA_DAC_17

B16

VCCA_DAC_18

A16

VCCA_EXP_19

C21

VCCD_CRT_20

B21

VCCDQ_CRT_21

D16

VSS_1

B17

VCC33

V_1P25_CORE

L3

L3

X_10u_0.1A_0805

X_10u_0.1A_0805

CP7

CP7

X_COPPER

X_COPPER

L6

L6

X_10u_0.1A_0805

X_10u_0.1A_0805

CP9

CP9

X_COPPER

X_COPPER

7

V_1P25_CL_MCH

VCC_EXP_1

AD11

X_0.22u_16V

X_0.22u_16V

7

AL26

AL24

VCC_CL_1

VCC_EXP_2

AD9

AD10

C93

C93

VCC_CL_2

VCC_EXP_3

AL23

AL21

AL20

AL18

AL17

VCC_CL_3

VCC_CL_4

VCC_CL_5

VCC_CL_6

VCC_EXP_4

VCC_EXP_5

VCC_EXP_6

VCC_EXP_7

AD8

AD7

AD6

AD5

AD4

VCCA_MPLL

C94

C94
X_10u_10V_0805

X_10u_10V_0805

VCCA_HPLL

C106

C106

X_10u_10V_0805

X_10u_10V_0805

AL15

AK30

VCC_CL_7

VCC_CL_8

VCC_EXP_8

VCC_EXP_9

AD2

AD1

AK29

AK27

VCC_CL_9

VCC_CL_10

VCC_EXP_10

VCC_EXP_11

AC4

AC3

VCC_DDR

AJ31

AG31

AF31

AD32

VCC_CL_11

VCC_CL_12

VCC_CL_13

VCC_CL_14

VCC_EXP_12

VCC_EXP_13

VCC_EXP_14

VCC_EXP_15

AE4

AE3

AE2

AC2

C95

C95

0.1u_16V_0402

0.1u_16V_0402

C107

C107

0.1u_16V_0402

0.1u_16V_0402

AC32

AA32

VCC_CL_15

VCC_CL_16

VCC_CL_17

VCC_EXP_16

VCCSM_1

BC39

AJ30

AJ29

VCC_CL_18

VCC_CL_19

VCCSM_2

VCCSM_3

BC34

BC30

AJ27

AG30

AG29

VCC_CL_20

VCC_CL_21

VCCSM_4

VCCSM_5

BC26

BC22

BC18

6

AG27

AG26

AF30

VCC_CL_22

VCC_CL_23

VCC_CL_24

VCC_CL_25

VCCSM_6

VCCSM_7

VCCSM_8

VCCSM_9

BB39

BB37

BC14

V_1P25_CORE

V_1P25_CORE

6

AF29

AF27

VCC_CL_26

VCC_CL_27

VCCSM_10

VCCSM_11

BB32

BB28

AD30

AD29

AC30

VCC_CL_28

VCC_CL_29

VCCSM_12

VCCSM_13

BB26

BB24

BB20

AC29

AL12

VCC_CL_30

VCC_CL_31

VCC_CL_32

VCCSM_14

VCCSM_15

VCCSM_16

BB18

BB16

AL11

AL10

AL9

AL8

AL7

VCC_CL_33

VCC_CL_34

VCC_CL_35

VCC_CL_36

VCCSM_17

VCCSM_18

VCCSM_19

VCCSM_20

BB12

AY32

AV26

AW24

AW20

1u_16V

1u_16V

L4

L4

X_10u_0.1A_0805

X_10u_0.1A_0805

CP8

CP8

X_COPPER

X_COPPER

L7

L7

X_10u_0.1A_0805

X_10u_0.1A_0805

CP10

CP10

X_COPPER

X_COPPER

AL6

AL5

VCC_CL_37

VCC_CL_38

VCC_CL_39

VCCSM_21

VCCSM_22

AV18

C91

C91

AL4

AL3

VCC_CL_40

VCC_CL_41

VCC_SMCLK_1

BB41

AL2

AK26

VCC_CL_42

VCC_CL_43

VCC_SMCLK_3

VCC_SMCLK_2

AY42

BA42

AK24

AK23

VCC_CL_44

VCC_CL_45

VCC_SMCLK_5

VCC_SMCLK_4

BA43

BB42

R82 1_0402R82 1_0402
R83 1_0402R83 1_0402

5

AK21

AK20

AK18

AK17

AK15

AK3

AK2

AK1

VCC_CL_46

VCC_CL_47

VCC_CL_48

VCC_CL_49

VCC_CL_50

VCC_CL_51

VCC_CL_52

RESERVED_2

RESERVED_4

RESERVED_5

RESERVED_3

RESERVED_1

H18

BB2

BB19

AN21

AN32

AW42

V_CKDDR

CP5 X_COPPERCP5 X_COPPER
CP6 X_COPPERCP6 X_COPPER

L2 X_10u_0.1A_0805L2 X_10u_0.1A_0805

VCCA_DPLLA

C96

C96
X_10u_10V_0805

X_10u_10V_0805

VCCA_DPLLB

C101

C101
X_10u_10V_0805

X_10u_10V_0805

5

AJ13

AD31

AC31

AA31

Y31

AJ26

AJ24

VCC_CL_53

VCC_CL_54

VCC_CL_55

VCC_CL_56

VCC_CL_57

VCC_CL_58

VCC_CL_59

RESERVED_6

RESERVED_7

RESERVED_8

RESERVED_9

RESERVED_10

RESERVED_11

RESERVED_12

AJ32

AL31

AF32

AA10

AG32

AM31

AM21

C92 10u_10V_0805C92 10u_10V_0805

C97

C97

0.1u_16V_0402

0.1u_16V_0402

C102

C102

0.1u_16V_0402

0.1u_16V_0402

AJ23

AJ21

AJ20

VCC_CL_60

VCC_CL_61

VCC_CL_62

RESERVED_13

RESERVED_14

RESERVED_15

Y12

AA9

AA11

V_1P25_CORE

AJ18

AJ17

VCC_CL_63

VCC_CL_64

VCC_CL_65

RESERVED_16

RESERVED_17

RESERVED_18

U30

U31

VCC3

AJ15

AJ14

VCC_CL_66

VCC_CL_67

RESERVED_19

RESERVED_20

R29

R30

VCC_DDR

AA30

AA29

Y30

VCC_CL_68

VCC_CL_69

RESERVED_21

RESERVED_22

U12

U11

R12

Y29

V30

V29

VCC_CL_70

VCC_CL_71

VCC_CL_72

VCC_CL_73

RESERVED_25

RESERVED_23

RESERVED_24

RESERVED_26

F13

R13

AP21

L5

L5

10u_0.1A_0805

10u_0.1A_0805

L8

0.1U_0.5AL80.1U_0.5A

X_10u_10V_0805

X_10u_10V_0805

4

U29

U27

AL13

AK14

AL29

AL27

EXP_TXP0
EXP_TXN0
EXP_TXP1
EXP_TXN1

VCC_CL_74

VCC_CL_75

VCC_CL_76

VCC_CL_77

VCC_CL_78

VCC_CL_79

EXP_TXP2
EXP_TXN2
EXP_TXP3
EXP_TXN3
EXP_TXP4
EXP_TXN4
EXP_TXP5
EXP_TXN5
EXP_TXP6
EXP_TXN6
EXP_TXP7
EXP_TXN7
EXP_TXP8
EXP_TXN8
EXP_TXP9
EXP_TXN9

EXP_TXP10
EXP_TXN10
EXP_TXP11
EXP_TXN11
EXP_TXP12
EXP_TXN12
EXP_TXP13
EXP_TXN13
EXP_TXP14
EXP_TXN14
EXP_TXP15
EXP_TXN15

DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3

EXP_COMPO

EXP_COMPI

HSYNC
VSYNC

GREEN

BLUE
RED#

GREEN#

BLUE#

DDC_DATA

DDC_CLK

DREFCLKP

DREFCLKN

REFSET

CL_PWROK

CL_RST#
CL_VERF

CL_CLK

CL_DATA

ALLZTEST
XORTEST

TESTIN#

TEST2

TEST1

TEST0

RESERVED_28

RESERVED_27

Broadwater-Q

Broadwater-Q

A43

V31

BC1

AA39

BC43

T11T11

T9T9

T10T10

R85 0_0402R85 0_0402
R86 0_0402R86 0_0402

VCCA_EXP V_3P3_DAC_FILTERED

C104

C104

C103

C103

0.1u_16V_0402

0.1u_16V_0402

4

RED

SDVOB_Red+_C

D11

SDVOB_Red-_C

D12

SDVOB_Green+_C

B11

SDVOB_Green-_C

A10

SDVOB_Blue+_C

C10

SDVOB_Blue-_C

D9

SDVOB_Clk+_C

B9

SDVOB_Clk-_C

B7
D7
D6
B5
B6
B3
B4
F2
E2
F4
G4
J4
K3
L2
K1
N2
M2
P3
N4
R2
P1
U2
T2
V3
U4

V7

DMI_MTN_IRN_0

V6

DMI_MTP_IRP_1

W4

DMI_MTN_IRN_1DMI_ITN_MRN_1

Y4

DMI_MTP_IRP_2DMI_ITP_MRP_2

AC8

DMI_MTN_IRN_2

AC9

DMI_MTP_IRP_3

Y2

DMI_MTN_IRN_3

AA2

GRCOMP

AC11
AC12

HSYNC

C15

VSYNC

D15

VGA_RED

B18

VGA_GREEN

C19

VGA_BLUE

B20
C18

D19
D20

L13

MCH_DDC_CLK

M13

CK_96M_DREF

C14

CK_96M_DREF#

D13

DACREFSET

A20

AM15
AA12

CL_VREF_MCH

AM5
AD13
AD12

K20
F20
A14

T8T8

VCCA_GPLL

C98

C98

X_10u_10V_0805

X_10u_10V_0805

R88 1_0402R88 1_0402

C105

C105

.01u_0402

.01u_0402

R79 0_0402R79 0_0402

3

C439 0.1u_0402C439 0.1u_0402
C487 0.1u_0402C487 0.1u_0402 C37 2.2u_6.3VC37 2.2u_6.3V
C490 0.1u_0402C490 0.1u_0402
C491 0.1u_0402C491 0.1u_0402
C492 0.1u_0402C492 0.1u_0402
C493 0.1u_0402C493 0.1u_0402
C494 0.1u_0402C494 0.1u_0402
C495 0.1u_0402C495 0.1u_0402

DMI_MTP_IRP_0 10
DMI_MTN_IRN_0 10
DMI_MTP_IRP_1 10
DMI_MTN_IRN_1 10
DMI_MTP_IRP_2 10
DMI_MTN_IRN_2 10
DMI_MTP_IRP_3 10
DMI_MTN_IRN_3 10

R72 24.9_1%_0402R72 24.9_1%_0402

R78 1.3K_1%_0402R78 1.3K_1%_0402

V_1P25_CORE

HSYNC 27
VSYNC 27

VGA_RED 27
VGA_GREEN 27
VGA_BLUE 27

MCH_DDC_DATA 27
MCH_DDC_CLK 27

CK_96M_DREF 15
CK_96M_DREF# 15

MCH_CLPWROK 11,25

CL_RST 11
CL_N_CLK 11

CL_N_DATA 11

SDVOB_Red+ 28
SDVOB_Red- 28
SDVOB_Green+ 28
SDVOB_Green- 28
SDVOB_Blue+ 28
SDVOB_Blue- 28
SDVOB_Clk+ 28
SDVOB_Clk- 28

Reserved for Non-Graphic

EXP_EN EXP_SLR XOR Chain 14SDVO_CTRLDATA

010

011

100

1 01

110

111

C99

C99

0.1u_16V_0402

0.1u_16V_0402

3

CK_96M_DREF
CK_96M_DREF#

2

VCC3

R74

R74
X_10K_0402

X_10K_0402

R77

R77
X_0_0402

X_0_0402

EXP_RXP[15:0]
EXP_RXN[15:0]
EXP_TXP[15:0]
EXP_TXN[15:0]
EXP_RXP[15:0]
EXP_RXN[15:0]
EXP_TXP[15:0]
EXP_TXN[15:0]
EXP_RXP[15:8]
EXP_RXN[15:8]
EXP_TXP[15:8]
EXP_TXN[15:8]

EXP_RXP[7:0]
EXP_RXN[7:0]
EXP_TXP[7:0]
EXP_TXN[7:0]

EXP_RXP[15:0]
EXP_RXN[15:0]
EXP_TXP[15:0]
EXP_TXN[15:0]
EXP_RXP[15:0]
EXP_RXN[15:0]
EXP_TXP[15:0]
EXP_TXN[15:0]

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Date:

Date:

2

CL_VREF_MCH = 0.352V

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

Tuesday, March 27, 2007

Tuesday, March 27, 2007

Tuesday, March 27, 2007

1

Place close to GMCH

VCC_DDR

C35 2.2u_6.3VC35 2.2u_6.3V
C36 X_2.2u_6.3VC36 X_2.2u_6.3V

C38 2.2u_6.3VC38 2.2u_6.3V
C39 2.2u_6.3VC39 2.2u_6.3V
C41 2.2u_6.3VC41 2.2u_6.3V

MCH MEMORY DECOUPLING

V_1P25_CORE

C46 X_10u_10V_0805C46 X_10u_10V_0805
C49 0.1u_16V_0402C49 0.1u_16V_0402
C52 X_10u_10V_0805C52 X_10u_10V_0805
C55 10u_10V_0805C55 10u_10V_0805
C58 X_10u_10V_0805C58 X_10u_10V_0805
C61 10u_10V_0805C61 10u_10V_0805
C64 X_10u_10V_0805C64 X_10u_10V_0805
C66 0.1u_16V_0402C66 0.1u_16V_0402
C67 X_10u_10V_0805C67 X_10u_10V_0805
C68 10u_10V_0805C68 10u_10V_0805
C69 X_10u_10V_0805C69 X_10u_10V_0805
C70 10u_10V_0805C70 10u_10V_0805
C71 X_10u_10V_0805C71 X_10u_10V_0805
C72 X_10u_10V_0805C72 X_10u_10V_0805
C73 0.1u_16V_0402C73 0.1u_16V_0402
C74 0.1u_16V_0402C74 0.1u_16V_0402
C75 0.1u_16V_0402C75 0.1u_16V_0402
C76 0.1u_16V_0402C76 0.1u_16V_0402
C77 0.1u_16V_0402C77 0.1u_16V_0402

V_1P25_CL_MCH

C78 X_10u_10V_0805C78 X_10u_10V_0805
C79 X_10u_10V_0805C79 X_10u_10V_0805
C80 0.1u_16V_0402C80 0.1u_16V_0402
C81 0.1u_16V_0402C81 0.1u_16V_0402
C82 0.1u_16V_0402C82 0.1u_16V_0402
C83 0.1u_16V_0402C83 0.1u_16V_0402
C84 0.1u_16V_0402C84 0.1u_16V_0402
C85 0.1u_16V_0402C85 0.1u_16V_0402
C88 0.1u_16V_0402C88 0.1u_16V_0402

MCH CORE DECOUPLING

V_1P25_CL_MCH

R84

R84
1K_0402

1K_0402

CL_VREF_MCH

R87

R87

C100

C100

392_1%_0402

392_1%_0402

0.1u_16V_0402

0.1u_16V_0402

MS-7403

MS-7403

MS-7403

Broadwater - PCI Express

Broadwater - PCI Express

Broadwater - PCI Express

Sheet of

Sheet of

Sheet of

1

0A

0A

0A

836

836

836

8

V_1P25_CORE

AA17

AA15

U2D

U2D

BC37

D D

C C

B B

BC32
BC28
BC24
BC10

BC5
BB7

AY41

AY4
AW43
AW41

AW1
AV37
AV35
AV27
AV23
AV21
AV17
AV11

AV9

AV7
AU42
AU38
AU32
AU24
AU20

AU6

AU2

AT31
AT29
AT15
AT13

AT12
AR38
AR33
AR32
AR27
AR26
AR23
AR21
AR20
AR17

AR9

AR6
AP43
AP24
AP18

AP1
AN38
AN31
AN29
AN24
AN23
AN20
AN15
AN13
AN12
AN11

AN4
AM42
AM40
AM36
AM33
AM29
AM24
AM23
AM20
AM11

AM9
AM7
AM4
AM2

AM1
AL36
AL33

AK43

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76

AA14

VCC_123

VCC_124

VCC_125

Y27

Y26

VCC_126

Y18

Y17

VCC_127

VCC_128

Y15

Y14

VCC_129

VCC_130

7

W27

W26

VCC_131

VCC_132

W25

W23

VCC_133

VCC_134

W21

W19

VCC_135

VCC_136

W18

W17

VCC_137

VCC_138

V27

V26

VCC_139

VCC_140

V25

V24

VCC_141

VCC_142

V23

V22

VCC_143

VCC_144

V21

V20

VCC_145

VCC_146

V19

V18

VCC_147

VCC_148

6

V17

V15

VCC_149

VCC_150

V14

U26

VCC_151

VCC_152

U25

U24

VCC_153

VCC_154

U23

U22

VCC_155

VCC_156

U21

U20

VCC_157

VCC_158

U19

U18

VCC_159

VCC_160

U17

U15

VCC_161

VCC_162

U14

R20

VCC_163

VCC_164

R18

R17

VCC_165

VCC_166

R15

R14

VCC_167

VCC_168

5

P15

P14

VCC_169

VCC_170

AG24

AG23

VCC_171

VCC_172

AG22

VCC_173

VCC_174

4

M20

L15

L18

M18

F17

L17

N17

N18

N15

RESERVED_29

RESERVED_30

RESERVED_31

K17

N20

BC42

BC2

BB43

BB1

B43

B42

NC_1

NC_2

NC_3

NC_4

NC_5

NC_6

RESERVED_33

RESERVED_34

RESERVED_35

RESERVED_36

RESERVED_37

RESERVED_32

RESERVED_38

NC_7

A42

NC_8B2NC_9

M11

L12

VSS

VCC

A41

VSS_293A3VSS_292A5VSS_291

3

C43

VSS_290C1VSS_289

R21

VSS_288E1VSS_287

W20

VSS_286

W22

W24

VSS_285

VSS_284

AA18

VSS_283

AC18

VSS_282

AE18

VSS_281

2

M42

VSS_270

M35

VSS_269

M37

VSS_268

VSS_267

VSS_266N5VSS_265N7VSS_264

N10

VSS_263
VSS_262
VSS_261
VSS_260
VSS_259
VSS_258
VSS_257
VSS_256
VSS_255
VSS_254
VSS_253
VSS_252
VSS_251
VSS_250
VSS_249
VSS_248
VSS_247
VSS_246
VSS_245
VSS_244
VSS_243
VSS_242
VSS_241
VSS_240
VSS_239
VSS_238
VSS_237
VSS_236
VSS_235
VSS_234
VSS_233
VSS_232
VSS_231
VSS_230
VSS_229
VSS_228
VSS_227
VSS_226
VSS_225
VSS_224
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199
VSS_198
VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189
VSS_188

N13
N21
N27
N31
N33
N36
P2
P17
P18
P21
P30
P43
R3
R5
R8
R11
R31
R33
R36
T1
T42
U5
U7
U8
U35
U38
V2
V5
V8
V11
V32
V34
V37
V39
V43
W3
Y1
Y5
Y7
Y10
Y19
Y21
Y23
Y25
Y33
Y35
Y37
Y42
AA5
AA8
AA20
AA22
AA24
AA35
AA38
AB1
AB2
AB19
AB21
AB23
AB25
AB43
AC5
AC7
AC10
AC20
AC22
AC24
AC35
AC38
AD19
AD21
AD23
AD25
AD33
AD35

AE20

AE22

AE24

AF19

AF21

AF23

AY40

BA1

BC3

BC41

M33

VSS_280

VSS_279

VSS_278

VSS_277

VSS_276

VSS_275

VSS_274

VSS_273

VSS_272

VSS_271

1

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

VSS_85

VSS_86

VSS_87

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92

VSS_93

VSS_94

VSS_95

VSS_96M7VSS_97M1VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105L7VSS_106L5VSS_107L3VSS_108

VSS_109

VSS_110

VSS_111

VSS_112

VSS_113

VSS_114K2VSS_115

VSS_116

VSS_117

VSS_118

VSS_119

VSS_120J9VSS_121J7VSS_122J5VSS_123

VSS_124

VSS_125

VSS_126

VSS_127

VSS_128

VSS_129

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

VSS_136

VSS_137G9VSS_138G7VSS_139G1VSS_140

VSS_141

VSS_142

VSS_143

VSS_144

VSS_145F3VSS_146

VSS_147

VSS_148

VSS_149

VSS_150

VSS_151

VSS_152

VSS_153

VSS_154E9VSS_155E3VSS_156

VSS_157

VSS_158

VSS_159

VSS_160D3VSS_161

VSS_162

VSS_163C6VSS_164C5VSS_165C4VSS_166

VSS_167

VSS_168

VSS_169

VSS_170

VSS_171

VSS_172

VSS_173

VSS_174

VSS_175

VSS_176

VSS_177

VSS_178

VSS_179

VSS_180A7VSS_181

VSS_182

VSS_183

VSS_184

VSS_185

VSS_186

VSS_187

Broadwater-Q

J38

J35

J32

J27

L33

L32

L31

L29

L21

L20

L11

K43

K26

K21

K18

K13

AF9

AF8

AF7

AF6

M27

M21

M17

M15

AJ39

AJ36

AJ33

AF43

AF37

AF36

AH42

A A

8

AF10

AG37

AG34

7

M10

6

K12

J21

H31

H29

H21

H20

H17

H15

H13

G42

G38

G32

G21

G13

5

G12

G11

F37

F35

F27

F21

F18

E43

E32

E24

E21

E20

E15

E13

E11

D40

D31

D21

D17

4

C26

C11

B37

B32

B31

B26

B23

B22

B19

B14

B10

A39

A34

A26

A18

A12

AF5

AF3

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Tuesday, March 27, 2007

Date:

Tuesday, March 27, 2007

Date:

3

Tuesday, March 27, 2007

2

AF2

AF1

AD42

AD39

AD37

Broadwater - GND

Broadwater - GND

Broadwater - GND

Broadwater-Q

MS-7403

MS-7403

MS-7403

Sheet of

Sheet of

Sheet of

936

936

936

1

0A

0A

0A

8

ICH8 H/W STRAPS

SIGNAL

SPKR
GNT3

INTVRMEN/
LAN100_SLP

D D

SATALED

HDA_SDOUT

HDA_SYNC

GNT2

ACSDOUT11

ACSYNC11

C C

H
DIS
DIS

EN

NORM

DFX/
PCIE

SET
BIT

N/A PCIE PORT CONFIG 2

PGNT#2
PGNT#1
PGNT#3

ACSDOUT
ACSYNC

SPKR11,21

VCC3

L
EN
EN

DIS

REVERSE

N/A

N/A

SET
BIT

R90 X_1K_0402R90 X_1K_0402
R152 X_1K_0402R152 X_1K_0402
R91 X_1K_0402R91 X_1K_0402

R92 X_1K_0402R92 X_1K_0402
R93 X_1K_0402R93 X_1K_0402

R94 X_1K_0402R94 X_1K_0402

RN7

RN7

12
34
56
78

10_0402-8P4R

10_0402-8P4R

REBOOT
A16 OVERIDE

INT VRM
(VccSus1_05,1_5,VccCL1_5)
(VccLAN1_05,VccCL1_05)

PCIE 0-3 ORDER
XOR MODE/PCIE PORT

CONFIG BIT 1
PCIE PORT CONFIG

BIT 0 (1-4)

BIT 0 (5-6)

SIO_SMI#
GPIO_21
SERIRQ
GPIO_39

BOOT SELECT STRAPS

BOOT DEVICE GNT0 SPI_CS1#

FWH 1 1
SPI 0 X
PCI 1 0

VCC3_SB

H2X5(10)_black-RH

H2X5(10)_black-RH

PGNT#0

SPI_CS1#

JSPI1

JSPI1

1 2
3 4
5
7 8
9

SPI_MOSI_F

6

R95 1K_0402R95 1K_0402

R97 X_1K_0402R97 X_1K_0402

B B

SPI DEBUG PROT

Place close to SPI ROM

A A

SPI_MISO_F
SPI_CS0_F# SPI_CLK_F

SPI_HOLD#

Part Number : N31-2051451-H06

8

DES.

7

VCC3_SB

VCC3

SIO_SMI# 11
GPIO_21 11
SERIRQ 16
GPIO_39 11

7

PCI PULL-UP / DOWN RESISTORS

PREQ#3
PREQ#0
PREQ#1
PREQ#2

PIRQ#D
PIRQ#C
PIRQ#A
PIRQ#B
PIRQ#H
PIRQ#F
PIRQ#G
PIRQ#E

DEVSEL#
TRDY#
FRAME#
IRDY#
SERR#
LOCK#
PERR#
STOP#

SPI FLASH ROM

Place close to SB.

SPI_MISO

R105 15_0402R105 15_0402

SPI_WP#11

From South-Bridge GPIO32

V_3P3_CL

R107 2.2K_0402R107 2.2K_0402

6

6

8.2K-10P8R

8.2K-10P8R

V_3P3_CL

SPI_CS0_F#
SPI_MISO_F

VCC3

12
34
56
78

RN39

RN39

4.7K_0402-8P4R

4.7K_0402-8P4R

VCC5

RN41

RN41

1

5

1

5

2

2

3

3

4

4

6

6

7

7

8

8

9

10

9

10

2.7K-10P8R

2.7K-10P8R

VCC3

RN40

RN40

1

5

1

5

2

2

3

3

4

4

6

6

7

7

8

8

9

10

9

10

Kaofang suggestion

SPI_MOSI_F
SPI_CS0_F#

SPI_CLK_F

1
2
3
4

SPI-MX25L1605AM2C

SPI-MX25L1605AM2C

R96

R96

1K_0402

1K_0402

SERIRQ16

R99 15_0402R99 15_0402
R100 15_0402R100 15_0402

R101 15_0402R101 15_0402

RN8

RN8

10_0402-8P4R

10_0402-8P4R

U4

U4

CE#

VDD

SO

HOLD#

WP#

SCK

VSS

SI

12
34
56
78

TP5TP5

TP6TP6

V_3P3_CL

8
7
6
5

5

1

1

SPI_MOSI
SPI_MISO
SPI_CS0#
SPI_CLK
SPI_CS1#

SPI_MISO
SPI_CS0#
SPI_MOSI

SPI_HOLD#
SPI_CLK_FSPI_WP#
SPI_MOSI_F

5

DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#

LOCK#
SERR#
PERR#

PREQ#0
PREQ#1
PREQ#2
PREQ#3

PGNT#0
PGNT#1
PGNT#2
PGNT#3

PIRQ#A
PIRQ#B
PIRQ#C
PIRQ#D
PIRQ#E
PIRQ#F
PIRQ#G
PIRQ#H

SERIRQ

E18
A16
A14
A17
B13
F18
E17
C17
A13
C14
E14
C13
E15
F16
A11
D10
C11
E13
E12
D13
F14
E11

D8
D7
C7

F13

B7

C6

B5

F12

F8
E7

G16
A10
C12
A12

B12
E16

B6
A7

D15

D9

D11

E6
C9
D3

B10

E3

E8

C16
B16

A9

A4

C15
D17

B9

C4
C5

A3

A8
D5

F10
G11

F9

AG9

D21
B19
C21
A19
A18

C121

C121

0.1u_16V_0402

0.1u_16V_0402

U3A

U3A

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE0#
C/BE1#
C/BE2#
C/BE3#

DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#

PCICLK
PCIRST#

REQ0#
REQ1#/GPIO50
REQ2#/GPIO52
REQ3#/GPIO54

GNT0#
GNT1#/GPIO51
GNT2#/GPIO53
GNT3#/GPIO55

PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

SERIRQ

SPI_MOSI
SPI_MISO
SPI_CS0#
SPI_CLK
SPI_CS1#

VSS_005

VSS_004

VSS_003

VSS_002

VSS_001

B8

B2

A5

A28

A24

R104

R104

2.2K_0402

2.2K_0402

R106 X_0_0402R106 X_0_0402

Reserved for BIOS control used

4

PCI INTERFACE INTERRUPT

PCI INTERFACE INTERRUPT

ICH 8

ICH 8

PART 1/3

PART 1/3

SPI

SPI

VSS_014

VSS_013

VSS_012

VSS_011

VSS_010

VSS_009

VSS_008

VSS_007

VSS_006

D2

B24

B20

B17

B14

B11

C28

C27

C22

SPI_HOLD_GPO# 11

From South-Bridge GPIO33

4

VSS_016

VSS_015

D6

D4

VSS_018

VSS_017

D16

D12

VSS_020

VSS_019

D22

D19

VSS_022

VSS_021

D26

D25

VSS_024

VSS_023

E9

E21

PCI EXPRESS

PCI EXPRESS

DIRECT MEDIA

DIRECT MEDIA

LAN

LAN

VSS_031

VSS_030

VSS_029

VSS_028

VSS_027

VSS_026

VSS_025

F7

F2

F24

F22

F15

E28

E27

E24

3

CPU

CPU

PERN_6/GLAN_RXN
PERP_6/GLAN_RXP

PETN_6/GLAN_TXN
PETP_6/GLAN_TXP

LAN_RSTSYNC

VSS_032

VSS_033

VSS_036

VSS_035

VSS_034

G6

G4

G1

F25

F26

3

A20M#

CPUSLP#

FERR#

IGNNE#

INIT3_3V#

STPCLK#

RCIN#

A20GATE

THRMTRIP#

PLTRST#

PERN_1
PERP_1
PETN_1
PETP_1

PERN_2
PERP_2
PETN_2
PETP_2

PERN_3
PERP_3
PETN_3
PETP_3

PERN_4
PERP_4
PETN_4
PETP_4

PERN_5
PERP_5
PETN_5
PETP_5

DMI_0RXN
DMI_0RXP
DMI_0TXN
DMI_0TXP

DMI_1RXN
DMI_1RXP
DMI_1TXN
DMI_1TXP

DMI_2RXN
DMI_2RXP
DMI_2TXN
DMI_2TXP

DMI_3RXN
DMI_3RXP
DMI_3TXN
DMI_3TXP

DMI_CLKN
DMI_CLKP

DMICOMPI

DMI_IRCOMP

GLAN_CLK

LAN_RST#
LAN_RXD0
LAN_RXD1
LAN_RXD2

LAN_TXD0

LAN_TXD1

LAN_TXD2

VSS_040

VSS_039

VSS_038

VSS_037

ICH8-82801HO

ICH8-82801HO

G18

G13

G10

INIT#
INTR

NMI

SMI#

PECI

AD23
AC24
AB22
AC22
AB19
AC12
AH28
AC23
AB20
AB23
AF10
AG10
AG28

AF26

AF23
N25

N26
M28
M27

L25
L26
K28
K27

J26
J25
H28
H27

G26
G25
F28
F27

E26
E25
D28
D27

C26
C25
B28
B27

U26
U25
T28
T27

W26
W25
V28
V27

AA25
AA24
Y28
Y27

AC26
AC25
AB28
AB27

R25
R24

AD27
AD28

E22
E20
AF17
E19
C19
D20

C20
C18
D18

ICH8_PECI

PLTRST_L

PE_TXN1_C
PE_TXP1_C

Stuff for NINEVEH
Empty for EKRON

GLAN_TXN_C
GLAN_TXP_C

DMI_BIAS

<200mils

ELAN_CLK

ELAN_SYNC

LAN_PWROK

ELAN_RXD0
ELAN_RXD1
ELAN_RXD2

ELAN_TXD0
ELAN_TXD1
ELAN_TXD2

LAN_PWROK

1u_16V_0402

1u_16V_0402

MSI

MSI

MSI

2

H_A20M# 3
H_FERR# 3,4

H_IGNNE# 3
H_INIT# 3

H_INTR 3
H_NMI 3
ICH_H_SMI# 3
H_STPCLK# 3
KBRST# 11,16
A20GATE 11,16
TRMTRIP# 3,4

ICH8_PECI 3,16

R89 33_0402R89 33_0402

C108 0.1u_16V_0402C108 0.1u_16V_0402
C109 0.1u_16V_0402C109 0.1u_16V_0402

C114 0.1u_16V_0402C114 0.1u_16V_0402
C115 0.1u_16V_0402C115 0.1u_16V_0402

C23

C23

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Date:

Date:

2

PLTRST#

PE_RXN1
PE_RXP1

GLAN_RXN
GLAN_RXP

DMI_MTN_IRN_0 8
DMI_MTP_IRP_0 8
DMI_ITN_MRN_0 8
DMI_ITP_MRP_0 8

DMI_MTN_IRN_1 8
DMI_MTP_IRP_1 8
DMI_ITN_MRN_1 8
DMI_ITP_MRP_1 8

DMI_MTN_IRN_2 8
DMI_MTP_IRP_2 8
DMI_ITN_MRN_2 8
DMI_ITP_MRP_2 8

DMI_MTN_IRN_3 8
DMI_MTP_IRP_3 8
DMI_ITN_MRN_3 8
DMI_ITP_MRP_3 8

CK_PE_100M_ICH# 15
CK_PE_100M_ICH 15

R98 24.9_1%_0402R98 24.9_1%_0402

ELAN_CLK 19
ELAN_SYNC 19

ELAN_RXD0 19
ELAN_RXD1 19
ELAN_RXD2 19

ELAN_TXD0 19
ELAN_TXD1 19
ELAN_TXD2 19

R102 10K_0402R102 10K_0402

R103 X_0_0402R103 X_0_0402

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

ICH8 - PCI, DMI, CPU, SPI

ICH8 - PCI, DMI, CPU, SPI

Tuesday, March 27, 2007

Tuesday, March 27, 2007

Tuesday, March 27, 2007

ICH8 - PCI, DMI, CPU, SPI

PLTRST# 6,24
PE_RXN1 22

PE_RXP1 22
PE_TXN1 22
PE_TXP1 22

GLAN_RXN 19
GLAN_RXP 19
GLAN_TXN 19
GLAN_TXP 19

V_1P5_ICH

RSMRST#

MS-7403

MS-7403

MS-7403

OK

V_3P3_CL

RSMRST# 11,24

Sheet of

Sheet of

Sheet of

1

1

10 36

10 36

10 36

0A

0A

0A