5
4
3
2
1
Cover Sheet, Block diagram
Intel LGA775 CPU - Signals
D D
Intel LGA775 CPU - Power
Intel LGA775 CPU- GND
Intel Broadwater - CPU signal
Intel Broadwater - Memory
Intel Broadwater - PCI Express
Intel Broadwater - GND
DDRII DIMM1,2
DDRII DIMM 3 , 4
C C
DDR Termination
PCI - Express x16 & x1 port
VGA Connector
ICH8(DO)(R)
Clock Generator-CY505YC64CT
PCI1EXTENT/PCI2
1-2
3
4
5
6
7
8
9
10
11
12
13
14
15~17
18
19
Version 0D
MSI:MS-7245
NEC:(Babel)(MT3H)
System Chipset:
Intel Broadwater - GMCH (North Bridge)
Intel ICH8(DO)(R) (South Bridge)
On Board Chipset:
BIOS -- SPI Flash 8Mb or 16Mb
HD AUDIO -- ALC262
LPC Super I/O -- SMSC--SHC5017
LAN -- Intel Neneveh 82566 DM/DC
IDE-- VIA VT-6410
CLOCK -- CY505YC64CT
Main Memory:
2 CHANNEL DDR II * 4 (Max 8GB)
USB Connectors/SATA
VIA VT6410 RAID IDE
B B
LAN - Nineveh 82566
AUDIO-ALC262 23
LPC I/O - SMSC SHC5017
LPT/COM/KB/MS
FAN Controller & TPM1.2
MS7 ACPI Controller
DIMM/GMCH/AMT POWER
A A
VRD 11 - Intersil HIP 6326 4 phases
ATX Connector front panel
GPIO & JUMPER SETTING
POWER/PWROK/RESET MAP
5
/Manual Parts
4
20
21
22
24
25
26
27
28
29
30
31
32~35
Expansion Slots:
PCIE x16 SLOT * 1
PCIE x1 SLOT * 1
PCI SLOT * 1
PCI(Extender)SLOT * 1
Intersil PWM:
Controller:
3
INTERSIL 6326 4 PHASES
2
Title
Size Document Number Rev
Date: Sheet
MICRO-START INT'L CO.,LTD.
COVER SHEET
MS-7245
1
135Friday, June 02, 2006
0D
of
5
4
3
2
1
Block Diagram
D D
VRM 11
Intersil 6326
Intel LGA775 Processor
4-Phase PWM
533/800/1066 MHz
PCI EXPRESS
PCI EXPRESS X16
X16
Connector
Analog
C C
Video
Out
RGB
SATA
Broadwater
GMCH
FSB
4 DDR II
DIMM
DDRII
533/667/800 MHz
DMI
CL
PCI
Modules
VT6410
RAID IDE
(Extender)
PCI Slot 1
IDE
PCI Slot 2
SATA 0~3
USB
USB Port 0~9
ICH8(DO)
PCI EXPRESS
PCI EXPRESS X1
(ExtenderX3)
B B
ALC 262
Audio Codec
HD AUDIO LINK
LPC Bus
LPC Bus
TPM 1.2
GLCI/LCI
GIGA PHY
Intel Nineveh
SPI
LPC SIO
SMSC
SHC5017
Keyboard
Floopy
SerialParallel
SPI FLASH
Mouse
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
BLOCK DIAGRAM
MS-7245 0D
1
of
235Friday, June 02, 2006
5
4
3
2
1
AN5
AN4
AN3
AN6
VSS_SENSE
VCC_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D13#
D12#D8D11#
D10#
D9#
B12
B10
A11
C11
H_D#9
H_D#11
H_D#13
H_D#12
H_D#10
R352 X_1KR1%0402
R393 0R0402
12
C408
R394 0R0402
X_C22U16Y1210-RH
VID7
VID6
VID3
VID4
VID5
AM5
AL4
AK4
AL6
AM7
AJ3
AK3
VID6#
VID5#
VID4#
RSVD
VID_SELECT
ITP_CLK1
ITP_CLK0
GTLREF_SEL
CS_GTLREF
FORCEPH
LINT1/NMI
D8#
A10
H_D#7
H_D#8
LINT0/INTR
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B4
H_D#0
H_D#3
H_D#6
H_D#4
H_D#2
H_D#5
H_D#1
VID3#
GTLREF0
GTLREF1
TESTHI12
TESTHI11
TESTHI10
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
CPU SIGNAL BLOCK
H_A#[3..35]6
D D
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
U16A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_D#53
H_DBI#[0..3]6
H_IERR#4
H_FERR#4,15
H_STPCLK#15
H_INIT#15
H_DBSY#6
H_DRDY#6
H_TRDY#6
H_ADS#6
H_LOCK#6
H_BNR#6
H_HIT#6
H_D#[0..63]6
H_HITM#6
H_BPRI#6
H_DEFER#6
TRMTRIP#4,15
H_PROCHOT#4,29
H_IGNNE#15
ICH_H_SMI#15
H_A20M#15
R590
51R0402
R344 X_62R0402
H_FSBSEL04,8,18
H_FSBSEL14,8,18
H_FSBSEL24,8,18
H_PWRGD4,16
H_CPURST#4,6
C C
VTT_OUT_RIGHT
B B
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
R339 0-0603
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
CPU_TMPA_A
VTIN_GND_C
H_SLP#
H_TEST_C9VTT_OUT_LEFT
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
D53#
D52#
C14
H_D#52
D51#
A14
C15
H_D#51
H_D#50
D50#
D49#
D17
H_D#49
H_A#35
H_A#34
AJ6
AJ5
A35#
D48#
D20
G22
H_D#47
H_D#48
H_A#33
AH5
A34#
A33#
D47#
D46#
D22
H_D#46
H_A#32
H_A#31
AH4
AG5
A32#
D45#
E22
G21
H_D#45
H_D#44
H_A#30
AG4
A31#
A30#
D44#
D43#
F21
H_D#43
H_A#28
H_A#29
AG6
AF4
A29#
D42#
F20
E21
H_D#41
H_D#42
H_A#27
AF5
A28#
A27#
D41#
D40#
E19
H_D#40
H_A#25
H_A#26
AB4
AC5
A26#
D39#
F18
E18
H_D#39
H_D#38
H_A#24
AB5
A25#
A24#
D38#
D37#
F17
H_D#37
H_A#22
H_A#23
AA5
AD6
A23#
D36#
G17
G18
H_D#35
H_D#36
H_A#21
AA4
A22#
A21#
D35#
D34#
E16
H_D#34
H_A#19
H_A#18
H_A#20
A20#Y4A19#Y6A18#W6A17#
D33#
D32#
D31#
E15
G16
G15
H_D#33
H_D#31
H_D#32
H_A#17
AB6
F15
H_D#30
H_A#13
H_A#16
H_A#12
H_A#14
H_A#15
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D30#
D29#
D28#
D27#
D26#
D25#
F14
E13
D13
G14
G13
H_D#28
H_D#27
H_D#29
H_D#25
H_D#26
H_A#10
H_A#8
H_A#9
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D24#
D23#
D22#
F12
F11
E10
D10
H_D#23
H_D#22
H_D#21
H_D#24 H_A#11
H_A#3
H_A#6
H_A#4
H_A#5
H_A#7
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
H_D#17
H_D#19
H_D#18
H_D#20
H_D#16
L5
AC2
D11
C12
H_D#15
H_D#14
DBR#
D14#
FP_RST# 16,30
VID[0..7] 29
VID0
VID1
VID2
AM3
AL5
AM2
VID2#
VID1#
VID0#
AN7
H1
H2
H29
E24
AG3
BPM5#
AF2
BPM4#
AG2
BPM3#
AD2
BPM2#
AJ1
BPM1#
AJ2
BPM0#
G5
PCREQ#
J6
REQ4#
K6
REQ3#
M6
REQ2#
J5
REQ1#
K4
REQ0#
W2
P1
H5
G4
TESTHI9
G3
TESTHI8
F24
TESTHI7
G24
TESTHI6
G26
TESTHI5
G27
TESTHI4
G25
TESTHI3
F25
TESTHI2
W3
TESTHI1
F26
TESTHI0
AK6
G6
RSVD
G28
BCLK1#
F28
BCLK0#
A3
RS2#
F5
RS1#
B3
RS0#
U3
AP1#
U2
AP0#
F3
BR0#
T2
COMP5
J2
COMP4
R1
COMP3
G2
COMP2
T1
COMP1
A13
COMP0
J17
DP3#
H16
DP2#
H15
DP1#
J16
DP0#
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
ZIF-SOCK775-15u-in
VCC_VRM_SENSE 29
VSS_VRM_SENSE 29
VTT_OUT_RIGHT
R362
1KR0402-1
CPU_GTLREF1
TP_GTLREF_SEL
MCH_GTLREF_CPU
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
PECI
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_RS#2
H_RS#1
H_RS#0
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6
TP23
TP25
TP18
TP16
TP20
TP19
R596 X_0R0402
R595 X_0R0402
R592 X_0R0402
R593 X_0R0402
R220 51R0402
R338 51R0402
R221 51R0402
R395 X_62R0402
R334 X_62R0402
R335 49.9/4/1
R323 49.9/4/1
R333 49.9/4/1
R311 49.9/4/1
R340 49.9/4/1
R238 49.9/4/1
MCH_GTLREF_CPU 6
PECI 15
H_REQ#[0..4] 6
H_TESTHI12 5
CK_H_CPU# 18
CK_H_CPU 18
H_RS#[0..2] 6
H_ADSTB#1 6
H_ADSTB#0 6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 15
H_INTR 15
VRD_VIDSEL 29
CPU_GTLREF0 4
CPU_GTLREF1 4
TP12
H_TESTHI8
H_TESTHI9
H_TEST_C9
H_SLP#
H_TESTHI10
H_TESTHI9
VTT_OUT_LEFT
TP_CPU_G1 5
RN29 8P4R-51R0402
1
3
5
7
R313 51R0402
R312 51R0402
V_FSB_VTT
VTT_OUT_RIGHT 4,5
H_FORCE# 29
C348
X_C0.1U16Y0402
2
4
6
8
H_BR#0 4,6
VTT_OUT_LEFT 4,5
VTT_OUT_LEFT
VTT_OUT_RIGHT
C380 C0.1U16Y0402
C372 C0.1U16Y0402
VID7
VID3
VID6
VID1
VID2
VID5
VID0
VID4
BSEL
1
2
0
0
0
1
0
0
CPU_TMPA_A
VTIN_GND_C
CPU_TMPA_A
VTIN_GND_C
RN33 8P4R-51R0402
1
2
3
4
5
6
7
8
R364 51R0402
R368 51R0402
R369 62R0402
R356 62R0402
R361 X_62R0402
R372 62R0402
R366 62R0402
PLACE BPM TERMINATION NEAR CPU
RN32
8P4R-680R-LF
1
3
5
7
RN35
8P4R-680R-LF
1
3
5
7
2
4
6
8
2
4
6
8
VTT_OUT_RIGHT
TABLE
FSB FREQUENCY
0
267 MHZ (1067)
0
0
200 MHZ (800)
133 MHZ (533)
1
R75 0R0402
R78 0R0402
R76 X_0R0402
R79 X_0R0402
H_BPM#2
H_BPM#3
H_BPM#0
H_BPM#1
H_BPM#4
H_BPM#5
H_TDI
H_TMS
H_TDO
H_TRST#
H_TCK
CPU_TMPA_SST 16
VTIN_GND_SST 16
CPU_TMPA 24
VTIN_GND 24
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
INTEL LGA775 CPU SIGNAL
MS-7245 0D
1
of
335Friday, June 02, 2006
5
P
4
3
2
1
VCCP
VTT_SEL = H
V_FSB_VTT=1.1V
V_FSB_VTT=1.2V For normal processors.VTT_SEL = L
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
AF19
AF18
AF15
AF14
AF12
AF11
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AE9
AD8
AC8
AB8
AA8
VCCP
U16B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y30
Y23
Y24
Y25
Y26
Y27
Y28
Y29
W30
W29
W28
W27
W26
W25
W24
W23
U26
U27
U28
U29
U30
VCCP
D D
C C
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
VSSA
VCCPLL
VCC-IOPLL
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
RSVD
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCN8VCCP8VCCR8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCT8VCC
VCC
VCC
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
T30
U23
U24
U25
N30
N23
N24
N25
N26
N27
N28
N29
M24
M25
M26
M27
M28
M29
M30
K27
K28
K29
K30
M23
T23
T24
T25
T26
T27
T28
T29
J30
K23
K24
K25
K26
AN9
AN8
AN30
AN29
AN26
HS11HS22HS33HS4
AN25
A23
B23
D23
C23
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
AM6
AA1
J1
F27
F29
ZIF-SOCK775-15u-in
4
H_VCCA
H_VSSA
H_VCCPLL
H_VCCIOPLL
VTT_PWG
VTT_OUT_RIGHT
VTT_OUT_LEFT
V_FSB_VTT
LGA775 pin AM6 is
VTT_PWRGD, But for Conroe, AM6 is a reserved pin.(VTT_
VTT_SEL 27
Reserved for KENTSFIELD Processor.
(FSB1333, Quad-Core, Low Power)
For future KENTSFIELD processor.
(FSB1333, Quad-Core)
V_FSB_VTT
C237 C10U10Y0805
C235 C10U10Y0805
C236 C10U10Y0805
CAPS FOR FSB GENERIC
VTT_OUT_LEFT
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
B B
VTT_OUT_LEFT
R321 124R1%0402-LF
R330 124R1%0402-LF
CPU_GTLR0
R325
210R1%0402
CPU_GTLR1
R329
210R1%0402
R322 10R0402-LF
C351
C1U10X
R316 10R0402-LF
C352
C1U10X
C344
C220P16X0402
C345
C220P16X0402
CPU_GTLREF0 3
CPU_GTLREF1 3
V_FSB_VTT
10uH/8/125mA/Rdc=0.7
V_FSB_VTT
PLACE AT CPU END OF ROUTE
TRMTRIP#
H_FERR#
H_PROCHOT#
H_IERR#
H_PWRGD
H_BR#0
H_CPURST#
H_PROCHOT# 3,29
H_IERR# 3
H_PWRGD 3,16VTT_OUT_LEFT3,5
H_BR#0 3,6
H_CPURST# 3,6
TRMTRIP# 3,15
H_FERR# 3,15
4
VTT_OUT_RIGHT3,5
A A
VTT_OUT_RIGHT
VTT_OUT_LEFT
5
V_FSB_VTT
R328 62R0402
R294 62R0402
R375 X_130R1%0402-LF
R347 62R0402
R331 100R0402-1
R317 62R0402
R359 62R0402
PLACE AT ICH END OF ROUTE
H_PROCHOT#
V_1P5_ICH
R383
10KR0402-1
R379
X_0R0402
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
L4
R212
0R0805
L5 10uH/8/125mA/Rdc=0.7
C229
C22U10X50805
C233
C0.1U16Y0402
THERM# 16
CP7 X_COPPER
1 2
VCC3 VCC3
R370
10KR0402-1
Q47
N-MMBT3904LT1_SOT23
10KR0402-1
3
C230
X_C1U10X
H_VCCPLL
C234
C10U10Y0805
R380
Q44
N-MMBT3904LT1_SOT23
RN19
H_FSBSEL2
1
2
H_FSBSEL1
3
4
H_FSBSEL0
5
6
7
8
8P4R-470R0402-LF
100mA
100mA
2
VID_GD#27,29
V_FSB_VTT
X_10KR0402-1
H_FSBSEL2 3,8,18
H_FSBSEL1 3,8,18
H_FSBSEL0 3,8,18
R611
H_VCCIOPLL
H_VCCA
C1U10X
C232
H_VSSA
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT
VID_GD#
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
VTT_OUT_RIGHT
VCC5_SB
C637
C1U10X
Title
Size Document Number Rev
Date: Sheet
R398 680R0402-1
R417
1KR0402-1
R416 4.7KR0402
Q85
X_N-MMBT3904LT1_SOT23
MICRO-START INT'L CO.,LTD.
INTEL LGA775 POWER
VTT_PWG
Q53
N-MMBT3904LT1_SOT23
MS-7245 0D
1
C412
of
435Friday, June 02, 2006
X_C1U10X
5
4
3
2
1
MSID1 MSID0
VTT_OUT_RIGHT3,4
TP14
TP13
TP21
2005 Perf FMB 0 0
2005 Value FMB 0 NC
2006 65W FMB 0 NC
R358
R350
49.9/4/1
49.9/4/1
D D
A12
A15
A18
A2
A21
A24
A6
A9
R594
X_1KR0402-1
C C
B B
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
U16C
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE29
H_COMP7
H_COMP6
AE3
COMP6Y3COMP7
VSS
AE5
AE30
VSS
AE4
AE7
RSVD
VSS
AF10
D14
E23
RSVDD1RSVD
VSS
VSS
AF13
AF16
RSVD
VSS
AF17
VSS
AF20
R326 51R0402
F23
F6
RSVDE5RSVDE6RSVDE7RSVD
VSS
VSS
VSS
VSS
AF23
AF24
AF25
AF26
24.9/4/1
R237
H_COMP8
B13
RSVD
IMPSEL#
VSS
VSS
VSS
AF27
AF28
AF29
VSS
AF3
P5
RSVDJ3RSVDN4RSVD
VSS
VSS
VSS
AF6
AF7
AF30
R336 51R0402
R341 51R0402
MSID[1]V1MSID[0]
VSS
VSS
AG10
W1
VSS
AG13
AC4
RSVD
VSS
AG16
VSS
AG17
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH1
AG7
AH10
AG20
AG23
AG24
VSS
AH13
VSS
AH16
V30
VSS
AH17
VSSV3VSS
VSS
AH20
V29
VSS
AH23
V28
VSS
VSS
AH24
V27
AH3
VSS
VSS
V26
VSS
VSS
AH6
V25
V24
V23
VSS
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
AH7
AJ10
AJ13
AJ16
AJ17
VSS
VSS
AJ20
AJ23
VSS
VSS
AJ24
H_TESTHI12 3
R30
R29
VSS
VSS
VSS
VSS
VSS
AJ27
AJ28
AJ29
AJ30
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
AN1
VSS
VSS
AN10
VSS
AN13
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
AN16
VSS
AN17
H28
AN2
VSS
VSS
VSS
VSS
AN20
VSS
VSS
AN23
VSS
VSS
AN24
VSS
VSS
AN27
VSS
VSS
AN28
VSS
VSS
VSS
VSSB1VSS
B11
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
ZIF-SOCK775-15u-in
B14
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
TP_CPU_G1
R591 51R0402
TP_CPU_E29
TP_CPU_G1 3
VTT_OUT_LEFT 3,4
TP26
R28
R27
R26
R25
R24
R23
P30
P29
P28
P27
P26
P25
P24
P23
VSS
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
VSS
AL17
VSS
AL20
VSS
AL23
VSS
AL24
VSS
AL27
VSS
L30
AL28
VSS
VSSL3VSS
VSS
AL3
L29
L28
L27
VSS
VSS
VSS
VSS
VSS
AL7
AM1
AM10
L26
VSS
VSS
AM13
L25
VSS
VSS
AM16
L24
VSS
VSS
AM17
L23
VSS
VSS
AM20
VSSK7VSS
VSS
AM23
K5
VSS
AM24
K2
VSS
AM27
VSS
AM28
VSS
AM4
CPU DECOUPLING CAPACITORS
VCCP VCCP
A A
EC35
C22U6.3X1206
EC43
C22U6.3X1206
EC33
C22U6.3X1206
C10U10Y1206
5
4
VCCP
EC46
C22U6.3X1206
EC42
C22U6.3X1206
EC38
C22U6.3X1206
10u/10V/Y5V,1206,80/-20%
Place these caps within socket cavity
EC45
C22U6.3X1206
EC37
C22U6.3X1206
EC41
C22U6.3X1206
3
VCCP
EC34
C22U6.3X1206
EC36
C22U6.3X1206
EC40
C22U6.3X1206
Title
Size Document Number Rev
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
INTEL LGA775 GND
MS-7245 0D
1
of
535Friday, June 02, 2006
5
4
3
2
1
V_FSB_VTT
AG19
AG18
AG17
P29
P27
P26
P24
P23
N29
N26
N24
N23
M29
M24
M23
L24
L23
K24
K23
J24
J23
H24
H23
G26
G24
G23
F26
F24
F23
E29
E27
E26
E23
D29
D28
D27
C30
C29
C27
B30
B29
B28
B27
A30
A28
R27
VTT_38
VCC_37
AC6
AC13
VTT_39
VTT_40
VCC_38
VCC_39
AB24
AB22
VTT_41
VTT_42
VCC_40
VCC_41
AB20
AA25
R26
VTT_43
VTT_44
VCC_42
VCC_43
AA23
M38
M36
AA37
M34
W40
W41
AA42
W42
AA41
AM17
AM18
J42
L39
J40
L37
L36
K42
N32
N34
N37
R34
N35
N38
U37
N39
R37
P42
R39
V36
R38
U36
U33
R35
V33
V35
Y34
V42
V38
Y36
Y38
Y39
U34
F40
L35
L38
G43
J37
Y40
T43
Y43
U42
V41
G39
U40
U41
U39
R32
U32
C31
J13
D23
C25
D25
B25
D24
B24
U19A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HA32#
HA33#
HA34#
HA35#
HADSTB0#
HADSTB1#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HADS#
HTRDY#
HDRDY#
HDEFER#
HITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HRS0#
HRS1#
HRS2#
HCLKP
HCLKN
PWROK
HCPURST#
RSTIN#
ICH_SYNC#
HRCOMP
HSCOMP
HSCOMP#
HSWING
HDVREF
HAVREF
VTT_1
AJ12
VTT_2
VTT_3
VCC_1
VCC_2
AJ11
VTT_4
VCC_3
AJ10
VTT_5
VCC_4
AJ9
VTT_6
VCC_5
AJ8
VTT_7
VCC_6
AJ7
VTT_8
VCC_7
AJ6
VTT_9
VCC_8
AJ5
VTT_10
VCC_9
AJ4
AJ3
VTT_11
VTT_12
VCC_10
VCC_11
AJ2
AH4
VTT_13
VTT_14
VCC_12
VCC_13
AH2
AH1
VTT_15
VTT_16
VCC_14
VCC_15
AG13
AG12
VTT_17
VTT_18
VCC_16
VCC_17
AG11
AG10
VTT_19
VTT_20
VCC_18
VCC_19
AG9
AG8
VTT_21
VTT_22
VCC_20
VCC_21
AG7
AG6
VTT_23
VTT_24
VCC_22
VCC_23
AG5
AG4
VTT_25
VTT_26
VCC_24
VCC_25
AG3
AG2
VTT_27
VTT_28
VCC_26
VCC_27
AF13
AF12
VTT_29
VTT_30
VCC_28
VCC_29
AF11
AD24
VTT_31
VTT_32
VCC_30
VCC_31
AD22
AD20
VTT_33
VTT_34
VCC_32
VCC_80
AC25
AC23
VTT_35
VTT_36
VCC_34
VCC_35
AC21
AC19
VTT_37
VCC_36
PLTRST#15,24,26
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
HXRCOMP
HXSCOMP
HXSCOMPB
HXSWING
H_A#[3..35]3
D D
C C
H_ADSTB#03
H_ADSTB#13
H_REQ#[0..4]3
H_ADS#3
H_TRDY#3
H_DRDY#3
H_DEFER#3
H_HITM#3
H_HIT#3
H_LOCK#3
H_BR#03,4
H_BNR#3
H_BPRI#3
H_DBSY#3
H_RS#[0..2]3
CK_H_MCH18
CK_H_MCH#18
PWRGD_3V16,27
R273
H_CPURST#3,4
ICH_SYNC#16
B B
16.9/6/1
MCH_GTLREF
R24
R23
VTT_45
VCC_44
AA21
AA19
VTT_46
VCC_45
VCC_46
AA3
AA13
VCC_84
VCC_85
VCC_47
VCC_48
Y24
Y22
AG15
VCC_86
VCC_87
VCC_49
VCC_50
Y20
V_1P25_CORE
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
V_FSB_VTT
R263
A A
5
49.9/4/1
V_FSB_VTT
R281
49.9/4/1
HXSCOMP
C313
X_C2.7P25N0402
HXSCOMPB
C327
X_C2.7P25N0402
SPACE" HD_SWING S/B 1/4*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT
V_FSB_VTT
R257
301R1%0402
R260
51R0402
R256
100/4/1
4
C291
C0.01U16X0402
HXSWING
3
V_1P25_CORE
AG14
AF26
AF25
AF24
AF22
AF20
AF18
AF17
AF15
AF14
AE27
AE26
AE25
AE23
AE21
AE19
AE17
AD27
AD26
AD18
AD17
AD15
AD14
VCC_88
VCC_89
VCC_90
VCC_91
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110
VCC_111
VCC_51
VCC_52Y6VCC_53
VCC_54
VCC_55
VCC_56V9VCC_57
VCC_58
VCC_59U9VCC_60U6VCC_61U3VCC_62
VCC_63
VCC_64N9VCC_65N8VCC_66N6VCC_67N3VCC_68L6VCC_69J6VCC_70J3VCC_71J2VCC_72G2VCC_73
Y13
V13
V12
V10
U13
U10
N12
N11
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V
124 OHM OVER 210 RESISTORS
F11
V_FSB_VTT
R250
124R1%0402
R247
210R1%0402
MCH_GTLREF_CPU
R248
51R0402
C282
C1U16Y
MCH_GTLREF
C295
X_C220P16X0402
AC27
AC26
AC17
AC15
AC14
AB27
VCC_112
VCC_113
VCC_114
VCC_115
VCC_116
VCC_117
VCC_74F9VCC_75D4VCC_76
VCC_77C9VCC_78
VCC_79
P20
Y11
C13
MCH_GTLREF_CPU 3
AB26
AB18
VCC_118
VCC_119
VCC_81
VCC_82
AG25
AG21
AB17
AA27
AA26
VCC_120
VCC_121
HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDSTBP0#
HDSTBN0#
HDSTBP1#
HDSTBN1#
HDSTBP2#
HDSTBN2#
HDSTBP3#
HDSTBN3#
VCC_83
AG20
HD0
HD1
HD2
HD3
VCC_122
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63
Broadwater-GC
2
R40
P41
R41
N40
R42
M39
N41
N42
L41
J39
L42
J41
K41
G40
F41
F42
C42
D41
F38
G37
E42
E39
E37
C39
B39
G33
A37
F33
E35
K32
H32
B34
J31
F32
M31
E31
K31
G31
K29
F31
J29
F29
L27
K27
H26
L26
J26
M26
C33
C35
E41
B41
D42
C40
D35
B40
C38
D37
B33
D33
C34
B35
A32
D32
M40
J33
G29
E33
L40
M43
G35
H33
G27
H27
B38
D38
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_D#[0..63] 3
H_DBI#[0..3] 3
H_DSTBP#0 3
H_DSTBN#0 3
H_DSTBP#1 3
H_DSTBN#1 3
H_DSTBP#2 3
H_DSTBN#2 3
H_DSTBP#3 3
H_DSTBN#3 3
V_FSB_VTT
C289
C0.1U16Y0402
C319
C0.1U16Y0402
Title
Size Document Number Rev
Date: Sheet
C296
C0.1U16Y0402
MICRO-START INT'L CO.,LTD.
INTEL Broaswater -CPU signal
MS-7245 0D
1
of
635Friday, June 02, 2006
5
4
3
2
1
SCKE_B[0..3]11,12
DQM_B[0..7]11
DATA_B[0..63]11
DQM_B4
DQM_B7
DQM_B3
DQM_B1
DQM_B5
DQM_B0
DQM_B2
DQM_B6
SCKE_B3
SCKE_B0
SCKE_B1
DATA_B23
DATA_B22
AV15
AW17
SDQ_B21
SDQ_B22
SDQ_B23
SDQ_A21
SDQ_A22
SDQ_A23
BA10
BB10
DATA_A23
DATA_A22
DATA_B24
DATA_B25
AV24
AT23
SDQ_B24
SDQ_B25
SDQ_A24
SDQ_A25
AT18
AR18
DATA_A24
DATA_A25
DATA_B26
DATA_B27
AT26
AP26
SDQ_B26
SDQ_B27
SDQ_A26
SDQ_A27
AT21
AU21
DATA_A26
DATA_A27
DATA_B28
DATA_B29
AU23
AW23
SDQ_B28
SDQ_B29
SDQ_A28
SDQ_A29
AP17
AN17
DATA_A28
DATA_A29
DATA_B31
DATA_B30
AR24
AN26
SDQ_B30
SDQ_B31
SDQ_A30
SDQ_A31
AP20
AV20
DATA_A31
DATA_A30
DATA_B32
AW37
AV42
DATA_A32
DATA_B1
DATA_B6
DATA_B4
DATA_B7
DATA_B3
DATA_B5
DATA_B2
DATA_B0
D D
C C
B B
VCC_DDR
C371
C0.1U16Y0402
SCS_A#[0..3]10,12
RAS_A#10,12
CAS_A#10,12
WE_A#10,12
MAA_A[0..14]10,12
ODT_A[0..3]10,12
SBS_A[0..2]10,12
DQS_A010
DQS_A#010
DQS_A110
DQS_A#110
DQS_A210
DQS_A#210
DQS_A310
DQS_A#310
DQS_A410
DQS_A#410
DQS_A510
DQS_A#510
DQS_A610
DQS_A#610
DQS_A710
DQS_A#710
P_DDR0_A10
N_DDR0_A10
P_DDR1_A10
N_DDR1_A10
P_DDR2_A10
N_DDR2_A10
P_DDR3_A10
N_DDR3_A10
P_DDR4_A10
N_DDR4_A10
P_DDR5_A10
N_DDR5_A10
R353 20/4/1
R346 20/4/1 C370
R390 20/4/1
R391 20/4/1
SCS_A#0
SCS_A#1
SCS_A#2
SCS_A#3
RAS_A#
CAS_A#
WE_A#
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14
ODT_A0
ODT_A1
ODT_A2
ODT_A3
SBS_A0
SBS_A1
SBS_A2
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
P_DDR3_A
N_DDR3_A
P_DDR4_A
N_DDR4_A
P_DDR5_A
N_DDR5_A
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
AW35
BA35
BA34
BB38
BB33
AY35
BB34
BA31
BB25
BA26
BA25
AY25
BA23
AY24
AY23
BB23
BA22
AY33
BB22
AW21
AY38
BA21
AY37
BA38
BB35
BA39
BA33
AW32
BB21
AU4
AR3
AT20
AU18
AR41
AR40
AL41
AL40
AG42
AG41
AC42
AC41
AU31
AR31
AP27
AN27
AV33
AW33
AP29
AP31
AM26
AM27
AT33
AU33
AN2
AN3
BB40
BA40
BB3
BA4
BB9
BA9
Broadwater-GC
U19B
SCS_A0#
SCS_A1#
SCS_A2#
SCS_A3#
SRAS_A#
SCAS_A#
SWE_A#
SMA_A0
SMA_A1
SMA_A2
SMA_A3
SMA_A4
SMA_A5
SMA_A6
SMA_A7
SMA_A8
SMA_A9
SMA_A10
SMA_A11
SMA_A12
SMA_A13
SMA_A14
SODT_A0
SODT_A1
SODT_A2
SODT_A3
SBS_A0
SBS_A1
SBS_A2
SDQS_A0
SDQS_A0#
SDQS_A1
SDQS_A1#
SDQS_A2
SDQS_A2#
SDQS_A3
SDQS_A3#
SDQS_A4
SDQS_A4#
SDQS_A5
SDQS_A5#
SDQS_A6
SDQS_A6#
SDQS_A7
SDQS_A7#
SCLK_A0
SCLK_A0#
SCLK_A1
SCLK_A1#
SCLK_A2
SCLK_A2#
SCLK_A3
SCLK_A3#
SCLK_A4
SCLK_A4#
SCLK_A5
SCLK_A5#
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
AN7
AN8
SDQ_B0
SDQ_A0
AR5
AR4
DATA_A0
DATA_A1
AW5
AW7
SDQ_B1
SDQ_B2
SDQ_A1
SDQ_A2
AV3
AV2
DATA_A3
DATA_A2
AN5
AN6
SDQ_B3
SDQ_B4
SDQ_A3
SDQ_A4
AP3
AP2
DATA_A4
DATA_A5
AN9
AU7
SDQ_B5
SDQ_B6
SDQ_A5
SDQ_A6
AV4
AU1
DATA_A6
DATA_A7
DATA_B8
DATA_B9
AT11
AU11
SDQ_B7
SDQ_B8
SDQ_A7
SDQ_A8
AY2
AY3
DATA_A9
DATA_A8
DATA_B11
DATA_B10
AP13
AR13
SDQ_B9
SDQ_B10
SDQ_A9
SDQ_A10
BB5
AY6
DATA_A11
DATA_A10
DATA_B12
DATA_B13
AR11
AU9
SDQ_B11
SDQ_B12
SDQ_B13
SDQ_A11
SDQ_A12
SDQ_A13
AW2
AW3
DATA_A13
DATA_A12
DATA_B14
DATA_B15
AV12
AU12
SDQ_B14
SDQ_B15
SDQ_A14
SDQ_A15
BA5
BB4
DATA_A15
DATA_A14
DATA_B17
DATA_B16
AU15
AV13
SDQ_B16
SDQ_B17
SDQ_A16
SDQ_A17
AY7
BC7
DATA_A17
DATA_A16
DATA_B19
AU17
AT17
SDQ_B18
SDQ_B19
SDQ_A18
SDQ_A19
AY11
AW11
DATA_A18
DATA_A19
DATA_B20
DATA_B21
AU13
AM13
SDQ_B20
SDQ_A20
BB6
BA6
DATA_A20
DATA_A21
DATA_B18
DATA_B34
DATA_B33
AV38
AN36
SDQ_B32
SDQ_B33
SDQ_B34
SDQ_A32
SDQ_A33
SDQ_A34
AP42
AU40
DATA_A34
DATA_A33
DATA_B35
DATA_B36
AN37
AU35
SDQ_B35
SDQ_B36
SDQ_A35
SDQ_A36
AV40
AN39
DATA_A36
DATA_A35
DATA_B37
DATA_B38
AR35
AN35
SDQ_B37
SDQ_B38
SDQ_A37
SDQ_A38
AV41
AR42
DATA_A38
DATA_A37
DATA_B39
DATA_B40
AR37
AM35
SDQ_B39
SDQ_B40
SDQ_A39
SDQ_A40
AP41
AN41
DATA_A39
DATA_A40
DATA_B42
DATA_B41
AM38
AJ34
SDQ_B41
SDQ_B42
SDQ_A41
SDQ_A42
AK42
AM39
DATA_A41
DATA_A42
DATA_B43
DATA_B44
AL38
AR39
SDQ_B43
SDQ_B44
SDQ_A43
SDQ_A44
AK41
AN40
DATA_A43
DATA_A44
DATA_B45
AM34
AN42
DATA_A45
DATA_B47
DATA_B46
AL37
AL32
SDQ_B45
SDQ_B46
SDQ_B47
SDQ_A45
SDQ_A46
SDQ_A47
AL42
AL39
DATA_A47
DATA_A46
DATA_B49
DATA_B48
AG38
AJ38
SDQ_B48
SDQ_B49
SDQ_A48
SDQ_A49
AJ40
AH43
DATA_A49
DATA_A48
DATA_B50
DATA_B51
AF35
AF33
SDQ_B50
SDQ_A50
AF39
AE40
DATA_A50
DATA_A51
DATA_B52
DATA_B53
AJ37
AJ35
SDQ_B51
SDQ_B52
SDQ_B53
SDQ_A51
SDQ_A52
SDQ_A53
AJ42
AJ41
DATA_A53
DATA_A52
DATA_B54
DATA_B55
AG33
AF34
SDQ_B54
SDQ_B55
SDQ_A54
SDQ_A55
AF41
AF42
DATA_A54
DATA_A55
DATA_B57
DATA_B56
AD36
AC33
SDQ_B56
SDQ_A56
AD40
AD43
DATA_A56
DATA_A57
DATA_B58
DATA_B59
AA34
AA36
SDQ_B57
SDQ_B58
SDQ_B59
SDQ_A57
SDQ_A58
SDQ_A59
AB41
AA40
DATA_A58
DATA_A59
DATA_B60
AD34
AE42
DATA_A60
DATA_A[0..63]10
SCKE_A[0..3]10,12
A A
5
4
DQM_A[0..7]10
3
DATA_B61
DATA_B62
AF38
AC34
SDQ_B60
SDQ_B61
SDQ_B62
SDQ_A60
SDQ_A61
SDQ_A62
AE41
AC39
DATA_A62
DATA_A61
DATA_B63
AA33
SDQ_B63
SDQ_A63
AB42
DATA_A63
AY12
AW12
SCKE_B0
SCKE_B1
SCKE_A0
SCKE_A1
AY20
BC20
SCKE_A1
SCKE_A0
SCKE_B2
BB11
BA11
SCKE_B2
SCKE_B3
SCKE_A2
SCKE_A3
AY21
BA19
SCKE_A2
SCKE_A3
AR7
SDM_B0
SDM_A0
AR2
DQM_A0
DQM_A1
AW9
AW13
SDM_B1
SDM_A1
BA2
AY9
DQM_A2
AP23
AU37
SDM_B2
SDM_B3
SDM_A2
SDM_A3
AN18
AU43
DQM_A4
DQM_A3
AM37
AG39
SDM_B4
SDM_B5
SDM_A4
SDM_A5
AG40
AM43
DQM_A6
DQM_A5
AD38
SDM_B6
SDM_B7
SDQS_B0#
SDQS_B1#
SDQS_B2#
SDQS_B3#
SDQS_B4#
SDQS_B5#
SDQS_B6#
SDQS_B7#
SMRCOMPVOL
SMRCOMPVOH
SDM_A6
SDM_A7
AC40
DQM_A7
BB27
SCS_B0#
BB30
SCS_B1#
AY27
SCS_B2#
AY31
SCS_B3#
AW26
SRAS_B#
AW29
SCAS_B#
BA27
SWE_B#
BB17
SMA_B0
AY17
SMA_B1
BA17
SMA_B2
BC16
SMA_B3
AW15
SMA_B4
BA15
SMA_B5
BB15
SMA_B6
BA14
SMA_B7
AY15
SMA_B8
BB14
SMA_B9
AW18
SMA_B10
BB13
SMA_B11
BA13
SMA_B12
AY29
SMA_B13
AY13
SMA_B14
BA29
SODT_B0
BA30
SODT_B1
BB29
SODT_B2
BB31
SODT_B3
AY19
SBS_B0
BA18
SBS_B1
BC12
SBS_B2
AV6
SDQS_B0
AU5
AR12
SDQS_B1
AP12
AP15
SDQS_B2
AR15
AT24
SDQS_B3
AU26
AW39
SDQS_B4
AU39
AL35
SDQS_B5
AL34
AG35
SDQS_B6
AG36
AC36
SDQS_B7
AC37
AV31
SCLK_B0
AW31
SCLK_B0#
AU27
SCLK_B1
AT27
SCLK_B1#
AV32
SCLK_B2
AT32
SCLK_B2#
AU29
SCLK_B3
AR29
SCLK_B3#
AV29
SCLK_B4
AW27
SCLK_B4#
AN33
SCLK_B5
AP32
SCLK_B5#
AM6
SVREF
AM8
AM10
PLACE 0.1UF CAP CLOSE TO MCH
VCC_DDR
R345
1KR1%0402
SCS_B#0
SCS_B#1
SCS_B#2
SCS_B#3
RAS_B#
CAS_B#
WE_B#
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
MAA_B14
ODT_B0
ODT_B1
ODT_B2
ODT_B3
SBS_B0
SBS_B1
SBS_B2
DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7
P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B
P_DDR3_B
N_DDR3_B
P_DDR4_B
N_DDR4_B
P_DDR5_B
N_DDR5_B
MCH_VREF_A
SMRCOMPVOL
SMRCOMPVOH
C367
C0.1U16Y0402
2
P_DDR0_B 11
N_DDR0_B 11
P_DDR1_B 11
N_DDR1_B 11
P_DDR2_B 11
N_DDR2_B 11
P_DDR3_B 11
N_DDR3_B 11
P_DDR4_B 11
N_DDR4_B 11
P_DDR5_B 11
N_DDR5_B 11
MCH_VREF_A
R342
1KR1%0402
SCS_B#[0..3] 11,12
RAS_B# 11,12
CAS_B# 11,12
WE_B# 11,12
MAA_B[0..14] 11,12
ODT_B[0..3] 11,12
SBS_B[0..2] 11,12
DQS_B0 11
DQS_B#0 11
DQS_B1 11
DQS_B#1 11
DQS_B2 11
DQS_B#2 11
DQS_B3 11
DQS_B#3 11
DQS_B4 11
DQS_B#4 11
DQS_B5 11
DQS_B#5 11
DQS_B6 11
DQS_B#6 11
DQS_B7 11
DQS_B#7 11
VCC_DDR
R351
1KR1%0402
C0.1U16Y0402
SMRCOMPVOH
3.01K/4/1
R360
DDR_RCOMPVOH: 0.8*VRM
C373
C0.1U16Y0402
SMRCOMPVOL
DDR_RCOMPVOL: 0.2*VRM
C377
R365
1KR1%0402
MSI
Title
Size Document Number Rev
Date: Sheet
INTEL Broadwater-Memory
C0.1U16Y0402
MICRO-START INT'L CO.,LTD.
MS-7245 0D
1
of
735Friday, June 02, 2006
5
CK_PE_100M_MCH
CK_PE_100M_MCH#
R235 10KR0402-1
R234 10KR0402-1
R233 10KR0402-1
R236 0-0603
R253
0-0603
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXP_7
EXP_A_RXN_7
EXP_A_RXP_8
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
X_C10P50N0402C144
SDVO_CTRL_DATA
SDVO_CTRL_CLK
X_C10P50N0402C142
EXP_SLR
EXP_EN
VCC_CL_PLL
VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
EXP_A_RXP_013
EXP_A_RXN_013
EXP_A_RXP_113
EXP_A_RXN_113
EXP_A_RXP_213
EXP_A_RXN_213
D D
C C
0:BTX
1:ATX
EXP_EN_HDR13
EXP_A_RXP_313
EXP_A_RXN_313
EXP_A_RXP_413
EXP_A_RXN_413
EXP_A_RXP_513
EXP_A_RXN_513
EXP_A_RXP_613
EXP_A_RXN_613
EXP_A_RXP_713
EXP_A_RXN_713
EXP_A_RXP_813
EXP_A_RXN_813
EXP_A_RXP_913
EXP_A_RXN_913
EXP_A_RXP_1013
EXP_A_RXN_1013
EXP_A_RXP_1113
EXP_A_RXN_1113
EXP_A_RXP_1213
EXP_A_RXN_1213
EXP_A_RXP_1313
EXP_A_RXN_1313
EXP_A_RXP_1413
EXP_A_RXN_1413
EXP_A_RXP_1513
EXP_A_RXN_1513
DMI_ITP_MRP_015
DMI_ITN_MRN_015
DMI_ITP_MRP_115
DMI_ITN_MRN_115
DMI_ITP_MRP_215
DMI_ITN_MRN_215
DMI_ITP_MRP_315
DMI_ITN_MRN_315
CK_PE_100M_MCH18
CK_PE_100M_MCH#18
SDVO_CTRL_DATA13
SDVO_CTRL_CLK13
H_FSBSEL03,4,18
H_FSBSEL13,4,18
H_FSBSEL23,4,18
R262 1KR0402-1
V_1P25_CL_MCH
V_3P3_DAC_FILTERED
VCC3
C297
C1U16Y
VCCD_CRT
VCCDQ_CRT
B B
V_1P5_ICH
R246 0R0805
R245 1R0805
VCCD_CRT
C314
4.7u/10V/8
VCCDQ_CRT
C326
C0.1U16Y0402
600L240m_300_0805
L17
VCCA_MPLL
A A
R249 1/6/1
R252 1/6/1
C306
X_22000p/25V/4
SEL0
SEL1
SEL2
V_1P25_CORE
C280
C10U10Y0805
F15
G15
K15
J15
F12
E12
J12
H12
J11
H11
F7
E7
E5
F6
C2
D2
G6
G5
L9
L8
M8
M9
M4
L4
M5
M6
R9
R10
T4
R4
R6
R7
W2
V1
Y8
Y9
AA7
AA6
AB3
AA4
B12
B13
G17
E17
G20
J20
J18
G18
E18
J17
Y32
C23
A24
A22
C22
B15
C17
B16
A16
C21
B21
D16
B17
Broadwater-GC
V_1P25_CORE
V_1P25_CL_MCH
U19C
EXP_RXP0
EXP_RXN0
EXP_RXP1
EXP_RXN1
EXP_RXP2
EXP_RXN2
EXP_RXP3
EXP_RXN3
EXP_RXP4
EXP_RXN4
EXP_RXP5
EXP_RXN5
EXP_RXP6
EXP_RXN6
EXP_RXP7
EXP_RXN7
EXP_RXP8
EXP_RXN8
EXP_RXP9
EXP_RXN9
EXP_RXP10
EXP_RXN10
EXP_RXP11
EXP_RXN11
EXP_RXP12
EXP_RXN12
EXP_RXP13
EXP_RXN13
EXP_RXP14
EXP_RXN14
EXP_RXP15
EXP_RXN15
DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1
DMI_RXP2
DMI_RXN2
DMI_RXP3
DMI_RXN3
GCLKP
GCLKN
SDV0_CTRLDATA
SDVO_CTRLCLK
BSEL0
BSEL1
BSEL2
RESERVED
EXP_SLR
EXP_EN
VCC_CL_PLL
VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_EXPPLL
VCCA_DAC_17
VCCA_DAC_18
VCCA_EXP_19
VCCD_CRT_20
VCCDQ_CRT_21
VSS_1
VCC33
AL26
VCC_CL_1
VCC_EXP_1
VCC_EXP_2
AD11
AD10
4
AL24
AL23
AL21
AL20
AL18
AL17
AL15
AK30
VCC_CL_2
VCC_CL_3
VCC_CL_4
VCC_CL_5
VCC_CL_6
VCC_CL_7
VCC_CL_8
VCC_CL_9
VCC_EXP_3
VCC_EXP_4
VCC_EXP_5
VCC_EXP_6
VCC_EXP_7
VCC_EXP_8
VCC_EXP_9
VCC_EXP_10
AD9
AD8
AD7
AD6
AD5
AD4
AD2
AD1
L14 10U100m_0805
EC32
CD220U16EL11
AK29
AK27
AJ31
AG31
VCC_CL_10
VCC_CL_11
VCC_CL_12
VCC_EXP_11
VCC_EXP_12
VCC_EXP_13
AE4
AC4
AC3
AC2
VCC_DDR
12
AF31
AD32
AC32
AA32
VCC_CL_13
VCC_CL_14
VCC_CL_15
VCC_CL_16
VCC_EXP_14
VCC_EXP_15
VCC_EXP_16
AE3
AE2
BC39
VCCA_DPLLA
+
AJ30
AJ29
AJ27
VCC_CL_17
VCC_CL_18
VCC_CL_19
VCC_CL_20
VCCSM_1
VCCSM_2
VCCSM_3
VCCSM_4
BC34
BC30
BC26
AG30
AG29
AG27
AG26
VCC_CL_21
VCC_CL_22
VCC_CL_23
VCCSM_5
VCCSM_6
VCCSM_7
BB39
BC22
BC18
BC14
V_1P25_COREV_1P25_CL_MCH
C300
C0.1U16Y0402
AF30
AF29
AF27
VCC_CL_24
VCC_CL_25
VCC_CL_26
VCC_CL_27
VCCSM_8
VCCSM_9
VCCSM_10
VCCSM_11
BB37
BB32
BB28
AD30
AD29
AC30
AC29
AL12
VCC_CL_28
VCC_CL_29
VCC_CL_30
VCC_CL_31
VCC_CL_32
VCCSM_12
VCCSM_13
VCCSM_14
VCCSM_15
VCCSM_16
BB26
BB24
BB20
BB18
BB16
L18 10U100m_0805
AL11
AL10
AL9
VCC_CL_33
VCC_CL_34
VCC_CL_35
VCCSM_17
VCCSM_18
VCCSM_19
BB12
AY32
AW24
AL8
AL7
AL6
VCC_CL_36
VCC_CL_37
VCC_CL_38
VCCSM_20
VCCSM_21
VCCSM_22
AV26
AV18
AW20
C401
C1U16Y
AL5
AL4
AL3
VCC_CL_39
VCC_CL_40
VCC_CL_41
VCC_SMCLK_1
BB41
3
AL2
AK26
AK24
AK23
AK21
VCC_CL_42
VCC_CL_43
VCC_CL_44
VCC_CL_45
VCC_SMCLK_5
VCC_SMCLK_4
VCC_SMCLK_3
VCC_SMCLK_2
BA43
BB42
AY42
BA42
V_CKDDR
R387 1/6/1
R388 1/6/1
R254 1/6/1
R255 1/6/1
C10U10Y0805
AK20
AK18
AK17
AK15
AK3
AK2
AK1
AJ13
VCC_CL_46
VCC_CL_47
VCC_CL_48
VCC_CL_49
VCC_CL_50
VCC_CL_51
VCC_CL_52
VCC_CL_53
RESERVED_2
RESERVED_4
RESERVED_5
RESERVED_6
RESERVED_3
RESERVED_1
H18
BB2
BB19
AN21
AN32
AM31
AW42
L28 600L350m_450
C407 C10U10Y0805
VCCA_GPLL
C298
AD31
AC31
AA31
Y31
VCC_CL_54
VCC_CL_55
VCC_CL_56
VCC_CL_57
VCC_CL_58
RESERVED_7
RESERVED_8
RESERVED_9
RESERVED_10
RESERVED_11
AL31
AF32
AG32
AM21
AJ26
AJ24
AJ23
AJ21
AJ20
VCC_CL_59
VCC_CL_60
VCC_CL_61
VCC_CL_62
RESERVED_12
RESERVED_13
RESERVED_14
RESERVED_15
Y12
AA9
AJ32
AA10
AA11
C329
C0.1U16Y0402
AJ18
AJ17
AJ15
AJ14
AA30
VCC_CL_63
VCC_CL_64
VCC_CL_65
VCC_CL_66
VCC_CL_67
RESERVED_16
RESERVED_17
RESERVED_18
RESERVED_19
RESERVED_20
U30
U31
R29
R30
U12
VCC_DDR
AA29
Y30
Y29
V30
V29
VCC_CL_68
VCC_CL_69
VCC_CL_70
VCC_CL_71
VCC_CL_72
RESERVED_25
RESERVED_21
RESERVED_22
RESERVED_23
RESERVED_24
F13
U11
R12
R13
AP21
VCC3
L15 0.1U400m
.CD100U16EL11
U29
U27
AL13
AK14
AL29
VCC_CL_73
VCC_CL_74
VCC_CL_75
VCC_CL_76
VCC_CL_77
RESERVED_28
RESERVED_27
RESERVED_26
V31
AA39
BC43
EC29
2
AL27
EXP_TXP0
EXP_TXN0
EXP_TXP1
EXP_TXN1
VCC_CL_78
VCC_CL_79
EXP_TXP2
EXP_TXN2
EXP_TXP3
EXP_TXN3
EXP_TXP4
EXP_TXN4
EXP_TXP5
EXP_TXN5
EXP_TXP6
EXP_TXN6
EXP_TXP7
EXP_TXN7
EXP_TXP8
EXP_TXN8
EXP_TXP9
EXP_TXN9
EXP_TXP10
EXP_TXN10
EXP_TXP11
EXP_TXN11
EXP_TXP12
EXP_TXN12
EXP_TXP13
EXP_TXN13
EXP_TXP14
EXP_TXN14
EXP_TXP15
EXP_TXN15
DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3
EXP_COMPO
EXP_COMPI
DDC_DATA
DDC_CLK
DREFCLKP
DREFCLKN
CL_PWROK
CL_RST#
CL_VERF
CL_DATA
ALLZTEST
XORTEST
RESERVED
TEST0
TEST1
TEST2
A43
BC1
TP24
TP27
TP28
12
+
HSYNC
VSYNC
RED
GREEN
BLUE
RED#
GREEN#
BLUE#
REFSET
CL_CLK
V_3P3_DAC_FILTERED
C312
C0.1U16Y0402
D11
D12
B11
A10
C10
D9
B9
B7
D7
D6
B5
B6
B3
B4
F2
E2
F4
G4
J4
K3
L2
K1
N2
M2
P3
N4
R2
P1
U2
T2
V3
U4
V7
V6
W4
Y4
AC8
AC9
Y2
AA2
AC11
AC12
C15
D15
B18
C19
B20
C18
D19
D20
L13
M13
C14
D13
A20
AM15
AA12
AM5
AD13
AD12
K20
F20
A14
EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5
EXP_A_TXP_6
EXP_A_TXN_6
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
GRCOMP
HSYNC
VSYNC
VGA_RED
VGA_GREEN
VGA_BLUE
MCH_DDC_DATA
MCH_DDC_CLK
CK_96M_DREF
CK_96M_DREF#
DACREFSET
R343
0R0402
CL_VREF_MCH
TP22
C322
C0.01U16X0402
EXP_A_TXP_0 13
EXP_A_TXN_0 13
EXP_A_TXP_1 13
EXP_A_TXN_1 13
EXP_A_TXP_2 13
EXP_A_TXN_2 13
EXP_A_TXP_3 13
EXP_A_TXN_3 13
EXP_A_TXP_4 13
EXP_A_TXN_4 13
EXP_A_TXP_5 13
EXP_A_TXN_5 13
EXP_A_TXP_6 13
EXP_A_TXN_6 13
EXP_A_TXP_7 13
EXP_A_TXN_7 13
EXP_A_TXP_8 13
EXP_A_TXN_8 13
EXP_A_TXP_9 13
EXP_A_TXN_9 13
EXP_A_TXP_10 13
EXP_A_TXN_10 13
EXP_A_TXP_11 13
EXP_A_TXN_11 13
EXP_A_TXP_12 13
EXP_A_TXN_12 13
EXP_A_TXP_13 13
EXP_A_TXN_13 13
EXP_A_TXP_14 13
EXP_A_TXN_14 13
EXP_A_TXP_15 13
EXP_A_TXN_15 13
DMI_MTP_IRP_0 15
DMI_MTN_IRN_0 15
DMI_MTP_IRP_1 15
DMI_MTN_IRN_1 15
DMI_MTP_IRP_2 15
DMI_MTN_IRN_2 15
DMI_MTP_IRP_3 15
DMI_MTN_IRN_3 15
R337 24.9/4/1
HSYNC 14
VSYNC 14
VGA_RED 14
VGA_GREEN 14
VGA_BLUE 14
MCH_DDC_DATA 14
MCH_DDC_CLK 14
CK_96M_DREF 18
CK_96M_DREF# 18
R269 1.3K/4/1
MCH_CLPWROK 16,28
V_1P25_CORE
CL_RST 16
CL_N_CLK 16
CL_N_DATA 16
Place close to GMCH
V_1P25_CL_MCH
MCH CL VREF:0.349V
R355
1KR1%0402
CL_VREF_MCH
R349
392R1%0402
1
VCC_DDR
C402 2.2u/6.3V/6
C403 2.2u/6.3V/6
C397 2.2u/6.3V/6
C399 2.2u/6.3V/6
C406 2.2u/6.3V/6
C532 2.2u/6.3V/6
MCH MEMORY DECOUPLING
V_1P25_CL_MCH
C366
C10U10Y0805
MCH CL DECOUPLING
V_1P25_CORE
C355
C363
C364
C362
C354
C359 C0.1U16Y0402
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C356 C0.1U16Y0402
C358 C0.1U16Y0402
C357 C0.1U16Y0402
MCH CORE DECOUPLING
V_1P25_CORE
C596
C598
C599
C597
C600
Solder side
C375
C0.1U16Y0402
X_C10U10Y0805
X_C10U10Y0805
X_C10U10Y0805
X_C10U10Y0805
X_C10U10Y0805
VCCA_HPLL
C288
2.2u/6.3V/6
EC31
5
+
12
VCCA_DPLLB
C321
C0.1U16Y0402
V_1P25_CL_MCH
V_1P25_CORE V_1P25_CORE
L13 10U100m_0805
CD220U16EL11
L19 10U100m_0805
4
C361 C10U10Y0805
C365
3
X_C10U10Y0805
Title
Size Document Number Rev
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
INTEL Broadwater-PCIE
MS-7245 0D
1
of
835Friday, June 02, 2006
5
4
3
2
1
V_1P25_CORE
D D
BC37
BC32
BC28
BC24
BC10
BC5
BB7
AY41
AY4
AW43
AW41
AW1
AV37
AV35
AV27
AV23
AV21
AV17
AV11
AV9
AV7
AU42
AU38
AU32
C C
B B
AU24
AU20
AT31
AT29
AT15
AT13
AT12
AR38
AR33
AR32
AR27
AR26
AR23
AR21
AR20
AR17
AP43
AP24
AP18
AN38
AN31
AN29
AN24
AN23
AN20
AN15
AN13
AN12
AN11
AM42
AM40
AM36
AM33
AM29
AM24
AM23
AM20
AM11
AL36
AL33
AK43
AU6
AU2
AR9
AR6
AP1
AN4
AM9
AM7
AM4
AM2
AM1
U19D
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
AA17
AA15
VCC_123
VCC_124
AA14
Y27
VCC_125
VCC_126
Y26
Y18
VCC_127
VCC_128
Y17
Y15
VCC_129
VCC_130
Y14
W27
VCC_131
VCC_132
W26
W25
VCC_133
VCC_134
W23
W21
VCC_135
VCC_136
W19
W18
VCC_137
VCC_138
W17
V27
VCC_139
VCC_140
V26
V25
VCC_141
VCC_142
V24
V23
VCC_143
VCC_144
V22
V21
VCC_145
VCC_146
V20
V19
VCC_147
VCC_148
V18
V17
VCC_149
VCC_150
V15
V14
VCC_151
VCC_152
U26
U25
VCC_153
VCC_154
U24
U23
VCC_155
VCC_156
U22
U21
VCC_157
VCC_158
U20
U19
VCC_159
VCC_160
U18
U17
VCC_161
VCC_162
U15
U14
VCC_163
VCC_164
R20
R18
VCC_165
VCC_166
R17
R15
VCC_167
VCC_168
R14
P15
VCC_169
VCC_170
P14
AG24
VCC_171
VCC_172
AG23
AG22
VCC_173
VCC_174
M20
L17
N17
N18
N15
RESERVED_29
RESERVED_30
RESERVED_31
RESERVED_32
L15
RESERVED_33
L18
M18
F17
K17
RESERVED_34
RESERVED_35
RESERVED_36
RESERVED_37
RESERVED_38
N20
NC_1
BC42
NC_2
BC2
NC_3
BB43
NC_4
BB1
NC_5
B43
NC_6
B42
NC_7
A42
NC_8B2NC_9
M42
A41
C43
R21
W20
W22
W24
AA18
AC18
AE18
AE20
AE22
AE24
AF19
AF21
AF23
AY40
BA1
BC3
VSS_277
VSS_276
VSS_275
VSS_274
VSS_273
VSS_272
BC41
VSS_271
M11
L12
VSS
VCC
VSS_293A3VSS_292A5VSS_291
VSS_290C1VSS_289
VSS_288E1VSS_287
VSS_286
VSS_285
VSS_284
VSS_283
VSS_282
VSS_281
VSS_280
VSS_279
VSS_278
M33
M35
VSS_270
VSS_269
M37
VSS_267
VSS_268
N10
VSS_266N5VSS_265N7VSS_264
VSS_263
VSS_262
VSS_261
VSS_260
VSS_259
VSS_258
VSS_257
VSS_256
VSS_255
VSS_254
VSS_253
VSS_252
VSS_251
VSS_250
VSS_249
VSS_248
VSS_247
VSS_246
VSS_245
VSS_244
VSS_243
VSS_242
VSS_241
VSS_240
VSS_239
VSS_238
VSS_237
VSS_236
VSS_235
VSS_234
VSS_233
VSS_232
VSS_231
VSS_230
VSS_229
VSS_228
VSS_227
VSS_226
VSS_225
VSS_224
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199
VSS_198
VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189
VSS_188
N13
N21
N27
N31
N33
N36
P2
P17
P18
P21
P30
P43
R3
R5
R8
R11
R31
R33
R36
T1
T42
U5
U7
U8
U35
U38
V2
V5
V8
V11
V32
V34
V37
V39
V43
W3
Y1
Y5
Y7
Y10
Y19
Y21
Y23
Y25
Y33
Y35
Y37
Y42
AA5
AA8
AA20
AA22
AA24
AA35
AA38
AB1
AB2
AB19
AB21
AB23
AB25
AB43
AC5
AC7
AC10
AC20
AC22
AC24
AC35
AC38
AD19
AD21
AD23
AD25
AD33
AD35
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96M7VSS_97M1VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105L7VSS_106L5VSS_107L3VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114K2VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120J9VSS_121J7VSS_122J5VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137G9VSS_138G7VSS_139G1VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145F3VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154E9VSS_155E3VSS_156
VSS_157
VSS_158
VSS_159
VSS_160D3VSS_161
VSS_162
VSS_163C6VSS_164C5VSS_165C4VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180A7VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
J38
J35
J32
J27
L33
L32
L31
L29
L21
L20
L11
K43
K26
K21
K18
AF9
AF8
AF7
AF6
M27
M21
M17
M15
AJ39
AJ36
AJ33
AF43
AF37
AF36
AF10
AH42
AG37
AG34
A A
5
M10
4
K13
J21
K12
H31
H29
H21
H20
H17
H15
H13
G42
G38
G32
G21
3
F37
F35
F27
F21
F18
E43
E32
E24
E21
E20
E15
E13
E11
D40
D31
D21
G13
G12
G11
D17
B37
B32
B31
B26
B23
B22
B19
B14
B10
A39
A34
A26
A18
C26
C11
2
A12
AF5
AF3
Broadwater-GC
AF2
AF1
AD42
AD39
AD37
Title
Size Document Number Rev
Date: Sheet
MICRO-START INT'L CO.,LTD.
INTEL Broadwater-GND
MS-7245 0D
1
935Friday, June 02, 2006
of
5
VCC_DDR VCC3 VCC_DDR VCC3
4
3
2
1
DATA_A[0..63]7
D D
C C
B B
A A
DIMM1
DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12 DQS_A#5
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
3
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
21
DQ10
22
DQ11
131
DQ12
132
DQ13
140
DQ14
141
DQ15
24
DQ16
25
DQ17
30
DQ18
31
DQ19
143
DQ20
144
DQ21
149
DQ22
150
DQ23
33
DQ24
34
DQ25
39
DQ26
40
DQ27
152
DQ28
153
DQ29
158
DQ30
159
DQ31
80
DQ32
81
DQ33
86
DQ34
87
DQ35
199
DQ36
200
DQ37
205
DQ38
206
DQ39
89
DQ40
90
DQ41
95
DQ42
96
DQ43
208
DQ44
209
DQ45
214
DQ46
215
DQ47
98
DQ48
99
DQ49
107
DQ50
108
DQ51
217
DQ52
218
DQ53
226
DQ54
227
DQ55
110
DQ56
111
DQ57
116
DQ58
117
DQ59
229
DQ60
230
DQ61
235
DQ62
236
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
50
VSS
65
VSS
66
VSS
79
VSS
82
VSS
85
VSS
88
VSS
91
VSS
94
VSS
97
VSS
55
100
VSS
103
RC118RC0
VSS
19
102
NC
VSS
106
109
68
NC
VDD051VDD156VDD262VDD372VDD478VDD5
NC/TEST
VSS
VSS
VSS
VSS
112
115
118
121
VSS
191
194
181
175
75
170
197
172
187
184
189
67
178
VDD6
VDD7
VDD8
VDD3
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ469VDDQ7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
238
VDDSPD
VSS
VSS
213
216
CB042CB143CB248CB349CB4
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK1#(CK0#)
VSS
VSS
VSS
VSS
219
222
225
228
161
162
167
CB5
CB6
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A10_AP
A16/BA2
WE#
CAS#
RAS#
DM0/DQS9
NC/DQS9#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
SDA
VREF
VSS
VSS
VSS
DDRII-240_black
231
234
237
A11
A12
A13
A14
A15
BA1
BA0
SCL
SA0
SA1
SA2
168
CB7
DQS_A0
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
7
DQS_A#0
6
DQS_A1
16
DQS_A#1
15
DQS_A2
28
DQS_A#2
27
DQS_A3
37
DQS_A#3
36
DQS_A4
84
DQS_A#4
83
DQS_A5
93
92
DQS_A6
105
DQS_A#6
104
DQS_A7
114
DQS_A#7
113
46
45
MAA_A0
188
MAA_A1
183
MAA_A2
63
MAA_A3
182
MAA_A4
61
MAA_A5
60
MAA_A6
180
MAA_A7
58
MAA_A8
179
MAA_A9
177
MAA_A10
70
MAA_A11
57
MAA_A12
176
MAA_A13
196
MAA_A14
174
173
SBS_A2
54
SBS_A1
190
SBS_A0
71
WE_A#
73
CAS_A#
74
RAS_A#
192
DQM_A0
125
126
DQM_A1
134
135
DQM_A2
146
147
DQM_A3
155
156
DQM_A4
202
203
DQM_A5
211
212
DQM_A6
223
224
DQM_A7
232
233
164
165
ODT_A0
195
ODT_A1
77
SCKE_A0
52
SCKE_A1
171
SCS_A#0
193
SCS_A#1
76
P_DDR0_A
185
N_DDR0_A
186
P_DDR1_A
137
N_DDR1_A
138
P_DDR2_A
220
N_DDR2_A
221
SMBCLK_DDR
120
SMBDATA_DDR
119
DIMM_VREF_A
1
239
240
101
DQS_A0 7
DQS_A#0 7
DQS_A1 7
DQS_A#1 7
DQS_A2 7
DQS_A#2 7
DQS_A3 7
DQS_A#3 7
DQS_A4 7
DQS_A#4 7
DQS_A5 7
DQS_A#5 7
DQS_A6 7
DQS_A#6 7
DQS_A7 7
DQS_A#7 7
MAA_A[0..14] 7,12
SBS_A2 7,12
SBS_A1 7,12
SBS_A0 7,12
WE_A# 7,12
CAS_A# 7,12
RAS_A# 7,12
DQM_A[0..7] 7
ODT_A0 7,12
ODT_A1 7,12
SCKE_A0 7,12
SCKE_A1 7,12
SCS_A#0 7,12
SCS_A#1 7,12
P_DDR0_A 7
N_DDR0_A 7
P_DDR1_A 7
N_DDR1_A 7
P_DDR2_A 7
N_DDR2_A 7
SMBCLK_DDR 11
SMBDATA_DDR 11
C507
C0.1U16Y0402
PLACE CLOSE TO DIMM PIN
ADDRESS:0A0H
DDR2 DIMM1
DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
DIMM2
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
161
162
167
VSS
222
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK1#(CK0#)
VSS
VSS
225
228
168
CB5
CB6
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
SCL
SDA
VREF
SA0
SA1
SA2
VSS
VSS
VSS
DDRII-240_black
231
234
237
CB7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
DQS_A0
7
DQS_A#0
6
DQS_A1
16
DQS_A#1
15
DQS_A2
28
DQS_A#2
27
DQS_A3
37
DQS_A#3
36
DQS_A4
84
DQS_A#4
83
DQS_A5
93
DQS_A#5
92
DQS_A6
105
DQS_A#6
104
DQS_A7
114
DQS_A#7
113
46
45
MAA_A0
188
MAA_A1
183
MAA_A2
63
MAA_A3
182
MAA_A4
61
MAA_A5
60
MAA_A6
180
MAA_A7
58
MAA_A8
179
MAA_A9
177
MAA_A10
70
MAA_A11
57
MAA_A12
176
MAA_A13
196
MAA_A14
174
173
SBS_A2
54
SBS_A1
190
SBS_A0
71
WE_A#
73
CAS_A#
74
RAS_A#
192
DQM_A0
125
126
DQM_A1
134
135
DQM_A2
146
147
DQM_A3
155
156
DQM_A4
202
203
DQM_A5
211
212
DQM_A6
223
224
DQM_A7
232
233
164
165
ODT_A2
195
ODT_A3
77
SCKE_A2
52
SCKE_A3
171
SCS_A#2
193
SCS_A#3
76
P_DDR3_A
185
N_DDR3_A
186
P_DDR4_A
137
N_DDR4_A
138
P_DDR5_A
220
N_DDR5_A
221
SMBCLK_DDR
120
SMBDATA_DDR
119
DIMM_VREF_A
1
VCC3
239
240
101
PLACE CLOSE TO DIMM PIN
ADDRESS: 0A2H
DDR2 DIMM2
ODT_A2 7,12
ODT_A3 7,12
SCKE_A2 7,12
SCKE_A3 7,12
SCS_A#2 7,12
SCS_A#3 7,12
P_DDR3_A 7
N_DDR3_A 7
P_DDR4_A 7
N_DDR4_A 7
P_DDR5_A 7
N_DDR5_A 7
C471
C0.1U16Y0402
68
19
102
55
NC
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NC
RC118RC0
NC/TEST
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
115
3
4
9
2
5
8
191
75
VDD051VDD156VDD262VDD372VDD478VDD5
VDD3
VSS
VSS
VSS
VSS
VSS
VSS
118
121
124
127
130
133
136
VSS
194
139
181
VDD6
VSS
142
175
VDD7
VSS
145
VDD8
VSS
170
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VSS
VSS
VSS
148
151
154
197
VDDQ469VDDQ7
VSS
VSS
VSS
157
160
163
172
VDDQ5
VSS
166
187
VDDQ6
VSS
169
184
VDDQ7
VSS
198
238
189
67
178
CB042CB143CB248CB349CB4
VDDQ8
VDDQ9
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
201
204
207
210
213
216
219
Close to Channel A Dimm
VCC_DDR
R487 1KR1%0402
5
DIMM_VREF_A SMBCLK_DDR
R488
1KR1%0402
4
SMBDATA_DDR
R529 33R0402-2
R528 33R0402-2
3
SMBCLK_ISO 18,24,27
SMBDATA_ISO 18,24,27
Title
Size Document Number Rev
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
DDR2 DIMM 1 & 2
MS-7245
1
10 35Friday, June 02, 2006
0D
of
5
4
VCC3
3
2
VCC3VCC_DDRVCC_DDR
1
DATA_B0
DATA_B1
DATA_B2
DATA_B3
DATA_B4
DATA_B5
DATA_B6
DATA_B7
DATA_B8
DATA_B9
DATA_B10
DATA_B11
DATA_B12
DATA_B13
DATA_B14
DATA_B15
DATA_B16
DATA_B17
DATA_B18
DATA_B19
DATA_B20
DATA_B21
DATA_B22
DATA_B23
DATA_B24
DATA_B25
DATA_B26
DATA_B27
DATA_B28
DATA_B29
DATA_B30
DATA_B31
DATA_B32
DATA_B33
DATA_B34
DATA_B35
DATA_B36
DATA_B37
DATA_B38
DATA_B39
DATA_B40
DATA_B41
DATA_B42
DATA_B43
DATA_B44
DATA_B45
DATA_B46
DATA_B47
DATA_B48
DATA_B49
DATA_B50
DATA_B51
DATA_B52
DATA_B53
DATA_B54
DATA_B55
DATA_B56
DATA_B57
DATA_B58
DATA_B59
DATA_B60
DATA_B61
DATA_B62
DATA_B63
DIMM3
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
3
DQ0
4
DQ1
9
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
2
VSS
5
VSS
8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DATA_B[0..63]7
D D
C C
B B
55
100
VSS
103
RC118RC0
VSS
19
102
NC
VSS
106
109
68
NC
VDD051VDD156VDD262VDD372VDD478VDD5
NC/TEST
VSS
VSS
VSS
VSS
112
115
118
121
VSS
191
194
181
175
75
170
197
172
187
184
189
67
178
VDD6
VDD7
VDD8
VDD3
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ469VDDQ7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
238
VDDSPD
VSS
VSS
213
216
CB042CB143CB248CB349CB4
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK1#(CK0#)
VSS
VSS
VSS
VSS
219
222
225
228
161
162
167
CB5
CB6
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A10_AP
A16/BA2
WE#
CAS#
RAS#
DM0/DQS9
NC/DQS9#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
SCL
SDA
VREF
VSS
VSS
VSS
DDRII-240_black
231
234
237
168
CB7
DQS_B0
7
DQS_B#0
6
DQS_B1
16
DQS_B#1
15
DQS_B2
28
DQS_B#2
27
DQS_B3
37
DQS_B#3
36
DQS_B4
84
DQS_B#4
83
DQS_B5
93
DQS_B#5
92
DQS_B6
105
DQS_B#6
104
DQS_B7
114
DQS_B#7
113
46
45
MAA_B0
188
A0
MAA_B1
183
A1
MAA_B2
63
A2
MAA_B3
182
A3
MAA_B4
61
A4
MAA_B5
60
A5
MAA_B6
180
A6
MAA_B7
58
A7
MAA_B8
179
A8
MAA_B9
177
A9
MAA_B10
70
MAA_B11
57
A11
MAA_B12
176
A12
MAA_B13
196
A13
MAA_B14
174
A14
173
A15
SBS_B2
54
SBS_B1
190
BA1
SBS_B0
71
BA0
WE_B#
73
CAS_B#
74
RAS_B#
192
DQM_B0
125
126
DQM_B1
134
135
DQM_B2
146
147
DQM_B3
155
156
DQM_B4
202
203
DQM_B5
211
212
DQM_B6
223
224
DQM_B7
232
233
164
165
ODT_B0
195
ODT_B1
77
SCKE_B0
52
SCKE_B1
171
SCS_B#0
193
SCS_B#1
76
P_DDR0_B
185
N_DDR0_B
186
P_DDR1_B
137
N_DDR1_B
138
P_DDR2_B
220
N_DDR2_B
221
SMBCLK_DDR
120
SMBDATA_DDR
119
DIMM_VREF_B
1
239
SA0
240
SA1
101
SA2
DQS_B0 7
DQS_B#0 7
DQS_B1 7
DQS_B#1 7
DQS_B2 7
DQS_B#2 7
DQS_B3 7
DQS_B#3 7
DQS_B4 7
DQS_B#4 7
DQS_B5 7
DQS_B#5 7
DQS_B6 7
DQS_B#6 7
DQS_B7 7
DQS_B#7 7
SBS_B2 7,12
SBS_B1 7,12
SBS_B0 7,12
WE_B# 7,12
CAS_B# 7,12
RAS_B# 7,12
DQM_B[0..7] 7
ODT_B0 7,12
ODT_B1 7,12
SCKE_B0 7,12
SCKE_B1 7,12
SCS_B#0 7,12
SCS_B#1 7,12
P_DDR0_B 7
N_DDR0_B 7
P_DDR1_B 7
P_DDR2_B 7
N_DDR2_B 7
VCC3
C534
C0.1U16Y0402
PLACE CLOSE TO DIMM PIN
ADDRESS: 0A4H
MAA_B[0..14] 7,12
SMBCLK_DDR 10
SMBDATA_DDR 10
DDR2 DIMM3
DATA_B0
DATA_B1
DATA_B2
DATA_B3
DATA_B4
DATA_B5
DATA_B6
DATA_B7
DATA_B8
DATA_B9
DATA_B10
DATA_B11
DATA_B12
DATA_B13
DATA_B14
DATA_B15
DATA_B16
DATA_B17
DATA_B18
DATA_B19
DATA_B20
DATA_B21
DATA_B22
DATA_B23
DATA_B24
DATA_B25
DATA_B26
DATA_B27
DATA_B28
DATA_B29
DATA_B30
DATA_B31
DATA_B32
DATA_B33
DATA_B35
DATA_B36
DATA_B37
DATA_B38
DATA_B39
DATA_B40
DATA_B41
DATA_B42
DATA_B43
DATA_B44
DATA_B45
DATA_B46
DATA_B47
DATA_B48
DATA_B49
DATA_B50
DATA_B51
DATA_B52
DATA_B53
DATA_B54
DATA_B55
DATA_B56
DATA_B57
DATA_B58
DATA_B59
DATA_B60
DATA_B61
DATA_B62
DATA_B63
DIMM4
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
161
162
167
VSS
222
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK1#(CK0#)
VSS
VSS
225
228
168
CB5
CB6
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
SCL
SDA
VREF
SA0
SA1
SA2
VSS
VSS
VSS
DDRII-240_black
231
234
237
CB7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
DQS_B0
7
DQS_B#0
6
DQS_B1
16
DQS_B#1
15
DQS_B2
28
DQS_B#2
27
DQS_B3
37
DQS_B#3
36
DQS_B4
84
DQS_B#4
83
DQS_B5
93
DQS_B#5
92
DQS_B6
105
DQS_B#6
104
DQS_B7
114
DQS_B#7
113
46
45
MAA_B0
188
MAA_B1
183
MAA_B2
63
MAA_B3
182
MAA_B4
61
MAA_B5
60
MAA_B6
180
MAA_B7
58
MAA_B8
179
MAA_B9
177
MAA_B10
70
MAA_B11
57
MAA_B12
176
MAA_B13
196
MAA_B14DATA_B34
174
173
SBS_B2
54
SBS_B1
190
SBS_B0
71
WE_B#
73
CAS_B#
74
RAS_B#
192
DQM_B0
125
126
DQM_B1
134
135
DQM_B2
146
147
DQM_B3
155
156
DQM_B4
202
203
DQM_B5
211
212
DQM_B6
223
224
DQM_B7
232
233
164
165
ODT_B2
195
ODT_B3
77
SCKE_B2
52
SCKE_B3
171
SCS_B#2
193
SCS_B#3
76
P_DDR3_B
185
N_DDR3_B
186
P_DDR4_B
137
N_DDR4_B
138
P_DDR5_B
220
N_DDR5_B
221
SMBCLK_DDR
120
SMBDATA_DDR
119
DIMM_VREF_B
1
VCC3
239
240
101
PLACE CLOSE TO DIMM PIN
ADDRESS: 0A6H
DDR2 DIMM4
ODT_B2 7,12
ODT_B3 7,12
SCKE_B2 7,12
SCKE_B3 7,12
SCS_B#2 7,12
SCS_B#3 7,12
P_DDR3_B 7
N_DDR3_B 7
P_DDR4_B 7
N_DDR4_B 7N_DDR1_B 7
P_DDR5_B 7
N_DDR5_B 7
C545
C0.1U16Y0402
68
19
102
55
NC
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NC
RC118RC0
NC/TEST
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
115
3
4
9
2
5
8
191
75
VDD051VDD156VDD262VDD372VDD478VDD5
VDD3
VSS
VSS
VSS
VSS
VSS
VSS
118
121
124
127
130
133
136
VSS
194
139
181
VDD6
VSS
142
175
VDD7
VSS
145
VDD8
VSS
170
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VSS
VSS
VSS
148
151
154
197
VDDQ469VDDQ7
VSS
VSS
VSS
157
160
163
172
VDDQ5
VSS
166
187
VDDQ6
VSS
169
184
VDDQ7
VSS
198
238
189
67
178
CB042CB143CB248CB349CB4
VDDQ8
VDDQ9
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
201
204
207
210
213
216
219
A A
5
Close to Channel B Dimm
VCC_DDR
R506 1KR1%0402
DIMM_VREF_B
R507
1KR1%0402
Title
Size Document Number Rev
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
DDR2 DIMM 3 & 4
MS-7245 0D
1
of
11 35Friday, June 02, 2006
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