MSI MS-7243 Schematics
5
4
3
2
1
MSI
D D
MS-7243 Ver:0A
CPU:
AMD 940M2
System Chipset:
NVIDIA CRUSH 51
NVIDIA MCP 51
On Board Chipset:
LPC Super I/O -- W83627EHF REV:H
LAN -- REALTEK 8100C/8110SB
AC'97 Codec --ALC655
BIOS --LPC FLASH ROM 4M
C C
Main Memory:
DDR * 2 (Max 2GB)
Expansion Slots:
PCI-E X 16 *1 --Mix PCI,PCI-Ex1
PWM:
Controller--Intersil ISL6566CR with Driver inside
B B
Title Page
Cover Sheet 1
Block Diagram
2
3GPIO SPEC
4,5,6AMD 940M2
System Memory
/ DDR Terminations
7,8
C51-G 9-11
MCP51 12-15
Blank
LAN RTL8100C/8110SB
PCIEx1/PCI
AC97 ALC655
VCC1.2 for C51G/VCC_DDRII
W627THF LPC I/O / BIOS
USB connectors
K8 PWM ISL6566CR
MS-6 ACPI Controller & MS-6+
KB/MS/LPT/COM
ATA 66/100/133 Connectors
ATX Connector / Front Panel
FAN / CPU Sensor
VGA
MANUAL PARTS
HISTORY
RESET MAP
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33POWER MAP
34POWER OK MAP
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Cover Sheet
Cover Sheet
Cover Sheet
Document Number
Document Number
Document Number
5
4
3
2
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
MS-7243
MS-7243
MS-7243
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
Tuesday, November 22, 2005
Tuesday, November 22, 2005
Tuesday, November 22, 2005
134
134
134
of
of
of
Rev
Rev
Rev
0A
0A
0A
5
4
3
2
1
BLOCK DIAGRAM
D D
C C
PRIMARY IDE-IBM slim type
X1 - SATA CONN
B B
PS2/KBRD CONN
PARALLEL CONN
SERIAL CONN
POWER
SUPPLY
CONNECTOR
PEX X1
ATA 133
INTEGRATED SATA 1/2
SIO
LPC SUPER I/O
W83627EHF
VREG
PCI EXPRESS
LPC BUS 33MHZ
LPC HDR
4MB FLASH
SOCKET 940
K8
NFORCE
CRUSH 51
468 BGA
NFORCE
MCP 51
508 BGA
HT 16X16 1GHZ
HT 8X8 1GHZ
128-BIT 400/533MHZ
AZAILIA/AC97
X8 USB2
VGA CONN
PCI 33MHZ
Realtek ALC 655
BACK PANEL CONN
USB2 PORTS 0-1
DOUBLE STACK
USB2 PORTS 2-3
X2/GBIT LAN
FRONT PANEL HDR
USB2 PORTS 4-5
USB2 PORTS 6-7
DDR SDRAM CONN 0
DDR SDRAM CONN 1
Realtek RTL8100C/8110SB
PCI SLOT 1
PCI SLOT 2
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
Block Diagram
Block Diagram
Block Diagram
MS-7243
MS-7243
MS-7243
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
Rev
Rev
Rev
0A
0A
0A
Tuesday, November 22, 2005
Tuesday, November 22, 2005
Tuesday, November 22, 2005
34
34
34
of
2
of
2
of
2
5
4
3
2
1
C-51G GPIO FUNCTION
D D
NAME Function Description
GPIO_1
GPIO_2/CPU_SLP*
GPIO_3/CPU_CLKRUN*
GPIO_4/SUS_STAT* MII_phy reset
C C
VSET2 VSET1 VSET0 Voltage
B B
NC
NC
BIOS WRITE PROTECT
0
(Reserved)
1.65V
1.6V
1.55V
Vcore Adjust
1
11
11
00
0
1 1 1 1.5V
SIO GPIO FUNCTION
NAME Function Description
GPSA1 VSET0 ( CPU Vcore Control )
GPSB1
GPSB2
GP13
GP14
GP16
GP17
GP32
GP33
GP44
GP45
GP57/PSOUT#
GP56/PSIN
GP53/PSON# PS_ON# (ATX_PWR_ON#)
VSET1 ( CPU Vcore Control )
VSET2 ( CPU Vcore Control )
FOR BIOS
FOR BIOS
VSET2 ( CPU Vcore Control )
NC
NC
NC
NC
NC
PSOUT# (PWRBTN#)
PSIN (FP_RST#)
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
GPIO SPEC
GPIO SPEC
GPIO SPEC
MS-7243
MS-7243
MS-7243
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
0A
0A
0A
Monday, November 21, 2005
Monday, November 21, 2005
Monday, November 21, 2005
of
of
of
334
334
334
5
3VDUAL
CPU_PWRGD
D D
CPU_PWRGD[9]
3VDUAL
HT_STOP#
HT_STOP#[9]
3VDUAL
CPU_RST#
CPU_RST#[9]
U23D
U23D
147
147
1 2
147
3 4
147
5 6
U23A
U23A
M2_CPU_PWRGD
LVC07A_SOIC14
LVC07A_SOIC14
U23B
U23B
M2_HT_STOP#
LVC07A_SOIC14
LVC07A_SOIC14
U23C
U23C
M2_CPU_RST#
LVC07A_SOIC14
LVC07A_SOIC14
9 8
LVC07A_SOIC14
147
LVC07A_SOIC14
U23E
U23E
C C
11 10
LVC07A_SOIC14
LVC07A_SOIC14
U23F
U23F
147
13 12
LVC07A_SOIC14
LVC07A_SOIC14
HT_CADIN_H[0..15][9]
HT_CADIN_L[0..15][9]
HT_CADOUT_H[0..15][9]
HT_CADOUT_L[0..15][9]
VCC1_2HT
HT_CLKIN_H1[9]
HT_CLKIN_L1[9]
HT_CLKIN_H0[9]
HT_CLKIN_L0[9]
HT_CTLIN_H0[9]
HT_CTLIN_L0[9]
B B
15:5:5:15
A A
HT_CADIN_H[0..15]
HT_CADIN_L[0..15]
HT_CADOUT_H[0..15]
HT_CADOUT_L[0..15]
20:5:5:20
R383 49.9R1%0402R383 49.9R1%0402
R384 49.9R1%0402R384 49.9R1%0402
HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
5
N6
P6
N3
N2
V4
V5
U1
V1
U6
V6
T4
T5
R6
T6
P4
P5
M4
M5
L6
M6
K4
K5
J6
K6
U3
U2
R1
T1
R3
R2
N1
P1
L1
M1
L3
L2
J1
K1
J3
J2
L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKIN_H(0)
L0_CLKIN_L(0)
L0_CTLIN_H(1)
L0_CTLIN_L(1)
L0_CTLIN_H(0)
L0_CTLIN_L(0)
L0_CADIN_H(15)
L0_CADIN_L(15)
L0_CADIN_H(14)
L0_CADIN_L(14)
L0_CADIN_H(13)
L0_CADIN_L(13)
L0_CADIN_H(12)
L0_CADIN_L(12)
L0_CADIN_H(11)
L0_CADIN_L(11)
L0_CADIN_H(10)
L0_CADIN_L(10)
L0_CADIN_H(9)
L0_CADIN_L(9)
L0_CADIN_H(8)
L0_CADIN_L(8)
L0_CADIN_H(7)
L0_CADIN_L(7)
L0_CADIN_H(6)
L0_CADIN_L(6)
L0_CADIN_H(5)
L0_CADIN_L(5)
L0_CADIN_H(4)
L0_CADIN_L(4)
L0_CADIN_H(3)
L0_CADIN_L(3)
L0_CADIN_H(2)
L0_CADIN_L(2)
L0_CADIN_H(1)
L0_CADIN_L(1)
L0_CADIN_H(0)
L0_CADIN_L(0)
U20A
U20A
HYPERTRANSPORT
HYPERTRANSPORT
L0_CLKOUT_H(1)
L0_CLKOUT_H(0)
L0_CTLOUT_H(1)
L0_CTLOUT_H(0)
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
L0_CLKOUT_L(1)
L0_CLKOUT_L(0)
L0_CTLOUT_L(1)
L0_CTLOUT_L(0)
CPU_CLK[9]
CPU_CLK#[9]
C0.1U16Y0402
C0.1U16Y0402
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
4
From MS6+
C586
C586
C1000P16X0402
C1000P16X0402
20:5:5:20
4
VDDA_25
FB28 0.18U450m_1210FB28 0.18U450m_1210
C587
C587
HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
10u/10V/8
10u/10V/8
C583
C583
392p
392p
C584
C584
392p
392p
VCC_DDRII
HT_CLKOUT_H1 [9]
HT_CLKOUT_L1 [9]
HT_CLKOUT_H0 [9]
HT_CLKOUT_L0 [9]
C579
C579
R374
R374
169R1%0402
169R1%0402
COREFB_H[23]
COREFB_L[23]
R375
R375
16.9R1%0603
16.9R1%0603
VCC_DDRII
R380
R380
16.9R1%0603
16.9R1%0603
SM_THERMDC[21]
SM_THERMDA[21]
TP16TP16
TP17TP17
HT_CTLOUT_H0 [9]
HT_CTLOUT_L0 [9]
15:5:5:15
C580
C580
X_475P/0805
X_475P/0805
CPU_SIC
CPU_SID
TP5TP5
R377 39.2R1%0402R377 39.2R1%0402
R379 39.2R1%0402R379 39.2R1%0402
TP7TP7
TP9TP9
TP11TP11
TP13TP13
TP14TP14
VCC_DDRII
250mA
C581
C581
0.22u/16V/6/X7R
0.22u/16V/6/X7R
C582
C582
C3300P50X0402
C3300P50X0402
CPUCLKIN
CPUCLKIN#
M2_CPU_PWRGD
M2_HT_STOP#
M2_CPU_RST#
M2_CPU_PRESENT
CPU_SIC
CPU_SID
COREFB_H
COREFB_L
M2_CPU_VTTSENSE
CPU_M_VREF
M2_CPU_TEST25_H
M2_CPU_TEST25_L
M2_CPU_TEST19
M2_CPU_TEST18
R385 1KR0402R385 1KR0402
R388 300R0402R388 300R0402
R389 510R0402R389 510R0402
R390 300R0402R390 300R0402
R391 300R0402R391 300R0402
R392 300R0402R392 300R0402
R393 300R0402R393 300R0402
R394 300R0402R394 300R0402
R403 300R0402R403 300R0402
R395 300R0402R395 300R0402
R396 510R0402R396 510R0402
R397 300R0402R397 300R0402
R398 300R0402R398 300R0402
M_ZN
M_ZP
3
C10
D10
A8
B8
C9
D8
C7
AL3
AL6
AK6
AL10
AJ10
AH10
AL9
A5
G2
G1
E12
F12
AH11
AJ11
A10
B10
F10
E9
AJ7
F6
D6
E7
F8
C5
AH9
E5
AJ5
AG9
AG8
AH7
AJ6
M2_CPU_PRESENT
M2_CPU_TEST26
M2_CPU_TEST25_H
CPU_SIC
CPU_SID
M2_CPUVID1
M2_CPU_THRIP#
M2_CPU_PROCHOT#
CPU_SIC
M2_CPU_TEST21
M2_CPU_TEST25_L
M2_CPU_TEST19
M2_CPU_TEST18
3
U20D
U20D
MISC
MISC
VDDA1
VDDA2
CLKIN_H
CLKIN_L
PWROK
LDTSTOP_L
RESET_L
CPU_PRESENT_L
SIC
SID
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
VTT_SENSE
M_VREF
M_ZN
M_ZP
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
TEST5
TEST4
TEST3
TEST2
VCC_DDRII
VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)
THERMTRIP_L
PROCHOT_L
DBRDY
VDDIO_FB_H
VDDIO_FB_L
PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
RN35
RN35
1
2
3
4
5
6
7
8
8P4R-330R0402
8P4R-330R0402
D2
D1
C1
E3
E2
E1
AK7
AL7
AK10
TDO
For CPU HDT debug port
B6
AK11
AL11
F1
V8
V7
CPU_FBCLKOUT_H
C11
CPU_FBCLKOUT_L
D11
M2_CPU_TEST24
AK8
M2_CPU_TEST23
AH8
M2_CPU_TEST22
AJ9
M2_CPU_TEST21
AL8
M2_CPU_TEST20
AJ8
J10
H9
AK9
M2_CPU_TEST26
AK5
G7
D4
TP18TP18
TP19TP19
M2_CPU_PWRGD
M2_HT_STOP#
M2_CPU_RST#
Need level shift circuit
M2_CPUVID5
TP4TP4
M2_CPUVID4
M2_CPUVID3
M2_CPUVID2
M2_CPUVID1
M2_CPUVID0
M2_CPU_THRIP#
M2_CPU_PROCHOT#
R425 0R0402R425 0R0402
M2_VDDIO_FB_H
M2_VDDIO_FB_H
M2_VDDIO_FB_L
CPU_PSI_L
CPU_L0_REF1
CPU_L0_REF0
TP24TP24
TP25TP25
TP6TP6
C585 C1000P50X0402C585 C1000P50X0402
C588 C1000P50X0402C588 C1000P50X0402
TP8TP8
TP10TP10
TP12TP12
TP15TP15
2
VCC_DDRII
2
R37644.2RST R37644.2RST
R37844.2RST R37844.2RST
R381
R381
80.6RST
80.6RST
VCC1_2HT
1
VCC_DDRII
M2_CPUVID0
VCC_DDRII
M2_CPUVID1
VCC_DDRII
M2_CPUVID2
VCC_DDRII
M2_CPUVID3
VCC_DDRII
M2_CPUVID4
VCC_DDRII
VCC_DDRII
M2_CPU_PROCHOT# CPU_PROCHOT#
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
U22A
U22A
147
1 2
LVC07A_SOIC14
LVC07A_SOIC14
U22B
U22B
147
3 4
LVC07A_SOIC14
LVC07A_SOIC14
U22C
U22C
147
5 6
LVC07A_SOIC14
LVC07A_SOIC14
U22D
U22D
147
9 8
LVC07A_SOIC14
LVC07A_SOIC14
U22E
U22E
147
11 10
LVC07A_SOIC14
LVC07A_SOIC14
U22F
U22F
147
CPU_THRIP#M2_CPU_THRIP#
13 12
LVC07A_SOIC14
LVC07A_SOIC14
3VDUAL
R382
R382
X_4.7KR0402
X_4.7KR0402
G
D S
Q41
Q41
X_N-2N7002_SOT23
X_N-2N7002_SOT23
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
AMD K8 939 PART 1
AMD K8 939 PART 1
AMD K8 939 PART 1
MS-7243
MS-7243
MS-7243
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
VID0 [21,23]
VID1 [21,23]
VID2 [21,23]
VID3 [21,23]
VID4 [21,23]
CPU_THRIP# [12]
CPU_PROCHOT#
Rev
Rev
Rev
Wednesday, November 23, 2005
Wednesday, November 23, 2005
Wednesday, November 23, 2005
of
434
of
434
of
434
0A
0A
0A
5
U20B
U20B
MEMORY INTERFACE A
AG21
AG20
G19
H19
U27
U26
AC25
AA24
AC28
AE20
AE19
G20
G21
V27
W27
AD27
AA25
AC27
AB25
AB27
AA26
N25
Y27
AA27
L27
M25
M27
N24
AC26
N26
P25
Y25
N27
R24
P27
R25
R26
R27
T25
U25
T27
W24
AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
D29
C29
C25
D25
E19
F19
F15
G15
AF15
AF19
AJ25
AH29
B29
E24
E18
H15
MA0_CLK_H(2)
MA0_CLK_L(2)
MA0_CLK_H(1)
MA0_CLK_L(1)
MA0_CLK_H(0)
MA0_CLK_L(0)
MA0_CS_L(1)
MA0_CS_L(0)
MA0_ODT(0)
MA1_CLK_H(2)
MA1_CLK_L(2)
MA1_CLK_H(1)
MA1_CLK_L(1)
MA1_CLK_H(0)
MA1_CLK_L(0)
MA1_CS_L(1)
MA1_CS_L(0)
MA1_ODT(0)
MA_CAS_L
MA_WE_L
MA_RAS_L
MA_BANK(2)
MA_BANK(1)
MA_BANK(0)
MA_CKE(1)
MA_CKE(0)
MA_ADD(15)
MA_ADD(14)
MA_ADD(13)
MA_ADD(12)
MA_ADD(11)
MA_ADD(10)
MA_ADD(9)
MA_ADD(8)
MA_ADD(7)
MA_ADD(6)
MA_ADD(5)
MA_ADD(4)
MA_ADD(3)
MA_ADD(2)
MA_ADD(1)
MA_ADD(0)
MA_DQS_H(7)
MA_DQS_L(7)
MA_DQS_H(6)
MA_DQS_L(6)
MA_DQS_H(5)
MA_DQS_L(5)
MA_DQS_H(4)
MA_DQS_L(4)
MA_DQS_H(3)
MA_DQS_L(3)
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)
MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)
MEMORY INTERFACE A
M_CHA_CLKH2[7,8]
M_CHA_CLKL2[7,8]
M_CHA_CLKH1[7,8]
D D
C C
B B
M_CHA_CLKL1[7,8]
M_CHA_CLKH0[7,8]
M_CHA_CLKL0[7,8]
M_CHA_CS1[7,8]
M_CHA_CS0[7,8]
M_CHA_ODT0[7,8]
M_CHA_CAS[7,8]
M_CHA_WE[7,8]
M_CHA_RAS[7,8]
M_CHA_BANK2[7,8]
M_CHA_BANK1[7,8]
M_CHA_BANK0[7,8]
M_CHA_CKE0[7,8]
M_CHA_DM[0..8][7]
M_CHA_DQS_L[0..8][7]
M_CHA_DQS_H[0..8][7]
M_CHA_MA[0..15][7,8]
M_CHA_DQ[0..63][7]
M_CHA_CLKH2
M_CHA_CLKL2
M_CHA_CLKH1
M_CHA_CLKL1
M_CHA_CLKH0
M_CHA_CLKL0
M_CHA_CS1
M_CHA_CS0
M_CHA_ODT0
M_CHA_ODT1
TP20TP20 TP21TP21
M_CHA_CAS
M_CHA_WE
M_CHA_RAS
M_CHA_BANK2
M_CHA_BANK1
M_CHA_BANK0
M_CHA_CKE1
TP22TP22 TP23TP23
M_CHA_CKE0
M_CHA_MA15
M_CHA_MA14
M_CHA_MA13
M_CHA_MA12
M_CHA_MA11
M_CHA_MA10
M_CHA_MA9
M_CHA_MA8
M_CHA_MA7
M_CHA_MA6
M_CHA_MA5
M_CHA_MA4
M_CHA_MA3
M_CHA_MA2
M_CHA_MA1
M_CHA_MA0
M_CHA_DQS_H7
M_CHA_DQS_L7
M_CHA_DQS_H6
M_CHA_DQS_L6
M_CHA_DQS_H5
M_CHA_DQS_L5
M_CHA_DQS_H4
M_CHA_DQS_L4
M_CHA_DQS_H3
M_CHA_DQS_L3
M_CHA_DQS_H2
M_CHA_DQS_L2
M_CHA_DQS_H1
M_CHA_DQS_L1
M_CHA_DQS_H0
M_CHA_DQS_L0
M_CHA_DM7
M_CHA_DM6
M_CHA_DM5
M_CHA_DM4
M_CHA_DM3
M_CHA_DM2
M_CHA_DM1
M_CHA_DM0
MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)
MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)
MA_DQS_H(8)
MA_DQS_L(8)
MA_DM(8)
MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)
AE14
AG14
AG16
AD17
AD13
AE13
AG15
AE16
AG17
AE18
AD21
AG22
AE17
AF17
AF21
AE21
AF23
AE23
AJ26
AG26
AE22
AG23
AH25
AF25
AJ28
AJ29
AF29
AE26
AJ27
AH27
AG29
AF27
E29
E28
D27
C27
G26
F27
C28
E27
F25
E25
E23
D23
E26
C26
G23
F23
E22
E21
F17
G17
G22
F21
G18
E17
G16
E15
G13
H13
H17
E16
E14
G14
J28
J27
J25
K25
J26
G28
G27
L24
K27
H29
H27
4
M_CHA_DQ63
M_CHA_DQ62
M_CHA_DQ61
M_CHA_DQ60
M_CHA_DQ59
M_CHA_DQ58
M_CHA_DQ57
M_CHA_DQ56
M_CHA_DQ55
M_CHA_DQ54
M_CHA_DQ53
M_CHA_DQ52
M_CHA_DQ51
M_CHA_DQ50
M_CHA_DQ49
M_CHA_DQ48
M_CHA_DQ47
M_CHA_DQ46
M_CHA_DQ45
M_CHA_DQ44
M_CHA_DQ43
M_CHA_DQ42
M_CHA_DQ41
M_CHA_DQ40
M_CHA_DQ39
M_CHA_DQ38
M_CHA_DQ37
M_CHA_DQ36
M_CHA_DQ35
M_CHA_DQ34
M_CHA_DQ33
M_CHA_DQ32
M_CHA_DQ31
M_CHA_DQ30
M_CHA_DQ29
M_CHA_DQ28
M_CHA_DQ27
M_CHA_DQ26
M_CHA_DQ25
M_CHA_DQ24
M_CHA_DQ23
M_CHA_DQ22
M_CHA_DQ21
M_CHA_DQ20
M_CHA_DQ19
M_CHA_DQ18
M_CHA_DQ17
M_CHA_DQ16
M_CHA_DQ15
M_CHA_DQ14
M_CHA_DQ13
M_CHA_DQ12
M_CHA_DQ11
M_CHA_DQ10
M_CHA_DQ9
M_CHA_DQ8
M_CHA_DQ7
M_CHA_DQ6
M_CHA_DQ5
M_CHA_DQ4
M_CHA_DQ3
M_CHA_DQ2
M_CHA_DQ1
M_CHA_DQ0
M_CHA_DQS_H8
M_CHA_DQS_L8
M_CHA_DM8
M_CHA_MEC7
M_CHA_MEC6
M_CHA_MEC5
M_CHA_MEC4
M_CHA_MEC3
M_CHA_MEC2
M_CHA_MEC1
M_CHA_MEC0
M_CHA_MEC7 [7]
M_CHA_MEC6 [7]
M_CHA_MEC5 [7]
M_CHA_MEC4 [7]
M_CHA_MEC3 [7]
M_CHA_MEC2 [7]
M_CHA_MEC1 [7]
M_CHA_MEC0 [7]
3
VDD_VTT_SUS_CPU is connected to the VDD_VTT_SUS power
supply through the package or on the die. It is only connected
on the board to decoupling near the CPU package.
M_CHB_CLKH2
M_CHB_CLKH2[7,8]
M_CHB_CLKL2[7,8]
M_CHB_CLKH1[7,8]
M_CHB_CLKL1[7,8]
M_CHB_CLKH0[7,8]
M_CHB_CLKL0[7,8]
M_CHB_CS1[7,8]
M_CHB_CS0[7,8]
M_CHB_ODT0[7,8]
M_CHB_ODT1
M_CHB_CAS[7,8]
M_CHB_WE[7,8]
M_CHB_RAS[7,8]
M_CHB_BANK2[7,8]
M_CHB_BANK1[7,8]
M_CHB_BANK0[7,8]
M_CHB_CKE0[7,8]
M_CHB_CLKL2
M_CHB_CLKH1
M_CHB_CLKL1
M_CHB_CLKH0
M_CHB_CLKL0
M_CHB_CS1
M_CHB_CS0
M_CHB_ODT0
M_CHB_CAS
M_CHB_WE
M_CHB_RAS
M_CHB_BANK2
M_CHB_BANK1
M_CHB_BANK0
M_CHB_CKE1
M_CHB_CKE0
M_CHB_MA15
M_CHB_MA14
M_CHB_MA13
M_CHB_MA12
M_CHB_MA11
M_CHB_MA10
M_CHB_MA9
M_CHB_MA8
M_CHB_MA7
M_CHB_MA6
M_CHB_MA5
M_CHB_MA4
M_CHB_MA3
M_CHB_MA2
M_CHB_MA1
M_CHB_MA0
M_CHB_DQS_H7
M_CHB_DQS_L7
M_CHB_DQS_H6
M_CHB_DQS_L6
M_CHB_DQS_H5
M_CHB_DQS_L5
M_CHB_DQS_H4
M_CHB_DQS_L4
M_CHB_DQS_H3
M_CHB_DQS_L3
M_CHB_DQS_H2
M_CHB_DQS_L2
M_CHB_DQS_H1
M_CHB_DQS_L1
M_CHB_DQS_H0
M_CHB_DQS_L0
M_CHB_DM7
M_CHB_DM6
M_CHB_DM5
M_CHB_DM4
M_CHB_DM3
M_CHB_DM2
M_CHB_DM1
M_CHB_DM0
AJ19
AK19
A18
A19
U31
U30
AE30
AC31
AD29
AL19
AL18
C19
D19
W29
W28
AE29
AB31
AD31
AC29
AC30
AB29
N31
AA31
AA28
M31
M29
N28
N29
AE31
N30
P29
AA29
P31
R29
R28
R31
R30
T31
T29
U29
U28
AA30
AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29
D31
C31
C24
C23
D17
C17
C14
C13
AJ14
AH17
AJ23
AK29
C30
A23
B17
B13
M_CHB_DM[0..8][7]
M_CHB_DQS_L[0..8][7]
M_CHB_DQS_H[0..8][7]
M_CHB_MA[0..15][7,8]
M_CHB_DQ[0..63][7]
MB0_CLK_H(2)
MB0_CLK_L(2)
MB0_CLK_H(1)
MB0_CLK_L(1)
MB0_CLK_H(0)
MB0_CLK_L(0)
MB0_CS_L(1)
MB0_CS_L(0)
MB0_ODT(0)
MB1_CLK_H(2)
MB1_CLK_L(2)
MB1_CLK_H(1)
MB1_CLK_L(1)
MB1_CLK_H(0)
MB1_CLK_L(0)
MB1_CS_L(1)
MB1_CS_L(0)
MB1_ODT(0)
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK(2)
MB_BANK(1)
MB_BANK(0)
MB_CKE(1)
MB_CKE(0)
MB_ADD(15)
MB_ADD(14)
MB_ADD(13)
MB_ADD(12)
MB_ADD(11)
MB_ADD(10)
MB_ADD(9)
MB_ADD(8)
MB_ADD(7)
MB_ADD(6)
MB_ADD(5)
MB_ADD(4)
MB_ADD(3)
MB_ADD(2)
MB_ADD(1)
MB_ADD(0)
MB_DQS_H(7)
MB_DQS_L(7)
MB_DQS_H(6)
MB_DQS_L(6)
MB_DQS_H(5)
MB_DQS_L(5)
MB_DQS_H(4)
MB_DQS_L(4)
MB_DQS_H(3)
MB_DQS_L(3)
MB_DQS_H(2)
MB_DQS_L(2)
MB_DQS_H(1)
MB_DQS_L(1)
MB_DQS_H(0)
MB_DQS_L(0)
MB_DM(7)
MB_DM(6)
MB_DM(5)
MB_DM(4)
MB_DM(3)
MB_DM(2)
MB_DM(1)
MB_DM(0)
U20C
U20C
MEMORY INTERFACE B
MEMORY INTERFACE B
MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)
MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)
MB_DQS_H(8)
MB_DQS_L(8)
MB_DM(8)
MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)
AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
2
M_CHB_DQ63
M_CHB_DQ62
M_CHB_DQ61
M_CHB_DQ60
M_CHB_DQ59
M_CHB_DQ58
M_CHB_DQ57
M_CHB_DQ56
M_CHB_DQ55
M_CHB_DQ54
M_CHB_DQ53
M_CHB_DQ52
M_CHB_DQ51
M_CHB_DQ50
M_CHB_DQ49
M_CHB_DQ48
M_CHB_DQ47
M_CHB_DQ46
M_CHB_DQ45
M_CHB_DQ44
M_CHB_DQ43
M_CHB_DQ42
M_CHB_DQ41
M_CHB_DQ40
M_CHB_DQ39
M_CHB_DQ38
M_CHB_DQ37
M_CHB_DQ36
M_CHB_DQ35
M_CHB_DQ34
M_CHB_DQ33
M_CHB_DQ32
M_CHB_DQ31
M_CHB_DQ30
M_CHB_DQ29
M_CHB_DQ28
M_CHB_DQ27
M_CHB_DQ26
M_CHB_DQ25
M_CHB_DQ24
M_CHB_DQ23
M_CHB_DQ22
M_CHB_DQ21
M_CHB_DQ20
M_CHB_DQ19
M_CHB_DQ18
M_CHB_DQ17
M_CHB_DQ16
M_CHB_DQ15
M_CHB_DQ14
M_CHB_DQ13
M_CHB_DQ12
M_CHB_DQ11
M_CHB_DQ10
M_CHB_DQ9
M_CHB_DQ8
M_CHB_DQ7
M_CHB_DQ6
M_CHB_DQ5
M_CHB_DQ4
M_CHB_DQ3
M_CHB_DQ2
M_CHB_DQ1
M_CHB_DQ0
M_CHB_DQS_H8
M_CHB_DQS_L8
M_CHB_DM8
M_CHB_MEC7
M_CHB_MEC6
M_CHB_MEC5
M_CHB_MEC4
M_CHB_MEC3
M_CHB_MEC2
M_CHB_MEC1
M_CHB_MEC0
M_CHB_MEC7 [7]
M_CHB_MEC6 [7]
M_CHB_MEC5 [7]
M_CHB_MEC4 [7]
M_CHB_MEC3 [7]
M_CHB_MEC2 [7]
M_CHB_MEC1 [7]
M_CHB_MEC0 [7]
1
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
AMD K8 939 PART 2
AMD K8 939 PART 2
AMD K8 939 PART 2
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
MS-7243
MS-7243
MS-7243
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Wednesday, November 23, 2005
Wednesday, November 23, 2005
Wednesday, November 23, 2005
Rev
Rev
Rev
0A
0A
0A
of
534
of
534
of
534
5
4
3
2
1
AK20
AK22
AK24
AK26
AK28
AK30
AL5
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18
H22
H24
H26
H28
H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
Y18
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
VCCPVCCPVCCP
A4
VDD1
A6
VDD2
AA8
VDD3
AA10
VDD4
AA12
VDD5
AA14
VDD6
AA16
VDD7
AA18
VDD8
AB7
VDD9
AB9
VDD10
AB11
VDD11
AC4
VDD12
AC5
VDD13
AC8
VDD14
AC10
VDD15
AD2
VDD16
AD3
VDD17
AD7
VDD18
AD9
VDD19
AE10
VDD20
AF7
VDD21
AF9
VDD22
AG4
VDD23
AG5
VDD24
AG7
VDD25
AH2
VDD26
AH3
VDD27
B3
VDD28
B5
VDD29
B7
VDD30
C2
VDD31
C4
VDD32
C6
VDD33
C8
VDD34
D3
VDD35
D5
VDD36
D7
VDD37
D9
VDD38
E4
VDD39
E6
VDD40
E8
VDD41
E10
VDD42
F5
VDD43
F7
VDD44
F9
VDD45
F11
VDD46
G6
VDD47
G8
VDD48
G10
VDD49
G12
VDD50
H7
VDD51
H11
VDD52
H23
VDD53
J8
VDD54
J12
VDD55
J14
VDD56
J16
VDD57
J18
VDD58
J20
VDD59
J22
VDD60
J24
VDD61
K7
VDD62
K9
VDD63
K11
VDD64
K13
VDD65
K15
VDD66
K17
VDD67
K19
VDD68
K21
VDD69
K23
VDD70
L4
VDD71
L5
VDD72
L8
VDD73
L10
VDD74
L12
VDD75
Y17
VDD150
Y19
VDD151
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
AMD K8 939 PART 3
AMD K8 939 PART 3
AMD K8 939 PART 3
MS-7243
MS-7243
MS-7243
U20F
U20F
VDD1
VDD1
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS240
VSS241
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, November 23, 2005
Wednesday, November 23, 2005
Wednesday, November 23, 2005
Sheet
Sheet
Sheet
634
634
634
1
A3
A7
A9
A11
AA4
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE9
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
Y14
Y16
Rev
Rev
Rev
0A
0A
0A
of
of
of
U20G
U20H
U20H
VDD3
VDD3
AA20
VDD1
AA22
VDD2
AB13
C0.22U10Y0402
D D
C C
B B
C536C0.22U10Y0402 C536C0.22U10Y0402
1 2
C537
C537
1 2
C0.22U10Y0402
C0.22U10Y0402
C0.22U10Y0402
VCC1_2HT
1.5A for 2.0G
C539
C539
C538
C538
1 2
1 2
C0.22U10Y0402
C0.22U10Y0402
VTT_DDRII VTT_DDRII
VCC_DDRII
AJ4
VLDT_A1
AJ3
VLDT_A2
AJ2
VLDT_A3
AJ1
VLDT_A4
D12
VTT1
C12
VTT2
B12
VTT3
A12
VTT4
AB24
VDDIO1
AB26
VDDIO2
AB28
VDDIO3
AB30
VDDIO4
AC24
VDDIO5
AD26
VDDIO6
AD28
VDDIO7
AD30
VDDIO8
AF30
VDDIO9
M24
VDDIO10
M26
VDDIO11
M28
VDDIO12
M30
VDDIO13
P24
VDDIO14
P26
VDDIO15
P28
VDDIO16
P30
VDDIO17
T24
VDDIO18
T26
VDDIO19
T28
VDDIO20
T30
VDDIO21
V25
VDDIO22
V26
VDDIO23
V28
VDDIO24
V30
VDDIO25
Y24
VDDIO26
Y26
VDDIO27
Y28
VDDIO28
Y29
VDDIO29
X_HEATSINK_RM
X_HEATSINK_RM
8
1
5
6
7
16
15
14
3
13
C0.22U10Y0402
C0.22U10Y0402
U20I
U20I
VDDIO
VDDIO
H6
VLDT_B1
H5
VLDT_B2
H2
VLDT_B3
H1
VLDT_B4
AK12
VTT5
AJ12
VTT6
AH12
VTT7
AG12
VTT8
AL12
VTT9
K24
VSS1
K26
VSS2
K28
VSS3
K30
VSS4
L7
VSS5
L9
VSS6
L11
VSS7
L13
VSS8
L15
VSS9
L17
VSS10
L19
VSS11
L21
VSS12
L23
VSS13
M8
VSS14
M10
VSS15
M12
VSS16
M14
VSS17
M16
VSS18
M18
VSS19
M20
VSS20
M22
VSS21
N4
VSS22
N5
VSS23
N7
VSS24
N9
VSS25
N11
VSS26
N13
VSS27
N15
VSS28
U21
U21
9
2
10
11
12
18
19
20
4
17
VLDT_B
C540
C540
1 2
C0.22U10Y0402
C0.22U10Y0402
C0.22U10Y0402
C0.22U10Y0402
C541
C541
1 2
C542
C542
1 2
C0.22U10Y0402
C0.22U10Y0402
VTT_DDRII
C543
C543
1 2
C563
C563
0.22U/16V/6/X7R/B
0.22U/16V/6/X7R/B
C564
C564
0.22U/16V/6/X7R/B
0.22U/16V/6/X7R/B
VDD3
AB15
VDD4
AB17
VDD5
AB19
VDD6
AB21
VDD7
AB23
VDD8
AC12
VDD9
AC14
VDD10
AC16
VDD11
AC18
VDD12
AC20
VDD13
AC22
VDD14
AD11
VDD15
AD23
VDD16
AE12
VDD17
AF11
VDD18
L20
VDD19
L22
VDD20
M21
VDD21
M23
VDD22
N20
VDD23
N22
VDD24
P21
VDD25
P23
VDD26
R22
VDD27
T23
VDD28
U22
VDD29
V23
VDD30
W22
VDD31
Y23
VDD32
5
GND
6
GND
7
GND
8
GND
C562
C562
0.22U/16V/6/X7R/B
0.22U/16V/6/X7R/B
Bottomside Decoupling
VCCP
C546
C545
C545
10U/10V/1206
10U/10V/1206
5
C560
C560
475P/0805
475P/0805
C546
10U/10V/1206
10U/10V/1206
C544
C544
10U/10V/1206
A A
10U/10V/1206
VCC_DDRII
C559
C559
475P/0805
475P/0805
C547
C547
10U/10V/1206
10U/10V/1206
C561
C561
0.22U/16V/6/X7R/B
0.22U/16V/6/X7R/B
C548
C548
10U/10V/1206
10U/10V/1206
C549
C549
10U/10V/1206
10U/10V/1206
C550
C550
0.22U/16V/6/X7R/B
VCC_DDRII
C551
C551
0.22U/16V/6/X7R/B
0.22U/16V/6/X7R/B
475P/0805
475P/0805
C565
C565
0.22U/16V/6/X7R
0.22U/16V/6/X7R
4
C566
C566
C552
C552
0.22U/16V/6/X7R/B
0.22U/16V/6/X7R/B
0.22U/16V/6/X7R/B
0.22U/16V/6/X7R/B
C568
C568
475P/0805
475P/0805
C567
C567
475P/0805
475P/0805
C553
C553
C569
C569
475P/0805
475P/0805
C554
C554
0.22U/16V/6/X7R/B
0.22U/16V/6/X7R/B
C555
C555
0.22U/16V/6/X7R/B
0.22U/16V/6/X7R/B
VTT_DDRII
C570
C570
475P/0805
475P/0805
C556
C556
10U/10V/8
10U/10V/8
C571
C571
0.22U/16V/6/X7R
0.22U/16V/6/X7R
10U/10V/8
10U/10V/8
C572
C572
0.22U/16V/6/X7R
0.22U/16V/6/X7R
10U/10V/8
10U/10V/80.22U/16V/6/X7R/B
C557
C557
3
N17
VSS1
N19
VSS2
N21
VSS3
N23
VSS4
P2
VSS5
P3
VSS6
P8
VSS7
P10
VSS8
P12
VSS9
P14
VSS10
P16
VSS11
P18
VSS12
P20
VSS13
P22
VSS14
R7
VSS15
R9
VSS16
R11
VSS17
R13
VSS18
R15
VSS19
R17
VSS20
R19
VSS21
R21
VSS22
R23
VSS23
T8
VSS24
T10
VSS25
T12
VSS26
T14
VSS27
T16
VSS28
T18
VSS29
T20
VSS30
T22
VSS31
U4
VSS32
U5
VSS33
U7
VSS34
U9
VSS35
U11
VSS36
U13
VSS37
U15
VSS38
U17
VSS39
U19
VSS40
U21
VSS41
U23
VSS42
V2
VSS43
V3
VSS44
V10
VSS45
V12
VSS46
V14
VSS47
V16
VSS48
V18
VSS49
V20
VSS50
V22
VSS51
W9
VSS52
W11
VSS53
W13
VSS54
W15
VSS55
W17
VSS56
W19
VSS57
W21
VSS58
W23
VSS59
Y8
VSS60
Y10
VSS61
Y12
VSS62
W7
VSS63
Y20
VSS64
Y22
VSS65
U20E
U20E
INTERNAL MISC E
INTERNAL MISC E
L25
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
KEY1
KEY2
KEY3
KEY4
KEY5
KEY6
KEY7
KEY8
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
2
L26
L31
L30
W26
B
C558
C558
W25
AE27
U24
V24
AE28
Y31
Y30
AG31
V31
W31
AF31
AD18
AD19
AE7
AE8
H3
H4
H20
H21
U20G
VDD2
VDD2
L14
L16
L18
M2
M3
M7
M9
M11
M13
M15
M17
M19
N8
N10
N12
N14
N16
N18
P7
P9
P11
P13
P15
P17
P19
R4
R5
R8
R10
R12
R14
R16
R18
R20
T2
T3
T7
T9
T11
T13
T15
T17
T19
T21
U8
U10
U12
U14
U16
U18
U20
V9
V11
V13
V15
V17
V19
V21
W4
W5
W8
W10
W12
W14
W16
W18
W20
Y2
Y3
Y7
Y9
Y11
Y13
Y15
Y21
E20
B19
AL4
AK4
AK3
F2
F3
G4
G3
G5
AD25
AE24
AE25
AJ18
AJ20
C18
C20
G24
G25
H25
V29
W30
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VCC_DDRII
2
3
1
VCC_DDRII
2
3
1
M_CHA_DQ0
M_CHA_DQ1
M_CHA_DQ2
M_CHA_DQ3
M_CHA_DQ4
M_CHA_DQ5
M_CHA_DQ6
M_CHA_DQ7
M_CHA_DQ8
M_CHA_DQ9
M_CHA_DQ10
M_CHA_DQ11
M_CHA_DQ12
M_CHA_DQ13
M_CHA_DQ14
M_CHA_DQ15
M_CHA_DQ16
M_CHA_DQ17
M_CHA_DQ18
M_CHA_DQ19
M_CHA_DQ20
M_CHA_DQ21
M_CHA_DQ22
M_CHA_DQ23
M_CHA_DQ24
M_CHA_DQ25
M_CHA_DQ26
M_CHA_DQ27
M_CHA_DQ28
M_CHA_DQ29
M_CHA_DQ30
M_CHA_DQ31
M_CHA_DQ32
M_CHA_DQ33
M_CHA_DQ34
M_CHA_DQ35
M_CHA_DQ36
M_CHA_DQ37
M_CHA_DQ38
M_CHA_DQ39
M_CHA_DQ40
M_CHA_DQ41
M_CHA_DQ42
M_CHA_DQ43
M_CHA_DQ44
M_CHA_DQ45
M_CHA_DQ46
M_CHA_DQ47
M_CHA_DQ48
M_CHA_DQ49
M_CHA_DQ50
M_CHA_DQ51
M_CHA_DQ52
M_CHA_DQ53
M_CHA_DQ54
M_CHA_DQ55
M_CHA_DQ56
M_CHA_DQ57
M_CHA_DQ58
M_CHA_DQ59
M_CHA_DQ60
M_CHA_DQ61
M_CHA_DQ62
M_CHA_DQ63
D24
D24
BAV99W
BAV99W
D25
D25
BAV99W
BAV99W
5
M_CHA_MEC3[5] M_CHA_MEC4 [5]
M_CHA_MEC2[5]
M_CHA_MEC1[5]
M_CHA_MEC0[5]
DIMM1
DIMM1
122
123
128
129
131
132
140
141
143
144
149
150
152
153
158
159
199
200
205
206
208
209
214
215
107
108
217
218
226
227
110
111
116
117
229
230
235
236
5
VCC_DDRII
102
55
68
19
191
194
181
175
75
VDD051VDD156VDD262VDD372VDD478VDD5
VDD3
VSS
VSS
VSS
VSS
VSS
118
121
124
127
130
170
VDD6
VDD7
VDD8
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
133
136
139
142
145
148
151
154
157
NC
NC
3
RC118RC0
DQ0
4
DQ1
9
NC/TEST
DQ2
10
DQ3
DQ4
DQ5
DQ6
DQ7
12
DQ8
13
DQ9
21
DQ10
22
DQ11
DQ12
DQ13
DQ14
DQ15
24
DQ16
25
DQ17
30
DQ18
31
DQ19
DQ20
DQ21
DQ22
DQ23
33
DQ24
34
DQ25
39
DQ26
40
DQ27
DQ28
DQ29
DQ30
DQ31
80
DQ32
81
DQ33
86
DQ34
87
DQ35
DQ36
DQ37
DQ38
DQ39
89
DQ40
90
DQ41
95
DQ42
96
DQ43
DQ44
DQ45
DQ46
DQ47
98
DQ48
99
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
50
VSS
65
VSS
66
VSS
79
VSS
82
VSS
85
VSS
88
VSS
91
VSS
94
VSS
97
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
115
DDR2 DIMM1
D D
M_CHA_DQ[0..63][5]
C C
B B
SMB_MEM_CLK
SMB_MEM_DATA
A A
4
VCC3 VCC3
R3660RR366
0R
M_CHA_MEC3 M_CHA_MEC4
M_CHA_MEC2
M_CHA_MEC1
M_CHA_MEC0
238
197
172
187
184
189
67
178
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ469VDDQ7
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
160
163
166
169
198
201
204
207
210
213
216
ADDR.=1010000B(A0H)
4
CB042CB143CB248CB349CB4
VSS
VSS
219
222
VSS
225
228
161
162
CB5
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS8#
A10_AP
A16/BA2
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
VSS
VSS
VSS
231
234
167
168
CB6
CB7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
A14
A15
BA1
BA0
WE#
CAS#
RAS#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
SCL
SDA
VREF
SA0
SA1
SA2
VSS
DDR2/BLACK
DDR2/BLACK
237
M_CHA_MEC5
M_CHA_MEC6
M_CHA_MEC7
7
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
188
183
63
182
61
60
180
58
179
177
70
57
176
196
174
173
54
190
71
73
74
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
193
76
185
186
137
138
220
221
120
119
M_DIMM_VREF
1
239
240
101
M_CHA_MEC5 [5]
M_CHA_MEC6 [5]
M_CHA_MEC7 [5] M_CHB_MEC0[5]
M_CHA_DQS_L[0..8] [5]
M_CHA_DQS_H[0..8] [5]
M_CHA_DQS_H0
M_CHA_DQS_L0
M_CHA_DQS_H1
M_CHA_DQS_L1
M_CHA_DQS_H2
M_CHA_DQS_L2
M_CHA_DQS_H3
M_CHA_DQS_L3
M_CHA_DQS_H4
M_CHA_DQS_L4
M_CHA_DQS_H5
M_CHA_DQS_L5
M_CHA_DQS_H6
M_CHA_DQS_L6
M_CHA_DQS_H7
M_CHA_DQS_L7
M_CHA_DQS_H8
M_CHA_DQS_L8
M_CHA_MA0
M_CHA_MA1
M_CHA_MA2
M_CHA_MA3
M_CHA_MA4
M_CHA_MA5
M_CHA_MA6
M_CHA_MA7
M_CHA_MA8
M_CHA_MA9
M_CHA_MA10
M_CHA_MA11
M_CHA_MA12
M_CHA_MA13
M_CHA_MA14
M_CHA_MA15
M_CHA_BANK2
M_CHA_BANK1
M_CHA_BANK0
M_CHA_WE
M_CHA_CAS
M_CHA_RAS
M_CHA_DM0
M_CHA_DM1
M_CHA_DM2
M_CHA_DM3
M_CHA_DM4
M_CHA_DM5
M_CHA_DM6
M_CHA_DM7
M_CHA_DM8
M_CHA_ODT0
M_CHA_CKE0
M_CHA_CS0
M_CHA_CS1
M_CHA_CLKH0
M_CHA_CLKL0
M_CHA_CLKH1
M_CHA_CLKL1
M_CHA_CLKH2
M_CHA_CLKL2
SMB_MEMCLK
SMB_MEMDATA
M_CHA_BANK2 [5,8]
M_CHA_BANK1 [5,8]
M_CHA_BANK0 [5,8]
M_CHA_WE [5,8]
M_CHA_CAS [5,8]
M_CHA_RAS [5,8]
M_CHA_ODT0 [5,8]
M_CHA_CKE0 [5,8]
M_CHA_CS0 [5,8]
M_CHA_CS1 [5,8]
M_CHA_CLKH0 [5,8]
M_CHA_CLKL0 [5,8]
M_CHA_CLKH1 [5,8]
M_CHA_CLKL1 [5,8]
M_CHA_CLKH2 [5,8]
M_CHA_CLKL2 [5,8]
R368 33R0402R368 33R0402
R369 33R0402R369 33R0402
PLACE 0.1UF CAP CLOSE TO RESISTOR DIVIDER
VCC_DDRII
R370 1KR1%0402R370 1KR1%0402
M_CHA_MA[0..15] [5,8]
M_CHA_DM[0..8] [5]
R371
R371
1KR1%0402
1KR1%0402
C233 CLOSE TO
CH_A DIMMS
3
DDR2 DIMM2
M_CHB_DQ[0..63][5]
SMB_MEM_CLK [13]
SMB_MEM_DATA [13]
M_DIMM_VREF
C534
C534
C0.1U16Y0402
C0.1U16Y0402
3
C535
C535
C0.1U16Y0402
C0.1U16Y0402
C234 CLOSE TO
CH_B DIMMS
M_CHB_DQ0
M_CHB_DQ1
M_CHB_DQ2
M_CHB_DQ3
M_CHB_DQ4
M_CHB_DQ5
M_CHB_DQ6
M_CHB_DQ7
M_CHB_DQ8
M_CHB_DQ9
M_CHB_DQ10
M_CHB_DQ11
M_CHB_DQ12
M_CHB_DQ13
M_CHB_DQ14
M_CHB_DQ15
M_CHB_DQ16
M_CHB_DQ17
M_CHB_DQ18
M_CHB_DQ19
M_CHB_DQ20
M_CHB_DQ21
M_CHB_DQ22
M_CHB_DQ23
M_CHB_DQ24
M_CHB_DQ25
M_CHB_DQ26
M_CHB_DQ27
M_CHB_DQ28
M_CHB_DQ29
M_CHB_DQ30
M_CHB_DQ31
M_CHB_DQ32
M_CHB_DQ33
M_CHB_DQ34
M_CHB_DQ35
M_CHB_DQ36
M_CHB_DQ37
M_CHB_DQ38
M_CHB_DQ39
M_CHB_DQ40
M_CHB_DQ41
M_CHB_DQ42
M_CHB_DQ43
M_CHB_DQ44
M_CHB_DQ45
M_CHB_DQ46
M_CHB_DQ47
M_CHB_DQ48
M_CHB_DQ49
M_CHB_DQ50
M_CHB_DQ51
M_CHB_DQ52
M_CHB_DQ53
M_CHB_DQ54
M_CHB_DQ55
M_CHB_DQ56
M_CHB_DQ57
M_CHB_DQ58
M_CHB_DQ59
M_CHB_DQ60
M_CHB_DQ61
M_CHB_DQ62
M_CHB_DQ63
2
M_CHB_MEC3[5] M_CHB_MEC4 [5]
M_CHB_MEC2[5]
M_CHB_MEC1[5]
VCC_DDRII
DIMM2
DIMM2
102
55
68
19
75
NC
NC
3
RC118RC0
DQ0
VDD051VDD156VDD262VDD372VDD478VDD5
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
21
DQ10
22
DQ11
131
DQ12
132
DQ13
140
DQ14
141
DQ15
24
DQ16
25
DQ17
30
DQ18
31
DQ19
143
DQ20
144
DQ21
149
DQ22
150
DQ23
33
DQ24
34
DQ25
39
DQ26
40
DQ27
152
DQ28
153
DQ29
158
DQ30
159
DQ31
80
DQ32
81
DQ33
86
DQ34
87
DQ35
199
DQ36
200
DQ37
205
DQ38
206
DQ39
89
DQ40
90
DQ41
95
DQ42
96
DQ43
208
DQ44
209
DQ45
214
DQ46
215
DQ47
98
DQ48
99
DQ49
107
DQ50
108
DQ51
217
DQ52
218
DQ53
226
DQ54
227
DQ55
110
DQ56
111
DQ57
116
DQ58
117
DQ59
229
DQ60
230
DQ61
235
DQ62
236
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
50
VSS
65
VSS
66
VSS
79
VSS
82
VSS
85
VSS
88
VSS
91
VSS
94
VSS
97
VSS
100
VDD3
NC/TEST
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
103
106
109
112
115
118
121
124
127
130
133
ADDR.=1010001B(A2H)
2
1
R3670RR367
0R
M_CHB_MEC3
M_CHB_MEC2
M_CHB_MEC1
M_CHB_MEC0
191
194
181
175
170
VDD6
VDD7
VDD8
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
136
139
142
145
148
151
154
238
197
172
187
184
189
67
178
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ469VDDQ7
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
157
160
VSS
163
166
169
198
201
204
207
210
213
216
CB042CB143CB248CB349CB4
VSS
219
222
VSS
VSS
225
228
161
162
CB5
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS8#
A10_AP
A16/BA2
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
VSS
VSS
VSS
231
234
167
CB6
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CAS#
RAS#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
VREF
VSS
237
M_CHB_MEC4
M_CHB_MEC5
M_CHB_MEC6
M_CHB_MEC7
168
CB7
M_CHB_DQS_H0
7
M_CHB_DQS_L0
6
M_CHB_DQS_H1
16
M_CHB_DQS_L1
15
M_CHB_DQS_H2
28
M_CHB_DQS_L2
27
M_CHB_DQS_H3
37
M_CHB_DQS_L3
36
M_CHB_DQS_H4
84
M_CHB_DQS_L4
83
M_CHB_DQS_H5
93
M_CHB_DQS_L5
92
M_CHB_DQS_H6
105
M_CHB_DQS_L6
104
M_CHB_DQS_H7
114
M_CHB_DQS_L7
113
M_CHB_DQS_H8
46
M_CHB_DQS_L8
45
M_CHB_MA0
188
A0
M_CHB_MA1
183
A1
M_CHB_MA2
63
A2
M_CHB_MA3
182
A3
M_CHB_MA4
61
A4
M_CHB_MA5
60
A5
M_CHB_MA6
180
A6
M_CHB_MA7
58
A7
M_CHB_MA8
179
A8
M_CHB_MA9
177
A9
M_CHB_MA10
70
M_CHB_MA11
57
A11
M_CHB_MA12
176
A12
M_CHB_MA13
196
A13
M_CHB_MA14
174
A14
M_CHB_MA15
173
A15
M_CHB_BANK2
54
M_CHB_BANK1
190
BA1
M_CHB_BANK0
71
BA0
M_CHB_WE
73
WE#
M_CHB_CAS
74
M_CHB_RAS
192
M_CHB_DM0
125
126
M_CHB_DM1
134
135
M_CHB_DM2
146
147
M_CHB_DM3
155
156
M_CHB_DM4
202
203
M_CHB_DM5
211
212
M_CHB_DM6
223
224
M_CHB_DM7
232
233
M_CHB_DM8
164
165
M_CHB_ODT0
195
77
M_CHB_CKE0
52
171
M_CHB_CS0
193
M_CHB_CS1
76
M_CHB_CLKH0
185
M_CHB_CLKL0
186
M_CHB_CLKH1
137
M_CHB_CLKL1
138
M_CHB_CLKH2
220
M_CHB_CLKL2
221
SMB_MEMCLK
120
SCL
SMB_MEMDATA
119
SDA
M_DIMM_VREF
1
VCC3
239
SA0
240
SA1
101
SA2
DDR2/BLACK
DDR2/BLACK
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
Ver:0B
DDR DIMM 1,3
DDR DIMM 1,3
DDR DIMM 1,3
MS-7243
MS-7243
MS-7243
1
M_CHB_MEC5 [5]
M_CHB_MEC6 [5]
M_CHB_MEC7 [5]
M_CHB_DQS_L[0..8] [5]
M_CHB_DQS_H[0..8] [5]
M_CHB_MA[0..15] [5,8]
M_CHB_BANK2 [5,8]
M_CHB_BANK1 [5,8]
M_CHB_BANK0 [5,8]
M_CHB_WE [5,8]
M_CHB_CAS [5,8]
M_CHB_RAS [5,8]
M_CHB_ODT0 [5,8]
M_CHB_CKE0 [5,8]
M_CHB_CS0 [5,8]
M_CHB_CS1 [5,8]
M_CHB_CLKH0 [5,8]
M_CHB_CLKL0 [5,8]
M_CHB_CLKH1 [5,8]
M_CHB_CLKL1 [5,8]
M_CHB_CLKH2 [5,8]
M_CHB_CLKL2 [5,8]
Last Revision Date:
Last Revision Date:
Last Revision Date:
Thursday, November 24, 2005
Thursday, November 24, 2005
Thursday, November 24, 2005
Sheet
Sheet
Sheet
M_CHB_DM[0..8] [5]
Rev
Rev
Rev
734
734
734
of
of
of
0A
0A
0A
5
CH A +0_9V DECOULPING CAPS
VTT_DDRII
D D
PLACED AT LEFT AND RIGHT ENDS OF
VTT ISLAND
CH B +0_9V DECOULPING CAPS
VTT_DDRII
C C
B B
VCC_DDRII
EMI
A A
C440
C440
C0.1U16Y0402
C0.1U16Y0402
C442
C442
C0.1U16Y0402
C0.1U16Y0402
C444
C444
C0.1U16Y0402
C0.1U16Y0402
C446
C446
C0.1U16Y0402
C0.1U16Y0402
C448
C448
C0.1U16Y0402
C0.1U16Y0402
C450
C450
C0.1U16Y0402
C0.1U16Y0402
C452
C452
C0.1U16Y0402
C0.1U16Y0402
C453
C453
C4.7U10Y0805
C4.7U10Y0805
C455
C455
C4.7U10Y0805
C4.7U10Y0805
C457
C457
C0.1U16Y0402
C0.1U16Y0402
C459
C459
C0.1U16Y0402
C0.1U16Y0402
C461
C461
C0.1U16Y0402
C0.1U16Y0402
C465
C465
C0.1U16Y0402
C0.1U16Y0402
C471
C471
C0.1U16Y0402
C0.1U16Y0402
C477
C477
C0.1U16Y0402
C0.1U16Y0402
C483
C483
C0.1U16Y0402
C0.1U16Y0402
C515
C515
C1U10Y
C1U10Y
C517
C517
C1U10Y
C1U10Y
C519
C519
C1U10Y
C1U10Y
C521
C521
C1U10Y
C1U10Y
CB18
CB18
X_0.1U/25V/6
X_0.1U/25V/6
CB19
CB19
X_0.1U/25V/6
X_0.1U/25V/6
CB20
CB20
X_0.1U/25V/6
X_0.1U/25V/6
CB21
CB21
0.1U/25V/6
0.1U/25V/6
CB22
CB22
0.1U/25V/6
0.1U/25V/6
CB23
CB23
X_0.1U/25V/6
X_0.1U/25V/6
CB24
CB24
0.1U/25V/6
0.1U/25V/6
CB25
CB25
0.1U/25V/6
0.1U/25V/6
CB26
CB26
0.1U/25V/6
0.1U/25V/6
VCC_DDRII
VCC_DDRII
5
VTT_DDRII
VTT_DDRIIVTT_DDRII
VTT_DDRII
VCC_DDRIIVCC_DDRII
C439
C439
C0.1U16Y0402
C0.1U16Y0402
C441
C441
C0.1U16Y0402
C0.1U16Y0402
C443
C443
C0.1U16Y0402
C0.1U16Y0402
C445
C445
C0.1U16Y0402
C0.1U16Y0402
C447
C447
C0.1U16Y0402
C0.1U16Y0402
C449
C449
C0.1U16Y0402
C0.1U16Y0402
C451
C451
C0.1U16Y0402
C0.1U16Y0402
for EMI
VCC_DDRII
C454
C454
C4.7U10Y0805
C4.7U10Y0805
C456
C456
C4.7U10Y0805
C4.7U10Y0805
C458
C458
C0.1U16Y0402
C0.1U16Y0402
C460
C460
C0.1U16Y0402
C0.1U16Y0402
C462
C462
C0.1U16Y0402
C0.1U16Y0402
C468
C468
C0.1U16Y0402
C0.1U16Y0402
C474
C474
C0.1U16Y0402
C0.1U16Y0402
C480
C480
C0.1U16Y0402
C0.1U16Y0402
C486
C486
C0.1U16Y0402
C0.1U16Y0402
C516
C516
C1U10Y
C1U10Y
C518
C518
C1U10Y
C1U10Y
C520
C520
C1U10Y
C1U10Y
C522
C522
C1U10Y
C1U10Y
C529
C529
X_0.1U/25V/6
X_0.1U/25V/6
C530
C530
X_0.1U/25V/6
X_0.1U/25V/6
C531
C531
X_0.1U/25V/6
X_0.1U/25V/6
C532
C532
X_0.1U/25V/6
X_0.1U/25V/6
C533
C533
X_0.1U/25V/6
X_0.1U/25V/6
4
M_CHA_CS1[5,7]
M_CHA_CS0[5,7]
M_CHA_ODT0[5,7]
M_CHA_BANK2[5,7]
M_CHA_BANK1[5,7]
M_CHA_BANK0[5,7]
M_CHA_CKE0[5,7] M_CHB_CKE0[5,7]
M_CHA_MA[0..15][5,7] M_CHB_MA[0..15][5,7]
4
M_CHA_CS1
M_CHA_CS0
M_CHA_ODT0
M_CHA_MA7
M_CHA_MA12
M_CHA_MA14
M_CHA_MA15
M_CHA_MA3
M_CHA_MA8
M_CHA_MA2
M_CHA_MA6
M_CHA_MA4
M_CHA_MA9
M_CHA_MA5
M_CHA_MA11
M_CHA_MA13
M_CHA_MA10
M_CHA_MA0
M_CHA_MA1
M_CHA_CAS
M_CHA_CAS[5,7]
M_CHA_WE
M_CHA_WE[5,7]
M_CHA_RAS
M_CHA_RAS[5,7]
M_CHA_BANK2
M_CHA_BANK1
M_CHA_BANK0
M_CHA_CKE0
M_CHA_MA15
M_CHA_MA14
M_CHA_MA13
M_CHA_MA12
M_CHA_MA11
M_CHA_MA10
M_CHA_MA9
M_CHA_MA8
M_CHA_MA7
M_CHA_MA6
M_CHA_MA5
M_CHA_MA4
M_CHA_MA3
M_CHA_MA2
M_CHA_MA1
M_CHA_MA0
M_CHA_CAS
M_CHA_WE
M_CHA_RAS
M_CHA_BANK2
M_CHA_BANK1
M_CHA_BANK0
M_CHA_CLKH0[5,7]
M_CHA_CLKL0[5,7]
M_CHA_CLKH1[5,7]
M_CHA_CLKL1[5,7]
M_CHA_CLKH2[5,7]
M_CHA_CLKL2[5,7]
R346 47R0402R346 47R0402
R347 47R0402R347 47R0402
R348 47R0402R348 47R0402
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R350 47R0402R350 47R0402
R352 47R0402R352 47R0402
R354 47R0402R354 47R0402
R356 47R0402R356 47R0402
R358 47R0402R358 47R0402
R360 47R0402R360 47R0402
R364 47R0402R364 47R0402
C463 C22P50N0402C463 C22P50N0402
C466 C22P50N0402C466 C22P50N0402
C472 C22P50N0402C472 C22P50N0402
C475 C22P50N0402C475 C22P50N0402
C478 C22P50N0402C478 C22P50N0402
C481 C22P50N0402C481 C22P50N0402
C484 C22P50N0402C484 C22P50N0402
C487 C22P50N0402C487 C22P50N0402
C489 C22P50N0402C489 C22P50N0402
C491 C22P50N0402C491 C22P50N0402
C493 C22P50N0402C493 C22P50N0402
C495 C22P50N0402C495 C22P50N0402
C497 C22P50N0402C497 C22P50N0402
C499 C22P50N0402C499 C22P50N0402
C501 C22P50N0402C501 C22P50N0402
C503 C22P50N0402C503 C22P50N0402
C505 C22P50N0402C505 C22P50N0402
C507 C22P50N0402C507 C22P50N0402
C509 C22P50N0402C509 C22P50N0402 C510 C22P50N0402C510 C22P50N0402
C511 C22P50N0402C511 C22P50N0402
C513 C22P50N0402C513 C22P50N0402
M_CHA_CLKH0
M_CHA_CLKL0
M_CHA_CLKH1
M_CHA_CLKL1
M_CHA_CLKH2
M_CHA_CLKL2
3
VTT_DDRII VTT_DDRII
RN27
RN27
8P4R-47R0402
8P4R-47R0402
RN29
RN29
8P4R-47R0402
8P4R-47R0402
RN31
RN31
8P4R-47R0402
8P4R-47R0402
RN33
RN33
8P4R-47R0402
8P4R-47R0402
VCC_DDRII VCC_DDRII
C523
C523
C1.5P16N0402
C1.5P16N0402
1 2
C525
C525
C1.5P16N0402
C1.5P16N0402
1 2
C527
C527
C1.5P16N0402
C1.5P16N0402
1 2
3
2
M_CHB_CS0[5,7]
M_CHB_ODT0[5,7]
M_CHB_CS1[5,7]
M_CHB_BANK2[5,7]
M_CHB_BANK1[5,7]
M_CHB_BANK0[5,7]
M_CHB_CS0
M_CHB_ODT0
M_CHB_CS1
M_CHB_MA14
M_CHB_MA15
M_CHB_MA12
M_CHB_MA11
M_CHB_MA9
M_CHB_MA8
M_CHB_MA7
M_CHB_MA6
M_CHB_MA3
M_CHB_MA5
M_CHB_MA4
M_CHB_MA1
M_CHB_MA2
M_CHB_MA0
M_CHB_MA10
M_CHB_MA13
M_CHB_CAS
M_CHB_CAS[5,7]
M_CHB_WE
M_CHB_WE[5,7]
M_CHB_RAS
M_CHB_RAS[5,7]
M_CHB_BANK2
M_CHB_BANK1
M_CHB_BANK0
M_CHB_CKE0
M_CHB_MA15
M_CHB_MA14
M_CHB_MA13
M_CHB_MA12
M_CHB_MA11
M_CHB_MA10
M_CHB_MA9
M_CHB_MA8
M_CHB_MA7
M_CHB_MA6
M_CHB_MA5
M_CHB_MA4
M_CHB_MA3
M_CHB_MA2
M_CHB_MA1
M_CHB_MA0
M_CHB_CAS
M_CHB_WE
M_CHB_RAS
M_CHB_BANK2
M_CHB_BANK1
M_CHB_BANK0
M_CHB_CLKH0[5,7]
M_CHB_CLKL0[5,7]
M_CHB_CLKH1[5,7]
M_CHB_CLKL1[5,7]
M_CHB_CLKH2[5,7]
M_CHB_CLKL2[5,7]
2
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R351 47R0402R351 47R0402
R353 47R0402R353 47R0402
R355 47R0402R355 47R0402
R357 47R0402R357 47R0402
R359 47R0402R359 47R0402
R361 47R0402R361 47R0402
R365 47R0402R365 47R0402
C464 C22P50N0402C464 C22P50N0402
C467 C22P50N0402C467 C22P50N0402
C470 C22P50N0402C470 C22P50N0402C469 C22P50N0402C469 C22P50N0402
C473 C22P50N0402C473 C22P50N0402
C476 C22P50N0402C476 C22P50N0402
C479 C22P50N0402C479 C22P50N0402
C482 C22P50N0402C482 C22P50N0402
C485 C22P50N0402C485 C22P50N0402
C488 C22P50N0402C488 C22P50N0402
C490 C22P50N0402C490 C22P50N0402
C492 C22P50N0402C492 C22P50N0402
C494 C22P50N0402C494 C22P50N0402
C496 C22P50N0402C496 C22P50N0402
C498 C22P50N0402C498 C22P50N0402
C500 C22P50N0402C500 C22P50N0402
C502 C22P50N0402C502 C22P50N0402
C504 C22P50N0402C504 C22P50N0402
C506 C22P50N0402C506 C22P50N0402
C508 C22P50N0402C508 C22P50N0402
C512 C22P50N0402C512 C22P50N0402
C514 C22P50N0402C514 C22P50N0402
M_CHB_CLKH0
M_CHB_CLKL0
M_CHB_CLKH1
M_CHB_CLKL1
M_CHB_CLKH2
M_CHB_CLKL2
RN26
RN26
8P4R-47R0402
8P4R-47R0402
RN28
RN28
8P4R-47R0402
8P4R-47R0402
RN30
RN30
8P4R-47R0402
8P4R-47R0402
RN32
RN32
8P4R-47R0402
8P4R-47R0402
RN34
RN34
8P4R-47R0402
8P4R-47R0402
C524
C524
C1.5P16N0402
C1.5P16N0402
1 2
C526
C526
C1.5P16N0402
C1.5P16N0402
1 2
C528
C528
C1.5P16N0402
C1.5P16N0402
1 2
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
DDR DIMM 2,4
DDR DIMM 2,4
DDR DIMM 2,4
MS-7243
MS-7243
MS-7243
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, November 23, 2005
Wednesday, November 23, 2005
Wednesday, November 23, 2005
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
0A
0A
0A
of
834
of
834
of
834
5
U19F
U19F
?
C436
C436
0.1U/25V/6
0.1U/25V/6
Y23
W24
V24
U22
R24
P24
P22
N22
Y21
V21
W21
T21
R18
P16
N20
M17
Y22
W23
V23
U21
R23
P23
P21
N21
Y20
W20
W22
U20
R19
P17
N19
N18
T23
T22
R21
R20
M23
M22
W19
Y19
N16
T13
?
HT_CPU_RXD0_P
HT_CPU_RXD1_P
HT_CPU_RXD2_P
HT_CPU_RXD3_P
HT_CPU_RXD4_P
HT_CPU_RXD5_P
HT_CPU_RXD6_P
HT_CPU_RXD7_P
HT_CPU_RXD8_P
HT_CPU_RXD9_P
HT_CPU_RXD10_P
HT_CPU_RXD11_P
HT_CPU_RXD12_P
HT_CPU_RXD13_P
HT_CPU_RXD14_P
HT_CPU_RXD15_P
HT_CPU_RXD0_N
HT_CPU_RXD1_N
HT_CPU_RXD2_N
HT_CPU_RXD3_N
HT_CPU_RXD4_N
HT_CPU_RXD5_N
HT_CPU_RXD6_N
HT_CPU_RXD7_N
HT_CPU_RXD8_N
HT_CPU_RXD9_N
HT_CPU_RXD10_N
HT_CPU_RXD11_N
HT_CPU_RXD12_N
HT_CPU_RXD13_N
HT_CPU_RXD14_N
HT_CPU_RXD15_N
HT_CPU_RX_CLK0_P
HT_CPU_RX_CLK0_N
HT_CPU_RX_CLK1_P
HT_CPU_RX_CLK1_N
HT_CPU_RXCTL_P
HT_CPU_RXCTL_N
HT_CPU_CAL_1P2V
HT_CPU_CAL_GND
+1.2V_PLLHTCPU
+1.2V_PLLHTMCP
?
?
HT_CADOUT_H[0..15][4]
D D
HT_CADOUT_L[0..15][4]
C C
HT_CADOUT_H[0..15]
HT_CADOUT_L[0..15]
HT_CLKOUT_H0[4]
HT_CLKOUT_L0[4]
HT_CLKOUT_H1[4]
HT_CLKOUT_L1[4]
HT_CTLOUT_H0[4]
HT_CTLOUT_L0[4]
HT_CADOUT_H0
HT_CADOUT_H1
HT_CADOUT_H2
HT_CADOUT_H3
HT_CADOUT_H4
HT_CADOUT_H5
HT_CADOUT_H6
HT_CADOUT_H7
HT_CADOUT_H8
HT_CADOUT_H9
HT_CADOUT_H10
HT_CADOUT_H11
HT_CADOUT_H12
HT_CADOUT_H13
HT_CADOUT_H14
HT_CADOUT_H15
HT_CADOUT_L0
HT_CADOUT_L1
HT_CADOUT_L2
HT_CADOUT_L3
HT_CADOUT_L4
HT_CADOUT_L5
HT_CADOUT_L6
HT_CADOUT_L7
HT_CADOUT_L8
HT_CADOUT_L9
HT_CADOUT_L10
HT_CADOUT_L11
HT_CADOUT_L12
HT_CADOUT_L13
HT_CADOUT_L14
HT_CADOUT_L15
HT_CTLOUT_H0
HT_CTLOUT_L0
VCC1_2HT
B B
1P2VPLL_PWR[10,11]
A A
R342 150/6/1R342 150/6/1
FB26 30SFB26 30S
PLACE ON BACK SIDE
5
R343 150/6/1R343 150/6/1
1U/10V/6
1U/10V/6
1P2VPLL_FILT1P2VPLL_PWR
C435
C435
VCC2_5
C51
C51
SEC 1 OF 6
SEC 1 OF 6
R386 1KR0402R386 1KR0402
R387 1KR0402R387 1KR0402
R418 300R0402R418 300R0402
4
HT_CPU_TXD0_P
HT_CPU_TXD1_P
HT_CPU_TXD2_P
HT_CPU_TXD3_P
HT_CPU_TXD4_P
HT_CPU_TXD5_P
HT_CPU_TXD6_P
HT_CPU_TXD7_P
HT_CPU_TXD8_P
HT_CPU_TXD9_P
HT_CPU_TXD10_P
HT_CPU_TXD11_P
HT_CPU_TXD12_P
HT_CPU_TXD13_P
HT_CPU_TXD14_P
HT_CPU_TXD15_P
HT_CPU_TXD0_N
HT_CPU_TXD1_N
HT_CPU_TXD2_N
HT_CPU_TXD3_N
HT_CPU_TXD4_N
HT_CPU_TXD5_N
HT_CPU_TXD6_N
HT_CPU_TXD7_N
HT_CPU_TXD8_N
HT_CPU_TXD9_N
HT_CPU_TXD10_N
HT_CPU_TXD11_N
HT_CPU_TXD12_N
HT_CPU_TXD13_N
HT_CPU_TXD14_N
HT_CPU_TXD15_N
HT_CPU_TX_CLK0_P
HT_CPU_TX_CLK0_N
HT_CPU_TX_CLK1_P
HT_CPU_TX_CLK1_N
HT_CPU_TXCTL_P
HT_CPU_TXCTL_N
CLKOUT_PRI_200MHZ_P
CLKOUT_PRI_200MHZ_N
CLKOUT_SEC_200MHZ_P
CLKOUT_SEC_200MHZ_N
HT_CPU_REQ*
HT_CPU_STOP*
HT_CPU_RESET*
HT_CPU_PWRGD
+2.5V_PLLHTCPU
4
CPU_PWRGD
HT_STOP#
CPU_RST#
C23
D23
E22
F23
H22
J21
K21
K23
D21
F19
F21
G20
J19
L17
L20
L18
C24
D24
E23
F24
H23
J22
K22
K24
D22
E20
E21
G19
J18
K17
K19
L19
G23
G24
G22
G21
L23
L24
B24
B23
A22
B21
F18
G18
D20
E19
L16
HT_CADIN_H[0..15]
HT_CADIN_H0
HT_CADIN_H1
HT_CADIN_H2
HT_CADIN_H3
HT_CADIN_H4
HT_CADIN_H5
HT_CADIN_H6
HT_CADIN_H7
HT_CADIN_H8
HT_CADIN_H9
HT_CADIN_H10
HT_CADIN_H11
HT_CADIN_H12
HT_CADIN_H13
HT_CADIN_H14
HT_CADIN_H15
HT_CADIN_L[0..15]
HT_CADIN_L0
HT_CADIN_L1
HT_CADIN_L2
HT_CADIN_L3
HT_CADIN_L4
HT_CADIN_L5
HT_CADIN_L6
HT_CADIN_L7
HT_CADIN_L8
HT_CADIN_L9
HT_CADIN_L10
HT_CADIN_L11
HT_CADIN_L12
HT_CADIN_L13
HT_CADIN_L14
HT_CADIN_L15
HT_CLKIN_H0
HT_CLKIN_L0
HT_CLKIN_H1
HT_CLKIN_L1
HT_CTLIN_H0
HT_CTLIN_L0
CPUCLK
CPUCLK#
2P5V_PLLHTCPU
0.1U/25V/6
0.1U/25V/6
3
HT_CADIN_H[0..15] [4]
HT_CADIN_L[0..15] [4]
HT_CLKIN_H0 [4]
HT_CLKIN_L0 [4]
HT_CLKIN_H1 [4]
HT_CLKIN_L1 [4]
HT_CTLIN_H0 [4]
HT_CTLIN_L0 [4]
HT_STOP#
HT_STOP# [4]
CPU_RST#
CPU_RST# [4]
CPU_PWRGD
CPU_PWRGD [4]
VCC2_5
FB27 30SFB27 30S
C437
C437
C438
C438
1U/16V/6
1U/16V/6
NEAR NB
CPUCLK
R400 0R5%0603R400 0R5%0603
CPUCLK#
R401 0R5%0603R401 0R5%0603
HTMCP_UP[7..0]
HTMCP_UP[7..0][12]
HTMCP_UP#[7..0][12]
HTMCP_UPCLK0[12]
HTMCP_UPCLK0#[12]
HTMCP_UPCNTL[12]
HTMCP_UPCNTL#[12]
HTMCP_REQ#[12]
HTMCP_STOP#[12]
HTMCP_RST#[12]
HTMCP_PWRGD[12]
MCPOUT_25MHZ[12]
MCPOUT_200MHZ[12]
MCPOUT_200MHZ#[12]
HTMCP_UP#[7..0]
HTMCP_UP0
HTMCP_UP1
HTMCP_UP2
HTMCP_UP3
HTMCP_UP4
HTMCP_UP5
HTMCP_UP6
HTMCP_UP7
HTMCP_UP#0
HTMCP_UP#1
HTMCP_UP#2
HTMCP_UP#3
HTMCP_UP#4
HTMCP_UP#5
HTMCP_UP#6
HTMCP_UP#7
HTMCP_UPCLK0
HTMCP_UPCLK0#
HTMCP_UPCNTL
HTMCP_UPCNTL#
HTMCP_REQ#
HTMCP_STOP#
HTMCP_RST#
HTMCP_PWRGD
MCPOUT_25MHZ
MCPOUT_200MHZ
MCPOUT_200MHZ#
CPU_CLK [4]
CPU_CLK# [4]
R402 X_261R1%R402 X_261R1%
3
AD10
AD11
AC12
AC13
AA11
AC10
AC11
AB12
AB13
AD14
AC14
AD6
AC7
AA8
AA9
AA6
W7
Y8
V9
Y10
V11
W12
AC6
AB7
AB8
AB9
Y6
Y7
AA7
W9
W10
Y12
W11
V13
AD9
AC9
U10
T10
AB5
AA5
AC5
AD5
AC4
Y5
W5
2
U19A
U19A
?
?
HT_MCP_RXD0_P
HT_MCP_RXD1_P
HT_MCP_RXD2_P
HT_MCP_RXD3_P
HT_MCP_RXD4_P
HT_MCP_RXD5_P
HT_MCP_RXD6_P
HT_MCP_RXD7_P
HT_MCP_RXD8_P
HT_MCP_RXD9_P
HT_MCP_RXD10_P
HT_MCP_RXD11_P
HT_MCP_RXD12_P
HT_MCP_RXD13_P
HT_MCP_RXD14_P
HT_MCP_RXD15_P
HT_MCP_RXD0_N
HT_MCP_RXD1_N
HT_MCP_RXD2_N
HT_MCP_RXD3_N
HT_MCP_RXD4_N
HT_MCP_RXD5_N
HT_MCP_RXD6_N
HT_MCP_RXD7_N
HT_MCP_RXD8_N
HT_MCP_RXD9_N
HT_MCP_RXD10_N
HT_MCP_RXD11_N
HT_MCP_RXD12_N
HT_MCP_RXD13_N
HT_MCP_RXD14_N
HT_MCP_RXD15_N
HT_MCP_RX_CLK0_P
HT_MCP_RX_CLK0_N
HT_MCP_RX_CLK1_P
HT_MCP_RX_CLK1_N
HT_MCP_RXCTL_P
HT_MCP_RXCTL_N
HT_MCP_REQ*
HT_MCP_STOP*
HT_MCP_RESET*
HT_MCP_PWRGD
CLKIN_25MHZ
CLKIN_200MHZ_P
CLKIN_200MHZ_N
?
?
2
C51
C51
SEC 2 OF 6
SEC 2 OF 6
SCLKIN_MCLKOUT_200MHZ_P
SCLKIN_MCLKOUT_200MHZ_N
HT_MCP_TXD0_P
HT_MCP_TXD1_P
HT_MCP_TXD2_P
HT_MCP_TXD3_P
HT_MCP_TXD4_P
HT_MCP_TXD5_P
HT_MCP_TXD6_P
HT_MCP_TXD7_P
HT_MCP_TXD8_P
HT_MCP_TXD9_P
HT_MCP_TXD10_P
HT_MCP_TXD11_P
HT_MCP_TXD12_P
HT_MCP_TXD13_P
HT_MCP_TXD14_P
HT_MCP_TXD15_P
HT_MCP_TXD0_N
HT_MCP_TXD1_N
HT_MCP_TXD2_N
HT_MCP_TXD3_N
HT_MCP_TXD4_N
HT_MCP_TXD5_N
HT_MCP_TXD6_N
HT_MCP_TXD7_N
HT_MCP_TXD8_N
HT_MCP_TXD9_N
HT_MCP_TXD10_N
HT_MCP_TXD11_N
HT_MCP_TXD12_N
HT_MCP_TXD13_N
HT_MCP_TXD14_N
HT_MCP_TXD15_N
HT_MCP_TX_CLK0_P
HT_MCP_TX_CLK0_N
HT_MCP_TX_CLK1_P
HT_MCP_TX_CLK1_N
HT_MCP_TXCTL_P
HT_MCP_TXCTL_N
CLKOUT_CTERM
HT_MCP_CAL_1P2V
HT_MCP_CAL_GND
HTMCP_DWN0
AC24
HTMCP_DWN1
AD23
HTMCP_DWN2
AC22
HTMCP_DWN3
AC20
HTMCP_DWN4
AB18
HTMCP_DWN5
AA17
HTMCP_DWN6
AB16
HTMCP_DWN7
AC16
AB21
AB20
AB19
W18
W15
AA15
Y14
W13
HTMCP_DWN#0
AC23
HTMCP_DWN#1
AD22
HTMCP_DWN#2
AC21
HTMCP_DWN#3
AD20
HTMCP_DWN#4
AC18
HTMCP_DWN#5
AB17
HTMCP_DWN#6
AB15
HTMCP_DWN#7
AD16
AB22
AA20
AA19
V17
V15
Y15
W14
Y13
HTMCP_DWNCLK0
AC19
HTMCP_DWNCLK0#
AD19
Y17
W17
HTMCP_DWNCNTL
AC15
HTMCP_DWNCNTL#
AD15
B22
A20
B20
AB23
AB24
R345 150/6/1R345 150/6/1
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
HTMCP_DWN[7..0]
HTMCP_DWN[7..0] [12]
HTMCP_DWN#[7..0]
HTMCP_DWN#[7..0] [12]
HTMCP_DWNCLK0 [12]
HTMCP_DWNCLK0# [12]
HTMCP_DWNCNTL [12]
HTMCP_DWNCNTL# [12]
R341 2.37K/6/1R341 2.37K/6/1
UNNAMED_21_C51_I164_CLKOUTCTERM
VCC1_2
R344 150/6/1R344 150/6/1
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
C51G-1/ HT CPU & MCP
C51G-1/ HT CPU & MCP
C51G-1/ HT CPU & MCP
MS-7243
MS-7243
MS-7243
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
0A
0A
0A
Wednesday, November 23, 2005
Wednesday, November 23, 2005
Wednesday, November 23, 2005
of
of
of
934
934
934
5
D D
R331 10K/6R331 10K/6
VCC3
PE1_RX
C C
B B
PE1_RX[18]
PE1_RX*
PE1_RX*[18]
PC1_PRSNT#[18]
1P2VPLL_PWR[9,11]
VCC3
1P2VPLL_PWR
R332 10K/6R332 10K/6
VCC3
R334 10K/6R334 10K/6
FB23 30SFB23 30S
PLACE ON BACK SIDE
C430
C430
0.1U/25V/6
0.1U/25V/6
K9
M9
N8
N6
R6
P3
R8
U6
T8
U7
V4
Y3
M8
N7
N5
R5
P4
R7
U5
T9
U8
V3
AA3
D1
G6
H6
E2
K3
E3
D3
E4
AC3
AB3
T11
J8
J6
L6
L7
J7
J5
J9
L5
L8
J4
U19B
U19B
?
?
PE0_RX0_P
PE0_RX1_P
PE0_RX2_P
PE0_RX3_P
PE0_RX4_P
PE0_RX5_P
PE0_RX6_P
PE0_RX7_P
PE0_RX8_P
PE0_RX9_P
PE0_RX10_P
PE0_RX11_P
PE0_RX12_P
PE0_RX13_P
PE0_RX14_P
PE0_RX15_P
PE0_RX0_N
PE0_RX1_N
PE0_RX2_N
PE0_RX3_N
PE0_RX4_N
PE0_RX5_N
PE0_RX6_N
PE0_RX7_N
PE0_RX8_N
PE0_RX9_N
PE0_RX10_N
PE0_RX11_N
PE0_RX12_N
PE0_RX13_N
PE0_RX14_N
PE0_RX15_N
PE0_PRSNT*
PE1_RX_P
PE1_RX_N
PE1_PRSNT*
PE2_RX_P
PE2_RX_N
PE2_PRSNT*
PE1_CLKREQ*/CLK
PE2_CLKREQ*/DATA
PE_REFCLKIN_P
PE_REFCLKIN_N
+1.2V_PLLPE
?
?
SEC 3 OF 6
SEC 3 OF 6
C51
C51
PE0_TX0_P
PE0_TX1_P
PE0_TX2_P
PE0_TX3_P
PE0_TX4_P
PE0_TX5_P
PE0_TX6_P
PE0_TX7_P
PE0_TX8_P
PE0_TX9_P
PE0_TX10_P
PE0_TX11_P
PE0_TX12_P
PE0_TX13_P
PE0_TX14_P
PE0_TX15_P
PE0_TX0_N
PE0_TX1_N
PE0_TX2_N
PE0_TX3_N
PE0_TX4_N
PE0_TX5_N
PE0_TX6_N
PE0_TX7_N
PE0_TX8_N
PE0_TX9_N
PE0_TX10_N
PE0_TX11_N
PE0_TX12_N
PE0_TX13_N
PE0_TX14_N
PE0_TX15_N
PE0_REFCLK_P
PE0_REFCLK_N
PE1_TX_P
PE1_TX_N
PE1_REFCLK_P
PE1_REFCLK_N
PE2_TX_P
PE2_TX_N
PE2_REFCLK_P
PE2_REFCLK_N
PE_TSTCLK_P
PE_TSTCLK_N
PE_RST*
PE_CTERM_GND
4
L1
L3
L4
M4
P1
R1
R3
R4
U4
V1
W1
W3
AA1
AB1
AC1
AD2
L2
M2
M3
N3
P2
R2
T2
T3
U3
V2
W2
Y2
AA2
AB2
AC2
AD3
K1
K2
PE1_TX
G4
G5
G2
G3
H4
J3
H2
H3
F1
F2
G1
D2
PE1_TX*
PE1_CLK
PE1_CLK*
PE_COMP
PE_RST*
PE1_CLK [18]
PE1_CLK* [18]
R335 X_100/6R335 X_100/6
R340 2.37K/6/1R340 2.37K/6/1
PE1_TX [18]
PE1_TX* [18]
PE_RST* [18]
R[29]
G[29]
B[29]
PLACE NEAR C51
3
U19C
U19C
?
?
R
G
B
R326
R326
R327
R327
150/6/1
150/6/1
150/6/1
150/6/1
1P2VPLL_PWR[9,11]
R328
R328
150/6/1
150/6/1
1P2VPLL_PWR
HSYNC#[29]
VSYNC#[29]
R329 124/6/1R329 124/6/1
C428
C428
0.1U/25V/6
0.1U/25V/6
HSYNC#
VSYNC#
C424
C424
2P5V_PLLGPU
0.01U/50V/6
0.01U/50V/6
3P3V_DAC
C429
C429
0.1U/25V/6
0.1U/25V/6
A5
DAC_RED
B6
DAC_GREEN
A6
DAC_BLUE
B7
DAC_HSYNC
C7
DAC_VSYNC
D8
DAC_RSET
D9
DAC_VREF
C8
DAC_IDUMP
A9
+3.3V_DAC
H13
+2.5V_PLLGPU
C9
XTAL_IN
B9
XTAL_OUT
R9
+1.2V_PLLGPU
P9
+1.2V_PLLCORE
H16
+1.2V_PLLIFP
?
?
VCC3
FB24 40SFB24 40S
C431
C431
4.7U/10V/8
4.7U/10V/8
2
SEC 4 OF 6
SEC 4 OF 6
3P3V_DAC
C432
C432
0.1U/25V/6
0.1U/25V/6
1
C51
C51
IFPA_TXC_P
IFPA_TXC_N
IFPA_TXD0_P
IFPA_TXD1_P
IFPA_TXD2_P
IFPA_TXD3_P
IFPA_TXD0_N
IFPA_TXD1_N
IFPA_TXD2_N
IFPA_TXD3_N
IFPB_TXC_P
IFPB_TXC_N
IFPB_TXD4_P
IFPB_TXD5_P
IFPB_TXD6_P
IFPB_TXD7_P
IFPB_TXD4_N
IFPB_TXD5_N
IFPB_TXD6_N
IFPB_TXD7_N
IFPAB_PROBE
IFPAB_RSET
+2.5V_PLLIFP
+2.5V_PLLCORE
PKG_TEST
TEST_MODE_EN
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST*
C14
B13
A15
D15
A14
F14
B15
C15
B14
E14
A10
B10
B11
E13
D13
B12
A11
F13
C13
C12
IFPAB_PROBE
A16
F15
E16
2P5V_PLLCORE
H12
D17
C17
JTAG_TCK
C18
JTAG_TDI
B19
C19
JTAG_TMS
B18
JTAG_TRST*
A19
R3301K/6 R3301K/6
C426
C426
4.7U/10V/8
4.7U/10V/8
R333 1K/6R333 1K/6
R336 10K/6R336 10K/6
FB22 30SFB22 30S
C427
C427
0.1U/25V/6
0.1U/25V/6
R339 10K/6R339 10K/6
X_0.1U/25V/6C425 X_0.1U/25V/6C425
R337 10K/6R337 10K/6
R338 10K/6R338 10K/6
VCC2_5
VCC2_5
VCC2_5
FB25 30SFB25 30S
A A
5
4
3
C433
C433
4.7U/10V/8
4.7U/10V/8
2
2P5V_PLLGPU
C434
C434
0.1U/25V/6
0.1U/25V/6
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
C51G-2 / PCI-E & DAC
C51G-2 / PCI-E & DAC
C51G-2 / PCI-E & DAC
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
MS-7243
MS-7243
MS-7243
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, November 23, 2005
Wednesday, November 23, 2005
Wednesday, November 23, 2005
Sheet
Sheet
Sheet
10 34
10 34
10 34
Rev
Rev
Rev
0A
0A
0A
of
of
of
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