MSI MS-7241 Schematics

CONTENT SHEET

1

Cover Sheet, Block diagram
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Power
Intel LGA775 CPU - GND
Intel Broadwater - CPU
Intel Broadwater - Memory
Intel Broadwater - PCI Express
Intel Broadwater - GND
ICH8
DDR2 DIMM 1 , 2 , 3 & 4
Clock Gen ICS9LPRS512
W83627EHF / LPC / FDD / TPM
PS2 / LPT / COM Port

A A

SATA / RTC / FAN Control
LAN - RTL8100C / 8110S / 8110SB
Azalia Codec (ALC883)
PCIE X16 & X1 SLOT
PCI SLOT 1 & 2
ATX, IDE Connector & F_Panel
USB Connectors

1-2

3
4
5
6
7
8

9
10-12
13~15

16
17
18
19
20
21
22
23
24
25

MS-7241

CPU:

System Chipset:

On Board Device:

Main Memory:

Expansion Slots:

Intel Pentium 4 Cedar Mill / Prescott , Pentium D Smithfield /
Presler and Conroe family processors in LGA775 Package.

Intel Broadwater-G/GC/GF (North Bridge)
Intel ICH8 / 8R (South Bridge)

BIOS -- SPI Flash 8M
Azalia Codec -- ALC883
LPC Super I/O -- W83627EHF (Ver:H)
LAN -- Realtek RTL8100C / 8110S / 8110SB
CLOCK Gen -- ICS 9LPRS512 (56pin)
1394 Controller -- VT6307 / VT6308 (2-port)
Hi-USB to PATA Bridge -- JM20335

Dual-channel DDR-II * 4 (Max 4GB)

PCI EXPRESS X16 SLOT *1
PCI EXPRESS X1 SLOT * 1
PCI SLOT * 2

uATX

Version: 0A

IEEE1394-VIA6307 / 6308
MS7 ACPI Controller
VRD 11 - ISL6306 (4 Phases)
VGA Connector
GPIO & JUMPER SETTING
Revision History
Manual Parts
Power Delivery / PWOK / Reset Map

26
27
28
29
30
31
32

33~35

Intersil PWM:

Controller: Intersil ISL6306 (4 Phases)

STD 601-7241-A10

OPT:A Broadwater/ICH8/W83627EHF/ALC883

1

(RTL8100C/IDE)
(RTL8110SB/3-FUSB)

cfg-STDBroadwater/ICH8/W83627EHF/ALC883
cfg-A 601-7241-A20

MSI

Size Document Description Rev

Custom

Wednesday, November 23, 2005

Date:

BOMOrcad ConfigureFunctionOption

MICRO-STAR INT'L CO.,LTD

MS-7241

COVER SHEET

Sheet of

135

0A

1

Block Diagram

Board Stack-up

VRD 11
ISL6306
4-Phase PWM

PCI_E X16
Connector

Analog

Video Out

A A

PCI_E X1

PCI EXPRESS X16

RGB

PCI EXPRESS X1

Intel LGA775 Processor

FSB 533/800/1066

FSB

Broadwater
G/GC/GF
GMCH

DMI

DDRII

DDR2 533/667/800

4 DDR II
DIMM
Modules

PCI Slot 1

PCI Slot 2

LAN

SATA-II 0~5

USB Port 0~9

SATA2

USB2.0

ICH8

PCI

RTL8100C(10/100)
RTL8110S/8110SB(G)

1394

J1394_1

J1394_2

VT6307/6308

HD Audio Codec

ALC883

HD Audio Link

(1080 Prepreg Considerations)

Solder Mask

PREPREG 2.7mils

CORE 50mils

Solder Mask

PREPREG 2.7mils

Single End 50ohm Top/Bottom : 4mils
USB 2.0 90-ohm : 15/4.5/7.5/4.5 /15
SATA 95-ohm : 15/4/8/4/15
LAN 100-ohm : 15/4/ 8/4/ 15
PCIE 95-ohm : 15/4/8/4/15
IEEE1394 110-ohm : 15/4/9/4/15

1.9mils Cu plus plating

1.9mils Cu plus plating

Board Stack-up

(2116 Prepreg Considerations)

Solder Mask

PREPREG 4.7mils

1/2 oz. Cu plus plating

1 oz. (1.2mils)
Cu Power
Plane

1 oz. (1.2mils)
Cu GND
Plane

1 oz. Cu Power
Plane

Hi-USB to PATA

JM20335

IDE

USB2.0

Flash ROM

SPI

CORE 47mils

LPC SIO
Winbond

83627EHF

Solder Mask

LPC Bus

TPMSPI

FWH

Keyboard

Floopy

SerialParallel

PREPREG 4.7mils

1/2 oz. Cu plus plating

Single End 60ohm Top/Bottom : 5mils
IEEE1394 110ohm Top : 5/7/ 5
PCIE, LAN, SATA 100ohm Top : 5/ 6/5
USB 2.0 90ohm Top : 7.5/7.5/7.5

1 oz. Cu Ground
Plane

Mouse

MICRO-STAR INT'L CO.,LTD

MSI

Size Document Description Rev

Custom

Wednesday, November 23, 2005

1

Date:

MS-7241

BLOCK DIAGRAM

Sheet of

0A

235

8

D D

H_DBI#[0..3]6

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

H_IERR#4

H_FERR#4,10

H_STPCLK#10

H_INIT#10

H_DBSY#6

H_DRDY#6

H_TRDY#6

C C

B B

H_ADS#6

H_LOCK#6

H_BNR#6

H_HIT#6
H_HITM#6
H_BPRI#6

H_DEFER#6

THERMDA17
THERMDC17

H_PROCHOT#4,11,28

H_IGNNE#10

ICH_H_SMI#10

H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK

THERMDA

TRMTRIP#4,10

H_A20M#10

THERMDC

H_TESTHI13

CPU_BSEL016
CPU_BSEL116
CPU_BSEL216

H_PWRGD4,11

H_CPURST#4,6

H_D#[0..63]6

A A

H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54

7

G11
D19
C20

AB2
AB3

AD3

AD1
AF1
AC1
AG1
AE1

AL1

AK1
AE8

AL2

AH2
AE6
G10

D16

A20

AA2
G29

H30
G30

G23

B22
A22
A19
B19
B21

C21

B18
A17
B16

C18

H_A#[3..35]6

A8

F2

R3

M3

P3

H4

B2

C1

E3

D2
C3
C2
D4

E4
G8
G7

M2

N2

P2

K3

L2

N5
C9

Y1

V2

N1

U8A

DBI0#
DBI1#
DBI2#
DBI3#

EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#

DBSY#
DRDY#
TRDY#

ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#

TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13

RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5

BOOTSELECT
LL_ID0
LL_ID1

BSEL0
BSEL1
BSEL2

PWRGOOD
RESET#
D63#

D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#

D53#

B15

C14

D52#

C15

D51#

A14

D50#

D17

CPU SIGNAL BLOCK

H_A#28

H_A#30

H_A#33

H_A#31

H_A#32

H_A#35

D49#

AJ6

D20

H_A#34

AJ5

A35#

D48#

G22

AH5

A34#

D47#

D22

AH4

A33#

D46#

E22

AG5

A32#

D45#

G21

AG4

A31#

D44#

F21

H_A#29

AG6

A30#

D43#

E21

AF4

A29#

D42#

F20

A28#

D41#

6

H_A#18

H_A#22

H_A#27

H_A#23

H_A#24

H_A#25

H_A#26

AF5

AB4

AC5

AB5

AA5

A27#

A26#

A25#

A24#

A23#

D40#

D39#

D38#

D37#

D36#

E19

E18

F18

F17

G17

H_A#16

H_A#17

H_A#20

H_A#21

AD6

A22#

D35#

G18

H_A#15

H_A#14

H_A#19

AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4M5P6L5

A21#

A20#

A19#

A18#

A17#

A16#

A15#

D34#

D33#

D32#

D31#

D30#

D29#

D28#

E16

E15

G16

G15

F15

G14

F14

G13

H_A#13

A14#

D27#

E13

H_A#12

A13#

D26#

D13

H_A#11

A12#

D25#

F12

5

H_A#7

H_A#8

H_A#9

H_A#10

A9#

A8#

A11#

A10#

D24#

D23#

D22#

D21#

F11

D10

E10D7E9F9F8G9D11

H_A#6

A7#

D20#

H_A#5

A6#

D19#

H_A#4

A5#

D18#

H_A#3

A4#

D17#

A3#

D16#

AC2

D15#

C12

AN3

DBR#

D14#

D13#

B12D8C11

AN4

AN5

AN6

VSS_SENSE

VCC_SENSE

VSS_MB_REGULATION

VCC_MB_REGULATION

D12#

D11#

D10#

D9#

B10

A11

A10A7B7B6A5C6A4C5B4

D8#

4

VCC_VRM_SENSE
VSS_VRM_SENSE

VID[0..7] 28

VID2

VID3

VID7

AJ3

AK3

ITP_CLK1

ITP_CLK0

D7#

D6#

D5#

AM7

VID6

AM5

RSVD#AM7

D4#

VID4

VID5

AL4

AK4

AL6

VID6#

VID5#

VID4#

VID_SELECT

GTLREF_SEL

FORCEPH

LINT1/NMI

LINT0/INTR

D3#

D2#

D1#

VID1

VID0

AM3

AL5

VID3#

VID2#

VID1#

GTLREF0
GTLREF1

GTLREF2

BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#

PCREQ#

REQ4#
REQ3#
REQ2#
REQ1#
REQ0#

TESTHI12
TESTHI11
TESTHI10

TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0

RSVD#G6

BCLK1#
BCLK0#

RS2#
RS1#
RS0#

AP1#
AP0#

BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0

DP3#

DP2#

DP1#

DP0#

ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

D0#

AM2

VID0#

AN7
H1
H2

GTLREF_SEL

H29

CPU_MCH_GTLREF

E24

H_BPM#5

AG3

H_BPM#4

AF2

H_BPM#3

AG2

H_BPM#2

AD2

H_BPM#1

AJ1

H_BPM#0

AJ2

PECI

G5

H_REQ#4

J6

H_REQ#3

K6

H_REQ#2

M6

H_REQ#1

J5

H_REQ#0

K4

H_TESTHI12

W2

H_TESTHI11

P1

H_TESTHI10

H5

H_TESTHI9

G4

H_TESTHI8

G3
F24
G24
G26
G27
G25
F25
W3
F26

FORCEPH

AK6

RSVD_G6

G6
G28

F28

H_RS#2

A3

H_RS#1

F5

H_RS#0

B3

TEST-U3

U3

TEST-U2

U2
F3

H_COMP5

T2

H_COMP4

J2

H_COMP3

R1

H_COMP2

G2

H_COMP1

T1

H_COMP0

A13

TEST-J17

J17

TEST-H16

H16

TEST-H15

H15

TEST-J16

J16
AD5

R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1

VTT_OUT_RIGHT

R62
1KR/2

CPU_GTLREF0
CPU_GTLREF1

H_TESTHI2_7
H_TESTHI1
H_TESTHI0

3

VCC_VRM_SENSE 28
VSS_VRM_SENSE 28

VRD_VIDSEL 28
CPU_GTLREF0 4
CPU_GTLREF1 4

T4

CPU_MCH_GTLREF 6

PECI 10
H_REQ#[0..4] 6

R145 51R/2
R142 51R/2

R83 X_130R/2
R102 X_51R/2

CK_H_CPU# 16
CK_H_CPU 16

H_RS#[0..2] 6

T2
T1

R94 49.9R1%/2
R106 49.9R1%/2
R99 49.9R1%/2
R124 49.9R1%/2
R95 49.9R1%/2
R151 49.9R1%/2

T5
T7
T3
T6

H_ADSTB#1 6
H_ADSTB#0 6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 10
H_INTR 10

2

VID2
VID0
VID5
VID4
VID7
VID3
VID6
VID1

H_BPM#0
H_BPM#1
H_BPM#5
H_BPM#3

H_TRST#
H_BPM#4
H_TDO
H_TCK

H_TDI
H_BPM#2
H_TMS

H_TESTHI12
H_TESTHI11
H_TESTHI9
H_TESTHI10

H_TESTHI8
H_TESTHI1
H_TESTHI13

V_FSB_VTT 4,6,12,16,27

VTT_OUT_RIGHT
VTT_OUT_LEFT

VTT_OUT_RIGHT 4,5
FORCEPH 28

H_BR#0 4,6

C75
C0.1U16Y2

RN2

8P4R-680R

1
3
5
7
1
3
5
7

RN3

8P4R-680R

1 2
3 4
5 6
7 8

RN5 8P4R-51R/2

1 2
3 4
5 6
7 8

RN6

1 2
3 4
5 6
7 8

RN8 8P4R-51R/2

1 2
3 4
5 6
7 8

RN10 8P4R-51R/2

R122 51R/2
R101 51R/2
R103 51R/2

VTT_OUT_LEFT 4

2
4
6
8
2
4
6
8

8P4R-51R/2

1

VTT_OUT_RIGHT

C65

C0.1U16Y2

VTT_OUT_RIGHT

VTT_OUT_LEFT

C60

C0.1U16Y2

C69
X_C0.1U16Y2

ZIF-SOCK775-15u-in

H_D#53

H_D#52

H_D#51

H_D#50

H_D#49

H_D#48

H_D#46

H_D#47

H_D#45

H_D#44

H_D#43

H_D#42

H_D#41

H_D#40

H_D#38

H_D#39

H_D#36

H_D#37

H_D#34

H_D#35

H_D#32

H_D#33

H_D#31

H_D#30

H_D#29

H_D#28

H_D#26

H_D#27

H_D#25

H_D#24

H_D#23

H_D#22

H_D#20

H_D#21

H_D#18

H_D#19

H_D#17

H_D#16

H_D#14

H_D#15

H_D#12

H_D#13

H_D#10

H_D#11

H_D#8

H_D#9

H_D#6

H_D#7

H_D#5

H_D#4

H_D#2

H_D#3

H_D#0

H_D#1

MICRO-STAR INT'L CO.,LTD

MSI

Size Document Description Rev

Custom

Wednesday, November 23, 2005

8

7

6

5

4

3

Date:

2

MS-7241

LGA775 - SIGNALS

335

Sheet of

1

0A

8

VCCP

AF9

AF8

AF22

AF21

U8B

VCCP

AF19

D D

C C

AF18
AF15
AF14
AF12
AF11

AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11

AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23

AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23

AB8
AA8

VCC#AF19
VCC#AF18
VCC#AF15
VCC#AF14
VCC#AF12
VCC#AF11
VCC#AE9
VCC#AE23
VCC#AE22
VCC#AE21
VCC#AE19
VCC#AE18
VCC#AE15
VCC#AE14
VCC#AE12
VCC#AE11
VCC#AD8
VCC#AD30
VCC#AD29
VCC#AD28
VCC#AD27
VCC#AD26
VCC#AD25
VCC#AD24
VCC#AD23
VCC#AC8
VCC#AC30
VCC#AC29
VCC#AC28
VCC#AC27
VCC#AC26
VCC#AC25
VCC#AC24
VCC#AC23
VCC#AB8
VCC#AA8

VCCP

VCC#AF9

VCC#AF8

VCC#AF22

VCC#AF21

VCC#Y28

VCC#Y29

VCC#Y30

VCC#Y8

Y28

Y29

Y30

Y8

7

AH14

AH12

AH11

AG9

AG8

AG30

AG29

AG28

AG27

AG26

AG25

AG22

AG21

AG19

AG18

AG15

AG14

AG12

AG11

VCC#AG9

VCC#AG8

VCC#AH14

VCC#AH12

VCC#AH11

VCC#AG30

VCC#AG29

VCC#AG28

VCC#AG27

VCC#AG26

VCC#AG25

VCC#AG22

VCC#AG21

VCC#AG19

VCC#AG18

VCC#AG15

VCC#AG14

VCC#AG12

VCC#AG11

VCC#U28

VCC#U29

VCC#U30

VCC#U8

VCC#V8

VCC#W23

VCC#W24

VCC#W25

VCC#W26

VCC#W27

VCC#W28

VCC#W29

VCC#W30

VCC#W8

VCC#Y23

VCC#Y24

VCC#Y25

VCC#Y26

VCC#Y27

U28

U29

U30U8V8

W23

W24

W25

W26

W27

W28

W29

W30W8Y23

Y24

Y25

Y26

Y27

AH18

AH15

VCC#AH18

VCC#AH15

VCC#U26

VCC#U27

U26

U27

AH21

AH19

VCC#AH21

VCC#AH19

VCC#U24

VCC#U25

U24

U25

AH25

AH22

VCC#AH22

VCC#U23

6

AH27

AH26

AH28

AH29

AH30

AH8

AH9

AJ11

AJ12

AJ14

AJ15

AJ18

AJ19

VCC#AH8

VCC#AH9

VCC#AJ11

VCC#AJ12

VCC#AJ14

VCC#AJ15

VCC#AJ18

VCC#T23

VCC#P8

VCC#R8

VCC#N30

VCC#N8

N30N8P8R8T23

VCC#AJ19

VCC#N29

N29

VCC#AH27

VCC#AH26

VCC#AH25

VCC#AH28

VCC#AH29

VCC#AH30

VCC#T24

VCC#T25

VCC#T26

VCC#T27

VCC#T28

VCC#T29

VCC#T30

VCC#T8

T24

T25

T26

T27

T28

T29

T30T8U23

AJ21

AJ22

VCC#AJ21

VCC#AJ22

VCC#N27

VCC#N28

N27

N28

AJ25

AJ26

VCC#AJ25

VCC#AJ26

VCC#N25

VCC#N26

N25

N26

AJ8

AJ9

VCC#AJ8

VCC#AJ9

VCC#N23

VCC#N24

N24

5

AK11

AK12

AK14

AK15

AK18

AK19

AK21

AK22

AK25

AK26

AK8

AK9

AL11

AL12

VCC#AK8

VCC#AK9

M24

VCC#AL11

VCC#AK22

VCC#AK25

VCC#AK26

VCC#K29

VCC#K30

VCC#K8

VCC#L8

VCC#M23

VCC#M24

K28

K29

K30K8L8

M23

VCC#AK11

VCC#AK12

VCC#AK14

VCC#AK15

VCC#AK18

VCC#AK19

VCC#AK21

VCC#M25

VCC#M26

VCC#M27

VCC#M28

VCC#M29

VCC#M30

VCC#M8

M25

M26

M27

M28

M29

M30M8N23

4

AL14

AL15

AL18

AL19

AL21

AL22

AL25

AL26

AL29

AL30

AL8

AL9

AM11

AM12

AM14

AM15

AM18

AM19

AM21

VCC#AL8

VCC#AL12

VCC#AL14

VCC#AL15

VCC#AL18

VCC#AL19

VCC#AL21

VCC#AL22

VCC#J9

VCC#K23

VCC#K24

VCC#K25

VCC#K26

VCC#K27

VCC#K28

K23

K24

K25

K26

K27

VCC#AL25

VCC#AL26

VCC#J30

VCC#J8

J30J8J9

VCC#AL29

VCC#J29

J28

J29

VCC#AL30

VCC#J27

VCC#J28

J26

J27

VCC#AL9

VCC#AM11

VCC#J25

VCC#J26

J24

J25

VCC#AM12

VCC#AM14

VCC#J23

VCC#J24

J22

J23

VCC#AM15

VCC#AM18

VCC#J21

VCC#J22

J20

J21

VCC#AM19

VCC#J20

J19

AM22

AM25

VCC#AM21

VCC#AM22

VCC#J18

VCC#J19

J15

J18

AM26

AM29

VCC#AM25

VCC#AM26

VCC#J14

VCC#J15

J13

J14

AM30

AM8

VCC#AM29

VCC#AM30

VCC#J12

VCC#J13

J11

J12

3

AM9

VCC#AM8

VCC#AM9

VCC#J10

VCC#J11

J10

AN11

AN12

VCC#AN11

VCC#AN12

VCC#AN8

VCC#AN9

AN8

AN9

AN14

AN15

AN18

AN19

VCC#AN14

VCC#AN15

VCC#AN18

VCC#AN19

VTT_OUT_RIGHT

VTT_OUT_LEFT

VCC#AN25

VCC#AN26

VCC#AN29

VCC#AN30

AN25

AN26

AN29

AN30

AN21

AN22

A23

VCCA

B23

VSSA

VCC#AN22

VCCPLL

VTT#A25
VTT#A26
VTT#A27
VTT#A28
VTT#A29
VTT#A30
VTT#B25
VTT#B26
VTT#B27
VTT#B28
VTT#B29

VTT#B30
VTT#C25
VTT#C26
VTT#C27
VTT#C28
VTT#C29
VTT#C30
VTT#D25
VTT#D26
VTT#D27
VTT#D28
VTT#D29
VTT#D30

VTT_SEL

RSVD#F29

123

123

D23
C23

A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
AM6

AA1
J1
F27

F29

4

4

VCC#AN21

VCC-IOPLL

VTTPWRGD

ZIF-SOCK775-15u-in

2

H_VCCA
H_VSSA
H_VCCPLL
H_VCCA

VTT_PWG
VTT_OUT_RIGHT

VTT_OUT_LEFT

V_FSB_VTT

C130

C169

C10U10Y5

C10U10Y5

CAPS FOR FSB GENERIC

1

C118

X_C22U6.3X5R6

R121
210R1%/2

R114
210R1%/2

R118 49.9R1%/2

C76
C1U16Y3

R116 49.9R1%/2

C71
C1U16Y3

H_PROCHOT#
H_IERR#

H_CPURST#
H_PWRGD
H_BR#0

TRMTRIP#
H_FERR#

C79
C220P50N2

C77
C220P50N2

CPU_GTLREF0 3

*GTLREF VOLTAGE SHOULD BE

0.63*VTT = 0.756V

CPU_GTLREF1 3

H_PROCHOT# 3,11,28VTT_OUT_RIGHT3,5
H_IERR# 3

H_CPURST# 3,6
H_BR#0 3,6

TRMTRIP# 3,10
H_FERR# 3,10

6

*PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
*TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS

V_FSB_VTT V_1P5_ICH

L3 X_L10U_100mA_0805

CP4

X_COPPER

C109
X_C1U16Y3

C114
C10U10Y5

C117
C10U10Y5

H_VCCA

H_VSSA

VTT_PWRGOOD

R59
1KR/2

R58 1KR/2

4

VTT_OUT_RIGHT

R60
680R/2

Q6

2N3904

1.25V VTT_PWRGOOD

VTT_PWG

MSI

3

VCC5_SB

VID_GD#16,27,28

5

CP5

X_COPPER

X_C1U16Y3

VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns

C132

H_VCCPLL

C134

C103P25X2

C126
C10U10Y5

MICRO-STAR INT'L CO.,LTD

Size Document Description Rev

Custom

Wednesday, November 23, 2005

Date:

2

MS-7241

LGA775 - POWER

435

Sheet of

1

0A

VTT_OUT_RIGHT

B B

VTT_OUT_RIGHT

R120 124R1%/2

R115 124R1%/2

PLACE AT CPU END OF ROUTE

VTT_OUT_RIGHT

VTT_OUT_LEFT3 H_PWRGD 3,11

A A

VTT_OUT_LEFT

R93 130R/2
R90 62R/2

R54 62R/2

R100 X_100R/2

R126 62R/2

PLACE AT ICH END OF ROUTE

V_FSB_VTT3,6,12,16,27

8

V_FSB_VTT

R309 62R/2
R319 62R/2

7

8

7

6

5

4

3

2

1

VTT_OUT_RIGHT3,4

R108

D D

CP24

X_COPPER

C C

B B

R89

49.9R1%/0402

U8C

A12

VSS#A12

A15

VSS#A15

A18

VSS#A18

A2

VSS#A2

A21

VSS#A21

A24

VSS#A24

A6

VSS#A6

A9

VSS#A9

AA23

VSS#AA23

AA24

VSS#AA24

AA25

VSS#AA25

AA26

VSS#AA26

AA27

VSS#AA27

AA28

VSS#AA28

AA29

VSS#AA29

AA3

VSS#AA3

AA30

VSS#AA30

AA6

VSS#AA6

AA7

VSS#AA7

AB1

VSS#AB1

AB23

VSS#AB23

AB24

VSS#AB24

AB25

VSS#AB25

AB26

VSS#AB26

AB27

VSS#AB27

AB28

VSS#AB28

AB29

VSS#AB29

AB30

VSS#AB30

AB7

VSS#AB7

AC3

VSS#AC3

AC6

VSS#AC6

AC7

VSS#AC7

AD4

VSS#AD4

AD7

VSS#AD7

AE10

VSS#AE10

AE13

VSS#AE13

AE16

VSS#AE16

AE17

VSS#AE17

AE2

VSS#AE2

AE20

VSS#AE20

AE24

VSS#AE24

AE25

VSS#AE25

AE26

VSS#AE26

AE27

VSS#AE27

AE28

VSS#AE28

49.9R1%/0402

H_COMP6

H_COMP7

Y3

AE3

COMP6

VSS#AE29

VSS#AE30

AE29

AE30

AE5

51R/0402

R78

TP3

TP4

1

AE4D1D14

E23E5E6E7F23F6B13J3N4P5V1W1AC4Y7Y5Y2W7W4V7V6V30V3V29

COMP7

RSVD#D1

RSVD#E23

RSVD#D14

RSVD#AE4

VSS#AE5

VSS#AE7

VSS#AF10

VSS#AF13

VSS#AF16

VSS#AF17

AE7

AF10

AF13

AF16

AF17

AF20

R152

24.9R1%/0402

TP2

51R/0402

1

H_COMP8

1

IMPSEL#

RSVD#E5

RSVD#E6

RSVD#E7

RSVD#F23

RSVD#B13

VSS#AF20

VSS#AF23

VSS#AF24

VSS#AF25

VSS#AF26

VSS#AF27

VSS#AF28

VSS#AF29

AF23

AF24

AF25

AF26

AF27

AF28

AF29

AF3

RSVD#J3

VSS#AF3

R96

AF30

RSVD#N4

VSS#AF30

AF6

RSVD#P5

VSS#AF6

AF7

VSS#AF7

AG10

R97

51R/0402

MSID[1]

MSID[0]

VSS#AG10

VSS#AG13

AG13

AG16

V28

V27

V26

VSS#Y7

VSS#Y5

VSS#Y2

VSS#V7

VSS#V6

VSS#V3

VSS#W7

VSS#W4

VSS#V30

VSS#V29

VSS#V28

RSVD#AC4

VSS#AG16

VSS#AG17

VSS#AG20

VSS#AG23

VSS#AG24

VSS#AG7

VSS#AH1

VSS#AH10

VSS#AH13

AG17

AG20

AG23

AG24

AG7

AH1

AH10

AH13

VSS#V27

VSS#AH16

VSS#AH17

VSS#AH20

VSS#AH23

VSS#AH24

VSS#AH3

AH16

AH17

AH20

AH23

AH24

AH3

AH6

X_COPPER

V25

V24

V23U7U1T7T6T3R7R5R30

VSS#U7

VSS#U1

VSS#V26

VSS#V25

VSS#V24

VSS#V23

VSS#AH6

VSS#AH7

VSS#AJ10

VSS#AJ13

VSS#AJ16

VSS#AJ17

AH7

AJ10

AJ13

AJ16

AJ17

CP20

VSS#T7

VSS#AJ20

AJ20

H3H6H7H8H9J4J7

H14

VSS#J4

VSS#J7

VSS#AM28

AM4

VSS#AM4

VSS#H3

VSS#H6

VSS#H7

VSS#H8

VSS#H9

VSS#AN1

VSS#AN10

VSS#AN13

VSS#AN16

AN1

AN10

AN13

AN16

VSS#H24

VSS#H25

VSS#H26

VSS#H27

VSS#H28

VSS#AN17

VSS#AN2

VSS#AN20

VSS#AN23

VSS#AN24

VSS#AN27

AN17

AN2

AN20

AN23

AN24

AN27

VSS#H22

VSS#H23

VSS#AN28

AN28B1B11

VSS#H14
VSS#H13

VSS#H18

VSS#H19

VSS#H20

VSS#H21

VSS#H12
VSS#H11
VSS#H10

VSS#F22
VSS#F19
VSS#F16
VSS#F13
VSS#F10

VSS#E29
VSS#E28
VSS#E27
VSS#E26
VSS#E25
VSS#E20

VSS#E17
VSS#E14
VSS#E11

VSS#D24
VSS#D21
VSS#D18
VSS#D15
VSS#D12

VSS#C24
VSS#C22
VSS#C19
VSS#C16
VSS#C13
VSS#C10

VSS#B24
VSS#B20
VSS#B17

VSS#B1

VSS#B11

VSS#B14

B14

H13

VSS#H17

H12
H11
H10
G1

VSS#G1

F7

VSS#F7

F4

VSS#F4

F22
F19
F16
F13
F10
E8

VSS#E8

E29
E28
E27
E26
E25
E20
E2

VSS#E2

E17
E14
E11
D9

VSS#D9

D6

VSS#D6

D5

VSS#D5

D3

VSS#D3

D24
D21
D18
D15
D12
C7

VSS#C7

C4

VSS#C4

C24
C22
C19
C16
C13
C10
B8

VSS#B8

B5

VSS#B5

B24
B20
B17

ZIF-SOCK775-15u-in

CP21

X_COPPER

CP25

X_COPPER

VSS#L26

VSS#AM13

L25

AM16

VSS#L25

VSS#AM16

L24

VSS#L24

VSS#AM17

AM17

L23K7K5

VSS#K7

VSS#L23

VSS#AM20

VSS#AM23

AM20

AM23

K2

VSS#K2

VSS#K5

VSS#AM24

VSS#AM27

AM24

AM27

AM28

R29

R28

R27

R26

R25

R24

R23R2P7P4P30

P29

P28

P27

P26

P25

P24

P23N7N6N3M7M1L7L6L30L3L29

VSS#T6

VSS#T3

VSS#R7

VSS#R5

VSS#R30

VSS#R29

VSS#R28

VSS#R27

VSS#AJ23

VSS#AJ24

VSS#AJ27

VSS#AJ28

VSS#AJ29

VSS#AJ30

VSS#AJ4

VSS#AJ7

AJ23

AJ24

AJ27

AJ28

AJ29

AJ30

AJ4

AJ7

VSS#P7

VSS#P4

VSS#R2

VSS#P30

VSS#P29

AK2

VSS#AK2

VSS#P28

VSS#AK20

VSS#AK23

VSS#AK24

VSS#AK27

VSS#AK28

AK20

AK23

AK24

AK27

AK28

VSS#R26

VSS#R25

VSS#R24

VSS#R23

VSS#AK10

VSS#AK13

VSS#AK16

VSS#AK17

AK10

AK13

AK16

AK17

VSS#N7

VSS#N6

VSS#N3

AK7

VSS#P24

VSS#AK7

VSS#M7

VSS#P23

VSS#AL10

VSS#AL13

VSS#AL16

VSS#AL17

VSS#AL20

AL10

AL13

AL16

AL17

AL20

AL23

VSS#P27

VSS#P26

VSS#P25

VSS#AK29

VSS#AK30

VSS#AK5

AK29

AK30

AK5

L28

L27

L26

VSS#L7

VSS#L6

VSS#L3

VSS#M1

VSS#L30

VSS#L29

VSS#L28

VSS#L27

VSS#AL23

VSS#AL24

VSS#AL27

VSS#AL28

VSS#AL3

VSS#AL7

VSS#AM1

VSS#AM10

AL24

AL27

AL28

AL3

AL7

AM1

AM10

AM13

H17

H18

H19

H20

H21

H22

H23

H24

H25

H26

H27

H28

1

CPU DECOUPLING CAPACITORS

VCCP VCCP

EC25
C10U6.3X5R/1206
EC23

A A

C10U6.3X5R/1206
EC35
C10U6.3X5R/1206

VCCP

EC24
C10U6.3X5R/1206
EC20
C10U6.3X5R/1206
EC34
C10U6.3X5R/1206

EC22
C10U6.3X5R/1206
EC30
C10U6.3X5R/1206
EC33
C10U6.3X5R/1206

VCCP

EC21
C10U6.3X5R/1206
EC31
C10U6.3X5R/1206
EC32
C10U6.3X5R/1206

TP1

MICRO-STAR INT'L CO.,LTD

Place these caps within socket cavity

8

7

6

5

4

3

MSI

Size Document Description Rev

Custom

Wednesday, November 23, 2005

Date:

2

MS-7241

LGA775 - GND

535

Sheet of

1

0A

8

7

6

5

4

3

2

1

V_1P25_CORE

V_FSB_VTT3,4,12,16,27

P29

P27

P26

P24

P23

N29

N26

N24

N23

M29

M24

M23

L24

L23

K24

K23

J24

J23

H24

H23

G26

G24

G23

F26

F24

F23

E29

E27

E26

E23

D29

D28

D27

C30

C29

C27

B30

B29

B28

B27

A30

A28

R27

R26

R24

R23

AG19

AG18

AG17

AG15

AG14

AF26

AF25

AF24

AF22

AF20

AF18

AF17

AF15

AF14

AE27

AE26

AE25

AE23

AE21

AE19

AE17

AD27

AD26

AD18

AD17

AD15

AD14

AC27

AC26

AC17

AC15

AC14

AB27

AB26

AB18

AB17

AA27

VCC_116

VCC_117

VCC_118

VCC_78

VCC_79

VCC_81

Y11

AG25

VCC_119

VCC_120

VCC_82

VCC_83

AG21

AG20

AA26

HD0
HD1
HD2

VCC_121

VCC_122

HD3
HD4
HD5
HD6
HD7
HD8

HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63

HDINV#0
HDINV#1
HDINV#2
HDINV#3

HDSTBP0#
HDSTBN0#

HDSTBP1#
HDSTBN1#

HDSTBP2#
HDSTBN2#

HDSTBP3#
HDSTBN3#

Broadwater-G

R40
P41
R41
N40
R42
M39
N41
N42
L41
J39
L42
J41
K41
G40
F41
F42
C42
D41
F38
G37
E42
E39
E37
C39
B39
G33
A37
F33
E35
K32
H32
B34
J31
F32
M31
E31
K31
G31
K29
F31
J29
F29
L27
K27
H26
L26
J26
M26
C33
C35
E41
B41
D42
C40
D35
B40
C38
D37
B33
D33
C34
B35
A32
D32

M40
J33
G29
E33

L40
M43

G35
H33

G27
H27

B38
D38

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

H_DSTBP#0 3
H_DSTBN#0 3

H_DSTBP#1 3
H_DSTBN#1 3

H_DSTBP#2 3
H_DSTBN#2 3

H_DSTBP#3 3
H_DSTBN#3 3

H_D#[0..63] 3

H_DBI#[0..3] 3

N32
N34
M38
N37
M36
R34
N35
N38
U37
N39
R37

R39
R38

U36
U33
R35

AA37

M34
U34

G43

W40
W41

U42

AA42

W42

G39
U40

U41

AA41

U39
R32

U32

AM17

C31

AM18

D23
C25
D25

D24

J42
L39
J40
L37
L36

K42

P42
V36

V33
V35
Y34
V42
V38
Y36
Y38
Y39

F40
L35
L38

J37

Y40
T43

Y43
V41

J13

B25

B24

U12A

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HA32#
HA33#
HA34#
HA35#

HADSTB0#
HADSTB1#

HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#

HADS#
HTRDY#
HDRDY#
HDEFER#
HITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#

HRS0#
HRS1#
HRS2#

HCLKP
HCLKN

PWROK
HCPURST#

RSTIN#
ICH_SYNC#

HRCOMP
HSCOMP
HSCOMP#
HSWING

HDVREF
HAVREF

VTT_1

AJ12

VTT_2

VTT_3

VCC_1

VCC_2

AJ11

VTT_4

VCC_3

AJ10

VTT_5

VCC_4

AJ9

VTT_6

VCC_5

AJ8

VTT_7

VCC_6

AJ7

VTT_8

VCC_7

AJ6

VTT_9

VCC_8

AJ5

VTT_10

VCC_9

AJ4

AJ3

VTT_11

VTT_12

VCC_10

VCC_11

AJ2

AH4

VTT_13

VTT_14

VCC_12

VCC_13

AH2

AH1

VTT_15

VTT_16

VCC_14

VCC_15

AG13

AG12

VTT_17

VTT_18

VCC_16

VCC_17

AG11

AG10

VTT_19

VTT_20

VCC_18

VCC_19

AG9

AG8

VTT_21

VTT_22

VCC_20

VCC_21

AG7

AG6

VTT_23

VTT_24

VCC_22

VCC_23

AG5

AG4

VTT_25

VTT_26

VCC_24

VCC_25

AG3

AG2

VTT_27

VTT_28

VCC_26

VCC_27

AF13

AF12

VTT_29

VTT_30

VCC_28

VCC_29

AF11

AD24

VTT_31

VTT_32

VCC_30

VCC_31

AD22

AD20

VTT_33

VTT_34

VCC_32

VCC_80

AC25

AC23

VTT_35

VTT_36

VCC_34

VCC_35

AC21

AC19

VTT_37

VTT_38

VCC_36

VCC_37

AC13

AC6

VTT_39

VTT_40

VCC_38

VCC_39

AB24

AB22

VTT_41

VTT_42

VCC_40

VCC_41

AB20

AA25

VTT_43

VTT_44

VCC_42

VCC_43

AA23

AA21

VTT_45

VTT_46

VCC_44

VCC_45

AA19

AA13

VCC_84

VCC_46

VCC_47

AA3

Y24

VCC_85

VCC_86

VCC_48

VCC_49

Y22

Y20

VCC_87

VCC_88

VCC_50

VCC_51

Y13Y6V13

VCC_89

VCC_90

VCC_52

VCC_53

V12

VCC_91

VCC_93

VCC_54

VCC_55

V10V9U13

VCC_94

VCC_95

VCC_96

VCC_56

VCC_57

VCC_58

U10U9U6U3N12

VCC_97

VCC_98

VCC_99

VCC_100

VCC_101

VCC_102

VCC_103

VCC_104

VCC_105

VCC_59

VCC_60

VCC_61

VCC_62

VCC_63

VCC_64

VCC_65

VCC_66

VCC_67

N11N9N8N6N3L6J6J3J2G2F11F9D4

VCC_106

VCC_107

VCC_108

VCC_68

VCC_69

VCC_70

VCC_109

VCC_110

VCC_111

VCC_71

VCC_72

VCC_73

VCC_112

VCC_113

VCC_114

VCC_74

VCC_75

VCC_76

C13C9P20

VCC_115

VCC_77

PWRGD11,27

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

HXRCOMP
HXSCOMP
HXSCOMPB
HXSWING

H_A#[3..35]3

D D

H_ADSTB#03

C C

H_ADSTB#13

H_REQ#[0..4]3

H_ADS#3
H_TRDY#3
H_DRDY#3
H_DEFER#3
H_HITM#3
H_HIT#3

H_LOCK#3
H_BR#03,4
H_BNR#3
H_BPRI#3

H_DBSY#3

H_RS#[0..2]3

CK_H_MCH16

CK_H_MCH#16

H_CPURST#3,4

B B

PLTRST#10

ICH_SYNC#11

R189 16.5R1%/2

MCH_GTLREF

V_1P25_CORE

V_FSB_VTT

HXSWING SHOULD BE 1/4*VTT

R181
300R1%/2

R180
100R1%/2

R184 49.9R1%/2
C175

C103P25X2

6

HXSWING

V_FSB_VTT

5

A A

V_FSB_VTT

V_FSB_VTT

R182 49.9R1%/2

R183 49.9R1%/2

8

C179
X_C2.7P25N2

C177
X_C2.7P25N2

HXSCOMP

HXSCOMPB

V_FSB_VTT

7

*GTLREF VOLTAGE SHOULD BE

0.63*VTT=0.756V

R187
124R1%/2

CPU_MCH_GTLREF

R188 49.9R1%/2

R186
210R1%/2

C180
C1U16Y3

4

CPU_MCH_GTLREF 3

MCH_GTLREF

C186
C220P50N2

C171

C0.1U16Y2

C176

C1U16Y3

C172
C0.1U16Y2

MICRO-STAR INT'L CO.,LTD

MSI

Size Document Description Rev

Custom

Wednesday, November 23, 2005

3

Date:

2

MS-7241

Broadwater - CPU

Sheet of

635

1

0A

8

7

6

5

4

3

2

1

SCKE_B[0..3]14,15

DQM_B[0..7]14

DATA_B[0..63]14

D D

SCS_A#[0..3]13,15

RAS_A#13,15
CAS_A#13,15
WE_A#13,15

MAA_A[0..14]13,15

C C

ODT_A[0..3]13,15

SBS_A[0..2]13,15

DQS_A013
DQS_A#013
DQS_A113
DQS_A#113
DQS_A213
DQS_A#213
DQS_A313
DQS_A#313
DQS_A413
DQS_A#413
DQS_A513
DQS_A#513
DQS_A613
DQS_A#613
DQS_A713
DQS_A#713

P_DDR0_A13
N_DDR0_A13
P_DDR1_A13
N_DDR1_A13
P_DDR2_A13

B B

VCC_DDR

C152

C0.1U16Y2

N_DDR2_A13
P_DDR3_A13
N_DDR3_A13
P_DDR4_A13
N_DDR4_A13
P_DDR5_A13
N_DDR5_A13

R258 20R1%/2
R264 20R1%/2

R164 20R1%/2

SCS_A#0
SCS_A#1
SCS_A#2
SCS_A#3

RAS_A#
CAS_A#
WE_A#

MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14

ODT_A0
ODT_A1
ODT_A2
ODT_A3

SBS_A0
SBS_A1
SBS_A2

DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7

P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
P_DDR3_A
N_DDR3_A
P_DDR4_A
N_DDR4_A
P_DDR5_A
N_DDR5_A

SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3

U12B

AW35

SCS_A0#

BA35

SCS_A1#

BA34

SCS_A2#

BB38

SCS_A3#

BB33

SRAS_A#

AY35

SCAS_A#

BB34

SWE_A#

BA31

SMA_A0

BB25

SMA_A1

BA26

SMA_A2

BA25

SMA_A3

AY25

SMA_A4

BA23

SMA_A5

AY24

SMA_A6

AY23

SMA_A7

BB23

SMA_A8

BA22

SMA_A9

AY33

SMA_A10

BB22

SMA_A11

AW21

SMA_A12

AY38

SMA_A13

BA21

SMA_A14

AY37

SODT_A0

BA38

SODT_A1

BB35

SODT_A2

BA39

SODT_A3

BA33

SBS_A0

AW32

SBS_A1

BB21

SBS_A2

AU4

SDQS_A0

AR3

SDQS_A0#

BB3

SDQS_A1

BA4

SDQS_A1#

BB9

SDQS_A2

BA9

SDQS_A2#

AT20

SDQS_A3

AU18

SDQS_A3#

AR41

SDQS_A4

AR40

SDQS_A4#

AL41

SDQS_A5

AL40

SDQS_A5#

AG42

SDQS_A6

AG41

SDQS_A6#

AC42

SDQS_A7

AC41

SDQS_A7#

AU31

SCLK_A0

AR31

SCLK_A0#

AP27

SCLK_A1

AN27

SCLK_A1#

AV33

SCLK_A2

AW33

SCLK_A2#

AP29

SCLK_A3

AP31

SCLK_A3#

AM26

SCLK_A4

AM27

SCLK_A4#

AT33

SCLK_A5

AU33

SCLK_A5#

AN2

SRCOMP0

AN3

SRCOMP1

BB40 AM8

SRCOMP2 SMRCOMPVOL

BA40

SRCOMP3

DATA_B1

DATA_B0

DATA_B2

AN7

AN8

AW5

SDQ_B0

SDQ_B1

SDQ_A0

SDQ_A1

AR5

AR4

AV3

DATA_B4

DATA_B3

AW7

AN5

SDQ_B2

SDQ_B3

SDQ_A2

SDQ_A3

AV2

AP3

DATA_B5

DATA_B6

AN6

AN9

SDQ_B4

SDQ_B5

SDQ_A4

SDQ_A5

AP2

AU1

DATA_B7

DATA_B8

AU7

AT11

SDQ_B6

SDQ_B7

SDQ_A6

SDQ_A7

AV4

AY2

DATA_B10

DATA_B9

AU11

AP13

SDQ_B8

SDQ_B9

SDQ_A8

SDQ_A9

AY3

BB5

DATA_B11

DATA_B12

AR13

AR11

SDQ_B10

SDQ_B11

SDQ_B12

SDQ_A10

SDQ_A11

SDQ_A12

AY6

AW2

DATA_B14

DATA_B15

DATA_B13

AU9

AV12

AU12

SDQ_B13

SDQ_B14

SDQ_B15

SDQ_A13

SDQ_A14

SDQ_A15

AW3

BA5

BB4

DATA_B16

AU15

AY7

DATA_B18

DATA_B19

DATA_B17

AV13

AU17

SDQ_B16

SDQ_B17

SDQ_B18

SDQ_A16

SDQ_A17

SDQ_A18

BC7

AW11

DATA_B21

DATA_B20

AT17

AU13

AM13

SDQ_B19

SDQ_B20

SDQ_A19

SDQ_A20

AY11

BB6

BA6

DATA_B23

DATA_B22

AV15

AW17

SDQ_B21

SDQ_B22

SDQ_B23

SDQ_A21

SDQ_A22

SDQ_A23

BA10

BB10

DATA_B25

DATA_B24

DATA_B26

AV24

AT23

AT26

SDQ_B24

SDQ_B25

SDQ_B26

SDQ_A24

SDQ_A25

SDQ_A26

AT18

AR18

AU21

DATA_B27

DATA_B29

DATA_B28

AP26

AU23

AW23

SDQ_B27

SDQ_B28

SDQ_A27

SDQ_A28

AT21

AP17

AN17

DATA_B32

DATA_B30

DATA_B31

AR24

AN26

AW37

SDQ_B29

SDQ_B30

SDQ_B31

SDQ_A29

SDQ_A30

SDQ_A31

AP20

AV20

AV42

DATA_B34

DATA_B33

AV38

AN36

SDQ_B32

SDQ_B33

SDQ_B34

SDQ_A32

SDQ_A33

SDQ_A34

AU40

AP42

DATA_B35

DATA_B36

DATA_B37

AN37

AU35

AR35

SDQ_B35

SDQ_B36

SDQ_B37

SDQ_A35

SDQ_A36

SDQ_A37

AN39

AV40

AV41

DATA_B39

DATA_B38

DATA_B40

AN35

AR37

AM35

SDQ_B38

SDQ_B39

SDQ_B40

SDQ_A38

SDQ_A39

SDQ_A40

AR42

AP41

AN41

DATA_B43

DATA_B42

DATA_B41

AM38

AJ34

AL38

SDQ_B41

SDQ_B42

SDQ_B43

SDQ_A41

SDQ_A42

SDQ_A43

AM39

AK42

AK41

DATA_B46

DATA_B44

DATA_B45

AR39

AM34

AL37

SDQ_B44

SDQ_B45

SDQ_B46

SDQ_A44

SDQ_A45

SDQ_A46

AN40

AN42

AL42

DATA_B47

DATA_B48

DATA_B49

AL32

AG38

AJ38

SDQ_B47

SDQ_B48

SDQ_B49

SDQ_A47

SDQ_A48

SDQ_A49

AL39

AJ40

AH43

DATA_B52

DATA_B50

DATA_B51

AF35

AF33

AJ37

SDQ_B50

SDQ_B51

SDQ_A50

SDQ_A51

AF39

AE40

AJ42

DATA_B53

DATA_B54

DATA_B55

AJ35

AG33

SDQ_B52

SDQ_B53

SDQ_B54

SDQ_A52

SDQ_A53

SDQ_A54

AJ41

AF41

DATA_B56

DATA_B57

AF34

AD36

AC33

SDQ_B55

SDQ_B56

SDQ_A55

SDQ_A56

AF42

AD40

AD43

DATA_B58

DATA_B59

AA34

AA36

SDQ_B57

SDQ_B58

SDQ_B59

SDQ_A57

SDQ_A58

SDQ_A59

AB41

AA40

DATA_B61

DATA_B62

DATA_B60

AD34

AF38

AC34

SDQ_B60

SDQ_B61

SDQ_A60

SDQ_A61

AE42

AE41

AC39

DATA_B63

AA33

SDQ_B62

SDQ_B63

SDQ_A62

SDQ_A63

AB42

SCKE_B2

SCKE_B0

SCKE_B1

AY12

AW12

BB11

SCKE_B0

SCKE_B1

SCKE_A0

SCKE_A1

BC20

AY20

AY21

SCKE_B3

BA11

SCKE_B2

SCKE_B3

SCKE_A2

SCKE_A3

BA19

DQM_B0

AR7

SDM_B0

SDM_A0

AR2

DQM_B2

DQM_B1

AW9

AW13

AP23

SDM_B1

SDM_B2

SDM_A1

SDM_A2

BA2

AY9

AN18

DQM_B4

DQM_B3

AU37

AM37

SDM_B3

SDM_B4

SDM_A3

SDM_A4

AU43

AM43

DQM_B7

DQM_B5

DQM_B6

AG39

AD38

SDM_B5

SDM_B6

SDM_B7

SMRCOMPVOH

SDM_A5

SDM_A6

SDM_A7

AG40

AC40

SCS_B0#
SCS_B1#
SCS_B2#
SCS_B3#

SRAS_B#
SCAS_B#

SWE_B#

SMA_B0
SMA_B1
SMA_B2
SMA_B3
SMA_B4
SMA_B5
SMA_B6
SMA_B7
SMA_B8

SMA_B9
SMA_B10
SMA_B11
SMA_B12
SMA_B13
SMA_B14

SODT_B0
SODT_B1
SODT_B2
SODT_B3

SBS_B0

SBS_B1

SBS_B2

SDQS_B0

SDQS_B0#

SDQS_B1

SDQS_B1#

SDQS_B2

SDQS_B2#

SDQS_B3

SDQS_B3#

SDQS_B4

SDQS_B4#

SDQS_B5

SDQS_B5#

SDQS_B6

SDQS_B6#

SDQS_B7

SDQS_B7#

SCLK_B0

SCLK_B0#

SCLK_B1

SCLK_B1#

SCLK_B2

SCLK_B2#

SCLK_B3

SCLK_B3#

SCLK_B4

SCLK_B4#

SCLK_B5

SCLK_B5#

SVREF

Broadwater-G

BB27
BB30
AY27
AY31

AW26
AW29
BA27

BB17
AY17
BA17
BC16
AW15
BA15
BB15
BA14
AY15
BB14
AW18
BB13
BA13
AY29
AY13

BA29
BA30
BB29
BB31

AY19
BA18
BC12

AV6
AU5
AR12
AP12
AP15
AR15
AT24
AU26
AW39
AU39
AL35
AL34
AG35
AG36
AC36
AC37

AV31
AW31
AU27
AT27
AV32
AT32
AU29
AR29
AV29
AW27
AN33
AP32

AM6

AM10

SCS_B#0
SCS_B#1
SCS_B#2
SCS_B#3

RAS_B#
CAS_B#
WE_B#

MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
MAA_B14

ODT_B0
ODT_B1
ODT_B2
ODT_B3

SBS_B0
SBS_B1
SBS_B2

DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7

P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B
P_DDR3_B
N_DDR3_B
P_DDR4_B
N_DDR4_B
P_DDR5_B
N_DDR5_B

MCH_VREF_A

C280

X_C103P25X2

SCS_B#[0..3] 14,15

RAS_B# 14,15
CAS_B# 14,15

WE_B# 14,15

MAA_B[0..14] 14,15

ODT_B[0..3] 14,15

SBS_B[0..2] 14,15

DQS_B0 14
DQS_B#0 14
DQS_B1 14
DQS_B#1 14
DQS_B2 14
DQS_B#2 14
DQS_B3 14
DQS_B#3 14
DQS_B4 14
DQS_B#4 14
DQS_B5 14
DQS_B#5 14
DQS_B6 14
DQS_B#6 14
DQS_B7 14
DQS_B#7 14

P_DDR0_B 14
N_DDR0_B 14
P_DDR1_B 14
N_DDR1_B 14
P_DDR2_B 14
N_DDR2_B 14
P_DDR3_B 14
N_DDR3_B 14
P_DDR4_B 14
N_DDR4_B 14
P_DDR5_B 14
N_DDR5_B 14

DDR_RCOMPVOL

R272

3.01KR1%/0402

DDR_RCOMPVOH

C279

X_C103P25X2

DDR_RCOMPVOL = 0.2 * VCC_DDR

R268 1K1%/2R167 20R1%/2

R271 1K1%/2

VCC_DDR

DDR_RCOMPVOH = 0.8 * VCC_DDR

DQM_A1

DQM_A4

DQM_A2

DQM_A6

DQM_A0

DQM_A3

DQM_A7

DATA_A12

DATA_A13

DATA_A11

DATA_A15

DATA_A14

DATA_A16

DATA_A17

DATA_A18

DATA_A[0..63]13

DATA_A0

DATA_A3

DATA_A9

DATA_A10

DATA_A8

DATA_A4

DATA_A1

DATA_A2

DATA_A5

DATA_A7

DATA_A6

DATA_A19

DATA_A21

DATA_A24

DATA_A22

DATA_A23

DATA_A25

DATA_A26

DATA_A27

DATA_A29

DATA_A28

DATA_A30

DATA_A31

DATA_A33

DATA_A32

DATA_A34

DATA_A20

DATA_A36

DATA_A37

DATA_A35

DATA_A39

DATA_A38

DATA_A40

DATA_A41

DATA_A43

DATA_A42

DATA_A45

DATA_A46

DATA_A44

DATA_A48

DATA_A47

DATA_A49

DATA_A51

DATA_A52

DATA_A50

DATA_A53

DATA_A55

DATA_A54

DATA_A58

DATA_A57

DATA_A56

DATA_A61

DATA_A59

DATA_A60

DATA_A63

DATA_A62

SCKE_A0

SCKE_A1

SCKE_A2

SCKE_A3

SCKE_A[0..3]13,15

A A

DQM_A[0..7]13

DQM_A5

VCC_DDR

R273 1K1%/2

R274
1K1%/2

MCH_VREF_A

C286
C0.1U16Y2

PLACE 0.1UF CAP
CLOSE TO MCH

MICRO-STAR INT'L CO.,LTD

MSI

Size Document Description Rev

Custom

Wednesday, November 23, 2005

8

7

6

5

4

3

Date:

2

MS-7241

Broadwater - Memory

Sheet of

735

1

0A

8

EXP_A_TXP_[0..15] 22
EXP_A_TXN_[0..15] 22
EXP_A_RXP_[0..15] 22
EXP_A_RXN_[0..15] 22

EXP_A_RXP_022
EXP_A_RXN_022
EXP_A_RXP_122

V_1P5_ICH

V_1P25_CORE

V_1P25_CORE

EXP_A_RXN_122
EXP_A_RXP_222
EXP_A_RXN_222
EXP_A_RXP_322
EXP_A_RXN_322
EXP_A_RXP_422
EXP_A_RXN_422
EXP_A_RXP_522
EXP_A_RXN_522
EXP_A_RXP_622
EXP_A_RXN_622
EXP_A_RXP_722
EXP_A_RXN_722
EXP_A_RXP_822
EXP_A_RXN_822
EXP_A_RXP_922

EXP_A_RXN_922
EXP_A_RXP_1022
EXP_A_RXN_1022
EXP_A_RXP_1122
EXP_A_RXN_1122
EXP_A_RXP_1222
EXP_A_RXN_1222
EXP_A_RXP_1322
EXP_A_RXN_1322
EXP_A_RXP_1422
EXP_A_RXN_1422
EXP_A_RXP_1522
EXP_A_RXN_1522

DMI_ITP_MRP_010
DMI_ITN_MRN_010
DMI_ITP_MRP_110
DMI_ITN_MRN_110
DMI_ITP_MRP_210
DMI_ITN_MRN_210
DMI_ITP_MRP_310
DMI_ITN_MRN_310

CK_PE_100M_MCH16

CK_PE_100M_MCH#16

SDVO_CTRL_DATA22
SDVO_CTRL_CLK22

R219 1KR1%/2
R220 X_1KR1%/2

C221

C0.1U16Y2

C212
C0.1U16Y2

8

R232 0R/2
R197 X_0R/2

D D

C C

V_1P25_CORE

EXP_PRSNT_N22

V_1P25_CORE

B B

VCCD_CRT

VCCDQ_CRT

A A

EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXP_7
EXP_A_RXN_7
EXP_A_RXP_8
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15

DMI_ITP_MRP_0 DMI_MTP_IRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1

DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3

CK_PE_100M_MCH
CK_PE_100M_MCH#

SDVO_CTRL_DATA
SDVO_CTRL_CLK

H_BSL0

H_BSL016

H_BSL1

H_BSL116

H_BSL2

H_BSL216

EXP_SLR
EXP_EN

VCC_CL_PLL
VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL

V_3P3_DAC_FILTERED

R214 0R/2
R204 0R/2

VCCD_CRT
VCCDQ_CRT

VCC3

C220
C103P25X2

C213
C22000P25X2

L7 X_L10U_100mA_0805

X_C0.22U16Y3

CP9

X_COPPER

L8 X_L10U_100mA_0805

CP10

X_COPPER

F15
G15
K15

J15
F12
E12

J12
H12

J11
H11

F7
E7
E5
F6
C2
D2
G6
G5
L9
L8

M8
M9
M4

L4

M5
M6

R9

R10

T4
R4
R6
R7

W2

V1
Y8
Y9

AA7
AA6
AB3
AA4

B12
B13

G17
E17

G20

J20
J18

G18
E18

J17

Y32
C23
A24
A22
C22
B15

C17
B16
A16
C21
B21
D16

B17

V_1P25_CORE

C196

C207

X_C10U10Y5

7

U12C

EXP_RXP0
EXP_RXN0
EXP_RXP1
EXP_RXN1
EXP_RXP2
EXP_RXN2
EXP_RXP3
EXP_RXN3
EXP_RXP4
EXP_RXN4
EXP_RXP5
EXP_RXN5
EXP_RXP6
EXP_RXN6
EXP_RXP7
EXP_RXN7
EXP_RXP8
EXP_RXN8
EXP_RXP9
EXP_RXN9
EXP_RXP10
EXP_RXN10
EXP_RXP11
EXP_RXN11
EXP_RXP12
EXP_RXN12
EXP_RXP13
EXP_RXN13
EXP_RXP14
EXP_RXN14
EXP_RXP15
EXP_RXN15

DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1
DMI_RXP2
DMI_RXN2
DMI_RXP3
DMI_RXN3

GCLKP
GCLKN

SDV0_CTRLDATA
SDVO_CTRLCLK

BSEL0
BSEL1
BSEL2

MTYPE
EXP_SLR
EXP_EN

VCC_CL_PLL
VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_EXPPLL

VCCA_DAC_17
VCCA_DAC_18
VCCA_EXP_19
VCCD_CRT_20
VCCDQ_CRT_21
VSS_1

VCC33

VCCA_MPLL

C188
X_C10U10Y5

VCCA_HPLL

7

V_1P25_CORE

AL26

AL24

AL23

VCC_CL_1

VCC_CL_2

VCC_EXP_1

VCC_EXP_2

VCC_EXP_3

AD11

AD10

AD9

AD8

C187
C0.1U16Y2

C197
C0.1U16Y2

AL21

AL20

VCC_CL_3

VCC_CL_4

VCC_EXP_4

VCC_EXP_5

AD7

AD6

AL18

AL17

VCC_CL_5

VCC_CL_6

VCC_EXP_6

VCC_EXP_7

AD5

AD4

AL15

AK30

AK29

AK27

VCC_CL_7

VCC_CL_8

VCC_CL_9

VCC_CL_10

VCC_EXP_8

VCC_EXP_9

VCC_EXP_10

VCC_EXP_11

AD2

AD1

AC4

AC3

VCC_DDR

V_1P25_CORE

V_1P25_CORE

AJ31

AG31

AF31

VCC_CL_11

VCC_CL_12

VCC_CL_13

VCC_EXP_12

VCC_EXP_13

VCC_EXP_14

AC2

AE4

AE3

AD32

AC32

VCC_CL_14

VCC_CL_15

VCC_EXP_15

VCC_EXP_16

AE2

6

AA32

AJ30

AJ29

AJ27

AG30

AG29

AG27

AG26

AF30

VCC_CL_16

VCC_CL_17

VCC_CL_18

VCC_CL_19

VCC_CL_20

VCC_CL_21

VCC_CL_22

VCC_CL_23

VCC_CL_24

VCC_CL_25

VCCSM_1

VCCSM_2

VCCSM_3

VCCSM_4

VCCSM_5

VCCSM_6

VCCSM_7

VCCSM_8

BC30

BC26

BC22

BC18

CP11

X_COPPER

CP12

X_COPPER

VCCSM_9

BC14

BB39

BB37

6

BC39

BC34

L9 X_L10U_100mA_0805

L10 X_L10U_100mA_0805

AF29

AF27

VCC_CL_26

VCC_CL_27

VCCSM_10

VCCSM_11

BB32

BB28

AD30

AD29

AC30

VCC_CL_28

VCC_CL_29

VCCSM_12

VCCSM_13

BB26

BB24

BB20

C201
X_C10U10Y5

C217
X_C10U10Y5

AC29

AL12

VCC_CL_30

VCC_CL_31

VCC_CL_32

VCCSM_14

VCCSM_15

VCCSM_16

BB18

BB16

VCCA_DPLLA

VCCA_DPLLB

AL11

AL10

AL9

VCC_CL_33

VCC_CL_34

VCCSM_17

VCCSM_18

BB12

AY32

AW24

AL8

AL7

VCC_CL_35

VCC_CL_36

VCC_CL_37

VCCSM_19

VCCSM_20

VCCSM_21

AW20

AV26

AV18 AL6

C157
C1U16Y3

C199
C0.1U16Y2

C202
C0.1U16Y2

AL5

AL4

VCC_CL_39

VCC_CL_40

VCCSM_22 VCC_CL_38

AL3

AL2

VCC_CL_41

VCC_CL_42

VCC_SMCLK_2

VCC_SMCLK_1

BA42

BB41

AK26

AK24

AK23

AK21

VCC_CL_43

VCC_CL_44

VCC_CL_45

VCC_SMCLK_5

VCC_SMCLK_4

VCC_SMCLK_3

BA43

BB42

AY42

V_CKDDR

R161 1R1%/2
R160 1R1%/2

AK20

AK18

VCC_CL_46

VCC_CL_47

H18

V_1P25_CORE

5

AK17

AK15

AK3

AK2

AK1

AJ13

AD31

AC31

AA31

Y31

AJ26

VCC_CL_48

VCC_CL_49

VCC_CL_50

VCC_CL_51

VCC_CL_52

VCC_CL_53

VCC_CL_54

VCC_CL_55

VCC_CL_56

VCC_CL_57

VCC_CL_58

RESERVED_2

RESERVED_4

RESERVED_5

RESERVED_6

RESERVED_7

RESERVED_8

RESERVED_9

RESERVED_10

RESERVED_3

RESERVED_1

AN21

BB19

L6 X_L10U_100mA_0805

5

RESERVED_11

BB2

AW42

AN32

AM31

AG32

AF32

AM21

AL31

AJ32

CP6 X_COPPER
CP7 X_COPPER

C151 C10U10Y5

L13 L10U_100mA_0805

L12 L0.1U_50mA

VCC3

X_C10U10Y5

AJ24

AJ23

VCC_CL_59

VCC_CL_60

VCC_CL_61

RESERVED_12

RESERVED_13

RESERVED_14

AA10

AA9

C226

AJ21

AJ20

VCC_CL_62

VCC_CL_63

RESERVED_15

RESERVED_16

AA11

Y12

AJ18

AJ17

VCC_CL_64

VCC_CL_65

RESERVED_17

RESERVED_18

U30

U31

C0.1U16Y2

AJ15

AJ14

AA30

AA29

Y30

Y29

V30

V29

VCC_CL_66

VCC_CL_67

VCC_CL_68

VCC_CL_69

VCC_CL_70

VCC_CL_71

VCC_CL_72

VCC_CL_73

RESERVED_25

RESERVED_19

RESERVED_20

RESERVED_21

RESERVED_22

RESERVED_23

RESERVED_24

RESERVED_26

AP21

R29

R30

U12

U11

R12

R13

F13

VCC_DDR

R237 0R/2
R238 0R/2

X_C10U10Y5

V_3P3_DAC_FILTERED

C228

4

U29

U27

VCC_CL_74

VCC_CL_75

RESERVED_28

RESERVED_27

AA39

V31

C239

4

AL13

AK14

AL29

VCC_CL_76

VCC_CL_77

VCC_CL_78

TEST2

BC43

T8

T11

VCCA_GPLL

C227

C103P25X2

AL27

EXP_TXP0
EXP_TXN0
EXP_TXP1
EXP_TXN1

VCC_CL_79

EXP_TXP2
EXP_TXN2
EXP_TXP3
EXP_TXN3
EXP_TXP4
EXP_TXN4
EXP_TXP5
EXP_TXN5
EXP_TXP6
EXP_TXN6
EXP_TXP7
EXP_TXN7
EXP_TXP8
EXP_TXN8
EXP_TXP9

EXP_TXN9
EXP_TXP10
EXP_TXN10
EXP_TXP11
EXP_TXN11
EXP_TXP12
EXP_TXN12
EXP_TXP13
EXP_TXN13
EXP_TXP14
EXP_TXN14
EXP_TXP15
EXP_TXN15

DMI_TXP0

DMI_TXN0

DMI_TXP1

DMI_TXN1

DMI_TXP2

DMI_TXN2

DMI_TXP3

DMI_TXN3

EXP_COMPO

EXP_COMPI

GREEN#

DDC_DATA

DDC_CLK

DREFCLKP
DREFCLKN

CL_PWROK

CL_RST#
CL_VERF

CL_DATA

ALLZTEST

XORTEST

TESTIN#

TEST1

TEST0

BC1

A43

Broadwater-G

T9

HSYNC

VSYNC

RED

GREEN

BLUE
RED#

BLUE#

REFSET

CL_CLK

C236
C0.1U16Y2

D11
D12
B11
A10
C10
D9
B9
B7
D7
D6
B5
B6
B3
B4
F2
E2
F4
G4
J4
K3
L2
K1
N2
M2
P3
N4
R2
P1
U2
T2
V3
U4

V7
V6
W4
Y4
AC8
AC9
Y2
AA2

AC11
AC12

C15
D15

B18
C19
B20

C18
D19
D20

L13
M13

C14
D13

A20

AM15
AA12
AM5
AD13
AD12

K20
F20
A14

EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5
EXP_A_TXP_6
EXP_A_TXN_6
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15

DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1DMI_ITN_MRN_1
DMI_MTP_IRP_2DMI_ITP_MRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3

GRCOMP

R259 24.9R1%/2

HSYNC
VSYNC

VGA_RED
VGA_GREEN
VGA_BLUE

MCH_DDC_DATA
MCH_DDC_CLK

CK_96M_DREF
CK_96M_DREF#

DACREFSET

MCH_CLPWROK
CL_VREF_MCH

T10

3

EXP_A_TXP_0 22
EXP_A_TXN_0 22
EXP_A_TXP_1 22
EXP_A_TXN_1 22
EXP_A_TXP_2 22
EXP_A_TXN_2 22
EXP_A_TXP_3 22
EXP_A_TXN_3 22
EXP_A_TXP_4 22
EXP_A_TXN_4 22
EXP_A_TXP_5 22
EXP_A_TXN_5 22
EXP_A_TXP_6 22
EXP_A_TXN_6 22
EXP_A_TXP_7 22
EXP_A_TXN_7 22
EXP_A_TXP_8 22
EXP_A_TXN_8 22
EXP_A_TXP_9 22
EXP_A_TXN_9 22
EXP_A_TXP_10 22
EXP_A_TXN_10 22
EXP_A_TXP_11 22
EXP_A_TXN_11 22
EXP_A_TXP_12 22
EXP_A_TXN_12 22
EXP_A_TXP_13 22
EXP_A_TXN_13 22
EXP_A_TXP_14 22
EXP_A_TXN_14 22
EXP_A_TXP_15 22
EXP_A_TXN_15 22

DMI_MTP_IRP_0 10
DMI_MTN_IRN_0 10
DMI_MTP_IRP_1 10
DMI_MTN_IRN_1 10
DMI_MTP_IRP_2 10
DMI_MTN_IRN_2 10
DMI_MTP_IRP_3 10
DMI_MTN_IRN_3 10

V_1P25_CORE

HSYNC 29
VSYNC 29

VGA_RED 29
VGA_GREEN 29
VGA_BLUE 29

MCH_DDC_DATA 29
MCH_DDC_CLK 29

CK_96M_DREF 16
CK_96M_DREF# 16

R205 1.3KR1%/2

MCH_CLPWROK 11

CL_RST 11
CL_N_CLK 11

CL_N_DATA 11

CL_VREF_MCH = 0.375V

V_1P25_CORE

R266
470R1%/2

R267
200R1%/2

3

CL_VREF_MCH

C278
C103P25X2

2

Reserved for Non-Graphic

VCC3

R234

CK_96M_DREF

X_10KR/2

MSI

Size Document Description Rev
Custom

Date:

2

1

Place close to GMCH

VCC_DDR

C168 C2.2U6.3Y3
C229 C2.2U6.3Y3
C223 C2.2U6.3Y3
C215 C2.2U6.3Y3
C198 C2.2U6.3Y3
C185 C2.2U6.3Y3

MCH MEMORY DECOUPLING

V_1P25_CORE

C571 X_C10U10Y5
C573 X_C10U10Y5
C289 C10U10Y5
C288 C10U10Y5
C255 C10U10Y5
C273 C10U10Y5
C574 C10U10Y5
C275 C10U10Y5
C572 C10U10Y5
C570 C10U10Y5
C272 C10U10Y5
C281 C10U10Y5
C283 C10U10Y5
C276 C10U10Y5
C569 C10U10Y5
C274 C10U10Y5
C340 C0.1U16Y2
C252 C0.1U16Y2
C267 C0.1U16Y2
C285 C0.1U16Y2
C313 C0.1U16Y2
C284 C0.1U16Y2
C333 C0.1U16Y2
C322 C0.1U16Y2
C358 C0.1U16Y2
C354 C0.1U16Y2
C353 C0.1U16Y2
C341 C0.1U16Y2

MCH CORE DECOUPLING

U12_2
X_D1x3-BK

U12_1

X5

MCH

X6
X7
X8

Heatsink

Broadwater_heatsink

U12_4
D1x3-BK

MICRO-STAR INT'L CO.,L TD

MS-7241

Broadwater - PCI Express

Wednesday, November 23, 2005

Sheet of

1

U12_3
D1x3-BK

X1
X2
X3
X4

U12_5
X_D1x3-BK

835

0A

8

7

6

5

4

3

2

1

V_1P25_CORE

M42N5N7

VSS_270

M35

VSS_269

M37

VSS_268

VSS_267

VSS_266

VSS_265

N10

VSS_264

VSS_263
VSS_262
VSS_261
VSS_260
VSS_259
VSS_258
VSS_257
VSS_256
VSS_255
VSS_254
VSS_253
VSS_252
VSS_251
VSS_250
VSS_249
VSS_248
VSS_247
VSS_246
VSS_245
VSS_244
VSS_243
VSS_242
VSS_241
VSS_240
VSS_239
VSS_238
VSS_237
VSS_236
VSS_235
VSS_234
VSS_233
VSS_232
VSS_231
VSS_230
VSS_229
VSS_228
VSS_227
VSS_226
VSS_225
VSS_224
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199
VSS_198
VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189
VSS_188

N13
N21
N27
N31
N33
N36
P2
P17
P18
P21
P30
P43
R3
R5
R8
R11
R31
R33
R36
T1
T42
U5
U7
U8
U35
U38
V2
V5
V8
V11
V32
V34
V37
V39
V43
W3
Y1
Y5
Y7
Y10
Y19
Y21
Y23
Y25
Y33
Y35
Y37
Y42
AA5
AA8
AA20
AA22
AA24
AA35
AA38
AB1
AB2
AB19
AB21
AB23
AB25
AB43
AC5
AC7
AC10
AC20
AC22
AC24
AC35
AC38
AD19
AD21
AD23
AD25
AD33
AD35

AA17

AA15

AA14

Y27

Y26

Y18

Y17

Y15

Y14

W27

W26

W25

W23

W21

W19

W18

W17

V27

V26

V25

V24

V23

V22

V21

V20

V19

V18

V17

V15

V14

U26

U25

U24

U23

U22

U21

U20

U19

U18

U17

U15

U14

R20

R18

R17

R15

R14

P15

P14

AG24

AG23

VCC_168

VCC_169

VCC_170

VCC_171

AG22

VCC_172

VCC_173

VCC_174

U12D

BC37

VSS_1

VCC_123

VCC_124

VCC_125

VCC_126

VCC_127

VCC_128

VCC_129

VCC_130

VCC_131

VCC_132

VCC_133

VCC_134

VCC_135

VCC_136

VCC_137

VCC_138

VCC_139

VCC_140

VCC_141

VCC_142

VCC_143

VCC_144

VCC_145

VCC_146

VCC_147

VCC_148

VCC_149

VCC_150

VCC_151

VCC_152

VCC_153

VCC_154

VCC_155

VCC_156

VCC_157

VCC_158

VCC_159

VCC_160

VCC_161

VCC_162

VCC_163

VCC_164

VCC_165

VCC_166

D D

C C

B B

BC32
BC28
BC24
BC10

BC5

BB7

AY41

AY4
AW43
AW41

AW1
AV37
AV35
AV27
AV23
AV21
AV17
AV11

AV9

AV7
AU42
AU38
AU32
AU24
AU20

AU6

AU2
AT31
AT29
AT15
AT13
AT12
AR38
AR33
AR32
AR27
AR26
AR23
AR21
AR20
AR17

AR9

AR6
AP43
AP24
AP18

AP1
AN38
AN31
AN29
AN24
AN23
AN20
AN15
AN13
AN12
AN11

AN4
AM42
AM40
AM36
AM33
AM29
AM24
AM23
AM20
AM11

AM9

AM7

AM4

AM2

AM1

AL36
AL33

AK43

VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76

VCC_167

M20

L15

L18

M18

F17

K17

N20

BC42

BC2

BB43

BB1

B43

NC_1

NC_2

NC_3

NC_4

NC_5

B42B2A42

NC_6

NC_7

NC_8

NC_9

L17

N17

N18

N15

RESERVED_33

RESERVED_34

RESERVED_35

RESERVED_36

RESERVED_37

RESERVED_29

RESERVED_30

RESERVED_31

RESERVED_32

RESERVED_38

L12

M11

VSS

VCC

A3A5A41C1C43E1R21

VSS_293

VSS_292

VSS_291

VSS_290

VSS_289

VSS_288

VSS_287

W20

VSS_286

W22

VSS_285

W24

VSS_284

AA18

VSS_283

AC18

VSS_282

AE18

VSS_281

AE20

VSS_280

AE22

VSS_279

AE24

VSS_278

AF19

VSS_277

AF21

VSS_276

AF23

VSS_275

AY40

VSS_274

BA1

VSS_273

BC3

VSS_272

BC41

M33

VSS_271

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

VSS_85

VSS_86

VSS_87

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92

VSS_93

VSS_94

VSS_95

VSS_96

VSS_97

VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VSS_110

VSS_111

VSS_112

VSS_113

VSS_114

VSS_115

VSS_116

VSS_117

VSS_118

VSS_119

VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

VSS_125

VSS_126

VSS_127

VSS_128

VSS_129

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

VSS_136

VSS_137

VSS_138

VSS_139

VSS_140

VSS_141

VSS_142

VSS_143

VSS_144

VSS_145

VSS_146

VSS_147

VSS_148

VSS_149

VSS_150

VSS_151

VSS_152

VSS_153

VSS_154

VSS_155

VSS_156

VSS_157

VSS_158

VSS_159

VSS_160

VSS_161

VSS_162

VSS_163

VSS_164

VSS_165

VSS_166

VSS_167

VSS_168

VSS_169

VSS_170

VSS_171

VSS_172

VSS_173

VSS_174

VSS_175

VSS_176

VSS_177

VSS_178

VSS_179

VSS_180

VSS_181

VSS_182

VSS_183

VSS_184

VSS_185

VSS_186

VSS_187

AJ39

AJ36

AJ33

AH42

AG37

AG34

AF43

AF37

AF36

AF10

AF9

AF8

AF7

AF6

M27

M21

M17

M15

M10M7M1

L33

L32

L31

L29

L21

L20

L11L7L5L3K43

K26

K21

K18

K13

K12K2J38

J35

J32

J27

J21J9J7J5H31

H29

H21

H20

H17

H15

H13

G42

G38

G32

G21

G13

G12

G11G9G7G1F37

F35

F27

F21

F18F3E43

E32

E24

E21

E20

E15

E13

E11E9E3

D40

D31

D21

D17D3C26

C11C6C5C4B37

B32

B31

B26

B23

B22

B19

B14

B10

A39

A34

A26

A18

A12A7AF5

AF3

AF2

AF1

AD42

AD39

AD37

Broadwater-G

A A

MICRO-STAR INT'L CO.,LTD

MSI

Size Document Description Rev

Custom

Wednesday, November 23, 2005

8

7

6

5

4

3

Date:

2

MS-7241

Broadwater - GND

935

Sheet of

1

0A

8

ICH8 H/W STRAPS

SIGNAL

SPKR
GNT3

INTVRMEN/

D D

LAN100_SLP

SATALED

HDA_SDOUT

HDA_SYNC

GNT2

ACSDOUT11
ACSYNC11

C C

H
DIS
DIS

EN

NORM

DFX/
PCIE

SET
BIT

N/A PCIE PORT CONFIG 2

PGNT#2
PGNT#3

ACSDOUT
ACSYNC

SPKR11,24

VCC3

L
EN
EN

DIS

REVERSE

N/A

N/A

SET
BIT

R374 X_1KR/2
R390 X_1KR/2

R384 X_1KR/2
R385 X_1KR/2

R394 X_1KR/2

RN42

12
34
56
78

8P4R-10KR/2

REBOOT
A16 OVERIDE

INT VRM
(VccSus1_05,1_5,VccCL1_5)
(VccLAN1_05,VccCL1_05)

PCIE 0-3 ORDER
XOR MODE/PCIE PORT

CONFIG BIT 1
PCIE PORT CONFIG

BIT 0 (1-4)

BIT 0 (5-6)

SERIRQ
A20GATE
KBRST#

BOOT SELECT STRAPS

BOOT DEVICE GNT0 SPI_CS1# JBOOT1

FWH 1 1 1-2
SPI 0 X 2-3(Default)
PCI 1 0 1-2 & R344

PGNT#0

R343 1KR/2

R380 X_1KR/2

B B

SPI DEBUG PROT

Place close to SPI ROM

VCC3_SB

1
2
3

SPI_CS1#

JBOOT1
X_PH1*3/BLACK

DES.

7

VCC3_SB

VCC3

6

AD[31..0]20,23,26

C_BE#[3..0]20,23,26

PCIRST_ICH8#27

R344 15R/2
R345 15R/2

R379 15R/2

RN35

8P4R-10KR/2

VCC3_SB

SPI_MOSI_F
SPI_CS0_F#

SPI_CLK_F

5

U24A

AD0

E18

AG9

A16
A14
A17
B13
F18
E17
C17
A13
C14
E14
C13
E15
F16
A11
D10
C11
E13
E12
D13
F14
E11

D8
D7
C7

F13

B7
C6
B5

F12

F8
E7

G16
A10
C12
A12

B12
E16

B6
A7

D15

D9

D11

E6
C9
D3

B10

E3

E8
C16
B16

A9

A4
C15
D17

B9

C4

C5

A3

A8

D5
F10
G11

F9

D21
B19
C21
A19
A18

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE0#
C/BE1#
C/BE2#
C/BE3#

DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#

PCICLK
PCIRST#

REQ0#
REQ1#/GPIO50
REQ2#/GPIO52
REQ3#/GPIO54

GNT0#
GNT1#/GPIO51
GNT2#/GPIO53
GNT3#/GPIO55

PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

SERIRQ

SPI_MOSI
SPI_MISO
SPI_CS0#
SPI_CLK
SPI_CS1#

VSS_001

A24

A5

VSS_003

VSS_002

A28

VSS_004

AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C_BE#0
C_BE#1
C_BE#2
C_BE#3

DEVSEL#20,23,26

FRAME#20,23,26

IRDY#20,23,26

TRDY#20,23,26

STOP#20,23,26

PAR20,23,26

LOCK#23
SERR#20,23
PERR#20,23,26

PCI_PME#20,23,26
ICH_PCLK16

R408 33R/2

PREQ#023
PREQ#123
PREQ#220,23
PREQ#323,26

PGNT#023
PGNT#123
PGNT#220
PGNT#326

SERIRQ17

PREQ#0
PREQ#1
PREQ#2
PREQ#3

PGNT#0
PGNT#1
PGNT#2
PGNT#3

PIRQ#A23
PIRQ#B23 CK_PE_100M_ICH# 16
PIRQ#C20,23
PIRQ#D23,26
PIRQ#E23
PIRQ#F23
PIRQ#G23
PIRQ#H23

SERIRQ

SPI_MOSI
SPI_MISO
SPI_CS0#
SPI_CLK
SPI_CS1#

SPI_CS0#

12

SPI_MISO

34

SPI_MOSI

56
78

4

PCI INTERFACE INTERRUPT

PART 1/3

SPI

VSS_013

VSS_012

VSS_011

VSS_010

VSS_009

VSS_008

VSS_007

VSS_006

VSS_005

C27

C22

B24

B20

B17

B14

B11B8B2

ICH 8

VSS_021

VSS_020

VSS_019

VSS_018

VSS_017

VSS_016

VSS_015

VSS_014

D25

D22

D19

D16

D12D6D4D2C28

VSS_024

VSS_023

VSS_022

E21E9D26

VSS_025

E27

E24

VSS_028

VSS_027

VSS_026

E28

PCI EXPRESS

VSS_031

VSS_030

VSS_029

F22

F15F7F2

3

CPU

PERN_6/GLAN_RXN
PERP_6/GLAN_RXP

PETN_6/GLAN_TXN
PETP_6/GLAN_TXP

DIRECT MEDIA

LAN

VSS_032

VSS_033

VSS_035

VSS_034

F24

F25

A20M#

CPUSLP#

FERR#

IGNNE#

INIT3_3V#

STPCLK#

RCIN#

A20GATE

THRMTRIP#

PLTRST#

PERN_1

PERP_1
PETN_1
PETP_1

PERN_2

PERP_2
PETN_2
PETP_2

PERN_3

PERP_3
PETN_3
PETP_3

PERN_4

PERP_4
PETN_4
PETP_4

PERN_5

PERP_5
PETN_5
PETP_5

DMI_0RXN
DMI_0RXP
DMI_0TXN

DMI_0TXP

DMI_1RXN
DMI_1RXP
DMI_1TXN

DMI_1TXP

DMI_2RXN
DMI_2RXP
DMI_2TXN

DMI_2TXP

DMI_3RXN
DMI_3RXP
DMI_3TXN

DMI_3TXP

DMI_CLKN
DMI_CLKP

DMICOMPI

DMI_IRCOMP

GLAN_CLK

LAN_RSTSYNC

LAN_RST#
LAN_RXD0
LAN_RXD1
LAN_RXD2

LAN_TXD0

LAN_TXD1

LAN_TXD2

VSS_040

VSS_039

VSS_038

VSS_037

VSS_036

G18

G13

G10G6G4G1F26

INIT#
INTR

NMI

SMI#

PECI

ICH8-DH

AD23
AC24
AB22
AC22
AB19
AC12
AH28
AC23
AB20
AB23
AF10
AG10
AG28

AF26

AF23
N25

N26
M28
M27

L25
L26
K28
K27

J26
J25
H28
H27

G26
G25
F28
F27

E26
E25
D28
D27

C26
C25
B28
B27

U26
U25
T28
T27

W26
W25
V28
V27

AA25
AA24
Y28
Y27

AC26
AC25
AB28
AB27

R25
R24

AD27
AD28

E22
E20
AF17
E19
C19
D20

C20
C18
D18

PECI

PLTRST_L

PE_TXN1_C
PE_TXP1_C

DMI_BIAS

<200mils

2

R342 33R/2

PE_RXN1

PE_RXP1

C382 C0.1U16Y2
C390 C0.1U16Y2

R313 24.9R1%/2

H_A20M# 3
H_FERR# 3,4

H_IGNNE# 3
H_INIT# 3

H_INTR 3
H_NMI 3
ICH_H_SMI# 3
H_STPCLK# 3
KBRST# 17
A20GATE 17
TRMTRIP# 3,4

PECI 3

PLTRST#

DMI_MTN_IRN_0 8
DMI_MTP_IRP_0 8
DMI_ITN_MRN_0 8
DMI_ITP_MRP_0 8

DMI_MTN_IRN_1 8
DMI_MTP_IRP_1 8
DMI_ITN_MRN_1 8
DMI_ITP_MRP_1 8

DMI_MTN_IRN_2 8
DMI_MTP_IRP_2 8
DMI_ITN_MRN_2 8
DMI_ITP_MRP_2 8

DMI_MTN_IRN_3 8
DMI_MTP_IRP_3 8
DMI_ITN_MRN_3 8
DMI_ITP_MRP_3 8

CK_PE_100M_ICH 16

PLTRST# 6
PE_RXN1 22

PE_RXP1 22
PE_TXN1 22
PE_TXP1 22

V_1P5_ICH

1

VDD

HOLD#

SCK

VCC3_SB

R325

2.2KR/2

C399
C0.1U16Y2

8

SPI_HOLD#

7

SPI_CLK_F

6

SPI_MOSI_F

5

SI

5

R324 X_0R/2

SPI_HOLD_GPO# 11

From South-Bridge GPIO33

Reserved for BIOS control used

MICRO-STAR INT'L CO.,LTD

MSI

Size Document Description Rev

Custom

Wednesday, November 23, 2005

4

3

Date:

2

MS-7241

ICH8 - PCI, DMI, CPU, SPI

Sheet of

1

0A

10 35

JSPI1

1 2

A A

SPI_MISO_F
SPI_CS0_F# SPI_CLK_F

SPI_HOLD#

H2X5(10)_black-RH

3 4
5
7 8
9

SPI_MOSI_F

6

Part Number : N31-2051451-H06

8

7

SPI FLASH ROM

Place close to SB.

SPI_MISO

R289 15R/2

SPI_WP#11

From South-Bridge GPIO32

VCC3_SB

R290 2.2KR/2

6

SPI_CS0_F#
SPI_MISO_F
SPI_WP#

U19

1

CE#

2

SO

3

WP#

4

VSS

SST25LF080A-33-4C-S2AE-LF

8

ICH8 PULL-UP RESISTORS

ALL COMPONENTS CLOSE TO ICH8
Trace length is less than 3inchs to ICH8.

SM_LINK0
GPIO_10
LINK_ALERT#
SM_LINK1

D D

C C

B B

FP_RST#
SIO_PME#
RI#
GPIO_9

CLEAR_CMOS#
SMB_ALERT#
BATTLOW#
GPIO_14

LPCPD#

WAKE#

ATADET0

LDRQ_1#
SATALED#

SIO_SMI#

SMBCLK
SMBDATA

PWRGD

INTRUDER#

VCC3

VRM_GD27,28

R375 X_1KR/2
R373 0R/2
R372 X_1KR/2

H_PROCHOT#3,4,28

R412 10KR/2

R359 1KR/2

R352 X_10KR/2

R346 2.2KR/2
R351 2.2KR/2

R314 10KR/2

R340 1MR/2

12
34
56
78

12
34
56
78

12
34
56
78

12
34
56
78

VCC3
VCC3

VCC3_SB

RN36
8P4R-10KR/2

RN38
8P4R-10KR/2

RN34
8P4R-10KR/2

VCC3_SB

VCC3_SB

VCC3_SB

VCC3

RN41
8P4R-10KR/2

VBAT

VRM_PWRGD

C444
C0.1U16Y2

R348 X_0R/2

R357 10KR/2
R361 10KR/2

#Place near the SB

CL_VREF_ICH = 0.4V

A A

VCC3

R355

3.24KR1%/2

CL_VREF_ICH

R365
453R1%

8

C429
C103P25X2

Q34
2N3904

7

THERM#

Q35
2N3904

AC_SYNC21

AC_SDOUT21

AC_BITCLK21

7

AC_SDOUT
AC_BITCLK
AC_RST#

AC_RST#21

X_C20P50N2

C454

RSMRST#27

PWRBTIN#17

H_PWRGD3,4

CK_PWRGD16

FP_RST#24

SLP_S3#17,27
SLP_S4#27

LPCPD#17

ICH_SYNC#6

X_C20P50N2

6

PWRGD6,27

WAKE#22

6

SMBDATA13,16,22,27

SPKR10,24

C452

LPC_DRQ#017

LPC_FRAME#17

AC_SDIN021

ACSDOUT10
ACSYNC10

SMBCLK13,16,22,27

VCC3

RN39

8
6
4
2

8P4R-22R/2

LPC_AD017
LPC_AD117
LPC_AD217
LPC_AD317

USB4-25

USB4+25

USB1-25

USB1+25

USB0-25

USB0+25

USB5-25

USB5+25

USB2-25

USB2+25

USB3-25

USB3+25

USB6-25

USB6+25

USB7-25

USB7+25

USB8-25

USB8+25

USB9-25

USB9+25

OC#125

OC#225
OC#325
OC#425

R407 22.6R1%/2

RSMRST#

VRM_PWRGD

FP_RST#

LPCPD#

INTRUDER#
RI#

THERM#
BATTLOW#

R364 0R/2

R363 X_10KR/2

ICH_14M16

USB_48M16

7
5
3
1

LDRQ_1#

AC_BITCLK_ICH

ACRST#

ACSDOUT
ACSYNC

SMB_ALERT#
SM_LINK0

SM_LINK1
LINK_ALERT#

ACSYNCAC_SYNC
ACSDOUT
AC_BITCLK_ICH
ACRST#

USB_BIAS

AF12
AF13

AE13
AC14
AH12
AD13
AH11
AH10

AF15
AH14
AG14
AG15
AH15

AE15
AG13

AF14
AD14
AG16

AD19

AB18

AF21

AE19
AG21
AH21

AD22

AE24
AC16

AF25

AF16

AF22
AH23
AC17
AG22
AG24

AF24
AH18
AG17

AE22

AE10

AE25
AD24
AD16

AH9

AF6

AG6

5

U24B

F6
F5
G9
E5
G8
C3
B3

G2
G3
H5
H4
H1
H2

J3

J2
K5
K4
K1
K2

L3

L2

M5
M4
M2
M1

N2
N3

E1
E2

A1

F1

G7
E4

B1

5

LAD0
LAD1
LAD2
LAD3
LDRQ_0#
LDRQ_1#/GPIO23
LFRAME#

ACZ_BCLK
ACZ_RST#
ACZ_SDIN_0
ACZ_SDIN_1
ACZ_SDIN_2
ACZ_SDIN_3
ACZ_SDOUT
ACZ_SYNC

USBP_0N
USBP_0P
USBP_1N
USBP_1P
USBP_2N
USBP_2P
USBP_3N
USBP_3P
USBP_4N
USBP_4P
USBP_5N
USBP_5P
USBP_6N
USBP_6P
USBP_7N
USBP_7P
USBP_8N
USBP_8P
USBP_9N
USBP_9P

OC0#
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#
OC9#

USBRBIASN
USBRBIASP

SMBCLK
SMBDATA
SMBALERT#/GPIO11

SMLINK0
SMLINK1
SMLALERT#

RSMRST#
PWRBTN#
PWROK
VRMPWRGD_VGATE
CPUPWRGD/GPIO49
CK_PWRGD
SYS_RESET#

SLP_S3#
SLP_S4#
SLP_S5#
SLP_M#
LAN100_SLP
SUS_STAT#/LPCPD#
SUSCLK

INTRUDER#
WAKE#
RI#
THRM#
BATLOW#
MCH_SYNC#
SPKR

DPRSTP#
DPSLP#
DFXTESTB

CLK14
CLK48

VSS_044

VSS_043

VSS_042

VSS_041

G27

G24

VSS_047

VSS_046

VSS_045

H23H7H6H3G28

VSS_049

VSS_048

H25

H24

4

AC-LINKLPC

ICH 8

PART 2/3

MISCPOWER MGNTSM BUSUSB

VSS_058

VSS_057

VSS_056

VSS_055

VSS_054

VSS_053

VSS_052

VSS_051

VSS_050

J27J5J4J1H26

4

VSS_060

VSS_059

K25K7K6K3J28

VSS_063

VSS_062

VSS_061

VSS_065

VSS_064

L15

L13L5L4L1K26

VSS_067

VSS_066

L27

VSS_069

VSS_068

M13

M12M3L28

GPIO

VSS_072

VSS_071

VSS_070

M15

M14

S-ATA

BMBUSY#/PMSYNC#/GPIO0

RTC

AMTAFSC

VSS_078

VSS_077

VSS_076

VSS_075

VSS_074

VSS_073

M25

M22

M17

M16

3

SATA_0RXN
SATA_0RXP

SATA_0TXN
SATA_0TXP

SATA_1RXN
SATA_1RXP

SATA_1TXN
SATA_1TXP

SATA_2RXN
SATA_2RXP

SATA_2TXN
SATA_2TXP

SATA_3RXN
SATA_3RXP

SATA_3TXN
SATA_3TXP

SATA_4RXN
SATA_4RXP

SATA_4TXN
SATA_4TXP

SATA_5RXN
SATA_5RXP

SATA_5TXN
SATA_5TXP

SATA_CLKN
SATA_CLKP

SATARBIASN

SATABIASP

SATALED#

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
SATA3GP/GPIO37

SATA4GP
SATA5GP

GPIO8

GLGP1O3/GPIO9

GLGPIO1/GPIO10

GP12

GPIO13

CLGPIO2/GPIO14

GPIO15
GPIO16
GPIO18
GPIO20

CLGPIO0/GPIO24

GPIO25

S4_STATE#/GPIO26
QRT_STATE0/GPIO27
QRT_STATE1/GPIO28

GPIO32
GPIO33

SATACLKREQ#/GPIO35

VSS_079

GPIO34

SCLOCK/GPIO22

SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48

VCCRTC

INTVRMEN

RTCRST#

RTCX1
RTCX2

GLAN_COMPO

GLAN_COMPI

CL_CLK0

CL_CLK1
CL_DATA0
CL_DATA1
CL_VREF0
CL_VREF1

CL_PWROK

CL_RST#

FAN_PWM0
FAN_PWM1
FAN_PWM2

TACH0/GPIO17

TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7

SSTCTL

VSS_085

VSS_084

VSS_083

VSS_082

VSS_081

VSS_080

N15

N14

N13

N12

N11N5N4N1M26

ICH8-DH

3

AC5
AC4
AE4
AE3

AF1
AF2
AH2
AH1

W5
W4
AA3
AA4

AB1
AB2
AD2
AD1

Y1
Y2
U3
U4

T1
T2
V2
V1

AG3
AG4

R2
R1
AB10

AB11
AD8
AF8
AD9
AD10
AE9

AF9
AE16
AG18
AF20
AC19
AF18
AH24
AE21
AE11
AC11
AG8
AG23
AH17
AH25
AD20
AD15
AH7
AG7
AG12
AD12
AE7
AH6
AC10
AF7

AG26
AA22
AD21
AH26
AH27

C24
D24
F21
AH20
G21
AE18
B21
AG20
C2
AG19

AB6
AD6
AB8

AC7
AF5
AE6
AC8

AD17

SATA_BIAS

GPIO_21
GPIO_19
GPIO_36
GPIO_37

R386 10KR/2
R391 10KR/2

SIO_SMI#
SIO_PME#
GPIO_9
GPIO_10
ATADET0
CLEAR_CMOS#
GPIO_14

FRONT_IO#

SPI_WP#
SPI_HOLD_GPO#

GPIO_22
GPIO_38
GPIO_39
GPIO_48

INTVRMEN

RTC_RST#
RTCX1
RTCX2

CL_VREF_ICH
MCH_CLPWROK

CFAN_TACH
SFAN_TACH
GPIO_6
GPIO_7

MSI

2

SATA_RX#0 19
SATA_RX0 19
SATA_TX#0 19
SATA_TX0 19

SATA_RX#1 19
SATA_RX1 19
SATA_TX#1 19
SATA_TX1 19

SATA_RX#2 19
SATA_RX2 19
SATA_TX#2 19
SATA_TX2 19

SATA_RX#3 19
SATA_RX3 19
SATA_TX#3 19
SATA_TX3 19

SATA_RX#4 19
SATA_RX4 19
SATA_TX#4 19
SATA_TX4 19

SATA_RX#5 19
SATA_RX5 19
SATA_TX#5 19
SATA_TX5 19

CK_ICHSATA# 16
CK_ICHSATA 16

R409 24.9R1%/2

SATALED# 24

SIO_PME# 17

ATADET0 24

FRONT_IO# 21

SPI_WP# 10
SPI_HOLD_GPO# 10

R339 330KR/2

RTC_RST# 19

CL_N_CLK 8
CL_N_DATA 8

CL_RST 8

ASFC_PWM0 19
ASFC_PWM1 19

VCC3

C0.1U16Y2C407

VBAT
VBAT

R265 0R/2

CFAN_TACH 19
SFAN_TACH 19

ASFC_PWM0
ASFC_PWM1

SFAN_TACH
GPIO_21
CFAN_TACH
GPIO_7

GPIO_6
GPIO_19
GPIO_22
GPIO_48

GPIO_38
GPIO_37
GPIO_39
GPIO_36

Enable internal 2.5V VRM

C18P50N3C391

12

34

Y5
R326
10MR

PWRGD 6,27
MCH_CLPWROK 8

R366 2.2KR/2
R402 2.2KR/2

32.768KHz

C18P50N3C402

MICRO-STAR INT'L CO.,LTD

Size Document Description Rev

Custom

Wednesday, November 23, 2005

Date:

2

MS-7241

ICH8 - LPC, SATA, USB, GPIO

Sheet of

1

RN47

8P4R-10KR/2

RN46

8P4R-10KR/2

RN45

8P4R-10KR/2

VCC5

11 35

1

VCC3

12
34
56
78

12
34
56
78

12
34
56
78

0A