MSI MS-7240 Schematics
1Cover Sheet
Block Diagram/History/Auto Bom manual 2-4
1
MS-7240L2
Version 1.2
Intel LGA775 CPU
IGP- RC410 - MCH
DDR System Memory 1 , 2 & Termination
VGA&S_OUT 15
Clock Gen. - ICS951413AG
SB450-PCI/CPU/LPC/RTC
SB450-SATA/IDE
SB450-PWR & DECOUPLING
SB450-ACPI/GPIO/AC97/USB
SB450-STRAPS
PCIE X 16 & PCIE X 1
A
PCI SLOTS 1 & 2
SIO_ITE8712F
USB CONNECTORS
BTX Front Panel & FAN
FWH & IDE Connector
ALC655/880/882
VRM10.1 Intersil 6561
LAN-RTL8100C/8110S
MS7 ACPI CONTROLLER
5-7
8-12
13-14
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
CPU:
Intel Prescott ( L2=2MB ) - 3.4G & Above
Intel Cendar Mill (65nm) - 3.73G & Above
Intel Smithfield (90nm Dual core)
System Chipset:
ATI RC410 - (North Bridge)
ATI SB450 (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM
Azalia ALC880/AC97 ALC655
LPC Super I/O -- ITE8712F/J
LAN--Realtek RTL8100C/8110S
CLOCK -- ICS951413AG
Main Memory:
DDR2 * 2 (Max 2GB)
Expansion Slots:
PCI SLOT * 2
PCI EXPRESS X1 SLOT *1
PCI EXPRESS X16 SLOT *1
POWER REGULATOR
Auto BOM manual
GPIO MAP/PWROK MAP/Reset MAP
HISTORY
32
33
34-36
37
Intersil PWM:
Controller: VRM10.1 Intersil 6561
1
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
COVER SHEET
MS-7240L2
of
137Monday, August 28, 2006
1.2
A
1
v
.2
1
A
Block Diagram
Intersil 6561 CPU
Core Power
ICS951413AG
CLOCK
GENERATOR
VGA CON
PCIE GFX x16
ATI TMDS
A
USB-7 USB-6
USB-4
USB-3
USB-1USB-2USB-5
USB-0
CRT
PCIE x16
USB 2.0
DESKTOP PRESCOTT
SOCKET LGA775
4X DATA
2X ADDRESS
AGTL+
200MHz
ATI NB - RC410
AGTL+ P4 CPU I/F
X1 DDR2 CHANNEL
INTEGRATED GRAPHICS
TVOUT/TMDS
1 X16 PCIE VIDEO
ATI SB - SB450
USB2.0 (4+4)
DDR 400
A CHANNEL
UNBUFFERED
DDR2 DIMM
UNBUFFERED
DDR2 DIMM
SATA (4 PORTS)
Azalia
ALC880/AC97
ALC655
PCI BUS
AC97 2.3
AZALIA
ATA 66/100/133
AC LINK
ACPI 1.1
LPC I/F
LAN Chip
8100C/8110S
PCI SLOT 2
IDE1
PCI SLOT 1
ATA 66/100/133
INT RTC
PCI/PCI BDGE
SERIAL ATA
SATA#0 SATA#1
SATA#2 SATA#3
LPC BUS
FLASH
LPC SIO ITE8712
SERIAL
KBD
FLOPPY
LPT
MOUSE
PORT
1
BIOS
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
BLOCK DIAGRAM
MS-7240L2
237Monday, August 28, 2006
of
1.2
A
5
4
3
2
1
CK_H_CPU
CLOCK MAP
D D
LGA775
NB_CLK
NBSRC_CLK
RC410
NB_OSC
SBLINK_CLK
GFXCLK
ICS 951413AG
Clock
C C
Generator
SBSRCCLK
SB_OSC_14M
PCI-Express X 16
SB400
IXP
GPPCLK
PCI-Express X 1
AC97_CLK
AC97
CLK_24_48M
B B
PCI_CLK6
PCI_CLK2
ITE8712
LPC IO
Realtek
8100C/8110S
SB400
PCI_CLK7
TPM
IXP
PCI_CLK3
FWH
A A
PCICLK[0.1]
5
4
3
PCI1
PCI2
MSI
Title
Size Document Number Rev
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
CLOCK MAP
MS-7240L2
1
of
337Monday, August 28, 2006
1.2
5
DCCBBAA
POWER MAP
4
3
2
1
ATX P/S WITH 1A STBY CURRENT
-12V
3.3V
+/-5%
12V
+/-5%
+/-5%
5V
D
5VSB
+/-5%
+/-5%
CPU
PW
12V
+/-5%
VRM 10.1 SW
REGUALTOR
VTT 1.2V
REGULATOR
VCC_CPU (S0, S1)
VCC_NB (S0, S1)
PRESCOTT CPU
VCCCORE
0.84-1.6V 120A
VTT 1.2V 6A
NB RC410
FSB VTT 1.2V 1A
NB CORE 5A
PCI-E CORE
&VCO 2.25A
DAC 200mA
MEM CONTROLER
PLL & DAC-Q 0.1A
1.8V VDD SW
REGULATOR
1.8V
SWITCH
1.8V STB LDO
REGULATOR
5VAA LDO
REGULATOR
1.8VDUAL_MEM (S0, S1, S3)
0.9V VTT_DDR
REGULATOR
+1.8V (S0, S1)
+1.8VSB (S0, S1, S3, S4, S5)
+3.3V (S0, S1)
+5V_AA (S0, S1)
VTT_MEM (S0, S1 )
DDRII DIMMX4
VDD MEM 7A
VTT_DDR 1.2A
AC97 CODEC
3.3V CORE 0.3A
5V ANALOG 0.1A
PCI-E I/O 750mA
TRANSFORMER
200mA
SB SB400
X4 PCI-E 0.8A
ATA I/O 0.2A
ATA PLL 0.01A
PCI-E PVDD 80mA
SB CORE 0.6A
1.8V S5 PW 0.22A
3.3V I/O 0.45A
3.3V S5 PW 0.01A
USB CORE I/O 0.2A
VCC3_SB (S0, S1, S3, S4, S5)
RTL8100C/8110S
VAUX25 (S0,S1,S3)
VAUX18 (S0,S1,S3)
3.3V 0.5A (S0, S1)
3.3V 0.1A (S3)
SUPER I/O
ACPI
CONTROLLER(MS7)
VAUX_25 LDO
REGULATOR
VAUX_18 LDO
REGULATOR
USB_STR (S0, S1, S3, S4, S5)
+3.3VDUAL (S3) 0.01A
+3.3V (S0, S1) 0.01A
+5V (S0, S1) 0.1A
USB X4 FR
VDD
5VDual
PCI Slot (per slot)
5V
3.3V
12V
3.3Vaux
-12V
5
5.0A
7.6A
0.5A
0.375A
0.1A
3.3V
3.3Vaux
0.5A
0.1A
X16 PCIEX1 PCIE per
3.3V
12V12V
3.0A3.0A
5.5A
4
2.0A
USB X4 RL 2XPS/2
VDD
5VDual
2.0A
5VDual
1.0A
VCC3_SB (S0, S1, S3, S4, S5)
3
MSI
Title
Size Document Number Rev
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
POWER MAP
MS-7240L2
1
of
4
1.2
37Monday, August 28, 2006
D
C
B
A
8
DCCBBAA
7
6
5
4
3
2
1
D
VTT_OUT_LEFT
EDRDY#8
H_SLP#17
CPU_RST
H_CPURST#6,8
R311
ok
H_D#[0..63]8
ok
X_62R
R318 X_0R0402-1
ok
R508 X_49.9R1%
CPU_TMPA24
VTIN_GND24
H_PROCHOT#6
H_SLP#
VTT_OUT_LEFT
H_FSBSEL06,7
H_FSBSEL16,7
H_FSBSEL26,7
H_DBI#08
H_DBI#18
H_DBI#28
H_DBI#38
H_IERR#6
H_FERR#6,17
H_STPCLK#17
H_INIT#17,27
H_DBSY#8
H_DRDY#8
H_TRDY#8
H_ADS#8
H_LOCK#8
H_BNR#8
H_HIT#8
H_HITM#8
H_BPRI#8
H_DEFER#8
TRMTRIP#6,7
H_IGNNE#17
ICH_H_SMI#17
H_A20M#17
R340 0R0402-1
R331 _62R0402
R351
X__62R0402
H_PWRGD6,17
H_CPURST#
H_D#[0..63]
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_IERR#
H_FERR#
H_STPCLK#
H_INIT#
H_DBSY#
H_DRDY#
H_TRDY#
H_ADS#
H_LOCK#
H_BNR#
H_HIT#
H_HITM#
H_BPRI#
H_DEFER#
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
CPU_TMPA
VTIN_GND
TRMTRIP#
H_PROCHOT#
H_IGNNE#
ICH_H_SMI#
H_A20M#
R348
X__62R0402
H_FSBSEL0
H_FSBSEL1
H_FSBSEL2
H_PWRGD
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
H_A#[3..31]8
AD3
AD1
AC1
AG1
AH2
A8
G11
D19
C20
F2
AB2
AB3
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
AF1
AE1
AL1
AK1
M2
AE8
AL2
N2
P2
K3
L2
N5
AE6
C9
G10
D16
A20
Y1
V2
AA2
G29
H30
G30
N1
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
CPU SIGNAL BLOCK
H_A#[3..31] VID[0..5]
H_A#7
H_A#6
H_A#8
H_A#5
H_A#4
H_A#3
H_A#9
H_A#16
A17#
A16#
D30#
D29#
G14
H_A#15
F14
H_A#14
A15#
A14#
D28#
D27#
G13
H_A#13
H_A#12
A13#
D26#
E13
D13
H_A#11
A12#
A11#
D25#
D24#
F12
H_A#10
A10#
D23#
F11
A9#
A8#
A7#
A6#
A5#
D22#
D21#
D20#
D19#
D18#
D10
E10D7E9F9F8G9D11
A4#
D17#
A3#
D16#
AC2
D15#
C12
AN3
DBR#
D14#
D13#
B12D8C11
VCC_SENSE
D12#
U15A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
D53#
H_A#24
H_A#26
H_A#31
H_A#30
H_A#29
H_A#28
H_A#25
H_A#27
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
AF5
AB4
AC5
AB5
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
C14
C15
A14
D17
D20
G22
D22
E22
G21
F21
E21
F20
E19
E18
F18
F17
H_A#17
H_A#19
H_A#22
H_A#23
H_A#20
H_A#18
H_A#21
AA5
AD6
AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4M5P6L5
A24#
A23#
A22#
A21#
A20#
A19#
A18#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
G17
G18
E16
E15
G16
G15
F15
TP15
AN4
AN5
AN6
AJ3
AK3
ITP_CLK1
ITP_CLK0
VSS_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D11#
D10#
D9#
D8#
D7#
D6#
D5#
B10
A11
A10A7B7B6A5C6A4C5B4
AM7
RSVD
D4#
AM5
VID3
VID4
VID5
AL4
AK4
AL6
VID6#
VID5#
VID4#
VID_SELECT
GTLREF_SEL
CS_GTLREF
FORCEPH
LINT1/NMI
LINT0/INTR
D3#
D2#
D1#
VID2
VID1
VID0
AM3
AL5
AM2
VID3#
VID2#
VID1#
VID0#
GTLREF0
GTLREF1
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
RSVD
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
D0#
ZIF-SOCK775-15u
R353 _62R0402
AN7
CPU_GTLREF0
H1
CPU_GTLREF1
H2
TP_GTLREF_SEL
H29
NB_GTLREF
E24
H_BPM#5
AG3
H_BPM#4
AF2
H_BPM#3
AG2
H_BPM#2
AD2
H_BPM#1
AJ1
H_BPM#0
AJ2
G5
H_REQ#4
J6
H_REQ#3
K6
H_REQ#2
M6
H_REQ#1
J5
H_REQ#0
K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
F28
H_RS#2
A3
H_RS#1
F5
H_RS#0
B3
U3
U2
F3
H_COMP5
T2
H_COMP4
J2
H_COMP3
R1
H_COMP2
G2
H_COMP1
T1
H_COMP0
A13
J17
H16
H15
J16
H_ADSTB#1
AD5
H_ADSTB#0
R6
H_DSTBP#3
C17
H_DSTBP#2
G19
H_DSTBP#1
E12
H_DSTBP#0
B9
H_DSTBN#3
A16
H_DSTBN#2
G20
H_DSTBN#1
G12
H_DSTBN#0
C8
H_NMI
L1
H_INTR
K1
VID[0..5] 29
R313 62R
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6
VCC_VRM_SENSE
VSS_VRM_SENSE
CPU_GTLREF0 6
TP1
CPU_GTLREF1 6
NB_GTLREF 8
TP11
H_REQ#[0..4]
RN26
8P4R-62R
1 2
3 4
5 6
7 8
R181 62R
R357 62R
R345 X__62R0402
R319 X_62R
H_RS#[0..2]
TP12
TP13
R341 62R
R327 62R
R337 62R
R317 62R
R346 62R
R255 62R
TP7
TP5
TP6
TP8
H_ADSTB#1 8
H_ADSTB#0 8
H_DSTBP#3 8
H_DSTBP#2 8
H_DSTBP#1 8
H_DSTBP#0 8
H_DSTBN#3 8
H_DSTBN#2 8
H_DSTBN#1 8
H_DSTBN#0 8
H_NMI 17
H_INTR 17
H_REQ#[0..4] 8
VTT_OUT_LEFT
CK_H_CPU# 16
CK_H_CPU 16
H_RS#[0..2] 8
R316 X_0R0402-1
R509 X_0R0402-1
H_BR#0
VCC_VRM_SENSE 29
VSS_VRM_SENSE 29
V_FSB_VTT
VTT_OUT_RIGHT 6,7,24,29
H_BR#0 6
VTT_OUT_LEFT 6,16
C375
X_C0.1U25Y
V_FSB_VTT
CPU_BR0# 8
CPU_BR0#_1 8
R225
BSEL
1
02
FSB FREQUENCY
TABLE
267 MHZ (1067)000
0
01 200 MHZ (800)
1
0 0 133 MHZ (533)
Prescott / Cedar Mill
LL_ID[1:0] = 00
GTLREF_SEL = 0
VTT_SEL = 1
62R
RN30
VTT_OUT_RIGHT
C396 X_C0.1U16Y0402
C390 C0.1U16Y0402
8P4R-51R
1 2
3 4
5 6
7 8
RN29
8P4R-51R
1 2
3 4
5 6
7 8
R360 49.9R1%
R372 49.9R1%
R361 49.9R1%
H_BPM#3
H_BPM#5
H_BPM#1
H_BPM#0
H_TMS
H_BPM#2
H_TDI
H_BPM#4
H_TDO
H_TRST#
H_TCK
PLACE BPM TERMINATION NEAR CPU
H_D#36
H_D#49
H_D#50
H_D#48
H_D#47
H_D#46
H_D#45
H_D#44
H_D#43
H_D#42
H_D#41
H_D#40
H_D#39
H_D#38
H_D#37
H_D#53
H_D#52
H_D#51
8
7
H_D#34
H_D#35
6
H_D#33
H_D#32
H_D#30
H_D#31
H_D#29
H_D#28
H_D#26
H_D#27
H_D#25
H_D#24
H_D#22
H_D#23
H_D#21
H_D#20
H_D#19
H_D#18
H_D#16
H_D#17
H_D#15
H_D#14
H_D#12
H_D#13
5
H_D#11
H_D#10
H_D#8
H_D#9
H_D#7
H_D#6
H_D#5
H_D#4
H_D#2
H_D#3
H_D#0
H_D#1
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Document Number Rev
4
3
Date: Sheet
2
Intel LGA775 CPU - Signals
MS-7240L2
of
5
1
1.2
37Monday, August 28, 2006
D
C
B
A
8
DCCBBAA
VCCP
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
VCCP
U15B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
W30W8Y23
Y24
Y25
Y26
Y27
Y28
Y29
Y30
Y8
VCCP
D
AG22
VCC
VCC
W29
AG25
VCC
VCC
W28
AG26
VCC
VCC
W27
AG27
VCC
VCC
W26
AG28
VCC
VCC
W25
AG29
VCC
VCC
W24
7
AG30
VCC
VCC
W23
AG8
VCC
VCC
AG9
VCC
VCC
AH11
VCC
VCC
U30U8V8
AH12
VCC
VCC
U29
AH14
U28
VCC
VCC
AH15
VCC
VCC
U27
AH18
VCC
VCC
U26
AH19
VCC
VCC
U25
AH21
VCC
VCC
U24
AH22
VCC
VCC
AH25
VCC
VCC
AH26
VCC
VCC
T30T8U23
AH27
VCC
VCC
T29
AH28
VCC
VCC
T28
AH29
VCC
VCC
T27
AH30
VCC
VCC
T26
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
AJ11
VCC
VCC
AJ12
VCC
VCC
AJ14
VCC
VCC
AJ15
VCC
VCC
6
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
M24
M25
M26
M27
M28
M29
M30M8N23
N24
N25
N26
N27
N28
N29
N30N8P8R8T23
VCC
VCC
AK25
VCC
VCC
M23
AK26
VCC
VCC
5
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
J22
J23
J24
J25
J26
J27
J28
J29
J30J8J9
K23
K24
K25
K26
K27
K28
K29
K30K8L8
AM18
VCC
VCC
J21
AM19
VCC
VCC
J20
AM21
VCC
VCC
J19
AM22
VCC
VCC
J18
AM25
VCC
VCC
J15
AM26
VCC
VCC
J14
4
AM29
VCC
VCC
J13
AM30
VCC
VCC
J12
AM8
J11
VCC
VCC
AM9
VCC
VCC
J10
AN11
VCC
VCC
AN9
AN12
VCC
VCC
AN8
AN14
AN15
AN18
AN19
VCC
VCC
VCC
VCC
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC
VCC
VCC
VCC
AN25
AN26
AN29
AN30
AN21
AN22
VCC
VCC
VCCA
VSSA
VCCPLL
VCC-IOPLL
VTTPWRGD
VTT_SEL
RSVD
HS1
HS2
123
HS3
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
HS4
4
H_VCCA
A23
H_VSSA
B23
D23
H_VCCA
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
F27
F29
ZIF-SOCK775-15u
3
V_FSB_VTT
2
V_FSB_VTT
C273 X_C10U10Y0805
C271 C10U10Y0805
C274 X_C10U10Y0805
1
CAPS FOR FSB GENERIC
VTT_PWG 29
VTT_OUT_RIGHT
R338
VTT_OUT_RIGHT
_124R1%-LF
R334
_210R1%-1
R363
_124R1%-LF
R359
_210R1%-1
R326
_10R0805-1
CPU_GTLREF0
C368
C372
C220P50N
C0.1U25Y
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
R356
_10R0805-1
CPU_GTLREF1
C379
C377
C0.1U25Y
C220P50N
CPU_GTLREF0 5
CPU_GTLREF1 5
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT5,7,24,29
VTT_OUT_LEFT5,16
VTT_OUT_RIGHT
VTT_OUT_LEFT
V_FSB_VTT
8
R350 100R1%0402
R188 62R
R335 100R1%0402
R322 62R
V_FSB_VTT
R355 62R
PLACE AT ICH END OF ROUTE
R362 62R
R258 62R
TRMTRIP#
H_FERR#
7
H_PROCHOT#
H_CPURST#
H_PWRGD
H_BR#0
H_IERR#
H_PROCHOT# 5
H_CPURST# 5,8
H_PWRGD 5,17
H_BR#0 5
H_IERR# 5
TRMTRIP# 5,7
H_FERR# 5,17
6
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
V_FSB_VTT
CP4
X_COPPER
L7
X_10U125m_0805-1
L6
X_10U125m_0805-1
CP5
X_COPPER
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT
5
RN10
8P4R-680R
1
3
5
7
2
4
6
8
C281
X_C1U10Y
H_FSBSEL1
H_FSBSEL0
H_FSBSEL2
C10U10Y0805
C278
C279
X_C10U10Y0805
H_FSBSEL1 5,7
H_FSBSEL0 5,7
H_FSBSEL2 5,7
4
H_VCCA
H_VSSA
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
VTT_OUT_RIGHT
VCC5_SB
R383
1KR
VID_GD#31
3
VID_GD#
R379 10KR0402-1
R373 680R
Q36
N-MMBT3904_NL_SOT23
MSI
2
MICRO-STAR INt'L CO., LTD.
Title
Size Document Number Rev
Date: Sheet
VTT_PWG
C392
X_C1U10Y
Intel LGA775 CPU - Power
MS-7240L2
637Monday, August 28, 2006
1
of
1.2
D
C
B
A
8
DCCBBAA
7
6
5
4
3
2
1
V_FSB_VTT
MSID1 MSID0
2005 Perf FMB 0 0
TP2 R352
D
VTT_OUT_RIGHT5,6,24,29
R358
_60.4R1%-1
R371
_60.4R1%-1
TP9
R344
62R
TP3
X_62R
R347
62R
TP10
H_COMP7
H_COMP6
Y3
AE3
AE4D1D14
E23E5E6E7F23F6B13J3N4P5V1W1AC4Y7Y5Y2W7W4V7V6V30V3V29
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
IMPSEL#
VSS
VSS
AF26
AF27
AF28
VSS
AF29
VSS
RSVD
MSID[1]
MSID[0]
VSS
VSS
VSS
VSS
VSS
VSS
AF3
AF30
AF6
AF7
AG10
AG13
VSS
AE29
COMP6
VSS
AE30
COMP7
VSS
AE5
AE7
VSS
AF10
VSS
AF13
VSS
AF16
VSS
AF17
VSS
AF20
VSS
AF23
VSS
AF24
VSS
VSS
AF25
RSVD
VSS
AG16
VSS
AG17
VSS
AG20
AG23
VSS
VSS
VSS
VSS
AG24
VSS
VSS
AG7
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
U15C
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
2005 Value FMB 0 1
V28
V27
V26
V25
V24
V23U7U1T7T6T3R7R5R30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH1
AH10
AH13
AH16
AH17
AH20
AH23
AH24
AH3
AH6
AH7
AJ10
AJ13
AJ16
AJ17
VSS
VSS
AJ20
VSS
VSS
AJ23
VSS
VSS
AJ24
VSS
VSS
VSS
VSS
AJ27
AJ28
VSS
VSS
AJ29
VSS
VSS
R29
AJ30
VSS
VSS
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
H28
VSS
VSS
AM28
AM4
VSS
VSS
VSS
AN1
VSS
VSS
VSS
VSS
AN10
VSS
VSS
AN13
H3H6H7H8H9J4J7
VSS
VSS
AN16
VSS
AN17
AN2
VSS
VSS
VSS
VSS
AN20
VSS
VSS
AN23
VSS
VSS
AN24
VSS
VSS
VSS
VSS
AN27
AN28B1B11
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B14
ZIF-SOCK775-15u
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
R28
R27
R26
R25
R24
R23R2P7P4P30
P29
P28
P27
P26
P25
P24
P23N7N6N3M7M1L7L6L30L3L29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
AL17
AL20
VSS
VSS
AL23
VSS
VSS
AL24
VSS
VSS
AL27
VSS
VSS
AL28
VSS
VSS
L28
L27
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL3
AL7
AM1
AM10
L26
VSS
VSS
AM13
L25
VSS
VSS
AM16
L24
VSS
VSS
AM17
L23K7K5
VSS
VSS
AM20
AM23
VSS
VSS
VSS
VSS
AM24
K2
VSS
VSS
AM27
R172
1KR0402-1
VCC3
R159
1KR0402-1
H_FSBSEL0_C 11,16H_FSBSEL05,6 H_FSBSEL1_C 11,16 H_FSBSEL2_C 11,16H_FSBSEL25,6 TRMTRIP_C# 20TRMTRIP#5,6H_FSBSEL15,6
7
V_FSB_VTT
Q21 N-MMBT3904_NL_SOT23
6
V_FSB_VTT
Q18 N-MMBT3904_NL_SOT23
8
VCC3 VCC3
R177
R146
1KR0402-1
1KR0402-1
V_FSB_VTT
Q17 N-MMBT3904_NL_SOT23 Q33 N-MMBT3904_NL_SOT23
5
4
R167
1KR0402-1
R145
1KR0402-1
V_FSB_VTT
3
VCC3
R370
R233
1KR0402-1
1KR0402-1
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - GND
MS-7240L2
2
1.2
37Monday, August 28, 2006
of
7
1
D
C
B
A
U2_1
5
4
3
2
1
RC410
R339
4.7KR0402-1
RC410_RST
+1.8V_S0
NB_GTLREF
H_A#[3..31]5
H_REQ#[0..4]
D D
Heat Sink
HEATSINK
H_REQ#[0..4]5
C C
VCC_DDR
V_FSB_VTT
R263
100R1%
R257
210R1%
SUS_STAT#
NB_RST#31
C294
X_C220P50N
SUS_STAT#20
B B
NB_GTLREF5
H_ADSTB#05
H_ADSTB#15
H_ADS#5
H_BNR#5
H_BPRI#5
H_DEFER#5
H_DRDY#5
H_DBSY#5
CPU_BR0#5
H_LOCK#5
H_TRDY#5
H_HITM#5
H_HIT#5
H_RS#[0..2]5
CPU_BR0#_15
H_CPURST#5,6
EDRDY#5
NB_PWRGD31,32
V_FSB_VTT
H_A#[3..31]
H_ADSTB#1
H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRDY#
H_DBSY#
CPU_BR0#
H_LOCK#
H_TRDY#
H_HITM#
H_HIT#
H_RS#[0..2]
H_CPURST#
EDRDY#
R293 47.5R1%
R289 27.4R1%
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADSTB#0
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
C323 X_C1U10Y
C316 C2.2U6.3Y
C302 C1U10Y
R286
4.7KR0402-1
H_RS#0
H_RS#1
H_RS#2
COMP_P
COMP_N
U16A
G28
CPU_A3#
H26
CPU_A4#
G27
CPU_A5#
G30
CPU_A6#
G29
CPU_A7#
G26
CPU_A8#
H28
CPU_A9#
J28
CPU_A10#
H25
CPU_A11#
K28
CPU_A12#
H29
CPU_A13#
J29
CPU_A14#
K24
CPU_A15#
K25
CPU_A16#
F29
CPU_REQ0#
G25
CPU_REQ1#
F26
CPU_REQ2#
F28
CPU_REQ3#
E29
CPU_REQ4#
H27
CPU_ADSTB0#
M28
CPU_A17#
K29
CPU_A18#
K30
CPU_A19#
J26
CPU_A20#
L28
CPU_A21#
L29
CPU_A22#
M30
CPU_A23#
K27
CPU_A24#
M29
CPU_A25#
K26
CPU_A26#
N28
CPU_A27#
L26
CPU_A28#
N25
CPU_A29#
L25
CPU_A30#
N24
CPU_A31#
L27
CPU_ADSTB1#
F25
CPU_ADS#
F24
CPU_BNR#
E23
CPU_BPRI#
E25
CPU_DEFER#
G24
CPU_DRDY#
F23
CPU_DBSY#
G22
CPU_BR0#
E27
CPU_LOCK#
F22
CPU_TRDY#
E24
CPU_HITM#
D26
CPU_HIT#
E26
CPU_RS0#
G23
CPU_RS1#
D23
CPU_RS2#
D25
RESERVED0
C11
CPU_CPURST#
E11
RESERVED1
AH14
SUS_STAT#
A3
SYSRESET#
E3
POWERGOOD
B11
CPU_COMP_P
D11
CPU_COMP_N
H21
CPVDD
H20
CPVSS
H22
CPU_VREF
AH13
THERMALDIODE_P
AJ13
THERMALDIODE_N
C4
TESTMODE
ATI-RC410-A13-ROHS
PART 1 OF 6
DATA GROUP 0DATA GROUP 1DATA GROUP 2DATA GROUP 3
CPU_DSTB0N#
CPU_DSTB0P#
ADDR. GROUP 1 ADDR. GROUP 0CONTROLMISC.
CPU_DSTB1N#
CPU_DSTB1P#
CPU_DSTB2N#
CPU_DSTB2P#
AGTL+ I/F
CPU_DSTB3N#
CPU_DSTB3P#
CPU_D0#
CPU_D1#
CPU_D2#
CPU_D3#
CPU_D4#
CPU_D5#
CPU_D6#
CPU_D7#
CPU_D8#
CPU_D9#
CPU_D10#
CPU_D11#
CPU_D12#
CPU_D13#
CPU_D14#
CPU_D15#
CPU_DBI0#
CPU_D16#
CPU_D17#
CPU_D18#
CPU_D19#
CPU_D20#
CPU_D21#
CPU_D22#
CPU_D23#
CPU_D24#
CPU_D25#
CPU_D26#
CPU_D27#
CPU_D28#
CPU_D29#
CPU_D30#
CPU_D31#
CPU_DBI1#
CPU_D32#
CPU_D33#
CPU_D34#
CPU_D35#
CPU_D36#
CPU_D37#
CPU_D38#
CPU_D39#
CPU_D40#
CPU_D41#
CPU_D42#
CPU_D43#
CPU_D44#
CPU_D45#
CPU_D46#
CPU_D47#
CPU_DBI2#
CPU_D48#
CPU_D49#
CPU_D50#
CPU_D51#
CPU_D52#
CPU_D53#
CPU_D54#
CPU_D55#
CPU_D56#
CPU_D57#
CPU_D58#
CPU_D59#
CPU_D60#
CPU_D61#
CPU_D62#
CPU_D63#
CPU_DBI3#
E28
D28
D29
C29
D30
C30
B29
C28
C26
B25
B27
C25
A27
C24
A24
B26
C27
A28
B28
C19
C23
C20
C22
B22
B23
C21
B24
E21
B21
B20
G19
F21
B19
E20
D21
A21
D22
E22
C18
F19
E19
A18
D19
B18
C17
B17
E17
B16
C15
A15
B15
F16
G18
F18
C16
D18
E18
E16
D16
C14
B14
E15
D15
C13
E14
F13
B13
A12
C12
E12
D13
D12
B12
E13
F15
G15
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DBI#0
H_DSTBN#0
H_DSTBP#0
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DBI#1
H_DSTBN#1
H_DSTBP#1
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DBI#2
H_DSTBN#2
H_DSTBP#2
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DBI#3
H_DSTBN#3
H_DSTBP#3
H_D#[0..63]
H_DBI#0 5
H_DSTBN#0 5
H_DSTBP#0 5
H_DBI#1 5
H_DSTBN#1 5
H_DSTBP#1 5
H_DBI#2 5
H_DSTBN#2 5
H_DSTBP#2 5
H_DBI#3 5
H_DSTBN#3 5
H_DSTBP#3 5
H_D#[0..63] 5
RC400 MODETESTMODE
LOW
HIGH
A A
NORMAL MODE
TEST MODE
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
LYNX: RC410-AGTL+ I/F
MS-7240L2
1
of
837Monday, August 28, 2006
1.2
5
4
3
2
1
U16C
AK27
MEM_A0
AJ27
MEM_A1
AH26
MEM_A2
AJ26
MEM_A3
AH25
MEM_A4
AJ25
MEM_A5
AH24
MEM_A6
AH23
MEM_A7
AJ24
MEM_A8
AJ23
MEM_A9
AH27
MEM_A10
AH22
MEM_A11
AJ22
MEM_A12
AF28
MEM_A13
AJ21
MEM_A14
AG27
MEM_A15
AJ28
MEM_A16
AH21
MEM_A17
AJ17
MEM_DM0
AG15
MEM_DM1
AE20
MEM_DM2
AF25
MEM_DM3
Y27
MEM_DM4
AB28
MEM_DM5
R26
MEM_DM6
R28
MEM_DM7
AJ29
MEMB_RAS#
AG28
MEMB_CAS#
AH30
MEMB_WE#
AJ18
MEM_DQS0P
AE14
MEM_DQS1P
AF22
MEM_DQS2P
AE25
MEM_DQS3P
W27
MEM_DQS4P
AB29
MEM_DQS5P
P25
MEM_DQS6P
R29
MEM_DQS7P
AH17
MEM_DQS0N
AF15
MEM_DQS1N
AE22
MEM_DQS2N
AF26
MEM_DQS3N
W26
MEM_DQS4N
AB30
MEM_DQS5N
R25
MEM_DQS6N
R30
MEM_DQS7N
AC26
MEM_CK0N
AC25
MEM_CK0P
AF16
MEM_CK1N
AE16
MEM_CK1P
V29
MEM_CK2N
V30
MEM_CK2P
AC24
MEM_CK3N
AC23
MEM_CK3P
AG17
MEM_CK4N
AF17
MEM_CK4P
W29
MEM_CK5N
W28
MEM_CK5P
AH20
MEM_CKE0
AJ20 AE29
MEM_CKE1 MEM_COMPN
AE24
MEM_CKE2
AE21
MEM_CKE3
AH29
MEM_CS0#
AG29
MEM_CS1#
AH28
MEM_CS2#
AF29
MEM_CS3#
AG30
MEM_ODT0
AE28
MEM_ODT1
PART 3 OF 6
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_B I/F
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63
MEM_COMPP
MEM_CAP2
MEM_CAP1
MEM_VREF
MEM_VMODE
MPVDD
MPVSS
AJ16
AH16
AJ19
AH19
AH15
AK16
AH18
AK19
AF13
AF14
AE19
AF19
AE13
AG13
AF18
AE17
AF20
AF21
AG23
AF24
AG19
AG20
AG22
AF23
AD25
AG25
AE27
AD27
AE23
AD24
AE26
AD26
AA25
Y26
W24
U25
AA26
Y25
V26
W25
AC28
AC29
AA29
Y29
AD30
AD29
AA30
Y28
U27
T27
N26
M27
U26
T26
P27
P26
U29
T29
P29
N29
U28
T28
P28
N27
AJ15
N30
AJ14
AB27
AD28
AB26
AA27
ATI-RC410-A13-ROHS
DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
MEM_COMPN
MEM_COMPP
MEM_CAP2
MEM_CAP1
MEM_VREF
MEM_MODE
3
DATA_A[0..63]
R406 61.9R1%
R336 61.9R1%
C400 C0.47U16Y
C370 C0.47U16Y
R405 1KR1%
Pull high for DDR2
C369
C1U10Y
0-ohm
L13 X_0R-1
L19 _0R-1
11/17 Update
Add VCC_DDR
DATA_A[0..63] 13
VCC_DDR
VCC_DDR
+1.8V_S0
VCC_DDR
R404
100R1%0402
R403
100R1%0402
VCC_DDR
2
C416
C0.1U10X0402-1
C414
C0.1U10X0402-1
SM_VREF_RC410
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
LYNX: RC410 - DDR I/F: x1 CHANNEL
MS-7240L2
1
1.2
937Monday, August 28, 2006
of
5
MAA_A[0..17]
DQS_A#[0..7]
SCS_A#013,14
SCS_A#113,14
SCS_A#213,14
SCS_A#313,14
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14
MAA_A15
MAA_A16
MAA_A17
DQM_A[0..7]13
RAS_A#13,14
CAS_A#13,14
WE_A#13,14
DQS_A[0..7]13
DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7
RAS_A#
CAS_A#
WE_A#
DQS_A0
DQS_A1
DQS_A2
DQS_A3
DQS_A4
DQS_A5
DQS_A6
DQS_A7
DQS_A#0
DQS_A#1
DQS_A#2
DQS_A#3
DQS_A#4
DQS_A#5
DQS_A#6
DQS_A#7
4
MAA_A[0..17]13,14
D
C
DQS_A#[0..7]13
N_DDR0_A13
P_DDR0_A13
B
A
N_DDR1_A13
P_DDR1_A13
N_DDR2_A13
P_DDR2_A13
N_DDR3_A13
P_DDR3_A13
N_DDR4_A13
P_DDR4_A13
N_DDR5_A13
P_DDR5_A13
SCKE_A013,14
SCKE_A113,14
SCKE_A213,14
SCKE_A313,14
ODT_A013,14
ODT_A113,14
D
C
B
A
5
4
3
2
1
D
C
B
PCI_E x16
GFX_RX0P22
GFX_RX0N22
GFX_RX1P22
GFX_RX1N22
GFX_RX2P22
GFX_RX2N22
GFX_RX3P22
GFX_RX3N22
GFX_RX4P22
GFX_RX4N22
GFX_RX5P22
GFX_RX5N22
GFX_RX6P22
GFX_RX6N22
GFX_RX7P22
GFX_RX7N22
GFX_RX8P22
GFX_RX8N22
GFX_RX9P22
GFX_RX9N22
GFX_RX10P22
GFX_RX10N22
GFX_RX11P22
GFX_RX11N22
GFX_RX12P22
GFX_RX12N22
GFX_RX13P22
GFX_RX13N22
GFX_RX14P22
GFX_RX14N22
GFX_RX15P22
GFX_RX15N22
A_RX2P17
A_RX2N17
A_RX3P17
A_RX3N17
GPP_RX0P22
GPP_RX0N22
A_RX0P17
A_RX0N17
A_RX1P17
A_RX1N17
SBLINK_CLKP16
SBLINK_CLKN16
NBSRC_CLKP16
NBSRC_CLKN16
BMREQ#11,17,20
U16B
J5
GFX_RX0P
J4
GFX_RX0N
K4
GFX_RX1P
L4
GFX_RX1N
L6
GFX_RX2P
L5
GFX_RX2N
M5
GFX_RX3P
M4
GFX_RX3N
N4
GFX_RX4P
P4
GFX_RX4N
P6
GFX_RX5P
P5
GFX_RX5N
R5
GFX_RX6P
R4
GFX_RX6N
T4
GFX_RX7P
T3
GFX_RX7N
U6
GFX_RX8P
U5
GFX_RX8N
V5
GFX_RX9P
V4
GFX_RX9N
W4
GFX_RX10P
W3
GFX_RX10N
Y6
GFX_RX11P
Y5
GFX_RX11N
AA5
GFX_RX12P
AA4
GFX_RX12N
AB4
GFX_RX13P
AB3
GFX_RX13N
AC6
GFX_RX14P
AC5
GFX_RX14N
AD5
GFX_RX15P
AD4
GFX_RX15N
AF8
GPP_RX0P
AG8
GPP_RX0N
AG6
GPP_RX1P
AG7
GPP_RX0P GPP_TX0P
GPP_RX0N
AK7
AG4
AH4
AG9
AG10
AE9
AF10
AJ7
K2
M2
M1
H2
L2
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_CLKP
SB_CLKN
GFX_CLKP
GFX_CLKN
BMREQ#
PART 2 OF 6
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
PCE_TXSET
PCE_ISET
PCE_PCAL
PCE_NCAL
N1
N2
P2
R2
R1
T1
T2
U2
V2
V1
W1
W2
Y2
AA2
AA1
AB1
AB2
AC2
AD2
AD1
AE1
AE2
AF2
AG2
AG1
AH1
AH2
AJ2
AJ3
AJ4
AK4
AJ5
A_TX2P_C
AJ8
A_TX2N_C
AJ9
A_TX3P_C
AE6
A_TX3N_C
AF6
AJ6
AK6
AE4
AF4
A_TX0P_C
AJ10
A_TX0N_C
AJ11
A_TX1P_C
AK9
A_TX1N_C
AK10
R323 8.25KR1%
AK13
R321 10KR0402-1
AJ12
R329 150R1%0402
AH12
R324 82.5R1%0402
AG12
C360 C0.1U10X0402-1
C355 C0.1U10X0402-1
GPP_TX0N
C366 C0.1U10X0402-1
C364 C0.1U10X0402-1
GFX_TX0P 22
GFX_TX0N 22
GFX_TX1P 22
GFX_TX1N 22
GFX_TX2P 22
GFX_TX2N 22
GFX_TX3P 22
GFX_TX3N 22
GFX_TX4P 22
GFX_TX4N 22
GFX_TX5P 22
GFX_TX5N 22
GFX_TX6P 22
GFX_TX6N 22
GFX_TX7P 22
GFX_TX7N 22
GFX_TX8P 22
GFX_TX8N 22
GFX_TX9P 22
GFX_TX9N 22
GFX_TX10P 22
GFX_TX10N 22
GFX_TX11P 22
GFX_TX11N 22
GFX_TX12P 22
GFX_TX12N 22
GFX_TX13P 22
GFX_TX13N 22
GFX_TX14P 22
GFX_TX14N 22
GFX_TX15P 22
GFX_TX15N 22
C361 C0.1U10X0402-1
C357 C0.1U10X0402-1
C367 C0.1U10X0402-1
C365 C0.1U10X0402-1
V_FSB_VTT
A_TX2P 17
A_TX2N 17
A_TX3P 17
A_TX3N 17
GPP_TX0P 22
GPP_TX0N 22
A_TX0P 17
A_TX0N 17
A_TX1P 17
A_TX1N 17
ATI-RC410-A13-ROHS
A
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
LYNX: RC410-PCIE I/F
MS-7240L2
10 37Monday, August 28, 2006
1
1.2
of
D
C
B
A
5
4
3
2
1
VCC3
DAC VDD (3.3V)
AVDD
D D
C C
B B
AVDDDI DIGITAL VDD (1.8V)
AVDDQ
DAC2 BANDGAP REF (1.8V)
PLLVDD PLL VDD (1.8V)
+1.8V_S0
L14
_0R-1
C532
C2.2U6.3Y
VCC3
R276
4.7KR
C332
C2.2U6.3Y
+1.8V_S0
C329
C336
C1U10Y
C2.2U6.3Y
+1.8V_S0
C312
C2.2U6.3Y
AVDD=(1.8V)
PLLVDD=(1.8V)
R275
4.7KR
I2C_DATA I2C_DATA
VGA_GREEN15
C344
C2.2U6.3Y
DDC_DATA22
VSYNC#15
HSYNC#15
VGA_RED15
VGA_BLUE15
NB_OSC16
NB_CLK16
NB_CLK#16
TVCLKIN22
I2C_CLK22
VCC3
DDC_DATA
VSYNC#
HSYNC#
R292 _715R1%-LF
VGA_RED
VGA_GREEN
VGA_BLUE
NB_OSC
NB_CLK
NB_CLK#
TVCLKIN
TP14
I2C_CLKI2C_CLK
G5
G4
C9
C10
D8
C8
B8
B9
H10
H9
J2
H3
B3
C3
B10
F10
E10
D10
G1
J1
K1
G2
F1
D2
C1
U16D
VDDR3_1
VDDR3_2
AVDD
AVSSN
AVDDDI
AVSSDI
AVDDQ
AVSSQ
PLLVDD
PLLVSS
TMDS_HPD
DDC_DATA
DACVSYNC
DACHSYNC
RSET
RED
GREEN
BLUE
OSCIN
CPU_CLKP
CPU_CLKN
TVCLKIN
OSCOUT
I2C_CLK
I2C_DATA
PART 4 OF 6
CRT
CLK. GEN.
SVID
RSV1
RSV2
RSV3
RSV4
RSV5
RSV6
RSV7
RSV8
RSV9
RSV10
RSV11
RSV12
RSV13
RSV14
RSV15
RSV16
LPVDD
LPVSS
LVDDR18A_1
LVDDR18A_2
LVSSR_1
LVSSR_2
LVSSR_3
LVDDR18D
GPIO3
GPIO2
GPIO4
RSV26
RSV27
RSV28
RSV29
COMP
DACSCL
DACSDA
STRP_DATA
B4
A4
B5
C6
B6
A6
B7
A7
E5
F5
D5
C5
E6
D6
E7
E8
J8
J7
H8
H7
G9
G8
G7
C7
E2
G3
F2
F8
F7
F6
G6
D9
C
F9
Y
E9
DAC_SCL
B2
DAC_SDAT
C2
STRP_DATA
D1
TP17
TP16
TP18
DAC_SCL 15
DAC_SDAT 15
+1.8V_S0
ATI-RC410-A13-ROHS
RS410 STRAPS
BMREQ#10,17,20
HSYNC#15
VSYNC#15
A A
5
4
R273 4.7KR0402-1
R278 4.7KR0402-1
R277 4.7KR0402-1
DAC_SCL
STRP_DATA
Q26
N-MMBT3904_NL_SOT23
R265 1KR0402-1
R274 4.7KR0402-1
H_FSBSEL2_C 7,16
H_FSBSEL1_C 7,16
H_FSBSEL0_C 7,16
SB_PWRGD# 32
VCC3
3
BMREQ#&HSYNC&VSYNC: FSB CLK SPEED
DEFAULT: 010 (200MHz)
OTHER COMBINATIONS ARE RESERVED
DAC_SCL: CPU VCC
DEFAULT:1
1: >=1.2V CPU_VTT
1: <=1.2V CPU_VTT
STRP_DATA:Debug strap
DEFAULT: 1
1: E2PROM STRAPING
0: MEMORY CHANNEL STRAPING
2
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
LYNX: RC410-VIDEO I/F, CLOCK & STRAPS
MS-7240L2
1
of
11 37Monday, August 28, 2006
1.2
5
4
3
2
1
Y24
AC21
AD21
AC13
AD23
AC16
AD19
AD22
V23
AD13
AD16
AC19
AB24
AK24
T24
AK28
AB23
Y23
AK21
T23
V24
AC22
H11
H13
G20
L23
L24
P23
N23
H17
G17
H14
F17
G14
A10
H16
H23
H12
F12
G12
F11
P24
H19
G11
H24
G16
G13
AC8
K6
M8
T8
T7
M7
W8
W7
AD9
VCC_DDR
V_DIMM_RC410
V_FSB_VTT
VCC_DDR
C10U6.3X50805
C575
X_C0.1U16Y0402
V_FSB_VTT
C483
C576
X_C0.1U16Y0402
C395
X_C1U10Y
X_C0.1U16Y0402
C577
C384
C1U10Y
C445
C1U10Y
C578
X_C0.1U16Y0402
C403
C1U10Y
C579
X_C0.1U16Y0402
V_FSB_VTT
C549
C1U10Y
VCCQ_RC410
+1.8V_S0
+1.8V_S0
D
U16F
W5
VSSA#U5
W6
VSSA#U6
AB5
VSSA#Y5
AB6
VSSA#Y6
V8
VSSA#P8
V7
VSSA#P7
AA8
VSSA#U8
AA7
VSSA#U7
AD7
VSSA#Y7
AD8
VSSA#Y8
R8
VSSA#L8
N8
VSSA#K7
R7
VSSA#AD7
N7
VSSA#A2
AF7
VSSA#AF5
AE8
VSSA#AC6
AG5
VSSA#AC5
T6
VSSA#P6
T5
VSSA#P5
N6
VSSA#L6
N5
VSSA#L5
AH5
VSSA#H6
K5
VSSA#H5
AH3
C
B
VSSA#P4
AH8
VSSA#AE3
AH7
VSSA#AD3
AH6
VSSA#AC3
AD3
VSSA#AA3
AC3
VSSA#Y3
AA3
VSSA#V3
Y3
VSSA#U3
V3
VSSA#R3
U3
VSSA#P3
R3
VSSA#M3
P3
VSSA#L3
M3
VSSA#J3
L3
VSSA#H3
AF5
VSSA#F3
AF3
VSSA#N3
AF9
VSSA#AG3
AH9
VSSA#AE9
AH10
VSSA#AH7
AC20
VSS#A15
J23
VSS#A24
A29
VSS#A29
W30
VSS#AA23
W23
VSS#AA24
AA28
VSS#AA30
AJ30
VSS#AB27
AC12
VSS#AC12
AC15
VSS#AC16
K8
VSS#AC8
AD12
VSS#AD12
AD15
VSS#AD16
AD18
VSS#AD19
AC17
VSS#AD23
AE30
VSS#AD30
AD14
VSS#AD8
AC11
VSS#AD9
AF12
VSS#AE12
AF27
VSS#AE27
AC18
VSS#AC19
AG14
VSS#AG12
F4
VSS#AF7
AG18
VSS#AG18
AG21
VSS#AG21
AK25
VSS#AG9
V27
VSS#AH28
AJ1
VSS#AJ1
AD20
VSS#AK10
AK12
VSS#AK13
AK15
VSS#AK16
AK18
VSS#AK19
AK2
VSS#AK2
AH11
VSS#AH11
J3
VSS#AJ11
AC27 AK29
VSS#AK25 VSS#AK29
PART 6 OF 6
GND
VSS#M15
VSS#G14
VSS#G18
VSS#G27
VSS#G3
VSS#H13
VSS#H14
VSS#H18
VSS#H23
VSS#H4
VSS#J23
VSS#J24
VSS#J30
VSS#K27
VSS#V30
VSS#U19
VSS#M16
VSS#AD11
VSS#M30
VSS#N15
VSS#N16
VSS#N23
VSS#N27
VSS#G5
VSS#P15
VSS#P16
VSS#P23
VSS#P24
VSS#R12
VSS#R13
VSS#R14
VSS#R15
VSS#R16
VSS#R17
VSS#R18
VSS#R19
VSS#R23
VSS#R24
VSS#R30
VSS#T12
VSS#T13
VSS#T14
VSS#T15
VSS#T16
VSS#T17
VSS#T18
VSS#T19
VSS#T27
VSS#U15
VSS#U16
VSS#V15
VSS#V16
VSS#W16
VSS#W27
VSS#V12
VSS#W13
VSS#V14
VSS#W15
VSS#Y23
VSS#Y24
VSS#C19
VSS#C17
VSS#AH26
VSS#AH25
VSS#AG25
VSS#F30
VSS#F25
VSS#D27
VSS#D25
VSS#D23
VSS#D20
VSS#D17
VSS#C3
VSS#C28
VSS#B30
VSS#B1
VSS#AK22
M14
AC14
AG16
A22
A2
D27
AG26
H18
A16
A9
AD17
J24
R27
D24
T30
U19
M16
AD11
H15
N15
N19
D3
A25
F3
R15
P16
G10
M24
M12
R13
P12
P14
U13
R17
V18
R19
R23
R24
J30
T12
N13
T14
P18
T16
U17
T18
W19
J27
U15
N17
M18
V16
W17
M26
V12
W13
V14
W15
U23
U24
A13
V28
AG24
AA24
AA23
F30
K23
D20
A19
D17
D14
F27
D4
M23
B30
B1
AK22
V_FSB_VTT
C545
C10U6.3X50805
+1.8V_S0
C536
X_C1U10Y
VCC_DDR
C550
X_C1U10Y
V_FSB_VTT
C542
C10U6.3X50805
C537
X_C1U10Y
C558
C1U10Y
BOTTOM SIDE
C547
C1U10Y
C533
C1U10Y
C548
X_C1U10Y
C544
C1U10Y
C540
X_C2.2U6.3Y
C553
C1U10Y
C539
C1U10Y
C556
C1U10Y
C552
X_C2.2U6.3Y
C531
C1U10Y
C543
X_C1U10Y
C535
C2.2U6.3Y
C546
X_C2.2U6.3Y
C557
C1U10Y
C538
C1U10Y
C554
C1U10Y
C534
C1U10Y
C541
X_C1U10Y
C555
X_C1U10Y
C551
C1U10Y
U16E
U16
VDD_CORE#M12
M13
VDD_CORE#M13
M15
VDD_CORE#M14
M17
VDD_CORE#M17
R16
VDD_CORE#M18
V15
VDD_CORE#M19
N12
VDD_CORE#N12
T15
VDD_CORE#N13
N14
VDD_CORE#N14
N16
VDD_CORE#N17
N18
VDD_CORE#N18
M19
VDD_CORE#N19
R12
VDD_CORE#P12
P13
VDD_CORE#P13
P15
VDD_CORE#P14
P17
VDD_CORE#P17
P19
VDD_CORE#P19
U12
VDD_CORE#U12
T13
VDD_CORE#U13
U14
VDD_CORE#U14
T17
VDD_CORE#U17
U18
VDD_CORE#U18
T19
VDD_CORE#U19
V13
VDD_CORE#V13
R14
VDD_CORE#V14
V17
VDD_CORE#V17
R18
VDD_CORE#V18
V19
VDD_CORE#V19
W12
VDD_CORE#W12
W14
VDD_CORE#W14
W16
VDD_CORE#W17
W18
VDD_CORE#W18
J9
VDD_18
AB22
VDD_18#AF26
AB9
VDD_18#AF9
J22
VDD_18#J26
Y8
VDDA_18#U8
U8
VDDA_18#AD8
AB8
VDDA_18#W6
Y7
VDDA_18#AA8
U7
VDDA_18#AA7
AE11
VDDA_18#AE7
AC9
VDDA_18#AD7
AD10
VDDA_18#AC8
AC10
VDDA_18#AC7
AG11
VDDA_18#AG6
AF11
VDDA_18#AF6
H5
VDDA_12#K6
H4
VDDA_12#K4
P8
VDDA_12#F6
P7
VDDA_12#F5
L7
VDDA_12#B3
L8
VDDA_12#A3
J6
VDDA_12#B4
AC7
VDDA_12#M8
AB7
VDDA_12#W5
ATI-RC410-A13-ROHS
PART 5 OF 6
MEM
POWER
CORE POWER
CPU IF
PCIE
IF
PCIE POWER
VDD_MEM#AB30
VDD_MEM#AJ21
VDD_MEM#AK21
VDD_MEM#AC13
VDD_MEM#AC14
VDD_MEM#AC15
VDD_MEM#AC18
VDD_MEM#AC21
VDD_MEM#AD10
VDD_MEM#AD13
VDD_MEM#AD15
VDD_MEM#AD18
VDD_MEM#AD21
VDD_MEM#AE15
VDD_MEM#AE18
VDD_MEM#AE21
VDD_MEM#AG27
VDD_MEM#AJ30
VDD_MEM#AK18
VDD_MEM#AK24
VDD_MEM#AK9
VDD_MEM#W23
VDD_CPU#H17
VDD_CPU#H19
VDD_CPU#K23
VDD_CPU#L23
VDD_CPU#L24
VDD_CPU#M23
VDD_CPU#M24
VDD_CPU#T23
VDD_CPU#U23
VDD_CPU#U24
VDD_CPU#V23
VDD_CPU#V24
VDD_CPU#G16
VDD_CPU#G15
VDD_CPU#F22
VDD_CPU#F19
VDD_CPU#F16
VDD_CPU#F15
VDD_CPU#E15
VDD_CPU#A16
VDD_CPU#H16
VDD_CPU#H15
VDD_CPU#G22
POWER
VDD_CPU#G21
VDD_CPU#G19
VDDA_12#N8
VDDA_12#C3
VDDA_12#R7
VDDA_12#R8
VDDA_12#U7
VDDA_12#B2
VDDA_12#K8
VDDA_12#L7
VDDA_12#L8
ATI-RC410-A13-ROHS
A
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
LYNX: RC410-POWER
MS-7240L2
12 37Monday, August 28, 2006
1
1.2
of
D
v
C
B
A
2
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