1
1Cover Sheet
Block Diagram/Clock Map/Power Map
Intel LGA775 CPU
Intel Lakeport - MCH
Intel ICH7 - PCI & DMI & CPU & IRQ
Intel ICH7 - LPC & ATA & USB & GPIO 13
Intel ICH7 - POWER
Clock - ICS954559
LPC I/O - W83627EHG colay DHG
Azalia - ALC850 CO-LAY 880
LAN REALTEK RTL8110SC/8100C
DDR II System Memory 1 & 2
DDR II System Memory 3 & 4
DDR II VTT Decoupling
PCI EXPRESS X16 Slot
A A
PCI Slot 1 & 2 & 3 & 4 & PCI Express x1 Slot
ATA33/66/100 IDE & SATA Connectors
CLOCK BUFFER
USB Connectors
ATX Connetcor & Front Panel
FWH
ACPI CONTROLLER MS7
VRM 11.0 - RT8802A+RT9607
GMCH POWER
2-4
5-7
8-11
12
14
15
16
17
18
19
20
21
22
23-24
25
26
27
28
29
30
31
32
Version 2.0
MS-7236
CPU:
Intel Prescott ( L2=2MB ) - 3.4G & Above
Intel Cendar Mill (65nm) - 3.73G & Above
Intel Smithfield (90nm Dual core)
conroe cpu
System Chipset:
Intel Lakeport - MCH (North Bridge)
Intel ICH7R (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM
Ac97 Codec -- ALC850/880
LPC Super I/O -- W83627EHG colay DHG
LAN-- REALTEK RTL8110SC colay 8100C
CLOCK -- ICS954519
Main Memory:
DDR II * 4 (Max 4GB)
Expansion Slots:
PCI2.3 SLOT * 4
PCI EXPRESS X1 SLOT
PCI EXPRESS X16 SLOT
RICH PWM:
Controller: RT8802A+ RT9607 4 PHASES
AutoBOM parts
33
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
Date: Sheet
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
COVER SHEET
COVER SHEET
COVER SHEET
MS-7236
MS-7236
MS-7236
136Wednesday, June 07, 2006
136Wednesday, June 07, 2006
136Wednesday, June 07, 2006
of
of
of
2.0
2.0
2.0
Block Diagram
1
VRM 10.1
RT8800
3-Phase PWM
PCI EXPRESS
X16
Connector
PCI EXPRESS X16
Intel LGA775 Processor
FSB 533/800/1066
133/200/266
MHz
FSB
DDR2 533/667
DDRII
4 DDR II
DIMM
Modules
Lakeport
LPC Bus
266/333
MHz
PCI
LPC SIO
Winbond
83627EHF
PCI EXPRESS X1
PCI Slot 1
PCI Slot 2
PCI Slot 3
PCI Slot 4
PCI EXPRESS X1
GMCH
DMI
UltraDMA
33/66/100
IDE Primary
A A
SATA 0~3
USB Port 0~7
ALC880/850
Azalia Codec
REALTEK
RTL8110SB
SPI
SATA
ICH7
USB
AC'97
PCI
SPI
EEPROM
FWH
Keyboard
Mouse
1
Floopy Parallel Serial
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-STAR INt'L CO., LTD.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
MS-7236
MS-7236
MS-7236
236Wednesday, May 31, 2006
236Wednesday, May 31, 2006
236Wednesday, May 31, 2006
of
of
of
0A
0A
0A
5
4
3
2
1
HCLK
LGA775
CLOCK MAP
D D
MCHCLK
Lakeport
DOTCLK
MCH
96MHz
ICS 954519
1/2
Clock
Generator
ICHCLK
SATACLK
USB48MHz
ICH7
ICH14.318MHz
C C
SIO48MHz
Winbon
LPC IO
FWH_PCLK
33MHz
FWH
CHANNEL A
CHANNEL A #
CHANNEL B
CHANNEL B#
ICS 954519
2/2
Clock
Generator
ICS
CLOCK BUFFER
PCI_E1_100MHz
PCI_E2_100MHz
PCI_E1
PCI-Express X 16
PCI_E2
PCI-Express X 1
AC_CLK
14.318MHz
B B
PCI_LAN
33MHz
﹛ALC850
REALTEK
8110SB
PCI1
A A
5
PCICLK[0..3]
33MHz
4
PCI2
PCI3
PCI4
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
CLOCK MAP
CLOCK MAP
CLOCK MAP
MS-7236
MS-7236
MS-7236
1
336Wednesday, May 31, 2006
336Wednesday, May 31, 2006
336Wednesday, May 31, 2006
of
of
of
0A
0A
0A
5
POWER MAP
4
3
2
1
D D
ATX POWER
+12V +5V +3.3V +5VSB
25A 15A25.5A
2A
19A
PCI_E1
937.5mA
6.5A
5A
12.1A
125A 5.3A
PCI_E2
PCI1
PCI2
PCI3
PCI4
LGA775VRM 10.1
C C
B B
MSI
ACPI
Controller
MS - 7
5VDIMM
8.58A
VR
15.3+1.31+6.2 = 22.81
V_1P5_CORE
MSI
MS6 +
W83310DS
4+9.4+1.2 = 14.6A14.6*1.8/5/0.8 = 6.57A
VCC_DDR
1.2A
VTT_DDR
15.3A
Lakeport
4A
MCH
13.8A + 1.5A
= 15.3A
9.4A
DDR2 X 4
1.2A
1.71mA
0.9A
6.2A
1.31A
V_1P05_CORE
VR
1.31A
0.7A
ICH7
14mA
VR
V_FSB_VTT
6.2A
VLAN25
REALTEK
VCC3_SB
1.5A
VLAN12
RTL8110SB
MSI
MS8
A A
5VDUAL
5
4.345A
MSI
4.345A
USB+PS2
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
POWER MAP
POWER MAP
POWER MAP
MS-7236
MS-7236
MS-7236
1
0A
0A
436Wednesday, May 31, 2006
436Wednesday, May 31, 2006
436Wednesday, May 31, 2006
0A
of
of
of
8
D D
H_DBI#[0..3]8
H_IERR#6
H_FERR#6,12
H_STPCLK#12
H_DBSY#8
H_DRDY#8
H_TRDY#8
C C
VTT_OUT_LEFT
H_CPUSLP#12
VTT_OUT_RIGHT
B B
X_C0.1U25Y
X_C0.1U25Y
C388
C388
A A
H_ADS#8
H_LOCK#8
H_BNR#8
H_HIT#8
H_HITM#8
H_DEFER#8
CPU_TMPA16
VTIN_GND16
TRMTRIP#6,12
H_PROCHOT#6
H_IGNNE#12
ICH_H_SMI#12
R381 X_62RR381 X_62R
R382 0RR382 0R
R385 X_1KR-1R385 X_1KR-1
H_FSBSEL06,10,15
H_FSBSEL16,10,15
H_FSBSEL26,10,15
H_PWRGD6,12
H_CPURST#6,8
H_D#[0..63]8
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
TP8TP8
H_INIT#12
H_BPRI#8
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
H_A20M#12
H_TESTHI13
TP11TP11
TP12TP12
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
7
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
H_A#[3..31]8
U22A
U22A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_D#53
D53#
D52#
C14
H_D#52
D51#
A14
C15
H_D#51
H_D#50
D50#
D49#
D17
H_D#49
CPU SIGNAL BLOCK
H_A#31
H_A#30
H_A#28
H_A#29
H_A#27
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
AF5
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
F21
F20
E22
E21
D22
H_D#46
H_D#45
G21
H_D#44
H_D#43
H_D#41
H_D#42
E19
H_D#40
D20
G22
H_D#47
H_D#48
H_A#26
H_A#25
AB4
AC5
A26#
D39#
F18
E18
H_D#39
H_D#38
H_A#24
AB5
A25#
A24#
D38#
D37#
F17
H_D#37
6
H_A#23
H_A#22
AA5
AD6
A23#
D36#
G17
G18
H_D#35
H_D#36
H_A#21
AA4
A22#
A21#
D35#
D34#
E16
H_D#34
H_A#19
H_A#18
H_A#20
A20#Y4A19#Y6A18#W6A17#
D33#
D32#
E15
G16
G15
H_D#32
H_D#33
H_D#31
H_A#17
H_A#14
H_A#15
H_A#16
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D31#
D30#
D29#
D28#
D27#
F15
F14
G14
G13
H_D#30
H_D#27
H_D#29
H_D#28
H_A#12
H_A#13
D26#
E13
D13
H_D#26
H_D#25
H_A#11
D25#
D24#
F12
H_D#24
H_A#10
H_A#9
U6
D23#
F11
D10
H_D#23
H_D#22
H_A#7
H_A#8
H_A#6
H_A#4
H_A#5
H_A#3
L5
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
E10
H_D#21
H_D#16
H_D#19
H_D#20
H_D#18
H_D#17
AC2
D11
C12
H_D#14
H_D#15
5
DBR#
D14#
D13#
B12
H_D#13
AJ3
AN4
AN3
AN6
AN5
ITP_CLK1
VSS_SENSE
VCC_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D12#D8D11#
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B10
A11
A10
C11
H_D#7
H_D#11
H_D#8
H_D#10
H_D#12
H_D#9
AK3
ITP_CLK0
H_D#5
H_D#6
R367 0RR367 0R
R369 0RR369 0R
VID4
VID5
VID6
VID7
AM5
AL4
AK4
AM7
VID6#
VID5#
RSVD
VID_SELECT
GTLREF_SEL
CS_GTLREF
H_D#2
H_D#1
H_D#4
H_D#3
VCC_VRM_SENSE
VSS_VRM_SENSE
VID3
VID0
VID1
VID2
AL6
AM3
AL5
AM2
VID4#
VID3#
VID2#
VID1#
VID0#
GTLREF0
GTLREF1
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
FORCEPH
RSVD
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
B4
H_D#0
4
VID[0..7] 31
VID_SELECT
AN7
H1
H2
TP_GTLREF_SEL
H29
MCH_GTLREF_CPU
E24
H_BPM#5
AG3
H_BPM#4
AF2
H_BPM#3
AG2
H_BPM#2
AD2
H_BPM#1
AJ1
H_BPM#0
AJ2
PECI
G5
H_REQ#4
J6
H_REQ#3
K6
H_REQ#2
M6
H_REQ#1
J5
H_REQ#0
K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3
F24
G24
G26
G27
G25
H_TESTHI2_7
F25
H_TESTHI1
W3
H_TESTHI0
F26
RSVD_AK6
AK6
RSVD_G6
G6
G28
F28
H_RS#2
A3
H_RS#1
F5
H_RS#0
B3
U3
U2
F3
H_COMP5
T2
H_COMP4
J2
H_COMP3
R1
H_COMP2
G2
H_COMP1
T1
H_COMP0
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
VCCP
R366
R366
X_0R-1
X_0R-1
R371
R371
X_0R-1
X_0R-1
VID_SELECT
CPU_GTLREF0
CPU_GTLREF1
RN50 8P4R-62R-LFRN50 8P4R-62R-LF
1 2
3 4
5 6
7 8
R375 62R-1R375 62R-1
R376 62R-1R376 62R-1
R377 62R-1R377 62R-1
R378 62R-1R378 62R-1
R379 X_62R-1R379 X_62R-1
R380 X_62R-1R380 X_62R-1
CK_H_CPU# 15
CK_H_CPU 15
TP9TP9
TP10TP10
R475 60.4R1%-1R475 60.4R1%-1
R458 60.4R1%-1R458 60.4R1%-1
R386 60.4R1%-1R386 60.4R1%-1
R387 60.4R1%-1R387 60.4R1%-1
R388 60.4R1%-1R388 60.4R1%-1
R389 60.4R1%-1R389 60.4R1%-1
TP13TP13
TP14TP14
TP15TP15
TP16TP16
H_NMI 12
H_INTR 12
VID_SELECT 31
MCH_GTLREF_CPU 8
PECI 16
H_REQ#[0..4] 8
H_RS#[0..2] 8
H_ADSTB#1 8
H_ADSTB#0 8
H_DSTBP#3 8
H_DSTBP#2 8
H_DSTBP#1 8
H_DSTBP#0 8
H_DSTBN#3 8
H_DSTBN#2 8
H_DSTBN#1 8
H_DSTBN#0 8
VCC_VRM_SENSE 31
VSS_VRM_SENSE 31
VTT_OUT_RIGHT
R346
R346
X680R0402
X680R0402
CPU_GTLREF0 6
CPU_GTLREF1 6
VTT_OUT_LEFT
V_FSB_VTT
VTT_OUT_RIGHT
C390
C390
X_C1U10X
X_C1U10X
3
R390
R390
X_62R0402
X_62R0402
VTT_OUT_RIGHT 6,7
VTT_OUT_LEFT 6
C389
C389
X_C0.1U25Y
X_C0.1U25Y
2
RN51
RN51
8P4R-680R
VID2
VID6
VID7
VID5
VID0
VID4
VID3
8P4R-680R
1
3
5
7
1
3
5
7
RN58
RN58
8P4R-680R
8P4R-680R
VTT_OUT_RIGHTVID1
2
4
6
8
2
4
6
8
BSEL
02
1
FSB FREQUENCY
0
01 200 MHZ (800)
1
0 0 133 MHZ (533)
Prescott / Cedar Mill
LL_ID[1:0] = 00
GTLREF_SEL = 0
VTT_SEL = 1
H_BR#0 6,8
RN52 8P4R-62R-LFRN52 8P4R-62R-LF
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN53 8P4R-62R-LFRN53 8P4R-62R-LF
R392 62R-1R392 62R-1
R393 62R-1R393 62R-1
R394 62R-1R394 62R-1
PLACE BPM/TCK/TDI/TMS TERMINATION NEAR CPU
H_BPM#3
H_BPM#0
H_BPM#1
H_TMS
H_BPM#2
H_TDI
H_BPM#4
H_TDO
H_TRST#
H_TCK
PLACE TDO TERMINATION NEAR CONNECTOR
1
TABLE
H_BPM#5
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
8
7
6
5
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Signals
2.0
2.0
MS-7236
MS-7236
MS-7236
2
536Thursday, June 01, 2006
536Thursday, June 01, 2006
536Thursday, June 01, 2006
1
2.0
of
of
of
8
VCCP
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
U22B
AF19
AF18
AF15
AF14
AF12
AF11
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AE9
AD8
AC8
AB8
AA8
VCCP
U22B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y30
Y23
Y24
Y25
Y26
Y27
Y28
Y29
W30
VCCP
D D
C C
AG22
VCC
VCC
W29
AG25
VCC
VCC
W28
AG26
VCC
VCC
W27
AG27
VCC
VCC
W26
AG28
VCC
VCC
W25
AG29
VCC
VCC
W24
7
AG30
VCC
W23
AG8
VCC
AG9
VCC
VCCU8VCCV8VCC
AH11
VCC
VCC
U30
AH12
VCC
VCC
U29
AH14
VCC
VCC
U28
AH15
VCC
VCC
U27
AH18
VCC
VCC
U26
AH19
VCC
VCC
U25
AH21
VCC
VCC
U24
AH22
VCC
U23
AH25
VCC
VCCT8VCC
AH26
VCC
VCC
T30
AH27
VCC
VCC
T29
AH28
VCC
VCC
T28
AH29
VCC
VCC
T27
AH30
VCC
VCC
T26
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
AJ11
T23
VCC
AJ12
VCC
AJ14
VCC
AJ15
VCC
VCCN8VCCP8VCCR8VCC
6
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
N23
N24
N25
N26
N27
N28
N29
N30
M24
M25
M26
M27
M28
M29
M30
VCC
VCC
AK25
VCC
M23
AK26
VCC
5
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
J22
J23
J24
J25
J26
J27
J28
J29
J30
K23
K24
K25
K26
K27
K28
K29
K30
AM18
VCC
VCC
J21
AM19
VCC
VCC
J20
AM21
VCC
VCC
J19
AM22
VCC
VCC
J18
AM25
VCC
VCC
J15
AM26
VCC
VCC
J14
4
AM29
VCC
VCC
J13
AM30
VCC
VCC
J12
AM8
J11
VCC
VCC
AM9
VCC
VCC
J10
AN11
VCC
VCC
AN9
AN12
VCC
VCC
AN8
AN14
AN15
AN18
AN19
VCC
VCC
VCC
VCC
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC
VCC
VCC
VCC
AN25
AN26
AN29
AN30
AN21
AN22
VCC
VCC
VCCA
VSSA
VCCPLL
VCC-IOPLL
VTTPWRGD
VTT_SEL
RSVD
HS11HS22HS33HS4
A23
B23
D23
C23
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
AM6
AA1
J1
F27
F29
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
4
3
H_VCCA
H_VSSA
H_VCCA
VTT_PWG
VTT_OUT_RIGHT
VTT_OUT_LEFT
R352
R352
X_1KR-1
X_1KR-1
V_FSB_VTT
R351X_1KR-1 R351X_1KR-1
01TEJ/PSC
RSVD
VCC3
2
V_FSB_VTT
C377 C10U10Y0805C377 C10U10Y0805
C378 C10U10Y0805C378 C10U10Y0805
C379 C10U10Y0805C379 C10U10Y0805
1
CAPS FOR FSB GENERIC
VTT_OUT_RIGHT
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
VTT_OUT_RIGHT
B B
VTT_OUT_RIGHT5,7
VTT_OUT_LEFT5
A A
VCC3 VCC5
X_C1U10Y
X_C1U10Y
C386
C386
C0.1U25Y
C0.1U25Y
R353 124R1%-LFR353 124R1%-LF
R484 124R1%-LFR484 124R1%-LF
VTT_OUT_RIGHT
C384
C384
8
R354 10RR354 10R
C380
R355
R355
210R1%-1
210R1%-1
R485
R485
210R1%-1
210R1%-1
C380
C1U10Y
C1U10Y
C487
C487
C1U10Y
C1U10Y
R476 10RR476 10R
C381
C381
X_C220P50N-1
X_C220P50N-1
C488
C488
X_C220P50N-1
X_C220P50N-1
PLACE AT CPU END OF ROUTE
R357 130R1%-1R357 130R1%-1
R358 62R-1R358 62R-1
R361 62R-1R361 62R-1
R362 X_100R-1R362 X_100R-1
VTT_OUT_RIGHT H_IERR#
R363 62R-1R363 62R-1
H_CPURST#
H_BR#0
H_PWRGDVTT_OUT_LEFT
PLACE AT ICH END OF ROUTE
V_FSB_VTT
R364 62R-1R364 62R-1
R365 62R-1R365 62R-1
TRMTRIP#
H_FERR#
7
H_PROCHOT# 5
H_CPURST# 5,8
H_BR#0 5,8
H_PWRGD 5,12
H_IERR# 5VTT_OUT_RIGHT5,7
TRMTRIP# 5,12
H_FERR# 5,12
CPU_GTLREF0 5
CPU_GTLREF1 5
6
V_FSB_VTT
CP19 X_COPPERCP19 X_COPPER
VTT_OUT_LEFT
VCC5_SB
VID_GD#15,30,31
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
5
R359
R359
1KR
1KR
R360 10KR-1R360 10KR-1
V_FSB_VTT
R356 680R-1R356 680R-1
RN49
RN49
1
2
3
4
5
6
7
8
8P4R-470R-LF
8P4R-470R-LF
Q47
Q47
H_FSBSEL1
H_FSBSEL2
H_FSBSEL0
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
L14 X_10U125m_0805-1L14 X_10U125m_0805-1
L15 X_10U125m_0805-1L15 X_10U125m_0805-1
VTT_PWGH_PROCHOT#
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
H_FSBSEL1 5,10,15
H_FSBSEL2 5,10,15
H_FSBSEL0 5,10,15
4
C385
C385
X_C1U10Y
X_C1U10Y
C382
C382
C10U10Y0805
C10U10Y0805
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
3
C383
C383
C10U10Y1206
C10U10Y1206
H_VCCA
H_VSSA
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
2
Intel LGA775 CPU - Power
Intel LGA775 CPU - Power
Intel LGA775 CPU - Power
MS-7236
MS-7236
MS-7236
636Thursday, June 01, 2006
636Thursday, June 01, 2006
636Thursday, June 01, 2006
1
of
of
of
0A
0A
0A
8
VTT_OUT_RIGHT5,6
D D
CP28
CP28
X_COPPER
X_COPPER
C C
B B
VTT_OUT_RIGHT
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
A12
A15
A18
A2
A21
A24
A6
A9
R349
R349
60.4R1%-1
60.4R1%-1
U22C
U22C
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
7
VSS
AE29
AE3
COMP6Y3COMP7
VSS
VSS
AE5
AE30
R350
R350
60.4R1%-1
60.4R1%-1
TP5TP5
AE4
D14
RSVD
RSVDD1RSVD
VSS
VSS
AE7
AF10
AF13
24.9R1%0402
24.9R1%0402
E23
RSVD
VSS
VSS
VSS
AF16
AF17
AF20
R445
R445
TP3TP3
TP4TP4
F23
F6
RSVDE5RSVDE6RSVDE7RSVD
VSS
VSS
VSS
VSS
AF23
AF24
AF25
AF26
R395
R395
H_COMP8
B13
RSVD
IMPSEL#
VSS
VSS
VSS
AF27
AF28
51R/2
51R/2
VSS
AF29
R347
R347
62R-1
62R-1
P5
RSVDJ3RSVDN4RSVD
VSS
VSS
AF3
AF6
AF30
VSS
VSS
AF7
MSID[1]V1MSID[0]
VSS
AG10
W1
VSS
AG13
6
R348
R348
62R-1
62R-1
AC4
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
RSVD
VSS
VSS
VSS
VSS
AG16
AG17
AG20
AG23
VSS
AG24
AG7
VSS
AH1
VSS
VSS
AH10
VSS
AH13
VSS
AH16
V30
VSS
AH17
VSSV3VSS
VSS
AH20
V29
VSS
AH23
V28
VSS
VSS
AH24
V27
AH3
VSS
VSS
V26
VSS
VSS
AH6
V25
V24
V23
VSS
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
AH7
AJ10
AJ13
AJ16
5
CP31
CP31
X_COPPER
X_COPPER
VSS
VSS
VSS
AJ17
AJ20
AJ23
AJ24
VSS
AJ27
VSS
AJ28
VSS
R30
AJ29
VSS
R29
AJ30
VSS
VSS
4
R28
R27
R26
R25
R24
R23
P30
P29
P28
P27
P26
P25
P24
P23
VSS
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
VSS
AL17
VSS
AL20
VSS
AL23
VSS
AL24
VSS
AL27
VSS
L30
AL28
VSS
VSSL3VSS
VSS
AL3
L29
L28
L27
L26
L25
L24
L23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL7
AM1
AM10
AM13
AM16
AM17
AM20
VSSK7VSS
VSS
AM23
K5
VSS
AM24
K2
VSS
AM27
VSS
AM28
AM4
VSS
AN1
3
VSS
VSS
AN10
VSS
AN13
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
AN16
VSS
AN17
H28
AN2
VSS
VSS
H27
VSS
VSS
AN20
H26
VSS
VSS
AN23
H25
VSS
VSS
AN24
H24
VSS
VSS
AN27
H23
VSS
VSS
AN28
H21
H22
VSS
VSS
VSSB1VSS
H17
H18
H19
H20
VSS
VSS
VSS
VSS
VSS
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
B11
B14
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
2
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
CP32
CP32
X_COPPER
X_COPPER
CP33
CP33
X_COPPER
X_COPPER
1
A A
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
8
7
6
5
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - GND
Intel LGA775 CPU - GND
Intel LGA775 CPU - GND
MS-7236
MS-7236
MS-7236
2
736Thursday, June 01, 2006
736Thursday, June 01, 2006
736Thursday, June 01, 2006
1
2.0
2.0
2.0
of
of
of
8
H_BR#05,6
H_BPRI#5
TP2TP2
ICH_SYNC#
HXRCOMP
HXSCOMP
HXSWING
MCH_GTLREF_CPU
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_A#[3..31]5
D D
H_ADSTB#05
H_ADSTB#15
C C
B B
ICH_SYNC#13
H_BNR#5
H_LOCK#5
H_ADS#5
H_REQ#[0..4]5
H_HIT#5
H_HITM#5
H_DEFER#5
H_TRDY#5
H_DBSY#5
H_DRDY#5
H_RS#[0..2]5
CK_H_MCH15
CK_H_MCH#15
PWRGD_3V13,30
H_CPURST#5,6
PLTRST#12,16,29
R338 16.9R1%-LFR338 16.9R1%-LF
AA37
AA41
W42
G37
W41
W40
M31
M29
AJ12
M18
K38
K35
M34
N35
R33
N32
N34
M38
N42
N37
N38
R32
R36
U37
R35
R38
V33
U34
U32
V42
U35
Y36
Y38
V32
Y34
M36
V35
F38
D42
U39
U40
E41
D41
K36
E42
U41
P40
U42
V41
Y40
T40
Y43
T43
AJ9
C30
A28
C27
B27
D27
D28
J39
J42
J37
U21A
U21A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
HPCREQ#
HBREQ0#
HBPRI#
HBNR#
HLOCK#
HADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HHIT#
HHITM#
HDEFER#
HTRDY#
HDBSY#
HDRDY#
HEDRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
HCPURST#
RSTIN#
ICH_SYNC#
HRCOMP
HSCOMP
HSWING
HDVREF
HACCVREF
7
N17
P17
P18
P20
P21
AA22
AB21
AB22
AB23
AC22
AD14
AF6
AF7
AF8
AF9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
L15
A43
U27
R27
M15
AA38
M11
AG25
AA35
AA42
AA34
AF10
AF11
VCC
RSVRD
AG26
AG27
AF12
VCC
VCC
RSVRD
RSVRD
AJ24
AF13
AF14
VCC
RSVRD
AJ27
AK40
AF30
VCC
VCC
RSVRD
RSVRD
AL39
6
AG2
VCC
RSVRD
AW17
V_1P5_CORE
AG3
AG4
AG5
VCC
VCC
RSVRD
RSVRD
AY14
BC16
AW18
AG6
VCC
VCC
RSVRD
RSVRD
AD30
AG7
AG8
VCC
RSVRD
Y30
AC34
AG9
VCC
VCC
RSVRD
RSVRD
Y33
AG10
AG11
VCC
RSVRD
AF31
AD31
AG12
VCC
VCC
RSVRD
RSVRD
U30
AG13
AG14
VCC
RSVRD
V31
AA30
AH1
VCC
VCC
RSVRD
RSVRD
AC30
AH2
AH4
VCC
RSVRD
AJ23
AK21
AJ5
VCC
VCC
RSVRD
RSVRD
AJ26
AJ13
AJ14
VCC
RSVRD
AL29
AL20
AK2
VCC
VCC
RSVRD
RSVRD
AJ21
AK3
AK4
VCC
RSVRD
AL26
AK27
5
AK14
VCC
VCC
RSVRD
RSVRD
AJ29
AK15
AK20
VCC
RSVRD
V30
AG29
R15
VCC
VCC
RSVRD
R17
R18
VCC
VCC
NC
BC43NCBC42
R20
R21
VCC
NC
BC2NCBC1
VCC
R23
VCC
NC
BB43
R24
U15
VCC
VCC
NC
BB2NCBB1NCBA2
4
U17
U18
U19
U20
U21
U22
U23
U24
U25
U26
V15
V17
V18
V19
V20
V21
V22
V23
V25
V27
W17
W18
W19
W20
W22
W24
W26
W27
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
NC
NC
NC
NC
NC
NCC2NC
NCB3NCB2NC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
E35
B43NCB42NCB41
A42
Y17
Y18
Y19
Y21
Y23
Y25
C42
AW2
AV27NCAV26
AW26
Y27
AA15
AA17
AA18
AA19
AA20
3
Y15
M17
HD0#
HD1#
VCC
VCC
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
KDINV_0#
HDINV_1#
HDINV_2#
HDINV_3#
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
(INTEL-QG82945G-A2-LF)
(INTEL-QG82945G-A2-LF)
V_1P5_CORE
P41
M39
P42
M42
N41
M40
L40
M41
K42
G39
J41
G42
G40
G41
F40
F43
F37
E37
J35
D39
C41
B39
B40
H34
C37
J32
B35
J34
B34
F32
L32
J31
H31
M33
K31
M27
K29
F31
H29
F29
L27
M24
J26
K26
G26
H24
K24
F24
E31
A33
E40
D37
C39
D38
D33
C35
D34
C34
B31
C31
C32
D32
B30
D30
K40
A38
E29
B32
K41
L43
F35
G34
J27
M26
E34
B37
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_DSTBP#0 5
H_DSTBN#0 5
H_DSTBP#1 5
H_DSTBN#1 5
H_DSTBP#2 5
H_DSTBN#2 5
H_DSTBP#3 5
H_DSTBN#3 5
2
H_D#[0..63] 5
H_DBI#[0..3] 5
1
R339
V_FSB_VTT
A A
R339
60.4R1%-1
60.4R1%-1
HXSCOMP
C373
C373
X_C2.2P50N
X_C2.2P50N
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/3*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT
R341
R341
301R1%-1
301R1%-1
R345
R345
84.5R1%-LF
84.5R1%-LF
R343 62R-1R343 62R-1
HXSWING
C376
C376
C0.01U50Y5
C0.01U50Y5
V_FSB_VTTV_FSB_VTT
R340
R340
124R1%-LF
124R1%-LF
R344
R344
210R1%-1
210R1%-1
CAPS SHOULD BE PLACED NEAR MCH PIN
8
7
6
5
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V
124 OHM OVER 210 RESISTORS
4
MCH_GTLREF_CPU
C375
C375
X_C220P50N
X_C220P50N
C374
C374
C0.1U25Y
C0.1U25Y
R342 10RR342 10R
MCH_GTLREF_CPU 5
3
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Lakeport - CPU Signals
Intel Lakeport - CPU Signals
Intel Lakeport - CPU Signals
MS-7236
MS-7236
MS-7236
2
836Thursday, June 01, 2006
836Thursday, June 01, 2006
836Thursday, June 01, 2006
of
of
of
1
0A
0A
0A
8
DATA_A[0..63]19
D D
C C
B B
A A
SCS_A#[0..1]19,21
RAS_A#19,21
CAS_A#19,21
WE_A#19,21
MAA_A[0..13]19,21
ODT_A[0..1]19,21
SBS_A[0..2]19,21
DQS_A019
DQS_A#019
DQS_A119
DQS_A#119
DQS_A219
DQS_A#219
DQS_A319
DQS_A#319
DQS_A419
DQS_A#419
DQS_A519
DQS_A#519
DQS_A619
DQS_A#619
DQS_A719
DQS_A#719
P_DDR_A26
N_DDR_A26
does it need to connect to
GND through a 40 ohm resister?
R333 80.6R1%-LFR333 80.6R1%-LF
VCC_DDR
R337 80.6R1%-LFR337 80.6R1%-LF
C372
C372
C0.1U25Y
C0.1U25Y
8
SCS_A#0
BB37
SCS_A#1
BA39
BA35
AY38
RAS_A#
BA34
CAS_A#
BA37
WE_A#
BB35
MAA_A0
BA32
MAA_A1
AW32
MAA_A2
BB30
MAA_A3
BA30
MAA_A4
AY30
MAA_A5
BA27
MAA_A6
BC28
MAA_A7
AY27
MAA_A8
AY28
MAA_A9
BB27
MAA_A10
AY33
MAA_A11
AW27
MAA_A12
BB26
MAA_A13
BC38
ODT_A0
AW37
ODT_A1
AY39
AY37
BB40
SBS_A0
BC33
SBS_A1 SBS_B1
AY34
SBS_A2
BA26
DQS_A0
AU4
DQS_A#0
AR2
DQS_A1
BA3
DQS_A#1
BB4
DQS_A2
AY11
DQS_A#2
BA10
DQS_A3
AU18
DQS_A#3
AR18
DQS_A4
AU35
DQS_A#4
AV35
DQS_A5
AP42
DQS_A#5
AP40
DQS_A6
AG42
DQS_A#6
AG41
DQS_A7
AC42
DQS_A#7
AC41
BB32
AY32
P_DDR_A
N_DDR_A
SMPCOMP_N
SMPCOMP_P
SMPCOMP_P
SMPCOMP_N
AY5
BB5
AK42
AK41
BA31
BB31
AY6
BA5
AH40
AH43
AM3
(INTEL-QG82945G-A2-LF)
(INTEL-QG82945G-A2-LF)
U21B
U21B
AL5
AJ6
AJ8
DATA_B[0..63]20
7
SACS0#
SACS1#
SACS2#
SACS3#
SARAS#
SACAS#
SAWE#
SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13
SAODT0
SAODT1
SAODT2
SAODT3
SABA0
SABA1
SABA2
SADQS0
SADQS0#
SADQS1
SADQS1#
SADQS2
SADQS2#
SADQS3
SADQS3#
SADQS4
SADQS4#
SADQS5
SADQS5#
SADQS6
SADQS6#
SADQS7
SADQS7#
SACLK0
SACLK0#
SACLK1
SACLK1#
SACLK2
SACLK2#
SACLK3
SACLK3#
SACLK4
SACLK4#
SACLK5
SACLK5#
MCH_SRCOMP0
MCH_SRCOMP1
SMOCDCOMP0
SMOCDCOMP1
7
DATA_A0
AP3
SADQ0
DATA_A1
AP2
DATA_A3
DATA_A2
AU3
SADQ1
SADQ2
SBDQ0
AL6
DATA_B0
DATA_B1
DATA_A4
AV4
SADQ3
SBDQ1
AL8
DATA_B2
DATA_A5
AN1
SADQ4
SBDQ2
AP8
DATA_B3
DATA_A6
AP4
SADQ5
SBDQ3
AP9
DATA_B4
DATA_A7
AU5
SADQ6
SBDQ4
AJ11
DATA_B5
DATA_A8
AU2
SADQ7
SBDQ5
AL9
DATA_B6
DATA_A9
AW3
SADQ8
SBDQ6
AM10
DATA_B7
DATA_A10
AY3
BA7
SADQ9
SBDQ7
AP6
AU7
DATA_B8
DATA_A11
DATA_A12
BB7
AV1
SADQ10
SADQ11
SBDQ8
SBDQ9
AV6
AV12
DATA_B9
DATA_B10
DATA_A14
DATA_A13
AW4
BC6
SADQ12
SADQ13
SBDQ10
SBDQ11
AR5
AM11
DATA_B11
DATA_B12
DATA_A16
DATA_A15
AY7
AW12
SADQ14
SADQ15
SBDQ12
SBDQ13
AR7
AR12
DATA_B14
DATA_B13
DATA_A18
DATA_A17
AY10
BA12
SADQ16
SADQ17
SADQ18
SBDQ14
SBDQ15
SBDQ16
AR10
AM15
DATA_B15
DATA_B16
6
DATA_A20
DATA_A19
BB12
SADQ19
SBDQ17
AM13
DATA_B17
DATA_B18
6
DATA_A21
BA9
BB9
SADQ20
SBDQ18
AV15
AM17
DATA_B19
DATA_A22
DATA_A23
BC11
AY12
SADQ21
SADQ22
SBDQ19
SBDQ20
AN12
AR13
DATA_B21
DATA_B20
DATA_A24
DATA_A25
AM20
AM18
SADQ23
SADQ24
SBDQ21
SBDQ22
AT15
AP15
DATA_B22
DATA_B23
DATA_A26
DATA_A27
AV20
AM21
SADQ25
SADQ26
SBDQ23
SBDQ24
AM24
AM23
DATA_B24
DATA_B25
DATA_A29
DATA_A28
AP17
AR17
SADQ27
SADQ28
SBDQ25
SBDQ26
AV24
AM26
DATA_B27
DATA_B26
DATA_A31
DATA_A30
AP20
AT20
SADQ29
SADQ30
SBDQ27
SBDQ28
AP21
AR21
DATA_B28
DATA_B29
DATA_A32
DATA_A33
AP32
AV34
SADQ31
SADQ32
SBDQ29
SBDQ30
AT24
AP24
DATA_B31
DATA_B30
DATA_A34
DATA_A35
AV38
AU39
SADQ33
SADQ34
SBDQ31
SBDQ32
AU27
AN29
DATA_B32
DATA_B33
DATA_A37
DATA_A36
AV32
AT32
SADQ35
SADQ36
SBDQ33
SBDQ34
AR31
AM31
DATA_B34
DATA_B35
DATA_A38
DATA_A39
AR34
AU37
SADQ37
SADQ38
SBDQ35
SBDQ36
AP27
AR27
DATA_B36
DATA_B37
DATA_A41
DATA_A40
AR41
AR42
SADQ39
SADQ40
SBDQ37
SBDQ38
AP31
AU31
DATA_B39
DATA_B38
5
SCKE_A[0..1]19,21
DATA_A43
DATA_A42
AN43
AM40
SADQ41
SADQ42
SBDQ39
SBDQ40
AP35
AP37
DATA_B40
DATA_B41
5
DATA_A45
DATA_A44
AU41
AU42
SADQ43
SADQ44
SBDQ41
SBDQ42
AL35
AN32
DATA_B42
DATA_B43
DATA_A47
DATA_A46
AP41
AN40
SADQ45
SADQ46
SBDQ43
SBDQ44
AR35
AU38
DATA_B45
DATA_B44
DATA_A49
DATA_A48
AL41
AL42
SADQ47
SADQ48
SBDQ45
SBDQ46
AM38
AM34
DATA_B46
DATA_B47
DATA_A51
DATA_A50
AF39
AE40
SADQ49
SADQ50
SBDQ47
SBDQ48
AJ34
AL34
DATA_B48
DATA_B49
DATA_A53
DATA_A52
AM41
AM42
SADQ51
SADQ52
SBDQ49
SBDQ50
AF32
AF34
DATA_B51
DATA_B50
SCKE_B[0..1]20,21
DATA_A54
DATA_A55
AF41
AF42
SADQ53
SADQ54
SBDQ51
SBDQ52
AJ32
AL31
DATA_B52
DATA_B53
DATA_A56
DATA_A57
AD40
AD43
SADQ55
SADQ56
SBDQ53
SBDQ54
AD32
AG35
DATA_B55
DATA_B54
DQM_A[0..7]19
DATA_A58
DATA_A59
AA39
AA40
SADQ57
SADQ58
SADQ59
SBDQ55
SBDQ56
SBDQ57
AC32
AD34
DATA_B57
DATA_B56
DQM_B[0..7]20
DATA_A61
DATA_A60
AE42
SADQ60
SBDQ58
Y32
DATA_B58
DATA_B59
DATA_A62
AE41
AB41
SADQ61
SBDQ59
AF35
AA32
DATA_B60
4
DATA_A63
AB42
SADQ62
SADQ63
SBDQ60
SBDQ61
AF37
AC33
DATA_B61
DATA_B62
4
SCKE_A1
SCKE_A0
BB25
AY25
SACKE0
SBDQ62
SBDQ63
AC35
DATA_B63
BC24
BA25
SACKE1
SACKE2
SACKE3
SBCKE0
SBCKE1
BA14
AY16
SCKE_B0
SCKE_B1
SBCKE2
BA13
DQM_A1
DQM_A0
AR3
SADM0
SBCKE3
BB13
DQM_B7
DQM_A2
AY2
SADM1
SBDM7
AD39
DQM_B6
BB10
SADM2
SBDM6
AJ39
DQM_A3
AP18
SADM3
SBDM5
AR38
DQM_B5
DQM_A4
AT34
SADM4
SBDM4
AR29
DQM_B4
DQM_A5
AP39
SADM5
SBDM3
AP23
DQM_B3
DQM_A6
AG40
AP13
DQM_B2
DQM_A7
AC40
SADM7
SADM6
SBDM1
SBDM2
AW7
DQM_B0
DQM_B1
SBCS0#
SBCS1#
SBCS2#
SBCS3#
SBRAS#
SBCAS#
SBWE#
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
SBMA13
SBODT0
SBODT1
SBODT2
SBODT3
SBBA0
SBBA1
SBBA2
SBDQS0
SBDQS0#
SBDQS1
SBDQS1#
SBDQS2
SBDQS2#
SBDQS3
SBDQS3#
SBDQS4
SBDQS4#
SBDQS5
SBDQS5#
SBDQS6
SBDQS6#
SBDQS7
SBDQS7#
SBCLK0
SBCLK0#
SBCLK1
SBCLK1#
SBCLK2
SBCLK2#
SBCLK3
SBCLK3#
SBCLK4
SBCLK4#
SBCLK5
SBCLK5#
SMVREF1
SMVREF0
SBDM0
AL11
BA40
AW41
BA41
AW40
BA23
AY24
BB23
BB22
BB21
BA21
AY21
BC20
AY19
AY20
BA18
BA19
BB18
BA22
BB17
BA17
AW42
AY42
AV40
AV43
AU40
AW23
AY23
AY17
AM8
AM6
AV7
AR9
AV13
AT13
AU23
AR23
AT29
AV29
AP36
AM35
AG34
AG32
AD36
AD38
AM29
AM27
AV9
AW9
AL38
AL36
AP26
AR26
AU10
AT10
AJ38
AJ36
AM2
AM4
3
SCS_B#0
SCS_B#1
RAS_B#
CAS_B#
WE_B#
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
ODT_B0
ODT_B1
SBS_B0
SBS_B2
DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7
P_DDR_B
N_DDR_B
MCH_VREF_B
MCH_VREF_A
3
SCS_B#[0..1] 20,21
RAS_B# 20,21
CAS_B# 20,21
WE_B# 20,21
MAA_B[0..13] 20,21
ODT_B[0..1] 20,21
SBS_B[0..2] 20,21
DQS_B0 20
DQS_B#0 20
DQS_B1 20
DQS_B#1 20
DQS_B2 20
DQS_B#2 20
DQS_B3 20
DQS_B#3 20
DQS_B4 20
DQS_B#4 20
DQS_B5 20
DQS_B#5 20
DQS_B6 20
DQS_B#6 20
DQS_B7 20
DQS_B#7 20
P_DDR_B 26
N_DDR_B 26
C370
C370
C0.1U25Y
C0.1U25Y
VCC_DDR
PLACE CLOSE TO MCH
2
MCH_VREF_A
PLACE 0.1UF CAP CLOSE TO MCH
R335 1KR1%-1R335 1KR1%-1
R336
R336
1KR1%-1
1KR1%-1
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
2
C371
C371
C0.1U25Y
C0.1U25Y
CP18
CP18
X_COPPER
X_COPPER
R334 X_0R-1R334 X_0R-1
MCH_VREF_A
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Intel Lakeport - Memory Signals
Intel Lakeport - Memory Signals
Intel Lakeport - Memory Signals
MS-7236
MS-7236
MS-7236
1
MCH_VREF_B
936Thursday, June 01, 2006
936Thursday, June 01, 2006
936Thursday, June 01, 2006
1
of
of
of
0A
0A
0A
8
EXP_A_RXP_022
EXP_A_RXN_022
EXP_A_RXP_122
EXP_A_RXN_122
EXP_A_RXP_222
D D
C C
B B
V_2P5_MCH
EXP_A_RXN_222
EXP_A_RXP_322
EXP_A_RXN_322
EXP_A_RXP_422
EXP_A_RXN_422
EXP_A_RXP_522
EXP_A_RXN_522
EXP_A_RXP_622
EXP_A_RXN_622
EXP_A_RXP_722
EXP_A_RXN_722
EXP_A_RXP_822
EXP_A_RXN_822
EXP_A_RXP_922
EXP_A_RXN_922
EXP_A_RXP_1022
EXP_A_RXN_1022
EXP_A_RXP_1122
EXP_A_RXN_1122
EXP_A_RXP_1222
EXP_A_RXN_1222
EXP_A_RXP_1322
EXP_A_RXN_1322
EXP_A_RXP_1422
EXP_A_RXN_1422
EXP_A_RXP_1522
EXP_A_RXN_1522
EXP_EN_HDR22
DMI_ITP_MRP_012
DMI_ITN_MRN_012
DMI_ITP_MRP_112
DMI_ITN_MRN_112
DMI_ITP_MRP_212
DMI_ITN_MRN_212
DMI_ITP_MRP_312
DMI_ITN_MRN_312
CK_PE_100M_MCH15
CK_PE_100M_MCH#15
H_FSBSEL05,6,15
H_FSBSEL15,6,15
H_FSBSEL25,6,15
CP11
CP11
X_COPPER
X_COPPER
L7
L7
X_180L1500m_90
X_180L1500m_90
I = 70mA
.CD220U10EL7
.CD220U10EL7
CP12
CP12
X_COPPER
X_COPPER
L8
V_1P5_CORE V_1P5_CORE V_1P5_CORE
A A
V_1P5_CORE V_1P5_CORE
L8
CP14
CP14
X_COPPER
X_COPPER
L11
L11
X_10U125m_0805-1
X_10U125m_0805-1
8
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXP_7
EXP_A_RXN_7
EXP_A_RXP_8
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
EXP_EN_HDR
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
R313 10KR-1R313 10KR-1
R314 10KR-1R314 10KR-1
R315 10KR-1R315 10KR-1
R317
R317
X_1KR1%-1
X_1KR1%-1
VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
V_2P5_MCH
V_2P5_DAC_FILTERED
+
+
C356
C356
C0.1U25Y
C0.1U25Y
C355
C355
X_600L200m_500-1
X_600L200m_500-1
SEL0
SEL1
SEL2
NOA_6
C357
C357
C0.01U50Y5
C0.01U50Y5
VCCA_DPLLB
+
+
C363
C363
.CD220U10EL7
.CD220U10EL7
7
U21C
U21C
G12
EXPARXP0
F12
EXPARXN0
D11
EXPARXP1
D12
EXPARXN1
J13
EXPARXP2
H13
EXPARXN2
E10
EXPARXP3
F10
EXPARXN3
J9
EXPARXP4
H10
EXPARXN4
F7
EXPARXP5
F9
EXPARXN5
C4
EXPARXP6
D3
EXPARXN6
G6
EXPARXP7
J6
EXPARXN7
K9
EXPARXP8
K8
EXPARXN8
F4
EXPARXP9
G4
EXPARXN9
M6
EXPARXP10
M7
EXPARXN10
K2
EXPARXP11
L1
EXPARXN11
U11
EXPARXP12
U10
EXPARXN12
R8
EXPARXP13
R7
EXPARXN13
P4
EXPARXP14
N3
EXPARXN14
Y10
EXPARXP15
Y11
EXPARXN15
F20
EXP_EN
Y7
DMI RXP0
Y8
DMI RXN0
AA9
DMI RXP1
AA10
DMI RXN1
AA6
DMI RXP2
AA7
DMI RXN2
AC9
DMI RXP3
AC8
DMI RXN3
B14
GCLKP
B16
GCLKN
F15
SDVOCTRLDATA
E15
SDVOCTRLCLK
F21
BSEL0
H21
BSEL1
L20
BSEL2
AK17
RSV_TP[0]
AL17
RSV_TP[1]
K21
EXP_SLR
AK23
RSV_TP[2]
AK18
RSV_TP[3]
L21
RSV_TP[4]
L18
RSV_TP[5]
N21
RSV_TP[6]
C21
VCCAHPLL
B20
VCCAMPLL
C19
VCCADPLLA
B19
VCCADPLLB
B17
VCCA_EXPPLL
D19
VCC2
C18
VCCADAC
B18
VCCADAC
A18
VSSA_DAC
(INTEL-QG82945G-A2-LF)
(INTEL-QG82945G-A2-LF)
V_FSB_VTT
I = 60mA
C358
C358
C1U10Y
C1U10Y
I = 55mA
C364
C364
C0.1U25Y
C0.1U25Y
7
AA24
VCC
AA26
VCC
VTT
A24
AB17
VCC
VTT
B23
AB18
VCC
VTT
B24
AB19
VCC
VTT
B25
AB20
VCC
VTT
B26
AB24
VCC
VTT
C23
AB25
VCC
VTT
C25
AB26
AB27
AC15
AC17
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
D24
D25
C26
D23
X_10U125m_0805-1
X_10U125m_0805-1
X_10U125m_0805-1
X_10U125m_0805-1
AC18
AC20
AC24
VCC
VCC
VTT
VTT
E23
E24
E26
CP13
CP13
X_COPPER
X_COPPER
L9
L9
CP15
CP15
X_COPPER
X_COPPER
L12
L12
VCC
VTT
AC26
VCC
VTT
E27
AC27
VCC
VTT
F23
AD15
VCC
VTT
F27
6
AD17
VCC
VTT
G23
6
AD19
H23
AD21
VCC
VTT
J23
VCC
VTT
AD23
K23
VCC
VTT
AD25
L23
+
+
AE20
AD26
AE17
AE18
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
P23
N23
M23
V_1P5_CORE
VCCA_DPLLAVCCA_MPLL
c359
c359
.CD220U10EL7
.CD220U10EL7
VCCA_HPLL
C365
C365
C0.1U25Y
C0.1U25Y
AE22
AE24
AE26
VCC
VCC
VCC
AF21
I = 55mA
I = 45mA
AE27
VCC
VCC
AF23
AF15
AF17
VCC
VCC
VCC
VCC
AF25
AF26
C360
C360
C0.1U25Y
C0.1U25Y
VCC
VCC
AF19
AF27
VCC
VCC
VCC
AF29
AV18
AY43
VCCSM
VCC
AG15
AG17
AV21
VCCSM
VCCSM
VCC
VCC
AG18
VCC_DDRV_1P5_CORE
AV23
AV31
AV42
VCCSM
VCCSM
VCCSM
VCC
VCC
VCC
AG19
AG20
AG21
V_1P5_CORE
5
AW13
AG22
5
AW15
VCCSM
VCCSM
VCC
VCC
AG23
AW20
AW21
VCCSM
VCC
AJ15
AG24
AW24
VCCSM
VCC
AJ17
AW29
AW34
AW35
AW31
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCC
VCC
VCC
AJ18
AJ20
L10 1U500m_0805L10 1U500m_0805
L13 X_0R1206-LFL13 X_0R1206-LF
AY41
BB16
BB20
BB24
VCCSM
VCCSM
VCCSM
VCC_EXP
AE4
AE3
CP16
CP16
X_COPPER
X_COPPER
CP17
CP17
X_COPPER
X_COPPER
BB28
BB33
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
AE2
AD12
BB38
BB42
BC13
VCCSM
VCCSM
VCC_EXP
VCC_EXP
AD8
AD6
AD10
VCCSM
VCC_EXP
+
+
4
BC26
BC31
BC35
BC18
BC22
BC40
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
AD5
AD4
AD2
AD1
AC6
AC13
CP27
CP27
X_COPPER
X_COPPER
C368
C368
X_.CD220U10EL7
X_.CD220U10EL7
4
U6
R13
R11
R10
R5
N12
N11
N10
N9
N7
N5
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXPV9VCC_EXP
VCC_EXPV7VCC_EXPV6VCC_EXP
V5
Y13
V13
V10
AA5
AC5
AA13
VCCA_GPLL
C361
C361
C10U10Y0805
C10U10Y0805
I = 1.5A
V_1P5_PCIEXPRESS
C366
C366
C369 C10U10Y0805C369 C10U10Y0805
C10U10Y0805
C10U10Y0805
V_1P5_PCIEXPRESS
U13
U8
U7
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
EXPATXP0
EXPATXN0
EXPATXP1
EXPATXN1
EXPATXP2
EXPATXN2
EXPATXP3
EXPATXN3
EXPATXP4
EXPATXN4
EXPATXP5
EXPATXN5
EXPATXP6
EXPATXN6
EXPATXP7
EXPATXN7
EXPATXP8
EXPATXN8
EXPATXP9
EXPATXN9
EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12
EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15
DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3
EXP_COMPO
EXP_COMPI
HSYNC
VSYNC
RED
GREEN
BLUE
RED#
GREENB
BLUE#
DDC_DATA
DDC_CLK
DREFCLKINP
DREFCLKINN
IREF
EXTTS#
XORTEST
ALLZTEST
V_1P5_PCIEXPRESS
I = 45mA
C362
C362
C1U10Y
C1U10Y
3
C367
C367
C0.1U25Y
C0.1U25Y
3
D14
C13
A13
B12
A11
B10
C10
C9
A9
B7
D7
D6
A6
B5
E2
F1
G2
J1
J3
K4
L4
M4
M2
N1
P2
T1
T4
U4
U2
V1
V3
W4
W2
Y1
AA2
AB1
Y4
AA4
AB3
AC4
AC12
AC11
D17
C17
F17
K17
H18
G17
J17
J18
N18
N20
J15
H15
A20
J20
H20
K18
EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5
EXP_A_TXP_6
EXP_A_TXN_6
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
GRCOMP
R372 10KR-1R372 10KR-1
R373 10KR-1R373 10KR-1
DACREFSET
EXTTS
C354
C354
X_C10P16N
X_C10P16N
R318 0R-1R318 0R-1
V_1P5_CORE
R370 0R-1R370 0R-1
R320 10KR-1R320 10KR-1
TP1TP1
2
EXP_A_TXP_0 22
EXP_A_TXN_0 22
EXP_A_TXP_1 22
EXP_A_TXN_1 22
EXP_A_TXP_2 22
EXP_A_TXN_2 22
EXP_A_TXP_3 22
EXP_A_TXN_3 22
EXP_A_TXP_4 22
EXP_A_TXN_4 22
EXP_A_TXP_5 22
EXP_A_TXN_5 22
EXP_A_TXP_6 22
EXP_A_TXN_6 22
EXP_A_TXP_7 22
EXP_A_TXN_7 22
EXP_A_TXP_8 22
EXP_A_TXN_8 22
EXP_A_TXP_9 22
EXP_A_TXN_9 22
EXP_A_TXP_10 22
EXP_A_TXN_10 22
EXP_A_TXP_11 22
EXP_A_TXN_11 22
EXP_A_TXP_12 22
EXP_A_TXN_12 22
EXP_A_TXP_13 22
EXP_A_TXN_13 22
EXP_A_TXP_14 22
EXP_A_TXN_14 22
EXP_A_TXP_15 22
EXP_A_TXN_15 22
DMI_MTP_IRP_0 12
DMI_MTN_IRN_0 12
DMI_MTP_IRP_1 12
DMI_MTN_IRN_1 12
DMI_MTP_IRP_2 12
DMI_MTN_IRN_2 12
DMI_MTP_IRP_3 12
DMI_MTN_IRN_3 12
V_1P5_PCIEXPRESS
R308
R308
24.9R1%-1
24.9R1%-1
V_1P5_CORE
C339
C339
C340
C340
VCC_DDR
C341 C10U10Y0805C341 C10U10Y0805
C342 C10U10Y0805C342 C10U10Y0805
C343 C0.1U25YC343 C0.1U25Y
VCC_DDR
C344 C10U10Y0805C344 C10U10Y0805
C345 C0.1U25YC345 C0.1U25Y
C346 C10U10Y0805C346 C10U10Y0805
MCH MEMORY DECOUPLING
V_FSB_VTT
C347
C347
C0.1U25Y
C0.1U25Y
1
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C348
C348
C0.1U25Y
C0.1U25Y
FSB GENERIC DECOUPLING
V_2P5_MCH
R316 X_0RR316 X_0R
V_2P5_MCH
V_2P5_MCH
V_2P5_MCH
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-STAR INt'L CO., LTD.
MSI
Intel Lakeport PCI-Express & RBG Signals
Intel Lakeport PCI-Express & RBG Signals
Intel Lakeport PCI-Express & RBG Signals
MS-7236
MS-7236
MS-7236
2
10 36Thursday, June 01, 2006
10 36Thursday, June 01, 2006
10 36Thursday, June 01, 2006
1
of
of
of
C349
C349
C0.1U25Y
C0.1U25Y
0A
0A
0A