MSI MS-7222 Schematics 10

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MSI

MS-7222 Ver:10

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CPU:

Intel Prescott LGA775 -Mainstream CPU

System Chipset:

North Bridge : VI A P 4M 800 Ver:Pro
South Bridge : VIA VT8237R Plus

On Board Chipset:

LPC Super I/O -- W83627EHF
LAN --- RTL 8100C (10/100) / 8110SB (Giga)
AC'97 Codec --Realtek ALC655
BIOS --LPC FLASH ROM
1394--VIA 6307/6308

3 3

CLOCK Chip :

CLOCK Generator --

ICS950952

Main Memory:

DDR * 2 (Max 2GB)

Expansion Slots:

PCI 2.3 SLOT * 3

PWM:

VRM10.1 Intersil 6566 3Phase(2005A)

2 2

CHIPSET P4M800_CE + VT8237_PLUS

TITLE

COVER SHEET

BLOCK DIAGRAM
PWR And CLOCK Map
GPIO/MEMORY/PCI/H W STRPPING

PROCESSOR ( Intel LGA775)
NORTH BRIDGE P4M800_Pro
DIMMII 1&2
DIMM1&2 Terminations
AGP SLOT
VGA Connector

Clock Generator ICS950952

SOUTH BRIDGE (VT8237R Plus)
PCI Slot 1 & 2 & 3
Realtek 8100C/8110SB

Super I/O & FAN 83627EHF-D
AC97 Realtek ALC655
IDE Connectors , KB/MS

USB Connectors

COM / Parallel Port

MS7 ACPI Controller
VRD 11 - Intersil

ATX & F_Panel & BIOS
PCB Components & EMI

SHEET

8,9,10,11

17,18,19

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MICRO-START INT'L CO.,LTD.

COVER SHEET

MS-7222 10

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VRM 10.1

Intersil 6566

3Phase

Block Diagram

Intel Prescott Processor-LGA775

FSB

mainstream
TDP=84W

Iccmax=78A
Icctdc=68A

1

AGP 1.5V
Connector

IDE Primary

IDE Secondary

A A

USB Port 0

USB Port 1

USB Port 2

2X/4X/8X

UltraDMA 33/66/ 100

USB

P4M800_Pro

VCORE= +1.5VNB
VDIMM= +1.8VDIMM
VDDQ= +1.5VAGP
VLINK= +2.5V

VT8237_PLUS

VCC25= +2.5V
VCC33= +3.3V

V-Link/8bits/S533M

USB Port 3

USB Port 4

USB Port 5

LPC Bus

64bit DDR

PCI

PCI

LPC SIO

2 DDR II

DIMM
Modules

PCI CNTRL

PCI ADDR/DATA

LAN

Realtek

8100C/8110SB

1394

VIA

6307

PCI Slot 1

PCI Slot 2

PCI Slot 3

Winbond

USB Port 6

83627EHF

USB Port 7

AC'97 Codec

AC'97 Link

SATA prot1 and
port2

LPC FLASH
ROM

KEYBOARD

MOUSE

FDD

1

Parallel

Serial

X2

Title

BLOCK DIAGRAM

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MS-7222 10

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P4M800 PLATFORM CLOCK GENERATOR MAP

3.3V 5V 5VSB 12V

P4M800_CE PLATFORM POWER DELIVERY MAP

PROCESSOR VCCP 1.2V~1.425V

D D

VRM

PROCESSOR 1.2V

Intel LGA775 Processor

CPU HOST
CLK

GUICK

DCLKO
DCLKI

NB
P4M800_CE

GCLK_NB 66MHz

CLOCK GENERATOR

MEM CLK
0~5/CLK#0~5

C C

14.318MHZ

33MHz

48MHZ

2 DDR DIMM

SB14MHz

APIC

USB

Modules

VT8237R_PLUS

VCLK

1.2V VREG

2.5V VREG

1.5V VREG

3VSB VREG

DDR 2.5V
VREG

2.5V VREG

VTT 1.25V
VREG

SPCLK

2.5VSB

FWH_CLK

PCI CLK 1~3

FWH

PCI Slot 1~3

VREG

Realtek 8100C/8110SB

B B

25MHZ from Crystal

AGP SLOT 1.5V

NORTH BRIDGE VCCP
NORTH BRIDGE VCC_AGP
NORTH BRIDGE +2.5V

NORTH BRIDGE SYSEM MEMORY
VCC_DDR

3A

DDR DIMM1 / DIMM2 / DIMM3 2.5V
DDR VTT 1.25V

550mA

SOUTH BRIDGE +2.5V
SOUTH BRIDGE VCC3

Vlink=70mA

150mA

SOUTH BRIDGE RESUME 2.5V_SB
SOUTH BRIDGE RESUME VCC3_SB
SOUTH BRIDGE RTC 3.3V

LAN VCC3_SB

FWH 3.3V

10mA

120mA

SIOPCLK

SIO48MHZ

LPC SIO
Winbond
83627EHF-E

LPC SUPER I/O 3.3V
LPC SUPER I/O VCC5

AC97XIN

AGP CLK

ALC655

AGP SLOT

AC97 VDD5
VREG

CK-409 3.3V

AC97 VDD5

+12V : 0.1U 25V X 5

A A

+12V_MOS: 4.7U 35V X 1
1U 16V X 2
1000U 16V X 4

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PWR And CLOCK Map

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VT8237R_PLUS GPIO Function Define

PIN NAME Function define

GPO0 (VDDS)

GPO1(VDDS)
GPO2/SUSA#

(VDDS)
GPO3/SUSST#(VDDS)

GPO4/SUSCLK(VDDS)

GPO5/CPUSTP#

GPO6/PCISTP#

GPO7/GNT5

GPO8/GPI8/VGATE

*

GPO9/GPI9/UDPWREN

*

GPO10/GPI10/PICD0

*

GPO11/GPI11/PICD1

*

*

GPO12/GPI12/INTE#

*

GPO13/GPI13/INTF#

*

GPO14/GPI14/INTG#

*

GPO15/GPI15/INTH#
GPO20/GPI20

/ACSDIN2/PCS0#
GPO21/GPI21/ACSDIN3

/PCS1#/SLPBTN#

A A

GPO22/GPI22/GHI#

GPO23/GPI23/DPSLP

/GPIOAGPO24/GPI24

GPO25/GPI25
GPO26/GPI26/SMBDT2

(VDDS)
GPO27/GPI27/SMBCK2

(VDDS)

GPO28/GPI28/VIDSEL

GPO29/GPI29/VRDSLP

GPO30/GPI30

GPO31/GPI31

/GPIOB

/GPIOC

/GPIOD

Default
Function

GPO0

GPO1 4.7K ohm Pull up to VCC3_SB

SUSA#

SUSST#

SUSCLK

CPUSTP#

PCISTP#

GPO7

GPI8

UDPWREN

GPI10

GPI11

GPI12

GPI13

GPI14

GPI15
GPI20/ACSDIN2

GPI21/ACSDIN3

GPI22

GPI23

GPI24

GPI25

SMBDT2

SMBCK2
GPO28

/VIDSEL

GPO29

/VRDSLP

GPI30

GPI31

4.7K ohm Pull up to VCC3_SB

4.7K ohm Pull up to VCC3_SB

4.7K ohm Pull up to VCC3_SB

4.7K ohm Pull up to VCC3_SB

4.7K ohm Pull up to VCC3

4.7K ohm Pull up to VCC3

ohm Pull up to VCC3

8.2K

4.7K ohm Pull up to VCC3

NC

1K ohm Pull up to VCC3

1K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

4.7K ohm Pull down

4.7K ohm Pull down

4.7K ohm Pull up to VCC3

4.7K ohm Pull up to VCC3

BSEL1

4.7K ohm Pull down

ohm Pull up to VCC3_SB

2.7K

ohm Pull up to VCC3_SB

2.7K

SATA_LED

4.7K ohm Pull down

BSEL0

4.7K ohm Pull down

PIN NAME Function define
GPI0

(VBAT)
GPI1

(VSUS3)
GPI2/EXTSMI#

(VSUS3)
GPI3/RING#

(VSUS3)
GPI4/LID#

(VSUS3)
GPI5/BATLOW# (VDDS)

GPI6/AGPBZ

GPI7/REQ5

GPI8/VGATE

*

GPI9/UDPWREN

*

GPI10/PICD0

*

GPI11/PICD1

*

GPI12/INTE#

*

GPI13/INTF#

*

GPI14/INTG#

*

GPI15/INTH# GPI15

*

GPI16/INTRUDER#
(VBAT)

GPI17/CPUMISS

GPI18/AOLGP1/THRM#

GPI19/APICCLK

PCI Config.

DEVICE

PCI Slot 1 PCIREQ#1 AD19 PCI_CLK1

PCI Slot 2 PCIREQ#2 AD20

PCI Slot 3

LAN 8110SB

Default
Function

GPI0

GPI1

EXTSMI#

RING#

LID#

BATLOW#

AGPBZ

GPI7

GPI8

UDPWREN

GPI10

GPI11

GPI12

GPI13

GPI14

INTRUDER#

CPUMISS

AOLGP1

APICCLK

PIRQ#B
PIRQ#C
PIRQ#D
PIRQ#A
PIRQ#C
PIRQ#D
PIRQ#A
PIRQ#B

PIRQ#D
PIRQ#A
PIRQ#B
PIRQ#C

PIRQ#E

ohm Pull up to VBAT

1M

ATADET0=>Detect IDE1 ATA100/66

4.7K ohm Pull up to VCC3_SB

4.7K ohm Pull up to VCC3_SB

RING#

ATADET1=>Detect IDE2 ATA100/66

4.7K ohm Pull up to VCC3_SB

4.7K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

4.7K ohm Pull up to VCC3

NC

1K ohm Pull up to VCC3

1K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

1M ohm Pull up to VBAT

4.7K ohm Pull up to VCC3_SB

4.7K ohm Pull up to

APICCLK

IDSEL

VCC3_SB

CLOCKREQ#/GNT# CLK GEN PIN OUTMCP1 INT Pin

PCIGNT#1

PCI_CLK2

PCIGNT#2

PCIRE Q #3 AD21 18

PCI_CLK3

PCIGNT#3

PCIREQ#0

AD17 LAN_CLK

PCIGNT#0

USB

Rear

Front

Port DATA +/-

I1394_USB1

LAN_USB1

JUSB1

JUSB2

USB1­USB1+
USB0­USB0+

USB2­USB2+
USB3­USB3+

USB4­USB4+
USB6­USB6+

USB5­USB5+
USB7­USB7+

PCI RESET DEVICE

Signals Target
PCIRST#1
PCIRST#2
HD_RST#

PCI slot 1-3
NB , Super I/O , LPC, LAN
Primary, Sco n dary IDE

DDR DIMM Config.

DEVICE

DIMM 1

DIMM 2

14

15

11

1010000B

1010001B

CLOCKADDRESS

DCLKA0/MDCLKA#0
DCLKA1/MDCLKA#1
DCLKA2/MDCLKA#2
DCLKA3/MDCLKA#3
DCLKA4/MDCLKA#4
DCLKA5/MDCLKA#5

OC#

OC#1

( OC#0~3 )

OC#4

( OC#4~7 )

Title

GPIO/MEMORY/PCI/HW STRPPING

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CPU SIGNAL BLOCK

H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK

HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54

G11

AD3

AD1
AC1

AG1

AH2

G10

G29
G30

G23

HA#[3..33][8]

A8

D19
C20

F2
AB2
AB3

R3

M3

P3

H4

B2

C1

E3

D2
C3
C2
D4

E4

G8
G7

AF1

AE1
AL1
AK1

M2
AE8
AL2

N2

P2
K3
L2

N5
AE6

C9
D16

A20

Y1
V2

AA2

H30

N1

B22
A22
A19
B19
B21
C21
B18
A17
B16
C18

U5A

DBI0#
DBI1#
DBI2#
DBI3#

EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#

DBSY#
DRDY#
TRDY#

ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#

TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#

RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5

BOOTSELECT
LL_ID0
LL_ID1

BSEL0
BSEL1
BSEL2

PWRGOOD
RESET#
D63#

D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#

B15

HD#53

6

D53#

HD#52

HA#19

HA#20

HA#21

HA#22

A23#

D36#

HD#35

AD6

G18

AA4

A22#

D35#

E16

HD#34

A21#

A20#Y4A19#Y6A18#W6A17#

D34#

D33#

E15

G16

HD#32

HD#33

5

HA#18

D32#

HD#31

HA#16

HA#17

AB6

D31#

D30#

F15

G15

G14

HD#30

HD#29

HA#14

HA#13

HA#15

A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#

D29#

D28#

D27#

F14

E13

G13

HD#28

HD#26

HD#27

HA#25

HA#30

HA#31

HA#26

HA#29

HA#23

HA#27

A31#

D44#

HD#43

HA#24

AG4

AG6

AF4

AF5

AB4

AC5

AB5

AA5

A30#

A29#

A28#

A27#

A26#

A25#

A24#

D43#

D42#

D41#

D40#

D39#

D38#

D37#

F21

F20

F18

F17

E21

E19

E18

G17

HD#39

HD#42

HD#41 HA#28

HD#38

HD#40

HD#36

HD#37

HA#32

HA#33

AJ6

AJ5

AH5

AH4

AG5

A35#

A34#

A33#

A32#

D52#

D51#

D50#

D49#

D48#

D47#

D46#

D45#

A14

C14

E22

C15

D17

D20

D22

G22

G21

HD#49

HD#48

HD#47

HD#44

HD#50

HD#51

HD#45

HD#46

HA#12

D26#

D13

HD#25

HA#11

D25#

HD#24

HA#10

U6

D24#

F12

F11

HD#23

HA#6

HA#8

HA#7

HA#9

A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#

D23#

D22#

D21#

D20#D7D19#E9D18#F9D17#F8D16#G9D15#

E10

D10

HD#20

HD#21

HD#19

HD#22

HA#4

HA#5

HA#3

AN5

AJ3

AK3

AN6

AN3

AN4

L5

AC2

DBR#

RSVD

RSVD

ITP_CLK1

VSS_SENSE

VCC_SENSE

D14#

D13#

D12#D8D11#

D10#

D9#

D8#

D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#

B12

B10

A11

D11

HD#17

HD#16

HD#18

HD#15

A10

C12

C11

HD#10

HD#12

HD#8

HD#9

HD#13

HD#14

HD#7

HD#11

HD#6

4

D D

HDBI#[0..3][8]

TP15

FERR#[6,19]

STPCLK#[19]

HDBI#0
HDBI#1
HDBI#2
HDBI#3

-EDRDY
IERR#

IERR#[6]

HINIT#[19]

HDBSY#[8]

HDRDY#[8]

HTRDY#[8]

HADS#[8]

HLOCK#[8]

RN6B
RN5A
RN6A
RN5C
RN6D

THERMTRIP#[6,29]
CPUMISS[18]

CPU_TMPA[22]

VTIN_GND[22]

PROCHOT#[6]

SMI#[19]

HBNR#[8]

HIT#[8]
HITM#[8]
HBPRI#[8]

HDEFER#[8]

3 4
1 2
1 2
5 6
7 8

IGNNE#[19]

8P4R-51R-LF
8P4R-51R-LF
8P4R-51R-LF
8P4R-51R-LF
8P4R-51R-LF

C C

VTT_OUT_RIGHT

SLP#[19]

VTT_OUT_RIGHT

C37 X_C0.1U25Y

VTT_OUT_RIGHT

B B

don't support willameter

R64

X_1KR

H_BSL0[6,16]
H_BSL1[6,16]
H_BSL2[6]

CPU_BOOT

CPU_GD[6,27]

CPURST#[6,8]

HD#[0..63][8]

A A

VCCP

R46
X_4.7KR

B

B

THERM# PROCHOT#

THERM#[18,22]

8

C E

Q6 X_N-SST3904_SOT23

7

TP4

ITP_CLK0

HD#5

VID5

AM5

AL4

AM7

VID6#

VID7#

VID_SELECT

GTLREF_SEL

HD#3

HD#2

HD#4

C36
C22U10Y1206

VID0

VID3

VID2

VID1

VID4

AK4

AL6

AM3

AL5

AM2

VID5#

VID4#

VID3#

VID2#

VID1#

VID0#

GTLREF0
GTLREF1

BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#

PCREQ#

REQ4#
REQ3#
REQ2#
REQ1#
REQ0#

TESTHI12
TESTHI11
TESTHI10

TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0

RSVD
RSVD

BCLK1#
BCLK0#

RS2#
RS1#
RS0#

AP1#
AP0#

BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0

DP3#

DP2#

DP1#

DP0#

ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

LINT1/NMI

LINT0/INTR

ZIF-SOCK775-15u-in

B4

HD#0

HD#1

VSS_VRM_SENSE [28]

VID[0..5] [28]

R37 _62R0402

AN7

CPU_GTLREF0

H1

CPU_GTLREF1

H2

GTLREF_SEL

H29

H_BPM#5

AG3

H_BPM#4

AF2

H_BPM#3

AG2

H_BPM#2

AD2

H_BPM#1

AJ1

H_BPM#0

AJ2
G5

HREQ#4

J6

HREQ#3

K6

HREQ#2

M6

HREQ#1

J5

HREQ#0

K4
W2

P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6

G28
F28

A3
F5
B3

U3
U2
F3
T2
J2
R1
G2
T1
A13

J17
H16
H15
J16

AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1

H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8

H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6

HRS#2
HRS#1
HRS#0

-HAP1

-HAP0

H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0

R58 62R
RN11A
RN11B
RN11D
RN11C

R68 60.4R1%
R73 60.4R1%
R70 60.4R1%
R85 60.4R1%
R67 60.4R1%
R96 60.4R1%

TP7
TP8
TP5
TP6

3

RN4A
RN5B 8P4R-51R-LF
RN5D
RN6C
RN4B
RN4C

TP10

HREQ#[0..4] [8]

1 2
3 4
7 8
5 6

R94 62R
R63 62R
R95 62R
R54 X_62R
R83 X_62R

CPUCLK# [16]
CPUCLK [16]A20M#[19]

12
34

8P4R-51R-LF

78

8P4R-51R-LF

56

8P4R-51R-LF

34

8P4R-51R-LF

56

8P4R-62R
8P4R-62R
8P4R-62R
8P4R-62R

VTT_OUT_RIGHT

HRS#[0..2] [8]

-HAP1 [8]

-HAP0 [8]

C29
X_C0.1U25Y

PLACE RESISTORS OUTSIDE SOCKET
CAVITY IF NO ROOM FOR VARIABLE
RESISTOR DON'T PLACE

HADSTB#1 [8]
HADSTB#0 [8]
HDSTBP#3 [8]
HDSTBP#2 [8]
HDSTBP#1 [8]
HDSTBP#0 [8]
HDSTBN#3 [8]
HDSTBN#2 [8]
HDSTBN#1 [8]
HDSTBN#0 [8]
NMI_SB [19]
INTR [19]

SMI#
HINIT#
IGNNE#
STPCLK#
NMI_SB
SLP#
A20M#
INTR

Title

Size Document Number Re v

Custom

Date: Sheet

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CPU_GTLREF0 [6]
CPU_GTLREF1 [6]

TP9

VTT_OUT_LEFT

V_FSB_VTT

VTT_OUT_RIGHT

HBR#0 [6,8]

VTT_OUT_LEFT

VTT_OUT_LEFT

RN7

1

5

1

5

2

2

3

3

4

4

6

6

7

7

8

8

9

10

9

10

10P8R-150R

MICRO-START INT'L CO.,LTD.

INTEL LGA775 - SIGNALS

MS-7222 10

100

of

532Thursday, Novembe r 1 0 , 2005

1

VCC_VRM_SENSE [28]

8

7

6

5

4

3

2

1

VCCP

AH27

AH26

AH25

AH22

AH21

AH19

AH18

AH15

AH14

AH12

AH11

AG9

AG8

AG30

AG29

AG28

AG27

AG26

AG25

AG22

AG21

AG19

AG18

AG15

AG14

AG12

AG11

AF9

AF8

AF22

AF21

AF19
AF18
AF15
AF14
AF12
AF11

AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11

AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23

AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23

AE9

AD8

AC8

AB8
AA8

U5B

VCCP

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCU8VCCV8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCW8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

Y8

Y30

Y23

Y24

Y25

Y26

Y27

Y28

Y29

W30

W29

W28

W27

W26

W25

W24

W23

U26

U27

U28

U29

U30

D D

VCCP

C C

AH28

AH29

AH30

AH8

AH9

AJ11

AJ12

AJ14

AJ15

AJ18

AJ19

AJ21

AJ22

AJ25

AJ26

AJ8

AJ9

AK11

AK12

AK14

AK15

AK18

AK19

AK21

AK22

AK25

AK26

AK8

AK9

AL11

AL12

AL14

AL15

AL18

AL19

AL21

AL22

AL25

AL26

AL29

AL30

AL8

AL9

AM11

AM12

AM14

AM15

AM18

AM19

AM21

AM22

AM25

AM26

AM29

AM30

AM8

AM9

AN11

AN12

AN14

AN15

AN18

AN19

AN21

AN22

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCA
VSSA
RSVD

VCC-IOPLL

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

VTTPWRGD

VTT_OUT_RIGHT

VTT_OUT_LEFT

VTT_SEL

RSVD/VTT_PKGSENSE

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCJ8VCCJ9VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCK8VCCL8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCM8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCN8VCCP8VCCR8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCT8VCC

VCC

VCC

J10

J11

J12

J13

J14

J15

J18

J19

J20

J21

J22

J23

J24

J25

J26

J27

J28

J29

T30

U23

U24

U25

N30

N23

N24

N25

N26

N27

N28

N29

M30

M29

M28

M27

M26

M25

M24

M23

K27

K28

K29

K30

T23

T24

T25

T26

T27

T28

T29

J30

K23

K24

K25

K26

AN9

AN8

HS11HS22HS33HS4

AN25

AN26

AN29

AN30

A23
B23
D23
C23

A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
AM6

AA1
J1
F27

F29

ZIF-SOCK775-15u-in

4

H_VCCA
H_VSSA

H_VCCIOPLL

VTT_PWG
VTT_OUT_RIGHT

VTT_OUT_LEFT

V_FSB_VTT

V_FSB_VTT

C89 C10U10Y0805

CAPS FOR FSB GE NERIC

B

B

VTT_OUT_RIGHT

VTT_OUT_LEFT

_10R0402-LF

_10R0402-LF

CPU_GTLREF0VTT_OUT_RIGHT

C49
C220P50N0402

C56
C220P50N0402

CPU_GTLREF0 [5]

CPU_GTLREF1 [5]

R75

R82

49.9R1%0402

R78
100R1%0402

49.9R1%0402

VTT_OUT_RIGHT

B B

Cedar Mill

VTT_OUT_LEFT

VTT_OUT_LEFT CPU_GTLREF1

R81
100R1%0402

R79

C50
_C1U6.3Y50402/80-20%

R80

C52
_C1U6.3Y50402/80-20%

PLACE AT CPU END OF ROUTE

VTT_OUT_RIGHT

VTT_OUT_LEFT

VTT_OUT_RIGHT

VTT_OUT_LEFT

VTT_OUT_RIGHT

R57 62R
R55 120R

R71 100R
R86 62R

R62 62R
R72 62R

A A

CPURST#
PROCHOT#

CPU_GD
HBR#0

IERR#
THERMTRIP#

CPURST# [5,8]
PROCHOT# [5]

CPU_GD [5,27]
HBR#0 [5,8]

IERR# [5]
THERMTRIP# [5,29]

PLACE AT SB END OF ROUTE

VTT_OUT_RIGHT

8

7

R69 62R

FERR#

FERR# [5,19]

6

5

PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS

L8

X_10U100m_0805

V_FSB_VTT H_VCCIOPLL

12

C103

C1U16Y

CP2

L12

X_10U100m_0805

CP3

C108

C1U16Y

12

B

H_VSSA

H_VCCA

VTT_OUT_LEFT

VCC5_SB

R74
1KR

VID_GD#[27,28]

FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED

V_FSB_VTT

R19

10KR

RN20 8P4R-470R

1
3
5
7

4

R42
680R

Q2

N-SST3904_SOT23

2
4
6
8

H_BSL1 [5,16]
H_BSL2 [5]
H_BSL0 [5,16]

B

B

1.25V VTT_PWRGOOD

VTT_PWG

3

Title

INTEL LGA775 - POWER

Size Document Number Re v

Custom

Date: Sheet

2

MICRO-START INT'L CO.,LTD.

MS-7222 10

of

632Thursday, Novembe r 1 0 , 2005

1

1

VTT_OUT_RIGHT

VTT_OUT_RIGHT

GTLVREF_NB [8]

2

3

4

5

MSID1 MSID0

05 Per FMB

0

0

TP13

F23

VSS

AF25

AF26

B13

RSVDF6RSVD

VSS

VSS

AF27

AF28

R65

_62R0402

RSVDJ3RSVDN4RSVDP5RSVDV1RSVDW1RSVD

VSS

VSS

VSS

VSS

VSS

AF3

AF6

AF29

AF30

AF7

VSS

MSID1

MSID0

VSS

AG10

AG13

R61
_62R0402

H_COMP6

Y3

VSS

VSS

VSS

AG16

AG17

VSS

AG20

VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS

VSS

AG23

AG24

R59
_62R0402

A A

TP11

TP12

RSVD

VSS

AE4

AE7

RSVD

VSS

RSVDD1RSVD

VSS

AF10

D14

AF13

VSS

E23

E24

RSVD

VSS

AF16

AF17

TP14

RSVD

RSVDE5RSVDE6RSVDE7RSVD

VSS

VSS

VSS

AF20

AF23

VSS

AF24

H_COMP7

AC4

AE3

U5C

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

RSVD

VSS

VSS

AE5

AE29

AE30

A12
A15
A18

A2
A21
A24

A6

A9

AA23
AA24
AA25

B B

C C

AA26
AA27
AA28
AA29

AA30

AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30

AC3
AC6
AC7
AD4

AD7
AE10
AE13
AE16
AE17

AE2
AE20
AE24
AE25
AE26
AE27
AE28

AA3
AA6

AA7
AB1

AB7

VSS

R60

AG7

VSS

R66
_62R0402

X__62R0402

V30

VSS

VSS

VSS

VSS

AH1

AH10

AH13

AH16

AH17

VSS

VSSV3VSS

VSS

AH20

V29

VSS

AH23

05 Value FMB

V28

V27

V26

V25

V24

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AH3

AH6

AH7

AJ10

AH24

V23

VSS

VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS

VSS

VSS

VSS

VSS

VSS

VSS

AJ13

AJ16

AJ17

AJ20

AJ23

AJ24

AJ27

VSS

0

R30

R29

R28

R27

R26

R25

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AJ4

AJ7

AJ28

AJ29

AJ30

AK10

AK13

VSS

VSS

R24

VSS

VSS

AK16

R23

VSS

VSSR2VSSP7VSSP4VSS

VSS

VSS

AK2

AK17

1

H17

H18

H19

H20

H21

H22

H23

H24

H25

H26

H27

H28

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSB1VSS

VSS

B11

AN1

AN2

AN10

AN13

AN16

AN17

AN20

AN23

AN24

B14

AN27

AN28

H14

VSS

H13

VSS

H12

VSS

H11

VSS

H10

VSS

G1

VSS

F7

VSS

F4

VSS

F22

VSS

F19

VSS

F16

VSS

F13

VSS

F10

VSS

E8

VSS

E29

VSS

E28

VSS

E27

VSS

E26

VSS

E25

VSS

E20

VSS

E2

VSS

E17

VSS

E14

VSS

E11

VSS

D9

VSS

D6

VSS

D5

VSS

D3

VSS

D24

VSS

D21

VSS

D18

VSS

D15

VSS

D12

VSS

C7

VSS

C4

VSS

C24

VSS

C22

VSS

C19

VSS

C16

VSS

C13

VSS

C10

VSS

B8

VSS

B5

VSS

B24

VSS

B20

VSS

B17

VSS

ZIF-SOCK775-15u-in

VSS

VSS

K2

L25

L24

L23

K5

VSS

VSS

VSS

VSSK7VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AM16

AM17

AM4

AM20

AM23

AM24

AM27

AM28

P30

P29

P28

P27

P26

P25

P24

P23

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AK5

AK7

AL10

AL13

AK20

AK23

AK24

AK27

AK28

AL16

AK29

AK30

VSS

AL17

VSS

L30

L29

L28

L27

L26

VSSL3VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AL3

AL7

AL20

AM1

AL23

AL24

AL27

AL28

AM10

AM13

D D

Title

INTEL LGA775 - GND

Size Document Number Rev

A3

1

2

3

4

Date: Sheet of

MICRO-START INT'L CO.,LTD.

MS-7222 10

732Thursday, November 10, 2005

5

4

3

2

1

VIA confirmed

V_FSB_VTT

D D

HA#[3..33][5]

C C

HADSTB#0[5]
HADSTB#1[5]

HADS#[5]
HBNR#[5]
HBPRI#[5]
HBR#0[5,6]
HDBSY#[5]

HDEFER#[5]

HDRDY#[5]
HIT#[5]
HITM#[5]

HLOCK#[5]

HTRDY#[5]

near NB

C0.01U50X

HREQ#[0..4][5]

near NB

C149

X_C0.01U50X

HRS#[0..2][5]

HDBI#[0..3][5]

CPURST#[5,6]

NBHCLK[16]
NBHCLK#[16]

C154

GTLVREF_NB1

C396

C153

C0.01U50X

GTLVREF_NB

-HAP0[5]

-HAP1[5]

B B

C0.01U50X
C0.01U50X
C0.01U50X

A A

C391

C398

HCOMPVREF

TP16

C0.01U50X

4

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8

HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HA#32
HA#33

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

HRS#0
HRS#1
HRS#2

HDBI#0
HDBI#1
HDBI#2
HDBI#3

C392

-HAP0

-HAP1
HRCOMP

-DPRW

1

U6A

Y29

HA3

V27

HA4

AA29

HA5

Y27

HA6

Y26

HA7

AC27

HA8

AA28

HA9

AB27

HA10

AA27

HA11

AC29

HA12

AB29

HA13

AB28

HA14

AC26

HA15

AD29

HA16

T28

HA17

R28

HA18

N29

HA19

N28

HA20

P29

HA21

P27

HA22

R27

HA23

N26

HA24

T26

HA25

P26

HA26

R25

HA27

N27

HA28

N25

HA29

R29

HA30

T27

HA31

U26

HA32

T25

HA33

W28

HADSTB0

R26

HADSTB1

M29

ADS

M28

BNR

T29

BPRI

K26

BREQ

M25

DBSY

U27

DEFER

M26

DRDY

L27

HIT

U29

HITM

L29

HLOCK

M24

HTRDY

W27

HREQ0

V28

HREQ1

V26

HREQ2

W29

HREQ3

V29

HREQ4

L26

RS0

M27

RS1

K25

RS2

C29

HDBI0

H27

HDBI1

B21

HDBI2

A21

HDBI3

D14

CPURST

Y23

HCLK+

W23

HCLK-

R24

HAVREF0

V24

HAVREF1

F22

HDVREF0

G24

HDVREF1

F19

HDVREF2

F16

HDVREF3

L24

GTLVREF

N24

HAP0

W26

HAP1

G25

HRCOMP

G26

HCOMPVREF

K24

DPWR

VIA-P4M800Pro-CD

A16

GND

GND

A19

B22

U19

T19

R19

P19

N19

M19

L19

L18

L17

L16

L15

HD0

GND

V18

HDSTB0P
HDSTB0N

HDSTB1P
HDSTB1N

HDSTB2P
HDSTB2N

HDSTB3P
HDSTB3N

GND

T18

U18

GND

GND

AC28

HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8

HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

P25

P28

U25

U28

Y25

Y28

GND

GND

GND

GND

GND

P18

N18

R18

M18

3

GND

GND

GND

GND

GND

GND

GND

GND

GND

L25

L28

E29

E26

E25

E22

B25

B28

D15

D16

D19

H26

H29

D27
D26
A29
C26
C28
D28
A27
B29
A26
B26
D25
E24
A25
A28
D24
C25
K28
K29
J28
K27
J26
J29
J25
J27
F28
G29
G27
D29
E27
F27
E28
F29
E23
B24
C24
A24
A23
B23
A22
C23
F21
C22
E21
C21
D20
D21
F20
E20
B19
C19
B20
B18
C20
A20
C18
B17
B16
A17
C14
C15
A18
B15
B14
A15

B27
C27

H28
G28

D23
D22

C17
C16

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HDSTBP#0 [5]
HDSTBN#0 [5]

HDSTBP#1 [5]
HDSTBN#1 [5]

HDSTBP#2 [5]
HDSTBN#2 [5]

HDSTBP#3 [5]
HDSTBN#3 [5]

HD#[0..63] [5]

V_FSB_VTT V_FSB_ VTT

CB20
C10U10Y0805
CB22
C10U10Y0805
CB16
X_C0.1U25Y
CB18
C1U16Y
CB23
C1U16Y

Component Side

VCCP

V_FSB_VTT

2

R118

X_0R

CP7

CB70
C10U10Y0805
CB71
C0.1U25Y
CB73
C1U16Y

Solder Side

R121 49.9R1%

P4M800-CPU

Custom

R124 49.9R1%

R122 100R1%

R114 20.5R1%

MICRO-START INT'L CO.,LTD.

MS-7222 10

12

Title

Size Document Number Rev

Date: Sheet

GTLVREF_NB1

R120
100R1%

GTLVREF_NB

R127
100R1%

HCOMPVREF

R123

49.9R1%

1

HRCOMP

832Thursday, November 10, 2005

GTLVREF_NB [7]

of

BY PASS CAP

4

VCC_DDR

W12

W13

W14

W15

W16

VCC18MEM

VCC18MEM

VCC18MEM

VCC18MEM

W17

VCC18MEM

VCC18MEM

V11

AD28
AE27
AF27
AG28
AD27
AE29
AG27
AG29
AH29

AJ29

AG25

AJ25

AJ28
AH27
AH26

AJ26

AJ24
AG24

AJ22
AG21
AH24
AG23
AG22

AJ21
AH21

AJ20
AG18
AH18
AG20
AH19

AJ18
AG17

AJ12
AG12

AJ10
AH12

AJ11
AG10

AH9
AG8

AH6
AG9

AG5
AH4

AH1
AG4
AF4
AG3

AG1
AF2
AD3
AD1
AG2
AF3
AE1
AD2

AF21
AF23
AE22
AF24

AF28

AJ27

AJ23

AJ19
AG11

AH7
AF1

U6B

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34

AJ9

MD35
MD36
MD37
MD38
MD39
MD40

AJ7

MD41

AJ6

MD42
MD43
MD44

AJ8

MD45
MD46

AJ5

MD47
MD48

AJ4

MD49

AJ2

MD50
MD51
MD52
MD53
MD54

AJ1

MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63

CKE0
CKE1
CKE2
CKE3

DQM0
DQM1
DQM2
DQM3
DQM4
DQM5

AJ3

DQM6
DQM7

-DQM0

-DQM1

-DQM2

-DQM3

-DQM4

-DQM5

-DQM6

-DQM7

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63

CKEA0
CKEA1
CKEA2
CKEA3

D D

C C

B B

MD[0:63][12]

CKEA0[12,13]
CKEA1[12,13]
CKEA2[12,13]
CKEA3[12,13]

-DQM[0:7][12]

W11

VCC18MEM

W18

W19

V19

VCC18MEM

VCC18MEM

VCC18MEM

VCC18MEM

3

MAA0

MA10
MA11
MA12
MA13

DMCOMP

MEMDET

ODT0
ODT1
ODT2
ODT3

SRAS
SCAS

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

MCLKIA

MCLKO-

MCLKO+

MEMVREF1
MEMVREF2
MEMVREF3
MEMVREF4

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9

SWE

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

BA0
BA1

CS0
CS1
CS2
CS3

AF13
AD15
AJ15
AJ16
AJ17
AF16
AG15
AE18
AF17
AE19
AJ14
AF20
AE21
AD7

AF12
AJ13

AE5
AE24

AE9
AE10
AF6
AD6

AE12
AF9
AF11

AD9
AF8
AG7
AF7

AF29
AG26
AH22
AG19
AH10
AG6
AH3
AE3

AD26
AE26
AF26

AD23
AD17
AD11
AD8

M16
N16
P16
R16
T16
U16
V16
M15
N15
P15

MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11

MAA12

MAA13

MEMDET

-CS0

-CS1

-CS2

-CS3

-DQS0

-DQS1

-DQS2

-DQS3

-DQS4

-DQS5

-DQS6

-DQS7

DCLKI
MCLKO­MCLKO+

R169 _301R1%0402-1

MAA[0:13] [12,13]

BA0 [12,13]
BA1 [12,13]

ODT0 [12,13]
ODT1 [12,13]
ODT2 [12,13]
ODT3 [12,13]

-SRASA [12,13]

-SCASA [12,13]

-SWEA [12,13]

-CS0 [12,13]

-CS1 [12,13]

-CS2 [12,13]

-CS3 [12,13]

-DQS[0:7] [12]

DCLKI [16]

DCLKO as short as passable
DCLKI = DCLKx + 2 "

MVREF_NB

2

R156 0R0402
R153 0R0402

Test Point

(Place near their respective balls of NB)

DCLKO- [16]
DCLKO+ [16]

DCLKI
MCLKO+

MCLKO-

VCC_DDR

R171
100R

MVREF_NB

R170
100R

VCC_DDR

Component Side

TP17

1

TP2

1

TP3

1

VCC_DDR

MVREF_NB = 0.5* VCCDDR

C399
C1000P50X

C397
C1000P50X

VCC_DDR

CB27
C10U10Y0805
CB17
C10U10Y0805
CB14
X_C1U16Y

Solder Side

R389 1KR1%

R390 X_1KR1%

HEATSINK1

MEMDET

MCH

Heatsink

HS-MS7059

1

C403
C0.01U50X

CB72
C10U10Y0805
CB75
C10U10Y0805
CB79
C0.1U25Y
CB69
C1U16Y
CB81
C1U16Y
CB77
C1U16Y
CB74
C1U16Y
CB67
C10U10Y0805
CB85
C1U16Y

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

AE2

GND

AE8

AE11

AE14

AE16

AE17

AE20

AE23

AE25

AE28

AH2

AH5

AH8

AH11

AH14

AH17

A A

4

VIA-P4M800Pro-CD

GND

AH20

GND

AH23

GND

AH25

GND

AH28

AF5

GND

GND

GND

GND

GND

GND

N17

P17

R17

GND

GND

GND

GND

GND

T17

T15

V17

V15

U17

U15

R15

DCLKI

Near to NB chip

2

C393 X_C5P50N

Title

P4M800-DDR

Size Document Number Rev

Custom

Date: Sheet

MICRO-START INT'L CO.,LTD.

MS-7222 10

1

932Thursday, November 10, 2005

of

GND

M17

3

4

VCC_AGP

M11

N11

P11

R11

GND

GND

P14

R12

VCC15AGP

VCC15AGP

VCC15AGP

VCC15AGP

GND

GND

GND

GND

T12

R13

R14

T11

VCC15AGP

GND

GND

T14

T13

U12

VLAD[0:7][19]

D D

UPSTB[19]

-UPSTB[19]

UPCMD[19]

C C

+1.5VNB

B B

A A

VCC_DDR

R111

VSUS15

VSUS15

-SUSST[18]
PCIRST#2[27,29,31]

-PWROK_NB[18]

4.7KR

VBE0[19]

DNSTB[19]

-DNSTB[19]
DNCMD[19]

LVREF_NB
LCOMPP

TESTIN_NB

AVDD2

TESTIN_NB

VLAD0
VLAD1
VLAD2
VLAD3
VLAD4
VLAD5
VLAD6
VLAD7

AVDD1

U6C

V1

VD0

U2

VD1

Y2

VD2

Y3

VD3

T2

VD4

T3

VD5

AA2

VD6

AA1

VD7

U3

VBE

W2

UPSTB+

W1

UPSTB-

V2

DNSTB+

V3

DNSTB-

AA3

UPCMD

W3

DNCMD

V4

VLVREF

T4

VLCOMPP

U11

VCC15VL

U10

VCC15VL

V10

VCC15VL

K10

VCC15

K11

VCC15

K12

VCC15

K13

VCC15

K15

VCC15

K17

VCC15

K19

VCC15

K20

VCC15

Y10

VCC15

Y12

VCC15

Y14

VCC15

Y16

VCC15

Y18

VCC15

Y20

VCC15

L10

VCC15

N10

VCC15

R10

VCC15

W10

VCC15

M20

VCC15

P20

VCC15

T20

VCC15

V20

VCC15

AC25

VSUS15

AB1

VSUS15

AB3

SUSST

AF25

TESTIN

AC1

RESET

AB2

PWROK

AA25

VCCA33HCK

AD25

VCCA33MCK

AA26

GNDAHCK

AD24

GNDAMCK

VIA-P4M800Pro-CD

M12

GND

GND

GND

GND

GND

GND

GND

P13

P12

N12

N13

N14

M13

M14

3

GD0/FPD10
GD1/FPD11

GD2/FP1CLK

GD3/FPD09
GD4/FPD08
GD5/FPD07
GD6/FPD06

GD7FPD05

GD8/FP1DET

GD9/FP1HS
GD10/FPD01
GD11/FPD23
GD12/FPD00
GD13/FPD22
GD14/FPD21
GD15/FPD20
GD16/FPD18
GD17/FPD17
GD18/FPD16

GD19/FPDE
GD20/FPD14

GD21/FPCLK

GD22/FPD13
GD23/FPD15

GD24/GDVP1D09
GD26/GDVP1D10

GD27/GDVP1D04
GD28/GDVP1D07
GD29/GDVP1D06
GD30/GDVP1D08

GD31/GDVP1DET

GC#BE0/FPD03

GC#BE1/SBPLDAT

GC#BE2/FPD19

GC#BE3/GDVP1D11

GFRAME/FPHS

GIRDY/SBPLCLK

GDEVSEL/FPVS

GSTOP/FP1CLK

GPAR/FP1VS

GWBF/FPCLK
GREQ/SBDDCCLK
GGNT/SBDDCDAT

GSERR/FP1DE

AGP8XDET

GST0/ENAVEE

GST1/ENAVDD

GST2/ENABLT

GSBSTBF/GDVP1D01

GSBSTBS/GDVP1D02

GADSTBF0/FPD04

GADSTBS0/FPD02

GADSTBF1/FPD12

GADSTBS1/FPDET

GSBA0/GDVP1VS

GSBA1/GDVP1DE

GSBA2/GDVP1D00

GSBA3/GDVP1HS
GSBA4/GDVP1D05
GSBA5/GDVP1D03
GSBA6/GDVP1CLK
GSBA7/GDVP1CLK

AGPVREF1
AGPVREF2

AGPCOMPN
AGPCOMPP

AGPBUSY

GND

GND

GND

GND

GND

GND

V12

V13

V14

U13

U14

GD25

GTRDY

GDBIH

GRBF

GDBIL

GCLK

P3
P4
R3
R4
R1
N2
P1
R2
M3
M1
N4
L3
L1
N5
K2
R6
J2
H3
H1
K4
G1
G2
K5
G3
J6
K6
J4
F2
J5
F3
H4
E1

M2
K1
J1
L6

L4
M5
K3
J3
M4
P6
G5
F4
B3
D5
C4
M6
H6
C5

E4
E3
F5

C1
C2

N1
N3

G4
F1

A1
A2
B1
C3
D1
D4
D2
D3

N6
G6

R5
A4

A3
T1

GD0
GD1
GD2
GD3
GD4
GD5
GD6
GD7
GD8

GD9
GD10
GD11
GD12
GD13
GD14
GD15
GD16
GD17
GD18
GD19
GD20
GD21
GD22
GD23
GD24
GD25
GD26
GD27
GD28
GD29
GD30
GD31

AGP8XDET 0=ENABLE

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

AGPVREF

AGPVREF

AGPCOMPN
AGPCOMPP

GD[0:31] [14]

GBE0 [14]
GBE1 [14]
GBE2 [14]
GBE3 [14]

GFRAME [14]
GIRDY [14]
GTRDY [14]
GDEVSEL [14]
GSTOP [14]
GPAR [14]
DBIH [14]
RBF [14]
WBF [14]
GREQ [14]
GGNT [14]
GSERR [14]
DBIL [14]
AGP8X_DET_NB [14]

ST0 [14]
ST1 [14]
ST2 [14]

SB_STBF [14]
SB_STBS [14]

AD_STBF0 [14]
AD_STBS0 [14]

AD_STBF1 [14]
AD_STBS1 [14]

SBA[0:7]

SBA[0:7] [14]

GCLK_NB [16]

AGPBZ [19]

CB84
C0.1U25Y

2

12

CP4

X_COPPER

C114
C1U16Y

AGPVREF [14]

PUT CAP ON THE BOTTOM OF PIN AF7

CB28
C1000P50X

AGPCOMPN

R147

1

VCC VSUS15 Regulator

VCC3_SB VSUS15

U7
LT1087S_SOT89

2

R179

ADJ

1

_422R1%-LF

R178

100R1%

C185

C10U10Y1206

+1.5VNB

C198
X_C10U10Y1206

VIN3VOUT

C196

C0.1U25Y

Solder Side

CP5

VCC_AGP

CB76
C10U10Y0805
CB83
C1U16Y
CB82
X_C1U16Y

VCC3VCC3

12

FB3
X_220L2_50

AVDD2

C128
C1U16Y

+1.5VNB

R151

1.4KR1%

LVREF_NB

R158

1KR1%

LVREF_NB => VDD/4=0.625

CM3
C1000P50X

C405
C0.1U25Y

VCC_AGP

C182

C0.1U25Y

Component Side

VCC_AGP

CB41
C0.1U25Y
CB35
C0.1U25Y
CB42
C0.1U25Y

FB2
X_220L2_50

AVDD1

CM2
C1000P50X

60.4R1%

VCC_AGP

X_COPPER

C193
X_C10U10Y1206

C401
C0.01U50X
C394
C0.1U25Y
C395
C10U10Y0805
C404
C0.1U25Y
C402
C0.1U25Y
C400
C1U16Y
CB68
C10U10Y0805

CP28

1 2

X_COPPER
CP29

1 2

X_COPPER

+1.5VNB

Strapping For NB_TEST Mode
TESTIN BISTIN RBF WBF
1 1 x x Disable all TEST mode

4

3

LCOMPP

R149 402R1%

AGPCOMPP

R148

60.4R1%

2

Title

P4M800-VLINK&GRAPHIC

Size Document Number Rev

Custom

Date: Sheet

MICRO-START INT'L CO.,LTD.

MS-7222 10

1

10 32Thursday, November 10, 2005

of