MSI MS-7143 Schematics

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Cover Sheet
Block Diagram
GPIO

D D

Intel LGA775 CPU
Intel Grantsdale - CPU
Intel Grantsdale - MEMORY
Intel Grantsdale - PCI Express Signals & DMI
Intel Grantsdale - GND
Intel ICH6 - PCI & DMI & CPU & IRQ

Intel ICH6 - POWER

C C

Clock - ICS954129
LPC I/O - W83627THF
BCM4401
AC97 Audio
DDR I DIMM 1&2

1
2
3
4-6
7
8
9
10
11
12Intel ICH6 - LPC &SATA & GPIO
13
14
15
16
17
18

MS-7143

Intel (R) Grantsdale (GMCH) + ICH6 Chipset
Intel Tejas & Prescott LGA775 Processor

CPU:

Intel Tejas/Prescott - 3.0G & Above

System Chipset:

Intel Grantsdale - GMCH (North Bridge)
Intel ICH6 (South Bridge)

On Board Chipset:

BIOS -- FWH EEPROM
AC97 Codec -- ADI AD1888
LPC Super I/O -- W83627THF
LAN--BCM4401
CLOCK -- RTM862-408

Version 10

DDR I CAP & MCH2.5V POWER SEQUENCE
PCI EXPRESS X16 Slot

B B

PCI Slot 1 & 2
AGP Slot
PCI-E x 1 & ATA33/66/100 IDE & SATA Connectors
USB Connectors
ATX Connetcor & Front Panel & FAN

MS7 ACPI Controller
VRM 10.1 - RichTek RT9401 + RT8800 + RT9605

A A

EMI Cap

5

4

19
20
21
22
23
24
25
26FWH
27
28
29

Main Memory:

DDR I * 2

Expansion Slots:

PCI2.3 SLOT * 2
PCI EXPRESS X1 SLOT * 1
PCI EXPRESS X16 SLOT*1
AGP SLot *1

RichTek PWM:

5Bit VID Reference Generator: RT9401AB
Controller:RT8800 3 Phase
Driver: RT9605*1

3

MSI

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

Title

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Date: Sheet

MICRO-STAR INt'L CO., LTD.

Cover Page

Cover Page

Cover Page

MS-7143

MS-7143

MS-7143

1

130Monday, January 24, 2005

130Monday, January 24, 2005

130Monday, January 24, 2005

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VRM 10.1
RT9401AB +
RT8800 +
RT9605
3-Phase PWM

Intel LGA775 Processor

FSB

200MHz

Block Diagram

PCI EXPRESS
X16
Connector

Grantsdale

C C

DMI

UltraDMA
33/66/100

IDE Primary

SATA

SATA 0~3

USB

USB Port 0~7

ICH6

128bit DDR

166/200/266MHz

2 DDR I
DIMM
Modules

PCI CNTRL

PCI ADDR/DATA

PCI EXPRESS X1

AGP Slot

PCI Slot 1

PCI Slot 2

PCI EXPRESS X1

Connector

B B

33MHz@16.5MB/s

ADI AD1888

LPC Bus

AC97 Codec

PCI

BCM

10/100M LAN

Flash

A A

5

4

LPC SIO
Winbond
83627THF

Keyboard

Mouse

3

Floopy Parallel Serial

2

MSI

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

Title

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Date: Sheet

Date: Sheet

Date: Sheet

MICRO-STAR INt'L CO., LTD.

Block Diagram

Block Diagram

Block Diagram

MS-7143

MS-7143

MS-7143

1

230Monday, January 24, 2005

230Monday, January 24, 2005

230Monday, January 24, 2005

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ICH5

FunctionTypeGPIO Pin

GPI 0
GPI 1

D D

GPI 2
GPI 3
GPI 4
GPI 5
GPI 6
GPI 7
GPI 8
GPI 9
GPI 10
GPI 11
GPI 12
GPI 13
GPI 14
GPI 15
GPO 16
GPO 17

C C

GPO 18
GPO 19
GPO 20
GPO 21
GPIO 22 N/A
GPO 23
GPIO 24 I/O
GPIO 25 I/O
GPIO 26
GPIO 27
GPIO 28
GPIO 29
GPIO 30
GPIO 31
GPIO 32

B B

GPIO 33
GPIO 34
GPI 40
GPI 41
GPIO 48
GPIO 49

NC

I

NC

I

NC

I
I

PIRQ#F

NC

I
I

NC
NC

I

NC

I

NC

I

OC4#

I

OC5#

I

NC

I

NC

I

SIO_PME#

I
I

OC#6
OC#7

I

NC

O
O

NC
NC

O

BIOS_WP#

O

NC

O

NC

O
N/A

NC

O

NC
NC
NC

I/O

NC

I/O

NC

I/O

NC

I/O

NC

I/O

NC

I/O

NC

I/O
I/O

NC

I/O

NC

I

NC
NC

I 3.3V

NC 3.3VO

CPUPWRGD

OD VTT_OUT

Power well

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V
3VSB
3VSB
3VSB
3VSB

3.3V
3VSB
3VSB
3VSB

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V
N/A

3.3V
3VSB
3VSB
VCC3
3VSB
3VSB

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant

GPIO32
GPIO33
GPIO34
5V tolerant

PCI Config.

DEVICE

INTA#
INTB#

PCI_REQ#0AGP Slot
PCI_GNT#0

IDSEL

AD16

AD17
INTC#
INTD#

PCI Slot 1

INTC#
INTD#

PCI_REQ#1 AD18 PCI1

PCI_GNT#1
INTA#
INTB#

PCI Slot 2 PCI_REQ#2 AD19

INTD#
INTA#

PCI_GNT#2
INTB#
INTC#

PCI LAN INTF# AD22 PCI0 54

PCI_REQ#3

PCI_GNT#3

CLOCKREQ#/GNT#

PCICLK_F1

PCI2

SIO

OVT CONTROL DOT FUNCTION

CLK GEN PIN OUTMCP1 INT Pin

8

55

2

FWH

Function

TypeGPIO Pin

GPI 0
GPI 1
GPI 2

A A

GPI 3
GPI 4

I

ATADET0

I

GPI 1

I

GPI 2

I

GPI 3

I

GPI 4

MSI

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

Title

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Date: Sheet

MICRO-STAR INt'L CO., LTD.

GPIO

GPIO

GPIO

MS-7143

MS-7143

MS-7143

1

330Monday, January 24, 2005

330Monday, January 24, 2005

330Monday, January 24, 2005

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CPU SIGNAL BLOCK

VID5 28

VID1

AL5

RS2#
RS1#
RS0#

AP1#
AP0#
BR0#

DP3#
DP2#
DP1#
DP0#

VID0

AM2

VID1#

VID0#

H1

AG3
AF2
AG2
AD2
AJ1
AJ2

G5
J6
K6
M6
J5
K4

W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6

G28
F28

A3
F5
B3

U3
U2
F3

R1
G2
T1
A13

J17
H16
H15
J16

AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8

L1
K1

VID[0..4] 28

CPU_GTLREF

H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0

H_PCREQ#
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0

H_TESTHI12
H_TESTHI11
H_TESTHI10

H_TESTHI8

H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6

H_RS#2
H_RS#1
H_RS#0

TP1TP1
TP2TP2

H_COMP3
H_COMP2
H_COMP1
H_COMP0

TP3TP3
TP4TP4
TP5TP5
TP6TP6

CPU_GTLREF 5

H_PCREQ# 7

H_REQ#[0..4] 7

RN1 8P4R-62RRN1 8P4R-62R

1 2
3 4
5 6

H_PWRGDH_TESTHI9

7 8
1 2
3 4
5 6

H_BR#0

7 8

8P4R-62R

8P4R-62R

RN2

RN2

R6 62RR6 62R
R7 X_62RR7 X_62R
R8 X_62RR8 X_62R

CK_H_CPU# 14
CK_H_CPU 14

H_BR#0 7

R9 100R1%R9 100R1%
R11 100R1%R11 100R1%
R12 60.4R1%R12 60.4R1%
R13 60.4R1%R13 60.4R1%

H_ADSTB#1 7
H_ADSTB#0 7
H_DSTBP#3 7
H_DSTBP#2 7
H_DSTBP#1 7
H_DSTBP#0 7
H_DSTBN#3 7
H_DSTBN#2 7
H_DSTBN#1 7
H_DSTBN#0 7

H_NMI 11
H_INTR 11

V_FSB_VTT
VTT_OUT_RIGHT
VTT_OUT_LEFT

H_RS#[0..2] 7

PLACE RESISTORS OUTSIDE SOCKET
CAVITY IF NO ROOM FOR VARIABLE
RESISTOR DON'T PLACE

GTLREF_SEL6

C1 C0.1U25YC1 C0.1U25Y

VTT_OUT_LEFT

H_CPURST# VTT_OUT_LEFT

C3

C3

X_C0.1U25Y

X_C0.1U25Y

R196 62RR196 62R

R197 62RR197 62R

VTT_OUT_LEFT 5,6

V_FSB_VTT

V_FSB_VTT 5,7,9,13,27,28,29
VTT_OUT_RIGHT 5

D D

H_DBI#[0..3]7

H_EDRDY#7

H_FERR#11

H_STPCLK#11

H_INIT#11

H_DBSY#7
H_DRDY#7

H_TRDY#7

C C

B B

VTT_OUT_RIGHT

H_FSBSEL05,9,14
H_FSBSEL15,9,14
H_FSBSEL25,9,14

H_ADS#7

H_LOCK#7

H_BNR#7

H_HITM#7

H_BPRI#7

H_DEFER#7

CPU_TMPA15

TRMTRIP#5,11

H_PROCHOT#5

H_IGNNE#11

ICH_H_SMI#11

H_A20M#11

C2 X_C0.1U25YC2 X_C0.1U25Y

R10 X_1KRR10 X_1KR

LL_ID0

H_CPURST#7

H_D#[0..63]7

H_HIT#7

H_SLP#11

H_PWRGD11

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

H_IERR#

H_TRST#

CPU_BOOT

LL_ID0

H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54

G11
D19
C20

AB2
AB3

AD3

AD1
AF1
AC1
AG1
AE1
AL1
AK1

AE8
AL2

AH2
AE6
G10

D16
A20

AA2
G29

H30
G30

G23
B22

A22
A19
B19
B21
C21
B18
A17
B16
C18

A8

F2

R3
M3

P3
H4

B2
C1
E3

D2
C3
C2
D4
E4
G8
G7

M2

N2
P2
K3
L2

N5
C9

Y1
V2

N1

H_A#[3..31]7

U1A

U1A

1122334

DBI0#
DBI1#
DBI2#
DBI3#

EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#

DBSY#
DRDY#
TRDY#

ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#

TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#

RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5

BOOTSELECT
LL_ID0
LL_ID1

BSEL0
BSEL1
BSEL2

PWRGOOD
RESET#
D63#

D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#

B15

D53#

VID2

VID3

VID4

AJ3

AK3

ITP_CLK1

ITP_CLK0

VSS_SENSE

D9#

D8#

D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#

A10

VID5

AM5

AL4

AK4

VID5#

VID4#

RSVD#AM5

LINT0/INTR

AL6

VID3#

TESTHI12
TESTHI11
TESTHI10

RSVD#AK6

RSVD#G6

ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

LINT1/NMI

B4

AM3

VID2#

GTLREF

BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#

PCREQ#

REQ4#
REQ3#
REQ2#
REQ1#
REQ0#

TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0

BCLK1#
BCLK0#

COMP3
COMP2
COMP1
COMP0

ZIF-SOCKET775_black

ZIF-SOCKET775_black

H_A#24

H_A#29

H_A#28

H_A#23

H_A#26

H_A#31

H_A#25

H_A#27

H_A#30

4

AJ6

AJ5

AH5

AH4

AG5

AG4

AG6

AF4

AF5

AB4

AC5

AB5

AA5

A35#

A34#

A33#

A32#

A31#

A30#

A29#

A28#

A27#

A26#

A25#

A24#

D52#

D51#

D50#

D49#

D48#

D47#

D46#

D45#

D44#

D43#

D42#

D41#

D40#

D39#

D38#

D37#

F21

F20

F18

A14

C14

E22

C15

D17

D20

D22

G22

G21

F17

E21

E19

E18

G17

H_A#22

A23#

D36#

H_A#21

AD6

A22#

D35#

G18

H_A#20

H_A#19

AA4

A21#

A20#Y4A19#Y6A18#W6A17#

D34#

D33#

E16

E15

H_A#16

H_A#18

H_A#17

AB6

D32#

D31#

D30#

F15

G16

G15

H_A#15

A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#

D29#

F14

G14

H_A#14

D28#

D27#

G13

H_A#13

H_A#12

D26#

E13

D13

H_A#9

H_A#11

U6

A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#

D25#

D24#

D23#

D22#

F12

F11

D10

H_A#8

D21#

D20#D7D19#E9D18#F9D17#F8D16#G9D15#

E10

AC2

L5

AN3

AN6

AN5

AN4

DBR#

RSVD

RSVD#AN4

VCC_SENSE

D14#

D13#

D12#D8D11#

D10#

B12

B10

A11

D11

C12

C11

H_A#5

H_A#7

H_A#6

H_A#10

H_A#4

H_A#3

R2
X_10KRR2X_10KR

GTLREF_SEL

X_N-2N7002_SOT23

X_N-2N7002_SOT23

VCCP

+12VP

R1

R1
X_619R1%

X_619R1%

DS

Q1

Q1

G

MCH_GTLREF 7

VCC3

R3

R3
X_249R1%

X_249R1%

DS

Q2

Q2

G

X_N-2N7002_SOT23

X_N-2N7002_SOT23

H_TRST#

RN6 8P4R-62RRN6 8P4R-62R

RN7 8P4R-62RRN7 8P4R-62R
C4
C0.1U25YC4C0.1U25Y

H_TESTHI0

R191

R191

680R

680R

1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8

PLACE BPM TERMINATION NEAR CPU

VCC3

R4

R4
X_110R1%

X_110R1%

R5

R5
X_61.9R1%

X_61.9R1%

H_BPM#5
H_BPM#3
H_BPM#1
H_BPM#0
H_IERR#
H_BPM#2
H_BPM#4VTT_OUT_RIGHT

A A

8

7

H_D#53

H_D#52

H_D#51

H_D#50

H_D#48

H_D#49

H_D#47

H_D#46

H_D#44

H_D#45

H_D#43

H_D#42

H_D#41

H_D#40

H_D#38

H_D#39

H_D#37

H_D#36

H_D#35

H_D#34

6

H_D#33

H_D#32

H_D#30

H_D#31

H_D#29

H_D#28

H_D#27

H_D#26

H_D#24

H_D#25

H_D#23

H_D#22

H_D#20

H_D#21

H_D#19

H_D#18

H_D#17

H_D#16

H_D#15

H_D#14

H_D#13

H_D#12

5

H_D#10

H_D#11

H_D#8

H_D#9

H_D#7

H_D#6

H_D#5

H_D#3

H_D#4

H_D#2

H_D#1

H_D#0

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

MSI

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

4

3

Date: Sheet

MICRO-STAR INt'L CO., LTD.

Intel LGA775 CPU - Signals

Intel LGA775 CPU - Signals

Intel LGA775 CPU - Signals

2

MS-7143

MS-7143

MS-7143

10

10

430Friday, January 28, 2005

430Friday, January 28, 2005

430Friday, January 28, 2005

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VCCP

AF9

AF8

AG11

AF22

AF21

U1B

AF19
AF18
AF15
AF14
AF12
AF11

AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11

AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23

AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23

AE9

AD8

AC8

AB8
AA8

U1B

VCCP

VCC#AF19
VCC#AF18
VCC#AF15
VCC#AF14
VCC#AF12
VCC#AF11
VCC#AE9
VCC#AE23
VCC#AE22
VCC#AE21
VCC#AE19
VCC#AE18
VCC#AE15
VCC#AE14
VCC#AE12
VCC#AE11
VCC#AD8
VCC#AD30
VCC#AD29
VCC#AD28
VCC#AD27
VCC#AD26
VCC#AD25
VCC#AD24
VCC#AD23
VCC#AC8
VCC#AC30
VCC#AC29
VCC#AC28
VCC#AC27
VCC#AC26
VCC#AC25
VCC#AC24
VCC#AC23
VCC#AB8
VCC#AA8

VCC#AF8

VCC#AF22

VCC#AF21

VCC#Y29

VCC#Y30

VCC#Y8

Y8

Y29

Y30

VCC#AF9

VCC#AG11

VCC#Y27

VCC#Y28

Y27

Y28

VCCP

D D

C C

AG15

AG14

AG12

VCC#AG15

VCC#AG14

VCC#AG12

VCC#Y24

VCC#Y25

VCC#Y26

Y24

Y25

Y26

AG21

AG19

AG18

VCC#AG21

VCC#AG19

VCC#AG18

VCC#W30

VCC#W8W8VCC#Y23

Y23

W30

AG22

VCC#AG22

VCC#W29

W29

AG27

AG26

AG25

VCC#AG27

VCC#AG26

VCC#AG25

VCC#W26

VCC#W27

VCC#W28

W26

W27

W28

AG30

AG29

AG28

VCC#AG30

VCC#AG29

VCC#AG28

VCC#W23

VCC#W24

VCC#W25

W23

W24

W25

7

AH11

AG9

AG8

VCC#AG9

VCC#AG8

VCC#U8

VCC#V8

V8

U8

U30

AH15

AH14

AH12

VCC#AH14

VCC#AH12

VCC#AH11

VCC#U28

VCC#U29

VCC#U30

U27

U28

U29

AH21

AH19

AH18

VCC#AH19

VCC#AH18

VCC#AH15

VCC#U25

VCC#U26

VCC#U27

U24

U25

U26

AH26

AH25

AH22

VCC#AH25

VCC#AH22

VCC#AH21

VCC#T8

VCC#U23

VCC#U24

T8

T30

U23

AH27

AH28

AH29

VCC

VCC#AH26

VCC#AH28

VCC#T28

VCC#T29

VCC#T30

T27

T28

T29

AH8

AH9

AH30

VCC#AH8

VCC#AH29

VCC#AH30

VCC#T25

VCC#T26

VCC#T27

T24

T25

T26

AJ11

AJ12

VCC#AH9

VCC#AJ11

VCC#AJ12

VCC#R8

VCC#T23

VCC#T24

R8

T23

AJ14

AJ15

VCC#AJ14

VCC#P8

P8

N8

6

AJ18

AJ19

VCC#AJ15

VCC#AJ18

VCC#N30

VCC#N8

N29

N30

AJ21

AJ22

VCC#AJ19

VCC#AJ21

VCC#AJ22

VCC#N27

VCC#N28

VCC#N29

N27

N28

AJ25

AJ26

VCC#AJ25

VCC#AJ26

VCC#N25

VCC#N26

N25

N26

AJ8

AJ9

VCC#AJ8

VCC#AJ9

VCC#N23

VCC#N24

N23

N24

AK11

AK12

AK14

VCC#AK11

VCC#AK12

VCC#AK14

VCC#M29

VCC#M30

VCC#M8

M8

M29

M30

AK15

AK18

AK19

VCC#AK15

VCC#AK18

VCC#AK19

VCC#M26

VCC#M27

VCC#M28

M26

M27

M28

AK21

AK22

AK25

VCC#AK21

VCC#AK22

VCC#AK25

VCC#M23

VCC#M24

VCC#M25

M23

M24

M25

AK26

AK8

AK9

VCC#AK8

VCC#AK9

VCC#AK26

VCC#K30

VCC#K8

VCC#L8

L8

K8

K30

AL11

AL12

AL14

VCC#AL11

VCC#AL12

VCC#K28

VCC#K29

K27

K28

K29

5

AL15

AL18

AL19

VCC#AL14

VCC#AL15

VCC#AL18

VCC#K25

VCC#K26

VCC#K27

K24

K25

K26

AL21

AL22

AL25

VCC#AL19

VCC#AL21

VCC#AL22

VCC#K24

K23

AL26

AL29

AL30

VCC#AL25

VCC#AL26

VCC#AL29

VCC#J29

VCC#J30

VCC#J8J8VCC#J9J9VCC#K23

J28

J29

J30

AL8

AL9

AM11

VCC#AL8

VCC#AL9

VCC#AL30

VCC#J26

VCC#J27

VCC#J28

J25

J26

J27

AM12

AM14

AM15

VCC#AM11

VCC#AM12

VCC#AM14

VCC#AM15

VCC#J22

VCC#J23

VCC#J24

VCC#J25

J22

J23

J24

AM18

AM19

AM21

VCC#AM18

VCC#AM19

VCC#AM21

VCC#J19

VCC#J20

VCC#J21

J19

J20

J21

AM22

AM25

AM26

VCC#AM22

VCC#AM25

VCC#AM26

VCC#J14

VCC#J15

VCC#J18

J14

J15

J18

4

AM8

AM29

AM30

VCC#AM8

VCC#AM29

VCC#AM30

VCC#J11

VCC#J12

VCC#J13

J11

J12

J13

AM9

AN11

AN12

AN14

AN15

AN18

VCC#AM9

VCC#AN11

VCC#AN12

VCC#AN14

VCC#AN15

VCC#AN18

RSVD/VTT_PKGSENSE

VCC#AN26

VCC#AN29

VCC#AN30

VCC#AN8

VCC#AN9

VCC#J10

J10

AN8

AN9

AN26

AN29

AN30

AN19

AN21

AN22

VCCA
VSSA

VCC#AN19

VCC#AN21

VCC#AN22

RSVD

VCC-IOPLL

VTT#A26
VTT#A27
VTT#A28
VTT#A29
VTT#A30
VTT#B25
VTT#B26
VTT#B27
VTT#B28
VTT#B29
VTT#B30
VTT#C25
VTT#C26
VTT#C27
VTT#C28
VTT#C29
VTT#C30
VTT#D25
VTT#D26
VTT#D27
VTT#D28
VTT#D29
VTT#D30

VTTPWRGD

VTT_OUT

VTT_OUT#J1

VTT_SEL

VCC#AN25

ZIF-SOCKET775_black

ZIF-SOCKET775_black

AN25

VTT

A23
B23
D23
C23

A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30

VTT_PWG

AM6

VTT_OUT_RIGHT

AA1

VTT_OUT_LEFT

J1
F27

F29

H_VCCA
H_VSSA

H_VCCA

3

V_FSB_VTT

R14 X_1KRR14 X_1KR

VTT_SEL

VCC3

0
1

TEJ/PSC

RSVD

2

V_FSB_VTT

C5 C10U10Y0805C5 C10U10Y0805
C6 X_C10U10Y0805C6 X_C10U10Y0805
C7 X_C10U10Y1206C7 X_C10U10Y1206

1

CAPS FOR FSB GENERIC

PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS

V_FSB_VTT

VTT_OUT_LEFT4,6

B B

VTT_OUT_RIGHT4

A A

VTT_OUT_LEFT CPU_GTLREF

GTLREF VOLTAGE SHOULD BE

0.67*VTT = 0.8V

VTT_OUT_RIGHT

V_FSB_VTT4,7,9,13,27,28,29

8

R15 49.9R1%R15 49.9R1%

R18 X_120RR18 X_120R

PLACE AT ICH END OF ROUTE

V_FSB_VTT

R19 62RR19 62R
R20 62RR20 62R

R16

R16
100R1%

100R1%

7

C11

C11
C0.1U25Y

C0.1U25Y

H_PROCHOT#

TRMTRIP#
H_FERR#

C12

C12
C220P50N

C220P50N

H_PROCHOT# 4

TRMTRIP# 4
H_FERR# 11

CPU_GTLREF 4

6

FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED

RN9

V_FSB_VTT

5

RN9

1
3
5
7

8P4R-470R

8P4R-470R

2
4
6
8

L1 X_10U100m_0805L1 X_10U100m_0805

CP3

CP3

X_COPPER

X_COPPER

VID_GD#128

VID_GD#27

H_FSBSEL1
H_FSBSEL0
H_FSBSEL2

4

VCC5_SB

7 8
5 6
3 4
1 2

RN8

RN8

8P4R-4.7KR

8P4R-4.7KR

H_FSBSEL1 4,9,14
H_FSBSEL0 4,9,14
H_FSBSEL2 4,9,14

C8

C8

X_C1U10Y

X_C1U10Y

C9

C9

X_C10U10Y1206

X_C10U10Y1206

VTT_OUT_RIGHT

R17

R17

680R

680R

Q3

Q3

N-MMBT3904_NL_SOT23

N-MMBT3904_NL_SOT23

3

1.25V VTT_PWRGOOD

VTT_PWG

C10

C10

C10U10Y1206

C10U10Y1206

H_VSSA

H_VCCA

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

MSI

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

2

Intel LGA775 CPU - Power

Intel LGA775 CPU - Power

Intel LGA775 CPU - Power

MS-7143

MS-7143

MS-7143

10

10

530Friday, January 28, 2005

530Friday, January 28, 2005

530Friday, January 28, 2005

1

10

of

of

of

8

7

6

5

4

3

2

1

TP11TP11

TP12TP12TP8TP8

F6

B13

F23

RSVD#F6

RSVD#F23

VSS#AF25

VSS#AF26

AF25

AF26

AF27

H2

RSVD#B13

VSS#AF27

AF28

R21 X_60.4R1%R21 X_60.4R1%
R22 X_60.4R1%R22 X_60.4R1%

J3

T2

N4

P5

V1

RSVD#J2J2RSVD#J3

RSVD#T2

RSVD#P5

RSVD#V1

RSVD#H2

RSVD#N4

VSS#AF28

VSS#AF29

VSS#AF3

VSS#AF30

VSS#AF6

VSS#AF7

VSS#AG10

AF3

AF6

AF7

AF29

AF30

AG10

W1

Y3

RSVD#Y3

RSVD#W1

VSS#AG13

VSS#AG16

VSS#AG17

AG13

AG16

AG17

VSS#Y7Y7VSS#Y5Y5VSS#Y2

VSS#AG20

VSS#AG23

VSS#AG24

AG20

AG23

AG24

Y2

VSS#W7W7VSS#W4

VSS#AG7

VSS#AH1

AH1

AG7

V6

W4

VSS#V7V7VSS#V6

VSS#AH10

VSS#AH13

AH10

AH13

AH16

VSS#AH16

VTT_OUT_LEFT 4,5

V3

V30

V29

V28

V27

V26

VSS#V3

VSS#V30

VSS#V29

VSS#V28

VSS#V27

VSS#V26

VSS#AH17

VSS#AH20

VSS#AH23

VSS#AH24

VSS#AH3

VSS#AH6

AH3

AH6

AH17

AH20

AH23

AH24

V25

V24

VSS#V25

VSS#V24

VSS#AH7

VSS#AJ10

AH7

AJ10

V23

U1

VSS#U7U7VSS#U1

VSS#V23

VSS#AJ13

VSS#AJ16

AJ13

AJ16

AJ17

VSS#T7T7VSS#T6T6VSS#T3

VSS#AJ17

VSS#AJ20

VSS#AJ23

AJ20

AJ23

T3

R5

VSS#R7R7VSS#R5

VSS#AJ24

VSS#AJ27

AJ24

AJ27

AJ28

R30

R29

R28

VSS#R30

VSS#R29

VSS#AJ28

VSS#AJ29

VSS#AJ30

AJ4

AJ29

AJ30

R27

R26

VSS#R28

VSS#R27

VSS#R26

VSS#AJ4

VSS#AJ7

VSS#AK10

AJ7

AK10

R25

R24

R23

VSS#R25

VSS#R24

VSS#AK13

VSS#AK16

AK13

AK16

AK17

P4

R2

VSS#P7P7VSS#P4

VSS#R2

VSS#R23

VSS#AK17

VSS#AK2

VSS#AK20

AK2

AK20

AK23

P30

P29

P28

VSS#P30

VSS#P29

VSS#AK23

VSS#AK24

VSS#AK27

AK24

AK27

AK28

P27

P26

P25

VSS#P28

VSS#P27

VSS#P26

VSS#AK28

VSS#AK29

VSS#AK30

AK5

AK29

AK30

P24

P23

VSS#P25

VSS#P24

VSS#P23

VSS#AK5

VSS#AK7

VSS#AL10

AK7

AL10

N3

VSS#N7N7VSS#N6N6VSS#N3

VSS#AL13

VSS#AL16

VSS#AL17

AL13

AL16

AL17

AL20

M1

L6

VSS#L7L7VSS#L6

VSS#M7M7VSS#M1

VSS#AL20

VSS#AL23

VSS#AL24

AL23

AL24

AL27

L30

L29

L3

VSS#L3

VSS#L30

VSS#AL27

VSS#AL28

VSS#AL3

AL3

AL7

AL28

L28

L27

VSS#L29

VSS#L28

VSS#L27

VSS#AL7

VSS#AM1

VSS#AM10

AM1

AM10

L26

L25

L24

VSS#L26

VSS#L25

VSS#L24

VSS#AM13

VSS#AM16

VSS#AM17

AM13

AM16

AM17

K5

L23

VSS#K7K7VSS#K5

VSS#L23

VSS#AM20

VSS#AM23

VSS#AM24

AM20

AM23

AM24

K2

J4

J7

VSS#J4

VSS#J7

VSS#K2

VSS#AM27

VSS#AM28

VSS#AM4

AM4

AM27

AM28

H7

H8

H9

VSS#H8

VSS#H9

VSS#AM7

VSS#AN1

AN1

AM7

AN10

TP7TP7

H29

H3

H6

VSS#H3

VSS#H6

VSS#H7

VSS#AN10

VSS#AN13

VSS#AN16

AN13

AN16

AN17

H26

H27

H28

VSS#H27

VSS#H28

VSS#H29

VSS#AN17

VSS#AN2

VSS#AN20

AN2

AN20

AN23

H23

H24

H25

VSS#H24

VSS#H25

VSS#H26

VSS#AN23

VSS#AN24

VSS#AN27

AN24

AN27

AN28

GTLREF_SEL 4

H19

H20

H21

H22

VSS#H19

VSS#H20

VSS#H21

VSS#H22

VSS#H23

VSS#AN28

VSS#AN7

VSS#B1B1VSS#B11

VSS#B14

B11

B14

AN7

H17

H18

H14

VSS#H14

H13

VSS#H13

VSS#H17

VSS#H18

H12

VSS#H12

H11

VSS#H11

H10

VSS#H10

G1

VSS#G1

F7

VSS#F7

F4

VSS#F4

F22

VSS#F22

F19

VSS#F19

F16

VSS#F16

F13

VSS#F13

F10

VSS#F10

E8

VSS#E8

E29

VSS#E29

E28

VSS#E28

E27

VSS#E27

E26

VSS#E26

E25

VSS#E25

E20

VSS#E20

E2

VSS#E2

E17

VSS#E17

E14

VSS#E14

E11

VSS#E11

D9

VSS#D9

D6

VSS#D6

D5

VSS#D5

D3

VSS#D3

D24

VSS#D24

D21

VSS#D21

D18

VSS#D18

D15

VSS#D15

D12

VSS#D12

C7

VSS#C7

C4

VSS#C4

C24

VSS#C24

C22

VSS#C22

C19

VSS#C19

C16

VSS#C16

C13

VSS#C13

C10

VSS#C10

B8

VSS#B8

B5

VSS#B5

B24

VSS#B24

B20

VSS#B20

B17

VSS#B17

ZIF-SOCKET775_black

ZIF-SOCKET775_black

D D

TP9TP9

TP10TP10

E23

E24

AC4

D1

AE3

AE4

U1C

U1C

A2

A6
A9

VSS
VSS#A15
VSS#A18
VSS#A2
VSS#A21
VSS#A24
VSS#A6
VSS#A9
VSS#AA23
VSS#AA24
VSS#AA25
VSS#AA26
VSS#AA27
VSS#AA28
VSS#AA29
VSS#AA3
VSS#AA30
VSS#AA6
VSS#AA7
VSS#AB1
VSS#AB23
VSS#AB24
VSS#AB25
VSS#AB26
VSS#AB27
VSS#AB28
VSS#AB29
VSS#AB30
VSS#AB7
VSS#AC3
VSS#AC6
VSS#AC7
VSS#AD4
VSS#AD7
VSS#AE10
VSS#AE13
VSS#AE16
VSS#AE17
VSS#AE2
VSS#AE20
VSS#AE24
VSS#AE25
VSS#AE26
VSS#AE27
VSS#AE28

AE29

RSVD

RSVD#AE3

VSS#AE29

VSS#AE30

VSS#AE5

AE5

AE7

AE30

RSVD#AE4

VSS#AE7

A12
A15
A18

A21
A24

C C

B B

AA23
AA24
AA25
AA26
AA27
AA28
AA29

AA3

AA30

AA6
AA7

AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30

AB7

AC3

AC6

AC7

AD4

AD7
AE10
AE13
AE16
AE17

AE2
AE20
AE24
AE25
AE26
AE27
AE28

D14

RSVD#D1

RSVD#D14

VSS#AF10

VSS#AF13

AF10

AF13

AF16

RSVD#E5E5RSVD#E6E6RSVD#E7

RSVD#E23

RSVD#E24

VSS#AF16

VSS#AF17

VSS#AF20

AF17

AF20

AF23

E7

VSS#AF23

VSS#AF24

AF24

TP13TP13

A A

8

7

6

5

4

TP14TP14

MSI

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

3

Date: Sheet

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

Intel LGA775 CPU - GND

Intel LGA775 CPU - GND

Intel LGA775 CPU - GND

MS-7143

MS-7143

MS-7143

2

10

10

630Friday, January 28, 2005

630Friday, January 28, 2005

630Friday, January 28, 2005

1

10

of

of

of

8

U2A

G30
G32

M30

M28

M26

M35

M31

G31

M32

M23
M22

AG7
G24

M14

H29
K29

J29

K30

L29
L31

L28

J28
K27
K33

R29

L26
N26

N31
P26
N29
P28
R28
N33
T27
T31
U28
T26
T29

J31
N27
E31

R33
E30

L33

F33
E32
H31

F31

L34
N35

J35
N34

L35
P33
K34

P34

J32

AF7

B23
D24
A23

A24

U2A

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HAD_STB0#
HAD_STB1#
HPCREQ#

BREQ0#
BPRI#

BNR#
HLOCK#
ADS#
HREQ0#

HREQ1#
HREQ2#
HREQ3#
HREQ4#

HIT#
HITM#
DEFER#

HTRDY#
DBSY#
DRDY#
HEDRDY#

RS0#
RS1#
RS2#

HCLKP
HCLKN

PWROK
CPURST#

RSTIN#
ICH_SYNC#

HDRCOMP
HDSCOMP
HDSWING

HDVREF

V_FSB_VTT4,5,9,13,27,28,29

H_A#[3..31]4

D D

H_ADSTB#04
H_ADSTB#14
H_PCREQ#4

C C

B B

A A

H_BR#04

H_BPRI#4
H_BNR#4

H_LOCK#4

H_ADS#4

H_REQ#[0..4]4

H_HIT#4

H_HITM#4

H_DEFER#4

H_TRDY#4
H_DBSY#4
H_DRDY#4

H_EDRDY#4

H_RS#[0..2]4

CK_H_MCH14

CK_H_MCH#14
PWRGD_3V12,27

H_CPURST#4

PLTRST#11,27

ICH_SYNC#12

8

H_A#3 H_D#0
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

HXRCOMP
HXSCOMP
HXSWING

MCH_GTLREF

R23

R23

HXRCOMP

20R1%

20R1%

AC11

AB11

Y20

VCCNCTF

VCCNCTF

AJ21

ICH_SYNC#

7

Y19

Y17

Y16

VCCNCTF

VCCNCTF

VCCNCTF

RSVRD

RSVRD

RSVRD

AL21

AK21

AK24

7

W20

W16

U20

U16

T20

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

RSVRD

RSVRD

RSVRD

RSVRD

RSVRD

RSVRD

AJ24

AJ23

AJ18

AL20

AK18

R26 60.4R1%R26 60.4R1%

R29 8.2KRR29 8.2KR

T19

T17

T16

VCCNCTF

VCCNCTF

RSVRD

RSVRD

V31

V30

AJ20

AA13

AA14

AA16

VCCNCTF

VCCNCTF

VCCNCTF

RSVRD

RSVRD

RSVRD

V32

Y30

U30

C13

C13
X_C2.2P50N

X_C2.2P50N

AA18

AA20

VCCNCTF

VCCNCTF

VCCNCTF

RSVRD

RSVRD

RSVRD

R31

AB29

AA21

AA22

AA23

VCCNCTF

VCCNCTF

RSVRD

RSVRD

R30

AA31

AA30

HXSCOMP

V_2P5_MCH

V_1P5_CORE

AA24

AB13

AB14

VCCNCTF

VCCNCTF

VCCNCTF

RSVRD

RSVRD

RSVRD

AC12

AC13

AC14

6

AB15

AB16

VCCNCTF

VCCNCTF

VCCNCTF

RSVRD

RSVRD

RSVRD

AC15

AC16

6

AB17

AB18

AB19

VCCNCTF

VCCNCTF

RSVRD

RSVRD

AC17

AC18

AC19

5

AB20

AB21

AB22

AB23

AB24

N13

N14

N15

N16

N18

N20

N21

P13

P14

P15

P17

P19

P21

P22

R13

R14

R15

R16

R18

R20

R22

R23

T13

T14

T15

T21

T23

T24

U13

U14

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

RSVRD

RSVRD

RSVRD

RSVRD

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

J12

T12

P12NCP23NCP24

N12NCN22NCN23NCN24

AC20

AC21

AC22

GTLREF VOLTAGE SHOULD BE 0.67*VTT=0.8V
100 OHM OVER 210 RESISTORS HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL

V_FSB_VTT

R12NCR24

U12

R24

R24

49.9R1%

49.9R1%

R27

R27
100R1%

100R1%

V12

Y12

W12

AA12NCAB12

AC23NCAC24NCAN19

C14

C14
C0.1U25Y

C0.1U25Y

AL28

AJ14

AH24

L19NCL12

P30

AG6

AD30

MCH_GTLREF

C15

C15
X_C220P16X

X_C220P16X

K12

H17NCH15NCH12

U22

U24

V13

V14

V15

V21

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

NC

NC

NC

F24NCF12

E16

C16

G12

MCH_GTLREF 4

4

V23

V24

W13

VCCNCTF

VCCNCTF

VCCNCTF

NC

NC

AR2NCAR1

AR35NCAR34

V_FSB_VTT

W14

W22

VCCNCTF

VCCNCTF

VCCNCTF

NC

NC

AP35

W24

Y13

Y14

VCCNCTF

VCCNCTF

NC

NC

B35

AP1

3

Y15

Y21

Y23

VCCNCTF

VCCNCTF

VCCNCTF

VCCNCTF

NCB1NC

NC

(INTEL-915PL-C2)

(INTEL-915PL-C2)

A2

A34

Y24

HD0#
HD1#
HD2#
HD3#

VCCNCTF

HD4#
HD5#
HD6#
HD7#
HD8#

HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

DINV_0#
DINV_1#
DINV_2#
DINV_3#

HD_STBP0#
HD_STBN0#

HD_STBP1#
HD_STBN1#

HD_STBP2#
HD_STBN2#

HD_STBP3#
HD_STBN3#

J33
H33
J34
G35
H35
G34
F34
G33
D34
C33
D33
B34
C34
B33
C32
B32
E28
C30
D29
H28
G29
J27
F28
F27
E27
E25
G25
J25
K25
L25
L23
K23
J22
J24
K22
J21
M21
H23
M19
K21
H20
H19
M18
K18
K17
G18
H18
F17
A25
C27
C31
B30
B31
A31
B27
A29
C28
A28
C25
C26
D27
A27
E24
B25

E34
J26
K19
B26

E33
E35

H26
F26

J19
F19

B29
C29

H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

SPACE" HD_SWING S/B 1/3*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT

R25

R25

300R1%

300R1%

R28

R28

100R1%

100R1%

HXSWING

C16

C16
C0.01U16X

C0.01U16X

CAPS SHOULD BE PLACED NEAR MCH PIN

5

4

3

H_DSTBP#0 4
H_DSTBN#0 4

H_DSTBP#1 4
H_DSTBN#1 4

H_DSTBP#2 4
H_DSTBN#2 4

H_DSTBP#3 4
H_DSTBN#3 4

2

H_D#[0..63] 4

H_DBI#[0..3] 4

MSI

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

MICRO-STAR INt'L CO., LTD.

Intel Grantsdale - CPU Signals

Intel Grantsdale - CPU Signals

Intel Grantsdale - CPU Signals

MS-7143

MS-7143

MS-7143

2

U2_X1

U2_X1

112

HS-MS7097

HS-MS7097

1

730Friday, January 28, 2005

730Friday, January 28, 2005

730Friday, January 28, 2005

1

2

10

10

10

of

of

of

8

7

6

5

4

3

2

1

DQM_A[0..7]18

FOR DDR1

DQM_A6

DQM_A1

DQM_A4

DQM_A2

DQM_A7

DQM_A3

DQM_A5

T35

AA28

DQM_A0

SCKE_A1

SCKE_A3

SCKE_A0

SCKE_A2

AF2

AL1

AN7

AH16

AK29

AG34

AA33

AL12

AN11

AP11

AR11

SADQ63

SACKE0

SACKE1

SACKE2

SACKE3

SBDQ61

SBDQ62

SBDQ63

SBCKE0

SBCKE1

SBCKE2

V28

W26

AM9

AP10

AN10

U33

SBCS0#
SBCS1#

SADM0

SADM1

SADM2

SBCS2#

SADM3

SADM4

SADM5

SADM6

SADM7

SBCS3#
SBRAS#

SBCAS#

SBWE#
SBMA0

SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8

SBMA9
SBMA10
SBMA11
SBMA12
SBMA13

SBBA0
SBBA1

SBDQS0
SBDQS1
SBDQS2
SBDQS3
SBDQS4
SBDQS5
SBDQS6
SBDQS7

SBCK0
SBCK0#

SBCK1
SBCK1#

SBCK2
SBCK2#

SBCK3
SBCK3#

SBCK4
SBCK4#

SBCK5
SBCK5#

RSV_TP3
RSV_TP2

SMYSLEWIN

SMYSLEWOUT

SMVREF1

SBCKE3

SBDM0

SBDM1

SBDM2

SBDM3

SBDM4

SBDM5

SBDM6

SBDM7

AJ5

AR9

AH9

W31

AH13

AH31

AD24

AG20

AG24

SCS_B#0

AP34

SCS_B#1

AN34

SCS_B#2

AN33

SCS_B#3

AM33

RAS_B#

AP27

CAS_B#

AN27

WE_B#

AR27

MAA_B0

AM18

MAA_B1

AP18

MAA_B2

AN17

MAA_B3

AR16

MAA_B4

AR15

MAA_B5

AN15

MAA_B6

AP17

MAA_B7

AL15

MAA_B8

AP14

MAA_B9

AN13

MAA_B10

AN20

MAA_B11

AR12

MAA_B12

AM12

MAA_B13

AD32
AN32

RSV

AP29

RSV

AP30

RSV

AP32

RSV

SBS_B0

AM27

SBS_B1

AR19
AP23

RSV

DQS_B0

AK5
AL4

RSV

DQS_B1

AK10
AH10

RSV

DQS_B2

AK13
AL14

RSV

DQS_B3

AD20
AF20

RSV

DQS_B4

AH25
AG26

RSV

DQS_B5

AH28
AH30

RSV

DQS_B6

AB31
AC30

RSV

DQS_B7

W27
Y28

RSV

P_DDR0_B

AH22

N_DDR0_B

AG23

P_DDR1_B

AL11

N_DDR1_B

AJ11

P_DDR2_B

AE26

N_DDR2_B

AE25
AL23
AK22
AK9
AL9
AD29
AD28

AL24

RSV

TP_SB_RCVENOUT

AK15

TP_SB_RCVENIN

AN14

SM_YSLEWIN

AF9
AE10

MCH_VREF_B

AE8

SCS_B#[0..3] 18

RAS_B# 18
CAS_B# 18
WE_B# 18

MAA_B[0..13] 18

SBS_B[0..1] 18

DQS_B0 18
DQS_B1 18
DQS_B2 18
DQS_B3 18
DQS_B4 18
DQS_B5 18
DQS_B6 18
DQS_B7 18

P_DDR0_B 18
N_DDR0_B 18
P_DDR1_B 18
N_DDR1_B 18
P_DDR2_B 18
N_DDR2_B 18

TP21TP21
TP22TP22

DATA_A56

DATA_A61

DATA_A55

Y35

AE27

DATA_A62

DATA_A57

DATA_A60

DATA_A58

DATA_A63

DATA_A59

V34

V33

R32

R34

W35

W33

T33

SADQ55

SADQ56

SADQ57

SADQ58

SADQ59

SADQ60

SADQ61

SADQ62

SBDQ53

SBDQ54

SBDQ55

SBDQ56

SBDQ57

SBDQ58

SBDQ59

SBDQ60

V29

Y26

U26

W29

AA29

AC28

AC26

DATA_A53

DATA_A54

DATA_A52

DATA_A51

DATA_A50

Y33

W34

AD31

AD35

AA32

SADQ49

SADQ50

SADQ51

SADQ52

SADQ53

SADQ54

SBDQ47

SBDQ48

SBDQ49

SBDQ50

SBDQ51

SBDQ52

AF27

AE31

AB27

AB26

AE29

DATA_A34

SCKE_A[0..3]18

DATA_A37

DATA_A35

DATA_A36

AN30

AK31

AL27

AJ28

SADQ34

SADQ35

SADQ36

SADQ37

SBDQ32

SBDQ33

SBDQ34

SBDQ35

AJ26

AL25

AF23

AF25

DATA_A38

AL30

AD23

DATA_A45

AG32

AJ29

DATA_A49

DATA_A48

DATA_A43

DATA_A44

DATA_A47

DATA_A46

AF34

AJ33

AH33

AF33

AE33

AE35

AE34

SADQ42

SADQ43

SADQ44

SADQ45

SADQ46

SADQ47

SADQ48

SBDQ40

SBDQ41

SBDQ42

SBDQ43

SBDQ44

SBDQ45

SBDQ46

AJ31

AF28

AK33

AK32

AG30

AG31

AG27

DATA_A41

DATA_A42

DATA_A40

DATA_A39

AL31

AJ34

AH35

SADQ38

SADQ39

SADQ40

SADQ41

SBDQ36

SBDQ37

SBDQ38

SBDQ39

AJ25

AL26

AF24

DATA_A[0..63]18

DATA_A16

DATA_A21

AR5

AG11

DATA_A24

DATA_A25

DATA_A18

AN8

SADQ17

SADQ18

SBDQ15

SBDQ16

AE13

DATA_A19

AP9

AF13

DATA_A26

DATA_A22

DATA_A23

DATA_A20

AN5

AP6

AR8

AN9

AK16

SADQ19

SADQ20

SADQ21

SADQ22

SADQ23

SADQ24

SBDQ17

SBDQ18

SBDQ19

SBDQ20

SBDQ21

SBDQ22

AF14

AD14

AD12

AH12

AG14

AL17

AD15

DATA_A32

DATA_A31

DATA_A27

DATA_A29

DATA_A33

DATA_A30

DATA_A28

AD17

AF19

AF16

AJ17

AE19

AH18

AH27

AK27

SADQ25

SADQ26

SADQ27

SADQ28

SADQ29

SADQ30

SADQ31

SADQ32

SADQ33

SBDQ23

SBDQ24

SBDQ25

SBDQ26

SBDQ27

SBDQ28

SBDQ29

SBDQ30

SBDQ31

AL18

AF22

AK19

AE22

AD18

AH21

AH19

AD21

DATA_A6

DATA_A0

DATA_A1

DATA_A3

D D

C C

B B

SCS_A#[0..3]18

RAS_A#18
CAS_A#18

WE_A#18

MAA_A[0..13]18

SBS_A[0..1]18

DQS_A018
DQS_A118

DQS_A218

DQS_A318

DQS_A418

DQS_A518

DQS_A618
DQS_A718

P_DDR0_A18
N_DDR0_A18

P_DDR1_A18
N_DDR1_A18
P_DDR2_A18
N_DDR2_A18

TP23TP23
TP24TP24

SCS_A#0
SCS_A#1
SCS_A#2
SCS_A#3

RAS_A#
CAS_A#
WE_A#

MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13

SBS_A0
SBS_A1

DQS_A0
DQS_A1
DQS_A2
DQS_A3
DQS_A4
DQS_A5
DQS_A6
DQS_A7

P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A

TP_SA_RCVENOUT
TP_SA_RCVENIN

SM_XSLEWIN
MCH_VREF_A
SMPCOMP_P

SMPCOMP_N

AM34

AL35
AK34
AL33

AN29

AL34
AP31

AN22

AP22

AN21

AP21

AM21

AP19

AR20
AN16
AN18
AM15
AN23

AP15
AP13
AB33

AP33

AR24
AR28
AR29

AN28

AP26

AR23

AF17

AG17
AM30

AL29

AG35
AG33

AA34
AA35

AM24
AN25

AB34

AC33

AP25

AN26

AM2

AM3

AC35
AC34

AN31
AH15

AE16
AJ12
AK12

AG1
AG2

AL3

AL2
AP7
AR7

U34
U35

AN2
AN3

AE7
AG8

AG4
AE5
AF5

U2B

U2B

SACS0#
SACS1#
SACS2#
SACS3#

SARAS#
SACAS#
SAWE#

SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13

RSV
RSV
RSV
RSV

SABA0
SABA1
RSV

SADQS0
RSV
SADQS1
RSV
SADQS2
RSV
SADQS3
RSV
SADQS4
RSV
SADQS5
RSV
SADQS6
RSV
SADQS7
RSV

SACK0
SACK0#
SACK1
SACK1#
SACK2
SACK2#
SACK3
SACK3#
SACK4
SACK4#
SACK5
SACK5#

RSV
RSV_TP1
RSV_TP0
SMXSLEWIN
SMXSLEWOUT

SMVREF0
SRCOMP1

SRCOMP0
RSV
RSV

(INTEL-915PL-C2)

(INTEL-915PL-C2)

DATA_A2

AE3

AF3

AH2

SADQ0

SADQ1

SADQ2

SBDQ0

AH7

DATA_A10

DATA_A8

DATA_A7

DATA_A9

DATA_A4

DATA_A5

AJ2

AE2

AE1

AG3

AH3

AJ1

AK2

SADQ3

SADQ4

SADQ5

SADQ6

SADQ7

SADQ8

SADQ9

SBDQ1

SBDQ2

SBDQ3

SBDQ4

SBDQ5

SBDQ6

SBDQ7

AJ6

AL5

AL6

AN6

AH4

AG9

AM5

DATA_A17

DATA_A14

DATA_A15

DATA_A12

DATA_A11

DATA_A13

AN4

AP4

AJ3

AK3

AP2

AP3

AP5

SADQ10

SADQ11

SADQ12

SADQ13

SADQ14

SADQ15

SADQ16

SBDQ8

SBDQ9

SBDQ10

SBDQ11

SBDQ12

SBDQ13

SBDQ14

AJ7

AJ8

AL7

AL8

AF11

AE11

AG10

SCKE_B0

SCKE_B2

SCKE_B1

SCKE_B3

DQM_B5

DQM_B4

DQM_B6

DQM_B0

DQM_B1

DQM_B2

DQM_B7

DATA_B42

DATA_B4

DATA_B5

DATA_B3

DATA_B0

DATA_B2

DATA_B6

DATA_B1

DATA_B[0..63]18

VCC_DDR

R30 80.6R1%R30 80.6R1%

C18

A A

C18

C0.1U25Y

C0.1U25Y

R32 80.6R1%R32 80.6R1%

SMPCOMP_N

SMPCOMP_P

DATA_B14

DATA_B15

DATA_B21

DATA_B23

DATA_B11

DATA_B12

DATA_B13

DATA_B16

DATA_B17

DATA_B18

DATA_B19

DATA_B7

DATA_B10

DATA_B8

DATA_B9

DATA_B20

DATA_B22

DATA_B24

DATA_B25

DATA_B26

DATA_B27

DATA_B28

DATA_B29

VCC_DDR

DATA_B34

DATA_B32

DATA_B31

DATA_B30

DATA_B33

R31 1KR1%R31 1KR1%

DATA_B35

DATA_B36

DATA_B37

DATA_B38

DATA_B39

DATA_B40

DATA_B41

DATA_B43

DATA_B44

DATA_B45

R33

R33

1KR1%

1KR1%

DATA_B46

DATA_B47

DATA_B48

DATA_B52

DATA_B49

DATA_B51

DATA_B50

DATA_B53

SCKE_B[0..3]18

DQM_B[0..7]18

DATA_B54

DATA_B55

DATA_B56

DATA_B57

DATA_B58

C0.1U25Y

C0.1U25Y

C0.1U25Y

C0.1U25Y

DATA_B61

DATA_B63

DATA_B60

DATA_B59

DATA_B62

MCH_VREF_B

C17

C17

PLACE 0.1UF CAP CLOSE TO MCH

MCH_VREF_A

PLACE 0.1UF CAP CLOSE TO MCH

C19

C19

PLACE CLOSE TO MCH

8

7

6

5

4

DQM_B3

MSI

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

3

MICRO-STAR INt'L CO., LTD.

Intel Grantsdale - Memory Signals

Intel Grantsdale - Memory Signals

Intel Grantsdale - Memory Signals

MS-7143

MS-7143

MS-7143

2

10

10

830Monday, January 24, 2005

830Monday, January 24, 2005

830Monday, January 24, 2005

1

10

of

of

of

8

EXP_A_RXP_020
EXP_A_RXN_020
EXP_A_RXP_120
EXP_A_RXN_120

D D

C C

B B

A A

EXP_A_RXP_220
EXP_A_RXN_220
EXP_A_RXP_320
EXP_A_RXN_320
EXP_A_RXP_420
EXP_A_RXN_420
EXP_A_RXP_520
EXP_A_RXN_520
EXP_A_RXP_620
EXP_A_RXN_620
EXP_A_RXP_720
EXP_A_RXN_720
EXP_A_RXP_820
EXP_A_RXN_820
EXP_A_RXP_920
EXP_A_RXN_920
EXP_A_RXP_1020
EXP_A_RXN_1020
EXP_A_RXP_1120
EXP_A_RXN_1120
EXP_A_RXP_1220
EXP_A_RXN_1220
EXP_A_RXP_1320
EXP_A_RXN_1320
EXP_A_RXP_1420
EXP_A_RXN_1420
EXP_A_RXP_1520
EXP_A_RXN_1520

DMI_ITP_MRP_011
DMI_ITN_MRN_011
DMI_ITP_MRP_111
DMI_ITN_MRN_111
DMI_ITP_MRP_211
DMI_ITN_MRN_211
DMI_ITP_MRP_311
DMI_ITN_MRN_311

CK_PE_100M_MCH14
CK_PE_100M_MCH#14

H_FSBSEL04,5,14
H_FSBSEL14,5,14
H_FSBSEL24,5,14

TP27TP27

CP5

V_1P5_CORE

V_1P5_CORE V_1P5_CORE

X_COPPER

X_COPPER

X_COPPER

X_COPPER

8

CP5

CP7

CP7

EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6

EXP_A_RXN_7 EXP_A_TXP_6
EXP_A_RXN_8

EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15

DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3

CK_PE_100M_MCH
CK_PE_100M_MCH#

H_FSBSEL0
H_FSBSEL1
H_FSBSEL2

NOA_5

C31

C31

NOA_6

VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL

C32

C32

X_C10U10Y0805

X_C10U10Y0805

VCCA_DPLLB

C39

C39
X_C10U10Y0805

X_C10U10Y0805

R34 X_1KR1%R34 X_1KR1%

V_1P5_CORE

V_2P5_MCH

V_2P5_MCH

X_C0.22U16Y

X_C0.22U16Y

E11
F11
J11

H11

F9
E9
F7
E7
B3
B4

D5

E5
G6
G5
H8
H7

J6

J5

K8

K7

L6

L5

P10
R10

M8
M7
N6
N5

P7

P8
R6
R5

U5
U6

T9

T8

V7

V8

V10
U10

A11
B11

K13

J13

H16
E15
D17

M16

F15
C15
A16
B15
C14
K15

L10

M10

A17
B17
A12
B13
A14

A13
E13
D13
F13

V_FSB_VTT4,5,7,13,27,28,29

VCCA_MPLL

7

U2C

U2C

EXPARXP0
EXPARXN0
EXPARXP1
EXPARXN1
EXPARXP2
EXPARXN2
EXPARXP3
EXPARXN3
EXPARXP4
EXPARXN4
EXPARXP5
EXPARXN5
EXPARXP6
EXPARXN6
EXPARXP7
EXPARXN7
EXPARXP8
EXPARXN8
EXPARXP9
EXPARXN9
EXPARXP10
EXPARXN10
EXPARXP11
EXPARXN11
EXPARXP12
EXPARXN12
EXPARXP13
EXPARXN13
EXPARXP14
EXPARXN14
EXPARXP15
EXPARXN15

DMI RXP0
DMI RXN0
DMI RXP1
DMI RXN1
DMI RXP2
DMI RXN2
DMI RXP3
DMI RXN3

GCLKINP
GCLKINN

SDVOCTRLDATA
SDVOCTRLCLK

BSEL0
BSEL1
BSEL2
RSV
RSV
MTYPE
EXP_SLR
RSV
RSV
RSV

VCC
VSS

VCCAHPLL
VCCAMPLL
VCCADPLLA
VCCADPLLB
VCCA3GPLL

VCCHV
VCCACRTDAC
VCCACRTDAC
VSSACRTDAC

C33

C33
C0.1U25Y

C0.1U25Y

C40

C40
C0.1U25Y

C0.1U25Y

7

6

V_1P5_CORE

AD10

AD9

AD8

AD7

AD6

AD5

AD4

AD3

AD2

AD1

AC10

AC9

AC8

AC7

AC6

AC5

AC4

AC3

AC2

AC1

AB10

AB9

AB8

AB7

AB6

AB5

AB4

AB3

AB2

AB1

W18

V19

V17

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VSSNCTF

VSSNCTF

VSSNCTF

F22

F21

F20

E22

E21

E20

H22

G22

G21

V_1P5_CORE V_1P5_CORE

E19

D22

D21

CP6

CP6

X_COPPER

X_COPPER

CP8

CP8

X_COPPER

X_COPPER

B22

B21

B20

B19

A22

A21

A20

D20

D19

C22

C21

C20

C19

6

A19

VCCA_DPLLA

C34

C34

X_C10U10Y0805

X_C10U10Y0805

VCCA_HPLL

C41

C41

X_C10U10Y0805

X_C10U10Y0805

AB25

AA25

AC25

C35

C35
C0.1U25Y

C0.1U25Y

C42

C42
C0.1U25Y

C0.1U25Y

AA11

U18

VCC

VCC

VSSNCTF

VSSNCTF

VSSNCTF

Y25

Y18

V_1P5_CORE

VCC_DDR

AR33

AR31

VCCSM

VSSNCTF

VSSNCTF

Y11

W25

W11

5

AR26

AR22

VCCSM

VCCSM

VCCSM

VSSNCTF

VSSNCTF

VSSNCTF

V25

V20

5

AR18

AR14

AR10

VCCSM

VCCSM

VSSNCTF

VSSNCTF

V16

V11

U25

AP28

AP24

AP20

VCCSM

VCCSM

VCCSM

VSSNCTF

VSSNCTF

VSSNCTF

T25

T18

U11

CP27

CP27

X_COPPER

X_COPPER

CP9

CP9

X_COPPER

X_COPPER

AP16

VCCSM

VCCSM

VSSNCTF

VSSNCTF

T11

AP12

AN35

AM32

AM28

AM26

AM25

AM23

AM22

AM20

VCCSM

VCCSM

VCCSM

VCCSM

VCCSM

VCCSM

VCCSM

VCCSM

VCCSM

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

P25

P11

R25

R11

N25

N11

M11

AA15

AD25

CP4

CP4

X_COPPER

X_COPPER
L2 X_10U100m_0805L2 X_10U100m_0805

C38

C38
C43

C43

4

AM19

AM17

AM16

AM14

AM13

AM11

AM10

VCCSM

VCCSM

VCCSM

VCCSM

VCCSM

VCCSM

VCCSM

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

P16

P18

P20

N17

N19

AA17

AA19

VCCA_GPLL

C36

C36
X_C10U10Y0805

X_C10U10Y0805

V_1P5_PCIEXPRESS

C10U10Y0805

C10U10Y0805

C10U10Y0805

C10U10Y0805

4

AK35

VCC3GW1VCC3GW2VCC3GW3VCC3GW4VCC3GW6VCC3GW7VCC3GW8VCC3GW9VCC3GY1VCC3GY2VCC3GY3VCC3GY4VCC3GY5VCC3GY6VCC3GY7VCC3GY8VCC3G

VCCSM

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

VSSNCTF

(INTEL-915PL-C2)

T22

R17

R19

R21

U15

U21

U23

C37

C37
C0.1U25Y

C0.1U25Y

(INTEL-915PL-C2)

V22

Y22

W15

W21

W23

V_1P5_PCIEXPRESS

Y9

EXPATXP0

EXPATXN0

EXPATXP1

EXPATXN1

EXPATXP2

EXPATXN2

EXPATXP3

EXPATXN3

EXPATXP4

EXPATXN4

EXPATXP5

EXPATXN5

EXPATXP6

EXPATXN6

EXPATXP7

EXPATXN7

EXPATXP8

EXPATXN8

EXPATXP9

EXPATXN9
EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12
EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15

DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3

EXPACOMPO

EXPACOMPI

CRTHSYNC
CRTVSYNC

CRTRED

CRTGREEN

CRTBLUE

CRTREDB

CRTGREENB

CTRBLUEB

CRTDDCDATA

CRTDDCCLK
DREFCLKINP

DREFCLKINN

CRTIREF

PMEXTTS

PMBMBUSY#

TESTIN#

MCHDETECT

3

EXP_A_TXP_0

C10

EXP_A_TXN_0

C9

EXP_A_TXP_1

A9

EXP_A_TXN_1

A8

EXP_A_TXP_2

C8

EXP_A_TXN_2

C7

EXP_A_TXP_3

A7

EXP_A_TXN_3

A6

EXP_A_TXP_4

C6

EXP_A_TXN_4

C5

EXP_A_TXP_5

C2

EXP_A_TXN_5EXP_A_RXP_7

D2
E3

EXP_A_TXN_6EXP_A_RXP_8

F3

EXP_A_TXP_7

F1

EXP_A_TXN_7

G1

EXP_A_TXP_8

G3

EXP_A_TXN_8

H3

EXP_A_TXP_9

H1

EXP_A_TXN_9

J1

EXP_A_TXP_10

J3

EXP_A_TXN_10

K3

EXP_A_TXP_11

K1

EXP_A_TXN_11

L1

EXP_A_TXP_12

L3

EXP_A_TXN_12

M3

EXP_A_TXP_13

M1

EXP_A_TXN_13

N1

EXP_A_TXP_14

N3

EXP_A_TXN_14

P3

EXP_A_TXP_15

P1

EXP_A_TXN_15

R1

DMI_MTP_IRP_0

R3

DMI_MTN_IRN_0

T3

DMI_MTP_IRP_1

T1

DMI_MTN_IRN_1

U1

DMI_MTP_IRP_2

U3

DMI_MTN_IRN_2

V3

DMI_MTP_IRP_3

V5

DMI_MTN_IRN_3

W5
Y10

W10
E12

D12
F14

D14
H14

G14
E14
J14

L14
M15

M13
M12

A15
K16

G16
R35

A35

3

HSYNC
VSYNC

EXTTS

GRCOMP

V_2P5_MCH

V_1P5_CORE

TP15TP15

2

EXP_A_TXP_0 20
EXP_A_TXN_0 20
EXP_A_TXP_1 20
EXP_A_TXN_1 20
EXP_A_TXP_2 20
EXP_A_TXN_2 20
EXP_A_TXP_3 20
EXP_A_TXN_3 20
EXP_A_TXP_4 20
EXP_A_TXN_4 20
EXP_A_TXP_5 20
EXP_A_TXN_5 20
EXP_A_TXP_6 20
EXP_A_TXN_6 20
EXP_A_TXP_7 20
EXP_A_TXN_7 20
EXP_A_TXP_8 20
EXP_A_TXN_8 20
EXP_A_TXP_9 20
EXP_A_TXN_9 20
EXP_A_TXP_10 20
EXP_A_TXN_10 20
EXP_A_TXP_11 20
EXP_A_TXN_11 20
EXP_A_TXP_12 20
EXP_A_TXN_12 20
EXP_A_TXP_13 20
EXP_A_TXN_13 20
EXP_A_TXP_14 20
EXP_A_TXN_14 20
EXP_A_TXP_15 20
EXP_A_TXN_15 20

DMI_MTP_IRP_0 11
DMI_MTN_IRN_0 11
DMI_MTP_IRP_1 11
DMI_MTN_IRN_1 11
DMI_MTP_IRP_2 11
DMI_MTN_IRN_2 11
DMI_MTP_IRP_3 11
DMI_MTN_IRN_3 11

V_1P5_CORE

C20

C20
C21

C21

VCC_DDR

C22 C10U10Y0805C22 C10U10Y0805
C23 C10U10Y0805C23 C10U10Y0805
C24 C10U10Y0805C24 C10U10Y0805

VCC_DDR

C25 C10U10Y0805C25 C10U10Y0805
C26 C10U10Y0805C26 C10U10Y0805
C27 C10U10Y0805C27 C10U10Y0805

MCH MEMORY DECOUPLING

V_FSB_VTT

C28

C28
X_C0.1U25Y

X_C0.1U25Y

1

C10U10Y0805

C10U10Y0805
C10U10Y0805

C10U10Y0805

C29

C29
X_C0.1U25Y

X_C0.1U25Y

C30

C30
C0.1U25Y

C0.1U25Y

FSB GENERIC DECOUPLING

EXTTS

7 8
5 6

HSYNC

3 4

VSYNC

1 2

8P4R-4.7KR

8P4R-4.7KR

BSEL

2

0

1

0

0

1

0

1

0

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

MSI

Title

Title

Title

Intel Grantsdale PCI-Express & RBG Signals

Intel Grantsdale PCI-Express & RBG Signals

Intel Grantsdale PCI-Express & RBG Signals

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

2

RN10

RN10

PSB FREQUENCY

133 MHZ (533)
200 MHZ (800)

R35 24.9R1%R35 24.9R1%

MS-7143

MS-7143

MS-7143

V_2P5_MCH

TABLE

GRCOMPV_1P5_PCIEXPRESS

930Monday, January 24, 2005

930Monday, January 24, 2005

930Monday, January 24, 2005

of

of

of

1

10

10

10