MSI MS-7133 Schematics

1
Cover Sheet, Block diagram Intel LGA77 5 CPU - Signals Intel LGA775 CPU - Power Intel LGA775 CPU- GND
1-2
3 4 5
MS-7133
Intel (R) Grantsdale (GMCH) + ICH6 Chipset
Version 0A
Intel Tejas & Prescott LGA775 Processor
Intel Grantsdale - CPU Intel Grantsdale - Memory Intel Grantsdale - PCI Express Intel Grantsdale - GND ICH6 CLOCK - ICS954119 LPC I/O - WINBOND83627THF KB/MS FWH/FAN/SERIAL-ATA LAN-RTL8100C/8110SB
6 7 8 9
10-12
13 14 15 16
CPU:
Intel Tejas/Prescott - 3.6G
System Chipset:
Intel Grantsdale - GMCH (North Bridge) Intel ICH6 (South Bridge)
On Board Chipset:
BIOS -- FWH FLASH 4Mb Azalia Codec -- ALC880 LPC Super I/O -- WINBOND83627THF
A A
IEEE1394-VIA6307 Azalia CODEC(ALC880) 18 PCI EXPRESS X16 SLOT
17
19
LAN-RTL8100C/8110SB 1394 -- VIA VT-6307 CLOCK -- ICS954119
DDR1 DIMM 1 , 2 , 3 & 4 PCI SLOT 1 & 2 & 3 ATX & Front Panel & IDE CONNECTOR USB Connectors MS7 ACPI Controller VRM 10 - Intersil HIP 6561 3 phase GPIO & JUMPER SETTING VGA Connector Manual Parts & Power Delivery Revision History
20-22
23 24 25 26 27 28 29 30 31
Main Memory:
2 CHANNEL DDR I * 4 (Max 4GB)
Expansion Slots:
PCI Express X16 SLOT * 1 PCI 1.2.3 SLOT * 3
Intersil PWM:
Controller: HIP6565ACV Driver: HIP6602B + HIP6601B
1
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
MS-7133
of
132Wednesday, May 11, 2005
100
VRM_GD
1
VTT_PWG
VRM 10.1 Intersil 6561
PCIRST#1
3-Phase PWM
PCI EXPRESS X16
Connector
P.28
P.15
Analog Video Out
HD_RST#
IDE Primary
IDE Primary
SERIAL ATA1
A A
SERIAL ATA2
USB2.0
P.19
P.18
P.18
P.18
P.18
UltraDMA 33/66/100
USB
Intel LGA775 Processor
FSB
H_PWRGD
H_CPURST#
Grantsdale-G
P.6~9
DMI
PLRST#
VRM_GD
ICH6
P.10~12
P.3~5
CHANNEL A
CHANNEL B
PWR_GD
SLP_S4#
SLP_S3#
LPC Bus
USB Port0~ 7
P.25
RSMRST#
Block Diagram
2 DDR1 DIMM Modules
P.20
2 DDR1 DIMM Modules
P.21
PCIRST_ICH6#
PCI
PWR_OK
PCIRST#2
ATX1
PWR_GD
PCIRST#1
PCI Slot 1
PCI Slot 2
P.23 P.23 P.15
MS7
PCI Slot 3
VID_GD
RSMRST#
HD_RST#
PCIRST#2
PCIRST#1
C MEDIA
Azalia Codec
LAN RTL8100C/ 8110SB
1394 VIA VT-6307
P.16
P.17
P.26
PCI
JFP1
LPC SIO W83627THF
P.14
FWH
P.30
FP_RST#SW_ON#
Keyboard
Mouse
PCIRST_ICH6#
1
P.14
P.14
Floopy Parallel Serial
P.14 P.18 P.18
MSI
Title
Size Document Number R e v
Date: Sheet
MICRO-STAR INt'L CO., LTD.
BLOCK DIAGRAM
MS-7133
232Wednesday, May 11, 2005
of
100
8
7
6
5
4
3
2
1
VID Pull-Up Resistor
CPU SIGNAL BLOCK
R554 X_0/0402
D D
C1 X_0.1u
X_1K/0402
H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3
H_TDI H_TDO H_TMS H_TRST# H_TCK
CPU_BOOT
LL_ID0
H_D#63 H_D#62 H_D#61 H_D#60 H_D#59 H_D#58 H_D#57 H_D#56 H_D#55 H_D#54
7
H_DBI#[0..3]6
H_EDRDY#6
H_IERR#4
H_FERR#4,10
H_STPCLK#10
H_INIT#10
C C
B B
VTT_OUT_RIGHT
H_D#[0..63]6
A A
8
H_DBSY#6 H_DRDY#6 H_TRDY#6
H_ADS#6
H_LOCK#6
H_BNR#6
H_HIT#6
H_HITM#6
H_BPRI#6
H_DEFER#6
10/10 parallel
CPU_TMPA14 VTIN_GND14
TRMTRIP#4,10,14
H_PROCHOT#4
H_IGNNE#10
ICH_H_SMI#10
H_A20M#10
H_SLP#10
R22
LL_ID027
H_FSBSEL04,8,13 H_FSBSEL14,8,13
H_FSBSEL24,8,13
H_PWRGD4,10
H_CPURST#4,6
G11 D19 C20
AB2 AB3
AD3
AD1 AF1 AC1 AG1 AE1 AL1 AK1
AE8 AL2
AH2 AE6 G10
D16 A20
AA2 G29
H30 G30
G23 B22
A22 A19 B19 B21 C21 B18 A17 B16 C18
A8
F2
R3
M3
P3 H4
B2 C1 E3
D2 C3 C2 D4
E4 G8 G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
H_A#[3..31]6
U1A
DBI0# DBI1# DBI2# DBI3#
EDRDY# IERR# MCERR# FERR#/PBE# STPCLK# BINIT# INIT# RSP#
DBSY# DRDY# TRDY#
ADS# LOCK# BNR# HIT# HITM# BPRI# DEFER#
TDI TDO TMS TRST# TCK THERMDA THERMDC THERMTRIP# GND/SKTOCC# PROCHOT# IGNNE# SMI# A20M# SLP#
RSVD RESERVED0 RESERVED1 RESERVED2 RESERVED3 RESERVED4 RESERVED5
BOOTSELECT LL_ID0 LL_ID1
BSEL0 BSEL1 BSEL2
PWRGOOD RESET# D63#
D62# D61# D60# D59# D58# D57# D56# D55# D54#
D53#
B15
H_D#53
D52#
C14
H_D#52
D51#
C15
H_D#51
D50#
A14
H_D#50
D49#
D17
H_D#49
AJ6
A35#
D48#
D20
H_D#48
AJ5
A34#
D47#
G22
H_D#47
AH5
A33#
D46#
D22
H_D#46
AH4
A32#
D45#
E22
H_D#45
H_A#31
AG5
A31#
D44#
G21
H_D#44
H_A#30
AG4
A30#
D43#
F21
H_D#43
6
H_A#29
AG6
A29#
D42#
E21
H_D#42
H_A#28
AF4
A28#
D41#
F20
H_D#41
H_A#27
AF5
A27#
D40#
E19
H_D#40
H_A#26
AB4
A26#
D39#
E18
H_D#39
H_A#25
AC5
A25#
D38#
F18
H_D#38
H_A#24
AB5
A24#
D37#
F17
H_D#37
H_A#23
AA5
G17
H_D#36
H_A#22
AD6
A23#
D36#
G18
H_D#35
H_A#21
AA4
A22#
D35#
E16
H_D#34
H_A#19
H_A#20
A21#
A20#Y4A19#Y6A18#W6A17#
D34#
D33#
E15
G16
H_D#32
H_D#33
H_A#18
H_A#17
H_A#16
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D32#
D31#
D30#
D29#
F15
G15
G14
H_D#29
H_D#31
H_D#30
H_A#15
F14
H_D#28
H_A#14
D28#
G13
H_D#27
H_A#13
D27#
E13
H_D#26
H_A#12
D26#
D13
H_D#25
D25#
H_A#11
D24#
F12
H_D#24
5
H_A#10
U6
F11
H_D#23
H_A#9
D23#
D10
H_D#22
H_A#8
H_A#6
H_A#5
H_A#7
H_A#4
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
E10
H_D#21
H_D#19
H_D#17
H_D#20
H_D#18
H_A#3
L5
H_D#16
D11
H_D#15
FP_RST_R#
AC2
DBR#
D14#
C12
H_D#14
B12
H_D#13
AN3
D13#
H_D#12
AN4
AN5
RSVD
RSVD
D12#D8D11#
B10
C11
H_D#11
H_D#10
AN6
VCC_SENSE
D10#
A11
H_D#9
VSS_SENSE
D9#
AJ3
D8#
A10
H_D#8
H_D#7
FP_RST# VCC_VRM_SENSE VSS_VRM_SENSE
TP_VID6
H_VID4
H_VID5
H_VID3
AM5
AL4
AK4
AK3
ITP_CLK1
AL6
RSVD
VID5#
VID4#
VID3#
ITP_CLK0
TESTHI12 TESTHI11 TESTHI10
ADSTB1# ADSTB0# DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#
LINT1/NMI
LINT0/INTR
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B4
H_D#0
H_D#1
H_D#6
H_D#4
H_D#3
H_D#5
H_D#2
4
H_VID0
H_VID1
H_VID2
AM3
AL5
VID2#
VID1#
GTLREF
BPM5# BPM4# BPM3# BPM2# BPM1# BPM0#
PCREQ#
REQ4# REQ3# REQ2# REQ1# REQ0#
TESTHI9 TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0
RSVD RSVD
BCLK1# BCLK0#
RS2# RS1# RS0#
AP1# AP0# BR0#
COMP3 COMP2 COMP1 COMP0
DP3# DP2# DP1# DP0#
LGA775
AM2
VID0#
H1
AG3 AF2 AG2 AD2 AJ1 AJ2
G5 J6 K6 M6 J5 K4
W2 P1 H5 G4 G3 F24 G24 G26 G27 G25 F25 W3 F26 AK6 G6
G28 F28
A3 F5 B3
U3 U2 F3
R1 G2 T1 A13
J17 H16 H15 J16
AD5 R6 C17 G19 E12 B9 A16 G20 G12 C8
L1 K1
FP_RST# 11,24 VCC_VRM_SENSE 27 VSS_VRM_SENSE 27
H_VID[0..5] 27
CPU_GTLREF
H_BPM#5 H_BPM#4 H_BPM#3 H_BPM#2 H_BPM#1 H_BPM#0
H_PCREQ# H_REQ#4 H_REQ#3 H_REQ#2 H_REQ#1 H_REQ#0
H_TESTHI12 H_TESTHI11 H_TESTHI10 H_TESTHI9 H_TESTHI8
H_RS#2 H_RS#1 H_RS#0
H_COMP3 H_COMP2 H_COMP1 H_COMP0
H_TESTHI2_7 H_TESTHI1 H_TESTHI0 RSVD_AK6 RSVD_G6
R21 100RST/0402 R23 100RST/0402 R24 60.4RST/0402 R25 60.4RST/0402
3
R11 62/0402
R16 62/0402 R17 62/0402 R18 62/0402 R19 X_62/0402 R20 X_62/0402
CPU_GTLREF 4
H_TMS
R534 49.9RST/0402
RN21 8P4R-51/0402
1 2
H_TDO
3 4 5 6
H_TDI
7 8
RN22
7 8 5 6 3 4 1 2
H_PCREQ# 6 H_REQ#[0..4] 6
CK_H_CPU# 13 CK_H_CPU 13
H_RS#[0..2] 6
H_BR#0 4,6
H_ADSTB#1 6 H_ADSTB#0 6 H_DSTBP#3 6 H_DSTBP#2 6 H_DSTBP#1 6 H_DSTBP#0 6 H_DSTBN#3 6 H_DSTBN#2 6 H_DSTBN#1 6 H_DSTBN#0 6
H_NMI 10 H_INTR 10
8P4R-51/0402
VTT_OUT_LEFT
H_TESTHI10
7 8
H_TESTHI11
5 6
H_TESTHI9
3 4
H_TESTHI8
1 2
RN23 8P4R-62/0402
V_FSB_VTT VTT_OUT_LEFT V_FSB_VTT VTT_OUT_RIGHT VTT_OUT_LEFT
MSI
Title
Size Document Number R e v
Date: Sheet
VTT_OUT_RIGHT
RN15
8P4R-680
H_VID3
1
H_VID1 H_VID2 H_VID4 H_VID0 H_VID5
H_TRST# H_TCK
VTT_OUT_RIGHT
C395 0.1u C397 0.1u
VTT_OUT_LEFT 4
V_FSB_VTT 4,6,8,12,13,26,27
VTT_OUT_RIGHT 4
VTT_OUT_LEFT
C2
X_0.1u
PLACE RESISTORS OUTSIDE SOCKET CAVITY IF NO ROOM FOR VARIABLE RESISTOR DON'T PLACE
2
3
4
5
6
7
8
R442 680/0402 R443 680/0402
R531 49.9RST/0402
R535 49.9RST/0402
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - Signals
MS-7133
2
332Wednesday, May 11, 2005
1
100
of
8
VCCP
AG14
AG12
AG11
AF9
AF8
AF22
AF21
U1B
VCCP
D D
C C
AF19 AF18 AF15 AF14 AF12 AF11
AE9 AE23 AE22 AE21 AE19 AE18 AE15 AE14 AE12 AE11
AD8 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23
AC8 AC30 AC29 AC28 AC27 AC26 AC25 AC24 AC23
AB8
AA8
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCC
VCC
Y8
VCCP
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y25
Y26
Y27
Y28
Y29
Y30
7
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
Y23
Y24
W29
W30
W28
W27
W26
W25
W24
W23
U30
U29
U28
U27
U26
U25
AH21
U24
6
AH27
AH26
AH25
AH22
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCN8VCCP8VCCR8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCT8VCC
VCC
T23
T24
T25
T26
T27
T28
T29
U23
T30
N30
N29
N28
N27
N26
AJ26
N25
5
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
VCC
K25
K26
K27
K28
K29
N24
N23
M30
M29
M28
M27
M26
M25
M24
M23
K30
4
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30
K23
K24
3
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
A23
VCCA
B23
VSSA
D23
RSVD
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT
VTT_OUT VTT_OUT
VTT_SEL
LGA775
C23
A25 A26 A27 A28 A29 A30 B25 B26 B27 B28 B29 B30 C25 C26 C27 C28 C29 C30 D25 D26 D27 D28 D29 D30 AM6
AA1 J1 F27
F29
VCC-IOPLL
VTTPWRGD
RSVD/VTT_PKGSENSE
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
J10
J11
J12
J13
AN8
AN9
AN25
AN26
AN29
AN30
2
H_VCCA H_VSSA
H_VCCIOPLL
VCCFUSEPRG VIDFUSEPRG VTT_PWG
VTT_OUT_RIGHT VTT_OUT_LEFT
R29 X_0/0402
V_FSB_VTT
VTT_OUT_RIGHT 3 VTT_OUT_LEFT 3
R28 X_1K/0402
VTT_SEL
1
V_FSB_VTT 3,6,8,12,13,26,27
VCC3
It must close bulk caps.
C407 X_106P/0805
B B
100 OHMS OVER 210 OHMS RESISTORS
VTT_OUT_LEFT
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
R40
49.9RST/0402
R42 100RST/0402
C409 106P/0805
V_FSB_VTT
C410 106P/0805
C5 105P
CPU_GTLREF
C6
X_222P
CPU_GTLREF 3
DC voltag e drop shoul d be less than 70mV.
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT
VTT_OUT_LEFT
A A
V_FSB_VTT
R46 62/0402 R48 120/0402
R49 100RST/0402 R908 62/0402 R909 62/0402
PLACE AT ICH END OF ROUTE
RN24 8P4R-62/0402
V_FSB_VTT
8
12 34 56 78
7
H_CPURST# H_PROCHOT#
H_PWRGD H_BR#0
H_IERR#
TRMTRIP# H_FERR#
H_CPURST# 3,6 H_PROCHOT# 3,19
H_PWRGD 3,10 H_BR#0 3,6 H_IERR# 3
TRMTRIP# 3,10,14 H_FERR# 3, 10
6
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEAJS AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT
5
It support DC current if 125mA.
V_FSB_VTT
VID_GD#26,27
RN25 8P4R-470
12 34 56 78
4
L1 X_10uH/8
S1 X_COPPER
L2 X_10uH/8
VCC5_SB
H_FSBSEL0 H_FSBSEL1 H_FSBSEL2
12
VTT_OUT_LEFT
R45 1K/0402
R43 1K
22u/6.3V/1206
H_FSBSEL0 3,8,13 H_FSBSEL1 3,8,13 H_FSBSEL2 3,8,13
3
H_VCCIOPLL
H_VSSA
EC1
EC2
X_106P/0805
R44
1.25V VTT_PWRGOOD
680/0402
VTT_PWG
SOT23EBC
Q1
MMBT3904
ECB
MSI
Title
Size Document Number R e v
Date: Sheet of
C4
105P
H_VCCA
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - Power
MS-7133
2
432Wednesday, May 11, 2005
1
100
8
AC4
AE3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AE4
RSVD
RSVD
RSVD
VSS
VSS
VSS
VSS
AE5
AE7
AE29
AE30
U1C
D D
C C
A12 A15 A18
A21 A24
AA23 AA24 AA25 AA26 AA27 AA28 AA29
AA3
AA30
AA6 AA7
AB1 AB23 AB24 AB25 AB26 AB27 AB28 AB29 AB30
AB7
AC3 AC6 AC7 AD4
AD7 AE10 AE13 AE16 AE17
AE2 AE20 AE24 AE25 AE26 AE27 AE28
A2
A6 A9
RSVDD1RSVD
VSS
AF10
D14
AF13
VSS
E23
RSVD
VSS
AF16
E24
RSVD
RSVDE5RSVDE6RSVDE7RSVD
VSS
VSS
AF17
AF20
7
F23
VSS
VSS
VSS
AF23
AF24
AF25
B13
RSVDF6RSVD
RSVDH2RSVDJ2RSVDJ3RSVDN4RSVDP5RSVDT2RSVDV1RSVDW1RSVD
VSS
VSS
VSS
VSS
VSS
VSS
AF3
AF26
AF27
AF28
AF29
AF30
AF6
VSS
AF7
VSS
VSS
VSS
AG10
AG13
Y3
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
VSS
VSS
VSS
VSS
AG16
AG17
AG20
AG23
6
V30
V29
V28
V27
V26
V25
V24
V23
VSSV3VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH1
AG7
AH10
AH13
AG24
AH3
AH6
AH7
AJ10
AJ13
AH16
AH17
AH20
AH23
AH24
AJ16
5
R30
R29
R28
R27
R26
R25
R24
R23
P30
P29
P28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AJ17
AJ20
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AK2
AK10
AK13
AK16
AK17
AK20
AK23
AK24
AK27
AK28
VSS
VSS
P27
P26
VSS
VSS
VSS
VSS
AK29
AK30
4
P25
P24
P23
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
AK5
AK7
AL10
AL13
3
H23
H24
H25
H26
H27
H28
VSS
AM7
VSS
H29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AN1
AN2
AN10
AN13
AN16
AN17
AN20
AN23
AN24
AN27
AN28
VSS
VSS
K2
L25
L24
L23
K5
VSS
VSS
VSS
VSSK7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM16
AM17
AM4
AM20
AM23
AM24
AM27
AM28
L30
L29
L28
L27
L26
VSSL3VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL3
AL7
AL16
AL17
AL20
AL23
AM1
AL24
AL27
AL28
AM10
AM13
H22
AN7
VSS
VSS
H21
VSS
VSSB1VSS
H20
B11
VSS
H19
B14
VSS
VSS
H18
VSS
2
H17
VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
LGA775
H14 H13 H12 H11 H10 G1 F7 F4 F22 F19 F16 F13 F10 E8 E29 E28 E27 E26 E25 E20 E2 E17 E14 E11 D9 D6 D5 D3 D24 D21 D18 D15 D12 C7 C4 C24 C22 C19 C16 C13 C10 B8 B5 B24 B20 B17
1
B B
A A
MSI
Title
Size Document Number R e v
8
7
6
5
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - GND
MS-7133
2
532Wednesday, May 11, 2005
100
of
1
8
H_A#[3..31]3
D D
C C
B B
V_2P5_MCH
A A
H_ADSTB#03 H_ADSTB#13
H_PCREQ#3
H_REQ#[0..4]3
H_DEFER#3
H_EDRDY#3
H_RS#[0..2]3
CK_H_MCH#13
H_CPURST#3,4
20RST/0402 R57
V_1P5_CORE
C404 C405
C843 0.1u C844 0.1u
8
H_BR#03,4
H_BPRI#3
H_BNR#3
H_LOCK#3
H_ADS#3
H_HIT#3
H_HITM#3
H_TRDY#3 H_DBSY#3 H_DRDY#3
CK_H_MCH13
PWR_GD26
PLTRST#10
ICH_SYNC#11
R901 X_8.06K/B
V_FSB_VTT3,4,8,12,13,26,27
H_A#3 H_D#0 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_RS#0 H_RS#1 H_RS#2
HRCOMP HSCOMP HSWING
MCH_GTLREF
106P/0805
106P/0805
5 mils trace 8 mils space rout in same layer within 750 mils
V_FSB_VTT HS COMP V_FSB_VTTV_FSB_VTT HSWING MCH_GTLREF
H29 K29
G30 G32 K30
M30
K27 K33
M28
R29 N26
M26
N31 P26 N29 P28 R28 N33 T27 T31 U28 T26 T29
N27 E31
R33 E30
M35
M31
F33 E32 H31 G31 F31
N35
N34
M32
P33 K34
P34
M23 M22
AG7
G24 AF7
M14
B23 D24 A23
A24
U2A
J29
L29 L31
L28 J28
L26
J31
L33
L34 J35
L35
J32
C8 X_2.2P
7
AC11
AB11
Y20
HA3# HA4# HA5# HA6#
VCCNCTF
VCCNCTF
HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31#
HAD_STB0# HAD_STB1# HPCREQ#
BREQ0# BPRI#
BNR# HLOCK# ADS# HREQ0#
HREQ1# HREQ2# HREQ3# HREQ4#
HIT# HITM# DEFER#
HTRDY# DBSY# DRDY# HEDRDY#
RS0# RS1# RS2#
HCLKP HCLKN
PWROK CPURST#
RSTIN# ICH_SYNC#
HDRCOMP HDSCOMP HDSWING
HDVREF
AJ21
R60 60.4RST/0402
7
6
V_1P5_CORE
Y19
Y17
Y16
W20
W16
U20
U16
T20
T19
T17
T16
AA13
AA14
AA16
AA18
AA20
AA21
AA22
AA23
AA24
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
V31
V30
V32
Y30
U30
R31
AJ24
AJ23
AJ18
AL21
AK21
AK24
AJ20
AL20
AK18
R30
AB29
AA31
AA30
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
HD_SWING VOLTAGE "12 MIL TRACE , 10MIL SPACE" HD_SWING S/B 1/4*VTT +/- 2%n
AC20
AB21
AC21
VCCNCTF
RSVRD
AB22
AB23
VCCNCTF
RSVRD
AC22
AB24
N13
VCCNCTF
VCCNCTF
VCCNCTF
NC
N12NCN22NCN23NCN24
N14
5
N15
N16
N18
N20
N21
P13
P14
P15
P17
P19
P21
P22
R13
R14
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
NC
NC
NC
NC
NC
NC
NC
NC
T12
P12NCP23NCP24
R12NCR24
U12
V12
Y12
W12
AA12NCAB12
AC23NCAC24NCAN19
4
R15
R16
R18
R20
R22
R23
T13
T14
T15
T21
T23
T24
U13
U14
U22
U24
V13
V14
V15
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
J12
L19NCL12
P30
K12
AG6
AJ14
AL28
AH24
AD30
H17NCH15NCH12
G12
F24NCF12
E16
3
V21
V23
V24
W13
W14
W22
W24
Y13
Y14
Y15
Y21
Y23
Y24
HD0# HD1# HD2#
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
NC
NC
NC
NC
NC
NC
NC
NCB1NC
B35
C16
AR2NCAR1
AR35NCAR34
A34
AP1
AP35
VCCNCTF
VCCNCTF
VCCNCTF
HD_STBP0# HD_STBN0#
HD_STBP1# HD_STBN1#
HD_STBP2# HD_STBN2#
HD_STBP3# HD_STBN3#
NC
Grantsdale_GL
A2
VCCNCTF
HD3# HD4# HD5# HD6# HD7# HD8#
HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
DINV_0# DINV_1# DINV_2# DINV_3#
J33 H33 J34 G35 H35 G34 F34 G33 D34 C33 D33 B34 C34 B33 C32 B32 E28 C30 D29 H28 G29 J27 F28 F27 E27 E25 G25 J25 K25 L25 L23 K23 J22 J24 K22 J21 M21 H23 M19 K21 H20 H19 M18 K18 K17 G18 H18 F17 A25 C27 C31 B30 B31 A31 B27 A29 C28 A28 C25 C26 D27 A27 E24 B25
E34 J26 K19 B26
E33 E35
H26 F26
J19 F19
B29 C29
H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3
2
H_DSTBP#0 3 H_DSTBN#0 3
H_DSTBP#1 3 H_DSTBN#1 3
H_DSTBP#2 3 H_DSTBN#2 3
H_DSTBP#3 3 H_DSTBN#3 3
1
H_D#[0..63] 3
H_DBI#[0..3] 3
GTLREF VOLTAGE SHOULD BE 0.67*VTT=0.8V
49.9 OHM OVER 100 RESISTORS
R58 301RST/0402
102RST/0402
PLACE DIVIDER RESISTOR NEAR VTT
6
R61
C9 103P
5
R59 49.9RST/0402
R62 100RST/0402
4
C10 X_0.1u
MSI
C11
0.1u
3
Title
Size Document Number R e v
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Grantsdale - CPU Signals
MS-7133
2
632Wednesday, May 11, 2005
100
of
1
8
7
6
5
4
3
2
1
DATA_A34
AN30
AF23
SCKE_A[0..3]20
DATA_A37
DATA_A35
DATA_A38
DATA_A36
AK31
AL27
AJ28
AL30
SADQ34
SADQ35
SADQ36
SADQ37
SBDQ32
SBDQ33
SBDQ34
SBDQ35
AJ26
AL25
AF25
AD23
SADQ38
SBDQ36
DATA_A39
AL31
AF24
SADQ39
SBDQ37
DATA_A40
AJ34
AJ25
DATA_A45
AG32
SADQ42
SBDQ40
AJ29
DATA_A43
AF34
AJ31
DATA_A49
DATA_A48
DATA_A44
DATA_A47
DATA_A46
AJ33
AH33
AF33
AE33
AE35
AE34
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
AF28
AK33
AK32
AG30
AG31
AG27
DATA_A41
DATA_A42
AH35
SADQ40
SADQ41
SBDQ38
SBDQ39
AL26
DATA_A[0..63]20
DATA_A16
DATA_A21
DATA_A6
DATA_A0
DATA_A1
DATA_A3
DATA_A2
D D
SCS_A#[0..3]20
RAS_A#20 CAS_A#20
WE_A#20
MAA_A[0..13]20
SBS_A[0..1]20
C C
B B
DQS_A020 DQS_A120
DQS_A220
DQS_A320
DQS_A420
DQS_A520
DQS_A620 DQS_A720
P_DDR0_A20 N_DDR0_A20
P_DDR1_A20 N_DDR1_A20 P_DDR2_A20 N_DDR2_A20 P_DDR3_A20 N_DDR3_A20 P_DDR4_A20 N_DDR4_A20 P_DDR5_A20 N_DDR5_A20
SCS_A#0 SCS_A#1 SCS_A#2 SCS_A#3
RAS_A# CAS_A# WE_A#
MAA_A0 MAA_A1 MAA_A2 MAA_A3 MAA_A4 MAA_A5 MAA_A6 MAA_A7 MAA_A8 MAA_A9 MAA_A10 MAA_A11 MAA_A12 MAA_A13
SBS_A0 SBS_A1
DQS_A0 DQS_A1 DQS_A2 DQS_A3 DQS_A4 DQS_A5 DQS_A6 DQS_A7
P_DDR0_A N_DDR0_A P_DDR1_A N_DDR1_A P_DDR2_A N_DDR2_A P_DDR3_A N_DDR3_A P_DDR4_A N_DDR4_A P_DDR5_A N_DDR5_A
SM_XSLEWIN
MCH_VREF_A SMPCOMP_P
SMPCOMP_N
AM34 AL35 AK34 AL33
AN29 AL34 AP31
AN22 AP22 AN21 AP21 AM21 AP19 AR20 AN16 AN18 AM15 AN23 AP15 AP13 AB33
AP33 AR24 AR28 AR29
AN28 AP26 AR23
AG1 AG2
AP7
AR7 AF17 AG17 AM30 AL29 AG35 AG33 AA34 AA35
U34
U35 AM24
AN25
AN2
AN3 AB34 AC33 AP25 AN26
AM2
AM3 AC35 AC34
AN31 AH15 AE16 AJ12 AK12
AE7
AG8
AG4
AE5
AF5
AL3 AL2
U2B
Grantsdale_GL
SACS0# SACS1# SACS2# SACS3#
SARAS# SACAS# SAWE#
SAMA0 SAMA1 SAMA2 SAMA3 SAMA4 SAMA5 SAMA6 SAMA7 SAMA8 SAMA9 SAMA10 SAMA11 SAMA12 SAMA13
RSV RSV RSV RSV
SABA0 SABA1 RSV
SADQS0 RSV SADQS1 RSV SADQS2 RSV SADQS3 RSV SADQS4 RSV SADQS5 RSV SADQS6 RSV SADQS7 RSV
SACK0 SACK0# SACK1 SACK1# SACK2 SACK2# SACK3 SACK3# SACK4 SACK4# SACK5 SACK5#
RSV RSV_TP1 RSV_TP0 SMXSLEWIN SMXSLEWOUT
SMVREF0 SRCOMP1
SRCOMP0 RSV RSV
AE3
AF3
AH2
AJ2
SADQ0
SADQ1
SADQ2
SBDQ0
AJ6
AH7
DATA_A10
DATA_A8
DATA_A7
DATA_A9
DATA_A4
DATA_A5
AE2
AE1
AG3
AH3
AJ1
AK2
AN4
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
AJ7
AL5
AL6
AN6
AH4
AG9
AM5
DATA_A17
DATA_A14
DATA_A15
DATA_A12
DATA_A11
DATA_A13
AP4
AJ3
AK3
AP2
AP3
AP5
AR5
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
AJ8
AL7
AL8
AF11
AE11
AG10
AG11
DATA_A24
AN8
AE13
SADQ18
SBDQ16
DATA_A19
AP9
AF13
SADQ19
SBDQ17
DATA_A20
AN5
AG14
DATA_A25
DATA_A26
DATA_A22
DATA_A23
AP6
AR8
AN9
AK16
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
AF14
AD14
AD12
AH12
AL17
AD15
DATA_A32
DATA_A31
DATA_A27
DATA_A29
DATA_A33
DATA_A30
DATA_A28
AD17
AF19
AF16
AJ17
AE19
AH18
AH27
AK27
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
AL18
AF22
AK19
AE22
AD18
AH21
AH19
AD21
DATA_A18
SADQ17
SBDQ15
DATA_A50
Y33
AE31
DQM_A[0..7]20
FOR DDR1
DQM_A6
DQM_A1
DQM_A4
DQM_A2
DQM_A7
DQM_A3
DQM_A5
T35
AA28
DQM_A0
SCKE_A1
SCKE_A3
SCKE_A0
SCKE_A2
AF2
AL1
AN7
AH16
AK29
AG34
AA33
AL12
AN11
AP11
AR11
SADQ63
SACKE0
SACKE1
SACKE2
SACKE3
SBDQ61
SBDQ62
SBDQ63
SBCKE0
SBCKE1
SBCKE2
V28
AR9
W26
AM9
AP10
AN10
U33
SBCS0# SBCS1#
SADM0
SADM1
SADM2
SBCS2#
SADM3
SADM4
SADM5
SADM6
SADM7
SBCS3# SBRAS#
SBCAS#
SBWE# SBMA0
SBMA1 SBMA2 SBMA3 SBMA4 SBMA5 SBMA6 SBMA7 SBMA8
SBMA9 SBMA10 SBMA11 SBMA12 SBMA13
SBBA0 SBBA1
SBDQS0 SBDQS1 SBDQS2 SBDQS3 SBDQS4 SBDQS5 SBDQS6 SBDQS7
SBCK0 SBCK0#
SBCK1 SBCK1#
SBCK2 SBCK2#
SBCK3 SBCK3#
SBCK4 SBCK4#
SBCK5 SBCK5#
RSV_TP3 RSV_TP2
SMYSLEWIN
SMYSLEWOUT
SMVREF1
SBCKE3
SBDM0
SBDM1
SBDM2
SBDM3
SBDM4
SBDM5
SBDM6
SBDM7
AJ5
AH9
W31
AH13
AH31
AD24
AG20
AG24
RSV RSV RSV RSV
RSV
RSV RSV RSV RSV RSV RSV RSV RSV
RSV
AP34 AN34 AN33 AM33
AP27 AN27 AR27
AM18 AP18 AN17 AR16 AR15 AN15 AP17 AL15 AP14 AN13 AN20 AR12 AM12 AD32
AN32 AP29 AP30 AP32
AM27 AR19 AP23
AK5 AL4 AK10 AH10 AK13 AL14 AD20 AF20 AH25 AG26 AH28 AH30 AB31 AC30 W27 Y28
AH22 AG23 AL11 AJ11 AE26 AE25 AL23 AK22 AK9 AL9 AD29 AD28
AL24 AK15 AN14 AF9 AE10
AE8
SCS_B#0 SCS_B#1 SCS_B#2 SCS_B#3
RAS_B# CAS_B# WE_B#
MAA_B0 MAA_B1 MAA_B2 MAA_B3 MAA_B4 MAA_B5 MAA_B6 MAA_B7 MAA_B8 MAA_B9 MAA_B10 MAA_B11 MAA_B12 MAA_B13
SBS_B0 SBS_B1
DQS_B0 DQS_B1 DQS_B2 DQS_B3 DQS_B4 DQS_B5 DQS_B6 DQS_B7
P_DDR0_B N_DDR0_B P_DDR1_B N_DDR1_B P_DDR2_B N_DDR2_B P_DDR3_B N_DDR3_B P_DDR4_B N_DDR4_B P_DDR5_B N_DDR5_B
SM_YSLEWIN
MCH_VREF_A
SCS_B#[0..3] 21
RAS_B# 21 CAS_B# 21 WE_B# 21
MAA_B[0..13] 21
SBS_B[0..1] 21
DQS_B0 21 DQS_B1 21 DQS_B2 21 DQS_B3 21 DQS_B4 21 DQS_B5 21 DQS_B6 21 DQS_B7 21
P_DDR0_B 21 N_DDR0_B 21 P_DDR1_B 21 N_DDR1_B 21 P_DDR2_B 21 N_DDR2_B 21 P_DDR3_B 21 N_DDR3_B 21 P_DDR4_B 21 N_DDR4_B 21 P_DDR5_B 21 N_DDR5_B 21
DATA_A56
DATA_A61
Y35
SADQ55
SBDQ53
AE27
DATA_A62
DATA_A57
DATA_A60
DATA_A58
DATA_A63
DATA_A59
V34
V33
R32
R34
W35
W33
T33
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
V29
Y26
U26
W29
AA29
AC28
AC26
DATA_A53
DATA_A54
DATA_A55
DATA_A52
DATA_A51
W34
AD31
AD35
AA32
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
AF27
AB27
AB26
AE29
SCKE_B0
SCKE_B2
SCKE_B1
DATA_B42
DATA_B4
DATA_B5
DATA_B3
DATA_B0
DATA_B[0..63]21
DATA_B7
DATA_B2
DATA_B6
DATA_B1
DATA_B14
DATA_B15
DATA_B21
DATA_B23
DATA_B11
DATA_B17
DATA_B10
DATA_B8
DATA_B12
DATA_B13
DATA_B9
DATA_B20
DATA_B16
DATA_B18
DATA_B19
DATA_B27
DATA_B24
DATA_B22
DATA_B25
DATA_B26
DATA_B34
DATA_B32
DATA_B35
DATA_B36
DATA_B31
DATA_B30
DATA_B28
DATA_B29
DATA_B39
DATA_B33
DATA_B37
DATA_B38
CPU STRAPPING RESISTORS
ALL COMPONENTS CLO SE TO CPU
V_SM
R538
A A
80.6RST/0402
C403
0.1u
R537 80.6RST/0402
SMPCOMP_N
SMPCOMP_P
V_SM
R546 1KST/0402
DATA_B46
DATA_B47
DATA_B48
DATA_B40
DATA_B45
DATA_B41
DATA_B43
DATA_B44
R548 1KST/0402
DATA_B52
DATA_B49
DATA_B54
DATA_B51
DATA_B50
DATA_B53
SCKE_B[0..3]21
DQM_B[0..7]21
DATA_B55
DATA_B57
DATA_B56
DATA_B61
DATA_B58
DATA_B60
DATA_B59
MCH_VREF_A
C13
0.1u
SCKE_B3
DATA_B63
DATA_B62
PLACE 0.1UF CAP CLOSE TO MCH
C12
0.1u
PLACE CLOSE TO MCH
8
7
6
5
4
DQM_B5
DQM_B4
DQM_B6
DQM_B0
DQM_B1
DQM_B2
DQM_B7
DQM_B3
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Do c ument Nu m b e r Re v
3
Date: Sheet
Intel Grants d a le - Memory Sig nals
MS-7133
2
100
of
732Wednesday, May 11, 2005
1
8
7
6
5
4
3
2
1
V_1P5_CORE
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AC10
AC9
AC8
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AB10
AB9
AB8
AB7
AB6
AB5
AB4
AB3
VCC
VTT
B20
B19
VCC
VCC
VCC
VTT
VTT
VTT
A22
A21
V_1P5_CORE
V_1P5_CORE
AB2
VCC
VCC
VCC
VCC
VTT
VTT
A20
A19
EXP_A_RXP_019 EXP_A_RXN_019 EXP_A_RXP_119
V_2P5_MCH
V_2P5_DAC_FILTERED29
V_1P5_CORE
V_1P5_CORE
EXP_A_RXN_119 EXP_A_RXP_219 EXP_A_RXN_219 EXP_A_RXP_319 EXP_A_RXN_319 EXP_A_RXP_419 EXP_A_RXN_419 EXP_A_RXP_519 EXP_A_RXN_519 EXP_A_RXP_619 EXP_A_RXN_619 EXP_A_RXP_719 EXP_A_RXN_719 EXP_A_RXP_819 EXP_A_RXN_819 EXP_A_RXP_919 EXP_A_RXN_919
EXP_A_RXP_1019
EXP_A_RXN_1019
EXP_A_RXP_1119
EXP_A_RXN_1119
EXP_A_RXP_1219
EXP_A_RXN_1219
EXP_A_RXP_1319
EXP_A_RXN_1319
EXP_A_RXP_1419
EXP_A_RXN_1419
EXP_A_RXP_1519
EXP_A_RXN_1519
DMI_ITP_MRP_010
DMI_ITN_MRN_010
DMI_ITP_MRP_110
DMI_ITN_MRN_110
DMI_ITP_MRP_210
DMI_ITN_MRN_210
DMI_ITP_MRP_310
DMI_ITN_MRN_310
CK_PE_100M_MCH13
CK_PE_100M_MCH#13
SDVO_CTRL_DATA19
SDVO_CTRL_CLK19
R544 X_1K/0402 R545 X_1K/0402
C22 0.1u
L55
0.1uH/.22A/6
X_100u/16V/6*5
D D
C C
B B
A A
EXP_A_RXP_0 EXP_A_RXN_0 EXP_A_RXP_1 EXP_A_RXN_1 EXP_A_RXP_2 EXP_A_RXN_2 EXP_A_RXP_3 EXP_A_RXN_3 EXP_A_RXP_4 EXP_A_RXN_4 EXP_A_RXP_5 EXP_A_RXN_5 EXP_A_RXP_6 EXP_A_RXN_6
EXP_A_RXN_7 EXP_A_TXP_6 EXP_A_RXN_8
EXP_A_RXP_9 EXP_A_RXN_9 EXP_A_RXP_10 EXP_A_RXN_10 EXP_A_RXP_11
EXP_A_RXP_12 EXP_A_RXN_12 EXP_A_RXP_13 EXP_A_RXN_13 EXP_A_RXP_14 EXP_A_RXN_14 EXP_A_RXP_15 EXP_A_RXN_15
DMI_ITP_MRP_0 DMI_ITN_MRN_0 DMI_ITP_MRP_1 DMI_ITN_MRN_1 DMI_ITP_MRP_2 DMI_ITN_MRN_2 DMI_ITP_MRP_3 DMI_ITN_MRN_3
CK_PE_100M_MCH CK_PE_100M_MCH#
SDVO_CTRL_DATA SDVO_CTRL_CLK
BSEL0 BSEL1 BSEL2
MTYPE EXP_SLR
V_1P5_CORE
VCCA_HPLLVCCA_HPLL VCCA_MPLL VCCA_DPLLA VCCA_DPLLB VCCA_GPLL
V_2P5_MCH
V_2P5_DAC_FILTERED
+
C723
0.1u
CT32
V_2P5_DAC_FILTERED
S3 X_COPPER
12
L29 X_0/0805
S5 X_COPPER
12
L32 OPTION 0 ohm
U2C
E11
EXPARXP0
F11
EXPARXN0
J11
EXPARXP1
H11
EXPARXN1
F9
EXPARXP2
E9
EXPARXN2
F7
EXPARXP3
E7
EXPARXN3
B3
EXPARXP4
B4
EXPARXN4
D5
EXPARXP5
E5
EXPARXN5
G6
EXPARXP6
G5
EXPARXN6
H8
EXPARXP7
H7
EXPARXN7
J6
EXPARXP8
J5
EXPARXN8
K8
EXPARXP9
K7
EXPARXN9
L6
EXPARXP10
L5
EXPARXN10
P10
EXPARXP11
R10
EXPARXN11
M8
EXPARXP12
M7
EXPARXN12
N6
EXPARXP13
N5
EXPARXN13
P7
EXPARXP14
P8
EXPARXN14
R6
EXPARXP15
R5
EXPARXN15
U5
DMI RXP0
U6
DMI RXN0
T9
DMI RXP1
T8
DMI RXN1
V7
DMI RXP2
V8
DMI RXN2
V10
DMI RXP3
U10
DMI RXN3
A11
GCLKINP
B11
GCLKINN
K13
SDVOCTRLDATA
J13
SDVOCTRLCLK
H16
BSEL0
E15
BSEL1
D17
BSEL2
M16
RSV
F15
RSV
C15
MTYPE
A16
EXP_SLR
B15
RSV
C14
RSV
K15
RSV
L10
VCC
M10
VSS
A17
VCCAHPLL
B17
VCCAMPLL
A12
VCCADPLLA
B13
VCCADPLLB
A14
VCCA3GPLL
A13
VCCHV
E13
VCCACRTDAC
D13
VCCACRTDAC
F13
VSSACRTDAC
C724 103P
L29 OPTION 0 ohm
C399 X_224P
VCC
VCC
VCC
VCC
VTT
VTT
VTT
H22
G22
G21
VCCA_HPLL
C525
X_106P/0805
VCCA_MPLL
C527
X_106P/0805
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
F22
F21
F20
E22
E21
E20
E19
D22
V_FSB_VTT3,4,6,12,13,26,27
B22
D21
B21
D20
D19
C22
C21
C20
C19
V_FSB_VTT
I=45mA
C394
0.1u
I=60mA
C400
0.1u
V_SM
AR33
AR31
AR26
AR22
AR18
AR14
AR10
AP28
AP24
AP20
AP16
AP12
AN35
AM32
AM28
AM26
AM25
AM23
AM22
AM20
AM19
AM17
AM16
AM14
AM13
AM11
AM10
VCCSM
VSSNCTF
AA17
AA19
VCCSM
VCCSM
VSSNCTF
VSSNCTF
N17
AK35
VCC3GW1VCC3GW2VCC3GW3VCC3GW4VCC3GW6VCC3GW7VCC3GW8VCC3GW9VCC3GY1VCC3GY2VCC3GY3VCC3GY4VCC3GY5VCC3GY6VCC3GY7VCC3GY8VCC3G
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
T22
P16
P18
P20
N19
R17
R19
R21
U15
U21
U23
VCCA_DPLLA
C526
X_106P/0805
VCCA_DPLLB
C528
X_106P/0805
I=55mA
C396
0.1u
I=55mA
C398
0.1u
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
V22
Y22
W15
W21
W23
AB1
W18
V19
V17
U18
VCC
VCC
VCC
VCC
VCC
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
T25
T18
V20
V16
V11
U25
U11
S4 X_COPPER
12
L30 X_0/0805
S6 X_COPPER
12
L31 X_0/0805 R530 1RSTL32 X_0/0805
T11
P25
P11
R25
R11
N25
N11
M11
AA15
AD25
Y25
Y18
Y11
V25
W25
W11
AB25
AA25
AA11
AC25
VSSNCTF
Grantsdale_GL
V_1P5_PCIEXPRESS
Y9
EXPATXP0 EXPATXN0 EXPATXP1 EXPATXN1 EXPATXP2 EXPATXN2 EXPATXP3 EXPATXN3 EXPATXP4 EXPATXN4 EXPATXP5 EXPATXN5 EXPATXP6 EXPATXN6 EXPATXP7 EXPATXN7 EXPATXP8 EXPATXN8 EXPATXP9
EXPATXN9 EXPATXP10 EXPATXN10 EXPATXP11 EXPATXN11 EXPATXP12 EXPATXN12 EXPATXP13 EXPATXN13 EXPATXP14 EXPATXN14 EXPATXP15 EXPATXN15
DMI TXP0 DMI TXN0 DMI TXP1 DMI TXN1 DMI TXP2 DMI TXN2 DMI TXP3 DMI TXN3
EXPACOMPO
EXPACOMPI
CRTHSYNC CRTVSYNC
CRTRED
CRTGREEN
CRTBLUE
CRTREDB
CRTGREENB
CTRBLUEB
CRTDDCDATA
CRTDDCCLK DREFCLKINP
DREFCLKINN
CRTIREF
PMEXTTS
PMBMBUSY#
TESTIN#
MCHDETECT
V_1P5_CORE
C10 C9 A9 A8 C8 C7 A7 A6 C6 C5 C2 D2 E3 F3 F1 G1 G3 H3 H1 J1 J3 K3 K1 L1 L3 M3 M1 N1 N3 P3 P1 R1
R3 T3 T1 U1 U3 V3 V5 W5
Y10 W10
E12 D12
F14 D14 H14
G14 E14 J14
L14 M15
M13 M12
A15
EXTTS
K16 G16 R35
A35
V_1P5_CORE
L28 1UH/0805/0.5A
R65 24.9RST
EXP_A_TXP_0 EXP_A_TXN_0 EXP_A_TXP_1 EXP_A_TXN_1 EXP_A_TXP_2 EXP_A_TXN_2 EXP_A_TXP_3 EXP_A_TXN_3 EXP_A_TXP_4 EXP_A_TXN_4 EXP_A_TXP_5 EXP_A_TXN_5EXP_A_RXP_7
EXP_A_TXN_6EXP_A_RXP_8 EXP_A_TXP_7 EXP_A_TXN_7 EXP_A_TXP_8 EXP_A_TXN_8 EXP_A_TXP_9 EXP_A_TXN_9 EXP_A_TXP_10EXP_A_RXN_11 EXP_A_TXN_10 EXP_A_TXP_11 EXP_A_TXN_11 EXP_A_TXP_12 EXP_A_TXN_12 EXP_A_TXP_13 EXP_A_TXN_13 EXP_A_TXP_14 EXP_A_TXN_14 EXP_A_TXP_15 EXP_A_TXN_15
DMI_MTP_IRP_0 DMI_MTN_IRN_0 DMI_MTP_IRP_1 DMI_MTN_IRN_1 DMI_MTP_IRP_2 DMI_MTN_IRN_2 DMI_MTP_IRP_3 DMI_MTN_IRN_3
GRCOMP
HSYNC VSYNC
VGA_RED VGA_GREEN VGA_BLUE
REDB GREENB BLUEB
MCH_DDC_DATA MCH_DDC_CLK
CK_96M_DREF CK_96M_DREF#
R895 25 5/6/1 R64 10K
S2 X_COPPER
L34 X_0/0805
GRCOMP
EXP_A_TXP_0 19 EXP_A_TXN_0 19 EXP_A_TXP_1 19 EXP_A_TXN_1 19 EXP_A_TXP_2 19 EXP_A_TXN_2 19 EXP_A_TXP_3 19 EXP_A_TXN_3 19 EXP_A_TXP_4 19 EXP_A_TXN_4 19 EXP_A_TXP_5 19 EXP_A_TXN_5 19 EXP_A_TXP_6 19 EXP_A_TXN_6 19 EXP_A_TXP_7 19 EXP_A_TXN_7 19 EXP_A_TXP_8 19 EXP_A_TXN_8 19 EXP_A_TXP_9 19 EXP_A_TXN_9 19 EXP_A_TXP_10 19 EXP_A_TXN_10 19 EXP_A_TXP_11 19 EXP_A_TXN_11 19 EXP_A_TXP_12 19 EXP_A_TXN_12 19 EXP_A_TXP_13 19 EXP_A_TXN_13 19 EXP_A_TXP_14 19 EXP_A_TXN_14 19 EXP_A_TXP_15 19 EXP_A_TXN_15 19
DMI_MTP_IRP_0 10 DMI_MTN_IRN_0 10 DMI_MTP_IRP_1 10 DMI_MTN_IRN_1 10 DMI_MTP_IRP_2 10 DMI_MTN_IRN_2 10 DMI_MTP_IRP_3 10 DMI_MTN_IRN_3 10
HSYNC 29 VSYNC 29
VGA_RED 29 VGA_GREEN 29 VGA_BLUE 29
MCH_DDC_DATA 29 MCH_DDC_CLK 29
CK_96M_DREF 13 CK_96M_DREF# 13
V_2P5_MCH
12
+
CT24 470u/10V/6.3*11.5
VCCA_GPLL_R VCCA_GPLL
915G R895; STUFF 915P R895; NO STUFF
V_1P5_PCIEXPRESS
R691 1RST
ANALOG FILTERS
C14 104P/0805 C16 56P C18 68P C23 100P/0805
CK_96M_DREF
VGA_BLUE VGA_RED VGA_GREEN
HSYNC VSYNC MCH_DDC_CLK MCH_DDC_DATA
CK_96M_DREF#
H_FSBSEL03,4,13 H_FSBSEL13,4,13 H_FSBSEL23,4,13
BSEL
2
0
0
0
C411
106P/0805
C412 106P/0805
C392 X_106P/0805
V_SM V_SM
C15 56P C17 104P/0805 C19 100P/0805 C24 X_106P/0805
FOR 915P
V_2P5_MCH
R3 X_0
RN132 X_8P4R-0R
1 2 3 4
1
0
0
1
C393
0.1u
0
0
1
0
I=45mA
5 6 7 8 1 2 3 4 5 6 7 8
RN141 X_8P4R-0R
R924 X_0
V_FSB_VTT
PSB FREQUENCY
RESERVED
133 MHZ (533)
200 MHZ (800)
C20 X_0.1u
H_FSBSEL0 H_FSBSEL1 H_FSBSEL2
TABLE
V_2P5_MCH
7 8 5 6 3 4 1 2
C21
0.1u
RN56
8P4R-10K
R563 X_2.49K
R564 X_2.49K
R565 X_2.49K
BSEL0
BSEL1
BSEL2
MICRO-STAR INt'L CO., LTD.
MSI
Title
Intel Grants d al e P C I- E x pr es s & R BG Signals
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet
2
MS-7133
832Wednesday, May 11, 2005
1
100
of
8
7
6
5
4
3
2
1
D D
C C
B B
A A
A10 A18 A26 A30 A33
B10 B12 B14 B16 B18 B24 B28
C11 C13 C17 C18 C23 C35
D10 D11 D15 D16 D18 D23 D25 D26 D28 D30 D31 D32
E10 E17 E18 E23 E26 E29
F10 F16 F18 F23 F25 F29 F30 F32 F35
AR30
AR25
AR21
AR17
AR13
AR6
AR3
AP8
AN1
AM31
AM29
AM8
AM7
AM6
AM4
AL32
AL22
AL19
AL16
AL13
AL10
AK30
AK28
AK26
AK25
AK23
AK20
AK17
AK14
AK11
AK8
AK7
AK6
AK4
AK1
AJ35
AJ32
AJ30
AJ27
AJ22
AJ19
AJ16
AJ15
AJ13
AJ10
AJ9
AJ4
AH34
AH32
AH29
AH26
AH23
AH20
AH17
AH14
AH11
AH8
AH6
AH5
AH1
AG29
AG28
AG25
AG22
AG21
AG19
AG18
AG16
AG15
AG13
AG12
AG5
AF35
AF32
AF31
AF30
AF29
AF26
AF21
AF18
AF15
AF12
AF10
AF8
AF6
AF4
AF1
AE32
AE30
AE28
AE24
AE23
AE21
AE20
AE18
AE17
AE15
AE14
AE12
AE9
AE6
AE4
AD34
AD27
AD26
AD22
VSS
VSS
P27
VSS
VSS
VSS
VSS
VSS
P29
P31
AD19
VSS
VSS
AD16
VSS
AD13
VSS
AD11
VSS
AC32
VSS
AC31
VSS
AC29
VSS
AC27
VSS
AB35
VSS
AB32
VSS
AB30
VSS
AB28
VSS
AA27
VSS
AA26
VSS
AA10
VSS
AA9
VSS
AA8
VSS
AA7
VSS
AA6
VSS
AA5
VSS
AA4
VSS
AA3
VSS
AA2
VSS
AA1
VSS
Y34
VSS
Y32
VSS
Y31
VSS
Y29
VSS
Y27
VSS
W32
VSS
W30
VSS
W28
VSS
W19
VSS
W17
VSS
V35
VSS
V27
VSS
V26
VSS
V18
VSS
V9
VSS
V6
VSS
V4
VSS
V2
VSS
V1
VSS
U32
VSS
U31
VSS
U29
VSS
U27
VSS
U19
VSS
U17
VSS
U9
VSS
U8
VSS
U7
VSS
U4
VSS
U2
VSS
T34
VSS
T32
VSS
T30
VSS
T28
VSS
T10
VSS
T7
VSS
T6
VSS
T5
VSS
T4
VSS
T2
VSS
R27
VSS
R26
VSS
R9
VSS
R8
VSS
R7
VSS
R4
VSS
R2
VSS
P35
VSS
P32
VSS
Grantsdale_GL
U2D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N28
VSS
VSS
N30
VSS
VSS
VSSP2VSSP4VSSP5VSSP6VSSP9VSS
N32
A3
VSS
A5
VSS VSS VSS VSS VSS VSS
B2
VSS
B5
VSS
B6
VSS
B7
VSS
B8
VSS
B9
VSS VSS VSS VSS VSS VSS VSS VSS
C1
VSS
C3
VSS
C4
VSS VSS VSS VSS VSS VSS VSS
D3
VSS
D4
VSS
D6
VSS
D7
VSS
D8
VSS
D9
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
E1
VSS
E2
VSS
E4
VSS
E6
VSS
E8
VSS VSS VSS VSS VSS VSS VSS
F2
VSS
F4
VSS
F5
VSS
F6
VSS
F8
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSSG2VSSG4VSSG7VSSG8VSSG9VSS
G10
G11
VSS
G13
VSS
G15
VSS
G17
VSS
G19
VSS
G20
VSS
VSS
G23
G26
VSS
VSS
G27
VSS
VSSH2VSSH4VSSH5VSSH6VSSH9VSS
G28
H10
H13
VSS
H21
VSS
H24
VSS
H25
VSS
VSS
H27
H30
VSS
VSS
H32
VSS
VSSJ2VSSJ4VSSJ7VSSJ8VSSJ9VSS
H34
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSK2VSSK4VSSK5VSSK6VSSK9VSS
J10
J15
J16
J17
J18
J20
J23
J30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSL2VSSL4VSSL7VSSL8VSSL9VSS
K10
K11
K14
K20
K24
K26
K28
K31
K32
K35
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSM2VSSM4VSSM5VSSM6VSSM9VSS
L11
L13
L15
L16
L17
L18
L20
L21
L22
L24
L27
L30
L32
M17
M20
VSS
M24
VSS
M25
VSS
M27
VSS
M29
VSS
VSS
M34
VSSN2VSSN4VSSN7VSSN8VSSN9VSS
N10
MSI
Title
Size Document Number R e v
8
7
6
5
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Grantsdale - GND
MS-7133
2
932Wednesday, May 11, 2005
100
of
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