8
7
6
5
4
3
2
1
MS-7112
Cover Sheet
Block Diagram
D D
* AMD K8 Socket754
*SIS 760GX + 964
*REALTEK RTL8201CL LAN
*Winbond 83687THF I/O
*USB 2.0 support x8
*ALC 655 AC97 CODEC
MAIN CLOCK GEN
AMD K8 Socket754
DDR SLOT 1, 2
DDR TERMINATOR
SIS 760GX
SIS 964
AGP SLOT
C C
ERP BOM Function Description
PCI SLOT 1, 2 & CNR
LAN RTL8201CL
PS2 & VGA Connectors
IDE CONNECTORS
USB CONNECTORS
AC'97 CODEC
1
2
3
4 - 6
7
8 - 9
10 - 13
14 - 17
18
19
20
21
22
23
24
LPC SI/O W83687THF
B B
PARALLEL & SERIAL Ports
Regulators & Fan Connectors
ACPI CONTROLLER
VRM N2101
ATX POWER CON & FRONT PANEL
Decoupling Capacitor
A A
Micro-Star
Document Number
Last Revision Date:
8
7
6
5
4
3
Monday, August 23, 2004
2
Title
MS-7112
Cover Sheet
25
26
27
28
29
30
31
Sheet of
131
1
Rev
0A
5
4
3
2
1
GPIO Table on SIS964
GPIO_0
GPIO_1
System Block Diagram
D D
DDR SDRAM
K8 754
DDR1 DDR2
RTT
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPI_7 RESUME
GPI_8 RING
GPI_9
GPI_10
Host Bus
Support Dual Monitor
VGA
1.5 V ONLY
AGP SLOT
SIS 760GX
C C
GPIO_11
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
Support Max to six-PCI Devices
HYPERZIP
ANALOG IN
GPIO_22
GPIO_23
GPIO_24
MAIN
I/O
MAIN
I/O
I/O
MAIN
I/O
MAIN
MAIN
I/O
MAIN
I/O
MAIN
I/O
I/O
I/O
RESUME
I/O
RESUME
I/O
RESUME
I/O
RESUME
I/O
I/O
RESUME
I/O
RESUME
I/O
RESUME
O
RESUME
O
RESUME
O
RESUME
MAIN
OD
MAIN
OD
I
RESUME
I
RESUME
I
RESUME
I RESUME
NC
CPU fan initia l speed control reserved
THERM#
GPIO3, pull-down reserved
GPIO4, pull-down reserved
NC
NC
NC
NC
NC
NC
NCGPIO_12 RESUME
NC
S3AUXSW#
KBDAT
KBCLK
MSDAT
MSCLK
SMBCLK
SMBDAT
EESK
EEDI
DDEO
EECS
PCI SLOT 2 PCI SLOT 1
AC'97
AUDIO CODEC
SIS 964
IDE 1
B B
IDE 2
KEYBOARD
/MOUSE
Lan
FAN1 FAN2
PS/2
FAN CONTROL
MII
LPC BUS
H/W MONITOR
USB 0
USB 1
LPC SUPER I/O
LEGACY
ROM
GPIOS IR/CIR
A A
5
4
C O M P RINTER FLOPPY
ANALOG OUT
MIC
USB 2 USB 3
USB 5
SATA_1
3
USB 4
SATA_2
USB 6
USB 7
PCI Config.
DEVICE
PCI Slot 2
PIRQ#B
PIRQ#C
PIRQ#D
PIRQ#A
PIRQ#C
PIRQ#D
PIRQ#A
PIRQ#B
PCI RESET DEVICE
Signals
PCIRST#1
PCIRST_964
HDDRST#
2
Northbridge,S/IO
PCI1~2PCIRST#2
AGP
Primary, Sco n dary IDE
Target
IDSEL
PCI_REQ#0PCI Slot 1 AD17
CLOCKREQ#/GNT#MCP1 INT Pin
PCICLK1
PCI_GNT#0
PCI_REQ#1 AD18 PCICLK2
PCI_GNT#1
Micro-Star
Document Number
Last Revision Date:
Monday, August 23, 2004
Title
MS-7112
System Block Diagram
Sheet of
1
231
Rev
0A
5
4
3
2
1
VCC3
L13
1uH-1206-1A
D D
CE2
10U/0805
C C
B B
CB65
104P
CB64
104P
VCC3_DVDD
CB51
104P
CB55
104P
VCC3
CB63
104P
FB12
120_600mA
CE1
10U/0805
CB62
104P
CB53
104P
VCC3
VCC3_AVDD
CB54
C1000p50x
R190
X_10K
CB61
X_104P
Reset#
CB52
104P
U10
1
VDDREF
11
VDDZ
12
VDDPCI
19
VDDPCI
28
AVDD48
29
VDDAGP
39
VDDCPU
47
VDDSRC
5
GNDREF
8
GNDZ
18
GNDPCI
24
GNDPCI
25
GND48
32
GNDAGP
40
GNDCPU
44
GND
48
Reset#
36
AVDD
*12_48MHz/SEL_12_48MHz
**~24_48MHz/SEL_24_48MHz
35
* INTERNAL PULL-HIGH Resistor
AGND
** INTERNAL PULL-lOW Resistor
~ This output have 1.5X Drive Strength
RTM862-760
X1
6
C280
27P
14M-32pf-HC49S-D
Trace Width 10mils.
Y2
SRCCLKT
SRCCLKC
IREF
CPUCLK8T1
CPUCLK8C1
CPUCLK8T0
CPUCLK8C0
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
~**FS0/REF0
~*FS1/REF1
**Mode/REF2
**FS2/PCICLK_F0
**FS3/PCICLK_F1
PCICLK0
PCICLK1
*(PCI_STOP#)/PCICLK3
*(CPU_STOP#)/PCICLK4
*(CLK_STOP#)/PCICLK5
PCICLK2
PCICLK6
SCLK
SDATA
X2
7
C271
27P
SATACLKC
46
SATACLKC-
45
IREF
43
CPUCLK1C_H
42
CPUCLK1C_L
41
CPUCLK0C_H
38
CPUCLK0C_L
37
AGPCLKC0
31
AGPCLKC1
30
ZCLKC0
9
ZCLKC1
10
FS0
2
FS1
3
Mode
4
FS2
14
FS3
15
PCICLKC1 PCICLK1
16
PCICLKC2
17
20
21
22
23
13
SEL12_48M
27
SEL_24_48
26
34
33
Damping Resistors
Place near to the
Clock Outputs
R180 33
R170 33
R176
R177
R178
R182
R183
R185
R184
R229
R230
7 8
5 6
3 4
1 2
RN71 22_8P4R
7 8
5 6
3 4
1 2
RN70
R197
R203
CP59 X_Copper
33_8P4R
R191
22
22
CP61X_Copper
475RST
15
15
15
15
22
22
22
22
SMBCLK 7,15,19,28
SMBDAT 7,15,19,28
SATACLK 16
SATACLK- 16
CPUCLK1 10
CPUCLK-1 10
CPUCLK0 5
CPUCLK-0 5
AGPCLK0 10
AGPCLK1 18
ZCLK0 12
ZCLK1 14
VOSCIE 11
VGACLK 12
AC97CLK 24
SB14MHZ 15
SIOPCLK 25
PCICLK1 19
PCICLK2 19
96XPCLK 14
62
OSC12 16
SIO48M 25
CLK Table for SiS760 ( Different clock generator with different frequency defin table)
SiS 760 CLOCK
Bit 4
Bit 3 Bit 2 Bit 1 Bit 0
(FS3)
0
0 133.33100.00
0 100.99
0
0
0
0
0
0
0
0
0
0
1
0
A A
1 35.00
1
0
1
0
1 0
0
0
1
0
1
0
1
(FS1) (MHz)
(FS2)
0
0
0
0
1
0
1
0
0
1
1
0
1
1
0
0
0
0
1
0
1
0
1
0
0
1
1
1
1
5
(FS0)
0
1
0
1
0
1
0
1
0
1
0
1
0
1
VCO
(MHz)
800.00
807.92
800.00
807.92
799.98
803.94
699.99
707.22
799.98
833.30
799.98
807.90
800
807.92
999.96
999.96
CPU
(MHz)
200.00
201.98
133.99
233.33
235.74
160.00
166.66
266.66
269.30
200
201.98
166.66
166.66
SRC
(MHz)
100.00
100.99
100.00
100.99
100.00
100.49
100.00
101.03
100.00
104.16
100.00
100.99
100.00
100.99
100.00
100.00
ZCLK
134.65
133.33
133.33
133.99
140.00
141.44
133.33
134.11
133.33
134.65
133.33
134.65
125.00
142.85
AGPCLK
(MHz)
66.67
67.33
67.33134.65
66.67
67.00
70.00
70.72
66.67
69.44
66.67
67.33
66.67
67.33
66.66
66.66
4
PCI
(MHz)
33.33
33.66
33.66
33.33
33.50
35.00
35.36
33.33
34.72
33.33
33.66
33.33
33.66
33.33
33.33
Bit 3
Bit 4 ZCLKSRC
0
1
0
1
0
10 68.67
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Bit 1
(FS1)
0
0 68.67
0
0
1
033.33
101
0
1133.33
0
0
1
1
1
1
1
0
0 34.33
0
0
1
0
1
0
0
1
0
1
11
1
1
1
SiS 760 CLOCK
Bit 0
(FS0) (MHz)
0
1
0
1
0
1
0
1
00
1
0
1
1
0
1
3
CPU
VCO
CPU
(MHz)
824.00 103.00
103.00
840.00
105.00
206.0066.670
824.00
840.00
210.00
823.98
137.33
839.98
140.00
240.33
720.99
734.99
245.0001
823.98
164.80
839.98
168.00
823.98
279.99
839.98
824.00
206.00
840.00
210.00
1029.96
171.66
1049.96
174.99
(MHz) (MHz)
140.00
105.00
103.00
137.33
105.00
103.00
137.33
105.00
144.201
103.00
105.00
147.00
103.00
137.33
105.00
140.00
103.00
137.33274.66
105.00
140.00
103.00
137.33
105.00
140.00
103.00
128.74
105.00
131.24
AGPCLKBit 2
(MHz)(FS3)
70.00
70.00140.00
68.66
70.00140.00
72.10
73.50
68.66
70.00
68.66
70.00
68.67
70.00
68.66
70.00
PCI
(MHz)(FS2)
34.33137.33
35.00
34.33
35.00
34.33
35.00
36.05
36.75
34.33
35.00
34.33
35.00
34.33
35.00
2
By-Pass Capacitors
Place near to the Clock Outputs
SATACLK
SATACLK-
CPUCLK1
CPUCLK-1
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
96XPCLK
SIOPCLK
PCICLK2
SIO48M
SB14MHZ
VGACLK
VOSCIE
AC97CLK
R179 49.9RST
R169 49.9RST
C250 X_10P
C251 X_10P
C252 X_10P
C253 X_10P
C296 X_10P
C297 X_10P
C304 X_10P
C301 X_10P
C302 X_10P
C303 X_10P
C273 X_10P
C300 X_10P
C298 X_10P
C295 X_10P
C299 X_10P
Internal Pull Up / Down 120 K Ohm
SEL12_48M
FS0
FS1
FS2
FS3
FS0
FS1
FS2
FS3
Mode
SEL_24_48
Micro-Star
Document Number
Last Revision Date:
Monday, August 23, 2004
R186 2.7K
R223 2.7K
R236 2.7K
R231 X_2.7K
R238 X_2.7K
R227 X_2.7K
R228 X_2.7K
R232 2.7K
R239 2.7K
R237 2.7K
R200 2.7K
Title
MS-7112
MAIN CLOCK GEN
VCC3_DVDD
Desktop
Sheet of
1
331
Rev
0A
5
4
3
2
1
C35
X_C1000p50x
DDR_VREF routed as 40~50 mils
trace wide , Space>25 mils
D D
C C
B B
A A
DDR_VREF7
VCCM
Place near CPU in 1" ,
Routed => 5:10/Trace:Space ,
Same Length
MD[63..0]9
MEMDM[7..0]9
-MDQS[7..0]9
DDR_VREF
R56 15RST
R57 15RST
5
C47
X_C1000p50x
MEMZN
MEMZP
MD63
MD62
MD61
MD60
MD59
MD58
MD57
MD56
MD55
MD54
MD53
MD52
MD51
MD50
MD49
MD48
MD47
MD46
MD45
MD44
MD43
MD42
MD41
MD40
MD39
MD38
MD37
MD36
MD35
MD34
MD33
MD32
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
MEMDM7
MEMDM6
MEMDM5
MEMDM4
MEMDM3
MEMDM2
MEMDM1
MEMDM0
-MDQS7
-MDQS6
-MDQS5
-MDQS4
-MDQS3
-MDQS2
-MDQS1
-MDQS0
AE13
AG12
AG3
AE2
AH3
AH9
AG5
AH5
AJ10
AH11
AJ11
AH15
AJ15
AG11
AJ12
AJ14
AJ16
AA1
AG1
AH7
AH13
AB1
AJ13
D14
C14
A16
B15
A12
B11
A17
A15
C13
A11
A10
C11
AC1
AC3
AC2
AD1
AE1
AE3
AJ4
AF1
AJ3
AJ5
AJ6
AJ7
AJ9
A13
A14
AJ2
AJ8
B9
C7
A6
A9
A5
B5
C5
A4
E2
E1
A3
B3
E3
F1
G2
G1
L3
L1
G3
J2
L2
M1
W1
W3
W2
Y1
R1
A7
C2
H1
T1
A8
D1
J1
VTT_SENSE
MEMVREF1
MEMZN
MEMZP
MEMDATA63
MEMDATA62
MEMDATA61
MEMDATA60
MEMDATA59
MEMDATA58
MEMDATA57
MEMDATA56
MEMDATA55
MEMDATA54
MEMDATA53
MEMDATA52
MEMDATA51
MEMDATA50
MEMDATA49
MEMDATA48
MEMDATA47
MEMDATA46
MEMDATA45
MEMDATA44
MEMDATA43
MEMDATA42
MEMDATA41
MEMDATA40
MEMDATA39
MEMDATA38
MEMDATA37
MEMDATA36
MEMDATA35
MEMDATA34
MEMDATA33
MEMDATA32
MEMDATA31
MEMDATA30
MEMDATA29
MEMDATA28
MEMDATA27
MEMDATA26
MEMDATA25
MEMDATA24
MEMDATA23
MEMDATA22
MEMDATA21
MEMDATA20
MEMDATA19
MEMDATA18
MEMDATA17
MEMDATA16
MEMDATA15
MEMDATA14
MEMDATA13
MEMDATA12
MEMDATA11
MEMDATA10
MEMDATA9
MEMDATA8
MEMDATA7
MEMDATA6
MEMDATA5
MEMDATA4
MEMDATA3
MEMDATA2
MEMDATA1
MEMDATA0
MEMDQS17
MEMDQS16
MEMDQS15
MEMDQS14
MEMDQS13
MEMDQS12
MEMDQS11
MEMDQS10
MEMDQS9
MEMDQS8
MEMDQS7
MEMDQS6
MEMDQS5
MEMDQS4
MEMDQS3
MEMDQS2
MEMDQS1
MEMDQS0
VTT_DDR
CPU1B
MEMORY INTERFACE
VTT_A4
VTT_A1
VTT_A
VTT_A2
VTT_A3
VTT_B1
VTT_B2
VTT_B
VTT_B3
VTT_B4
MEMRESET_L
MEMCKEA
MEMCKEB
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H3
MEMCLK_L3
MEMCLK_H2
MEMCLK_L2
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
MEMCS_L7
MEMCS_L6
MEMCS_L5
MEMCS_L4
MEMCS_L3
MEMCS_L2
MEMCS_L1
MEMCS_L0
MEMRASA_L
MEMCASA_L
MEMWEA_L
MEMBANKA1
MEMBANKA0
RSVD_MEMADDA15
RSVD_MEMADDA14
MEMADDA13
MEMADDA12
MEMADDA11
MEMADDA10
MEMADDA9
MEMADDA8
MEMADDA7
MEMADDA6
MEMADDA5
MEMADDA4
MEMADDA3
MEMADDA2
MEMADDA1
MEMADDA0
MEMRASB_L
MEMCASB_L
MEMWEB_L
MEMBANKB1
MEMBANKB0
RSVD_MEMADDB15
RSVD_MEMADDB14
MEMADDB13
MEMADDB12
MEMADDB11
MEMADDB10
MEMADDB9
MEMADDB8
MEMADDB7
MEMADDB6
MEMADDB5
MEMADDB4
MEMADDB3
MEMADDB2
MEMADDB1
MEMADDB0
MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0
4
D17
A18
B17
C17
AF16
AG16
AH16
AJ17
AG10
AE8
AE7
D10
C10
E12
E11
AF8
AG8
AF10
AE10
V3
V4
K5
K4
R5
P5
P3
P4
D8
C8
E8
E7
D6
E6
C4
E5
H5
D4
G5
K3
H3
E13
C12
E10
AE6
AF3
M5
AE5
AB5
AD3
Y5
AB4
Y3
V5
T5
T3
N5
H4
F5
F4
L5
J5
E14
D12
E9
AF6
AF4
M4
AD5
AC5
AD4
AA5
AB3
Y4
W5
U5
T4
M3
N3
N1
U3
V1
N2
P1
U1
U2
VTT_DDR
MCKE0
MCKE1
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
-MCS3
-MCS2
-MCS1
-MCS0
-MSRASA
-MSCASA
MAA13
MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0
MAB13
MAB12
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0
X_1u
MCKE0 7,8
MCKE1 7,8
MEMCLK_H7 7,8
MEMCLK_L7 7,8
MEMCLK_H6 7,8
MEMCLK_L6 7,8
MEMCLK_H5 7,8
MEMCLK_L5 7,8
MEMCLK_H4 7,8
MEMCLK_L4 7,8
MEMCLK_H1 7,8
MEMCLK_L1 7,8
MEMCLK_H0 7,8
MEMCLK_L0 7,8
-MCS3 7,8
-MCS2 7,8
-MCS1 7,8
-MCS0 7,8
-MSRASA 7,8
-MSCASA 7,8
-MSWEA 7,8
MEMBANKA1 7,8
MEMBANKA0 7,8
MAA[13..0] 7,8
-MSRASB 7,8
-MSCASB 7,8
-MSWEB 7,8
MEMBANKB1 7,8
MEMBANKB0 7,8
MAB[13..0] 7,8
C119
VCCM
C96
X_1u
3
Bottom Side
X_1u
C67
X_1u
CADIP[0..15]10
CLKIP110
CLKIN110
CLKIP010
CLKIN010
VLDT0
CTLIP010
CTLIN010
X_1u
C115
R38 49.9RST
R37 49.9RST
C42
VDD_12_A
CADIP15
CADIN15
CADIP14
CADIN14
CADIP13
CADIN13
CADIP12
CADIN12
CADIP11
CADIN11
CADIP10
CADIN10
CADIP9
CADIN9
CADIP8
CADIN8
CADIP7
CADIN7
CADIP6
CADIN6
CADIP5
CADIN5
CADIP4
CADIN4
CADIP3
CADIN3
CADIN2
CADIP1
CADIN1
CADIP0
CADIN0
CTLIP1
CTLIN1
D29
D27
D25
C28
C26
R25
U27
U26
U25
W27
W26
AA27
AA26
AB25
AA25
AC27
AC26
AD25
AC25
U29
W29
AB29
AA29
AB27
AB28
AD29
AC29
AD27
AD28
W25
R27
R26
R29
B29
B27
T25
V25
T27
T28
V29
V27
V28
Y29
Y25
Y27
Y28
T29
CPU1A
N12-7540031-L06
VLDT0_A6
VLDT0_A5
VLDT0_A4
VLDT0_A3
VLDT0_A2
VLDT0_A1
VLDT0_A0
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
2
VDD_12_A
HYPER TRANSPORT - LINK0
WIDTH 200MILS, AS CLOSE AS POSSIBLE TO THE
PROCESSOR AND THEN AS 20MILS TRACES IN THE
PIN FILED
C124
C123
X_0.22u
0.22u
VLDT0_B PINS SHOULD BE CONNECTED TO A
SIGNAL 4.7UF CAPACITOR ROUTED WITH A 100
MILS WIDE TRACE
VLDT0
AH29
VLDT0_B6
AH27
VLDT0_B5
AG28
VLDT0_B4
AG26
VLDT0_B3
AF29
VLDT0_B2
AE28
VLDT0_B1
AF25
VLDT0_B0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
MSI
Title
Size Document Number Rev
Date: Sheet
N26
N27
L25
M25
L26
L27
J25
K25
G25
H25
G26
G27
E25
F25
E26
E27
N29
P29
M28
M27
L29
M29
K28
K27
H28
H27
G29
H29
F28
F27
E29
F29
J26
J27
J29
K29
N25
P25
P28
P27
CADOP15
CADON15
CADOP14
CADON14
CADOP13
CADON13
CADOP12
CADON12
CADOP11
CADON11
CADOP10
CADON10
CADOP9
CADON9
CADOP8
CADON8
CADOP7
CADON7
CADOP6
CADON6
CADOP5
CADON5
CADOP4
CADON4
CADOP3
CADON3
CADOP2CADIP2
CADON2
CADOP1
CADON1
CADOP0
CADON0
CLKOP1
CLKON1
CLKOP0
CLKON0
CTLOP0
CTLON0
K8 DDR & HT
MS-7112
<OrgName>
C41
C4.7U16X1206
CLKOP1 10
CLKON1 10
CLKOP0 10
CLKON0 10
CTLOP0 10
CTLON0 10
1
VLDT0 5
C43
X_0.22uf
CADOP[0..15] 10
CADON[0..15] 10CADIN[0..15]10
431Monday, August 23, 2004
of
0A
5
4
3
2
1
VCCA_PLL trace length from the VR1 to the PGA must be 0.75".
Place al filters close to the PGA.
Keep all power and signal trce away from the VR1.
Place a cut in the GND plane around the VCCA_PLL regulator circuit.
D D
LAYOUT: Ro ute V DDA tr ace approx. 50 mils wide
(use 2x25 mil tr aces t o exit ball field) and 500 mils
long.
FB1 180nH/1210
C33
X_C1000p50x
C50
C1000p50x
GND
C51
C1000p50x
CPUCLK03
CPUCLK-03
8/28 AMD CHANGE THE PULL-UP POWER
C56
0.22uf
CPU_VDDA_25
C49
475P/0805
-CPURST10
-LDTSTOP10
COREFB_H29
VCCM
COREFB_L29
C48 3900P
C57 3900P
VCCM
VTT_DDR
VCC2.5
3
Differential , "10:10:5:10:10".
Near CPU in 0.5" .
VCC2.5
C52
C53
3900P
0.22uf
AH25
VDDA1
AJ25
VDDA2
AF20
CPU_GD
L0_REF1
L0_REF0
X_C1000p50xC34
VDDIO_SENSE
R36
R35 820 R39
R34 820
R55 1K
R54 1K
7 8
169RST
3 4
5 6
1 2
NC_AJ23
NC_AH23
DBRDY
TMS
TCK
TRST_L
TDI
NC_C18
NC_A19
NC_AE23
NC_AF23
NC_AF22
NC_AF21
RN5
X_1K-8P4R
CLKIN_H
CLKIN_L
RESET_L
AE18
PWROK
AJ27
LDTSTOP_L
AF27
L0_REF1
AE26
L0_REF0
A23
COREFB_H
A24
COREFB_L
B23
CORE_SENSE
AE12
VDDIOFB_H
AF12
VDDIOFB_L
AE11
VDDIO_SENSE
AJ21
CLKIN_H
AH21
CLKIN_L
AJ23
NC_AJ23
AH23
NC_AH23
AE24
NC_AE24
AF24
NC_AF24
C16
VTT_A5
AG15
VTT_B5
AH17
DBRDY
C15
NC_C15
E20
TMS
E17
TCK
B21
TRST_L
A21
TDI
C18
NC_C18
A19
NC_A19
A28
KEY1
AJ28
KEY0
AE23
NC_AE23
AF23
NC_AF23
AF22
NC_AF22
AF21
NC_AF21
C1
FREE29
J3
FREE31
R3
FREE33
AA2
FREE35
D3
FREE1
AG2
FREE37
B18
FREE4
AH1
FREE38
AE21
FREE41
C20
FREE7
AG4
FREE11
C6
FREE12
AG6
FREE13
AE9
FREE14
AG9
FREE40
11223344556677889910101111121213131414151516
CPU1C
G_FBCLKOUT_H
G_FBCLKOUT_L
2
THERMTRIP_L
THERMDA
THERMDC
VID4
VID3
VID2
VID1
VID0
NC_AG18
NC_AH18
NC_AG17
NC_AJ18
DBREQ_L
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
TDO
NC_AF18
RSVD_SCL
RSVD_SDA
FREE26
FREE28
FREE30
FREE32
FREE34
FREE36
FREE10
FREE18
FREE19
FREE42
FREE24
FREE25
FREE27
A20
A26
A27
AG13
AF14
AG14
AF15
AE15
AG18
AH18
AG17
AJ18
AH19
AJ19
AE19
D20
C21
D18
C19
B19
A22
AF18
D22
C22
B13
B7
C3
K1
R2
AA3
F3
C23
AG7
AE22
C24
A25
C9
16
Title
Size Document Number Rev
Date: Sheet
THRMTRIP#
NC_AG18
NC_AH18
NC_AG17
NC_AJ18
FBCLKOUT_H
FBCLKOUT_L
Zdiff = 80 ohm
DBREQ_L
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
TDO
MSI
Near SB/SiS964
R202
1K
C258
C10u10y_1206
VID4
CP51 X_Copper
VID3
VID2
VID1
VID0
LAYOUT: Route
FBCLKOUT_H/L differentially
with 20/8/5/ 8 / 2 0 s pacing and
80.6RST
trace width. ( In CPU
breakout => ro u t e d 5:5:5 )
8/28 AMD CHANGE THE PULL-UP POWER
R63 1K
RN6
VID0
7 8
VID2
5 6
VID1
3 4
VID3
1 2
X_8P4R-4.7K
VID4
R27 X_4.7K
K8 HDT & MISC
MS-7112
THRMTRIP# 15,28
CPU_TMPA 25
VTIN_GND 25
VID[0..4] 25
VCCM
VCC2.5
<OrgName>
1
C25
104P
531Monday, August 23, 2004
C135
X_475P/0805
of
0A
-LDTSTOP
PS_OUT#28,30
C C
B B
R72
1K
Q15
2N7002S
VCC2.5
CPU_GD28
VLDT0
VLDT04
Place near CPU in 1" ,
Routed => 5:10/Trace:Space ,
Same Length
VDDA_25
R32 44.2RST
R33 44.2RST
HDT Connectors
DBREQ_L
DBRDY
TCK
TMS
TDI
TRST_L
NC_C21
NC_AJ18
NC_AG17
NC_D18
NC_C19
NC_B19
NC_D20
NC_AH18
NC_AG18
A A
R28 X_56
R31 X_1K
1 2
3 4
5 6
7 8
RN40 X_56-8P4R
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R29 X_1K
R30 X_1K
5
VCC2.5
RN4
1K-8P4R
1K-8P4R
RN41
LAYOUT: Locate close to Clawhammer socket.
VTT_DDR
C46
475P/0805
4
5
CPU1E
5
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS189
VSS190
VSS191
VSS192
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS223
VSS201
VSS202
VSS203
VSS204
VSS205
20
GROUND
L28
R28
W28
AC28
AF28
AH28
C29
F2
H2
VCCP VCCM
K2
M2
P2
T2
V2
Y2
AB2
AD2
AH2
B4
AH4
B6
G6
J6
L6
N6
R6
U6
AA6
AC6
AH6
F7
H7
K7
M7
P7
T7
V7
AB7
AD7
B8
G8
J8
L8
N8
R8
U8
W8
AC8
AH8
F9
H9
K9
M9
P9
T9
V9
Y9
AD9
B10
G10
J10
L10
N10
R10
U10
W10
AC10
AH10
F11
H11
K11
Y11
AB11
AD11
B12
G12
AA12
AC12
AH12
F13
H13
K13
Y13
AB13
AD13
AF17
G14
J14
AA14
AC14
AE14
D16
E15
K15
AB15
AD15
AH14
E16
G16
J16
AA16
AC16
AE29
AJ26
E18
F17
H17
K17
Y17
GND
AC15
H18
H22
H24
G13
AB14
G15
AA15
H16
AB16
G17
AA17
AC17
AE17
AB18
AD18
AG19
G19
AC19
AA19
H20
M20
AB20
AD20
G21
N21
R21
U21
W21
AA21
AC21
M22
AB22
AD22
G23
N23
R23
U23
W23
AA23
AC23
D24
M24
AB24
AD24
AH24
AE25
B20
E21
J23
F26
V10
K14
Y14
J15
K16
Y16
J17
F18
K18
Y18
E19
J19
F20
K20
P20
T20
V20
Y20
J21
L21
F22
K22
P22
T22
V22
Y22
E23
L23
B24
F24
K24
P24
T24
V24
Y24
K26
P26
V26
CPU1D
L7
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
N7
VDD10
L9
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD39
VDD38
VDD37
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD76
VDD77
VDD78
VDD79
VDD80
VDD81
VDD82
VDD83
VDD84
VDD85
VDD86
VDD87
VDD88
VDD89
VDD90
VDD91
VDD92
POWER
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VDDIO35
VDDIO36
VDDIO37
VDDIO38
VDDIO39
VDDIO40
VDDIO41
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VDDIO46
VDDIO47
VDDIO48
VDDIO49
VDDIO50
VDDIO6
VDD96
VDD97
VDD98
VDD99
VDD100
VDD101
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108
VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115
VDD116
VDD117
VDD118
VDD119
VDD120
VDD121
VDD122
VDD123
VDD124
VDD125
VDD126
VDD127
VDD128
VDD129
VDD130
VDD131
VDD132
VDD133
VDD93
VDD94
VDD95
B2
VSS1
AH20
VSS3
AB21
VSS4
W22
VSS5
M23
VSS6
L24
VSS7
AG25
VSS8
AG27
VSS9
D2
VSS10
AF2
GND
AA10
AE16
W20
AA20
AC20
AE20
AG20
AJ20
AD21
AG21
AG29
AA22
AC22
AG22
AH22
AJ22
AB23
AD23
AG23
W24
AA24
AC24
AG24
AJ24
AD26
AF26
AH26
AB17
AD17
AA18
AC18
AB19
AD19
AF19
AA8
AB9
B14
G20
R20
U20
D21
H21
K21
M21
P21
V21
B22
E22
G22
N22
R22
U22
D23
H23
K23
P23
V23
E24
G24
N24
R24
U24
B25
C25
B26
D26
H26
M26
C27
B28
D28
G28
H15
B16
G18
D19
H19
K19
N20
VSS11
W6
VSS12
Y7
VSS13
VSS14
VSS15
VSS16
J12
VSS17
VSS18
Y15
VSS19
VSS20
J18
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
F21
VSS32
VSS33
VSS34
VSS35
VSS36
T21
VSS37
VSS38
Y21
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
J22
VSS45
L22
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
F23
VSS57
VSS58
VSS59
VSS60
T23
VSS61
VSS62
Y23
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
J24
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
T26
VSS84
Y26
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
F15
VSS187
VSS188
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
F19
VSS213
VSS214
VSS215
Y19
VSS216
VSS217
VSS218
VSS219
J20
VSS220
L20
VSS221
VSS222
17171818191920
D D
C C
B B
A A
E4
G4
J4
L4
N4
U4
W4
AA4
AC4
AE4
D5
AF5
F6
H6
K6
M6
P6
T6
V6
Y6
AB6
AD6
D7
G7
J7
AA7
AC7
AF7
F8
H8
AB8
AD8
D9
G9
AC9
AF9
F10
AD10
D11
AF11
F12
AD12
D13
AF13
F14
AD14
F16
AD16
D15
R4
N28
U28
AA28
AE27
R7
U7
W7
K8
M8
P8
T8
V8
Y8
J9
N9
R9
U9
W9
AA9
H10
K10
M10
P10
T10
Y10
AB10
G11
J11
AA11
AC11
H12
K12
Y12
AB12
J13
AA13
AC13
H14
AB26
E28
J28
4
EMI
LAYOUT: Place 1 capacitor every 1-1.5"
along VDD_CORE perimiter.
VCCP
C81
C85
X_6.8p
C0.01u50x
LAYOUT: Place 6 EMI caps along bottom right side of Clawhammer,
2 in middle of HT link, and 12 along bottom left side of Clawhammer.
VCCP
C22
C76
C72
X_6.8p
X_6.8p
LAYOUT: Loca t e close to
Clawhammer socket.
VTT_DDR VTT_DDR
+
EC4
VCCP
C31
X_475P/0805
X_C100u16d6
VCCM VCCM VCCM
C66
C166
475P/0805
475P/0805
GND
3
1u
C37
GND
C62
C38
C65
X_6.8p
X_6.8p
LAYOUT: Place one 1210 10uF capacitor
on each end of the VTT island.
C184
C399
X_475P/0805
X_475P/0805_B
X_6.8p
CT1
10u/0805
GND
C69
X_6.8p
X_6.8p
12
+
C394
104P_B
2
1
CPU
Place on inside of CPU Cavity ( 5 * 0.22uF/0603
X7R high-freq decoupling Cap. )
VCCP
C84
C89
C83
C0.22u10x
X_C0.22u10x
VCCP
C92
104P
X_6.8p
+
CT3
10u/0805
C80
C403
104P_B
C90
X_6.8p
X_6.8p
GND
C186
X_104P
LAYOUT: Place 1000pF capacitors
between VRM & CPU
RECOMMEND 4 PLACEDIN TOP SOCKET CAVITY
AND 2 ON THE BOTTOM DIRECTLY UNDER SOCKET CAVITY
X_C10u10y_1206
C86
C149
104P
C91
X_C10u10y_1206
C188
X_104P
C10u10y_1206
C141
104P
C74
12
GND
GND
C0.22u10x
C93
104P
C10u10y_1206
C82
C88
X_C0.22u10x
C95
VCCP
C395
C0.22u10x_B
VCCPVCCP
C397
C396
C10u10y_1206_B
X_C10u10y_1206_B
C400
C0.22u10x_B
C401
X_C10u10y_1206_B
LAYOUT: Place beside processor.
VCCM
C70
C94
C402
C398
0.22uf_B
4
0.22uf
0.22uf_B
3
C45
0.22uf
0.22uf
0.22uf
C111
GND
Title
Size Do cu ment Number Rev
2
Date: Sheet
<OrgName>
MSI
K8 POWER & GND
MS-7112
1
631Monday, August 23, 2004
0A
of
5
VCCM VCCM
4
SYSTEM MEMORY
3
2
1
108
120
148
DR_MD[63..0 ]8,9
D D
C C
B B
R114 4.7K
-MSWEA4,8
DR_MD[63..0]
DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63
WP1
-MSWEA
DDR_VREF
C29
X_C1000p50x
VDD07VDD138VDD246VDD370VDD485VDD5
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
SLAVE ADDRESS = 1010000B
102
NC4
Place 104p Cap. near the DIMM
168
VDD6
VDD7
VDD8
VSS03VSS111VSS218VSS326VSS434VSS542VSS650VSS758VSS866VSS974VSS1081VSS1189VSS1293VSS13
104
112
128
136
VDDQ022VDDQ130VDDQ254VDDQ362VDDQ477VDDQ596VDDQ6
VDDQ7
VDDQ8
184
DDR DIMM
SOCKET
VSS14
100
116
124
143
VDDQ9
VDDQ10
VSS15
VSS16
132
156
164
VDDQ11
VDDQ12
PIN
VSS17
VSS18
139
145
172
VDDQ13
VSS19
152
180
VDDQ14
VSS20
160
82
15
VDDID
VDDQ15
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A10_AP
SDA
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC5
NC(RESET#)
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
VSS21
176
184
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
BA0
BA1
BA2
SCL
SA0
SA1
SA2
157
158
71
163
5
14
25
36
56
67
78
86
47
167
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
MCKE0
21
MCKE1
111
-MSCASA
65
-MSRASA
154
DR_MEMDM0
97
DR_MEMDM1
107
DR_MEMDM2
119
DR_MEMDM3
129
DR_MEMDM4
149
DR_MEMDM5
159
DR_MEMDM6
169
DR_MEMDM7
177
140
DDR1
DDR400-CH
-MCS0
-MCS1
-DR_MDQS0
-DR_MDQS1
-DR_MDQS2
-DR_MDQS3
-DR_MDQS4
-DR_MDQS5
-DR_MDQS6
-DR_MDQS7
MAA13
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
SMBCLK
SMBDAT
MEMCLK_H5
MEMCLK_L5
MEMCLK_H0
MEMCLK_L0
MEMCLK_H7
MEMCLK_L7
-MCS0 4,8
-MCS1 4,8
-DR_MDQS0 8,9
-DR_MDQS1 8,9
-DR_MDQS2 8,9
-DR_MDQS3 8,9
-DR_MDQS4 8,9
-DR_MDQS5 8,9
-DR_MDQS6 8,9
-DR_MDQS7 8,9
MAA[13..0]
MAA[13..0] 4,8
MEMBANKA0 4,8
MEMBANKA1 4,8
SMBCLK 3,15,19,28
SMBDAT 3,15,19,28
MEMCLK_H5 4,8
MEMCLK_L5 4,8
MEMCLK_H0 4,8
MEMCLK_L0 4,8
MEMCLK_H7 4,8
MEMCLK_L7 4,8
MCKE0 4,8
MCKE1 4,8
-MSCASA 4,8
-MSRASA 4,8
Place 104p and 1000p Cap.
near the DIMM
DR_MEMDM[7..0] 8,9
VCCMVCCM
R119 4.7K
-MSWEB4,8
C36
104P
DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63
WP2
-MSWEB
DDR_VREF
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
90
63
101
102
108
120
148
168
VDD07VDD138VDD246VDD370VDD485VDD5
VDD6
VDD7
VDD8
2
DQ0
4
DQ1
6
DQ2
8
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
WP(NC)
WE#
1
VREF
9
NC2
NC3
SLAVE ADDRESS = 1010001B
NC4
VDDQ022VDDQ130VDDQ254VDDQ362VDDQ477VDDQ596VDDQ6
DDR DIMM
SOCKET
VSS03VSS111VSS218VSS326VSS434VSS542VSS650VSS758VSS866VSS974VSS1081VSS1189VSS1293VSS13
104
112
128
VDDQ7
100
116
136
VDDQ8
VDDQ9
184
VSS14
VSS15
124
143
VDDQ10
VSS16
132
156
139
164
VDDQ11
VDDQ12
PIN
VSS17
VSS18
145
172
VDDQ13
VSS19
152
180
VDDQ14
VSS20
160
82
15
VDDID
VDDQ15
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A10_AP
SDA
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC5
NC(RESET#)
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
VSS21
176
184
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
BA0
BA1
BA2
SCL
SA0
SA1
SA2
157
158
71
163
-DR_MDQS0
5
-DR_MDQS1
14
-DR_MDQS2
25
-DR_MDQS3
36
-DR_MDQS4
56
-DR_MDQS5
67
-DR_MDQS6
78
-DR_MDQS7
86
47
167
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
SMBCLK
92
SMBDAT
91
181
182
183
44
45
49
51
134
135
142
144
MEMCLK_H4
16
MEMCLK_L4
17
MEMCLK_H1
137
MEMCLK_L1
138
MEMCLK_H6
76
MEMCLK_L6
75
173
10
MCKE0
21
MCKE1
111
-MSCASB
65
-MSRASB
154
DR_MEMDM0
97
DR_MEMDM1
107
DR_MEMDM2
119
DR_MEMDM3
129
DR_MEMDM4
149
DR_MEMDM5
159
DR_MEMDM6
169
DR_MEMDM7
177
140
DDR2
DDR400-CH
-MCS2
-MCS3
MAB13
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
-MCS2 4,8
-MCS3 4,8
MAB[13..0] 4,8
MEMBANKB0 4,8
MEMBANKB1 4,8
VCCM
MEMCLK_H4 4,8
MEMCLK_L4 4,8
MEMCLK_H1 4,8
MEMCLK_L1 4,8
MEMCLK_H6 4,8
MEMCLK_L6 4,8
-MSCASB 4,8
-MSRASB 4,8
VCCM
A A
R21
1KST
R24
1KST
C21
X_104P
DDR_VREF
C26
104P
5
DDR_VREF 4
MSI
Title
Size Do cument Number Rev
4
3
2
Date: Sheet
<OrgName>
DDR DIMM1, 2
MS-7112
1
731Monday, August 23, 2004
0A
of
5
DDR Terminations
4
3
2
1
VTT_DDRVTT_DDRVTT_DDR
D D
C C
B B
-MSCASA4,7
-MSCASB4,7
-MSWEB4,7
-MSRASA4,7
-MSRASB4,7
-MSWEA4,7
A A
DR_MD59
DR_MD63
DR_MD58
DR_MD62
-DR_MDQS7
DR_MEMDM7
DR_MD57
DR_MD61
DR_MD56
DR_MD60
DR_MD51
DR_MD55
DR_MD50
DR_MD54
-DR_MDQS6
DR_MEMDM6
MAA13
MAB13
DR_MD53
DR_MD52
DR_MD49
DR_MD48
DR_MD47
DR_MD46
DR_MD43
DR_MD42
DR_MEMDM5
-DR_MDQS5
-MCS0
-MCS04,7
-MCS2
-MCS24,7
-MCS1
-MCS14,7
-MCS3
-MCS34,7
-MSCASA
DR_MD41
-MSCASB
-MSWEB
-MSRASA
-MSRASB
-MSWEA
DR_MD45
The Processor pins and resistor
are less than 1" in length.
MEMCLK_H54,7
MEMCLK_H44,7
MEMCLK_H74,7
MEMCLK_H64,7
MEMCLK_H14,7 MEMCLK_L1 4,7
MEMCLK_H04,7 MEMCLK_L0 4,7
5
RN65 47-8P4R
7 8
5 6
3 4
1 2
RN64 47-8P4R
7 8
5 6
3 4
1 2
RN61 47-8P4R
7 8
5 6
3 4
1 2
RN59 47-8P4R
7 8
5 6
3 4
1 2
RN57 47-8P4R
7 8
5 6
3 4
1 2
RN55 47-8P4R
7 8
5 6
3 4
1 2
RN53 47-8P4R
7 8
5 6
3 4
1 2
1 2
3 4
5 6
7 8
RN52 47-8P4R
RN50 47-8P4R
7 8
5 6
3 4
1 2
1 2
3 4
5 6
7 8
RN49 47-8P4R
MEMCLK_H5
MEMCLK_H4
MEMCLK_H7
MEMCLK_H6
MEMCLK_H1
MEMCLK_H0
R43 120RST
R42 120RST
R62 120RST
R61 120RST
R49 120RST
R50 120RST
MEMBANKB14,7
MEMBANKA14,7
MEMCLK_L5
MEMCLK_L4
MEMCLK_L7
MEMCLK_L6
MEMCLK_L1
MEMCLK_L0
MEMBANKA04,7
MEMBANKB04,7
MEMCLK_L5 4,7
MEMCLK_L4 4,7
MEMCLK_L7 4,7
MEMCLK_L6 4,7
4
-DR_MDQS4
DR_MD37
DR_MD33
DR_MD36
DR_MD32
MAB10
MAB0
MAA10
MAA0
MAA1
MAB1
MAB2
MAA2
DR_MD31
DR_MD27
DR_MD30
DR_MD26
MAB3
MAA3
DR_MEMDM3
MAA4
-DR_MDQS3
DR_MD25
MAB4
MAA6
DR_MD29
DR_MD28
MAA5
MAA8
DR_MD24
MAB6
MAB5
DR_MD19
DR_MD44
DR_MD40
DR_MD39
DR_MD35
DR_MD38
DR_MD34
DR_MEMDM4
RN47 47-8P4R
7 8
5 6
3 4
1 2
RN46 47-8P4R
7 8
5 6
3 4
1 2
RN44 47-8P4R
7 8
5 6
3 4
1 2
RN42 47-8P4R
7 8
5 6
3 4
1 2
RN39 47-8P4R
7 8
5 6
3 4
1 2
RN38 47-8P4R
7 8
5 6
3 4
1 2
RN36 47-8P4R
7 8
5 6
3 4
1 2
RN35 47-8P4R
7 8
5 6
3 4
1 2
RN34 47-8P4R
7 8
5 6
3 4
1 2
RN32 47-8P4R
7 8
5 6
3 4
1 2
RN31 47-8P4R
7 8
5 6
3 4
1 2
MAB[13..0]4,7
MAA[13..0]4,7
RN28 47-8P4R
7 8
5 6
3 4
1 2
1 2
3 4
5 6
7 8
RN27 47-8P4R
RN25 47-8P4R
7 8
5 6
3 4
1 2
RN22 47-8P4R
7 8
5 6
3 4
1 2
RN19 47-8P4R
7 8
5 6
3 4
1 2
RN16 47-8P4R
7 8
5 6
3 4
1 2
RN14 47-8P4R
7 8
5 6
3 4
1 2
RN11 47-8P4R
7 8
5 6
3 4
1 2
RN9 47-8P4R
7 8
5 6
3 4
1 2
RN7 47-8P4R
7 8
5 6
3 4
1 2
DR_MD[63..0]
MAB[13..0]
MAA[13..0]
DR_MEMDM[7..0]
-DR_MDQS[7..0]
2
DR_MD23
MAA7
MAA11
MAA9
MAA12
DR_MD22
MAB8
MAB7
DR_MD18
MAB9
DR_MEMDM2
MAB11
DR_MD21
-DR_MDQS2
DR_MD17
MAB12
DR_MD16
DR_MD20
MCKE04,7
MCKE14,7
DR_MD11
DR_MD15
DR_MD10
DR_MD14
DR_MEMDM1
DR_MD13
-DR_MDQS1
DR_MD12
DR_MD9
DR_MD8
DR_MD3
DR_MD6
DR_MD7
DR_MD2
-DR_MDQS0
DR_MEMDM0
DR_MD1
DR_MD5
DR_MD4
DR_MD0
DR_MD[63..0 ]7,9
DR_MEMDM[7..0]7,9
-DR_MDQS[7..0]7,9
3
-MCS34,7
-MCS24,7
-MSCASA4,7
-MCS14,7
-MCS04,7
-MSCASB4,7
-MSRASB4,7
-MSRASA4,7
-MSWEB4,7
-MSWEA4,7
MEMBANKA14,7
MEMBANKB14,7
MEMBANKA04,7
MEMBANKB04,7
MCKE14,7
MCKE04,7
MAB13
MAA13
MAA12
MAB12
MAB9
MAB11
MAA1
MAB1
MAB3
MAA3
MAB2
MAA2
MAB6
MAA6
MAA4
MAB4
MAA7
MAA8
MAA5
MAB5
MAA0
MAA10
MAB0
MAB10
MAA9
MAA11
MAB7
MAB8
-MSRASB
-MSRASA
-MSWEB
-MSWEA
MSI
Title
Size Do cument Number Rev
Date: Sheet
CN21
12
34
56
78
X_8P4C-22P
CN6
12
34
56
78
X_8P4C-22P
CN14
12
34
56
78
X_8P4C-22P
CN13
12
34
56
78
X_8P4C-22P
CN12
12
34
56
78
X_8P4C-22P
CN9
12
34
56
78
X_8P4C-22P
CN15
12
34
56
78
X_8P4C-22P
CN20
12
34
56
78
X_8P4C-22P
CN8
12
34
56
78
X_8P4C-22P
CN18
12
34
56
78
X_8P4C-22P
CN16
12
34
56
78
X_8P4C-22P
CN4
12
34
56
78
X_8P4C-22P
<OrgName>
DDR Terminations Part 1
MS-7112
1
831Monday, August 23, 2004
0A
of
5
4
3
2
1
DDR Terminations
VCCM VCCM VCCM VCCMVTT_DDR VTT_DDRVTT_DDRVTT_DDR
C32
RN8 10-8P4R
MD0
D D
C C
B B
MEMDM3 DR_MEMDM3
1 2
MD4
3 4
MD5
5 6
MD1
7 8
RN10 10-8P4R
MEMDM0
1 2
-MDQS0
3 4
MD2
5 6
MD7 DR_MD7
7 8
RN12 10-8P4R
MD6 DR_MD6
1 2
MD3
3 4
MD8
5 6
MD9
7 8
RN15 10-8P4R
MD12
1 2
-MDQS1 -DR_MDQS1
3 4
MD13 DR_MD13
5 6
MEMDM1 DR_MEMDM1
7 8
RN18 10-8P4R
MD14
1 2
MD10
3 4
MD15
5 6
MD11
7 8
RN26 10-8P4R
MD21 DR_MD21
1 2
MEMDM2 DR_MEMDM2
3 4
MD18 DR_MD18
5 6
MD22 DR_MD22
7 8
RN21 10-8P4R
MD20
1 2
MD16
3 4
MD17
5 6
-MDQS2
7 8
RN30 10-8P4R
MD23
1 2
MD19 DR_MD19
3 4
MD24
5 6
MD28 DR_MD28
7 8
RN33 10-8P4R
MD29
1 2
MD25
3 4
-MDQS3
5 6
7 8
-MDQS[7..0]4
-DR_MDQS[7..0]7,8
DR_MD[63..0]7,8
MD[63..0]4
MEMDM[7..0]4
A A
DR_MEMDM[7..0]7,8
DR_MD0
DR_MD4
DR_MD5
DR_MD1
DR_MEMDM0
-DR_MDQS0
DR_MD2
DR_MD3
DR_MD8
DR_MD9
DR_MD12
DR_MD14
DR_MD10
DR_MD15
DR_MD11
DR_MD20
DR_MD16
DR_MD17
-DR_MDQS2
DR_MD23
DR_MD24
DR_MD29
DR_MD25
-DR_MDQS3
-MDQS[7..0]
-DR_MDQS[7..0]
DR_MD[63..0]
MD[63..0]
MEMDM[7..0]
DR_MEMDM[7..0]
RN37 10-8P4R
MD26
1 2
MD30
3 4
MD27
5 6
MD31
7 8
RN43 10-8P4R
MD32
1 2
MD36
3 4
MD33
5 6
MD37
7 8
RN45 10-8P4R
-MDQS4 -DR_MDQS4
1 2
MEMDM4 DR_MEMDM4
3 4
MD34 DR_MD34
5 6
MD38 DR_MD38
7 8
RN48 10-8P4R
MD39 DR_MD39
1 2
MD40
3 4
MD35
5 6
MD44
7 8
RN51 10-8P4R
MD41 DR_MD41
1 2
-MDQS5
3 4
MD45 DR_MD45
5 6
MEMDM5 DR_MEMDM5
7 8
RN54 10-8P4R
MD42 DR_MD42
1 2
MD43
3 4
MD46 DR_MD46
5 6
MD47
7 8
RN56 10-8P4R
MD49 DR_MD49
1 2
MD48
3 4
MD52 DR_MD52
5 6
MD53 DR_MD53
7 8
RN58 10-8P4R
MEMDM6
1 2
-MDQS6
3 4
MD54
5 6
MD50 DR_MD50
7 8
RN60 10-8P4R
MD55
1 2
MD51
3 4
MD56
5 6
MD60 DR_MD60
7 8
RN63 10-8P4R
MD61
1 2
MD57
3 4
MEMDM7 DR_MEMDM7
5 6
-MDQS7 -DR_MDQS7
7 8
RN66 10-8P4R
MD62 DR_MD62
1 2
MD58
3 4
MD63
5 6
MD59
7 8
DR_MD26
DR_MD30
DR_MD27
DR_MD31
DR_MD32
DR_MD36
DR_MD33
DR_MD37
DR_MD40
DR_MD35
DR_MD44
-DR_MDQS5
DR_MD43
DR_MD47
DR_MD48
DR_MEMDM6
-DR_MDQS6
DR_MD54
DR_MD55
DR_MD51
DR_MD56
DR_MD61
DR_MD57
DR_MD58
DR_MD63
DR_MD59
X_0.22uF
C133
X_0.22uF
C182
X_0.22uF
C30
X_0.22uF
C122
X_0.22uF
VTT_DDR
1u
1u
C87
C75
C108
VTT_DDR
1u
C63
1u
C134
C138
VTT_DDR
C54
C118
X_C1000p50x
VTT_DDR
C44
475P/0805
C106
475P/0805
LAYOUT: Add 100pF and 1000pF on VTT fill near
1u
C78
1u
C140
C176
X_C1000p50x
GND
C157
475P/0805
1u
1u
C68
X_1u
C107
X_1u
C77
1u
C61
1u
C109
X_1u
C98
X_1u
C97
C73
X_C1000p50x
GND
1u
X_1u
C180
475P/0805
1u
C99
1u
C145
VTT_DDR
Clawhammer and near DIMMs (both sides).
5
4
3
2
C103
1u
C40
X_1u
C136
X_1u
C139
1u
C131
X_1u
C147
1u
1u
1u
C110
C137
GND
1u
1u
1u
C153
C169
C160
GND
C150
X_1u
C163
1u
C171
X_1u
VTT_DDR
12
12
+
+
EC23
GND
C100u16d6
Title
EC10
C100u16d6
0.22uf
0.22uf
C55
C113
GND
<OrgName>
DDR Terminations Part 2
Size Document Number Rev
MS-7112
Date: Sheet
931Monday, August 23, 2004
1
0A
of
8
A
D D
C C
CLKON14
CLKOP14
CLKON04
CLKOP04
CTLON04
CTLOP04
B B
-LDTSTOP5
LDTREQ#15
-CPURST5
CPUCLK-13
CPUCLK13
7
CADON0
CADOP0
CADON1
CADOP1
CADON2
CADOP2
CADON3
CADOP3
CADON4
CADOP4
CADON5
CADOP5
CADON6
CADOP6
CADON7
CADOP7
CADON8
CADOP8
CADON9
CADOP9
CADON10
CADOP10
CADON11
CADOP11
CADON12
CADOP12
CADON13
CADOP13
CADON14
CADOP14
CADON15
CADOP15
LRCOMP
CPUCLK1_CL
CPUCLK1_CH
HTAVDD
HTAVSS
HTPHYAVDD
HTPHYAVSS
-LDTSTOP
LDTREQ#
-CPURST
R101
75
CADIN[0..15]
CADIP[0..15]
CADOP[0..15]
CADON[0..15]
R102
N27
P27
M29
N29
L27
M27
K29
L29
H29
J29
G27
H27
F29
G29
E27
F27
N24
P24
M25
N25
L26
M26
K24
L24
H26
J26
G24
H24
F25
G25
E26
F26
C28
J25
K25
J27
K27
D29
E29
A11
A12
C11
B11
C12
B12
E11
D12
D11
R104
75
CPUCLK1_CL
169RST
CPUCLK1_CH
LRCAD_N0
LRCAD_P0
LRCAD_N1
LRCAD_P1
LRCAD_N2
LRCAD_P2
LRCAD_N3
LRCAD_P3
LRCAD_N4
LRCAD_P4
LRCAD_N5
LRCAD_P5
LRCAD_N6
LRCAD_P6
LRCAD_N7
LRCAD_P7
LRCAD_N8
LRACD_P8
LRCAD_N9
LRCAD_P9
LRCAD_N10
LRCAD_P10
LRCAD_N11
LRCAD_P11
LRCAD_N12
LRCAD_P12
LRCAD_N13
LRCAD_P13
LRCAD_N14
LRCAD_P14
LRCAD_N15
LRCAD_P15
LRCOMP
LRCLK_N1
LRCLK_P1
LRCLK_N0
LRCLK_P0
LRCTLN
LRCTLP
HTCLKN
HTCLKP
HTAVDD
HTAVSS
HTPHYAVDD
HTPHYAVSS
LDTSTOP#
LDTREQ#
LDTRESET#
CADIN[0..15]4
CADIP[0..15]4
CADOP[0..15]4
CADON[0..15]4
C179
3900P
C175
3900P
NB1A
SiS760GX
VDD_12_A
CB20
104P
6
CADIP10
CADIP11
CADIN12
CADIN13
CADIN15
CADIN14
CADIP13
CADIP14
CADIP15
D24
E23
F22
D25
E24
LTCAD_P15
LTCAD_P14
LTCAD_P13
LTCAD_N15
LTCAD_N14
HOST_RX
CADIN10
CADIP12
CADIN11
D21
F19
D18
F23
D22
F20
D19
LTCAD_P12
LTCAD_P11
LTCAD_P10
LTCAD_N13
LTCAD_N12
LTCAD_N11
LTCAD_N10
HOST_TX
CADIP9
CADIN9
E17
E18
LTCAD_P9
LTCAD_N9
CADIP8
CADIN8
F16
F17
LTCAD_P8
LTCAD_N8
5
CADIP7
CADIN7
A24
A25
LTCAD_P7
LTCAD_N7
CADIP6
CADIN6
C23
C24
LTCAD_P6
LTCAD_N6
CADIP5
CADIN5
A22
A23
LTCAD_P5
LTCAD_N5
CADIP4
CADIN4
C21
C22
LTCAD_P4
LTCAD_N4
CADIP3
CADIN3
C19
C20
LTCAD_P3
LTCAD_N3
CADIP2
CADIN2
A18
A19
LTCAD_P2
LTCAD_N2
CADIP1
CADIN1
C17
C18
LTCAD_P1
LTCAD_N1
CADIP0
CADIN0
A16
A17
LTCAD_P0
LTCAD_N0
4
A20
E20
E21
A21
LTCLK_P0
LTCLK_P1
LTCLK_N1
LTCLK_N0
760-1
AGP
SBA7D2SBA6G5SBA5D3SBA4F4SBA3F5SBA2E4SBA1B3SBA0D5ST0C5ST1A5ST2B4AAD0V5AAD1U6AAD2U1AAD3U4AAD4U3AAD5T5AAD6T3AAD7T6AAD8R2AAD9P1AAD10R5AAD11P3AAD12P4AAD13N2AAD14P6AAD15N3AAD16L3AAD17K2AAD18K5AAD19K6AAD20K3AAD21J4AAD22J1AAD23J5AAD24G2AAD25H4AAD26G3AAD27F1AAD28F2AAD29H6AAD30E1AAD31
GAD18
SBA7
SBA6
SBA5
SBA4
SBA3
SBA2
AGPST0
SBA0
SBA1
VDD_12_A
R77 100
R76 49.9RST
R75 49.9RST
AGPST2
AGPST1
GAD0
GAD1
GAD2
GAD3
GAD4
GAD6
GAD5
LRCOMP
LTCOMPN
LTCOMPP
GAD7
GAD8
GAD10
GAD9
GAD16
GAD15
GAD12
GAD17
GAD14
GAD11
GAD13
GAD24
GAD21
GAD23
GAD19
GAD20
GAD25
GAD22
VCC2.5
R98 1K
R94 1K
C25
C26
LTCTLP
LTCTLN
PIPE#/ADBIH
AGPCOMP_P
AGPCOMP_N
AGPVSSREF
GAD27
GAD26
GAD28
LTCOMPN
LTCOMPP
A27
B28
LTCOMP_P
LTCOMP_N
AC/BE#3
AC/BE#2
AC/BE#1
AC/BE#0
AREQ#
AGNT#
AFRAME#
AIRDY#
ATRDY#
ADEVSEL#
ASERR#
ASTOP#
APAR
RBF#
WBF#
GC_DET#
ADBIL
SB_STB
SB_STB#
AD_STB0
AD_STB#0
AD_STB1
AD_STB#1
AGPCLK
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
AGPVREF
E3
GAD29
GAD30
GAD31
LDTREQ#
-CPURST
H3
L4
N5
R4
A6
B6
L6
L1
M4
M5
M1
M2
N6
C4
A3
D6
G6
E6
C1
C2
T2
R1
J2
H1
AA1
V2
V3
AA4
AA5
AA2
AA3
V1
V4
3
CLKIN0 4
CLKIP0 4
CLKIN1 4
CLKIP1 4
CTLIN0 4
CTLIP0 4
GC/BE#3
GC/BE#2
GC/BE#1
GC/BE#0
DBIH
DBIL
ADSTB0
ADSTB#0
ADSTB1
ADSTB#1
AGPRCOMP
AGPRCOMN
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
CP55
X_Copper
2
GAD[0..31]
SBA[0..7]
GC/BE#[0..3]
AGPST[0..2]
ADSTB[0..1]
ADSTB#[0..1]
A4XAVDD
A4XAVSS
GREQ# 18
GGNT# 18
GFRAME# 18
GIRDY# 18
GTRDY# 18
GDEVSEL# 18
GSERR# 18
GSTOP# 18
GPAR 18
RBF# 18
WBF# 18
GCDET# 18
DBIH 18
DBIL 18
SBSTB 18
SBSTB# 18
A1XAVDD
A1XAVSS
AGP3.0 = 50 ohm
AGPCLK1 3
GVREFGC 18
C211
104P
MSI
Title
Size Document Number Rev
Date: Sheet of
AGPRCOMN
AGPRCOMP
HTPHYAVDD
CB23
104P
HTPHYAVSS
HTAVDD
CB26
104P
HTAVSS
<OrgName>
SiS 760 -1 Host / AGP
MS-7112
CB25
104P
CB21
104P
GAD[0..31] 18
SBA[0..7] 18
GC/BE#[0..3] 18
AGPST[0..2] 18
ADSTB[0..1] 18
ADSTB#[0..1] 18
X_Copper
FB5
X_120_600mA
CB95
C1000p50x_B
X_Copper
X_Copper
FB3
X_120_600mA
CB94
C1000p50x_B
X_Copper
R128 49.9RST
R129 43.RST
CP13
X_Copper
FB4
X_120_600mA
CB24
C1000p50x
CP53
X_Copper
CP17
X_Copper
FB6
X_120_600mA
CB27
C1000p50x
CP15
X_Copper
CP16
CP14
CP11
CP12
10 31Monday, August 23, 2004
1
VDDQ
VCC3
VCC3
VCC3
C173
C10u10y_1206
VCC3
C167
C10u10y_1206
0A
A
8
A
NB1B
AA27
DQB0
AB28
DQB1
AB29
DQB2
AC29
DQB3
AB26
DQB4
AA26
D D
C C
B B
AA25
Y25
Y24
AA29
AF28
AH28
AG27
AH27
AF26
AE25
AD25
AD24
AE26
AG29
AC27
AD29
AD28
AD27
AE29
AC26
AC25
AB24
AE27
AF29
AJ27
AG26
AJ26
AG25
AH25
AG24
AF24
AE23
AF23
AJ24
AJ15
AG16
AH16
AJ16
AE16
AD16
AF17
AD17
AE18
AJ17
AG11
AJ11
AG12
AH12
AF11
AD11
AE12
AD12
AE13
AJ12
AG15
AJ14
AH14
AJ13
AE15
AF15
AF14
AD14
AF13
AG13
AJ10
AH10
AJ9
AG9
AF10
AE10
AD10
AF9
AD9
AH8
DQB5
DQB6
DQB7
DQMB0
DDRBSTB0
DQB8
DQB9
DQB10
DQB11
DQB12
DQB13
DQB14
DQB15
DQMB1
DDRBSTB1
DQB16
DQB17
DQB18
DQB19
DQB20
DQB21
DQB22
DQB23
DQMB2
DDRBSTB2
DQB24
DQB25
DQB26
DQB27
DQB28
DQB29
DQB30
760 -2
DQB31
DQMB3
DDRBSTB3
DQB32
DQB33
DQB34
DQB35
DQB36
DQB37
DQB38
DQB39
DQMB4
DDRBSTB4
DQB40
DQB41
DQB42
DQB43
DQB44
DQB45
DQB46
DQB47
DQMB5
DDRBSTB5
DQB48
DQB49
DQB50
DQB51
DQB52
DQB53
DQB54
DQB55
DQMB6
DDRBSTB6
DQB56
DQB57
DQB58
DQB59
DQB60
DQB61
DQB62
DQB63
DQMB7
DDRBSTB7
SiS760GX
8
7
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
WEB
RASB
CASB
SDCLKBN0
SDCLKBN1
SDCLKBP0
SDCLKBP1
CKEB
CSB
DRAMTRAP0
DRAMTRAP1
DRAMTRAP2
DRAMTRAP3
DDRVREFB0
DDRVREFB1
ECLKAVDD
ECLKAVSS
VOSCIE
AJ21
AG22
AH22
AJ23
AH23
AD22
AF22
AD21
AG21
AE21
AE20
AF20
AH20
AJ20
AH18
AG19
AJ19
AG18
AD19
AG17
AD18
AF19
AG20
W26
Y26
Y27
Y28
AJ8
Y29
W28
W29
W27
6
DDRVREFA
DDRVREFB
VOSCIE
CP54 X_Copper
CP52 X_Copper
ECLKAVDD
ECLKAVSS
VOSCIE 3
5
4
3
2
1
SiS760 without Local Frame Buffer
1. Vref -Tie ground (R47,R48 open)
2. MD,DQS,MA,CLK - floation
3. OVDDM connect to VCC3
4. SiS760 seven pins of VBTRAP[3:0],
ECLKAVDD/AVSS, VOSCIE must connect on
board
VCC3
CP8
X_Copper
ECLKAVDD
CB7
104P
ECLKAVSS
FB2
X_120_600mA
CB9
C1000p50x
CP9
X_Copper
C144
X_C10u10y_1206
SiS760 without Local Frame Buffer
Vref -Tie ground
MSI
Title
Size Document Number Rev
7
6
5
4
3
Date: Sheet
2
<OrgName>
SiS 760-2 Frame Buffer
MS-7112
11 31Monday, August 23, 2004
0A
of
1
A
8
A
7
6
5
4
3
2
1
1
1
1
Disable
0
0
0
VCC3
VVBWN
VCOMP
DACAVDD
DACAVSS
VRSET
ZCMP_N
ZVREF
ZCMP_P
0A
12 31Monday, August 23, 2004
Enable
RSYNC
LSYNC
CSYNC
The differences between the traces of
D D
MuTIOL Strobes and Data in each group
should be smaller than 0.05",and strobes
need guide GND trace
ZSTB014
ZSTB-014
ZSTB114
ZSTB-114
C C
The differences between the traces
of MuTIOL Strobes and Data should
be smaller than 0.05"
ZAD[0..16]14
ZAD[0..16]
MS7_POK15,28
PCIRST#14,18,28
ZCLK0
ZCLK03
ZSTB0
ZSTB-0
ZSTB1
ZSTB-1
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
ZCMP_N
ZCMP_P
ZVREF
ZUREQ
ZUREQ14
ZDREQ
ZDREQ14
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
C209
X_1u
B B
VCC3
CP26
X_Copper
Z1XAVDD
CB39
104P
Z1XAVSS
DCLKAVDD
CB37
104P
DCLKAVSS
FB10
X_120_600mA
CB38
C0.01u50x
CP27
X_Copper
CP25
X_Copper
FB9
X_120_600mA
CB36
1u
CP24
X_Copper
C207
C10u10y_1206
AE1
AJ5
AH6
AG1
AH2
AB1
AB2
AD3
AD4
AD6
AC6
AD5
AE8
AF8
AJ7
AG7
AE7
AD7
AG5
AF6
AJ4
AH4
AJ3
AG3
AF4
AE5
AE2
AF2
AE3
AF1
AG8
F10
F11
C208
X_10P
760-3
MCLKAVDD
MCLKAVSS
NB1C
ZCLK
ZSTB0
ZSTB#0
ZSTB1
ZSTB#1
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
ZCMP_N
ZCMP_P
ZVREF
ZUREQ
ZDREQ
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
PWROK
PCIRST#
SiS760GX
Z4XAVDD
Z4XAVSS
CB42
104P
MuTIOL
CB33
104P
100RST
100RST
VGACLK
ROUT
GOUT
BOUT
HSYNC
VSYNC
DDC1DATA
DDC1CLK
VCC3
VGACLK 3
ROUT 21
GOUT 21
BOUT 21
HSYNC 21
VSYNC 21
DDC1DATA 21
DDC1CLK 21
INTA# 14,18,19
B10
VOSCI
B8
ROUT
A8
GOUT
A9
BOUT
HSYNC
VSYNC
VGPIO1
VGPIO0
INTA#
RSYNC
LSYNC
CSYNC
VCOMP
VRSET
VVBWN
DACAVDD1
DACAVSS1
DACAVDD2
VGA (For 760 Only)
DACAVSS2
DCLKAVDD
DCLKAVSS
MCLKAVDD
MCLKAVSS
TESTMODE0
TESTMODE1
TESTMODE2
TRAP0
TRAP1
TRAP2
TRAP3
TRAP4
ENTEST
DLLEN#
Control & Hardware
Trap
VCC3
CP22
X_Copper
FB8
X_120_600mA C183
VCC3VCC3
C10u10y_1206
C200
C10u10y_1206
C213
CB32
C0.01u50x
X_Copper
CP28
X_Copper
FB11
X_120_600mA
CB41
1u
CP56
X_Copper
CP21
D8
F9
C7
C8
F8
D7
F7
E8
C9
A10
B9
B7
E9
A7
E10
D9
C10
E7
D10
V25
U28
V26
V28
W25
W24
V27
U29
V24
V29
R116 33
R117 33
R115
R118
RSYNC
LSYNC
CSYNC
VCOMP
VRSET
VVBWN
DACAVDD
DACAVSS
DACAVDD
DACAVSS
DCLKAVDD
DCLKAVSS
MCLKAVDD
MCLKAVSS
R74 X_4.7K
R73 4.7K
CP10 X_Copper
NB solder
side
C10u10y_1206
VCC1_8
2r0805
R125
CB34
10U/0805
FB7
X_120_600mA
Place near 760 chip.
VCC1_8
R113
150RST
R112
49.9RST
CP18
X_Copper
MSI
Title
Size Document Number Rev
Date: Sheet of
VGA
panel link
VB
LSYNC
RSYNC
CSYNC
CB31
1u
CP20
X_Copper
R109 130RST
R107 56
CB30
104P
CB29
104P
R110 56
R123 4.7K
R120 4.7K
R124 4.7K
C205 104P
C203 104P
<OrgName>
SiS 760-3 MuTIOL/Other
MS-7112
A
8
A
7
6
5
4
3
2
1
OVDDM connect to VCC3 when use
Ref SiS AP103 Page 78
SiS760 without Local Frame Buffer.
If only support SiS 760 , VDDQ = IVDD = 1.5V
Y14
M10
Y15
VDDM
VDDQ
N10
VDDM
VDDQ
Y16
P9
VDDM
VDDQ
Y17
P10
VDDM
VDDQ
Y18
R10
VDDM
VDDQ
VCC3
Y19
Y20
AA12
VDDM
VDDM
VDDM
PVDDM
PVDDM
PVDDM
PVDDM
PVDDM
VCC3
VCC3
VCC3
VCC3
VCC3
VSS
VSSH
VSSH
VSSH
VSS
VSS
VSS
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSS
VSSH
VSSH
VSSH
VSS
VSS
VSSH
VSSH
VSSH
VSSH
VSS
VSS
VSSM
VSSM
VSS
VSS
VSSM
VSSM
VSSM
VSS
VSSM
VSSM
VSSM
VSS
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VDDQW9VDDQ
VDDQ
VDDQ
VDDQ
U9
T10
V10
U10
VCC3
R20
U20
W14
W16
W18
VCC3
K12
J12
J11
J10
H9
K13
K15
K17
K19
L12
L13
L14
L15
L16
L17
L18
L19
L20
M13
M15
M17
M19
N12
N14
N16
N18
N19
N20
P13
P15
P17
P19
R12
R14
R16
R18
R19
T13
T15
T17
T19
U12
U14
U16
U18
U19
V19
W19
In
VDDQ
MSI
Title
Size Document Number Rev
Date: Sheet
LAYOUT: Place HT bypass caps on
topside newr connected lokar HT link.
VDD_12_A
C142 X_4.7u_0805
CB6 X_0.022u
CB8 0.022u
VDD_12_A
C114 4.7u_0805
CB4 1500P
VCC3
CB19 104p
CB83 C0.01u50x_B
CB80 104P_B
CB82 C0.01u50x_B
CB89 104P_B
CB79 X_C0.01u50x_B
Solder side
<OrgName>
SiS 760-4 Power
MS-7112
of
13 31Monday, August 23, 2004
0A
VDDQ
VDD_12_A
J17
J18
J19
J20
J21
J22
K14
K16
K18
K20
K21
L21
M20
M21
N21
P20
P21
K11
L11
M11
M12
M14
M16
M18
N11
N13
N15
N17
P11
P12
P14
P16
P18
R11
R13
R15
R17
T11
T12
T14
T16
T18
U11
U13
U15
U17
V11
V12
V13
V14
V15
V16
V17
V18
W13
W15
W17
SiS760GX
NB1E
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
W10
H21
H22
J13
J14
J15
J16
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
760-5
VDDZ
VDDZ
IVDD
VDDZ
IVDD
IVDDY9IVDD
Y11
Y10
AA9
W12
W11
VCC1_8
AA10
VDD_12_A
CB16 104P
CB17 C0.01u50x
VDD_12_A
CB81 104P_B
CB85 104P_B
CB84 C0.01u50x_B
CB87 C0.01u50x_B
Solder side
R21
T20
T21
U21
V20
Y13
Y12
W20
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
Power
VDDQM9VDDQ
VDDQ
VDDQK9VDDQJ9VDDQJ8VDDQ
VDDZ
H8
L10
AA11
K10
VDDQ
NB1D
D D
VCC1_8
AJ6
AH7
AH5
AH3
AG6
AG4
VDDQ
AG2
AF3
AD2
AD1
AC5
AC4
AC3
AB6
AA6
AB3
AB4
AB5
VDD_12_A
C C
VCC3
B B
AC1
AC2
A13
A14
A15
B13
B14
B15
C13
C14
C15
D13
D14
D15
D16
E12
E13
E14
E15
F12
F13
F14
F15
P28
P29
R24
R25
R26
R27
R28
R29
T24
T25
T26
T27
T28
T29
U24
U25
U26
U27
VDDQ VDDQ
Y6
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
SiS760GX
C212 C10u10y_1206
CB43 104P
CB44 104P
CB50 C0.01u50x
CB45 C0.01u50x
VSS
A4
A26
AE4
AE6
AE14
AE9
AE19
AE17
AE11
VSS
VSS
VSSM
VSSM
VSSM
VSSM
VDDQW1VDDQW2VDDQW3VDDQW4VDDQW5VDDQW6VDDQY1VDDQY2VDDQY3VDDQY4VDDQY5VDDQ
760-4
Power
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSHB5VSSHB2VSSH
B27
B26
B25
B24
B23
B22
B21
B20
B19
B18
B17
B16
C404 C10u10y_1206_B
CB86 104P_B
CB92 104P_B
CB93 C0.01u50x_B
CB88 C0.01u50x_B
Solder side
AE22
VSSM
AE24
VSSM
AE28
VSSM
VSSM
VSSH
VSSC6VSSC3VSSH
C16
AF5
VSS
VSSH
C27
AF7
C29
VSS
AF12
AF16
VSSM
AF18
VSSM
VSSM
VSSD4VSSD1VSSH
VSSH
D17
AF21
VSSM
VSSH
D20
AF25
D23
AF27
VSSM
VSSM
VSSH
VSSH
D26
AG10
VSSM
VSSH
D27
AG14
VSSM
VSSH
D28
AG23
AG28
AH11
AH9
VSSM
VSSM
VSSM
VSSE2VSSE5VSSH
E16
E19
AH13
VSSM
VSSM
VSSH
VSSH
E22
AH15
E25
AH17
VSSM
VSSH
E28
AH21
AH19
VSSM
VSSM
VSSH
VSSF3VSSF6VSSH
AH24
VSSM
VSSM
F18
AH26
VSSM
VSSH
F21
AJ22
AJ18
VSSM
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
F24
VCC1_8
VCC1_8
VSSM
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ25
VSSM
F28
G1
G4
G26
G28
H2
H5
H25
H28
J3
J6
J24
J28
K1
K4
K26
K28
L2
L5
L25
L28
M3
M6
M24
M28
N1
N4
N26
N28
P2
P5
P25
P26
R3
R6
T1
T4
U2
U5
V6
AA24
AA28
AB25
AB27
AC24
AC28
AD8
AD13
AD15
AD20
AD23
AD26
Out
C178 1u
C204 1u
CB90 104P_B
CB91 X_104P_B
Solder side
A
5
AB26
AA24
AA25
AC26
AB25
AA23
AA26
V24
W26
R25
Y24
Y23
Y22
Y26
AD[31..0]
F1
PREQ4#
F2
PREQ3#
F3
PREQ2#
F4
PREQ1#
E1
PREQ0#
H4
PGNT4#
G1
PGNT3#
G2
PGNT2#
G3
PGNT1#
G4
PGNT0#
K3
C/BE3#
M2
C/BE2#
P1
C/BE1#
U4
C/BE0#
F5
INTA#
E4
INTB#
E3
INTC#
E2
INTD#
M1
FRAME#
N4
IRDY#
N3
TRDY#
P4
STOP#
P3
SERR#
P2
PAR
N2
DEVSEL#
N1
PLOCK#
W3
PCICLK
B3
PCIRST#
ZCLK
ZSTB0
ZSTB0#
ZSTB1
T26
ZSTB1#
ZUREQ
ZDREQ
ZCMP_N
ZCMP_P
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
ZVREF
ZAD16
VCC3
INTB#
INTC#
INTD#
INTA#
D D
C C
VCC1_8
R192
B B
150RST
R201
49.9RST
RN79
12
34
56
78
8P4R-8.2K
PREQ#119
PREQ#019
PGNT#119
PGNT#019
C/BE#319
C/BE#219
C/BE#119
C/BE#019
INTA#12,18,19
INTB#18,19
INTC#19
INTD#19
FRAME#19
IRDY#19
TRDY#19
STOP#19
SERR#19
PAR19
DEVSEL#19
PLOCK#19
96XPCLK3
PCIRST#12,18,28
ZCLK13
ZSTB012
ZSTB-012
ZSTB112
ZSTB-112
ZUREQ12
ZDREQ12
CB59
0.1u
INTA#
INTB#
INTC# ICHRDYB
INTD# IDEREQB
FRAME# CBLIDB
IRDY#
TRDY# IDEIOR-B
STOP# IDEIOW-B
SERR#
PAR IDESAB2
DEVSEL# IDESAB1
PLOCK# IDESAB0
96XPCLK IDECS-B1
PCIRST# IDECS-B0
ZCLK1 IDEDA4
ZSTB0 IDEDA6
ZSTB-0 IDEDA7
ZSTB1 IDEDA9
ZSTB-1 IDEDA10
ZUREQ IDEDA13
ZDREQ IDEDA14
SZVREF IDEDB12
AD[31..0]19
PREQ#1
PREQ#0
PGNT#1 IDACK-A
PGNT#0
C/BE#3 IDESAA1
C/BE#2 IDESAA0
C/BE#1
C/BE#0 IDECS-A1
R259 33
SZCMP_N IDEDB1
SZCMP_P IDEDB3
SZ1XAVDD IDEDB7
SZ1XAVSS IDEDB8
SZ4XAVDD IDEDB10
SZ4XAVSS IDEDB11
SZVREF IDEDB13
ZAD16 IDEDB14
4
AD31 ZAD0
AD30 ZAD1
AD29 ZAD2
AD28 ZAD3
AD27 ZAD4
AD26 ZAD5
AD25 ZAD6
AD24 ZAD7
AD23 ZAD8
AD22 ZAD9
AD21 ZAD10
AD20 ZAD11
AD19 ZAD12
AD18 ZAD13
AD17 ZAD14
AD16 ZAD15
AD31H3AD30H2AD29H1AD28J4AD27J3AD26J2AD25J1AD24K4AD23K2AD22K1AD21L4AD20L3AD19L2AD18L1AD17M4AD16M3AD15R4AD14R3AD13R2AD12R1AD11T4AD10
PCI
964/964L
HyperZip
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
T22
T23
W24
W25
V22
V23
V26
U22
T24
U25
U24
P22
U26
R22
R24
R26
AD15
ZAD15
AD14
AD13
AD12
AD11
AD10
T3
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
W4
AD9T2AD8T1AD7U3AD6U2AD5U1AD4V4AD3V3AD2V2AD1V1AD0
IDE
AD0
3
IDESAA2
IDECS-A0
IDEDA0
IDEDA1
IDEDA2
IDEDA3
IDEDA5
IDEDA8
IDEDA11
IDEDA12
IDEDA15
IDEDB0
IDEDB2
IDEDB4
IDEDB5
IDEDB6
IDEDB9
IDEDB15
IDEAVDD
CB76
C0.01u50x
IDEAVDD
IDEAVSS
ICHRDYA
IDREQA
IIRQA
CBLIDA
IIORA#
IIOWA#
IDACKA#
IDSAA2
IDSAA1
IDSAA0
IDECSA1#
IDECSA0#
ICHRDYB
IDREQB
IIRQB
CBLIDB
IIORB#
IIOWB#
IDACKB#
IDSAB2
IDSAB1
IDSAB0
IDECSB1#
IDECSB0#
IDA0
IDA1
IDA2
IDA3
IDA4
IDA5
IDA6
IDA7
IDA8
IDA9
IDA10
IDA11
IDA12
IDA13
IDA14
IDA15
IDB0
IDB1
IDB2
IDB3
IDB4
IDB5
IDB6
IDB7
IDB8
IDB9
IDB10
IDB11
IDB12
IDB13
IDB14
IDB15
SB1A
W1
W2
AE15
AD14
AC15
AE16
AF15
AC14
AD15
AC16
AF16
AD16
AE17
AF17
AE22
AD21
AC22
AE23
AF22
AC21
AD22
AF24
AF23
AD23
AF25
AE24
AF14
AD13
AF13
AD12
AF12
AD11
AF11
AF10
AE10
AE11
AC11
AE12
AC12
AE13
AC13
AE14
AF21
AD20
AF20
AD19
AF19
AD18
AF18
AD17
AC17
AE18
AC18
AE19
AC19
AE20
AC20
AE21
SIS964 V:A2
CB77
0.1u
IDESAA[0..2]
IDECS-A[0..1]
IDESAB[0..2]
IDECS-B[0..1]
2
VCC1_8
CP47
1 2
X_Copper
ICHRDYA
IDEREQA
IDEIRQA
CBLIDA
IDEIOR-A
IDEIOW-A
IDEIRQB
IDACK-B
IDEDA[0..15] 22
IDEDB[0..15] 22
ICHRDYA 22
IDEREQA 22
IDEIRQA 22
CBLIDA 22
IDEIOR-A 22
IDEIOW-A 22
IDACK-A 22
IDESAA[0..2] 22
IDECS-A[0..1] 22
ICHRDYB 22
IDEREQB 22
IDEIRQB 22
CBLIDB 22
IDEIOR-B 22
IDEIOW-B 22
IDACK-B 22
IDESAB[0..2] 22
IDECS-B[0..1] 22
VCC1_8
FOR EMI
Put near 964 Chip.
ZSTB1
ZSTB-1
ZSTB0
ZSTB-0
1 2
3 4
5 6
7 8
X_8P4R-4.7K_0402
1
RN68
C279
100p
VCC1_8
ZAD[16..0]12
VCC1_8 VCC1_8
A A
C352
X_10u/0805
5
CP36
1 2
X_Copper
CP35
1 2
X_Copper
SZ1XAVDD SZ4XAVDD
C277
0.1u
SZ1XAVSS
Analog Power supplies of Transzip function for 962 Chip.
CP60
1 2
X_Copper
CP62
1 2
X_Copper
4
C275
0.1u
SZ4XAVSS
VCC1_8
CP30
1 2
X_Copper
CP58
1 2
X_Copper
3
C268
0.1u
R199 56
R205 56
SZCMP_N
SZCMP_P
Micro-Star
Document Number
Last Revision Date:
2
Monday, August 23, 2004
Title
MS-7112
SIS964-1
Sheet of
1
Rev
0A
14 31
5
THRMTRIP#5,28
INIT#
A20M#
SMI#
INTR
NMI
IGNNE#
FERR#
STPCLK#
CPUSLP#
LDTREQ#10
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#
SIRQ
OSC32KHI
OSC32KHO
BATOK
MS7_POK
SMBDAT
SMBCLK
AC_SDIN0
AC_SDIN1
AC_SDOUT
AC_SYNC
AC_RST#
AC_BITCLK
SPK
PWRBTN#
PME#
PSON#
RSMRST#
KBDAT
KBCLK
MSDAT
MSCLK
C326
X_0.1u
INIT#
D D
LAD[0..3]25
LFRAME#25
LDRQ#25
SIRQ25
MS7_POK12,28
C C
SMBDAT3,7,19,28
SMBCLK3,7,19,28
AC_SDIN019,24
AC_SDIN119
AC_SDOUT19,24
AC_SYNC19,24
AC_RST#19,24
AC_BITCLK19,24
SB14MHZ3
SPK30
PWRBTN#30
PME#18,19
B B
A A
PSON#28,30
S3AUXSW#28
KBDAT21
KBCLK21
MSDAT21
MSCLK21
APICD0
RTCVDD
X_0.1u
C327
AB23
AD26
AE25
AC24
AD25
AD24
AE26
AB22
AC23
AF26
AC25
AB24
AC4
AC3
AE1
AF1
AD3
AE2
AF2
AB1
AB2
AB3
AC1
AC2
AD2
AD1
C2
C1
D4
D2
C3
D3
E6
B4
B5
D1
D5
A7
D8
A3
B6
B2
A5
B8
A8
C8
D6
INIT#
A20M#
SMI#
INTR
NMI
IGNNE#
FERR#
STPCLK#
CPUSLP#
APICCK/LDTREQ#
APICD0/THERM2#
APICD1/GPIOFF#
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#
SIRQ
OSC32KHI
OSC32KHO
BATOK
PWROK
RTCVDD
RTCVSS
GPIO20
GPIO19
AC_SDIN0
AC_SDIN1
AC_SDOUT
AC_SYNC
AC_RESET#
AC_BIT_CLK
OSCI
ENTEST
SPK
PWRBTN#
PME#
PSON#
/others
AUXOK
ACPILED
GPIO13
GPIO14
GPIO15/KBDAT
GPIO16/KBCLK
GPIO17/PMDAT
GPIO18/PMCLK
CPU_S
APIC
LPC
RTC
GPIO
AC97
ACPI
/geyserville
4
MII
964/964L
GPIO
KBC
OSC25MHI
OSC25MHO
TXCLK
TXEN
TXD0
TXD1
TXD2
TXD3
NC34
NC31
NC32
NC30
RXCLK
RXDV
RXER
RXD0
RXD1
RXD2
RXD3
NC36
NC35
NC38
NC37
NC33
MDIO
MIIAVDD
MIIAVSS
GPIO0/SPDIF
GPIO1/LDRQ1#
GPIO2/THERM#
GPIO3/EXTSMI#
GPIO4/CLKRUN#
GPIO5/PREQ5#
GPIO6/PGNT5#
GPIO7
GPIO8/RING
GPIO9/AC_SDIN2
GPIO10/AC_SDIN3
GPIO11/OSC25M/STP_PCI#
GPIO12/CPUSTP#
COL
CRS
MDC
SB1B
D7
C7
D10
E10
E11
D12
C12
E13
D13
E14
C14
D15
C13
A12
A13
B12
A11
B11
C11
A10
C10
A9
B9
A14
B14
C15
C9
E9
B7
A6
Y3
AE3
Y4
AA1
AA2
AA3
AA4
A4
C6
C5
C4
F6
E5
SIS964 V:A2
3
MIICLK25I
MIICLK25O
MIITX
TXEN
1 2
3 4
5 6
7 8
RN73
8P4R-22
Put closed to SiS964
MIIRXCLK
MIIRXDV
MIIRXER
MIIRXD0
MIIRXD1
MIIRXD2
MIIRXD3
MIICOL
MIICRS
MDC
MDIO
MIIAVDD
C314
X_C0.01u50x
GPIO1
GPIO1 27
THERM#
THERM# 25
GPIO3
GPIO4
RING
RING 30
MIIRXCLK 20
MIIRXDV 20
MIIRXER 20
MIIRXD0 20
MIIRXD1 20
MIIRXD2 20
MIIRXD3 20
MIICOL 20
MIICRS 20
FB13
80S/0805
21
C313
0.1u
2
VCC2.5
STPCLK#
MIITXD0 20
MIITXD3 20
MIITXD2 20
MIITXD1 20
VCC18SBY
VCC3SBY RTCVDD
R240
47K
R241
15KST
CPUSLP#
SMBCLK
SMBDAT
NMI
SMI#
IGNNE#
INIT#
APICD0
A20M#
INTR
FERR#
OSC32KHO
OSC32KHI
32K-12.5pf-CSA-309-D
Q32
PNP-3906LT1-S-SOT23
E C
B
474P-X7R
R233
10K
Q34
B
2N3904S
E C
VCC3SBY
C288
R265 1K
RN67
1 2
3 4
5 6
7 8
4.7K_8P4R
RN69
1
1
5
2
2
3
3
4
4
6
6
7
7
8
8
9
9
10
10P8R-4.7K
C335
C15p50n
BATTERY BLOCK
R217
1K
2
3
12
Battery Socket
BAT1
5
10
R260
10M
Y4
12
3
4
R221 1K
1
D12
BAT54A
RSMRST#
RSMRST# 20,28
C317
C15p50n
C334
C15p50n
SIO_VBAT 25
MIICLK25I
MIICLK25O
MDIO
MDC
MIITX
TXEN
C312 22p
GPIO3
GPIO4
PME#
JBAT1 C le a r CMOS
Normal1 - 2
Clear CMOS2 - 3
Y3
25MHZ
R243
X_10M
1 2
3 4
5 6
7 8
RN75
8P4R-22
R269 X_4.7K
R255 X_4.7K
R249 4.7K
JBAT1
1
2
3
Chasiss
Intrusion Header
CASEOPEN#25
1
C315
C20p50n
Trace Width 10mils.
MIIMDIO 20
MIIMDC 20
MIITXCLK 20
MIITXEN 20
VCC3SBY
D13
1N4148S
R23410K
C292
C0.01u50x
R220 2M
AUX_OK BLOCK
AC
JCI1
1
2
X_D1x2
BATOK
C306
474P-X7R
AC_BITCLK
5
C324
10p
AC_SDOUT
4
C346
X_10p
AC_SYNC
C347
X_10p
Micro-Star
Document Number
Last Revision Date:
3
2
Monday, August 23, 2004
Title
MS-7112
SIS964-2
Sheet of
1
Rev
0A
15 31
5
4
3
2
1
OSC12MHI
OSC12MHO
USBREF
USBPVDD18
USBPVSS18
UVDD33
UVDD33
UVDD33
IVDD_AUX
IVDD_AUX
TX1+
TX1ÂRX1+
RX1ÂTX2+
TX2ÂRX2+
RX2-
HDACT
GPIO21/EESK
GPIO22/EEDI
GPIO24/EECS
TRAP0
TRAP1
SB1C
E25
E26
A24
F24
F23
A25
B24
D23
C23
G16
G18
H20
G21
H21
AD7
AC7
AF6
AE6
AD9
AC9
AF8
AE8
AB4
A16
A15
B16
B15
A26
B25
B26
C25
SIS964 V:A2
USBREF
USBPVDD
USBPVSS
USBCOMPVCC
USBCOMPVSS
USBCOMPDD33
USBCOMPSS33
USBCOMPDD33
IVDD_AUX
IVDD_AUX
R209 X_22
R212 X_22
R222 127RST
SATA_TX1
SATA_TX#1
SATA_RX1
SATA_RX#1
SATA_TX2
SATA_TX#2
SATA_RX2 SATA_RX2
SATA_RX#2 SATA_RX#2
HD_SATA_LED 30
1
CS
2
SK
3
DI
4
DO
R286 X_4.7K
VCC
GND
U11
OSC12 3
C284
X_10P
VCC18SBY
SATA1
1
SATA_TX1
SATA_TX#1
SATA_RX#1
SATA_RX1
SATA_TX2
SATA_TX#2
VCC3SBY
4.7K
R261
8
7
NC
6
NC
5
93C46S-1
CB75
0.1u
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
SERIAL-ATA-ORG
SATA2
1
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
SERIAL-ATA-ORG
964L remove
SATA1 & 2
VCC18SBY
VCC3SBY
R250
AA10
G26
G25
H24
H23
C21
D21
A22
B22
C19
D19
A20
B20
C17
D17
A18
B18
C26
C24
D26
D25
D24
E24
E23
F22
E18
E20
E22
F17
F18
F19
F20
F21
G22
H22
AA6
AA7
AA8
AA9
AB6
AF3
AD4
AB5
AD5
AC5
AE4
AF4
Y2
Y1
UV0+
UV0ÂUV1+
UV1ÂUV2+
UV2ÂUV3+
UV3ÂUV4+
UV4ÂUV5+
UV5ÂUV6+
UV6ÂUV7+
UV7-
OC0#
OC1#
OC2#
OC3#
OC4#
OC5#
OC6#
OC7#
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
AVDDSATA
AVDDSATA
AVDDSATA
AVDDSATA
AVDDSATA
AVDDSATA
SATARXAVDD
SATARXAVSS
SATATXAVDD
SATATXAVSS
SATACMPAVDD
SATACMPAVSS
REXT
CLK25MI
CLK25MO
SIS964-3
USB
USBCMPAVDD18
USBCMPAVSS18
USBCMPAVDD33
USBCMPAVSS33
GPIO23/EEDO
IPB_OUT0/PLLENN
IPB_OUT1/ZCLKSEL
UV0+23
D D
REAL
FRONT
VCC18SBY
CP32 X_Copper
C C
VCC1_8
+
10u/0805
CP40 X_Copper
CE3
964L remove R437
B B
UV0-23
UV1+23
UV1-23
UV2+23
UV2-23
UV3+23
UV3-23
UV4+23
UV4-23
UV5+23
UV5-23
UV6+23
UV6-23
UV7+23
UV7-23
OC#023
OC#412,23
UVDD18SB
CB58
X_1u
AVDDSATA
CB68
X_1u
SATARXVDD
SATARXVSS
SATATXVDD
SATATXVSS
SATACMPVDD
SATACMPVSS
SATACMPVSS
SATACLK-3
SATACLK3
CB60
0.1u
CB67
0.1u
374RST
CB56
X_1u-0805
VCC18SBY
X_Copper
C274
0.1u
CP31
1 2
X_Copper
CP63
1 2
X_Copper
CP64
1 2
X_Copper
CP37
1 2
X_Copper
CP38
CP39
1 2
X_Copper
OC#4
12
CP33
X_Copper
IVDD_AUX
C269
X_C0.01u50x
CP34
X_Copper
C272
0.1u
C290
X_C0.01u50x
C294
0.1u
R226 X_1K
C276
X_C0.01u50x
C289
0.1u
C291
X_C0.01u50x
USBPVDD
USBPVSS
USBCOMPVCC
USBCOMPVSS
USBCOMPDD33
USBCOMPSS33
X_Copper
VCC1_8
VCC1_8
A A
VCC1_8
CP44
X_Copper
CP43
X_Copper
CP45
X_Copper
CP46
X_Copper
CP42
X_Copper
CP41
CB73
X_1u
CB71
X_1u
CB70
X_1u
5
CB72
0.1u
CB74
0.1u
CB69
0.1u
SATARXVDD
SATARXVSS
SATATXVDD
SATATXVSS
SATACMPVDD
SATACMPVSS
Micro-Star
Document Number
Last Revision Date:
4
3
2
Monday, August 23, 2004
Title
MS-7112
SIS964-3
Sheet of
1
Rev
0A
16 31
5
4
3
2
1
VCC1_8
P26
VDDZ
P21
VDDZ
R21
VDDZ
W21
M21
AB18
AB16
AB14
AB11
AA21
AB19
AB13
AB20
AB17
AB15
AB12
AB10
AA22
AB21
W22
M26
M25
M24
M23
M22
T25
V25
V21
Y25
Y21
N21
T21
U21
AA5
K21
F12
F15
B10
B13
E12
E15
F10
F11
F13
G20
F14
P25
P24
P23
N26
N25
N24
N23
N22
R5
G5
L21
U5
M5
H5
J21
W5
N5
L26
L25
L24
L23
L22
Y5
T5
L5
V5
P5
K5
J5
F9
E7
F7
E8
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
VTT
VTT
IVDD_AUX
IVDD_AUX
IVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
PVDD_AUX
PVDD_AUX
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19
3
Power
VSSZ
VSSZ
NC20
NC21
NC22
NC23
NC24
NC25
NC26
NC27
NC28
NC29
J26
J25
J22
K26
K25
F16
K24
K23
K22
E16
VSSD9VSS
D11
VSSZ
VSS
R23
U23
D14
W23
Place on 964 solder side
D D
VCC1_8 VCC1_8
CB111 0.1u_B
CB99 0.1u_B
CB104 0.1u_B
CB96 X_0.1u_B
CB109 X_0.1u_B
VCC3
Place on 964 solder side
VCC3
CB110 X_0.1u_B
CB102 0.1u_B
C C
CB100 0.1u_B
CB107 X_0.1u_B
CB105 0.1u_B
VCC3
CB108 X_1u_B
VCC2.5
VCC18SBY
Place on 964 solder side
VCC2.5
CB98 1u_B
CB97 X_0.1u_B
B B
A A
VCC18SBY
CB103 1u_B
VCC3SBY
CB106 0.1u_B
CB101 X_0.1u_B
5
VCC3SBY
CB57
CB66
0.1u
0.1u
4
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
2
SB1D
L10
L11
L12
M10
M11
M12
N10
N11
N12
N13
N14
N15
N16
P10
P11
P12
P13
P14
R10
R11
R12
R13
R14
T10
T13
T14
U10
U13
U14
U15
P15
P16
R15
R16
T15
T16
U16
F25
F26
G23
G24
H25
H26
J23
J24
A23
B23
C22
D22
A21
B21
E21
C20
D20
A19
B19
E19
C18
D18
A17
B17
E17
C16
D16
L13
L14
L15
L16
M13
M14
M15
M16
AD10
AC10
AF9
AE9
AB9
AD8
AC8
AB8
AF7
AE7
AB7
AD6
AC6
AF5
AE5
T11
T12
U11
U12
SIS964 V:A2
Micro-Star
Title
Document Number
Last Revision Date:
Monday, August 23, 2004
MS-7112
SIS964-4
1
Sheet o f
17 31
Rev
0A
5
D D
C C
B B
A A
GAD[0..31]
GC/BE#[0..3]
SBA[0..7]
AGPST[0..2]
GAD[0..31] 10
GC/BE#[0..3] 10
SBA[0..7] 10
AGPST[0..2] 10
5
VCC3
VCC5
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B1
B2
B3
B4
B5
B6
B7
B8
B9
C231 X_0.1u
INTB#14,19
AGPCLK03 PCIRST# 12,14,28
GREQ#10
AGPST010
AGPST210
RBF#10
DBIL10
SBSTB10
VCC3SBY
ADSTB110
GC/BE#210
GIRDY#10
GDEVSEL#10
GSERR#10
GC/BE#110
ADSTB010
GREQ#
AGPST0
AGPST2
RBF#
DBIL
SBA0
SBA2
SBA4
SBA6
GAD31
GAD29
GAD27
GAD25
GAD23
GAD19
GAD17
GC/BE#2
GIRDY#
GDEVSEL#
GPERR#
GSERR#
GC/BE#1
GAD14
GAD12
GAD10
GAD8
GAD7
GAD5
GAD3
GAD1
VREF4X_OUT
C256
1u
AGP1
OC#
5V
5V
USB+
GND
INTB#
CLK
REQ#
VCC3.3
ST0
ST2
RBF#
GND
SPARE
SBA0
VCC3.3
SBA2
SB_STB
GND
SBA4
SBA6
RESERVED
GND
3.3VAUX
VCC3.3
AD31
AD29
VCC3.3
AD27
AD25
GND
AD_STB1
AD23
VDDQ3.3
AD21
AD19
GND
AD17
C/BE2#
VDDQ3.3
IRDY#
3.3VAUX
GND
SPARE
VCC3.3
DEVSEL#
VDDQ3.3
PERR#
GND
SERR#
C/BE1#
VDDQ3.3
AD14
AD12
GND
AD10
AD8
VDDQ3.3
AD_STB0
AD7
GND
AD5
AD3
VDDQ3.3
AD1
VREF0
AIMM132AGP
4
+12V
VDDQ
R138
X_1KST
A1
12V
RESEVED
USBÂGND
INTA#
RST#
GNT#
VCC3.3
ST1
PIPE#
GND
WBF#
SBA1
VCC3.3
SBA3
SB_STB#
GND
SBA5
SBA7
GND
VCC3.3
AD30
AD28
VCC3.3
AD26
AD24
GND
AD_STB1#
GC/BE3#
VDDQ3.3
AD22
AD20
GND
AD18
AD16
VDDQ3.3
FRAME#
SPARE
GND
SPARE
VCC3.3
TRDY#
STOP#
PME#
GND
PAR
AD15
VDDQ3.3
AD13
AD11
GND
AD9
C/BE0#
VDDQ3.3
AD_STB0#
AD6
GND
AD4
AD2
VDDQ3.3
AD0
VREF1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
GGNT#
AGPST1
DBIH
WBF#
SBA1
SBA3
SBA5
SBA7
GAD30
GAD28
GAD26
GAD24
GC/BE#3
GAD22GAD21
GAD20
GAD18
GAD16
GFRAME#
GTRDY#
GSTOP#
R152
GPAR
GAD15
GAD13
GAD11
GAD9
GC/BE#0
GAD6
GAD4
GAD2
GAD0
C217
0.1u
GCDET# 10
INTA# 12,14,19
GGNT# 10
AGPST1 10
DBIH 10
WBF# 10
SBSTB# 10
ADSTB#1 10
GC/BE#3 10
GFRAME# 10
GTRDY# 10
GSTOP# 10
X_0
GPAR 10
GC/BE#0 10
ADSTB#0 10
GVREFGC 10
TYPEDET#
RESERVED
RESERVED
RESERVED
4
3
PME# 15,19
3
GCDET#
C235
10p
must be closed to AGP slot pin-A7
VCC3
C234 0.1u
C223 0.1u
C237 0.1u
C243 X_C0.01u50x
C225 0.1u
C222 X_C0.01u50x
Closed to AGP slot
VDDQ
C210 X_C1000p50x
PLANE CAP
VCC3
R162
10K
R163 4.7K
VCC1_8
2
VCC5
VDDQ
1.05KST
Q25
2N7002S
R165
8.2K
Q21
2N7002S
R188
GPERR#
R159
10K
Q23
B
2N3904S
E C
CLOSED TO AGP SLOT
VCC3SBY
C236 0.1u
+12V
C224 X_0.1u
Micro-Star
Document Number
Last Revision Date:
2
Monday, August 23, 2004
VDDQ
C244
560P
R166
R155
2.37KST
82RST
VREF4X_OUT
R157
R154
2.37KST
82RST
C249
560P
VDDQ
C216 X_0.1u
C219 0.1u
C241 X_10u/0805
C214 1u-0805
VDDQ
C239 X_0.1u
C238 X_0.1u
Closed to AGP slot
solderside
Title
AGP Slot & Pull up/dn resistor
1
MS-7112
Sheet of
1
Rev
0A
18 31
5
PCI1:AD17
INTB#
VCC3
VCC5
D D
PCICLK13
PREQ#014
C C
DEVSEL#14
PLOCK#14
B B
A A
-12V
PTCK
INTC#
INTC#14
INTA#
INTA#12,14,18
PRSNT#11
PRSNT#12
PCICLK1
PREQ#0
AD31
AD29
AD27 AD26
AD25
C/BE#3
C/BE#314
AD23
AD21 AD20
AD19
AD17
C/BE#2
C/BE#214
IRDY#
IRDY#14
DEVSEL#
PLOCK#
PERR#
SERR#
SERR#14
C/BE#1
C/BE#114
AD14
AD12
AD10
AD8 C/BE#0
AD7
AD5
AD3
AD1 AD0
ACK64# REQ64#
REQ64#
ACK64#
SDONE
SBO#
1 2
3 4
5 6
7 8
VCC3
12
+
X_C1000u6.3d8
5
PCI1
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
PCI-D120-WH-SN
RN78
8P4R-2.7K
EC39
VCC5
TRST#
+12V
TMS
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
REQ64#
TDI
+5V
+5V
+5V
+5V
+5V
+5V
+5V
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
VCC5
PTCK
PTRST#
PTMS
PTDI
VCC3
PRSNT#11
PRSNT#12
PRSNT#22
PRSNT#21
+12V
PTRST#
PTMS
PTDI
INTB#
INTD#
PCIRST2#
PGNT#0
PME#
AD30
AD28
AD24
AD22
AD18
AD16
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD15
AD13
AD11
AD9
AD6
AD4
AD2
RESERVED
VCC3SBY
RN77
7 8
5 6
3 4
1 2
X_8P4R-4.7K
C321 X_0.1u
C322 X_0.1u
C373 X_0.1u
C372 X_0.1u
INTB# 14,18
INTD# 14
PCIRST2# 28
PGNT#0 14
PME# 15,18
R245
100
FRAME# 14
TRDY# 14
STOP# 14
PAR 14
C/BE#0 14
4
VCC5
4
AD17
3
PCI1:AD18
INTC#
VCC3
VCC5
-12V
PTCK
INTD# INTA#
INTB#
PRSNT#21
PRSNT#22
PCICLK23
PREQ#114
PCICLK2
PREQ#1
AD31
AD29
AD27 AD26
AD25
C/BE#3
AD23
AD21 AD20
AD19
AD17
C/BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C/BE#1
AD14
AD12
AD10
AD8 C/BE#0
AD7
AD5
AD3
AD1 AD0
ACK64#
PCI2
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
PCI-D120-WH-SN
TRST#
+12V
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
AD15
+3.3V
AD13
AD11
GND
C/BE0#
+3.3V
GND
REQ64#
TMS
PAR
+5V
+5V
+5V
+5V
AD9
AD6
AD4
AD2
AD0
+5V
+5V
+5V
TDI
PCI BUS PULL-UP
VCC5
DEVSEL#
TRDY#
IRDY#
FRAME#
SERR#
PERR#
PLOCK#
STOP#
AD[31..0]14
RN81
1
2
3
4
6
7
8
9
10P8R-2.7K
AD[31..0]
5
1
5
2
3
4
6
7
8
10
9
10
3
2
VCC3
+12V
VCC5
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
PTRST#
PTMS
PTDI
INTC#
PCIRST2#
PGNT#1
PME#
AD30
AD28
AD24
R264
AD22
AD18
AD16
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD15
AD13
AD11
AD9
AD6
AD4
AD2
REQ64#
AC_BITCLK15,24
VCC3SBY
PGNT#1 14
100
AC_SYNC15,24
AC_SDOUT15,24
AD18
CNR RISER
CNR1
B1
RESV1
B2
RESV2
B3
RESV3
B4
GND1
B5
RESV4
B6
RESV5
B7
GND2
B8
LAN_TXD1
B9
LAN_RSTSYNC
B10
GND3
B11
LAN_RXD2
B12
LAN_RXD0
B13
GND4
B14
RESV6
R28433
CLOSED TO CNR
B15
+5VDUAL
B16
USB_OC#
B17
GND5
B18
-12V
B19
+3.3VD
B20
GND6
B21
EE_DOUT
B22
EE_SHCLK
B23
GND7
B24
SMB_A0
B25
SMB_SCL
B26
PRIMARY_DN#
B27
GND8
B28
AC97_SYNC
B29
AC97_SDATA_OUT
B30
AC97_BITCLK
CNR
AC97_RESET#
AC97_SDATA_IN1
AC97_SDATA_IN0
* AC'97 Trace Spacing : 10 mils
5VSB
-12V
VCC3
VCC3
SMBCLK3,7,15,28
C389
X_10p
RESV7
RESV8
GND9
RESV9
RESV10
GND10
LAN_TXD2
LAN_TXD0
GND11
LAN_CLK
LAN_RXD1
RESV11
USB+
GND12
USBÂ+12V
GND13
+3.3VDUAL
+5VD
GND14
EE_DIN
EE_CS
SMB_A1
SMB_A2
SMB_SDA
RESV12
GND15
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
Micro-Star
Document Number
Last Revision Date:
2
Monday, August 23, 2004
Title
1
+12V
VCC5
VCC3
SMBDAT 3,7,15,28
AC_RST# 15 ,24
AC_SDIN1 15
AC_SDIN0 15,24
MS-7112
PCI 1,2 & CNR
Sheet o f
1
VCC3SBY
C366
1u
19 31
Rev
0A
5
4
3
2
1
REALTEK 8201BL MII PHY
D D
MIIRX
MIIRXCLK15
C191
C20p50n
C C
22
Y1
25MHZ
LED0 LED1 LED2 LED3 LED4
Link Dupx 10Act 100Act COL
R87
C165X_22p
10 mils
VDD33
C192
C20p50n
R99 5.1K
RN62 5.1K_8P4R
PHY address to 00001b.
MIITXCLK , MIIRXCLK 14 / 7 / 14
C187
1u
U4
25
MDC
26
MDIO
6
TXD0
5
TXD1
4
TXD2
3
TXD3
2
TXEN
7
TXC
22
RXDV
21
RXD0
20
RXD1
19
RXD2
18
RXD3
16
RXC
1
COL
23
CRS
24
RXER/FXEN
46
X1
47
X2
9
LED0/PHYAD0
10
LED1/PHYAD1
12
LED2/PHYAD2
13
LED3/PHYAD3
15
LED4/PHYAD4
8
PWFBIN
14
DVDD33
48
DVDD33
11
DGND
17
DGND
45
AGND
RTL8201CL
R88 1.5K
VDD33
MIIMDC15
MIIMDIO15
MIITXD015
MIITXD115
MIITXD215
MIITXD315
MIITXEN15
MIITXCLK15
MIIRXDV15
MIIRXD015
MIIRXD115
MIIRXD215
MIIRXD315
MIICOL15
MIICRS15
MIIRXER15
78
56
34
12
100ACT
MIIMDC
MIIMDIO
MIITXD0
MIITXD1
MIITXD2
MIITXD3
MIITXEN
MIITXCLK
MIIRXDV
MIIRXD0
MIIRXD1
MIIRXD2
MIIRXD3
MIIRX
MIICOL
MIICRS
MIIRXER
LINK
10ACT
100ACT
PWFBIN
VDD33
C164
0.1u
PWFBOUT
AVDD33
AGND
AGND
32
36
29
35
27
NC
C189
0.1u
PWFBOUT
GND shielding
31
TPRX+
30
TPRX-
33
TPTX-
34
TPTX+
28
RTSET
43
ISOLATE
40
RPTR
39
SPEED
38
DUPLEX
37
ANE
41
LDPS
RESETB
C177
0.1u
44
42
L12 120_600mA
1 2
MII/SNIB/RTT3
PWFBIN
Near pin8 Near pin32
R96 2KST
CP19
X_Copper
24/8/8/8/24/8/8/8/24
RSMRST# 15,28
PWFBOUT
VDD33
30 mils
RXIN+
RXIN-
TXDÂTXD+
RTL8201CL/CP : 2K 1%
VDD33
C185
22u-1206
C181
0.1u
VCC3SBY
R409 is reserved for
8201CL/CP LED Mode
Change to compatible
with BL
R410 is reserved for
ensuring 8201BL/CL/CP
latch to UTP Mode.
R408 is reserved for
ensuring 8201CL/CP
latch to normal
operation mode.
35 mils
X_Copper
CP23
EC26
X_ELS47U/16V-C
VDD33
R108
5.1K
R90
5.1K
R91
5.1K
+
MIICOL
MIIRXER
MIICRS
VDD33
VDD33
30 mils
C201
10u-0805
GNDGND
R89
X_5.1K
C190
X_0.1u
B B
TX close to RJ45
49.9RST
R92
TXD+
TXDÂRXIN+
RXIN-
49.9RST
R100
A A
5
49.9RST
R103
0.1U
C172
RX close to Chip
0.1U
C168
49.9RST
R93
ACTLED for 8201BL/CL/CP
4
R81 X_300
C159
0.1u
PWFBOUT
LINK
VDD33
PWFBOUT
C162
0.1u
R78 X_510
R83 X_510
VDD33
100ACT for 8201BL/CL/CP
100ACT
C146 X_0.1u
C148 X_100p
TXD+
TXDÂRXIN+
RXIN-
R85 X_300
C156 X_100p
3
C151
X_0.1u
AMBER+
19
AMBER-
20
13
18
12
17
11
16
10
15
9
14
GREEN+
21
GREEN-
22
LAN_USB1B
USBX2+RJ45
NC
TD1+
TD1ÂTD2+
TD2ÂTD3+
TD3ÂTD4+
TD4-
NC
Micro-Star
Document Number
Last Revision Date:
2
Monday, August 23, 2004
Title
MS-7112
RTL8201CL
Sheet of
1
Rev
0A
20 31
5
4
3
2
1
KEYBOARD/MOUSE PORTS
KBDAT
MSDAT
MSCLK
KBCLK
KBDAT
MSCLK
MSDAT
CP4
C127
10p
12
R82 0/0805
F1
1 2
X_2.6A-S
RN1
1 2
3 4
5 6
7 8
8P4R-4.7K
VGACON
CONNECTOR
TOP VIEW
C125
10p
KBUVCC
C5
X_0.1u
GNDKB
L1
1 2
300_300mA
L4
1 2
300_300mA
L3
1 2
300_300mA
L2
1 2
300_300mA
KBDAT_C
KBCLK_CKBCLK
MSCLK_C
MSDAT_C
VGA CONNECTOR
VGACON1
6
1
7
2
8
3
9
4
10
5
DS-D15
11
12
13
14
15
C120
16
17
22p
CP5 X_Copper
L7 60_600mA
L8 60_600mA
CP6 X_Copper
C121
22p
R1
X_47K
UD4
BAV99-S-SOT23
2
2
UD3
BAV99-S-SOT23
JKBMS1
14
4
6
2
13
1
5
3
15 17
MINIDINx2-D12-ML
X_BAV99-S-SOT23
1
VCC5
3
3
1
VCC5
UD1
2
2
UD2
X_BAV99-S-SOT23
3
3
16
10
12
8
7
11
9
1
VCC5
R59 2.7K
R60 2.7K
1
VCC5
GNDKB
VCC5
DDC1DATA 12
HSYNC 12
VSYNC 12
DDC1CLK 12
VCC5
EMI request change CN1 from 180p to 330p
D D
C C
B B
A A
KBCLK_C
MSCLK_C
MSDAT_C
KBDAT_C
GNDKB26,31
CP1
X_Copper
ROUT12
GOUT12
BOUT12
CN1
1 2
3 4
5 6
7 8
8P4C_330p/50V
12
UD6
BAV99-S-SOT23
2
R66
75
FOR EMI
3
GNDKB
C16
X_0.1u
1
C105
X_0.1u
UD7
BAV99-S-SOT23
2
VCC1_8
R65
75
12
CP3
X_Copper
1
VCC1_8
UD5
3
BAV99-S-SOT23
2
R64
75
1
VCC1_8
3
C130
C128
10p
10p
KBDAT15
KBCLK15
MSCLK15
MSDAT15
POLY SWITCH
VCC5
L11 60_600mA
L10 60_600mA
L9 60_600mA
C126
10p
1.1A-S
FS1
C104
X_0.1u
5VDUAL_R
C112
0.1u
C129
10p
Micro-Star
Document Number
Last Revision Date:
5
4
3
2
Monday, August 23, 2004
Title
MS-7112
PS/2 & VGA Conn.
Sheet of
1
Rev
0A
21 31
5
4
3
2
1
IDE1
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
D2x20-1:21-BL-ZBT
VCC5
IDEDB[0..15]14
IDEDB7
IDE2
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
D2x20-1:21-WH-SBT
R144
5.6K
R69
5.6K
IDEDB[0..15]
IDEDA8
IDEDA9
IDEDA10
IDEDA11
IDEDA12
IDEDA13
IDEDA14
IDEDA15
IDEDB10
CBLIDA 14
CBLIDB 14
IDESAA[0..2]
IDECS-A[0..1]
IDEDA[0..15]
HDRST#
HDRST#28
R145
IDESAA1 CBLIDA
IDESAA0 IDESAA2
IDECS-A0 IDECS-A1
HDRST#
IDESAB1 CBLIDB
IDESAB0 IDESAB2
IDECS-B0 IDECS-B1
R70
33
C226
10p
IDEACTS#30
33
IDEACTP#30
IDEDA[0..15]14
D D
IDEREQA14
IDEIOW-A14
IDEIOR-A14
ICHRDYA14
IDACK-A14
IDEIRQA14
C C
B B
IDESAA[0..2]14
IDECS-A[0..1]14
IDEREQB14
ICHRDYB14
IDACK-B14
IDEIRQB14
IDEREQB
IDEIOW-B14
IDEIOR-B14
IDEIOW-B
IDEIOR-B
ICHRDYB
IDACK-B
IDEIRQB
IDEDA7
IDEDA7
IDEDA6
IDEDA5
IDEDA4
IDEDA3
IDEDA2
IDEDA1
IDEDA0
R71 4.7K
IDEDB7 IDEDB8
IDEDB6 IDEDB9
IDEDB5
IDEDB4 IDEDB11
IDEDB3 IDEDB12
IDEDB2 IDEDB13
IDEDB1 IDEDB14
IDEDB0 IDEDB15
IDESAB[0..2]14
IDECS-B[0..1]14
A A
5
IDESAB[0..2]
IDECS-B[0..1]
4
R41 4.7K
3
VCC5
Micro-Star
Document Number
Last Revision Date:
2
Monday, August 23, 2004
Title
MS-7112
IDE CONNECTOR
Sheet of
1
Rev
0A
22 31
8
7
6
5
4
3
2
1
USB port 6,7
D D
C C
B B
VCC_USB
C382
X_0.1u
UV6-16
UV6+16
UV7-16
UV7+16
12
C383
X_C1000p50x
UV4-16
UV4+16
UV5-16
UV5+16
RN85
8P4R-0
UVC6ÂUVC6+
RN84
8P4R-0
78
56
34
12
JUSB1
1 2
3 4
5
7 8
D2x5-1:9-BK
78
56
34
12
Intel
UVC6ÂUVC6+
UVC7ÂUVC7+
6
10
UVC4ÂUVC4+
UVC5ÂUVC5+
OC#4
UVC7ÂUVC7+
OC#016
UV0-16
UV0+16
UV1+16
UV1-16
USB port 4,5
VCC_USB
KBUVCC
12
+
EC43
470UF/10V-8
A A
8
X_0.1u
C386
12
C385
X_C1000p50x
7
UVC4- UV C5-
JUSB2
1 2
3 4
5
7 8
D2x5-1:9-BK
Intel
UVC5+UVC4+
6
OC#4
10
UVC1+ UVC0+
6
5
KBUVCC
R79
10K
R80
560K
C152
X_0.1u
RN83
UV2+16
UV2-16
UV3+16
UV3-16
8P4R-0
USB port 0,1
8P4R-0
RN82
USB1
9
1
2
3
4
12 11
YUSB-D 1
4
USB port 2,3
UVC2+
78
UVC2-
56
UVC3+
34
UVC3-
12
UVC0-
12
UVC0+
34
UVC1+
56
UVC1-
78
10
5
6
7
8
UVC0-UVC1-
EC22
+
470UF/10V-8
C143
X_0.1u
LAN_USB1A
USBX2+RJ45
UVC2ÂUVC2+
UVC3ÂUVC3+
5
6
7
8
1
2
3
4
DOWN
GNDUSB
UP
12
F2
2.6A-S
OC#412,16
CB5
X_0.1u
CP7
1 2
X_Copper
23
24
25
26
27
28
29
30
VCC_USB5VDUAL_F
X_0/0805
R278
R282
10K
R281
560K
VCC5
C117
X_0.1u
FOR EMI
Micro-Star
Document Number
Last Revision Date:
3
Monday, August 23, 2004
2
Title
MS-7112
USB CONNECTOR
Sheet of
1
Rev
0A
23 31
5
4
3
2
1
SPEAKER OUT JACK
ALC655 AC97 CODEC
VCC5
SPDIF OUT
VCC5
X_0.1uC311
D D
X_0.1uC330
X_0.1uC230
FOR EMI
AC97CLK3
AC_SDOUT15,19
AC_BITCLK15,19
AC_SDIN015,19
AC_SYNC15,19
C C
B B
AC_RST#15,19
CD-D1x4-BK-SBTJ
CD_IN1
JSP1
1
2
3
D1x3-BK
C364C0.01u50x
R275 33
R274 33
12
C361
X_10p
1
2
3
4
VCC3
XTALIN
CDR
CP48
R279
X_3.3/0805
1 2
C375
0.1u
12
VDD3
VDD3
12
C3421u-0805
12
12
AUDIO CODE CD / AUX / MODEM IN HEADERS
47
44
43
NC48NC
1
2
3
4
5
6
7
8
9
10
11
12
C3411u-0805
12
TEST646TEST545TEST4
DVDD1
XTL_IN
XTL_OUT
DVSS1
SDATA_OUT
BIT_CLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET#
PC_BEEP
PHONE13AUXL14AUXR15VIDEOL16VIDEOR17CDL18CDGND19CDR20MIC121MIC222LINL23LINR
CDLXCDL
CDGNDXCDGND
CDRX
C3451u-0805
TEST1
42
AVSS2
41
40
39
37
38
U12
DACOUTL
MONO
AVDD2
LOUTR
LOUTL
AFILT2
AFILT1
AVSS1
AVDD1
24
C343
1 2
1u-0805
C344
1 2
1u-0805
VRDA
VRAD
VREF
ALC655
TEST2
DACOUTR
+5VR
C350
0.1u
1 2
1 2
VREF_OUT
12
+
CT5
ELS10/16V
655
LINE_ROUT
LINE_LOUT
12
C349
0.1u
R121
X_22K
FRONT_MIC
C357
C1000p50x
LINE_R
LINE_L
C359
C1000p50x
C362
1u
C370
X_1u
VREF_OUT
+5VR
VREF_OUT
36
35
34
NC
33
NC
32
31
30
29
28
NC
27
26
25
C381
0.1u
C338
C336
1 2
1u-0805
1u-0805
MIC2
MIC1
C376 1u-0805
R122
X_22K
LINE_R
LINE_L
LINE_NEXT_R
LINE_NEXT_L
R252 4.7K
MIC2
MIC1
R244
1 2
VREF_OUT
1 2
C354
X_1u
C198
100p
C197
100p
1 2
X_2.2K
R251
R127
X_22K
4.7K
C199
100p
C194
100p
X_22K
R126
MIC_IN
C196
100p
10
11
12
13
18
AUDIO1B
PHONE_JACK
6
7
8
9
17
AUDIO1A
PHONE_JACK
C195
100p
LINE_IN
LINE_OUT
1
2
4
5
3
AUDIO1C
PHONE_JACK
MIC_IN
14
15
16
SPEAKER OUT C IRCUIT
SPEAKER_R
SPEAKER_L
C340
X_100p
SPEAKER_R
SPEAKER_L
C339
X_100p
JAUD1
1 2
3 4
5
7
H2X5(8)_black
LINE_ROUT
LINE_LOUT
A A
R246 2.2K
FRONT_MIC
1 2
5
EC42 ELS10/16V
+
EC41 ELS10/16V
+
R247
0
C320
R248
X_100p
2.2K
1 2
R267
47K
R268
47K
6
109
4
LINE_NEXT_R
LINE_NEXT_L
SPEAKER_R
SPEAKER_L
FRONT_MIC
For EMI
+5VR+5VR
C390
X_0.1u
C337
X_C1000p50x
LINE_NEXT_R
LINE_NEXT_L
12
12
C392
C384
X_C1000p50x
X_C1000p50x
12
C323
X_100p
CP49
C319
X_100p
+12V
VR1
L78L00-TO92-100mA
C387
0.1u
VIN3VOUT
GND
2
12
+5VR
1
12
C391
X_1u-0805
AUDIO CODE REGULATORS
TOP VIEW
21
I3G
O
3
2
DECOUPLING CAPACITOR
R171 X_0
C218 0.1u
EMI reserve
12
C353
X_0.1u
Title
Micro-Star
Document Number
Last Revision Date:
Monday, August 23, 2004
AC'97 CODEC
VDD3
C371
1u
MS-7112
Sheet of
1
Rev
0A
24 31
5
R149 4.7K
R139 X_4.7K
R146 4.7K
R147 4.7K
D D
VCC5
RTSA#
SOUTB
SOUTA
DTRA#
CP29 X_Copper
12
R150 X_4.7K
R141 4.7K
R148 X_4.7K
C233
0.1u
VCC5
RTSA#
IRTX
SOUTA
DTRA#
VID[0..4]5
CPUFANOUT27
CPUFANIN27
SYSFANIN27
THERM#15
VAVCC
BEEP
SA6
SA7
SA8
SA9
SA10
4
L: CFAD=2E H: C FAD=4E
L: 24MHZ H: 48MHZ
L: ISA ROM H: NO ISA ROM
L: PNP Default H: PNP No Default
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
VID0
VID1
VID2
VID3
VID4
VCC3
R158
4.7K
VTIN_GND
SYSTIN
CPU_TMPA
VTIN
VREF
3
ROMCS#
MEMR#
MEMW#
SD3
SD2
SD1
SD0
SD4
SD5
SD6
SD7
RN76
7 8
5 6
3 4
1 2
8P4R-4.7K
RN74
1
1
5
2
2
3
3
4
4
6
6
7
7
8
8
9
9
10
10P8R-4.7K
2
VCC5
SA0
SA1 SD0
SA2 SD1
SA3 SD2
SA4 SD3
SA5 SD4
SA6 SD5
SA7 SD6
SA8 SD7
VCC5
5
R208
10
SA18 XA18
X_0
1u-0805
C305
X_1u-0805
C285
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
VCC5VCC5
R214
4.7K
BIOS1
12
A0
11
A1
10
A2
9
A3
8
A4
7
A5
6
A6
5
A7
27
A8
26
A9
23
A10
25
A11
4
A12
28
A13
29
A14
3
A15
2
A16
30
A17
1
A18
PLCC32-Socket
VCC
GND
CE#
OE#
PGM#
13
D0
14
D1
15
D2
17
D3
18
D4
19
D5
20
D6
21
D7
VCC5
32
C286
X_0.1u
16
ROMCS#
22
MEMR#
24
MEMW#
31
1
Flash Rom
U7
C C
SA5
SA4
SA3
SA2
SA1
VCC3
C232
0.1u
SA0
ROMCS#
MEMR#
MEMW#
SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0
DRVDEN0
INDEX#
MOA#
DSA#
DIR#
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#
C374
X_33P
C257
0.1u
5
VCC5
FDD1
1 2
3 4
B B
A A
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
D2x17-3:20.29.31
C379
X_33P
103
XA5/GP35
104
XA4/GP34
105
XA3/GP33
106
XA2/GP32
107
XA1/GP31
108
XA0GP30
109
VCC
110
ROMCS#/GP52
111
MEMR#/GP51
112
MEMW#/GP50
113
XD7/GP27
114
XD6/GP26
115
XD5/GP25
116
XD4/GP24
117
XD3/GP23
118
XD2/GP22
119
XD1/GP21
120
XD0/GP20
121
DRVDEN0
122
INDEX#
123
MO#
124
DS#
125
DIR#
126
STEP#
127
WD#
128
WE#
SIO48M3
SIOPCLK3
LDRQ#15
SIRQ15
LAD[0..3]15
LFRAME#15
PCIRST1#28 RSLCT 26
PCIRST1#
100
101
102
98
GP41/XA999GP40/XA8
GP37/XA7
GP36/XA6
TRAK0#1WP#2RDATA#3HEAD#4DSKCHG#5IOCLK#6VSS7LPCCLK8LDRQ#9SERIRQ103VCC11LAD312LAD213LAD114LAD015LFRAME#16LRESET#17SLCT18PE19BUSY20ACK#21PD722PD623PD524PD425PD326PD227PD128PD029SLIN#30INIT#31ERR#32AFD#33VCC34STB#35CTSA#36DSRA#37HEFRAS/RTSA#
C261
X_47p
C248
10p
88
89
86
87
GP55/XA1890GP54/XA1791GP53/XA1692GP47/XA1593GP46/XA1494GP45/XA1395GP44/XA1296GP43/XA1197GP42/XA10
GP56/MDI/VID0
GP57/MDO/VID1
GP10/GPSA1/VID2
GP11/PLED/GPSB1/VID3
W83687THF
LAD3
LAD2
LAD1
LAD0
4
83
84
85
GP17/GPY280GP16/GPX281GP15/GPY182GP14/GPX1
GP13/GPSB2/VID5
GP12/GPSA2/VID4
PD7
PD6
PD5
79
78
BEEP
PD4
77
SYSFANIN
SMI#/OVT#
PD3
75
74
76
AUXFANIN
CPUFANIN
PD2
PD1
PD0
73
72
71
AVCC
SYSFANOUT
CPUFANOUT
70
69
68
67
NC
SYSIN
CPUD-
AUXFANOUT
65
66
VTIN
VREF
CPUIN
CPUVCORE
CASEOPEN#
GP60/RSMRST#
GP61/PWROK
XA19/GP62
GP63/PSIN
PSOUT#/GP64/PSOUT#
GP65/RIB#/RSTOUT1
GP66/DCDB#/RSTOUT2#
IRTX/SOUTB
IRRX/SINB
RTSB#/PWRCTL#
CTSB#/GP67
SOUTA/PENROM#
DTRA#/PNPCSV
38
RTSA#
VIN1
VIN2
VIN3
VBAT
PME#
VSB
DTRB#
DSRB#
RIA#
DCDA#
SINA
3
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
RTSA# 26
DSRA# 26
CTSA# 26
RSTB# 26
RAFD# 26
RERR# 26
RINIT# 26
RSLIN# 26
PD[7..0] 26
RACK# 26
RBUSY 26
RPE 26
VCORE
+12VIN
-12VIN
+3.3VIN
LPC_PME#
DTRB#
SOUTA
DTRA#
R137 4.7K
C99 near U10 pin 32
SIO_VBAT 15
CASEOPEN# 15
RIB# 26
DCDB# 26
SOUTB 26
SINB 26
DTRB# 26
RTSB# 26
DSRB# 26
CTSB# 26
RIA# 26
DCDA# 26
SOUTA 26
SINA 26
DTRA# 26
C282
0.1u
VCC5
VCC3SBY
C221
0.1u
5VSB
Hardware Monitor
C229
3300P
CP57 X_Copper
R132 10KST
R136 56KST
Q27
2N3904S
E C
t
RT210K_0603
t
RT1X_10K_0603
+3.3VIN
VCORE
+12VIN
VTIN_GND
-12VIN
VREF
ALARM 30
Title
MS-7112
LPC I/O(W83687THF)
Sheet of
1
C11-3322013-Y01
Rev
0A
25 31
VREF
R151 10KST
SYSTIN
VREF
R143 X_10KRST
VTIN
VREF
R142 30KST
CPU_TMPA5
VTIN_GND5
R130 28KST
+12V
R133 232KST
-12V
R134 10K
R131 10K
BEEP
VCC5
R194
10K
B
VCC3
VCCP
Micro-Star
Document Number
Last Revision Date:
2
Monday, August 23, 2004
5
4
3
2
1
Parallel Port
5
5
112233446677889
CN10
246
135
8
8P4C_220p
7
246
135
10
RN17
10
10P8R-2.2K
9
CN11
8
8P4C_220p
7
5
5
112233446677889
10
RN23
10
10P8R-2.2K
9
C71
X_0.1u
RN29
8P4R-33
8P4R-33
8P4R-33
GNDKB21,31
R52
RN20
8P4R-33
RN13
RN24
VCC5
D7
A C
VCC5
1N4148S
R51
2.2K
33
RSTB_C#
RERR_C#
78
PD_C1
56
PD_C0
34
RAFD_C#
12
PD_C4
12
PD_C5
34
PD_C6
56
PD_C7
78
RACK_C#
12
RBUSY_C
34
RPE_C
56
78
RSLIN_C#
78
PD_C3
56
PD_C2
34
RINIT_C#
12
C102
220p
246
135
CN5
8
8P4C_220p
7
246
135
CN7
8
8P4C_220p
7
48
RSTB_C#
PD_C0
PD_C1
PD_C2
PD_C3
PD_C4
PD_C5
D D
C C
PD_C6
PD_C7
RACK_C#
RBUSY_C
RPE_C
RSLCT_C
NDCDA#
NSINA NRTSA
NSOUTA
NDTRA
LPT1
1
2
3
4
5
6
7
8
9
10
11
12
13
LPT
52
COM1
1
6
2
7
3
8
4
9
5
COM
11 10
12
CP50 X_Copper
14
15
16
17
18
19
20
21
22
23
24
25
51
NDSRA#
NCTSA#
NRIA#
GNDKB
GNDKB
RAFD_C#
L6 80_700mA
RINIT_C#
L5 80_700mA
GNDKB 21,31
RERR_C#
RSLIN_C#
RSTB#25
PD[7..0]25
RACK#25
RBUSY25
RPE25
RSLCT25
RERR#25
RAFD#25
RSLIN#25
RINIT#25
RSTB#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RACK#
RBUSY
RPE
RSLCT RSLCT_C
RERR#
RAFD#
RSLIN#
RINIT#
1N4148S
D4
A C
+12V
RTSA#
RTSA#25
DTRA#
DTRA#25
SOUTA
B B
A A
SOUTA25
RIA#
RIA#25
CTSA# NCTSA#
CTSA#25
DSRA# NDSRA#
DSRA#25
SINA NSINA
SINA25
DCDA# NDCDA#
DCDA#25
-12V
5
AC
D51N4148S
RTSB#25
DTRB#25
SOUTB25
CTSB#25
DSRB#25
DCDB#25
C24
X_0.1u
+12COM
-12COM
+12COM
RTSB# NRTSB
DTRB# NDTRB
RIB#
RIB#25
CTSB# NCTSB#
DSRB# NDSRB#
SINB25
DCDB# NDCDB#
-12COM
1
16
15
13
19
18
17
14
12
10
C60
X_0.1u
C255
X_0.1u
U6
1
VDD(12V)
16
DA1
15
DA2
13
DA3
19
RA1
18
RA2
17
RA3
14
RA4
12
RA5
10
VSS(-12V)
C254
TI-GD75232-SSOP20
X_0.1u
U3
VDD(12V)
DA1
DA2
DA3
RA1
RA2
RA3
RA4
RA5
VSS(-12V)
TI-GD75232-SSOP20
VCC(5V)
4
VCC(5V)
DY1
DY2
DY3
RY1
RY2
RY3
RY4
RY5
GND
GND
DY1
DY2
DY3
RY1
RY2
RY3
RY4
RY5
20
5
6
8
2
3
4
7
9
11
20
5
6
8
2
3
4
7
9
11
NRTSA
NDTRA
NSOUTA
NRIA#
NSOUTB
NRIB#
NSINB
VCC5
NRIA# 30
VCC5
NRIB# 30
GNDKB
3
CN3
1 2
3 4
5 6
7 8
8P4C_220p
CN23
1 2
3 4
5 6
7 8
X_8P4C_220p
NDTRA NRIA#
NSINA NCTSA#
NSOUTA NDSRA#
NDCDA# NRTSA
NDTRB
NSINB
NSOUTB
NDCDB#
1 2
3 4
5 6
7 8
GNDKB
CN22
1 2
3 4
5 6
7 8
X_8P4C_220p
CN2
8P4C_220p
NRIB#
NCTSB#
NDSRB#
NRTSB
2
Serial Port
NDCDB#
NSOUTB NDTRB
NRIB#
Micro-Star
Document Number
Last Revision Date:
Monday, August 23, 2004
JCOM2
1
3 4
5 6
7 8
9
D2x5-1:1
Title
NSINB
2
NDSRB#
NCTSB#NRTSB
MS-7112
Parallel/Serial Port
Sheet of
1
Rev
0A
26 31
5
D D
C C
B B
1.8V POWER TRANSLATOR
R153
1.25VREF28
Switch: D03-40N030B-A36
Regulator: D03-45N020B-N03(TO-252)
D03-50N034B-N03(TO-263)
Dual MOS: D03-07D0303-N03
1K
C247
X_C0.01u50x
RDRV2
G
C215
1u-0805
FAN1_SEN
CPUFANOUT
RIN2W
+12V
VCC2.5
VCC5
R285 X_1.5K
C2 0.1u
C3
0.1u
+12V
U8B
84
RSNS2
5
+
6
-
R172
100RST
GPIO115
LM358
7
VCC1.8 =
1.25X(100+220)/220
RIN21.25VREF
R164
220RST
CPUFANOUT25
D
Q20
P45N02LD_TO252
S
VCC1_8
+
EC27
470UF/10V-8
R2
X_4.7K
C1
0.1u
1
2
3
4
5
6
7
4
G
U1
FAN1_IN
FAN2_IN
VCC12
C1
C2
CHRPMP
GND
DS
83391TS
1.25VREF28
POK128
FOR DELAY VCC_AGP VOLTAGE
VFANCPU
Q2
X_2N7002S
FAN1_DRV
FAN1_SEN
FAN2_DRV
FAN2_SEN
FAN3_DRV
FAN3_SEN
FAN3_IN
14
13
12
11
10
9
8
X_C0.01u50x
FAN1_SEN
RDRV2W
RSNS2W
RDRV3W
RSNS3W
RIN3W
3
2.5V VGA POWER TRANSLATOR
R161
1K
1.25VREF
R173
X_1K
R167
X_4.7K
C4
5VSB+12V
R195
X_4.7K
G
Q24
X_2N3904S
4 5
3
2
1
N-FDS4410_SO8
R16 10KST
R14
6.49KST
C240
C0.01u50x
DS
Q22
X_2N7002S
+12V
Q1
6
7
8
+
EC1
ELS10/16V
+12V
U8A
84
R168
110RST
LM358
3
+
2
-
R174
120RST
1
RDRV3
1u-0805
G
C202
RIN3
RSNS3
VCC2.5A = 1.25 X ( 120 + 110 ) / 110
R5
X_0/0805
C9
X_C1000p50x
VFANCPU
R4
4.7K
A C
CPUFANOUT
FAN_CPU1
4
3
2
1
X_D1x4
D1
X_1N4148S
R6 27K
CPU FAN
VCC3
D
S
+
EC28
470UF/10V-8
EC25
+
X_C1000u6.3d8
Q19
P45N02LD_TO252
VCC2.5
R3
10K
2
CPUFANIN 25
1.8V POWER TRANSLATOR
VCC3SBY
+
C265
C10u10y_1206
Q26
YLT1087S-0.8A
VIN3VOUT
1
VCC18SBY
2
4
VOUT
ADJ
1
R193
220RST
R187
100RST
C262
10u/0805
EC30
+12V
D11
R196
4.7K
+
X_1N4148S
A C
FAN_SYS1
3
2
SYSTEM FAN
1
D1x3-WH-SN
27K
R189
R175
10K
SYSFANIN 25
2
Micro-Star
Title
Document Number
Last Revision Date:
Monday, August 23, 2004
MS-7112
Regulators & Fans
Sheet of
1
Rev
0A
27 31
RIN2
RSNS2
RDRV2
RIN3
RSNS3
A A
5
RDRV3
RN3
1 2
3 4
5 6
7 8
X_8P4R-0
RN2
1 2
3 4
5 6
7 8
X_8P4R-0
4
RIN2W
RSNS2W
RDRV2W
RIN3W
RSNS3W
RDRV3W
ELS10/16V
3
8
Pin 47 Difinition
MS6 VERSION: RAC
3VSB MODE SELECT
3VSB MODE
SINGLE MOSFET
DUAL MOSFET
D D
PIN 47
PULL HIGH
PULL LOW
MS6 VERSION: RBD
VAGP SEQUENCE MODE SELECT
VAGP SEQUENCE MODE
VAGP ON BEFORE PWR_OK L TO H
VDIMM LINEAR OR PWM SELECT
VDIMM MODE
LINEAR REGULATOR
PWM REGULATOR
20040319 ADV : jason suggestion :
Pin 9 (SLOT_RST#) add serial
C C
resister (10 Ohm) and decouple
cap (20P)
FRONT PANEL RESET BUTTON
PCIRST# INPUT
PCIRST# BUFFER OUTPUT
PCI SOLT PCIRST# BUFFER OUTPUT
PIN 47
PULL LOW
PULL HIGHVAGP ON AFTER PWR_OK L TO H
EXTRAM
PULL LOW
PULL HIGH
VDDA_25
VDDA_25 To CPU Copper trace width > 50mils .
PSON#
R224 0
PS_IN#30
B B
SLP_S3#
R215 X_10K
C287
X_C0.1U16Y
20040319 ADV : jason suggestion :
Pin 16 (SS) use 0.22uF X7R.
THE TWO BLOCK CHOICE ONE
SUPPORT SYSTEM POWER CONTROL
To CPU Copper trace width > 250mils , Fill
island behind DIMM > 400mils .
DDR_VTT 1. 25V
VCC3SBY
U5
8
VREF2
7
ENABLE
6
VCNTL
5
BOOT_SEL
W83310DS
A A
C227
C0.1U16Y
8
GND
VREF1
VOUT
GND
1
VIN
2
3
4
9
7
C263
X_22P
5VSB
R216
X_4.7K
Q28
X_2N7002S
DDR TERMINATION
VCCM
R140
1KST
12
+
EC20
C1000u6.3d8
7
SUS_LED30
PCIRST2#
PCIRST1#
C266
X_22P
FP_RST#30
PCIRST#12,14,18
HDRST#22
PCIRST1#25
PG_VCORE29
VCORE_EN29
1.25VREF27
PCIRST2#19
PS_IN#
PS_OUT#5,30
R135
1KST
VTT_DDR
C220
C0.1U16Y
PWR_LED30
2N3904S
2N3904S
VCC3
VDDA_25
CLOSE TO MS6
C100u16d6
5VSB
Q36
VCC3
6
5VSB
5VSB
330
R276
4.7K
5VSB
R263
R262
4.7K
R270
VCC3
R204
R206
100r0805
330
C259 104P
C264 104P
C260 475P/0805
POK127
C246
104P
DDR AND DDR II VOLT SELECT
DDRTYPE
Q38
EC29
5VSB
R213
4.7K
R254
VCC5
330
12
+
R156
10K
R272
VCC5
PULL LOW
PULL HIGH
RAC: R26=1K Ohm, R25=2.2K Ohm
RBF: R26=100 Ohm, R25=100 Ohm
6
X_1K
10K
R277
X_1K
R210
5VSB
10K
10
11
12
3VDLDEC#
EXTRAM
1
FP_RST#
2
PCIRST#
3
HDD_RST#
4
DEV_RST#
5
VDD_GD
6
VDD_EN
7
1.25VREF
8
VCC5
9
SLOT_RST#
VCC3
2.5VDDA
AGND0
C245 0.22u-X7R
VDIMM
2.5V
1.8V
5
41
47
46
48
CPU_PWGD
PLED0/AGP#
PLED1/EXTRAM
PSIN#13PSOUT#14POK115SS165VSB17DDRTYPE18VDIMM_LSEN
C242
104P
R160
R47
2.2K
45
CHIP_PWGD
4.7K
44
I2C_CLK
43
I2C_DATA
39
42
S3#40S5#
PWR_OK
RSMRST#
VDIMM_LDRV20VDIMM_HSEN
VDIMM_HDRV
19
21
22
X_C1000P16X
5
Linear Mode
VCC2.5 VCC3
G
G
5VSB
C1
C2
VCC3
D S
DS
12
+
R219
4.7K
SLP_S5#
SLP_S3#
C283
C1000p50x
+
EC32
C1000u6.3d8
U9
C278
36
35
C0.1U16X
34
33
5VSB_DRV
32
5V_DRV
31
30
29
WD_DET
28
27
26
25
R181
X_10K
5VSB
WD_DET
PULL HIGH
Q8
P45N02LD_TO252
+
1 2
Q7
P45N02LD_TO252
VCCM
12
EC21
EC13
+
C1000u6.3d8
THESE OUTPUT AND INPUT PIN
MUST BE PULL HIGH
9VSB
R198
10K
TIMER
OFFPULL LOW
ON
EC9
C1000u6.3d8
R211
4.7K
C281
C0.1U16Y
37
38
GND
5VSB
CHRPMP
AGND1
5VUSB_DRV
5V_DRV
VAGP_DRV
VAGP_SEN
WD_DET
1.2VLDT_DRV
1.2VLDT_SEN
TMP_FAULT#
3VSB_SEN233VSB_DRV
24
MS-6/RAC
WATCHING DOG TIMER SELECT
C28
X_C1000P16X
R45
1K
C27
X_C1000u6.3d8
4
S3AUXSW#
PSON#
SLP_S5#
SLP_S3#
CPU_GD 5
MS7_POK 12,15
SMBCLK 3,7,15,19
SMBDAT 3,7,15,19
RSMRST# 15,20
SLP_S3# 30
PWR_OK 30
CHARGE PUMP
VOLTAGE
OUTPUT
C270
1u-0805
THRMTRIP# 5,15
CONNECT TO CPU
CPU PWR_GD OUTPUT
CHIP PWR_GD OUTPUT
I2C BUS
I2C BUS
CONNECT TO SOUTH BRIDGE RSMRST# SIGNAL
SOUTH BRIDGE POWER CONTROL(SLP_S4# OR SUSB#) SIGNAL
SOUTH BRIDGE POWER CONTROL(SLP_S3# OR SUSC#) SIGNAL
ATX POWER OK INPUT
THE TWO MODE ONLY ONE MODE PRESENT
THE VDIMM_HSEN IN LINEAR MODE
DDRTYPE
DDR
DDR II
Q10,Q11:Imax=7A(P45N02LD)
Please refer P5 list 2
"MOS select method"
THIS POINT VOLT CAN'T SETTING
BELOW 2.9V
4
C293
3VDUAL
X_C1000p50x
VDIMM_HSEN
VREF
2.0V
1.7V
3
S0 S3 S5
11
0
1
1
0
11
1
000
S3AUXSW#15
VCC5
VCC5
C388 X_C1000p50x
C161 X_C1000p50x
G
+
EC24
C1000u6.3d8
5VSB
PSON#15,30
Q17
1
2
3
4 5
NN-P2103HV_SO8
Q39
1
2
3
4 5
NN-P2103HV_SO8
VCC3
D
Q16
N-P3057LD_TO252
S
DUAL MODE
THIS MODE SELECT BY
PIN 47 PULL LOW
3VSB REGULATE BY 5VSB AND VCC3
VCC3
VCC3SBY
5V_DRV
3VSB_DRV
12
12
+
+
EC38
EC35
C100u16d6
X_CD470U10EL11.5
3
2
RN72
8P4R-4.7K
RN72
7 8
8P4R-4.7K
VDDQ
+
EC33
470UF/10V-8
VCC3SBY
56
B
E C
B
E C
3396mW
10K
R207
SLP_S5#
Q30
2N3904S
Q33
2N3904S
VCC3SBY
SLP_S3#
<OrgName>
ACPI Power MS-6
MS-7112
VCC3SBY
VCC3SBY
34
8P4R-4.7K
R235
R111
1K
8
7
6
8
7
6
G
VDD_12_A
Routed as pour to CPU width > 250mils
.
Q35
1
2
3
4 5
NN-P2103HV_SO8
RN72
X_1K
5VSB
5VDUAL_R
5VSB
5V_DUAL
5VDUAL_F
VCC3
D
Q29
P50N03LS_TO263
S
VDDQ
EC31
+
C1000u6.3d8
VDD_12_A
5VSB
8
7
6
Title
Size Document Number Rev
Date: Sheet
2
12
8P4R-4.7K
RN72
1
0A
of
28 31Monday, August 23, 2004
1
4
3
2
1
VCCP_IN
C8
C11
C1U16X0805
EC15
CD1500U6.3EL20
EC14
CD1500U6.3EL20
GND
GND
X_C4.7U16X1206
1
PH2
2
2
E31-0500261-K08
1
PH1
2
1
2
E31-0500261-K08
EC19
CD1500U6.3EL20
EC8
CD1500U6.3EL20
1
2
Title
Size Document Number Rev
<OrgName>
VRM N2101
MS-7112
Date: Sheet
1
29 31Monday, August 23, 2004
1
0A
of
X_C10U16Y1206
10R/0805
U2
1
VCC
4
OCP
5
PHASE
6
DH
7
PGND
GND
N2101-SOIC14
Close to Mos
Q70
C100
13
SS
12
VREF
11
VSENSE
10
BOOSTH
9
BOOSTL
8
DL
2
NC2
3
NC3
C0.1u16X
C20
R8
0
D D
VCCP_IN
CB1
R10
88.7KR1%
X_1000p
GND_2R
1N5817
C12
C0.1u16X
C C
R15
C18C0.1u16X
D2
14
GND_2R
Near IC Side
R7
4.7R0805
CP2
GND_2R
CB3 100p
B B
VCC5
PWM GOOD
R11
2.2K
C15
10u6.3x0805
R13
1KR
5VSB
Q3
2N3904S
4
R18
4.7K
VCCP
A A
R9
X_20K
X_Copper
VCC5
C6
C0.01u50x
R20
4.7K
Q4
2N3904S
PG_VCORE 28
C101
1u25X0805
VRM_EN
VCORE_EN28
Close to Mos
Q71
C0.1u16X
GND_2R
D3
1N4148S
C1u16x0805
C10
C1u16x0805
R48
2.2R0805
R44
2.2R0805
R58
2.2R0805
R67
2.2R0805
R23
1K
C58
C59
X_C10U16Y1206
VCCP_IN
C7
G
2.2R0805
G
R53
G
2.2R0805
G
VCC5
R25
4.7K
3
VINMOS
GND_2R
DS
Q9
N-P0903BR
DS
Q10
N-P75N02LR
VINMOS
DS
Q12
N-P0903BR
DS
Q14
N-P75N02LR
5VSB
CD1000U16EL20
12
+
EC5
CD1000U16EL20
R12
CB2
3.48KR1%
X_1000p
G
G
R26
10K
Q6
2N3904S
CD1000U16EL20
12
+
EC3
680R1%
R17
DS
Q11
N-P75N02LR
X_1N5817
DS
Q13
N-P75N02LR
DS
G
12
+
CD1000U16EL20
GND_2RGND_2R
X_1N5817
D6
D8
VRM_EN
2N7002S
Q5
CD1000U16EL20
CD1000U16EL20
VDD_12_VRM
EC2
12
+
EC16
12
12
+
+
EC6
EC17
C4.7U16X1206
Vcore=1.5V fixed
R22 X_0
C14
C1U16X5
CHOK2
0.6uH/50A
R46
4.7R0805
C79
C0.01u50x
CHOK3
0.6uH/50A
R68
4.7R0805
C132
C0.01u50x
R19 X_0
GND_2R
VCCP
ATX12V POWER CONNECTOR
VCCP_IN
2
C23
C39
C1u16x0805
VCCP
EC11
CD1500U6.3EL20
EC18
CD1500U6.3EL20
C19
33p
CHOK1
CH-1.2U18A
X_C0.1u16X
COREFB_H 5
COREFB_L 5
EC7
CD1500U6.3EL20
EC12
CD1500U6.3EL20
JPW1
3
4
D2x2
C17
C0.01u50x
C13
12V
12V
5
D D
C C
For EMI.(1.00)
Close these pins.
B B
FP_RST#28
HDDLED
PWR_LED
SUS_LED
PWRSWÂHDDLED#
VCC5
HDDLED
HDDLED#
FP_RST#
C355 X_0.1u
C358 X_0.1u
C363 X_0.1u
C377 X_0.1u
C360 X_0.1u
INTEL FRONT PANEL-M
R273
330
0.1u
CB78
9
JFP1
112
334
556
778
9
D2x5-1:10-BK
PWR_LED
2
SUS_LED
4
PWRBTN#
6
PWRSW-
8
PWRBTN#
R280 330
VCC3SBY
R266
X_10K
C325
0.1u
Wake by Modem
VCC3SBY
R253
B
R225
X_10K
10K
E C
X_2N3904S
Q31
NRIB#
NRIA#
5
A C
D10
X_1N4148S
A C
D9
X_1N4148S
R218
X_1K
NRIB#26
NRIA#26
A A
4
PWR_LED 28
SUS_LED 28
PWRBTN# 15
RING 15
4
3
2
IDEACTP# 22
HDDLED#
C351
X_180p
SUS_LED
PWR_LED
JFP2
3
5
JFP2
D14
3
BAT54A
1
D15
A C
1N4148S
GND1SPEAKER
BUZ+
SLED
PLED
BUZ-
VCCSPK
IDEACTS# 22
2
4
6
8
R258330
VCC3
HD_SATA_LED 16
SPKR
1N4148S
D16
VCC5
ATX CONNECTOR
CB12
X_33P
11
12
13
14
15
16
17
18
19
20
VCC3
CB40
X_33P
PS_OUT#5,28
PS_IN#28
PSON#15,28
R97 0
R105 X_0
R106 X_0
R95
X_10K
3
CB35
X_33P
5VSB
B
C170
X_C1000p50x
-12V
CB46
0.1u
R86
1K
C174
X_C1000p50x
Q18
X_2N3904S
E C
+
CT4
X_ELS10/16V
C154
VCC5
CB14
0.1u
SLP_S3# 28
CB49
X_33P
-5V
C1000p50x
CONN1
3.3V
-12V
GND
PSON
GND
GND
GND
-5V
5V
5V
YPC20
3.3V
3.3V
GND
GND
GND
POK
5VSB
2
5V
5V
12V
2
1
2
3
4
5
6
7
8
9
10
C158
C1000p50x
CB47
0.1u
CB22
0.1u
CB15
33P
SPEAKER
ALARM25
R271 2.2K C356
SPK15
VCC3
CB48
X_1u-0805
VCC5
CB18
CB28
X_0.1u
X_33P
CT2
CB10
X_39P
5VSB
+12V
CB13 X_39P
+
CB11
0.1u
X_ELS10/16V
Micro-Star
Document Number
Last Revision Date:
Monday, August 23, 2004
1
RN80 8P4R-150
Q37
2N3904S
VCC5
C155
X_0.1u
Title
R84
4.7K
78
56
34
12
SPKR
0.1u
PWR_OK 28
MS-7112
FRONT PANEL & ATX Conn.
Sheet of
1
Rev
0A
30 31
5
4
3
2
1
J1
PCB OTHER COMPONENT
D D
GNDKB21,26
MS7103PCB
C C
PCB1
7112 0A
System Decoupling CapacitorsSystem Decoupling Capacitors
System Decoupling CapacitorsSystem Decoupling Capacitors
9
2
MH1
7
8
6
5
3
4
SB1_H
X_SB Heatsink
SB1_L
SIS
964L UA
X_SIS-964L V: A2
9
2
MH2
BS1_X1 BS2_X1 BS3_X1
7
8
6
9
5
2
3
4
MH3
BAT SOCKET
BAT1
+
BATTERY
-
Battery-CR2032-3V-210mAh
BS4_X1
BS5_X1
7
8
6
5
3
4
9
2
MH4
7
8
3
4
NB-Heat Sink
6
5
NB1_A
9
2
MH5
X_PIN1*2
7
8
3
4
6
5
BIOS1_A
Flash-2M
Winbond
49F002U
BIOS1_B
X_Flash-4M
SST39SF040
BIOS1_C
X_Flash-4M
W29C040P
SST39SF040
VCC5
J2
X_PIN1*2
AGPCPU
9
2
MH6
FM15
X
X_FM
7
8
6
5
3
4
FM16
X
X_FM
FM8
X
X_FM
FM7
X
X_FM
FM6
X
X_FM
FM17
X
X_FM
FM1
X
X_FM
FM12
X
X_FM
FM9
X
X_FM
FM11
X
X_FM
FM20
X
X_FM
FM19
X
X_FM
FM13
X
X_FM
FM5
X
X_FM
FM3
X
X_FM
FM18
X
X_FM
FM2
X
X_FM
FM10
X
X_FM
FM4
X
X_FM
FM14
X
X_FM
High Freq. return current decoupling
B B
EC37
X_ELS10/16V
C329
X_0.1u
VCC5+12V
X_ELS10/16V
EC34
C378
0.1u
C332
X_0.1u
C348
X_0.1u
C365
X_0.1u
C318
X_0.1u
C367
X_0.1u
C307
X_0.1u
C228 C1000p50x
VCCM
VCC3VCC5
VCCM
C206 X_C1000p50x
VCC3
-12V VCC3
EC36
X_ELS10/16V
VCC3SBY
A A
C331
0.1u
5
C267
X_0.1u
C328
0.1u
C64
X_0.1u
X_ELS10/16V
VCC3
C368
X_0.1u
EC40
C310
X_0.1u
C316
X_0.1u
C380
X_0.1u
4
C308
X_0.1u
C309
X_0.1u
5VSB
C333
X_0.1u
C393
0.1u
3
C116 X_C1000p50x
VCC3
C193 X_C1000p50x
VCC1_8
R242 X_0
R283 X_0
VCC5VCC3
C369 X_C1000p50x
2
Micro-Star
Title
Document Number
Last Revision Date:
Monday, August 23, 2004
DECOUPLING CAPACIROT
MS-7112
Sheet of
1
Rev
0A
31 31
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