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A
B
C
D
E
MS7043
Revision 0A
CHIPSET PT880+8237
TITLE
4 4
3 3
2 2
COVER SHEET
BLOCK DIAGRAM
PWR MAP/CLOCK MAP
GPIO/MEMORY/PCI/HW STRPPING
PROCESSOR (SOCKET478)
NORTH BRIDGE (PT880)
SOUTH BRIDGE (VT8237)
DDR TERMINATIONS A&B
DIMM1 / DIMM2 / DIMM3/DIMM4
IDE CONNECTORS
AGP SLOT
PCI SLOTS 1-5
AC'97 CODEC & AUDIO
USB CONNECTORS
MS7 ACPI CONTROLLER
VRM10.0(FMB1)
DLED & LAN CONNECTORS
VIA LAN PHY VT6103L
SHEET
1
2
3
4
5,6
7,8,9,10,11
12,13,14
15,16
17,18
19
20
21
22,23
24
25
26
27
28
CPU:
Intel Northwood/Prescott
System Chipset:
PT880 (North Bridge)
VIA 8237/8235 (South Bridge)
On Board Chipset:
BIOS -- ISA EEPROM
AC'97 Codec --VT1617
LPC Super I/O -- W83697HF
LAN -- VT6103L /VT6122
CLOCK --ICS 952911A + ICS 93733
Main Memory:
DDR * 2+1 (Max 3GB)
Expansion Slots:
PCI2.3 SLOT * 5
PWM:
Controller: ST 6710
GIGA LAN VT6122
ATX POWER CONNECTOR
CLOCK & BUFFER SYNTHESIZER
LPC SUPER IO & FLOPPY CONNECTOR
1 1
PARALLEL / SERIAL
MS8 34
EMI PORT
A
B
29
30
31
32
33
35
MSI
Title
Size Document Number Rev
C
D
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
COVER SHEET
Thursday, January 08, 2004
MS-7043
1 34
0A
E
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Block Diagram
1
VRM 10
ST 6710
Intel mPAG478B Processor
2-Phase PWM
FSB
AGP 1.5V
Connector
Keyboard
2X/4X/8X
PT880
V-Link
Mouse
IDE Primary
IDE Secondary
A A
USB Port 0
UltraDMA 33/66/100
VT8237/8235CE
64bit DDR
2 DDR
DIMM
Modules
PCI CNTRL
PCI ADDR/DATA
2 DDR
DIMM
Modules
PCI Slot 1
PCI Slot 2
PCI Slot 3
PCI Slot 4
chip
PCI Slot 5
PCI interface 100/1G LAN
USB Port 1
USB Port 2
USB
LPC Bus
USB Port 3
USB Port 4
LPC SIO
USB Port 5
Winbond
83697HF
USB Port 6
USB Port 7
AC'97 Codec
AC'97 Link
SATA prot1 and
port2
Floopy
1
ParallelFlash
Serial
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
BLOCK DIAGRAM
Thursday, January 08, 2004
MS-7043
2 34
0A
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8
7
6
5
4
3
2
1
PT800 PLATFORM CLOCK GENERATOR MAP
3.3V 5V 5VSB 12V
PT800 PLATFORM POWER DELIVERY MAP
PROCESSOR VCCP
D D
VRM
PROCESSOR 1.2V
Intel mPAG478B Processor
CPU HOST
CLK
DCLKO
PT880
AGP CLK
DCLKI
CLOCK GENERATOR CK409
MEM CLK0~5A/CLK#0~5A,
CLK0~2B/CLK#0~2B
C C
14.318MHZ
APIC
48MHZ
B B
2+1 DDR DIMM
PCI CLK
PCI CLK 0~4
PCI CLK
PCI CLK
Modules
VT8237/8235CE
PCI Slot 1~5
Flash
LAN
1.2V VREG
1.5V VREG
1.5V VREG
3VSB VREG
DDR 2.5V
VREG
2.5V VREG
2.5VSB
VREG
VTT 1.25V
VREG
AGP SLOT 1.5V
NORTH BRIDGE VCCP
NORTH BRIDGE VCC_AGP
NORTH BRIDGE +1.5V
NORTH BRIDGE SYSEM MEMORY
VCC_DDR
DDR DIMM1 / DIMM2 / DIMM3 2.5V
DDR VTT 1.25V
SOUTH BRIDGE +2.5V
SOUTH BRIDGE VCC3
SOUTH BRIDGE RESUME 2.5V_SB
SOUTH BRIDGE RESUME VCC3_SB
SOUTH BRIDGE RTC 3.3V
LAN-PHY VCC3_SB
PCI-LAN VCC3_SB
FWH 3.3V
PCI CLK
48MHZ
AGP CLK
A A
8
7
LPC SIO
Winbond
83697HF
AGP SLOT
6
LPC SUPER I/O 3.3V
LPC SUPER I/O VCC5
CK-409 3.3V
CK-409 AND BUFFER +2.5V
AC97 VDD5
VREG
5
4
3
AC97 VDD5
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
PWR AND CLOCK MAP
MS-7043
2
3 34Thursday, January 08, 2004
1
0A
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1
NB
PCI Config.
DEVICE
INTA#
INTB#
PCI_REQ#0PCI Slot 1
PCI_GNT#0
INTC#
INTD#
PCI Slot 2
INTB#
INTC#
PCI_REQ#1 AD20 PCICLK1
PCI_GNT#1
INTD#
INTA#
PCI Slot 3 PCI_REQ#2 AD21
INTC#
INTD#
PCI_GNT#2
INTA#
INTB#
INTD#
PCI_REQ#3PCI Slot 4 AD22
INTA# PCI_GNT#3
INTB#
INTC#
PCI Slot 5
INTA#
INTB#
PCI_REQ#4 AD23 PCICLK4
PCI_GNT#4
INTC#
INTD#
IDSEL
AD19
CLOCKREQ#/GNT#
PCICLK0
PCICLK2
PCICLK3
CLK GEN PIN OUTMCP1 INT Pin
18 (PCI_CLK0)
19 (PCI_CLK1)
21 (PCI_CLK2)
14 (PCI_CLK3)
17 (PCI_CLK4)
GPI 0
GPI 1
GPO 0
GPO 1 I
GPIO A
GPIO B
GPIO C
GPIO D
I
I
I
I
I
I
I
FunctionTypeGPIO Pin
GPI 0
IDE2 CBD
GPO 0
GPO 0
NB STR S
IOQ DEPH
NB STR S
GTL PULL
Power well
RESUME
RESUME
RESUME
RESUME
MAIN
MAIN
MAIN
MAIN
I/O
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22
A A
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
HI
HI
HI
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
default output
default output
default output
DDR DIMM Config.
CLOCKADDRESS
MDCLKA0/MDCLKA#0
MDCLKA1/MDCLKA#1
MDCLKA2/MDCLKA#2
MDCLKA3/MDCLKA#3
MDCLKA4/MDCLKA#4
MDCLKA5/MDCLKA#5
MDCLKB0/MDCLKB#0
MDCLKB1/MDCLKB#1
MDCLKB2/MDCLKB#2
Target
FWH
GPI 0
GPI 1
GPI 2
GPI 3
GPI 4
Function
TypeGPIO Pin
I
Pull UP through 1K ohms (unused)
I
Pull UP through 1K ohms (unused)
I
Pull UP through 1K ohms (unused)
I
Pull UP through 1K ohms (unused)
I
Pull UP through 1K ohms (unused)
DEVICE
DIMM 1
DIMM 2
1010000B
1010001B
DIMM 3 1010010B
PCI RESET DEVICE
Signals
PCIRST#1
HD_RST#
SB, NB
PCI slot 1-5,LAN,PCIRST#2
Primary, Scondary IDE
MSI
Title
Size Document Number Rev
1
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
General Purpose Spec
MS-7043
4 34Thursday, January 08, 2004
0A
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8
7
6
5
4
3
2
1
CPU SIGNAL BLOCK
HA#[3..35]7
HA#17
HA#25
HA#27
HA#30
HA#31
HA#35
HA#34
HA#33
D D
CPU1A
HDBI#0
HDBI#[0..3]7
FERR#14
STPCLK#14
HINIT#14
RSP#7
HDBSY#7
HDRDY#7
HTRDY#7
HADS#7
HLOCK#7
HBNR#7
HIT#7
HITM#7
HBPRI#7
C C
VTIN_GND32
CP4
X_COPPER
B B
HDEFER#7
CPU_TMPA32
12
CPUMISS13
IGNNE#14
SMI#14
A20M#14
SLP#14
BOOT26
BSEL013,31
BSEL113,31
CPU_GD25
CPURST#7
HD#[0..63]7
HDBI#1
HDBI#2
HDBI#3
IERR#
FERR#
STPCLK#
HINIT#
RSP#
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
THERMTRIP#
CPUMISS
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
CPU_GD
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
E21
DBI0#
G25
DBI1#
P26
DBI2#
V21
DBI3#
AC3
IERR#
V6
MCERR#
B6
FERR#
Y4
STPCLK#
AA3
BINIT#
W5
INIT#
AB2
RSP#
H5
DBSY#
H2
DRDY#
J6
TRDY#
G1
ADS#
G4
LOCK#
G2
BNR#
F3
HIT#
E3
HITM#
D2
BPRI#
E2
DEFER#
C1
TDI
D5
TDO
F7
TMS
E6
TRST#
D4
TCK
B3
THERMDA
C4
THERMDC
A2
THERMTRIP#
AF26
GND/SKTOCC#
C3
PROCHOT#
B2
IGNNE#
B5
SMI#
C6
A20M#
AB26
SLP#
A22
RESERVED0
A7
RESERVED1
AE21
RESERVED2
AF24
RESERVED3
AF25
RESERVED4
AD1
BOOTSELECT
AE26
OPTIMIZED/COMPAT#
AD6
BSEL0
AD5
BSEL1
AB23
PWRGOOD
AB25
RESET#
AA24
D63#
AA22
D62#
AA25
D61#
Y21
D60#
Y24
D59#
Y23
D58#
W25
D57#
Y26
D56#
W26
D55#
V24
D54#
HA#32
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
V22
U21
HD#52
HD#53
D45#
V25
U23
U24
U26
T23
T22
T25
T26
HD#50
HD#45
HD#47
HD#49
HD#51
HD#48
HD#46
HA#29
HD#44
A29#
D44#
R24
HA#28
HD#43
A28#
D43#
R25
HA#22
HA#20
HA#26
HA#23
HA#24
HA#19
HA#21
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
P24
HD#41
HD#42
D34#
R21
N25
N26
M26
N23
M24
P21
N22
HD#40
HD#38
HD#39
HD#36
HD#35
HD#37
HD#34
HA#18
HD#33
A18#
D33#
M23
HA#11
HA#16
HA#12
HA#14
HA#15
HA#13
A17#
A16#
A15#
A14#
A13#
A12#
D32#
D31#
D30#
D29#
D28#
D27#
H25
K23
J24
L22
M21
H24
HD#27
HD#26
HD#32
HD#29
HD#28
HD#31
HD#30
A11#
D26#
G26
HA#4
HA#9
HA#5
HA#10
HA#8
HA#6
HA#7
A9#
A8#
A7#
A6#
A5#
A4#
A10#
D25#
D24#
D23#
D22#
D21#
D20#
D19#
L21
D26
F26
E25
F24
F23
G23
HD#23
HD#25
HD#22
HD#21
HD#24
HD#20
HD#19
CPU STRAPPING RESISTORS
RN21
A A
8
BPM#1
BPM#4
BPM#5
BPM#2
BPM#3
IERR#
BPM#0
CPURST#
8P4R-62R
R30 62R
7
12
34
56
78
12
8P4R-62R
34
56
78
RN17
VCCP
FERR#
THERMTRIP#
PROCHOT#
DBRESET
6
RN12
8P4R-62R
12
VCCP
34
56
78
DBRESET
HA#3
HD#18
A3#
D18#
E24
HD#17
D17#
H22
HD#16
AE25A5A4
DBR#
D16#
D15#
D14#
D25
J21
HD#15
HD#14
AD26
VCC_SENSE
VSS_SENSE
D13#
D12#
D11#
D23
C26
H21
G22
HD#12
HD#10
HD#13
HD#11
AC26
ITP_CLK1
D10#
B25
AD2
ITP_CLK0
VIDPWRGD
D9#
D8#
D7#
C24
C23
HD#7
HD#8
HD#9
VID5
AD3
B24
HD#6
VID4
AE1
VID5#
D6#
D22
HD#5
VID3
AE2
VID4#
VID3#
D5#
D4#
C21
HD#4
AE3
A25
VID2
VID2#
D3#
HD#3
VID1
AE4
VID1#
D2#
A23
HD#2
VID0
AE5
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
TESTHI12
TESTHI11
TESTHI10
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D1#
B22
B21
HD#1
HD#0
ALL COMPONENTS CLOSE TO CPU
5
CPU_GD
HBR#0
R27 300R
R39 220R
CPU_VID_GD 26
VID[0..5] 26
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
D0#
_ZIF-SOCKET478
{Priority}
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
BPM#5
BPM#4
BPM#3
BPM#2
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
TESTHI12
TESTHI11
TESTHI1
TESTHI0
HRS#2
HRS#1
HRS#0
AP#1
AP#0
HBR#0
COMP1
COMP0
NMI_SB
INTR
VCCP
4
VIDPWRGD DC Specifications
VIL
VIH
It must rout to the enable pin of PWM and CK-409.
VIDGD to Vccp delay time is from 1ms to 10ms.
VIDGD rising time is 150ns.
X7R
GTLREF
C55 C220P16X
{VOLTAGE}
R40 61.9R1%
R44 61.9R1%
THERM#13
Min MaxTyp
0.9
HREQ#[0..4] 7
12
VCCP
34
56
RN10
8P4R-62R
78
12
RN9
34
8P4R-62R
56
78
CPUCLK# 31
CPUCLK 31
HRS#[0..2] 7
AP#1 7
AP#0 7
HBR#0 7
DP#3 7
DP#2 7
DP#1 7
DP#0 7
HADSTB#1 7
HADSTB#0 7
HDSTBP#3 7
HDSTBP#2 7
HDSTBP#1 7
HDSTBP#0 7
HDSTBN#3 7
HDSTBN#2 7
HDSTBN#1 7
HDSTBN#0 7
NMI_SB 14
INTR 14
THERM# PROCHOT#
N-MMBT3904_SOT23
VCCP
B
C E
Q15
3
R26
4.7KR
CPU GTL REFERNCE VOLTAGE BLOCK
0.3
VCCP
R55
100R1%
0.63*Vccp
GTLREF
C43
R54
C0.1U25Y
169R1%
X7R
CPU ITP BLOCK
ITP_TDI
ITP_TRST#
PWRBTN#13
R31 X_150R
R35 X_680R
ITP_TMS
R38 X_39R
ITP_TDO
R34 X_75R
ITP_TCK
R28 X_27R
HINIT#
IGNNE#
A20M#
SMI#
STPCLK#
NMI_SB
INTR
SLP#
VCCP
C E
PWRBTN#
MSI
Title
Size Document Number Rev
Date: Sheet of
Q12
X_N-MMBT3904_SOT23
MICRO-STAR INt'L CO., LTD.
2
VCCP
VCCP
RN16
8P4R-150R
12
34
56
78
8P4R-150R12
34
56
78
R17
X_4.7KR
C13 X_C0.1U25Y
B
THERMTRIP#
VCCP
RN15
Intel mPGA478B - Signals
MS-7043
5 34Friday, January 16, 2004
1
0A
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8
7
6
5
4
3
2
1
E20E8F11
VCC
VCC
VSS
VSS
VCC
VSS
G21G6G24
F13
F15
VCC
VCC
VSS
VSS
G3H1H23
1.2V 150mA
C29
C0.1U25Y
Near processor
F17
F19
F9
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
H26H4J2
AF4
VCC-VID
VSS
AD20
AF3
VCC-IOPLL
VCC-VIDPRG
VSS
VSS
VSS
VSS
J22
J25J5K21
AE23
VCCA
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
_ZIF-SOCKET478
{Priority}
CPU_IOPLL
C20
C19
{VOLTAGE}
VSSA
C10U10Y1206
{VOLTAGE}
X_C10U10Y1206
AD22
Y5
The ESL is less than 5nH, and the ESR is less than 0.3ohm.
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
It support DC current if 100mA.
L1 X_10U100m_0805
L2 10U100m_0805
DC voltage drop should
be less than 70mV.
VCCP
VCC_VID
CPU VOLTAGE BLOCK
VID Voltage is from 1.14V to 1.32V.
It is derived from 3.3V.
It should be able to source 150mA.
D D
VCCP
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
VCC
VSS
AF19
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
C15
C17C2C19
C22
C25C5C7C9D12
CPU1B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
B18
VSS
VCC
VSS
VSS
VSS
VSS
VSS
VSS
B23
B20
B26B4B8
C11
C13
D10
VSS
A11
VSS
A13
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
A24
VSS
A26
VSS
A3
VSS
A9
VSS
AA1
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
VSS
AA19
VSS
AA23
C C
B B
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
VSS
AD12
VSS
AD14
VSS
AD16
VSS
AD18
VSS
AD21
VSS
AD23
VSS
AD4
VSS
AD8
VSS
AE11
VSS
AE13
VSS
AE15
VSS
AE17
VSS
AE19
VSS
AE22
VSS
AE24
VSS
AE7
VSS
AE9
VSS
AF1
VSS
AF10
VSS
AF12
VSS
AF14
VSS
AF16
VSS
AF18
VSS
AF20
VSS
AF6
VSS
AF8
VSS
VSS
VSS
VSS
B10
B12
B14
B16
It drives the power logic of BSEL[1:0] and VID[5:0].
VID to VIDGD delay time is from 1ms to 10ms.
VID to VIDGD deassertion time is 1ms for max.
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D16
D18
D20
D21D3D24D6D8E1E11
VSS
D14
VCC
VSS
C10
C12
C14
C16
C18
C20C8D11
D13
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E13
E15
E17
E19
E23
E4
E26
D15
D17
VCC
VCC
VSS
VSS
E7E9F10
D19D7D9
VCC
VSS
VCC
VSS
VCC_VID
C28
C1U10Y
E10
E12
E14
E16
E18
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
F12
F14
F16
F18F2F22
F25F5F8
CPU DECOUPLING CAPACITORS
VCCP
A A
VCCP VCCP
C38
C10U10Y1206
C40
C10U10Y1206
C41
C10U10Y1206
C39
C10U10Y1206
C31
X_C10U10Y1206
C21
X_C10U10Y1206
8
C16
X_C10U10Y1206
C26
X_C10U10Y1206
C23
C10U10Y1206
C25
X_C10U10Y1206
C22
X_C10U10Y1206
C24
X_C10U10Y1206
VCCP
7
C35
C100U2SP
C42
X_C100U2SP
C53
X_C10U10Y1206
C52
C10U10Y1206
C51
X_C10U10Y1206
C50
X_C10U10Y1206
C49
C10U10Y1206
C48
X_C10U10Y1206
MSI
Title
Size Document Number Rev
6
5
4
3
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Intel mPGA478B - Power
2
MS-7043
6 34Friday, January 16, 2004
1
0A

A
B
C
D
E
VCCP VCCP
C29
F29
H27
N13
N14
N15
N16
N17
N18
N19
N20
R13
T13
U13
VTT
VTT
VTT
VTT
VTT
VTT
VTT
P13
VTT
HA#[3..35]5
4 4
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HA#32
C257
C0.01U50X
HA#33
HA#34
HA#35
HBR#0
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HRS#0
HRS#1
HRS#2
HDBI#0
HDBI#1
HDBI#2
HDBI#3
CPURST#
C0.01U50X
3 3
HADSTB#05
HADSTB#15
HADS#5
HBNR#5
HBPRI#5
HBR#05
HDBSY#5
HDEFER#5
HDRDY#5
HIT#5
HITM#5
HLOCK#5
HTRDY#5
HREQ#[0..4]5
HRS#[0..2]5
2 2
HDBI#[0..3]5
CPURST#5
NBHCLK31
NBHCLK#31
near NB
GTLVREF_NB
C258
C0.01U50X
HRCOMP
HCOMPVREF
C68
C0.01U50X
1 1
AP#05
RSP#5
AP#15
RN145
12
34
56
78
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
C261
G18
G22
G14
B22
A20
F20
A21
B21
E23
C21
D21
E22
F21
C22
E21
D22
F22
C25
C24
D24
E24
E25
F26
B26
B23
E26
D25
E27
C23
F27
D27
D28
C27
C28
E28
F28
A22
C26
A19
C18
C16
E18
B19
E17
C19
C17
F16
F18
D19
C20
D20
E19
F19
B18
D18
B17
A6
B13
J3
A5
K6
M5
M6
H19
H11
H14
K7
J7
H17
F15
F23
F25
F24
U4A
HA3
HA4
HA5
HA6
HA7
HA8
HA9
HA10
HA11
HA12
HA13
HA14
HA15
HA16
HA17
HA18
HA19
HA20
HA21
HA22
HA23
HA24
HA25
HA26
HA27
HA28
HA29
HA30
HA31
HA32
HA33
HA34
HA35
ADSTB0
ADSTB1
ADS
BNR
BPRI
BREQ0
DBSY
DEFFER
DRDY
HIT
HITM
HLOCK
HTRDY
HREQ0
HREQ1
HREQ2
HREQ3
HREQ4
RS0
RS1
RS2
DBI0
DBI1
DBI2
DBI3
CPURST
HCLK
HCLK
HAVREF0
HAVREF1
HDVREF0
HDVREF1
HDVREF2
HDVREF3
GTLREF
HRCOMP
HCOMPVREF
RSP/RESEVE
AP0/RESEVE
AP1/RESEVE
VTT
VTT
VTT
VTT
VTT
VTT
VTT
R14
T14
U14
V14
VTT
VTT
VTT
8P4R-0R
VIA-PT880-CD A2
A
B
VTT
P14
P15
P16
P17
P18
P19
P20
VTT
VTT
VTT
VTT
VTT
VTT
VTT
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63
DSTBP0
DSTBN0
DSTBP1
DSTBN1
DSTBP2
DSTBN2
DSTBP3
DSTBN3
RESEVE/DP0
RESEVE/DP1
RESEVE/DP2
RESEVE/DP3
DPWR
C
G10
D9
C9
B9
F10
B7
A9
F9
E7
E9
F7
C7
A8
C8
D7
A7
D16
E16
B14
D15
E15
C14
E14
C15
D12
C13
B12
B10
C11
B11
A10
C12
H6
G7
J4
G6
H5
G3
H4
G4
K1
J5
H1
J6
J1
J2
K4
K3
C3
C4
B4
D3
A4
C5
D4
E4
E2
E3
F3
F4
C2
F1
G1
F2
F8
D8
E13
D13
H3
H2
D1
E1
B6
D6
C6
E6
G15
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HDSTBP#0 5
HDSTBN#0 5
HDSTBP#1 5
HDSTBN#1 5
HDSTBP#2 5
HDSTBN#2 5
HDSTBP#3 5
HDSTBN#3 5
RN147
1 2
3 4
5 6
7 8
8P4R-0R
HD#[0..63] 5
DP#0 5
DP#2 5
DP#1 5
DP#3 5
R74 100R1%
VCCP
R78 100R1%
VCCP
R58 20.5R1%
MSI
Title
Size Document Number Rev
D
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
NORTH BRIDGE (PART 1 & PART4)
MS-7043
R68
169R1%
R81
49.9R1%
E
GTLVREF_NB
HCOMPVREF
HRCOMP
0A
7 34Thursday, January 15, 2004

A
B
C
D
E
C256
C2.2U16Y0805
CB75
+2.5V
C194
C1000P50X
E
VCC_DDR
8 34Thursday, January 15, 2004
VCCPVCC_DDR
C259
C10U10Y0805
CB130
C0.1U25Y
0A
C10U10Y0805
C262
4 4
U4B
MD_0
MD_[0:63]15,17
3 3
2 2
CKE[0:5]15,17
MVREF_NB
MD_1
MD_2
MD_3
MD_4
MD_5
MD_6
MD_7
MD_8
MD_9
MD_10
MD_11
MD_12
MD_13
MD_14
MD_15
MD_16
MD_17
MD_18
MD_19
MD_20
MD_21
MD_22
MD_23
MD_24
MD_25
MD_26
MD_27
MD_28
MD_29
MD_30
MD_31
MD_32
MD_33
MD_34
MD_35
MD_36
MD_37
MD_38
MD_39
MD_40
MD_41
MD_42
MD_43
MD_44
MD_45
MD_46
MD_47
MD_48
MD_49
MD_50
MD_51
MD_52
MD_53
MD_54
MD_55
MD_56
MD_57
MD_58
MD_59
MD_60
MD_61
MD_62
MD_63
CKE0
CKE1
CKE2
CKE3
M36
M33
M34
W35
W34
AB36
AC34
AD32
AE35
AC33
AC36
AE36
AE34
AR34
AP33
AP32
AR31
AT34
AR33
AT32
AP31
AN26
AM25
AN24
AR23
AT27
AT26
AT23
AP23
AP21
AM20
AR19
AL20
AT21
AR20
AT19
AP19
AT17
AN16
AT15
AN15
AP17
AR17
AP16
AP15
M35
AK17
AK22
AE29
W29
B36
MDA0
D34
MDA1
E33
MDA2
F35
MDA3
C35
MDA4
C36
MDA5
E34
MDA6
E36
MDA7
K33
MDA8
K35
MDA9
MDA10
MDA11
K34
MDA12
K36
MDA13
L36
MDA14
MDA15
T35
MDA16
T36
MDA17
V36
MDA18
MDA19
R36
MDA20
U33
MDA21
V33
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
T33
CKEA0
CKEA1
R35
CKEA2
L34
CKEA3
MVREF5
MVREF4
MVREF3
MVREF2
R29
MVREF1
J29
MVREF0
VCC_DDR
1 1
R76
100R
MVREF_NB
R75
100R
C265
C260
C1000P50X
VIA-PT880-CD A2
C255
C1000P50X
C4.7U10Y0805
A
P24
R24
N24
VCC3
VCC3
P21
VCC_DDR
T24
U24
V24
W24
VCC3
VCC3
VCC3
VCC3
VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
P22
P23
R23
T23
B
Y24
AA24
AB24
AC24
VCC3
VCC3
VCC3
VCC3
VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
U23
V23
W23
Y23
N21
N22
N23
VCC3
VCC3
VCC3
VCC3
VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
AA23
AB23
AC18
AD19
AD20
AD21
VCC3
VCC3
VCC3
VCC25MEM
VCC25MEM
VCC25MEM
AC19
AC20
AC21
AD22
AD23
AD24
VCC3
VCC3
VCC3
VCC25MEM
VCC25MEM
AC22
AC23
AK32
AK33
AP34
AP36
VCC3
VCC3
VCC3
VCC3
VCC25MEM/MAC0
VCC25MEM/MAC1
VCC25MEM/MAC3
VCC25MEM/MAC5
VCC25MEM/MAC8
VCC25MEM/MAC9
VCC25MEM/MAC11
VCC25MEM/MAC14
VCC25MEM/SCASC
DQMA0/MPDA0
DQMA1/MPDA1
DQMA2/MPDA2
DQMA3/MPDA3
DQMA4/MPDA4
DQMA5/MPDA5
DQMA6/MPDA6
DQMA7/MPDA7
RESEVE/QBMMEA0
RESEVE/QBMMEA1
RESEVE/QBMSBA0
RESEVE/QBMSBA1
VCC25MEM/QBMMEB0
VCC25MEM/QBMMEB1
VCC25MEM/QBMSBB0
VCC25MEM/QBMSBB1
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
MAA15
SRASA
SCASA
SWEA
MAC2
MAC4
MAC6
MAC7
MAC10
MAC12
MAC13
MAC15
SRASC
SWEC
CSA0
CSA1
CSA2
CSA3
DQSA0
DQSA1
DQSA2
DQSA3
DQSA4
DQSA5
DQSA6
DQSA7
DQSA8
DCLKIA
DCLKOA
AJ33
MAA0
AH35
MAA1
AH34
MAA2
AD33
MAA3
AD36
MAA4
AB34
MAA5
MAA6
AB35
V32
MAA7
W36
MAA8
V35
MAA9
AT36
MAA10
AT31
MAA11
AT35
MAA12
U36
MAA13
T34
MAA14
AT20
MAA15
AP26
AN25
AR26
AE31
AB32
AA35
Y36
AA34
W30
Y31
R33
R31
N36
AF31
AH31
AE32
P33
M30
AN22
AN30
AN29
AP30
AT25
AR25
AP29
AP25
D35
L31
U34
AD34
AT33
AT24
AN20
AR16
AH36
D36
L33
V34
AD35
AN32
AP24
AP20
AT16
G36
G35
G33
G34
F36
F34
F33
F32
A32
B31
VCC_DDR
-CS0
-CS1
-CS2
-CS3
-DQS_0
-DQS_1
-DQS_2
-DQS_3
-DQS_4
-DQS_5
-DQS_6
-DQS_7
-DQM_0
-DQM_1
-DQM_2
-DQM_3
-DQM_4
-DQM_5
-DQM_6
-DQM_7
VCC_DDR
DCLKI
R70 22R
DCLKO_
DCLKO as short as passable
DCLKI = DCLKx + 2 "
C
MAA[0:15] 15,17
-SRASA 15,17
-SCASA 15,17
-SWEA 15,17
-CS[0:3] 15,17
-DQS_[0:7] 15,17
-DQM_[0:7] 15,17
DCLKI 31
DCLKO 31
C272
X_C10P50N
C10U10Y0805
CB131
CM32
C1U16Y0805
MSI
Title
Size Document Number Rev
D
Date: Sheet of
C10U10Y0805
C10U10Y0805
CB128
CB82C10U10Y0805
C1U10Y
CB126
CB139
X_C0.1U25Y
Decoupling capacitors
MICRO-STAR INt'L CO., LTD.
NORTH BRIDGE (PART 2)
MS-7043

A
AA2
AA3
VLAD[0:15]14
4 4
VIIN14
VIOUT14
3 3
2 2
1 1
-SUSST13
PCIRST#221,22,25,32
-PWROK_NB13
R189 X_0R
R174 X_0R
VBE014
VPAR14
UPSTB14
-UPSTB14
DNSTB14
-DNSTB14
UPCMD14
DNCMD14
AVDD1
AVDD2
AVDD3
AVDD4
A
VLAD0
VLAD1
VLAD2
VLAD3
VLAD4
VLAD5
VLAD6
VLAD7
VLAD8
VLAD9
VLAD10
VLAD11
VLAD12
VLAD13
VLAD14
VLAD15
LVREF_NB
LCOMPP
TESTIN_NB
DFTIN_NB
AVDD1
AVDD2
AVDD3
AVDD4
AP8
AR8
AN10
AR11
AR7
AP7
AM11
AP11
AM7
AN6
AP12
AM12
AT6
AR6
AN13
AP13
AP5
AP6
AN7
AT7
AM10
AM9
AN9
AP9
AN12
AP10
AM6
AN14
AM13
AP14
AA5
AA4
AB5
AB6
AA6
AL7
C31
D32
M4
D31
M1
L1
R1
R3
R2
U4
U3
V7
U2
N5
V6
T4
T3
N4
N3
W1
W2
Y3
Y2
Y5
Y6
Y7
V1
W4
W3
Y4
V2
V4
V3
V5
W5
T5
P4
P3
P6
AB4
VD0
VD1
RES2
RES3
VD2
VD3
VD4
VD5
VD6
VD7
VD8
VD9
VD10
VD11
VD12
VD13
VD14
VD15
RESERVE/VIIN
RESERVE/VIOUT
VBE
VPAR
UPSTB
UPSTB
DNSTB
DNSTB
UPCMD
DNCMD
VLREF
VCOMPP
SUSST
TESTIN NB
RESET
PWROK
DFTIN
AVDD1
AVDD2
AVDD3
AVDD4
AR
AB
AG
HSYNC
VSYNC
RSET
INTA
XIN
BISTIN
SPD2
SPDCLK2
DISPCLKO
DISPCLKI
TVD00/DVP0D00
TVD01/DVP0D01
TVD02/DVP0D02
TVD03/DVP0D03
TVD04/DVP0D04
TVD05/DVP0D05
TVD06/DVP0D06
TVD07/DVP0D07
TVD08/DVP0D08
TVD09/DVP0D09
TVD10/DVP0D10
TVD11/DVP0D11
TVVS/DVP0VS
TVHS/DVP0HS
TVDE/DVP0DE
VTCLK/DVP0DCLK
TVCLKIN/DVP0DET
SPD1
SPDCLK1
GPO0
GPOUT
DACAVDD1
DACAVDD2
VCCPLL1
VCCPLL2
VCCPLL3
AGND1
M3
E31
RES1
AGND2
AGND3
L2
M2
AGND4
W13
Y13
V13
VCC4
VCC4
VCC4
DACAGND1
DACAGND2
DACAGND3
T6
P5
R4
B
P2
B
GNDPLL1
GNDPLL2
N6N1N2
NBVCC15
VCC_DDR
GNDPLL3
NBVCC15 VCC_AGP
AD16
AD17
AD18
VCC2
AC17
VCC2
AC16
VCC2
VCC2
W14
Y14
VCC1
AA14
VCC1
AB14
VCC1
AC14
VCC1
AC15
VCC1
AD13
VCC1
VCC25MEM
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD
AE12
VSS
AR30
AR32
AR35
AT8
AT11
A29
AR27
AR24
AR21
AR18
AR15
AR14
AR2
AC13
VCC1
VSS
AN11
AB13
VCC1
VSS
AN8
AA13
VCC1
VSS
AM36
AD15
VCC1
VSS
AM34
VCC1
VSS
AD14
VCC1
GFRAME
GDEVSEL
DBIH/PIPE
AGP8XDET
ADSTBF0
ADSTBS0
ADSTBF1
ADSTBS1
AGPVREF0
AGPVREF1
AGPNCOMP
AGPPCOMP
AGPBUSY
VSS
VSS
VSS
AM30
AM32
AR5
C
GD0
GD1
GD2
GD3
GD4
GD5
GD6
GD7
GD8
GD9
GD10
GD11
GD12
GD13
GD14
GD15
GD16
GD17
GD18
GD19
GD20
GD21
GD22
GD23
GD24
GD25
GD26
GD27
GD28
GD29
GD30
GD31
GCBE0
GCBE1
GCBE2
GCBE3
GIRDY
GTRDY
GSTOP
GPAR
RBF
WBF
GREQ
GGNT
GSERR
DBIL
ST0
ST1
ST2
SBSTBF
SBSTBS
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
GCLK
VSUS15
TCLK
C
VIA-PT880-CD A2
U4C
GD0
AT2
GD1
AP2
GD2
AP4
GD3
AT5
GD4
AR4
GD5
AT1
GD6
AN5
GD7
AT4
GD8
AM1
GD9
AP3
GD10
AR1
GD11
AM4
GD12
AL2
GD13
AN2
GD14
AL1
GD15
AP1
GD16
AJ3
GD17
AJ1
GD18
AJ4
GD19
AK6
GD20
AH1
GD21
AH2
GD22
AK4
GD23
AH3
GD24
AG5
GD25
AJ6
GD26
AH5
GD27
AG2
GD28
AH4
GD29
AF3
GD30
AG6
GD31
AF1
AN4
AL3
AK2
AK5
AL4
AL5
AK3
AK1
AM3
AN3
AE7
AB2
AD4
AD5
AN1
AF4
AG4
AB1
AD6
AE5
AE6
AD3
AD1
AT3
AR3
AG3
AG1
SBA0
AC1
SBA1
AC4
SBA2
AC3
SBA3
AD2
SBA4
AE2
SBA5
AE3
SBA6
AE4
SBA7
AE1
AGPVREF
AF7
AD7
AGPVREF
N7
AGPNCOMP0
AB3
AGPPCOMP0
AC6
AL14
AT14
W6
1.5VSB
GD[0:31]
Decoupling capacitors
GBE0 20
GBE1 20
GBE2 20
GBE3 20
GFRAME 20
GIRDY 20
GTRDY 20
GDEVSEL 20
GSTOP20
GPAR 20
RBF 20
WBF 20
GREQ 20
GGNT 20
GSERR 20
DBIH 20
DBIL 20
AGP8X_DET_NB20
ST0 20
ST1 20
ST2 20
SB_STBF 20
SB_STBS 20
AD_STBF020
AD_STBS0 20
AD_STBF120
AD_STBS1 20
SBA[0:7]
AGPVREF 20
GCLK_NB 31
LVREF_NB => VDD/4=0.625
GD[0:31] 20
VCC_AGP
CB132
C0.1U25Y
SBA[0:7] 20
AGP8xdet 0=enable
NBVCC15
R135
1.3KR1%
LVREF_NB
R144
1KR1%
D
CB134
C1U16Y0805
C115
C0.1U25Y
D
C1U16Y0805
C113
E
NBVCC15VCC3
AVDD
CP14
X_COPPER
X_C1000P50X
CP8
X_COPPER
X_C1000P50X
CP12
X_COPPER
X_C1000P50X
CP13
X_COPPER
C264
C60
C96
C97
12
12
AVDD
12
AVDD
12
FB5
X_220L2_50_0805
AVDD1
FB2
X_220L2_50_0805
AVDD2
FB3
X_220L2_50_0805
AVDD4
FB4
X_220L2_50_0805
AVDD3
CM17
C1U16Y0805
R392 0R
R393 0R
CM12
C1U16Y0805
CM16
C1U16Y0805
CM18
C1U16Y0805X_C1000P50X
R373
0R0805
AVDD
R374
0R0805
R373 for PT880
R374 for P4X533
VCC3
NBVCC15
VCC_DDR
R66
33R
DFTIN_NB
TESTIN_NB
AGPNCOMP0
AGPPCOMP0
LCOMPP
R71 4.7KR
R65 4.7KR
R127 60.4R1%
R125 60.4R1%
R181 360R
VCC_AGP
2.5V lever
R62
1KR1%
AGPVREF
CB136
C0.1U25Y
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
NORTH BRIDGE (PART 3)
MS-7043
CB100
C1000P50N
9 34Thursday, January 15, 2004
E
0A

A
B
C
D
E
4 4
3 3
2 2
NBVCC15
U4E
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AE13
M25
M24
M23
M22
M21
M20
M19
M18
M17
M16
M15
M14
M13
M12
AD25
AD12
AC25
AC12
AB25
AB12
AA25
AA12
W25
W12
R15
R16
R17
R18
R19
R20
R21
R22
T15
T16
T17
T18
T19
T20
T21
T22
U15
U16
U17
U18
U19
U20
U21
U22
V15
V16
V17
V18
V19
V20
V21
V22
W15
W16
W17
W18
W19
W20
W21
W22
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
U25
VDD
U12
VDD
T25
VDD
T12
VDD
R25
VDD
R12
VDD
P25
VDD
P12
VDD
N25
VDD
N12
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
Y25
VDD
Y12
VDD
VDD
VDD
V25
VDD
V12
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
A11
A14
A17
A23
A26
B3
B5
B8
B20
B32
B35
D2
D5
D11
D14
D17
D23
D26
D29
E8
E20
E32
E35
F17
G2
G5
G8
G11
G16
G23
G26
G27
H20
H30
H32
H35
NBVCC15
C1U16Y0805C263
C107 C1U16Y0805
C103 C1U16Y0805
C10U10Y0805CB127
X_C0.1U25YCB90
C10U10Y0805CB129
C10U10Y0805CB135
C0.1U25YCB125
C0.1U25YCB124
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K2K5L32
L35
M29
P29
P32
P35
U32
U35
Y29
Y32
Y35
AB29
AC2
AC5
AC32
AC35
AF2
AF5
AF29
AF32
AF35
AH29
AJ2
AJ5
AJ32
AJ35
AK20
AK27
AK30
AM2
AM5
AM14
AM15
AM16
AM18
AM21
AM24
VSS
AM27
VIA-PT880-CD A2
1 1
MSI
Title
Size Document Number Rev
A
B
C
D
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
NORTH BRIDGE (PART4)
MS-7043
10 34Friday, January 16, 2004
E
0A

5
D D
4
3
2
1
U4D
CKEB0
CKEB[0:1]16,18
-DQS_B0
-DQS_B016,18
-DQS_B1
-DQS_B116,18
-DQS_B2
-DQS_B216,18
-DQS_B3
-DQS_B316,18
-DQS_B4
-DQS_B416,18
-DQS_B5
-DQS_B516,18
-DQS_B6
-DQS_B616,18
-DQS_B7
C C
DCLKBO31
C273
X_C10P50N
B B
-DQS_B716,18
-DQM_B016,18
-DQM_B116,18
-DQM_B216,18
-DQM_B316,18
-DQM_B416,18
-DQM_B516,18
-DQM_B616,18
-DQM_B716,18
R69
-CSB016,18
-CSB116,18
MAB[0:15]16,18
-SRASB16,18
-SCASB16,18
-SWEB16,18
CKEB1
22R
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
MAB14
MAB15
DCLKOB_
AG33
AT28
AR22
AP18
AG31
AG32
AR28
AP22
AN18
AT30
AT29
AR29
AP28
AE33
AF30
AE30
AA30
AA36
W31
AF34
AJ36
AF36
M31
AN23
AL29
AN28
AN31
K32
J33
K31
J35
A33
H34
N34
Y34
A34
H36
N35
Y33
A31
Y30
R32
P31
N31
P36
CKEB0
CKEB1
CKEB2
CKEB3
DQSB0
DQSB1
DQSB2
DQSB3
DQSB4
DQSB5
DQSB6
DQSB7
DQSB8
DQMB0/MPDB0
DQMB1/MPDB1
DQMB2/MPDB2
DQMB3/MPDB3
DQMB4/MPDB4
DQMB5/MPDB5
DQMB6/MPDB6
DQMB7/MPDB7
DCLKOB
CSB0
CSB1
CSB2
CSB3
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
MAB14
MAB15
SRASB
SCASB
SWEB
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
C32
D33
A35
C34
C33
B33
A36
B34
G31
G32
J34
J31
H31
H33
J32
J36
M32
N32
P34
P30
N30
N33
R34
R30
AA31
AA32
AA33
AB31
W32
W33
AB33
AB30
AG36
AG35
AH33
AH30
AF33
AG34
AH32
AJ34
AL30
AM29
AL28
AN27
AM31
AM28
AP27
AL27
AL23
AM23
AN21
AK21
AL22
AM22
AT22
AL21
AL18
AN19
AL17
AM17
AL19
AM19
AT18
AN17
MDB_0
MDB_1
MDB_2
MDB_3
MDB_4
MDB_5
MDB_6
MDB_7
MDB_8
MDB_9
MDB_10
MDB_11
MDB_12
MDB_13
MDB_14
MDB_15
MDB_16
MDB_17
MDB_18
MDB_19
MDB_20
MDB_21
MDB_22
MDB_23
MDB_24
MDB_25
MDB_26
MDB_27
MDB_28
MDB_29
MDB_30
MDB_31
MDB_32
MDB_33
MDB_34
MDB_35
MDB_36
MDB_37
MDB_38
MDB_39
MDB_40
MDB_41
MDB_42
MDB_43
MDB_44
MDB_45
MDB_46
MDB_47
MDB_48
MDB_49
MDB_50
MDB_51
MDB_52
MDB_53
MDB_54
MDB_55
MDB_56
MDB_57
MDB_58
MDB_59
MDB_60
MDB_61
MDB_62
MDB_63
MDB_[0:63] 16,18
VIA-PT880-CD A2
A A
5
4
Rev0.4
MSI
Title
Size Document Number Rev
3
2
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
NORTH BRIDGE (PART 3)
MS-7043
11 34Friday, January 16, 2004
1
0A