MSI MS-7033 Schematics
1
2
3
4
5
MS-7033
Version 0B
Intel (R) Grantsdale (GMCH) + ICH6 Chipset
Intel Tejas & Prescott LGA775 Processor
A A
Title
COVER SHEET
BLOCK DIAGRAM
Intel LGA775
Intel Grantsdale
ICH6
ICS954119 Gen. & FWH
LPC I/O - W83627THF
Azalia Audio
RTL8110S(B)/8100C
B B
DDR DIMM 1 & 2
DDR Termination Resistors
PCI -Express X16 & X1 Port
PCI Slot 2,3 20
VIA-6307 IEEE1394 Controller
USB CONNECTORS
ATX ,Front Panel
MS7 ACPI Controller
C C
VT6410 IDE RAID
SATA1,2 , IDE1& Fan control 27
VGA Connector
MANUAL PARTS
POWER MAP
Clock Distribution Diagram
HISTORY
Page
1
2
3 , 4 , 5
6 , 7 , 8 , 9
10,11,12
13
14
15
16
17
18
19
21
22
23
24
25VRM10.1 Intersil 6565 3Phase
26
28
29
30
31
32
CPU:
Intel Tejas/Prescott - 3.0G & Above
System Chipset:
Intel Grantsdale - GMCH (North Bridge)
Intel ICH6 (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM
AC'97 Codec -- ALC 880
LPC Super I/O -- W83627THF
LAN -- Realtek 8100C/8110S
CLOCK -- ICS954119
Main Memory:
DDR 1 * 2 (Max 2GB)
Expansion Slots:
PCI EXPRESS X16 SLOT * 1
PCI EXPRESS X1 SLOT * 1
PCI 2.3 SLOT * 2
Intersil PWM:
Controller: HIP6565 3 Phase
Driver: HIP6602B * 1 + HIP6601B * 1
PCI Routing Table
PCI Device
D D
PCI Slot 2
(Add MEDION SPEC)
PCI Slot 3
VT6307 EEE1394
RTL8110S/8100C LAN
VT6410 IDE RAID
1
AD17 1 B
AD23 0 D
4AD19 D
AD22 3 C
AD20 5 E
INTERRUPTIDSEL REQ/GNT
CAD18 2
Title
COVER SHEET
Size Document Number Rev
A3
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7033 0B
132Wednesday, April 07, 2004
5
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VRM 10.1
A A
Intersil 6565
Intel LGA775 Processor
Block Diagram
3-Phase PWM
FSB 133/200MHz Core Clock
PCI EXPRESS
X16
Connector
Analog
Grantsdale
P/G
Video
Out
B B
UltraDMA
33/66/100
DMI
IDE Primary
SATA
SATA 0~1
USB
ICH6
USB Port 0~7
64bit DDR
133/166/200MHz
PCI Express x1
2 DDR 1
DIMM
Modules
PCI CNTRL
PCI ADDR/DATA
PCI-E x1
Slot x 1
PCI Slot x 2
RTL8100C
/8110S(B)
LAN
VT6307
IEEE-1394
VT6410
IDE
RAID
AC'97 / Azalia
CMI9880/6
C C
Azalia Codec
33MHz@16.5MB/s
LPC Bus
LPC SIO
Winbond
83627THF
IDE Secondary
Flash
Keyboard
Floopy Parallel Serial
Mouse
D D
Title
BLOCK DIAGRAM
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7033 0B
232Wednesday, April 07, 2004
5
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AC2
C12
DBR#
D14#
B12D8C11
H_D#13
D13#
AN3
H_D#12
AN4
RSVD
D12#
H_D#11
AN5
AN6
RSVD
VCC_SENSE
D11#
D10#
B10
A11
H_D#10
H_D#9
VRM_SENSE_VCC
VRM_SENSE_VSS
AJ3
AK3
ITP_CLK1
ITP_CLK0
VSS_SENSE
D9#
D8#
D7#
D6#
A10A7B7B6A5C6A4C5B4
H_D#8
H_D#6
H_D#5
H_D#7
CPU SIGNAL BLOCK
U8A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
D53#
B15
H_D#53
H_A#[3..31]6
H_A#6
H_A#8
H_A#5
H_A#7
H_A#4
H_A#3
H_A#9
H_A#10
H_A#25
H_A#26
H_A#24
H_A#23
H_A#27
H_A#30
H_A#31
H_A#29
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
AF5
AB4
AC5
AB5
AA5
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
C14
C15
A14
D17
D20
G22
D22
E22
G21
F21
E21
F20
E19
E18
F18
F17
G17
H_D#49
H_D#48
H_D#47
H_D#51
H_D#52
H_D#50
H_D#46
2
H_D#39
H_D#41 H_A#28
H_D#38
H_D#44
H_D#40
H_D#45
H_D#37
H_D#36
H_D#42
H_D#43
H_A#16
H_A#19
H_A#22
H_A#21
AD6
AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4M5P6L5
A22#
A21#
D35#
D34#
G18
E16
H_D#35
H_D#34
H_A#20
E15
H_D#33
A20#
D33#
H_D#32
G16
H_A#18
A19#
D32#
G15
H_D#31
H_A#17
A18#
D31#
H_D#30
F15
A17#
D30#
H_D#29
G14
H_A#15
A16#
D29#
H_D#28
F14
H_A#14
A15#
D28#
H_D#27
G13
H_A#13
A14#
D27#
E13
H_D#26
H_A#12
A13#
D26#
D13
H_D#25
H_A#11
A12#
D25#
H_D#24
F12
A11#
D24#
F11
H_D#23
A9#
A8#
A7#
A10#
D23#
D22#
D21#
D20#
D10
E10D7E9F9F8G9D11
H_D#20
H_D#21
H_D#19
H_D#22
A6#
D19#
A5#
A4#
A3#
D18#
D17#
D16#
D15#
H_D#16
H_D#18
H_D#15
H_D#14
H_D#17
3
A A
H_DBI#[0..3]6
H_EDRDY#6
H_IERR#4
H_FERR#4,10
H_STPCLK#10
H_INIT#10
H_DBSY#6
H_DRDY#6
H_TRDY#6
B B
VTT_OUT_RIGHT
C C
D D
VTT_OUT_RIGHT
1
H_ADS#6
H_LOCK#6
H_BNR#6
H_HIT#6
H_HITM#6
H_BPRI#6
H_DEFER#6
RN11B 8P4R-51R
3 4
RN8A 8P4R-51R
1 2
RN11A 8P4R-51R
1 2
RN8C 8P4R-51R
5 6
RN11D 8P4R-51R
7 8
CPU_TMPA14
VTIN_GND14
TRMTRIP#4,10
H_PROCHOT#4
H_IGNNE#10
ICH_H_SMI#10
H_A20M#10
H_SLP#10
C50 X_C0.1U25Y
R67 X_1K
H_D#[0..63]6
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
CPU_BOOT
LL_ID0
LL_ID025
H_BSL04,8,13
H_BSL14,8,13
H_BSL24,8,13
H_PWRGD4,10
H_CPURST#4,6
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
AM7
D5#
H_D#4
AM5
VID7#
D4#
H_D#3
VID5
AL4
VID6#
D3#
H_D#2
R5 0R
R3 0R
VID3
VID2
VID1
VID4
AK4
AL6
AM3
AL5
VID5#
VID4#
VID3#
VID2#
VID_SELECT
GTLREF0
GTLREF1
GTLREF_SEL
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
RSVD
RSVD
BCLK1#
BCLK0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D2#
D1#
D0#
ZIF-SOCK775-15u
H_D#0
H_D#1
VID0
VID1#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
DP3#
DP2#
DP1#
DP0#
AM2
VID0#
VID[0..5] 25
AN7
CPU_GTLREF
H1
H2
H29
H_BPM#5
AG3
H_BPM#4
AF2
H_BPM#3
AG2
H_BPM#2
AD2
H_BPM#1
AJ1
H_BPM#0
AJ2
H_PCREQ#
G5
H_REQ#4
J6
H_REQ#3
K6
H_REQ#2
M6
H_REQ#1
J5
H_REQ#0
K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3
F24
G24
G26
G27
G25
H_TESTHI2_7
F25
H_TESTHI1
W3
H_TESTHI0
F26
RSVD_AK6
AK6
RSVD_G6
G6
G28
F28
H_RS#2
A3
H_RS#1
F5
H_RS#0
B3
U3
U2
F3
T2
J2
H_COMP3
R1
H_COMP2
G2
H_COMP1
T1
H_COMP0
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
VCC_VRM_SENSE 25
VSS_VRM_SENSE 25
8P4R-680R
VID3
1
VID1
3
VID2
5
VID4
7
VID0
R55 680R
VID5
R52 680R
CPU_GTLREF 4
RN5A
RN8B 8P4R-51R
RN8D 8P4R-51R
RN11C 8P4R-51R
RN5B 8P4R-51R
RN5C 8P4R-51R
R70 62R
RN23A 8P4R-62R
RN23B 8P4R-62R
RN23D 8P4R-62R
RN23C 8P4R-62R
TP1
TP2
R69 X_60.4R1%
R77 X_60.4R1%
R72 100R/1%
R82 100R/1% C63
R71 60.4R/1%
R131 60.4R/1%
PLACE RESISTORS OUTSIDE SOCKET
TP5
CAVITY IF NO ROOM FOR VARIABLE
TP6
TP3
RESISTOR DON'T PLACE
TP4
4
12
34
78
56
34
56
H_PCREQ# 6
H_REQ#4 6
H_REQ#3 6
H_REQ#2 6
H_REQ#1 6
H_REQ#0 6
1 2
3 4
7 8
5 6
R123 62R
R68 62R
R124 62R
R58 X_62R
R79 X_62R
CK_H_CPU# 13
CK_H_CPU 13
H_RS#[0..2] 6
H_ADSTB#1 6
H_ADSTB#0 6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 10
H_INTR 10
RN2
Title
Size Document Number Rev
A3
Date: Sheet
VTT_OUT_RIGHT
2
4
6
8
VTT_OUT_RIGHT
VTT_OUT_LEFT
H_BR#0 4,6
VTT_OUT_LEFT 4
X_C0.1U25Y
0.1uF
V_FSB_VTT 4,6,8,12,13,24
VTT_OUT_RIGHT 4
C33
C37
0.1uF
MICRO-START INT'L CO.,LTD .
Intel LGA775 - Signals
MS-7033 0B
5
332Wednesday, April 07, 2004
of
1
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5
VCCP
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
VCCP
U8B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U26
U27
U28
U29
U30U8V8
W23
W24
W25
W26
W27
W28
W29
W30W8Y23
Y24
Y25
Y26
Y27
Y28
Y29
Y30
Y8
VCCP
A A
B B
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
VSSA
RSVD
VCC-IOPLL
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
RSVD/VTT_PKGSENSE
HS1
HS2
HS3
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AN25
AN26
AN29
AN30
AN8
AN9
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30J8J9
K23
K24
K25
K26
K27
K28
K29
K30K8L8
M23
M24
M25
M26
M27
M28
M29
M30M8N23
N24
N25
N26
N27
N28
N29
N30N8P8R8T23
T24
T25
T26
T27
T28
T29
T30T8U23
U24
U25
123
A23
B23
D23
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
AM6
AA1
J1
F27
F29
HS4
4
H_VCCA
H_VSSA
H_VCCIOPLL
VTT_PWG
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
ZIF-SOCK775-15u
V_FSB_VTT
V_FSB_VTT
R130 X_1K
C148 C10U10Y0805
C118 C10U10Y0805
C99 X_22u-1206_X5R
CAPS FOR FSB GENERIC
VCC3
TEJ/PSC
0
1
RSVD
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
C C
100 OHMS OVER 210 OHMS RESISTORS
VTT_OUT_LEFT CPU_GTLREF
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
49.9
R78 49.9R/1%
R76
100R/1%
100
C60
0.1uF
CPU_GTLREF 3
C56
X_C220P50N
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT3
VTT_OUT_LEFT3
D D
VTT_OUT_RIGHT
VTT_OUT_LEFT
R57 62R
R56 120R
R75 100R
R87 62R
R133 62R
H_CPURST#
H_PROCHOT#
H_PWRGD
H_BR#0
H_IERR#
H_CPURST# 3,6
H_PROCHOT# 3
H_PWRGD 3,10
H_BR#0 3,6
H_IERR# 3V_FSB_VTT3,6,8,12,13,24
PLACE AT ICH END OF ROUTE
V_FSB_VTT3,6,8,12,13,24
V_FSB_VTT
1
R272 62R
R273 62R
H_FERR#
TRMTRIP# 3,10
H_FERR# 3,10
2
V_FSB_VTT H_VCCIOPLL
C95
C1U10Y
C96
C1U10Y
VTT_OUT_LEFT
VCC5_SB
R44
1K
VID_GD#24,25
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTTTRMTRIP#
3
R45
10K
RN31 8P4R-470R
1
2
3
4
5
6
7
8
H_VSSA
H_VCCA
R60
680R
Q13
N-MMBT3904_SOT23
H_BSL1 3,8,13
H_BSL2 3,8,13
H_BSL0 3,8,13
1.25V VTT_PWRGOOD
VTT_PWG
4
Title
Intel LGA775 - Power
Size Document Number Rev
A3
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7033 0B
432Wednesday, April 07, 2004
5
of
1
A A
2
3
4
5
TP7
TP8 TP10
TP9
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
VSS
AN1
VSS
VSS
VSS
VSS
AN10
VSS
VSS
AN13
VSS
VSS
AN16
VSS
AN17
H28H3H6H7H8H9J4J7K2
AN2
VSS
VSS
VSS
VSS
AN20
VSS
VSS
AN23
VSS
VSS
AN24
VSS
VSS
VSS
VSS
AN27
AN28B1B11
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B14
ZIF-SOCK775-15u
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
AC4
AE3
AE4D1D14
E23
U8C
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
AA23
VSS
AA24
VSS
AA25
VSS
AA26
B B
C C
AA27
AA28
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE29
E24E5E6E7F23F6B13J3N4P5V1W1Y3Y7Y5Y2W7W4V7V6V30V3V29
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE30
AE5
AE7
AF10
AF13
AF16
AF17
AF20
AF23
AF24
AF25
AF26
AF27
AF28
AF29
AF3
AF30
AF6
AF7
AG10
AG13
AG16
RSVD
VSS
AG17
VSS
VSS
AG20
VSS
VSS
AG23
VSS
VSS
AG24
AG7
VSS
VSS
VSS
VSS
AH1
VSS
VSS
AH10
VSS
VSS
AH13
VSS
VSS
AH16
VSS
VSS
AH17
VSS
VSS
AH20
VSS
VSS
AH23
V28
AH24
VSS
VSS
V27
AH3
VSS
VSS
V26
VSS
VSS
AH6
V25
V24
V23U7U1T7T6T3R7R5R30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH7
AJ10
AJ13
AJ16
AJ17
AJ20
VSS
VSS
R29
R28
R27
R26
R25
R24
R23R2P7P4P30
P29
P28
P27
P26
P25
P24
P23N7N6N3M7M1L7L6L30L3L29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
AL17
AL20
VSS
VSS
AL23
VSS
VSS
AL24
VSS
VSS
AL27
VSS
VSS
AL28
AL3
VSS
VSS
AL7
VSS
VSS
L28
L27
L26
L25
L24
L23K7K5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM16
AM17
AM20
AM23
AM24
AM27
AM28
AM4
VSS
VSS
VSS
VSS
AM1
AM10
AM13
D D
Title
Intel LGA775- GND
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7033 0B
532Wednesday, April 07, 2004
5
of
1
2
3
4
5
V_1P5_CORE
AC11
AB11
Y20
Y19
Y17
Y16
W20
W16
U20
U16
T20
T19
T17
T16
AA13
AA14
AA16
AA18
AA20
AA21
AA22
AA23
AA24
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB24
N13
N14
N15
N16
N18
N20
N21
P13
P14
P15
P17
P19
P21
P22
R13
R14
R15
R16
R18
R20
R22
R23
T13
T14
T15
T21
T23
T24
U13
U14
U22
U24
V13
V14
V15
V21
V23
V24
W13
W14
W22
W24
Y13
Y14
Y15
Y21
Y23
VCCNCTF
VCCNCTF
AP1
B35B1A34
4
VCCNCTF
VCCNCTF
VCCNCTF
NC
Intel Grantsdale
A2
Y24
VCCNCTF
VCCNCTF
DINV_0#
DINV_1#
DINV_2#
DINV_3#
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
J33
HD0#
H_D#1
H33
HD1#
H_D#2
J34
HD2#
H_D#3
G35
HD3#
H_D#4
H35
HD4#
H_D#5
G34
HD5#
H_D#6
F34
HD6#
H_D#7
G33
HD7#
H_D#8
D34
HD8#
H_D#9
C33
HD9#
H_D#10
D33
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
H_D#11
B34
H_D#12
C34
H_D#13
B33
H_D#14
C32
H_D#15
B32
H_D#16
E28
H_D#17
C30
H_D#18
D29
H_D#19
H28
H_D#20
G29
H_D#21
J27
H_D#22
F28
H_D#23
F27
H_D#24
E27
H_D#25
E25
H_D#26
G25
H_D#27
J25
H_D#28
K25
H_D#29
L25
H_D#30
L23
H_D#31
K23
H_D#32
J22
H_D#33
J24
H_D#34
K22
H_D#35
J21
H_D#36
M21
H_D#37
H23
H_D#38
M19
H_D#39
K21
H_D#40
H20
H_D#41
H19
H_D#42
M18
H_D#43
K18
H_D#44
K17
H_D#45
G18
H_D#46
H18
H_D#47
F17
H_D#48
A25
H_D#49
C27
H_D#50
C31
H_D#51
B30
H_D#52
B31
H_D#53
A31
H_D#54
B27
H_D#55
A29
H_D#56
C28
H_D#57
A28
H_D#58
C25
H_D#59
C26
H_D#60
D27
H_D#61
A27
H_D#62
E24
H_D#63
B25
H_DBI#0
E34
H_DBI#1
J26
H_DBI#2
K19
H_DBI#3
B26
E33
E35
H26
F26
J19
F19
B29
C29
Title
Size Document Number Rev
A3
Date: Sheet
H_DSTBP#0 3
H_DSTBN#0 3
H_DSTBP#1 3
H_DSTBN#1 3
H_DSTBP#2 3
H_DSTBN#2 3
H_DSTBP#3 3
H_DSTBN#3 3
MICRO-START INT'L CO.,LTD .
Intel Grantsdale - CPU
MS-7033 0B
H_D#[0..63] 3
H_DBI#[0..3] 3
5
632Wednesday, April 07, 2004
of
R171
60.4R/1%
M30
M28
M26
M35
M31
M32
M23
M22
AG7
M14
H29
K29
G30
G32
K30
K27
K33
R29
N26
N31
P26
N29
P28
R28
N33
T27
T31
U28
T26
T29
N27
E31
R33
E30
F33
E32
H31
G31
F31
N35
N34
P33
K34
P34
G24
AF7
B23
D24
A23
A24
J29
L29
L31
L28
J28
L26
J31
L33
L34
J35
L35
J32
U12A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
HPCREQ#
BREQ0#
BPRI#
BNR#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
DBSY#
DRDY#
HEDRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
CPURST#
RSTIN#
ICH_SYNC#
HDRCOMP
HDSCOMP
HDSWING
HDVREF
C162
X_C2.2P50N
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
AJ21
AK21
HXSCOMP
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AK24
AL21
AL20
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AK18
AJ24
AJ23
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AJ18
AJ20
V31
V_FSB_VTT
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
V30
U30
V32
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
Y30
AB29
R31
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
R30
AA31
AA30
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AC12
AC13
AC14
R169
49.9R/1%
R162
100R/1%
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRDNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
N12
N22
N23
N24
P12
P23
P24
R12
R24
T12
U12
GTLREF VOLTAGE SHOULD BE 0.67*VTT=0.8V
100 OHM OVER 210 RESISTORS
MCH_GTLREF
C153
C159
0.1uF
X_C220P50N
VCCNCTF
VCCNCTF
VCCNCTF
V12
W12
Y12
VCCNCTF
VCCNCTF
VCCNCTF
AA12
AB12
AC23
V_FSB_VTT
VCCNCTF
VCCNCTF
VCCNCTF
AC24
AN19
AL28
VCCNCTF
VCCNCTF
VCCNCTF
AJ14
AH24
AG6
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
AD30
P30
L19
L12
K12
J12
H17
H15
H12
G12
F24
F12
E16
C16
AR35
AR34
AR2
AR1
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/4*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT
R177
301R/1%
R178
100R/1%
HXSWING
C169
0.01uF
VCCNCTF
VCCNCTF
AP35
H_A#[3..31]3
A A
H_ADSTB#03
H_ADSTB#13
B B
H_PCREQ#3
H_BR#03,4
H_BPRI#3
H_A#3 H_D#0
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_BNR#3
H_LOCK#3
H_ADS#3
H_REQ#[0..4]3
H_HIT#3
H_HITM#3
H_DEFER#3
H_TRDY#3
H_DBSY#3
H_DRDY#3
H_EDRDY#3
H_RS#[0..2]3
C C
CK_H_MCH13
CK_H_MCH#13
H_CPURST#3,4
PLTRST#10,13,24
ICH_SYNC#11
R181
20R1%
PWRGD11,24
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
ICH_SYNC#
HXRCOMP
HXSCOMP
HXSWING
MCH_GTLREF
R271
V_2P5_MCH
D D
ICH_SYNC#
8.2K
V_FSB_VTT3,4,8,12,13,24
CAPS SHOULD BE PLACED NEAR MCH PIN
1
2
3
1
DATA_A[0..63]17,18
A A
SCS_A#017,18
SCS_A#117,18
SCS_A#0
SCS_A#1
RAS_A#17,18
CAS_A#17,18
WE_A#17,18
RAS_A#
CAS_A#
WE_A#
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A[0..13]17,18
B B
SBS_A017,18
SBS_A117,18
DQS_A[0..7]17,18
SBS_A0
SBS_A1
DQS_A0
DQS_A1
DQS_A2
DQS_A3
DQS_A4
DQS_A5
DQS_A6
DQS_A7
P_DDR0_A17
N_DDR0_A17
P_DDR1_A17
N_DDR1_A17
P_DDR2_A17
N_DDR2_A17
C C
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
SM_XSLEWIN
MCH_VREF_A
SMPCOMP_P
SMPCOMP_N
AM34
AL35
AK34
AL33
AN29
AL34
AP31
AN22
AP22
AN21
AP21
AM21
AP19
AR20
AN16
AN18
AM15
AN23
AP15
AP13
AB33
AP33
AR24
AR28
AR29
AN28
AP26
AR23
AG1
AG2
AL3
AL2
AP7
AR7
AF17
AG17
AM30
AL29
AG35
AG33
AA34
AA35
U34
U35
AM24
AN25
AN2
AN3
AB34
AC33
AP25
AN26
AM2
AM3
AC35
AC34
AN31
AH15
AE16
AJ12
AK12
AE7
AG8
AG4
AE5
AF5
U12B
SACS0#
SACS1#
SACS2#
SACS3#
SARAS#
SACAS#
SAWE#
SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13
RSV
RSV
RSV
RSV
SABA0
SABA1
RSV
SADQS0
RSV
SADQS1
RSV
SADQS2
RSV
SADQS3
RSV
SADQS4
RSV
SADQS5
RSV
SADQS6
RSV
SADQS7
RSV
SACK0
SACK0#
SACK1
SACK1#
SACK2
SACK2#
SACK3
SACK3#
SACK4
SACK4#
SACK5
SACK5#
RSV
RSV_TP1
RSV_TP0
SMXSLEWIN
SMXSLEWOUT
SMVREF0
SRCOMP1
SRCOMP0
RSV
RSV
MCH_VREF_A
PLACE 0.1UF CAP CLOSE TO MCH
C313
0.1uF
DATA_B[0..63]17,18
D D
VCC_DDR
R255 80.6R1% R252 1K/1%
1
SMPCOMP_P MCH_VREF_A
R253 80.6R1%
C277
X_C0.1U25Y
DATA_A0
AE3
SADQ0
DATA_A1
AF3
SADQ1
DATA_A2
DATA_B0
2
DATA_A6
DATA_A3
DATA_A4
DATA_A5
AH2
AJ2
AE2
AE1
AG3
SADQ2
SADQ3
SADQ4
SADQ5
SBDQ0
SBDQ1
SBDQ2
SBDQ3
AH7
AJ6
AL5
AN6
AG9
DATA_B3
DATA_B2
DATA_B1
DATA_B4
SMPCOMP_N
2
DATA_A7
DATA_A8
AH3
SADQ6
SADQ7
SBDQ4
SBDQ5
AH4
DATA_B5
DATA_B6
DATA_A9
AJ1
AK2
SADQ8
SBDQ6
AM5
AL6
DATA_B7
DATA_A10
DATA_A11
AN4
SADQ9
SADQ10
SBDQ7
SBDQ8
AJ7
DATA_B9
DATA_B8
DATA_A12
AP4
AJ3
SADQ11
SADQ12
SBDQ9
SBDQ10
AL7
AF11
DATA_B10
DATA_A14
DATA_A15
DATA_A13
AK3
AP2
AP3
SADQ13
SADQ14
SADQ15
SBDQ11
SBDQ12
SBDQ13
AE11
AJ8
AL8
DATA_B12
DATA_B13
DATA_B11
VCC_DDR
DATA_A17
DATA_A16
AP5
AR5
SADQ16
SADQ17
SBDQ14
SBDQ15
AG10
AG11
DATA_B15
DATA_B14
DATA_A19
DATA_A18
AN8
AP9
SADQ18
SADQ19
SBDQ16
SBDQ17
AE13
AF13
DATA_B16
DATA_B17
DATA_A21
DATA_A20
AN5
AP6
SADQ20
SADQ21
SBDQ18
SBDQ19
AG14
AD14
DATA_B18
DATA_B19
DATA_A22
DATA_A23
AR8
AN9
SADQ22
SADQ23
SBDQ20
SBDQ21
AD12
AH12
DATA_B20
DATA_B21
DATA_A25
DATA_A24
AK16
AL17
SADQ24
SADQ25
SBDQ22
SBDQ23
AF14
AD15
DATA_B22
DATA_B23
DATA_A26
DATA_A28
DATA_A27
DATA_A29
DATA_A30
DATA_A31
AD17
AF19
AF16
AJ17
AE19
AH18
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
AD18
AK19
AE22
AH21
AL18
AH19
DATA_B29
DATA_B28
DATA_B27
DATA_B25
DATA_B26
DATA_B24
CP11 X_COPPER
R251 X_0R
R257
1K/1%
DATA_A32
DATA_A33
AH27
AK27
SADQ31
SADQ32
SBDQ29
SBDQ30
AF22
AD21
DATA_B31
DATA_B30
DATA_A34
DATA_A35
AN30
AK31
SADQ33
SADQ34
SBDQ31
SBDQ32
AF23
AF25
DATA_B32
DATA_B33
DATA_A36
DATA_A37
AL27
AJ28
SADQ35
SADQ36
SBDQ33
SBDQ34
AL25
AJ26
DATA_B35
DATA_B34
3
DATA_A38
DATA_A39
AL30
AL31
SADQ37
SADQ38
SADQ39
SBDQ35
SBDQ36
SBDQ37
AD23
AF24
DATA_B36
DATA_B37
3
DATA_A40
DATA_A42
DATA_A41
DATA_A43
DATA_A44
AJ34
AH35
AG32
AF34
AJ33
SADQ40
SADQ41
SADQ42
SADQ43
SBDQ38
SBDQ39
SBDQ40
SBDQ41
AJ25
AL26
AJ29
AJ31
AG30
DATA_B41
DATA_B42
DATA_B40
DATA_B38
DATA_B39
MCH_VREF_B
DATA_A45
DATA_A46
AH33
AF33
SADQ44
SADQ45
SBDQ42
SBDQ43
AG31
AK33
DATA_B44
DATA_B43
DATA_A48
DATA_A47
AE33
AE35
SADQ46
SADQ47
SBDQ44
SBDQ45
AK32
AG27
DATA_B46
DATA_B45
DATA_A49
DATA_A50
AE34
Y33
SADQ48
SADQ49
SADQ50
SBDQ46
SBDQ47
SBDQ48
AF28
AE31
DATA_B48
DATA_B47
DATA_A51
DATA_A52
W34
AD31
SADQ51
SADQ52
SBDQ49
SBDQ50
AF27
AB27
DATA_B50
DATA_B49
DQM_A[0..7]17,18
DATA_A54
DATA_A53
AD35
AA32
SADQ53
SADQ54
SBDQ51
SBDQ52
AB26
AE29
DATA_B51
DATA_B52
SCKE_A117,18
SCKE_A017,18
DATA_A55
DATA_A56
Y35
V34
SADQ55
SBDQ53
AE27
AC28
DATA_B54
DATA_B53
DQM_B[0..7]17,18
DATA_A58
DATA_A57
V33
R32
SADQ56
SADQ57
SBDQ54
SBDQ55
AC26
AA29
DATA_B56
DATA_B55
SCKE_B017,18
SCKE_B117,18
DATA_A59
DATA_A60
R34
W35
SADQ58
SADQ59
SBDQ56
SBDQ57
W29
U26
DATA_B58
DATA_B57
DATA_A62
DATA_A61
W33
T33
SADQ60
SADQ61
SBDQ58
SBDQ59
V29
Y26
DATA_B60
DATA_B59
DATA_A63
T35
SADQ62
SADQ63
SBDQ60
SBDQ61
AA28
W26
DATA_B62
DATA_B61
SCKE_A0
SCKE_A1
AL12
AN11
SACKE0
SACKE1
SBDQ62
SBDQ63
V28
DATA_B63
AP11
AR11
SACKE2
SACKE3
SBCKE0
SBCKE1
AN10
AM9
AP10
SCKE_B0
SCKE_B1
4
DQM_A1
DQM_A0
AF2
AL1
SADM0
SBCKE2
SBCKE3
AR9
4
5
DQM_A6
DQM_A2
DQM_A4
DQM_A7
DQM_A3
DQM_A5
AN7
AH16
AK29
AG34
AA33
U33
SBCS0#
SBCS1#
SADM4
SADM5
SADM6
SBCS2#
SADM7
SBCS3#
SBRAS#
SBCAS#
SBWE#
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
SBMA13
RSV
RSV
RSV
RSV
SBBA0
SBBA1
RSV
SBDQS0
RSV
SBDQS1
RSV
SBDQS2
RSV
SBDQS3
RSV
SBDQS4
RSV
SBDQS5
RSV
SBDQS6
RSV
SBDQS7
RSV
SBCK0
SBCK0#
SBCK1
SBCK1#
SBCK2
SBCK2#
SBCK3
SBCK3#
SBCK4
SBCK4#
SBCK5
SBCK5#
RSV
RSV_TP3
RSV_TP2
SMYSLEWIN
SMYSLEWOUT
SADM1
SADM2
SADM3
SMVREF1
SBDM0
SBDM1
SBDM2
SBDM3
SBDM4
SBDM5
SBDM6
SBDM7
AJ5
AH9
AH13
AG20
AG24
AH31
AD24
W31
Intel Grantsdale
DQM_B5
DQM_B3
DQM_B1
DQM_B2
DQM_B6
DQM_B7
DQM_B4
DQM_B0
SCS_B#0
AP34
AN34
AN33
AM33
AP27
AN27
AR27
AM18
AP18
AN17
AR16
AR15
AN15
AP17
AL15
AP14
AN13
AN20
AR12
AM12
AD32
AN32
AP29
AP30
AP32
AM27
AR19
AP23
AK5
AL4
AK10
AH10
AK13
AL14
AD20
AF20
AH25
AG26
AH28
AH30
AB31
AC30
W27
Y28
AH22
AG23
AL11
AJ11
AE26
AE25
AL23
AK22
AK9
AL9
AD29
AD28
AL24
AK15
AN14
AF9
AE10
AE8
SCS_B#1
RAS_B#
CAS_B#
WE_B#
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13MAA_A13
SBS_B0
SBS_B1
DQS_B0
DQS_B1
DQS_B2
DQS_B3
DQS_B4
DQS_B5
DQS_B6
DQS_B7
P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B
SM_YSLEWIN
MCH_VREF_B
SCS_B#0 17,18
SCS_B#1 17,18
RAS_B# 17,18
CAS_B# 17,18
WE_B# 17,18
MAA_B[0..13] 17,18
SBS_B0 17,18
SBS_B1 17,18
DQS_B[0..7] 17,18
P_DDR0_B 17
N_DDR0_B 17
P_DDR1_B 17
N_DDR1_B 17
P_DDR2_B 17
N_DDR2_B 17
C266
0.1uF
PLACE 0.1UF CAP CLOSE TO MCH
Title
Intel Grantsdale - Memory
Size Document Number Rev
A3
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7033 0B
732Wednesday, April 07, 2004
5
of
1
EXP_A_TXP_[0..15] 19
EXP_A_TXN_[0..15] 19
EXP_A_RXP_[0..15] 19
EXP_A_RXN_[0..15] 19
U12C
E11
EXPARXP0
F11
EXPARXN0
J11
EXPARXP1
H11
EXPARXN1
F9
EXPARXP2
E9
EXPARXN2
F7
EXPARXP3
E7
EXPARXN3
B3
EXPARXP4
B4
EXPARXN4
D5
EXPARXP5
E5
EXPARXN5
G6
EXPARXP6
G5
EXPARXN6
H8
EXPARXP7
H7
EXPARXN7
J6
EXPARXP8
J5
EXPARXN8
K8
EXPARXP9
K7
EXPARXN9
L6
EXPARXP10
L5
EXPARXN10
P10
EXPARXP11
R10
EXPARXN11
M8
EXPARXP12
M7
EXPARXN12
N6
EXPARXP13
N5
EXPARXN13
P7
EXPARXP14
P8
EXPARXN14
R6
EXPARXP15
R5
EXPARXN15
U5
DMI RXP0
U6
DMI RXN0
T9
DMI RXP1
T8
DMI RXN1
V7
DMI RXP2
V8
DMI RXN2
V10
DMI RXP3
U10
DMI RXN3
A11
GCLKINP
B11
GCLKINN
K13
SDVOCTRLDATA
J13
SDVOCTRLCLK
H16
BSEL0
E15
BSEL1
D17
BSEL2
M16
RSV
F15
RSV
C15
MTYPE
A16
EXP_SLR
B15
RSV
C14
RSV
K15
RSV
L10
VCC
M10
VSS
A17
VCCAHPLL
B17
VCCAMPLL
A12
VCCADPLLA
B13
VCCADPLLB
A14
VCCA3GPLL
A13
VCCHV
E13
VCCACRTDAC
D13
VCCACRTDAC
F13
VSSACRTDAC
Intel Grantsdale
V_FSB_VTT
C192
C188
0.1uF
0.1uF
V_1P5_CORE V_1P5_CORE
C204
0.1uF
V_1P5_CORE
V_2P5_MCH
V_FSB_VTT3,4,6,12,13,24
VCCA_MPLL
C200
X_C10U10Y0805
VCCA_DPLLB
C232
X_C10U10Y0805
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
SDVO_CTRL_DATA
SDVO_CTRL_CLK
BSEL0
MTYPE
EXP_SLR
VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
C171
0.1uF
C231
0.1uF
EXP_A_RXP_019
EXP_A_RXN_019
EXP_A_RXP_119
EXP_A_RXN_119
EXP_A_RXP_219
A A
B B
H_BSL03,4,13
H_BSL13,4,13
H_BSL23,4,13
EXP_A_RXN_219
EXP_A_RXP_319
EXP_A_RXN_319
EXP_A_RXP_419
EXP_A_RXN_419
EXP_A_RXP_519
EXP_A_RXN_519
EXP_A_RXP_619
EXP_A_RXN_619
EXP_A_RXP_719
EXP_A_RXN_719
EXP_A_RXP_819
EXP_A_RXN_819
EXP_A_RXP_919
EXP_A_RXN_919
EXP_A_RXP_1019
EXP_A_RXN_1019
EXP_A_RXP_1119
EXP_A_RXN_1119
EXP_A_RXP_1219
EXP_A_RXN_1219
EXP_A_RXP_1319
EXP_A_RXN_1319
EXP_A_RXP_1419
EXP_A_RXN_1419
EXP_A_RXP_1519
EXP_A_RXN_1519
DMI_ITP_MRP_010
DMI_ITN_MRN_010
DMI_ITP_MRP_110
DMI_ITN_MRN_110
DMI_ITP_MRP_210
DMI_ITN_MRN_210
DMI_ITP_MRP_310
DMI_ITN_MRN_310
CK_PE_100M_MCH13
CK_PE_100M_MCH#13
SDVO_CTRL_DATA19
SDVO_CTRL_CLK19
H_BSL0
R189 10K
H_BSL1 BSEL1
R194 10K
H_BSL2 BSEL2
R205 10K
R200 X_1KR1%
R195 X_1KR1%
For EMI request
V_1P5_CORE
C C
VCC_DDR
C85
X_0.1uF
D D
V_FSB_VTT
C189 X_0.1uF
C174 X_0.1uF
V_2P5_DAC_FILTERED28
C67
C44
X_0.1uF
X_0.1uF
FSB GENERIC DECOUPLING
CP6
X_COPPER
V_1P5_CORE
V_1P5_CORE V_1P5_CORE
L9 X_10U100m_0805
X_COPPER
L11 X_10U100m_0805
C212
X_C0.22U16Y
CP8
1
2
V_1P5_CORE
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
VTT
VTT
H22
G22
G21
F22
F21
F20
E22
CP9
X_COPPER
L13 X_10U100m_0805
CP5
X_COPPER
L8 X_10U100m_0805
2
AD2
VCC
VTT
E21
AD1
E20
AC10
VCC
VTT
E19
AC9
AC8
AC7
VCC
VCC
VCC
VTT
VTT
VTT
D22
D21
D20
X_C10U10Y0805
X_C10U10Y0805
AC6
AC5
AC4
AC3
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
D19
C22
C21
C20
VCCA_DPLLA
C241
VCCA_HPLL
C194
VCC
VTT
AC2
C19
VCC
VTT
AC1
B22
VCC
VTT
AB10
B21
VCC
VTT
AB9
VCC
VTT
B20
C242
0.1uF
C197
0.1uF
AB8
B19
AB7
VCC
VTT
A22
VCC
VTT
AB6
AB5
VCC
VTT
A21
A20
AB4
AB3
AB2
VCC
VCC
VCC
VCC
VTT
VTT
A19
V_1P5_CORE
AB1
W18
V19
VCC
VCC
VSSNCTF
VSSNCTF
AC25
AB25
AA25
V17
U18
VCC
VCC
VCC
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
AA11
Y25
Y18
10uH/100mA_0805
VCC_DDR
AR33
AR31
AR26
AR22
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
Y11
W25
W11
V25
V20
L10
CP12
X_COPPER
L14 X_90nH
3
AR18
AR14
AR10
AP28
AP24
AP20
AP16
AP12
AN35
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
V16
V11
U25
U11
T25
T18
T11
R25
R11
CP7 X_COPPER
R204 X_0R
3
C223
X_C10U10Y0805
V_1P5_PCIEXPRESS
C276
C314
4
V_1P5_PCIEXPRESS
AM32
AM28
AM26
AM25
AM23
AM22
AM20
AM19
AM17
AM16
AM14
AM13
AM11
AM10
AK35W1W2W3W4W6W7W8W9Y1Y2Y3Y4Y5Y6Y7Y8
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
U15
U21
U23
V22
W15
W21
L12 0.1uH/50mA
VCC3G
VSSNCTF
VSSNCTF
W23
Y22
C240
C10U10Y0805
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
P25
P11
N25
AD25
N11
M11
AA15
AA17
AA19
N17
N19
P16
P18
P20
R17
R19
R21
T22
VCCA_GPLL V_2P5_DAC_FILTERED
C10U10Y0805
X_C10U10Y0805
C225
0.1uF
V_2P5_MCH
VCC3G
VCC3G
VCC3G
VSSNCTF
4
Y9
VCC3G
VCC3G
VCC3G
VCC3G
EXPATXP0
EXPATXN0
EXPATXP1
EXPATXN1
EXPATXP2
EXPATXN2
EXPATXP3
EXPATXN3
EXPATXP4
EXPATXN4
EXPATXP5
EXPATXN5
EXPATXP6
EXPATXN6
EXPATXP7
EXPATXN7
EXPATXP8
EXPATXN8
EXPATXP9
EXPATXN9
EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12
EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15
DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3
EXPACOMPO
EXPACOMPI
CRTHSYNC
CRTVSYNC
CRTRED
CRTGREEN
CRTBLUE
CRTREDB
CRTGREENB
CTRBLUEB
CRTDDCDATA
CRTDDCCLK
DREFCLKINP
DREFCLKINN
CRTIREF
PMEXTTS
PMBMBUSY#
TESTIN#
MCHDETECT
VCC3G
C239
0.1uF
C10
C9
A9
A8
C8
C7
A7
A6
C6
C5
C2
D2
E3
F3
F1
G1
G3
H3
H1
J1
J3
K3
K1
L1
L3
M3
M1
N1
N3
P3
P1
R1
R3
T3
T1
U1
U3
V3
V5
W5
Y10
W10
E12
D12
F14
D14
H14
G14
E14
J14
L14
M15
M13
M12
A15
K16
G16
R35
A35
5
V_1P5_CORE
EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5EXP_A_RXP_7
EXP_A_TXP_6
EXP_A_TXN_6EXP_A_RXP_8
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
GRCOMP
HSYNC
VSYNC
VGA_RED
VGA_GREEN
VGA_BLUE
MCH_DDC_DATA
MCH_DDC_CLK
CK_96M_DREF
CK_96M_DREF#
DACREFSET
EXTTS
R249
24.9R/1%
R206 255R/1%
R219 10K
EXP_A_TXP_0 19
EXP_A_TXN_0 19
EXP_A_TXP_1 19
EXP_A_TXN_1 19
EXP_A_TXP_2 19
EXP_A_TXN_2 19
EXP_A_TXP_3 19
EXP_A_TXN_3 19
EXP_A_TXP_4 19
EXP_A_TXN_4 19
EXP_A_TXP_5 19
EXP_A_TXN_5 19
EXP_A_TXP_6 19
EXP_A_TXN_6 19
EXP_A_TXP_7 19
EXP_A_TXN_7 19
EXP_A_TXP_8 19
EXP_A_TXN_8 19
EXP_A_TXP_9 19
EXP_A_TXN_9 19
EXP_A_TXP_10 19
EXP_A_TXN_10 19
EXP_A_TXP_11 19
EXP_A_TXN_11 19
EXP_A_TXP_12 19
EXP_A_TXN_12 19
EXP_A_TXP_13 19
EXP_A_TXN_13 19
EXP_A_TXP_14 19
EXP_A_TXN_14 19
EXP_A_TXP_15 19
EXP_A_TXN_15 19
DMI_MTP_IRP_0 10
DMI_MTN_IRN_0 10
DMI_MTP_IRP_1 10
DMI_MTN_IRN_1 10
DMI_MTP_IRP_2 10
DMI_MTN_IRN_2 10
DMI_MTP_IRP_3 10
DMI_MTN_IRN_3 10
V_1P5_PCIEXPRESS
HSYNC 28
VSYNC 28
VGA_RED 28
VGA_GREEN 28
VGA_BLUE 28
MCH_DDC_DATA 28
MCH_DDC_CLK 28
CK_96M_DREF 13
CK_96M_DREF# 13
V_2P5_MCH
BSEL
0
C222
0.01uF
Title
Intel Grantsdale-PCI EXPRESS
Size Document Number Rev
Custom
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7033 0B
C317
C315
VCC_DDR
C132 C10U10Y0805
C131 C10U10Y0805
C161 X_C10U10Y0805
VCC_DDR
C136 C10U10Y0805
C219 X_C10U10Y0805
C193 C10U10Y0805
MCH MEMORY DECOUPLING
TABLE
02
1
PSB FREQUENCY
1
0 133 MHZ (533)
01 200 MHZ (800)0
5
832Wednesday, April 07, 2004
X_C10U10Y0805
C10U10Y0805
of
1
AR30
AR25
AR21
AR17
AR13
AR6
AR3
AP8
AN1
AM31
AM29
AM8
AM7
AM6
AM4
AL32
AL22
AL19
AL16
AL13
AL10
AK30
AK28
AK26
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK25
VSS
VSS
VSS
VSS
VSS
VSS
H13
H21
H24
A10
A18
A26
A30
A33
B10
B12
B14
B16
B18
B24
B28
C11
C13
C17
C18
C23
C35
D10
D11
D15
D16
D18
D23
D25
D26
D28
D30
D31
D32
E10
E17
E18
E23
E26
E29
F10
F16
F18
F23
F25
F29
F30
F32
F35
U12D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G23
VSS
VSS
VSS
G26
G27
G28H2H4H5H6H9H10
VSS
VSS
VSS
A3
VSS
A5
VSS
VSS
VSS
VSS
VSS
VSS
B2
VSS
B5
VSS
B6
VSS
B7
VSS
B8
VSS
B9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C1
VSS
C3
VSS
C4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D3
VSS
D4
VSS
D6
VSS
D7
VSS
D8
VSS
D9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E1
VSS
E2
VSS
E4
VSS
E6
VSS
E8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F2
VSS
F4
VSS
F5
VSS
F6
VSS
F8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G2G4G7G8G9
G10
G11
G13
G15
G17
G19
G20
A A
B B
C C
AK23
VSS
VSS
H25
AK20
VSS
VSS
H27
AK17
VSS
VSS
H30
2
AK14
AK11
AK8
AK7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H32
H34J2J4J7J8J9J10
AK6
VSS
VSS
AK4
VSS
VSS
AK1
VSS
VSS
3
AJ35
AJ32
AJ30
AJ27
AJ22
AJ19
AJ16
AJ15
AJ13
AJ10
AJ9
AJ4
AH34
AH32
AH29
AH26
AH23
AH20
AH17
AH14
AH11
AH8
AH6
AH5
AH1
AG29
AG28
AG25
AG22
AG21
AG19
AG18
AG16
AG15
AG13
AG12
AG5
AF35
AF32
AF31
AF30
AF29
AF26
AF21
AF18
AF15
AF12
AF10
AF8
AF6
AF4
AF1
AE32
AE30
AE28
AE24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J15
J16
J17
J18
J20
J23
J30K2K4K5K6K9K10
K11
K14
K20
K24
K26
K28
K31
K32
K35L2L4L7L8L9L11
L13
L15
L16
L17
L18
L20
L21
L22
L24
L27
L30
L32M2M4M5M6M9M17
M20
M24
M25
M27
M29
M34N2N4N7N8N9N10
VSS
VSS
AE23
VSS
VSS
AE21
VSS
VSS
AE20
VSS
VSS
AE18
VSS
VSS
N28
4
AE17
AE15
AE14
AE12
AE9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N30
N32P2P4P5P6P9P27
AE6
VSS
VSS
AE4
VSS
VSS
AD34
VSS
VSS
AD27
VSS
VSS
P29
AD26
AD22
AD19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P31
Intel Grantsdale
AD16
AD13
AD11
AC32
AC31
AC29
AC27
AB35
AB32
AB30
AB28
AA27
AA26
AA10
AA9
AA8
AA7
AA6
AA5
AA4
AA3
AA2
AA1
Y34
Y32
Y31
Y29
Y27
W32
W30
W28
W19
W17
V35
V27
V26
V18
V9
V6
V4
V2
V1
U32
U31
U29
U27
U19
U17
U9
U8
U7
U4
U2
T34
T32
T30
T28
T10
T7
T6
T5
T4
T2
R27
R26
R9
R8
R7
R4
R2
P35
P32
U12_X1
5
X5
MCH
X6
X7
X8
Heatsink
Grantsdale_heatsink
X1
X2
X3
X4
D D
Title
Intel Grantsdale GND
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7033 0B
932Wednesday, April 07, 2004
5
of
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