MSI MS-7030 Schematics
1
Cover Sheet
Block Diagram
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Power & GND
Intel Grantsdale - CPU & Memory Signals
Intel Grantsdale - PCI Express Signals & GND
Intel ICH6 - PCI & DMI & CPU & IRQ
Intel ICH6 - LPC & ATA & USB & GPIO & POWER
LPC I/O - W83627THF
AC97 Audio - ALC 655/ADI1888
LAN - Relatek 8100C/8110S
DDR 1 System Memory 1 & 2
1
2
3
4-5
6-7
8-9
10
11-12
13Clock - ICS954119
14
15
16
17
Version 100
MS-7036
05/18/2004
CPU:
Intel Tejas & Prescott LGA775 Processor
System Chipset:
Intel 915 - GMCH (North Bridge)
Intel ICH6 (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM
AC'97 Codec -- AD1888/ALC 655
LPC Super I/O -- W83627THF
A A
PCI EXPRESS X16 Slot
PCI Slot 1 , 2 & 3
18DDR 1 Termination Resistors
19
20
LAN -- Realtek 8100C/8110S
CLOCK -- ICS954119
1394 -- TI-TSB43AB23
TI-TSB43AB23 IEEE1394 Controller
USB Connectors
ATX , VGA Connetcors & Front Panel
MS-7 ACPI Controller & MS-6 Plus
VRM 10.1 - Intersil HIP 6556 + HIP 6602B +HIP 6601B
CPU Decoupling
FAN & ICH6 IDE Connectors
21
22
23
24
25
26
27
Main Memory:
DDR 1 * 2 (Max 2GB)
Expansion Slots:
PCI2.3 SLOT * 3
PCI EXPRESS X16 SLOT
Intersil PWM:
Controller: HIP6556 3 Phase
Driver: HIP6602B * 1
HIP6601B * 1
1
Gerber out
05/24/2004
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
COVER SHEET
MS-7036
130Monday, June 07, 2004
of
100
VRM 10.1
Intersil 6556
3-Phase PWM
PCI EXPRESS
X16
Connector
Serial
Digital
Video
Out
IDE Primary
SATA 0~3
USB Port 0~7
UltraDMA
33/66/100
SATA
USB
150MB/s
Intel LGA775 Processor
133/200MHz
FSB
915
Grantsdale P/G
DMI
2GB/s
ICH6
64bit DDR
133/166/200MHz
Block Diagram
2 DDR 1
DIMM
Modules
PCI Slot x 3
PCI CNTRL
PCI ADDR/DATA
PCI Bus
RTL
8100C/8110S
LAN
TI TSB43AB23
IEEE-1394
ALC655
Audio Codec
.
.
.
.
.
.
.
.
.
.
.
.
.............
............
.....
....
.....
.....
.....
AC'97 Link
14MHz
Line_In
Line_Out
Mic_In
33MHz@16.5MB/s
Flash
LPC Bus
LPC SIO
Winbond
83627THF
Keyboard
Mouse
Floopy Parallel Serial
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
BLOCK DIAGRAM
MS-7036
of
230Monday, June 07, 2004
100
VTT_OUT_RIGHT
VTT_OUT_RIGHT
H_DBI#[0..3](6)
H_EDRDY#(6)
H_STPCLK#(10)
H_DRDY#(6)
H_DEFER#(6)
RN11B
RN9A
RN11A
RN9C
RN11D
TRMTRIP#(4,10)
H_PROCHOT#(4)
H_IGNNE#(10)
ICH_H_SMI#(10)
C49 X_C0.1U25Y
R68 X_1KR0402
H_D#[0..63](6)
AJ3
AK3
ITP_CLK1
D7#
H_D#7
H_D#6
ITP_CLK0
D6#
H_D#5
D5#
H_D#4
D4#
VCC_VRM_SENSE
VSS_VRM_SENSE
VID2
VID3
VID5
VID4
AM5
AL4
AK4
AL6
AM3
RSVD
VID5#
VID4#
VID3#
GTLREF
PCREQ#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
COMP3
COMP2
COMP1
COMP0
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D3#
D2#
D1#
D0#
TEJAS
H_D#0
H_D#1
H_D#3
H_D#2
VID0
VID1
AL5
VID2#
VID1#
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
RSVD
RSVD
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
DP3#
DP2#
DP1#
DP0#
AM2
VID0#
VID[0..5] (25)
H1
H_BPM#5
AG3
H_BPM#4
AF2
H_BPM#3
AG2
H_BPM#2
AD2
H_BPM#1
AJ1
H_BPM#0
AJ2
H_PCREQ#
G5
H_REQ#4
J6
H_REQ#3
K6
H_REQ#2
M6
H_REQ#1
J5
H_REQ#0
K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3
F24
G24
G26
G27
G25
H_TESTHI2_7
F25
H_TESTHI1
W3
H_TESTHI0
F26
RSVD_AK6
AK6
RSVD_G6
G6
G28
F28
H_RS#2
A3
H_RS#1
F5
H_RS#0
B3
TSET-U3
U3
TSET-U2
U2
TSET-F3
F3
H_COMP3
R1
H_COMP2
G2
H_COMP1
T1
H_COMP0
A13
TSET-J17
J17
TSET-H16
H16
TSET-H15
H15
TSET-J16
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
CPU SIGNAL BLOCK
H_A#[3..31](6)
H_A#7
H_A#6
H_A#8
H_A#5
H_A#4
A9#
A8#
A7#
A6#
A5#
D22#
D21#
D20#
D19#
D18#
D10
E10D7E9F9F8G9D11
H_D#20
H_D#21
H_D#18
H_D#19
H_D#17
H_A#3
A4#
A3#
D17#
D16#
H_D#16
AC2
DBR#
D15#
D14#
C12
H_D#14
H_D#15
AN3
VCC_SENSE
D13#
D12#
B12D8C11
H_D#13
H_D#12
AN4
H_D#11
AN5
AN6
RSVD
RSVD
VSS_SENSE
D11#
D10#
D9#
D8#
B10
A11
A10A7B7B6A5C6A4C5B4
H_D#10
H_D#8
H_D#9
H_A#15
A16#
D29#
G14
H_D#28
H_A#14
A15#
D28#
F14
H_D#27
H_A#13
A14#
D27#
G13
H_D#26
H_A#12
A13#
D26#
E13
H_D#25
H_A#11
A12#
D25#
D13
H_D#24
H_A#10
A11#
D24#
F12
H_D#23
A10#
D23#
F11
H_D#22
H_A#26
H_A#27
H_A#29
H_A#30
H_A#31
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
A33#
A32#
D46#
D45#
E22
H_D#45
A31#
A30#
D44#
D43#
G21
F21
H_D#44
H_D#43
A29#
A28#
D42#
D41#
E21
F20
H_D#41 H_A#28
H_D#42
AF5
A27#
D40#
E19
H_D#39
H_D#40
U8A
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_IERR#(4)
H_FERR#(4,10)
H_INIT#(10)
H_DBSY#(6)
H_TRDY#(6)
H_ADS#(6)
H_LOCK#(6)
H_BNR#(6)
H_HIT#(6)
H_HITM#(6)
H_BPRI#(6)
3 4
1 2
1 2
5 6
7 8
H_A20M#(10)
H_SLP#(10)
LL_ID0(25)
H_PWRGD(4,10)
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
TMPA
TMPAGND
CPU_BOOT
LL_ID0
H_BSL0(4,8,13)
H_BSL1(4,8,13)
H_BSL2(4,8,13)
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
D53#
D52#
B15
C14
H_D#52
H_D#53
D51#
D50#
C15
A14
H_D#51
H_D#50
A35#
D49#
D48#
D17
D20
H_D#49
H_D#48
A34#
D47#
G22
D22
H_D#47
H_D#46
H_A#20
H_A#25
AB4
A26#
D39#
E18
H_D#38
H_A#24
AC5
A25#
D38#
F18
H_D#37
H_A#18
H_A#23
H_A#21
H_A#17
AB5
AA5
AD6
AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4M5P6L5
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
F17
G17
G18
E16
E15
G16
G15
F15
H_D#34
H_D#32
H_D#30
H_D#33
H_D#29
H_D#31
H_D#36
H_D#35
H_A#16
H_A#19
H_A#22
H_A#9
VCC_VRM_SENSE (25)
VSS_VRM_SENSE (25)
CPU_GTLREF
RN9B 8P4R-51R
RN9D 8P4R-51R
RN11C 8P4R-51R
RN5B 8P4R-51R
RN5C 8P4R-51R
R72 62
1 2
3 4
5 6
7 8
R124 62R
R73 62R
R125 62R
R59 X_62R
R76 X_62R
T1
T2
R75 100R1%
R84 100R1%
R69 60.4R1%
R131 60.4R1%
T3
T6
T5
T4
RN3
VID3
VID1
VID2
VID4
VID0
VID5
H_PCREQ# (6)
H_REQ#[0..4] (6)
CK_H_CPU# (13)
CK_H_CPU (13)
H_BR#0 (4,6)
PLACE RESISTORS OUTSIDE SOCKET
CAVITY IF NO ROOM FOR VARIABLE
RESISTOR DON'T PLACE
H_ADSTB#1 (6)
H_ADSTB#0 (6)H_CPURST#(4,6)
H_DSTBP#3 (6)
H_DSTBP#2 (6)
H_DSTBP#1 (6)
H_DSTBP#0 (6)
H_DSTBN#3 (6)
H_DSTBN#2 (6)
H_DSTBN#1 (6)
H_DSTBN#0 (6)
H_NMI (10)
H_INTR (10)
8P4R-680R
1
3
5
7
R56 680R
R54 680R
CPU_GTLREF (4)
RN5A
12
34
78
56
34
56
RN22
8P4R-62
VTT_OUT_LEFT
H_RS#[0..2] (6)
2
4
6
8
VTT_OUT_RIGHT
VTT_OUT_LEFT (4,5)
C61
X_C0.1U25Y
VTT_OUT_RIGHT
TMPAGND
TMPA
C37
C0.1U25Y
VTIN_GND(14)
CPU_TMPA(14)
C31
C0.1U25Y
V_FSB_VTT (4,6,8,12,13,24)
VTT_OUT_RIGHT (4)
R55 0
R53 0
L2 request
CPU_TEMP1
3
2
1
X_D1x3-BK
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - Signals
MS-7036
of
330Monday, June 07, 2004
100
VCCP
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
VCCP
U8B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCP
AF21
VCC
VCC
Y8
V_FSB_VTT
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U25
U26
U27
U28
U29
U30U8V8
W23
W24
W25
W26
W27
W28
W29
W30W8Y23
Y24
Y25
Y26
Y27
Y28
Y29
Y30
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U24
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
VSSA
RSVD
VCC-IOPLL
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTTPWRGD
VTT_OUT
VTT_OUT
VTT_SEL
RSVD/VTT_PKGSENSE
HS1
HS2
HS3
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AN25
AN26
AN29
AN30
AN8
AN9
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30J8J9
K23
K24
K25
K26
K27
K28
K29
K30K8L8
M23
M24
M25
M26
M27
M28
M29
M30M8N23
N24
N25
N26
N27
N28
N29
N30N8P8R8T23
T24
T25
T26
T27
T28
T29
T30T8U23
123
4
HS4
V_FSB_VTT
A23
H_VSSA
B23
D23
V_FSB_VTT
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
F27
F29
TEJAS
VTT_SEL
C144 C10U10Y0805
C113 C10U10Y0805
C91 X_22u-1206_X 5R
CAPS FOR FSB GENERIC
V_FSB_VTT
R133 X_1KR0402
TEJ/PSC
0
1
RSVD
VCC3
VTT_OUT_LEFT CPU_GTLREF
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
R82 49.9R1%
R80
100R1%
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT(3)
VTT_OUT_LEFT(3,5)
VTT_OUT_RIGHT
VTT_OUT_LEFT
R58 62R
R57 X_120R
R78 100R
R89 62R
PLACE AT ICH END OF ROUTE
V_FSB_VTT(3,6,8,12,13,24)
V_FSB_VTT
R317 62R
R316 62R
R135 62R
C56
C0.1U25Y
H_CPURST#
H_PROCHOT#
H_PWRGD
H_BR#0
H_FERR#
H_IERR#
C57
C220P50N
H_CPURST# (3,6)
H_PROCHOT# (3)
H_PWRGD (3,10)
H_BR#0 (3,6)
TRMTRIP# (3,10)
H_FERR# (3,10)
H_IERR# (3)
CPU_GTLREF (3)
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
V_FSB_VTT
remove
C88
C1U10Y
C89
C1U10Y
VTT_OUT_LEFT
VCC5_SB
R41
1K
VID_GD#(24,25)
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTTTRMTRIP#
R45
1K
RN31 8P4R-470R
1
2
3
4
5
6
7
8
R51
680
Q9
2N3904S
H_BSL1 (3,8,13)
H_BSL2 (3,8,13)
H_BSL0 (3,8,13)
V_FSB_VTT
H_VSSA
V_FSB_VTT
1.25V VTT_PWRGOOD
VTT_PWG
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
MSI
Intel LGA775 CPU - Power
MS-7036
of
430Monday, June 07, 2004
100
VTT_OUT_LEFT(3,4)
U8C
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
AA23
VSS
AA24
VSS
AA25
VSS
AA26
VSS
AA27
VSS
AA28
VSS
AA29
VSS
AA3
VSS
AA30
VSS
AA6
VSS
AA7
VSS
AB1
VSS
AB23
VSS
AB24
VSS
AB25
VSS
AB26
VSS
AB27
VSS
AB28
VSS
AB29
VSS
AB30
VSS
AB7
VSS
AC3
VSS
AC6
VSS
AC7
VSS
AD4
VSS
AD7
VSS
AE10
VSS
AE13
VSS
AE16
VSS
AE17
VSS
AE2
VSS
AE20
VSS
AE24
VSS
AE25
VSS
AE26
VSS
AE27
VSS
AE28
VSS
R71 X_60.4R1%
R79 X_60.4R1%
T10
TEST-E23
AC4
AE3
AE4D1D14
E23
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
VSS
VSS
VSS
VSS
VSS
AE29
AE30
AE5
AE7
AF10
AF13
AF16
T7
T9
T8
TEST-E7
TEST-F6
TEST-F23
E24E5E6E7F23F6B13H2J2J3N4P5T2V1W1Y3Y7Y5Y2W7W4V7V6
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG23
AG24
AG7
AH1
AH10
RSVD
RSVD
VSS
VSS
AF17
RSVD
VSS
AF20
RSVD
VSS
AF23
RSVD
VSS
AF24
RSVD
VSS
AF25
RSVD
VSS
AF26
AF27
RSVD
VSS
AF28
RSVD
RSVD
VSS
VSS
AF29
RSVD
VSS
AF3
RSVD
VSS
AF30
RSVD
VSS
AF6
RSVD
VSS
AF7
RSVD
VSS
AG10
AG13
RSVD
VSS
AG16
RSVD
VSS
VSS
AG17
AG20
AH13
VSS
VSS
AH16
VSS
VSS
V30V3V29
VSS
VSS
AH17
AH20
VSS
VSS
V28
V27
V26
V25
V24
V23U7U1T7T6T3R7R5R30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH23
AH24
AH3
AH6
AH7
AJ10
AJ13
AJ16
AJ17
AJ20
R29
R28
R27
R26
R25
R24
R23R2P7P4P30
P29
P28
P27
P26
P25
P24
P23N7N6N3M7M1L7L6L30L3L29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
AL17
AL20
AL23
AL24
VSS
VSS
AL27
VSS
VSS
AL28
VSS
VSS
L28
L27
L26
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL3
AL7
AM1
AM10
AM13
L25
AM16
VSS
VSS
L24
VSS
VSS
AM17
L23K7K5
VSS
VSS
VSS
VSS
AM20
AM23
K2
VSS
VSS
VSS
VSS
VSS
VSS
AM24
AM27
AM28
H3H6H7H8H9J4J7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM4
AM7
AN1
AN10
AN13
AN16
AN17
AN2
AN20
AN23
AN24
AN27
AN28
AN7B1B11
B14
TEJAS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
H28
H29
MSI
Title
Size Document Number Rev
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - GND
MS-7036
Date: Sheet
530Monday, June 07, 2004
of
100
H_A#[3..31](3)
H_REQ#[0..4](3)
H_RS#[0..2](3)
ICH_SYNC#
H_ADSTB#0(3)
H_ADSTB#1(3)
H_PCREQ#(3)
H_BR#0(3,4)
H_BPRI#(3)
H_BNR#(3)
H_LOCK#(3)
H_ADS#(3)
H_HIT#(3)
H_HITM#(3)
H_DEFER#(3)
H_TRDY#(3)
H_DBSY#(3)
H_DRDY#(3)
H_EDRDY#(3)
CK_H_MCH(13)
CK_H_MCH#(13)
PWRGD(11,24)
H_CPURST#(3,4)
PLTRST#(10,13,14,24)
ICH_SYNC#(11)
R288 8.2KR
R181
20R1%
V_FSB_VTT(3,4,8,12,13,24)
V_1P5_CORE
AC11
AB11
Y20
Y19
Y17
Y16
W20
W16
U20
U16
T20
T19
T17
T16
AA13
AA14
AA16
AA18
AA20
AA21
AA22
AA23
AA24
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB24
N13
N14
N15
N16
N18
N20
N21
P13
P14
P15
P17
P19
P21
P22
R13
R14
R15
R16
R18
R20
R22
R23
T13
T14
T15
T21
T23
T24
U13
U14
U22
U24
V13
V14
V15
V21
V23
V24
W13
W14
W22
W24
Y13
Y14
Y15
Y21
Y23
VCCNCTF
VCCNCTF
B35B1A34
VCCNCTF
Y24
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
DINV_0#
DINV_1#
DINV_2#
DINV_3#
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
NC
P_Intel Grantsdale-P
A2
H_A#3 H_D#0
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
HXRCOMP
HXSCOMP
HXSWING
MCH_GTLREF
V_2P5_MCH
HXRCOMP
U12A
H29
HA3#
K29
HA4#
J29
HA5#
G30
HA6#
G32
HA7#
K30
HA8#
L29
HA9#
M30
HA10#
L31
HA11#
L28
HA12#
J28
HA13#
K27
HA14#
K33
HA15#
M28
HA16#
R29
HA17#
L26
HA18#
N26
HA19#
M26
HA20#
N31
HA21#
P26
HA22#
N29
HA23#
P28
HA24#
R28
HA25#
N33
HA26#
T27
HA27#
T31
HA28#
U28
HA29#
T26
HA30#
T29
HA31#
J31
HAD_STB0#
N27
HAD_STB1#
E31
HPCREQ#
R33
BREQ0#
E30
BPRI#
M35
BNR#
L33
HLOCK#
M31
ADS#
F33
HREQ0#
E32
HREQ1#
H31
HREQ2#
G31
HREQ3#
F31
HREQ4#
L34
HIT#
N35
HITM#
J35
DEFER#
N34
HTRDY#
L35
DBSY#
M32
DRDY#
P33
HEDRDY#
K34
RS0#
P34
RS1#
J32
RS2#
M23
HCLKP
M22
HCLKN
AG7
PWROK
G24
CPURST#
AF7
RSTIN#
M14
ICH_SYNC#
B23
HDRCOMP
D24
HDSCOMP
A23
HDSWING
A24
HDVREF
R171 60.4R1%
C159
X_C2.2P50N
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
AJ21
HXSCOMP
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRDNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
AK21
AK24
AL21
AL20
AK18
AJ24
AJ23
AJ18
AJ20
V31
V30
U30
V32
Y30
AB29
R31
R30
AA31
AA30
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
N12
N22
N23
N24
P12
P23
P24
R12
R24
T12
U12
V12
W12
Y12
AA12
AB12
AC23
AC24
AN19
AL28
AJ14
AH24
AG6
AD30
P30
L19
L12
K12
J12
H17
H15
H12
G12
F24
F12
E16
C16
AR35
AR34
AR2
AR1
AP35
AP1
V_FSB_VTT
R167
49.9R1%
R162
100RST
GTLREF VOLTAGE SHOULD BE 0.67*VTT=0.8V
V_FSB_VTT
MCH_GTLREF
C149
C0.1U25Y
C155
X_C220P16X0402
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/4*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT
R177
301RST
R179
102RST
HXSWING
C164
C10000P50Y5
CAPS SHOULD BE PLACED NEAR MCH PIN
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
J33
H_D#1
H33
H_D#2
J34
H_D#3
G35
H_D#4
H35
H_D#5
G34
H_D#6
F34
H_D#7
G33
H_D#8
D34
H_D#9
C33
H_D#10
D33
H_D#11
B34
H_D#12
C34
H_D#13
B33
H_D#14
C32
H_D#15
B32
H_D#16
E28
H_D#17
C30
H_D#18
D29
H_D#19
H28
H_D#20
G29
H_D#21
J27
H_D#22
F28
H_D#23
F27
H_D#24
E27
H_D#25
E25
H_D#26
G25
H_D#27
J25
H_D#28
K25
H_D#29
L25
H_D#30
L23
H_D#31
K23
H_D#32
J22
H_D#33
J24
H_D#34
K22
H_D#35
J21
H_D#36
M21
H_D#37
H23
H_D#38
M19
H_D#39
K21
H_D#40
H20
H_D#41
H19
H_D#42
M18
H_D#43
K18
H_D#44
K17
H_D#45
G18
H_D#46
H18
H_D#47
F17
H_D#48
A25
H_D#49
C27
H_D#50
C31
H_D#51
B30
H_D#52
B31
H_D#53
A31
H_D#54
B27
H_D#55
A29
H_D#56
C28
H_D#57
A28
H_D#58
C25
H_D#59
C26
H_D#60
D27
H_D#61
A27
H_D#62
E24
H_D#63
B25
H_DBI#0
E34
H_DBI#1
J26
H_DBI#2
K19
H_DBI#3
B26
E33
E35
H26
F26
J19
F19
B29
C29
Title
Size Document Number Rev
Date: Sheet
MSI
H_DSTBP#0 (3)
H_DSTBN#0 (3)
H_DSTBP#1 (3)
H_DSTBN#1 (3)
H_DSTBP#2 (3)
H_DSTBN#2 (3)
H_DSTBP#3 (3)
H_DSTBN#3 (3)
MICRO-STAR INt'L CO., LTD.
H_D#[0..63] (3)
H_DBI#[0..3] (3)
Intel Grantsdale - CPU Signals
MS-7036
630Monday, June 07, 2004
of
100
SCS_A#0(17,18)
SCS_A#1(17,18)
RAS_A#(17,18)
CAS_A#(17,18)
WE_A#(17,18)
MAA_A[0..13](17,18)
SBS_A0(17,18)
SBS_A1(17,18)
DQS_A[0..7](17,18)
P_DDR0_A(17)
N_DDR0_A(17)
P_DDR1_A(17)
N_DDR1_A(17)
P_DDR2_A(17)
N_DDR2_A(17)
MCH_VREF_A
PLACE 0.1UF CAP CLOSE TO MCH
SCS_A#0
SCS_A#1
RAS_A#
CAS_A#
WE_A#
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
SBS_A1
DQS_A0
DQS_A1
DQS_A2
DQS_A3
DQS_A4
DQS_A5
DQS_A6
DQS_A7
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
SM_XSLEWIN
MCH_VREF_A
SMPCOMP_P
SMPCOMP_N
SMPCOMP_P
DATA_A[0..63](17,18)
AM34
AL35
AK34
AL33
AN29
AL34
AP31
AN22
AP22
AN21
AP21
AM21
AP19
AR20
AN16
AN18
AM15
AN23
AP15
AP13
AB33
AP33
AR24
AR28
AR29
AN28
AP26
AR23
AF17
AG17
AM30
AL29
AG35
AG33
AA34
AA35
AM24
AN25
AB34
AC33
AP25
AN26
AC35
AC34
AN31
AH15
AE16
AJ12
AK12
C304
C0.1U25Y
AG1
AG2
AP7
AR7
AN2
AN3
AM2
AM3
AE7
AG8
AG4
AE5
AL3
AL2
U34
U35
AF5
DATA_B[0..63](17,18)
VCC_DDR
U12B
SACS0#
SACS1#
SACS2#
SACS3#
SARAS#
SACAS#
SAWE#
SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13
RSV
RSV
RSV
RSV
SABA0
SABA1
RSV
SADQS0
RSV
SADQS1
RSV
SADQS2
RSV
SADQS3
RSV
SADQS4
RSV
SADQS5
RSV
SADQS6
RSV
SADQS7
RSV
SACK0
SACK0#
SACK1
SACK1#
SACK2
SACK2#
SACK3
SACK3#
SACK4
SACK4#
SACK5
SACK5#
RSV
RSV_TP1
RSV_TP0
SMXSLEWIN
SMXSLEWOUT
SMVREF0
SRCOMP1
SRCOMP0
RSV
RSV
R251 80.6R1%R253 80.6R1%
C266
C0.1U25Y
DATA_A2
DATA_A0
DATA_A1
AE3
AF3
AH2
SADQ0
SADQ1
AH7
DATA_B0
DATA_A4
DATA_A3
AJ2
AE2
SADQ2
SADQ3
SBDQ0
SBDQ1
AJ6
AL5
DATA_B1
DATA_B2
DATA_A6
DATA_A5
AE1
AG3
SADQ4
SADQ5
SBDQ2
SBDQ3
AN6
AG9
DATA_B4
DATA_B3
DATA_A8
DATA_A7
AH3
AJ1
SADQ6
SADQ7
SADQ8
SBDQ4
SBDQ5
SBDQ6
AH4
AM5
DATA_B5
DATA_B6
SMPCOMP_N
DATA_A10
DATA_A11
DATA_A9
AK2
AN4
AP4
SADQ9
SADQ10
SBDQ7
SBDQ8
AL6
AJ7
AL7
DATA_B9
DATA_B7
DATA_B8
DATA_A13
DATA_A12
AJ3
AK3
SADQ11
SADQ12
SADQ13
SBDQ9
SBDQ10
SBDQ11
AF11
AE11
DATA_B10
DATA_B11
DATA_A16
DATA_A14
DATA_A15
AP2
AP3
AP5
SADQ14
SADQ15
SADQ16
SBDQ12
SBDQ13
SBDQ14
AJ8
AL8
AG10
DATA_B14
DATA_B12
DATA_B13
DATA_A17
DATA_A19
DATA_A18
AR5
AN8
AP9
SADQ17
SADQ18
SADQ19
SBDQ15
SBDQ16
SBDQ17
AG11
AE13
AF13
DATA_B15
DATA_B17
DATA_B16
DATA_A21
DATA_A20
DATA_A22
AN5
AP6
AR8
SADQ20
SADQ21
SADQ22
SBDQ18
SBDQ19
SBDQ20
AG14
AD14
AD12
DATA_B18
DATA_B19
DATA_B20
DATA_A23
DATA_A25
DATA_A24
AN9
AK16
AL17
SADQ23
SADQ24
SADQ25
SBDQ21
SBDQ22
SBDQ23
AH12
AF14
AD15
DATA_B21
DATA_B23
DATA_B22
DATA_A28
DATA_A26
DATA_A27
AD17
AF19
AF16
SADQ26
SADQ27
SADQ28
SBDQ24
SBDQ25
SBDQ26
AD18
AK19
AE22
DATA_B24
DATA_B26
DATA_B25
DATA_A30
DATA_A29
DATA_A31
AJ17
AE19
AH18
SADQ29
SADQ30
SADQ31
SBDQ27
SBDQ28
SBDQ29
AH21
AL18
AH19
DATA_B27
DATA_B29
DATA_B28
DATA_A34
DATA_A33
DATA_A32
AH27
AK27
AN30
SADQ32
SADQ33
SADQ34
SBDQ30
SBDQ31
SBDQ32
AF22
AD21
AF23
DATA_B31
DATA_B32
DATA_B30
DATA_A35
DATA_A37
DATA_A36
AK31
AL27
AJ28
SADQ35
SADQ36
SADQ37
SBDQ33
SBDQ34
SBDQ35
AF25
AL25
AJ26
DATA_B35
DATA_B34
DATA_B33
DATA_A39
DATA_A40
DATA_A38
AL30
AL31
AJ34
SADQ38
SADQ39
SADQ40
SBDQ36
SBDQ37
SBDQ38
AD23
AF24
AJ25
DATA_B37
DATA_B38
DATA_B36
DATA_A42
DATA_A41
DATA_A43
AH35
AG32
AF34
SADQ41
SADQ42
SADQ43
SBDQ39
SBDQ40
SBDQ41
AL26
AJ29
AJ31
DATA_B41
DATA_B39
DATA_B40
DATA_A45
DATA_A46
DATA_A44
AJ33
AH33
AF33
SADQ44
SADQ45
SADQ46
SBDQ42
SBDQ43
SBDQ44
AG30
AG31
AK33
DATA_B42
DATA_B44
DATA_B43
DATA_A49
DATA_A48
DATA_A47
AE33
AE35
AE34
SADQ47
SADQ48
SADQ49
SBDQ45
SBDQ46
SBDQ47
AK32
AG27
AF28
DATA_B47
DATA_B45
DATA_B46
DATA_A50
DATA_A52
DATA_A51
Y33
W34
AD31
SADQ50
SADQ51
SADQ52
SBDQ48
SBDQ49
SBDQ50
AE31
AF27
AB27
DATA_B50
DATA_B48
DATA_B49
SCKE_A1(17,18)
SCKE_A0(17,18)
DATA_A54
DATA_A53
DATA_A55
AD35
AA32
Y35
SADQ53
SADQ54
SADQ55
SBDQ51
SBDQ52
SBDQ53
AB26
AE29
AE27
DATA_B51
DATA_B52
DATA_B53
DQM_A[0..7](17,18)
DATA_A57
DATA_A56
DATA_A58
V34
V33
R32
SADQ56
SADQ57
SADQ58
SBDQ54
SBDQ55
SBDQ56
AC28
AC26
AA29
DATA_B55
DATA_B54
DATA_B56
SCKE_B0(17,18)
SCKE_B1(17,18)
DQM_B[0..7](17,18)
DATA_A61
DATA_A59
DATA_A60
R34
W35
W33
SADQ59
SADQ60
SADQ61
SBDQ57
SBDQ58
SBDQ59
W29
U26
V29
DATA_B58
DATA_B57
DATA_B59
DATA_A62
DATA_A63
T33
T35
SADQ62
SADQ63
SBDQ60
SBDQ61
SBDQ62
Y26
AA28
W26
DATA_B62
DATA_B60
DATA_B61
SCKE_A0
SCKE_A1
AL12
AN11
AP11
SACKE0
SACKE1
SACKE2
SBDQ63
SBCKE0
V28
AN10
DATA_B63
SCKE_B0
AR11
SACKE3
SBCKE1
AM9
AP10
SCKE_B1
DQM_A1
DQM_A0
AF2
AL1
SADM0
SBCKE2
SBCKE3
AR9
DQM_A3
DQM_A2
AN7
AH16
SADM1
SADM2
SBDM0
AJ5
AH9
DQM_B0
DQM_B1
DQM_A4
AK29
SADM3
SADM4
SBDM1
SBDM2
AH13
DQM_B2
DQM_A5
DQM_A7
DQM_A6
AG34
AA33
U33
SADM5
SADM6
SMYSLEWOUT
SBDM3
SBDM4
AG20
AG24
AH31
DQM_B5
DQM_B3
DQM_B4
SBCS0#
SBCS1#
SBCS2#
SADM7
SBCS3#
SBRAS#
SBCAS#
SBMA10
SBMA11
SBMA12
SBMA13
SBDQS0
SBDQS1
SBDQS2
SBDQS3
SBDQS4
SBDQS5
SBDQS6
SBDQS7
SBCK0#
SBCK1#
SBCK2#
SBCK3#
SBCK4#
SBCK5#
RSV_TP3
RSV_TP2
SMYSLEWIN
SMVREF1
SBDM5
SBDM6
SBDM7
AD24
W31
DQM_B7
DQM_B6
AP34
AN34
AN33
AM33
AP27
AN27
AR27
SBWE#
AM18
SBMA0
AP18
SBMA1
AN17
SBMA2
AR16
SBMA3
AR15
SBMA4
AN15
SBMA5
AP17
SBMA6
AL15
SBMA7
AP14
SBMA8
AN13
SBMA9
AN20
AR12
AM12
AD32
AN32
RSV
AP29
RSV
AP30
RSV
AP32
RSV
AM27
SBBA0
AR19
SBBA1
AP23
RSV
AK5
AL4
RSV
AK10
AH10
RSV
AK13
AL14
RSV
AD20
AF20
RSV
AH25
AG26
RSV
AH28
AH30
RSV
AB31
AC30
RSV
W27
Y28
RSV
AH22
SBCK0
AG23
AL11
SBCK1
AJ11
AE26
SBCK2
AE25
AL23
SBCK3
AK22
AK9
SBCK4
AL9
AD29
SBCK5
AD28
AL24
RSV
AK15
AN14
AF9
AE10
AE8
P_Intel Grantsdale-P
SCS_B#0
SCS_B#1
RAS_B#
CAS_B#
WE_B#
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
SBS_B0SBS_A0
SBS_B1
DQS_B0
DQS_B1
DQS_B2
DQS_B3
DQS_B4
DQS_B5
DQS_B6
DQS_B7
P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B
SM_YSLEWIN
MCH_VREF_B
PLACE 0.1UF CAP CLOSE TO MCH
SCS_B#0 (17,18)
SCS_B#1 (17,18)
RAS_B# (17,18)
CAS_B# (17,18)
WE_B# (17,18)
SBS_B0 (17,18)
SBS_B1 (17,18)
P_DDR0_B (17)
N_DDR0_B (17)
P_DDR1_B (17)
N_DDR1_B (17)
P_DDR2_B (17)
N_DDR2_B (17)
C265
C0.1U25Y
MAA_B[0..13] (17,18)
DQS_B[0..7] (17,18)
VCC_DDR
R249 1KR1%
Title
Size Document Number Rev
Date: Sheet
U12_X1
R248 0R
MCH_VREF_A
R256
1KR1%
MSI
MICRO-STAR INt'L CO., LTD.
Intel Grantsdale - Memory Signals
X5
MCH
X6
X7
X8
Heatsink
V_Grantsdale_heatsink
MS-7036
X1
X2
X3
X4
MCH_VREF_B
730Monday, June 07, 2004
100
of
V_1P5_CORE
CK_PE_100M_MCH(13)
CK_PE_100M_MCH#(13)
SDVO_CTRL_DATA(19)
SDVO_CTRL_CLK(19)
H_BSL0
H_BSL0(3,4,13)
H_BSL1 BSEL1
H_BSL1(3,4,13)
H_BSL2 BSEL2
H_BSL2(3,4,13)
CP14
FSB GENERIC DECOUPLING
X_COPPER
L9 X_10U100m_0805
X_C0.22U16Y
EXP_A_RXP_0(19)
EXP_A_RXN_0(19)
EXP_A_RXP_1(19)
EXP_A_RXN_1(19)
EXP_A_RXP_2(19)
EXP_A_RXN_2(19)
EXP_A_RXP_3(19)
EXP_A_RXN_3(19)
EXP_A_RXP_4(19)
EXP_A_RXN_4(19)
EXP_A_RXP_5(19)
EXP_A_RXN_5(19)
EXP_A_RXP_6(19)
EXP_A_RXN_6(19)
EXP_A_RXP_7(19)
EXP_A_RXN_7(19)
EXP_A_RXP_8(19)
EXP_A_RXN_8(19)
EXP_A_RXP_9(19)
EXP_A_RXN_9(19)
EXP_A_RXP_10(19)
EXP_A_RXN_10(19)
EXP_A_RXP_11(19)
EXP_A_RXN_11(19)
EXP_A_RXP_12(19)
EXP_A_RXN_12(19)
EXP_A_RXP_13(19)
EXP_A_RXN_13(19)
EXP_A_RXP_14(19)
EXP_A_RXN_14(19)
EXP_A_RXP_15(19)
EXP_A_RXN_15(19)
DMI_ITP_MRP_0(10)
DMI_ITN_MRN_0(10)
DMI_ITP_MRP_1(10)
DMI_ITN_MRN_1(10)
DMI_ITP_MRP_2(10)
DMI_ITN_MRN_2(10)
DMI_ITP_MRP_3(10)
DMI_ITN_MRN_3(10)
R189 10KR
R191 10KR
R199 10KR
R197 x_1KR1%
R192 X_1KR1%
V_1P5_CORE
V_2P5_MCH
V_2P5_DAC_FILTERED(23)
V_FSB_VTT(3,4,6,12,13,24)
C201
X_C10U10Y0805
EXP_A_TXP_[0..15] (19)
EXP_A_TXN_[0..15] (19)
EXP_A_RXP_[0..15] (19)
EXP_A_RXN_[0..15] (19)
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXN_7 EXP_A_TXP_6
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
SDVO_CTRL_DATA
SDVO_CTRL_CLK
BSEL0
MTYPE
EXP_SLR
VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
C167
C0.1U25Y
VCCA_MPLL
C190
U12C
E11
EXPARXP0
F11
EXPARXN0
J11
EXPARXP1
H11
EXPARXN1
F9
EXPARXP2
E9
EXPARXN2
F7
EXPARXP3
E7
EXPARXN3
B3
EXPARXP4
B4
EXPARXN4
D5
EXPARXP5
E5
EXPARXN5
G6
EXPARXP6
G5
EXPARXN6
H8
EXPARXP7
H7
EXPARXN7
J6
EXPARXP8
J5
EXPARXN8
K8
EXPARXP9
K7
EXPARXN9
L6
EXPARXP10
L5
EXPARXN10
P10
EXPARXP11
R10
EXPARXN11
M8
EXPARXP12
M7
EXPARXN12
N6
EXPARXP13
N5
EXPARXN13
P7
EXPARXP14
P8
EXPARXN14
R6
EXPARXP15
R5
EXPARXN15
U5
DMI RXP0
U6
DMI RXN0
T9
DMI RXP1
T8
DMI RXN1
V7
DMI RXP2
V8
DMI RXN2
V10
DMI RXP3
U10
DMI RXN3
A11
GCLKINP
B11
GCLKINN
K13
SDVOCTRLDATA
J13
SDVOCTRLCLK
H16
BSEL0
E15
BSEL1
D17
BSEL2
M16
RSV
F15
RSV
C15
MTYPE
A16
EXP_SLR
B15
RSV
C14
RSV
K15
RSV
L10
VCC
M10
VSS
A17
VCCAHPLL
B17
VCCAMPLL
A12
VCCADPLLA
B13
VCCADPLLB
A14
VCCA3GPLL
A13
VCCHV
E13
VCCACRTDAC
D13
VCCACRTDAC
F13
VSSACRTDAC
P_Intel Grantsdale-P
V_FSB_VTT
C180
C0.1U25Y
V_1P5_CORE V_1P5_CORE
C195
C0.1U25Y
V_1P5_CORE
AD10
AD9
AD8
VCC
VCC
VTT
H22
G22
C181
C0.1U25Y
X_COPPER
L13 X_10U100m_0805
VCC
VTT
AD7
VCC
VTT
G21
CP17
AD6
F22
VCC
VTT
AD5
F21
VCC
VTT
AD4
F20
VCC
VTT
AD3
E22
VCC
VTT
AD2
VCC
VTT
E21
AD1
E20
VCC
VTT
AC10
VCC
VTT
E19
AC9
AC8
AC7
AC6
VCC
VCC
VCC
VTT
VTT
VTT
D22
D21
D20
D19
VCCA_DPLLA
C232
X_C10U10Y0805
VCC
VTT
AC5
C22
VCC
VTT
AC4
C21
VCC
VTT
AC3
C20
VCC
VTT
AC2
C19
VCC
VTT
AC1
B22
AB10
VCC
VTT
B21
AB9
AB8
VCC
VCC
VCC
VTT
VTT
VTT
B20
B19
C233
C0.1U25Y
AB7
AB6
AB5
AB4
AB3
AB2
AB1
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VSSNCTF
A22
A21
A20
A19
AC25
VCC_DDR
W18
V19
V17
U18
AR33
AR31
VCC
VCC
VCC
VCC
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
AB25
AA25
AA11
Y25
Y18
Y11
W25
W11
L10 10U100m_0805
AR26
AR22
AR18
VCCSM
VCCSM
VSSNCTF
VSSNCTF
V25
V20
V16
AR14
AR10
AP28
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
V11
U25
U11
R198 0R
AP24
AP20
AP16
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
T25
T18
T11
AP12
AN35
AM32
AM28
AM26
AM25
AM23
AM22
AM20
AM19
AM17
AM16
AM14
AM13
AM11
AM10
AK35W1W2W3W4W6W7W8W9Y1Y2Y3Y4Y5Y6Y7Y8
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VSSNCTF
VSSNCTF
U23
V22
W15
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
W21
W23
Y22
C231
C10U10Y0805
VCC3G
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
R25
R11
P25
P11
N25
AD25
N11
M11
AA15
AA17
AA19
N17
N19
P16
P18
P20
R17
R19
R21
T22
U15
U21
VCCA_GPLL V_2P5_DAC_FILTERED
C214
X_C10U10Y0805
C216
C0.1U25Y
V_2P5_MCH
L12 0.1U50m
VCC3G
VCC3G
VCC3G
EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12
EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15
EXPACOMPO
EXPACOMPI
CRTGREENB
CRTDDCDATA
CRTDDCCLK
DREFCLKINP
DREFCLKINN
PMBMBUSY#
MCHDETECT
V_1P5_PCI
Y9
VCC3G
VCC3G
VCC3G
EXPATXP0
EXPATXN0
EXPATXP1
EXPATXN1
EXPATXP2
EXPATXN2
EXPATXP3
EXPATXN3
EXPATXP4
EXPATXN4
EXPATXP5
EXPATXN5
EXPATXP6
EXPATXN6
EXPATXP7
EXPATXN7
EXPATXP8
EXPATXN8
EXPATXP9
EXPATXN9
DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3
CRTHSYNC
CRTVSYNC
CRTRED
CRTGREEN
CRTBLUE
CRTREDB
CTRBLUEB
CRTIREF
PMEXTTS
TESTIN#
C229
C0.1U25Y
EXPRESS
C10
C9
A9
A8
C8
C7
A7
A6
C6
C5
C2
D2
E3
F3
F1
G1
G3
H3
H1
J1
J3
K3
K1
L1
L3
M3
M1
N1
N3
P3
P1
R1
R3
T3
T1
U1
U3
V3
V5
W5
Y10
W10
E12
D12
F14
D14
H14
G14
E14
J14
L14
M15
M13
M12
A15
K16
G16
R35
A35
EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5EXP_A_RXP_7
EXP_A_TXN_6EXP_A_RXP_8
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
GRCOMP
HSYNC
VSYNC
VGA_RED_C
VGA_GREEN_C
VGA_BLUE_C
MCH_DDC_DATA
MCH_DDC_CLK
CK_96M_DREF
CK_96M_DREF#
DACREFSET
EXTTS
C212
C10000P50Y5
EXP_A_TXP_0 (19)
EXP_A_TXN_0 (19)
EXP_A_TXP_1 (19)
EXP_A_TXN_1 (19)
EXP_A_TXP_2 (19)
EXP_A_TXN_2 (19)
EXP_A_TXP_3 (19)
EXP_A_TXN_3 (19)
EXP_A_TXP_4 (19)
EXP_A_TXN_4 (19)
EXP_A_TXP_5 (19)
EXP_A_TXN_5 (19)
EXP_A_TXP_6 (19)
EXP_A_TXN_6 (19)
EXP_A_TXP_7 (19)
EXP_A_TXN_7 (19)
EXP_A_TXP_8 (19)
EXP_A_TXN_8 (19)
EXP_A_TXP_9 (19)
EXP_A_TXN_9 (19)
EXP_A_TXP_10 (19)
EXP_A_TXN_10 (19)
EXP_A_TXP_11 (19)
EXP_A_TXN_11 (19)
EXP_A_TXP_12 (19)
EXP_A_TXN_12 (19)
EXP_A_TXP_13 (19)
EXP_A_TXN_13 (19)
EXP_A_TXP_14 (19)
EXP_A_TXN_14 (19)
EXP_A_TXP_15 (19)
EXP_A_TXN_15 (19)
DMI_MTP_IRP_0 (10)
DMI_MTN_IRN_0 (10)
DMI_MTP_IRP_1 (10)
DMI_MTN_IRN_1 (10)
DMI_MTP_IRP_2 (10)
DMI_MTN_IRN_2 (10)
DMI_MTP_IRP_3 (10)
DMI_MTN_IRN_3 (10)
R246
24.9RST
R441 0R
R442 0R
R443 0R
MCH_DDC_DATA (23)
MCH_DDC_CLK (23)
CK_96M_DREF (13)
CK_96M_DREF# (13)
R200 255R1%
R210 10KR
VSYNC
HSYNC
V_1P5_PCIEXPRESS
VGA_RED
VGA_GREEN
VGA_BLUE
V_2P5_MCH
VCC5
1
2
VCC5
13
12
V_1P5_CORE
C314
C309
VCC_DDR
C128 C10U10Y0805
C127 C10U10Y0805
C158 C10U10Y0805
VCC_DDR
C131 C10U10Y0805
C207 C10U10Y0805
C184 C10U10Y0805
MCH MEMORY DECOUPLING
VGA_RED (23)
VGA_GREEN (23)
VGA_BLUE (23)
147
U9A
VSYNC_5V
3
G_ACT08DR_SOIC14
147
U9D
HSYNC_5V
11
G_ACT08DR_SOIC14
VCC5
4
5
VCC5
10
9
X_C10U10Y0805
C10U10Y0805
147
U9B
6
G_ACT08DR_SOIC14
147
U9C
8
G_ACT08DR_SOIC14
VSYNC_5V (23)
HSYNC_5V (23)
CP15
X_COPPER
V_1P5_CORE V_1P5_CORE
L11 X_10U100m_0805
VCCA_DPLLB
C223
X_C10U10Y0805
C222
C0.1U25Y
CP13
X_COPPER
L8 X_10U100m_0805
VCCA_HPLL
C183
X_C10U10Y0805
C188
C0.1U25Y
V_1P5_CORE
CP19
X_COPPER
L14 X_90nH
V_1P5_PCIEXPRESS
C264
C305
C10U10Y0805
X_C10U10Y0805
BSEL
10PSB FREQUENCY
0 133 MHZ (533)
TABLE
02
1
01 200 MHZ (800)0
To prevent Grantsdale VSYNC and HSYNC signal level issue
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Grantsdale PCI-Express & RBG Signals
MS-7036
830Monday, June 07, 2004
of
100
A10
A18
A26
A30
A33
B10
B12
B14
B16
B18
B24
B28
C11
C13
C17
C18
C23
C35
D10
D11
D15
D16
D18
D23
D25
D26
D28
D30
D31
D32
E10
E17
E18
E23
E26
E29
AR30
AR25
AR21
AR17
AR13
AR6
AR3
AP8
AN1
AM31
AM29
AM8
AM7
AM6
AM4
AL32
AL22
AL19
AL16
AL13
AL10
AK30
AK28
AK26
AK25
AK23
AK20
AK17
AK14
AK11
AK8
AK7
AK6
AK4
AK1
AJ35
AJ32
AJ30
AJ27
AJ22
AJ19
AJ16
AJ15
AJ13
AJ10
AJ9
AJ4
AH34
AH32
AH29
AH26
AH23
AH20
AH17
AH14
AH11
AH8
AH6
AH5
AH1
AG29
AG28
AG25
AG22
AG21
AG19
AG18
AG16
AG15
AG13
AG12
AG5
AF35
AF32
AF31
AF30
AF29
AF26
AF21
AF18
AF15
AF12
AF10
AF8
AF6
AF4
AF1
AE32
AE30
AE28
AE24
AE23
AE21
AE20
AE18
AE17
AE15
AE14
AE12
AE9
AE6
AE4
AD34
AD27
AD26
AD22
VSS
VSS
VSS
VSS
VSS
VSS
AD19
VSS
VSS
VSS
VSS
AD16
VSS
AD13
VSS
AD11
VSS
AC32
VSS
AC31
VSS
AC29
VSS
AC27
VSS
AB35
VSS
AB32
VSS
AB30
VSS
AB28
VSS
AA27
VSS
AA26
VSS
AA10
VSS
AA9
VSS
AA8
VSS
AA7
VSS
AA6
VSS
AA5
VSS
AA4
VSS
AA3
VSS
AA2
VSS
AA1
VSS
Y34
VSS
Y32
VSS
Y31
VSS
Y29
VSS
Y27
VSS
W32
VSS
W30
VSS
W28
VSS
W19
VSS
W17
VSS
V35
VSS
V27
VSS
V26
VSS
V18
VSS
V9
VSS
V6
VSS
V4
VSS
V2
VSS
V1
VSS
U32
VSS
U31
VSS
U29
VSS
U27
VSS
U19
VSS
U17
VSS
U9
VSS
U8
VSS
U7
VSS
U4
VSS
U2
VSS
T34
VSS
T32
VSS
T30
VSS
T28
VSS
T10
VSS
T7
VSS
T6
VSS
T5
VSS
T4
VSS
T2
VSS
R27
VSS
R26
VSS
R9
VSS
R8
VSS
R7
VSS
R4
VSS
R2
VSS
P35
VSS
P32
VSS
VSS
VSS
P29
P31
U12D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N28
N30
N32P2P4P5P6P9P27
VSS
VSS
VSS
VSS
A3
VSS
A5
VSS
VSS
VSS
VSS
VSS
VSS
B2
VSS
B5
VSS
B6
VSS
B7
VSS
B8
VSS
B9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C1
VSS
C3
VSS
C4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D3
VSS
D4
VSS
D6
VSS
D7
VSS
D8
VSS
D9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E1
VSS
E2
VSS
E4
VSS
E6
VSS
E8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F2
VSS
F4
VSS
F5
VSS
F6
VSS
F8
VSS
F10
VSS
F16
VSS
F18
VSS
F23
VSS
F25
VSS
F29
VSS
F30
VSS
F32
VSS
F35
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G2G4G7G8G9
G10
G11
G13
G15
G17
G19
G20
G23
G26
G27
G28H2H4H5H6H9H10
H13
H21
H24
H25
H27
H30
H32
H34J2J4J7J8J9J10
J15
J16
J17
J18
J20
J23
J30K2K4K5K6K9K10
K11
K14
K20
K24
K26
K28
K31
K32
K35L2L4L7L8L9L11
L13
L15
L16
L17
L18
L20
L21
L22
L24
L27
L30
L32M2M4M5M6M9M17
M20
M24
M25
M27
P_Intel Grantsdale-P
M29
M34N2N4N7N8N9N10
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Grantsdale - GND
MS-7036
of
930Monday, June 07, 2004
100
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