8
7
6
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Cover Sheet
Block Diagram
D D
Power Flow & Clock Flow Charts
mPGA478-B INTEL CPU Socket
MS-6576 Ver : 0A
ATI RS200 + SB200 CHIPSET
Willamette/Northwood 478pin mPGA-B Processor Schematics
ATI RS200 North Bridge
DDR Slots
DDR Termination & VGA Connector
AGP Slot
ATI SB200 South Bridge
CPU:
C C
Willamette/Northwood mPGA-478B Processor
PCI Slots
LAN Controller
System Chipset:
ATI RS200 (North Bridge) + SB200 (South Bridge)
RJ45 Connector & P/S 2 Connector
IDE Connectors
USB Connectors
On Board Chipset:
LPC Super I/O -- W83697HF
Realtek Lan -- RTL8101L
B B
Expansion Slots:
AGP2.0 SLOT * 1
DDR DIMM * 2
PCI SLOT * 3
CNR SLOT * 1
AC'97 CODEC
Audio Connectors
CNR Conn. & Fan Conn. & Flash ROM
LPC Super I/O (W83627HF)
Printer Port & Serial Ports
VRM 9.X
ACPI Controller & Power Regulators
ATX Power Connector
1
2
3
4 - 5
6 - 9
10
11
12
13 - 15
16
17
18
19
20
21
22
23
24
25
26
27
28
Front Panels
Decoupling Capacitors
History
A A
MICRO-STAR INT'L CO.,LTD.
Title
COVER PAGE
Size Document Number Rev
<Doc> 0A
8
7
6
5
4
3
Date: Sheet of
2
29
30
31
1 30 Thursday, March 28, 2002
1
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D D
4
3
2
1
System Block Diagram
SOCKET-478
Host Bus
VGA Connector
TV-out Connector
C C
AGP Slot
VGA Signal
TV Signal
AGP Bus
ATI RS200
In-die VGA
A-Link
Lan
PCI SLOT 3
PCI SLOT 2
PCI SLOT 1
DDR SDRAM
DIMM 1
AC'97
Audio Codec
Rtt
DIMM 2
Analog In
Analog Out
CNR Slot
ATI SB200
IDE 1
B B
IDE 2
KEYBOARD
/MOUSE
FAN
1
FAN
2
Flash Rom
PS/2
LPC Super I/O
FAN CONTROL
Clock Gen.
LPC Bus
USB 0
USB 1
VOLTAGE MONITOR
TEMPERATURE MONITOR
USB 2
USB 3
USB 4
USB 5
A A
5
GPIOs
4
IR/CIR
GAME/MIDI
3
SERIAL
PARALLEL
FLOPPY
MICRO-STAR INT'L CO.,LTD.
Title
System Block Diagram
Size Document Number Rev
<Doc> 0A
2
Date: Sheet of
2 30 Thursday, March 28, 2002
1
5
4
3
2
1
Power Flow
VCC5
D D
C C
12V
VCC3
VRM
MS-5
OP + MOS
VCPU
VCCAGP
VCC25
A2VDD
AVDDCK
FB
RS200
VDD_5V
VCPU
VPCI, VDD_3.3V, +3.3V
VDD_AGP
A2VDD FB
SB200
5V_VREF
VREF_CPU
VDDQ
VDD_CORE
AVDD_CK
S0 -- S1
5V VDD_5V x 1
3.3V VPCI x 6
VDD_3.3V x 2
+3.3V x 1
3.3V/1.5V VDD_AGP x 6
2.5V A2VDD x 1
1.8V VDD_CORE x 39
PLLVDD x 2
A2VDDQ x 1
AVDD x 1
1.2V/1.7V VCPU x 1
S0 -- S3
2.5V VDRM x 17
AGP
Slot
Clock Flow
AGPCLK
RS200
CPU
CPUCLK0+/-
DDRCLK[5:0]+/-
DIMM
OP + MOS
MS-5
VCC5SBY
B B
VCC3
MS-5
A A
VCC5SBY
MS-5
VCC5
MS-5
5
VCC18
VCC3SBY
VTTDDR
VCC_VID
V5DUAL
FB
FB
R devide
MS-5
On/Off
PLVDD
AVDD
VCC25SBY
VCCM
VCC3S3
FB
FB
FB
VCC25USB
AVDDUSB
AVDDC3
VDD_CORE
PLLVDD
A2VDDQ, AVDD
VDRM
4
S5_3.3V
S5_2.5V
STB_2.5V
VDD_USB
STB_3.3V
AVDDTX, AVDDRX
AVDDC
SB200
S0 -- S1
5V 5V_VREF x 1
3.3V VDDQ x 28
2.5V VDD_CORE x 16
AVDD_CK x 1
1.2V/1.7V VREF_CPU x 1
S0 -- S3
3.3V STB_3.3V x 7
2.5V STB_2.5V x 5
S0 -- S3/S5
3.3V AVDDTX x 3
AVDDRX x 3
AVDDC x 1
2.5V VDD_USB x 3
S0 -- S5
3.3V S5_3.3V x 1
2.5V S5_2.5V x 1
3
PCI
Slot
PCICLK[3:0]
2
14.318MHx
USBCLK
PCICLKSB
SBOSCCLK
PCICLK4
SB200
SIO48CLK
S I/O
FLASH
32.768KHx
MICRO-STAR INT'L CO.,LTD.
Title
Power Flow & Clock Flow Charts
Size Document Number Rev
<Doc> 0A
Date: Sheet of
PCICLK5
3 30 Thursday, March 28, 2002
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HA#[31:3] 6
VID[4:0] 24,26
HA#8
HA#22
HA#25
HA#23
HA#26
HA#27
HA#28
HA#30
HA#29
HA#31
D D
HINIT# 13
HDBSY# 6
HTRDY# 6
HADS# 6
HLOCK# 6
HBNR# 6
HHIT# 6
HHITM# 6
HBPRI# 6
IGNNE# 13
SMI# 13
A20M# 13
330
HDBI#0
HDBI#1
HDBI#2
HDBI#3
H_FERR#
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
THERMTRIP#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
R361
B
Q33
MBT3904LT1-SOT23
E C
R365 X_56
HDBI#[3:0] 6
STPCLK# 13
HDRDY# 6
R363
8
56
HD#[63:0] 6
VCPU
PWROKCPU 13
HDEFER# 6
CPU_TMPA 24
HPHOT#
CPUSLP# 13
BSEL0 7
BSEL1 7
CPURST# 6,13
C C
Trace : 10
mil width
10mil
space
R376 X_33
B B
A A
H_FERR# ITP_TCK
CPU1A
E21
DBI0#
G25
DBI1#
P26
DBI2#
V21
DBI3#
AC3
IERR#
V6
MCERR#
B6
FERR#
Y4
STPCLK#
AA3
BINIT#
W5
INIT#
AB2
RSP#
H5
DBSY#
H2
DRDY#
J6
TRDY#
G1
ADS#
G4
LOCK#
G2
BNR#
F3
HIT#
E3
HITM#
D2
BPRI#
E2
DEFER#
C1
TDI
D5
TDO
F7
TMS
E6
TRST#
D4
TCK
B3
THERMDA
C4
THERMDC
A2
THERMTRIP#
AF26
GND/SKTOCC#
C3
PROCHOT#
B2
IGNNE#
B5
SMI#
C6
A20M#
AB26
SLP#
A22
RESERVED0
A7
RESERVED1
AD2
RESERVED2
AD3
RESERVED3
AE21
RESERVED4
AF24
RESERVED5
AF25
RESERVED6
AD6
BSEL0
AD5
BSEL1
AB23
PWRGOOD
AB25
RESET#
AA24
D63#
AA22
D62#
AA25
D61#
Y21
D60#
Y24
D59#
Y23
D58#
W25
D57#
Y26
D56#
W26
D55#
V24
D54#
FERR# 13
7
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
V22
U21
V25
U23
U24
U26
T23
T22
T25
T26
R24
R25
P24
R21
HD#47
HD#46
HD#45
HD#44
HD#42
HD#43
HD#41
HD#40
HD#53
HD#52
HD#51
HD#50
HD#48
HD#49
HA#24
A24#
A23#
D39#
D38#
N25
N26
HD#39
HD#38
HPHOT#
HA#21
A22#
D37#
M26
N23
HD#37
HD#36
6
A21#
D36#
HA#20
HA#19
A20#
D35#
M24
P21
HD#34
HD#35
R377
A19#
D34#
HA#18
HA#17
A18#
D33#
N22
M23
HD#32
HD#33
VCPU
56
A17#
D32#
HA#16
A16#
D31#
H25
HD#31
HA#9
HA#14
HA#10
HA#15
HA#11
HA#13
HA#12
A9#
A15#
D30#
K23
J24
HD#29
HD#30
A8#
A14#
A13#
A12#
A11#
A10#
D29#
D28#
D27#
D26#
D25#
D24#
D23#
L22
M21
H24
G26
L21
D26
HD#26
HD#23
HD#28
HD#24
HD#25
HD#27
R473 330
B
Q39 MBT3904LT1-SOT23
E C
R204 X_56
HA#7
HA#6
A7#
D22#
F26
E25
HD#22
HD#21
HA#5
A6#
D21#
F24
HD#20
A5#
D20#
HA#4
HA#3
A4#
D19#
F23
G23
HD#19
HD#18
AE25A5A4
A3#
DBR#
Differential
Host Data
Strobes
D18#
D17#
D16#
D15#
E24
H22
D25
J21
HD#14
HD#16
HD#15
HD#17
SPHOT# 14
5
VSS_SENSE
VCC_SENSE
D14#
D13#
D12#
D23
C26
HD#12
HD#13
AD26
D11#
H21
G22
HD#10
HD#11
AC26
ITP_CLK1
ITP_CLK0
D10#
D9#
D8#
B25
C24
HD#8
HD#9
C23
HD#7
D7#
VID4
AE1
VID4#
D6#
B24
HD#6
VID3
AE2
VID3#
D5#
D22
HD#5
VID2
AE3
VID2#
D4#
C21
HD#4
VID1
AE4
VID1#
D3#
A25
HD#3
VID0
AE5
A23
HD#2
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
COMP1
COMP0
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D2#
D1#
D0#
B22
B21
HD#0
HD#1
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
RS2#
G5
RS1#
F1
RS0#
V5
AP1#
AC1
AP0#
H6
BR0#
P1
L24
L25
DP3#
K26
DP2#
K25
DP1#
J26
DP0#
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
PGA-S478-F02
4
GTLREF1
GTLREF2
BPM#5
BPM#4
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
R368 56
R369 56
R370 56
R374 56
R375 56
HRS#2
HRS#1
HRS#0
R384 51ST
R386 51ST
CPU ITP BLOCK
ITP_TMS
R371 39
ITP_TDO
R372 75
R373 27
CPUCLK0- 9
CPUCLK0+ 9
HBR#0 6
HADSTB#1 6
HADSTB#0 6
HDSTBP#3 6
HDSTBP#2 6
HDSTBP#1 6
HDSTBP#0 6
HDSTBN#3 6
HDSTBN#2 6
HDSTBN#1 6
HDSTBN#0 6
NMI 13
INTR 13
CPUCLK0+
CPUCLK0-
HREQ#[4:0] 6
VCPU
VCPU
VCPU
HRS#[2:0] 6
* Short trace
R471 54.9ST
R472 54.9ST
VCPU
3
CPU GTL REFERNCE VOLTAGE BLOCK
VCPU
Length < 1.5inch.
GTLREF1
C385
220p
2/3*Vccp
C386
220p
Length < 1.5inch.
GTLREF2
C388
220p
2/3*Vccp
C389
R362
49.9
R364
C387
100
1u
VCPU
R366
X_49.9-1%
R367
X_100-1% 220p
Every pin put one 220pF cap near it.
Trace Width 15mils, Space 15mils.
Keep the voltage dividers within 1.5 inches of the
first GTLREF Pin
CPU STRAPPING RESISTORS
CLOSED TO SOCKET478
PWROKCPU
HBR#0
CPURST#
THERMTRIP#
BPM#0
BPM#1
BPM#4
BPM#5
ITP_TDI
ITP_TRST#
PWROKCPU
CPURST#
CPUSLP#
CPURST#
R379 51
R380 51
R381 62
R382 49.9
R383 49.9
R385 49.9
R387 49.9
R388 150
R389 680
R390 22
CLOSED TO SOCKET478
STPCLK#
CPUSLP#
SMI#
HINIT#
HPHOT#
MICRO-STAR INT'L CO.,LTD.
Title
mPGA478 CPU-1
Size Document Number Rev
<Doc> 0A
Date: Sheet of
A20M#
INTR
NMI
IGNNE#
2
R391 200
R392 200
R393 200
R394 56
R395 56
RN81
7 8
5 6
3 4
1 2
200-8p
VCPU
R378 300
VCPU
VCPU
X_1000p C390
X_1000p C391
X_0.022u C392
10p
C393
VCPU
VCPU
4 30 Thursday, March 28, 2002
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7
6
5
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1
CPU VOLTAGE BLOCK
D10
A11
A13
A15
A17
A19
A21
A24
A26
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD1
VCPU
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
C10
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
E20E8F11
F13
F15
F17
F19
AF4
VCC
VSS
VCC
VSS
VCC
VSS
G21G6G24
VCC
VCC
VCC
VSS
VSS
VSS
G3H1H23
F9
VCC
VSS
VSS
H26H4J2
CPU1B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A3
VSS
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AD4
AD8
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE26
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B20
B23
B26B4B8
C11
C13
C15
C17C2C19
C22
C25C5C7C9D12
D14
D16
D18
D20
D21D3D24D6D8E1E11
E13
E15
E17
E19
E23
E26
VSS
VSS
E4
E7E9F10
F12
F14
F16
F18F2F22
VSS
F25F5F8
AF3
VCC-VID
VCC-VIDPRG
VSS
VSS
VSS
AE23
VCC-IOPLL
VSS
VSS
J22
J25J5K21
AD20
VCCA
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
PGA-S478-F02
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
C355
22u-1206
D D
C C
B B
L24 4.7u-10%
L25 4.7u-10%
C356
22u-1206
VCC_VID
VCPU
VCPU
C357
0.1u
VCPU
10u-1206
C362
10U-0805
C365
10U-0805
C368
10U-0805
C371
10U-0805
C374
10U-0805
C377
10U-0805
C380
10U-0805
C383
10U-0805
C447
10U-0805
C448
10U-0805
C449
10U-0805
C450
10U-0805
C451
10U-0805
C452
10U-0805
C453
10U-0805
C454
10U-0805
C358
VCC_VID
CPU DECOUPLING CAPACITORS
PLACE CAPS WITHIN CPU CAVITY
VCPU VCPU
A A
8
C359
10u-1206
C361
10u-1206
C364
10u-1206
C367
10u-1206
7
C370
10u-1206
C373
10u-1206
C376
10u-1206
C379
10u-1206
C382
10u-1206
C384
10u-1206
6
10u-1206
C360
C363
10u-1206
5
C366
10u-1206
C369
10u-1206
C372
10u-1206
C375
10u-1206
10u-1206
4
C378
C381
10u-1206
MICRO-STAR INT'L CO.,LTD.
Title
mPGA478 CPU-2
Size Document Number Rev
<Doc> 0A
3
Date: Sheet of
2
5 30 Thursday, March 28, 2002
1
5
4
3
2
1
VCC18
+
CE51
CE50
+
1000U/6.3V
VCC18
C331
0.1u
C332
0.1u
47u/10v
C333
0.1u
C326
0.1u
C327
0.1u
VCC18
C334
0.1u
C328
0.1u
C335
0.1u
C329
0.1u
C330
0.1u
C336
0.1u
Solder Side
VCCAGP
CE52
+
1000U/6.3V
C340
0.1u
C341
0.1u
C342
0.1u
C343
0.1u
C344
0.1u
Solder Side
VCPU
CE53
+
1000U/6.3V
MICRO-STAR INT'L CO.,LTD.
Title
ATI RS200 -1
Size Document Number Rev
<Doc> 0A
Date: Sheet of
C345
0.1u
VCPU
C350
0.1u
C347
C346
0.1u
0.1u
C351
0.1u
Solder Side
C349
C348
0.1u
0.1u
C352
0.1u
6 30 Thursday, March 28, 2002
1
HA#[31:3] 4
1) PLACE THOSE CIRCUITS
D D
C C
B B
A A
< 1.5" FROM THE BALL
2) THE 220PF CAPS HAS TO
BE CLOSED TO THE BALL
AS POSSIBLE.
VCPU
R354
49.9ST
NB_GTLREF
100ST
R355
VCCM
10K
R356
SUSPEND# 14
VCPU
VCC3
HREQ#[4:0] 4
HADSTB#0 4
C337
C338
1u
C339
220p
220p
HADSTB#1 4
HADS# 4
HBNR# 4
HBPRI# 4
HDEFER# 4
HDRDY# 4
HDBSY# 4
HBR#0 4
HLOCK# 4
CPURST# 4,13
HRS#[2:0] 4
HTRDY# 4
HHIT# 4
HHITM# 4
A_RST# 12,13
PWROKNB 28
R357 14.7ST
R358 61.9ST
R359 75ST
R360 64.9ST
HA#3 HD#0
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HRS#2
HRS#1
HRS#0
COMPVDD
COMPVSS
COMPCLKVDD
COMPCLKVSS
NB_GTLREF HD#55
VCPU
M24
P22
M23
N26
N25
M22
P25
P24
P21
R26
P26
R25
N22
N21
M25
N23
R21
M26
P23
R24
R22
R23
U26
U25
U22
U24
V25
U21
V21
U23
K24
K25
E14
K22
K21
M21
K26
AA8
AB6
V23
V22
C15
D15
V24
A16
G16
G18
G19
H20
M20
N20
W26
P20
L26
T24
T26
T25
T21
T22
L21
L23
L25
J23
J22
L24
J21
L22
J20
D6
NB1A
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
ADSTB0#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
ADSTB1#
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
LOCK#
CPURST#
RS2#
RS1#
RS0#
TRDY#
HIT#
HITM#
SUSSTAT#
SYSRST#
POWERGOOD
COMPVDD
COMPVSS
COMPCLKVDD
COMPCLKVSS
P4_VREF
VCPU
VCPU
VCPU
VCPU
VCPU
VCPU
VCPU
VCPU
VCPU
VCPU
ADDR. GROUP 1 ADDR. GROUP 0 CONTROL
PART 1 OF 5
AGTL+ I/F
PENTIUM
IV
MISC.
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DATA GROUP 0 DATA GROUP 1 DATA GROUP 2 DATA GROUP 3
DBI0#
DSTBN0#
DSTBP0#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DBI1#
DSTBN1#
DSTBP1#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DBI2#
DSTBN2#
DSTBP2#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DBI3#
DSTBN3#
DSTBP3#
J24
H23
H26
H25
J25
J26
G25
H24
F25
G26
G21
F23
F24
H22
F22
F26
H21
G22
G23
F21
E25
B25
E23
D24
E26
D26
E24
D22
B26
B24
C23
A24
A25
D23
A26
C26
C25
C24
E21
E20
F18
F20
D20
D21
A23
F19
E18
A22
C22
C21
B21
A21
D18
F17
B22
E19
D19
C19
A20
B20
B19
E17
F15
A19
B18
B17
C18
A18
C17
E15
C16
F14
B16
F16
D16
E16
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
RS200
5
4
HD#[63:0] 4
HDBI#0 4
HDSTBN#0 4
HDSTBP#0 4
HDBI#1 4
HDSTBN#1 4
HDSTBP#1 4
HDBI#2 4
HDSTBN#2 4
HDSTBP#2 4
HDBI#3 4
HDSTBN#3 4
HDSTBP#3 4
3
VCC18
VCC3
VCCAGP
K10
K11
K12
K15
K16
K17
M10
M11
M12
M15
M16
M17
R10
R11
R12
R15
R16
R17
T10
T11
T12
T15
T16
T17
U10
U11
U12
U15
U16
U17
G10
G11
T23
U13
U14
U20
Y20
AD11
Y19
Y16
Y15
Y11
Y10
AD16
L10
L11
L12
L15
L16
L17
K1
H3
P7
L7
K7
H7
NB1E
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_3.3V
VDD_3.3V
VDD_AGP
VDD_AGP
VDD_AGP
VDD_AGP
VDD_AGP
VDD_AGP
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
RS200
PART 5 OF 5
AGP
VCC3
C353
0.1u
A1
GND
A17
GND
E4
GND
AC23
GND
N4
GND
J1
GND
Y26
GND
AD4
GND
AF8
GND
AF19
GND
N24
GND
V26
GND
D17
GND
K23
GND
AF1
GND
C20
GND
G24
GND
AF26
GND
E22
GND
B2
GND
B23
GND
D25
GND
G8
GND
G9
GND
G12
GND
G13
GND
CORE PWR
C354
0.01u
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PWR/GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND
G15
G20
J7
G7
K13
K14
K20
L13
L14
L20
D11
M7
M13
M14
G17
N7
N10
N11
N12
N13
N14
N15
N16
N17
P10
P11
P12
P13
P14
P15
P16
P17
R7
R13
R14
R20
T7
T13
T14 T20
2
5
4
3
2
1
A_AD31
A_AD30
A_AD29
A_AD28
A_AD27
A_AD26
A_AD25
A_AD24
A_AD22
A_AD20
A_AD14
A_AD13
R291 X_2.7K
R292 2.7K
R294 2.7K
R296 X_2.7K
R298 2.7K
R300 X_2.7K
R302 X_2.7K
R303 2.7K
R305 X_2.7K
R307 2.7K
R309 X_2.7K
R311 2.7K
R313 X_2.7K
R315 2.7K
R317 2.7K
R318 X_2.7K
R320 2.7K
R321 2.7K
R322 X_2.7K
R323 2.7K
R324 X_2.7K
R325 X_2.7K
R326 X_2.7K
BSEL1 4
BSEL0 4
VCC3
AD29: RS200 CONFIGURATION OPTIONS
Default : 1
0: FULL CONFIGURATION
1: USEA DEFAULT VALUES
VCC3
AD28: SPREAD SPECTRUM
Default : 0
0: DISABLE
1: ENABLE
VCC3
AD27: MCERR OBSERVATION
Default : 1
0: DISABLE
1: ENABLE
VCC3
AD26: QUICK START SELECT
Default : 1
0: DISABLE
1: ENABLE
VCC3
AD25: INIT OBSERVATION
Default : 1
0: DISABLE
1: ENABLE
VCC3
AD24: IOQ ENABLE
Default : 1
0: DISABLE
1: ENABLE
VCC3
AD22: 27MHz/33 MHz CLOCK SELECTION
0: 33 MHz CLOCK OUTPUT
1: 27 MHz CLOCK INPUT
VCC3
AD20 : PCICLK EXPANSION
1: PCI_REQ#3, PCI_GNT#3 USED AS PCICLK
0: PCI_REQ#3, PCI_GNT#3 USED AS REQ/GNT
VCC3
AD14 : GTL+ VDDQ
Default : 1
0: 1.2V
1: 1.7V
VCC3
AD13: READABLE & AVAILABLE
VCC3
AD5
AF4
AF3
AE4
AE3
AC4
AE2
AE1
AD2
AC3
AD1
AE5
AC5
AC2
AA1
AA2
AA6
AD3
AC1
AA3
AB3
AA4
AA5
AB1
AB4
AB5
AB2
AF2
NB1B
AA7
PCI_AD0
AF5
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
Y2
PCI_AD18
PCI_AD19
Y5
PCI_AD20
Y4
PCI_AD21
Y6
PCI_AD22
W5
PCI_AD23
W4
PCI_AD24
W3
PCI_AD25
W2
PCI_AD26
W6
PCI_AD27
V6
PCI_AD28
V5
PCI_AD29
W1
PCI_AD30
V4
PCI_AD31
PCI_CBE0#
PCI_CBE1#
PCI_CBE2#
Y1
PCI_CBE3#
PCI_PAR
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
T4
INTA#
PCI_DEVSEL#
PCI_STOP#
PCI_SERR#
R6
PCI_ACTIVE_REQ#
T2
PCI_SBREQ#
R4
PCI_SBGNT#
V3
PCI_BREQ0#
U5
PCI_BREQ1#
U6
PCI_BREQ2#
T5
PCI_BREQ3#/PCI_CLK3
V2
PCI_GNT0#
V1
PCI_GNT1#
U2
PCI_GNT2#
T6
PCI_GNT3#/PCI_CLK4
T1
VDD_5V
VPCI
Y3
VPCI
T3
VPCI
U7
VPCI
V7
VPCI
W7
VPCI
PART 2 OF 5
PCI/AGP I/F
AGP_VOLTAGE_DETECTED
AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31
AGP_SBSTB
AGP_SBSTB#
AGP_ADSTB0
AGP_ADSTB0#
AGP_ADSTB1
AGP_ADSTB1#
AGP_CBE#0
AGP_CBE#1
AGP_CBE#2
AGP_CBE#3
AGP_DEVSEL#
AGP_FRAME#
AGP_IRDY#
AGP_PAR
AGP_PIPE#
AGP_RBF#
AGP_SERR#
AGP_STOP#
AGP_TRDY#
AGP_WBF#
AGP_REQ#
AGP_GNT#
AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
AGP_ST0
AGP_ST1
AGP_ST2
AGP_VREF4X
GAD0
R1
GAD1
R2
GAD2
P2
GAD3
P1
GAD4
P3
GAD5
N2
GAD6
N3
GAD7
N1
GAD8
L1
GAD9
L3
GAD10
L2
GAD11
K3
GAD12
K2
GAD13
J2
GAD14
J3
GAD15
H2
GAD16
M4
GAD17
L6
GAD18
L5
GAD19
L4
GAD20
K5
GAD21
K6
GAD22
K4
GAD23
J5
GAD24
H6
GAD25
J4
GAD26
G3
GAD27
G5
GAD28
G6
GAD29
G4
GAD30
F4
GAD31
F5
F3
E2
M2
M1
H5
H4
GCBE#0
M3
GCBE#1
H1
GCBE#2
M5
GCBE#3
J6
N6
M6
N5
R5
E5
D3
P5
P4
P6
F6
D4
D5
GSBA0
D1
GSBA1
E3
GSBA2
D2
GSBA3
E1
GSBA4
F2
GSBA5
F1
GSBA6
G2
GSBA7
G1
GST0
C2
GST1
E6
GST2
C1
B1
R3
A_AD[31:0] 13
D D
C C
A_CBE#[3:0] 13
A_PAR 13
A_FRAME# 13
A_IRDY# 13
A_TRDY# 13
INTA# 12,13,16,17
A_DEVSEL# 13
A_STOP# 13
A_SERR# 13
A_PREQACT# 14
A_SBREQ# 13
B B
A_SBGNT# 13
A_REQ#0
A_REQ#1
A_REQ#2
A_REQ#3
A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31
A_CBE#0
A_CBE#1
A_CBE#2
A_CBE#3
VCC5
C310
0.1u
A A
GAD[31:0] 12
GSBSTB 12
GSBSTB# 12
GADSTB0 12
GADSTB#0 12
GADSTB1 12
GADSTB#1 12
GCBE#[3:0] 12
GDEVSEL# 12
GFRAME# 12
GIRDY# 12
GPAR 12
GPIPE# 12
GRBF# 12
GSERR# 12
GSTOP# 12
GTRDY# 12
GWBF# 12
GREQ# 12
GGNT# 12
GSBA[7:0] 12
GST[2:0] 12
TYPEDET_5V 12,27
AVREFGC 12
RS200
5
4
3
AD[31..30] : CPU CLK SPEED
Default : 00
00: 100 MHz
01: 133 MHz
10: 166 MHz
11: 66 MHz
VCC3
AD10: READABLE & AVAILABLE
VCC3
AD9: READABLE & AVAILABLE
VCC3
AD3: PCI66 MODE SELECT
Default : 1
0: 33MHZ
1: 66MHZ
A-Link
VCC3
AD2: CAL DEFAULTS FOR CPU
Default : 1 (FOR BRING UP)
0: DISABLE
1: ENABLE
VCC3
AD1: FrcShortReset
Default : 0
0: DISABLE
1: ENABLE
VCC3
AD0: PCI/AGP CONFIG.
Default : 1
1: 66 MHz
0: 33 MHz
VCC3
PCI_PREQACT#: INTERNAL CLOCK GEN.
0: DISABLE
1: ENABLE
VCC3
PCI_CBE#3 : PROD. TEST
0: SHORT TIMERS
1: NORMAL
RN60
7 8
5 6
3 4
1 2
VCC3
A_AD10
A_AD9
A_AD3
A_AD2
A_AD1
A_AD1
A_PREQACT#
A_CEB#3
A_REQ#0
A_REQ#1
A_REQ#2
A_REQ#3
R293 X_2.7K
R295 X_2.7K
R297 X_2.7K
R299 X_2.7K
R301 2.7K
R304 2.7K
R306 X_2.7K
R308 X_2.7K
R310 2.7K
R312 2.7K
R314 X_2.7K
R316 2.7K
R319 2.7K
4.7K
MICRO-STAR INT'L CO.,LTD.
Title
ATI RS200 - 2
Size Document Number Rev
<Doc> 0A
2
Date: Sheet of
7 30 Thursday, March 28, 2002
1
5
4
3
2
1
RMA[14:0] 10,11
D D
C C
VCC25
B B
A A
RMA7
RMA9
RMA11
RMA12
RMA4
RMA6
RMA5
RMA8
RMA0
RMA1
RMA2
RMA3
RMA13
RMA14
RMA10
R331
150
R332
150
5
RRAS# 10,11
RCAS# 10,11
RWE# 10,11
CKE_R 10,11
C322
X_0.1u
DDRVREFNB
C323
0.1u
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RCS#0 10,11
RCS#1 10,11
RCS#2 10,11
RCS#3 10,11
MAA7
RN61 0
MAA9
MAA11
MAA12
MAA4
RN63 0
MAA6
MAA5
MAA8
MAA0
RN65 0
MAA1
MAA2
MAA3
RN67 0
MAA13
MAA14
MAA10
R327 0
R328 0
R329 0
R330 0
DDRCLK0- 10
DDRCLK0+ 10
DDRCLK1- 10
DDRCLK1+ 10
DDRCLK2- 10
DDRCLK2+ 10
DDRCLK3- 10
DDRCLK3+ 10
DDRCLK4- 10
DDRCLK4+ 10
DDRCLK5- 10
DDRCLK5+ 10
R333 0
R334 0
R335 0
R336 0
R337
0
VCCM
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
RAS#
CAS#
WE#
CKE
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
CS#0
CS#1
CS#2
CS#3
4
AB20
AA19
AB19
AC20
AE21
AD20
AE20
AD19
AC19
AA18
AA20
AC18
AB18
AC21
AD22
AD9
AA9
AB12
AD13
AB15
AE19
AE26
AB25
AF20
AD23
AB21
AE11
AF7
AC8
AC12
AE13
AC15
AE17
AD25
AD8
AE8
AF22
AE22
AA22
AB22
AB17
AC17
AF23
AE23
AA23
AC22
AA21
AF21
AF24
W23
AA24
AF25
AA26
AD7
AD21
AF9
AF18
Y24
Y23
Y7
Y8
Y9
NB1C
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A14
DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DM4
DDR_DM5
DDR_DM6
DDR_DM7
DDR_RAS#
DDR_CAS#
DDR_WE#
DDR_CKE
DDR_DQS0
DDR_DQS1
DDR_DQS2
DDR_DQS3
DDR_DQS4
DDR_DQS5
DDR_DQS6
DDR_DQS7
DDR_CK0#
DDR_CK0
DDR_CK1#
DDR_CK1
DDR_CK2#
DDR_CK2
DDR_CK3#
DDR_CK3
DDR_CK4#
DDR_CK4
DDR_CK5#
DDR_CK5
DDR_CS0#
DDR_CS1#
DDR_CS2#
DDR_CS3#
TESTMODE
VDRM
VDRM
VDRM
VDRM
VDRM
VDRM
VDRM
VDRM
VDRM
VDRM
RS200
PART 3 OF 5
DDR_DQ0
DDR_DQ1
DDR_DQ2
DDR_DQ3
DDR_DQ4
DDR_DQ5
DDR_DQ6
DDR_DQ7
DDR_DQ8
DDR_DQ9
DDR_DQ10
DDR_DQ11
DDR_DQ12
DDR_DQ13
DDR_DQ14
DDR_DQ15
DDR_DQ16
DDR_DQ17
DDR_DQ18
DDR_DQ19
DDR_DQ20
DDR_DQ21
DDR_DQ22
DDR_DQ23
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_DQ28
DDR_DQ29
DDR_DQ30
DDR_DQ31
DDR_DQ32
DDR_DQ33
DDR_DQ34
DDR_DQ35
DDR_DQ36
DDR_DQ37
DDR_DQ38
DDR_DQ39
DDR_DQ40
DDR_DQ41
DDR_DQ42
DDR
I/F
DDR_DQ43
DDR_DQ44
DDR_DQ45
DDR_DQ46
DDR_DQ47
DDR_DQ48
DDR_DQ49
DDR_DQ50
DDR_DQ51
DDR_DQ52
DDR_DQ53
DDR_DQ54
DDR_DQ55
DDR_DQ56
DDR_DQ57
DDR_DQ58
DDR_DQ59
DDR_DQ60
DDR_DQ61
DDR_DQ62
DDR_DQ63
VDRM
VDRM
VDRM
VDRM
VDRM
VDRM
VDRM
DDR_VREF
AD6
AE7
AD10
AF10
AE6
AF6
AE9
AE10
AB7
AB8
AB10
AC10
AC7
AB9
AA10
AC9
AB11
AC11
AA13
AC13
AA11
AA12
AB13
AD14
AF11
AE12
AD12
AF12
AF13
AF14
AD15
AE14
AA14
AC14
AA16
AA17
AB14
AA15
AB16
AC16
AF15
AF16
AF17
AD17
AE15
AE16
AE18
AD18
AE24
AE25
Y22
AD26
AD24
Y21
AC24
AC25
AB23
AB26
Y25
W25
AC26
AB24
AA25
W24
Y12
Y13
Y14
Y17
Y18
V20
W20
AC6
MDAT0
MDAT1
MDAT2
MDAT3
MDAT4
MDAT5
MDAT6
MDAT7
MDAT8
MDAT9
MDAT10
MDAT11
MDAT12
MDAT13
MDAT14
MDAT15
MDAT16
MDAT17
MDAT18
MDAT19
MDAT20
MDAT21
MDAT22
MDAT23
MDAT24
MDAT25
MDAT26
MDAT27
MDAT28
MDAT29
MDAT30
MDAT31
MDAT32
MDAT33
MDAT34
MDAT35
MDAT36
MDAT37
MDAT38
MDAT39
MDAT40
MDAT41
MDAT42
MDAT43
MDAT44
MDAT45
MDAT46
MDAT47
MDAT48
MDAT49
MDAT50
MDAT51
MDAT52
MDAT53
MDAT54
MDAT55
MDAT56
MDAT57
MDAT58
MDAT59
MDAT60
MDAT61
MDAT62
MDAT63
VCCM
C324
0.1u
DDRVREFNB
C325
0.01u
3
MDAT3
MDAT7
MDAT2
MDAT6
MDAT1
MDAT5
MDAT4
MDAT0
MDAT11
MDAT10
MDAT15
MDAT14
MDAT13
MDAT9
MDAT12
MDAT8
MDAT23
MDAT19
MDAT22
MDAT18
MDAT21
MDAT17
MDAT16
MDAT20
MDAT31
MDAT29
MDAT30
MDAT28
MDAT27
MDAT25
MDAT26
MDAT24
MDAT37
MDAT33
MDAT36
MDAT32
MDAT35
MDAT39
MDAT38
MDAT34
MDAT41
MDAT45
MDAT40
MDAT44
MDAT47
MDAT46
MDAT43
MDAT42
MDAT55
MDAT51
MDAT50
MDAT54
MDAT53
MDAT52
MDAT49
MDAT48
MDAT59
MDAT63
MDAT58
MDAT62
MDAT57
MDAT61
MDAT56
MDAT60
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RMD3
RN62 22
RMD7
RMD2
RMD6
RMD1
RN64 22
RMD5
RMD4
RMD0
RMD11
RN66 22
RMD10
RMD15
RMD14
RMD13
RN68 22
RMD9
RMD12
RMD8
RMD23
RN69 22
RMD19
RMD22
RMD18
RMD21
RN70 22
RMD17
RMD16
RMD20
RMD31
RN71 22
RMD29
RMD30
RMD28
RMD27
RN72 22
RMD25
RMD26
RMD24
RMD37
RN73 22
RMD33
RMD36
RMD32
RMD35
RN74 22
RMD39
RMD38
RMD34
RMD41
RN75 22
RMD45
RMD40
RMD44
RMD47
RN76 22
RMD46
RMD43
RMD42
RMD55
RN77 22
RMD51
RMD50
RMD54
RMD53
RN78 22
RMD52
RMD49
RMD48
RMD59
RN79 22
RMD63
RMD58
RMD62
RMD57
RN80 22
RMD61
RMD56
RMD60
RDQM0
R338 22
RDQM1
R339 22
RDQM2
R340 22
RDQM3
R341 22
RDQM4
R342 22
RDQM5
R343 22
RDQM6
R344 22
RDQM7
R345 22
RDQS0
R346 22
RDQS1
R347 22
RDQS2
R348 22
RDQS3
R349 22
RDQS4
R350 22
RDQS5
R351 22
RDQS6
R352 22
RDQS7
R353 22
2
RMD[63..0] 10,11
VCCM
CE48
+
1000U/6.3V
CE49
+
1000U/6.3V
VCCM
C318
0.1u
C311
0.1u
C319
0.1u
C312
0.1u
C320
0.1u
C313
0.1u
C321
0.1u
C314
0.1u
C315
0.1u
Solder Side
RDQM[7:0] 10,11
RDQS[7:0] 10,11
MICRO-STAR INT'L CO.,LTD.
Title
ATI RS200 - 3
Size Document Number Rev
<Doc> 0A
Date: Sheet of
8 30 Thursday, March 28, 2002
1
C316
0.1u
C317
0.1u
5
4
3
2
1
AVDD
VCC3
+3.3VNB
AVDD
C277
AVSSN
0.1u
AVSSQ
A2VDD
A2VSSN
AVDD
A2VSSQ
NB_TMPA 24
C291
0.1u
R275 0
R276 0
R277 0
VSYNC 11
HSYNC 11
GRSET
R278 499ST
14XIN
14XOUT
HFBCLKO-R
HFBCLKO+R
SB_PCICLK_INT_R
AGP_CLK_INT_R
AGPFBCLKI
AGPFBCLKO
USBCLK_INT_R
TV27CLK
SB_OSC_INT_R
C280 10p
C284 10p
14M-32pf-HC49S-D
L19 300
ROUT 11
GOUT 11
BOUT 11
R279 54.9ST
R280 54.9ST
HFBCLKOHFBCLKO+
L18 300
PLVDD
10u-1206
C289
14XIN
Y2
14XOUT
R281 33
R282 33
C290
0.1u
R284 22
R285 22
R286 22
R287 22
R290 22
D D
VCC18
C288 1u
C C
PCICLKSB 13
AGPCLK 12
B B
USBCLK 14
SBOSCCLK 14
NB1D
G14
+3.3V
PART 4 OF 5
AVDD
AVSSN
AVSSQ
A2VDD
A2VSSN
A2VDDQ
A2VSSQ
THERMALDIODE_N
THERMALDIODE_P
PLLVDD0
PLLVDD1
PLLVSS0
PLLVSS1
RED
GREEN
BLUE
DACVSYNC
DACHSYNC
RSET
XTLIN
XTLOUT
HCLKIN
HCLKIN#
SYS_FBCLKOUT#
SYS_FBCLKOUT
PCI_CLKF
PCICLK_NB
AGPCLK
AGPCLKIN/AGP_FBCLKIN
EXT_MEM_CLK/AGP_FBCLKOUT
USBCLK
REF27/PCICLK5
OSC
CLK. GEN.
W22
W21
A10
A11
C11
A12
A14
A13
A15
E10
D10
C10
E11
F11
B10
B12
B11
D13
E13
B13
B14
E12
D12
C13
C12
B15
F12
A9
A8
C8
B8
U3
U1
CRT
LVDS
VDD_CORE
VDD_CORE
VDD_CORE
COMP_B
SVID
DACSDA
PCICLK_STOP#
CPUSTOP#
SYSCLK#
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
GND
GND
GND
C_R
Y_G
R2SET
DACSCL
SYSCLK
B3
A3
C4
B4
A5
B5
B7
A7
C3
A2
A4
C5
B6
C6
C7
A6
D8
E8
F8
D7
E7
F7
C9
D9
E9
B9
F10
F9
U4
F13
C14
D14
TVRSET
CPUCLK+R
CPUCLK-R
VCC18
CR2
YG2
COMPB2
C294
0.1u
C295
0.1u
R283 715ST
R288 33
R289 33
C279
0.1u
C282
0.1u
DDCSCL 11
DDCSDAT 11
PCI_STP# 13
CPU_STP# 13,14
CPUCLK0+ 4
CPUCLK0- 4
L17 300
C276
0.1u
AVSSN
1 2
X_COPPER_0
AVSSQ
1 2
X_COPPER_0
A2VSSQ
1 2
X_COPPER_0
A2VDD VCC25
L20 300
C293
0.1u
A2VSSN
VCC18
CP4
CP5
CP6
CP7
1 2
X_COPPER_0
trace : space
12mil : 20mil
HFBCLKO+
HFBCLKO-
PCICLKSB
AGPFBCLKI
AGPFBCLKO
SBOSCCLK
USBCLK
CPUCLK0+
CPUCLK0-
Cable P/N:
K10-1002002-V03
COMPB2
YG2
CR2
ROUT
GOUT
BOUT
JTV1
3
T_D2x3-BK
C274 X_10p
C275 X_10p
C278 X_10p
C281 X_10p
C283 X_10p
C285 X_10p
C286 X_10p
C287 X_10p
C292 X_10p
4 1
5 2
C296 33p
C297 33p
C298 33p
RS200
VCC3
C299
D20
BAV99-S-SOT23
G
A A
C/R
D
5
VCC5 VCC5 VCC5
S
C301 33p
C304
100p
L21 1.8uH
CR2
C305
270p
G
Y/G
4
D21
BAV99-S-SOT23
D
S
C302 33p
YG2
L22 1.8uH
C306
100p
C307
270p
3
G
COMP/B
D22
BAV99-S-SOT23
D
S
C303 33p
COMPB2
L23 1.8uH
C308
100p
C309
270p
2
0.1u
MICRO-STAR INT'L CO.,LTD.
Title
Size Document Number Rev
Date: Sheet of
OSC1
8
1
OUT
VCC
GND
NC/INH#
27MHz Osc
ATI RS200 - 4
<Doc> 0A
TV27CLK
5
4
33p
C300
9 30 Thursday, March 28, 2002
1