8
7
6
5
4
3
2
1
Cover Sheet
Block Diagram
MAIN CLOCK GEN
D D
DDR CLOCK BUFFER
mPGA478-B INTEL CPU Sockets
SIS 651 NORTH BRIDGE
DDR SLOT
DDR TERMINATOR
SIS 962L SOUTH BRIDGE
SIS301B & DVI + TV-OUT
PCI SLOT 19
1
2
3
4
5 - 6
7- 10
11-12
12
13-16
17-18
Last Schematic Update Date:
9/2/2002 V01
MS-6535
SIS 651 CHIPSET
Willamette/Northwood 478pin mPGA-B Processor Schematics
CPU:
Willamette/Northwood mPGA-478B Processor
VERSION:2.0
LAN CONTROLLER RTL8101 20
C C
IDE CONNECTOR
FRONT USB CONNECTOR
KB/MS & REAR USB CONNECTOR
AC'97 CODEC ALC201/ALC650
FRONT & REAR AUDIO CONNECTOR
LPC I/O(W83697HF)
HARDWARE MONITOR
SERIAL PORT
PARALLEL PORT
B B
FLASH MEMORY
VRM 9.X
ATX POWER CON & VGA CON
FRONT PANEL
CARDBUS OZ6933 & PCMCIA SOCKET
ACPI CONTROLLER W83302 MS-5
MEMORY STICK W83L518D & SOCKET
2-PORT 1394 - NEC72874
Decoupling Capacitor
A A
21 RJ45 CONNECTOR
22
23
24
25
26
27
28
29
30
31
32
33
34
35-36
37
38
39
40
41 HISTORY
System SIS650 Chipset:
SIS 651 (North Bridge) +
962L (South Bridge)
On Board Chip:
LPC Super I/O -- W83697HF
BIOS -- ISA
AC' 97 CODEC -- ALC650 Ver:D
CLOCK GENERATION -- ICS 952001
LAN -- RTL8101L
PCMCIA -- OZ6933
DVO -- SIS301B DVI + TV-OUT + 2nd CRT
1394 -- NEC72874- 2ports
MEMORY STICK -- W83L518D Ver:B
Expansion Slots:
PCI2.2 SLOT* 1 ( RISER CARD PCI*2 )
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
PCI DEVICE ROUTING TABLE
DEVICE
System Block Diagram
1394
LAN
D D
VGA
SOCKET-478
PCMCIA
PCI SLOT
INT pin IDSEL
INTD#
INTC#
AD23
AD26
INTB# MODEM
INTA#
INTB#
INTB#
AD25
AD17
INTC#
INTD#
INTA#
Host Bus
Simultaneous
display
VGA
CONNECTOR
C C
DVI-A
AV &
S-VIDEO
TMDS LCD
TV-OUT
2nd CRT
SIS301B
ENCODER
110MHz
400MHz
SIS651
DDR266
SSTL-2 Termination
(Only for DDR)
DIMM 1 DIMM 2
1GB / per DIMM
Rtt
FRONT
Support 6 PCI Devices
33MHz
LAN
RTL8101
RJ45
B B
IDE 1
A A
IDE 2
IEEE
1394
REAR
CARDBUS
OZ6933
PCMCIA
SOCKET
FRONT
KEYBOARD
PS/2 MOUSE
FAN1 FAN2
Legacy
ROM
PCI
SLOT 1
PS/2
FAN
CONTROL
ISA
SiS962L
LPC Super I/O
W83697HF
HyperZip
533MB/s
LPC
Bus
M.S.
W83L518D
Audio Codec
ALC650
USB 0
USB 1
AC'97
USB2.0
VOLTAGE MONITOR
TEMPERATURE MONITOR
REAR
PORT
USB 2
USB 3
MEMORY
STICK
FRONT
REAR
FRONT PORT
USB 4
USB 5
Audio port
PCI RISER
DEVICE
PCI #1
PCI #2
INT pin
INTB#
INTC#
INTD#
INTA#
INTC#
INTD#
INTA#
IDSEL
AD17
AD18
INTB#
GPIOs
8
7
6
COM2
COM1 PARALLEL FLOPPY
5
MICRO-STAR INT'L CO.,LTD.
Title
System Block Diagram
Size Document Number Rev
MS-6535 200
Custom
4
3
Date: Sheet of
2
2 41 Friday, September 20, 2002
1
8
7
6
5
4
3
2
1
VCC3
C131
C188
C121
104p
R178
10K
Q10
C1
103p
103p
103p
C120
104p
C167
104p
C143
104p
VCC3
R159
10K
Q9
NPN-3904LT1-S-SOT23
C166
104p
EC9
10u
R170
C146
104p
C163
104p
475RST
L13
X_80-0805
D D
CP13
X_COPPER
C132
C148
X_4.7u-0805
104p
VCC3
C C
VCCP
R179
10K
NPN-3904LT1-S-SOT23
CP23 X_COPPER
VCC3
L33
X_80-0805
C197
104p
B B
C187
104p
VCC3
C198
X_4.7u-0805
C181
104p
C108
100P
Main Clock Generator
U10
ICS952001AF / ICW28342
1
VDDREF
11
VDDZ
13
VDDPCI
19
VDDPCI
28
VDD48
29
VDDAGP
42
VDDCPU
48
VDDSD
12
PCI_STOP#
45
CPU_STOP#
5
VSSREF
8
VSSZ
18
VSSPCI
24
VSSPCI
25
VSS48
32
VSSAGP
41
VSSCPU
46
100P
C165
VSSSD
33
PD#/VTT_PWRGD
38
IREF
36
VDDA
37
VSSA
XIN
6
Y3
14M-32pf-HC49S-D
C145
27p
PCICLK_F0/FS3
PCICLK_F1/FS4
24_48M/MULTISEL
XOUT
7
C149
27p
CPUCLK0
CPUCLK#0
CPUCLK1
CPUCLK#1
SDCLK
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
REF0/FS0
REF1/FS1
REF2/FS2
48M
SCLK
SDATA
Damping Resistors
Place near to the
Clock Outputs
40
39
44
43
47
31
30
9
10
FS3
14
FS4
15
16
17
20
21
22
23
FS0
2
FS1
3
FS2
4
27
26
MULTISEL
35
34
VCC3
R105 X_2.7K
R117 X_2.7K
R103 X_2.7K
R102 2.7K
ICS952001A : Stuff R120
ICW28342 : Stuff R119
R172 33
R171
R174
R173 33
R175
R167
R116
R115
RN21 33
7 8
5 6
3 4
1 2
RN19 33
7 8
5 6
3 4
1 2
RN20 33
7 8
5 6
3 4
1 2
R118 33
R166 22
R165
R164
CPUCLK0
CPUCLK-0
33
CPUCLK1
33
CPUCLK-1
SDCLK
22
AGPCLK0
22
ZCLK0
22
ZCLK1
22
96XPCLK
SIOPCLK
PCICLK1
PCICLK2
CARD_CLK
1394PCLK
PCICLK5
MS_CLK
SIO48M
UCLK48M
22
22
SMBCLK
SMBDAT
Frequency Selection
FS1
FS3
VCC3 VCC3
R120
4.7K
FS0
R119
X_2.7K
By-Pass Capacitors
Place near to the Clock Outputs
CPUCLK0
CPUCLK-0
CPUCLK1
CPUCLK-1
CPUCLK0 5
CPUCLK-0 5
CPUCLK1 7
CPUCLK-1 7
SDCLK 8
AGPCLK0 7
ZCLK0 9
ZCLK1 13
96XPCLK 13
SIOPCLK 27
PCICLK1 19
PCICLK2 19
CARD_CLK 35
1394PCLK 39
PCICLK5 20
MS_CLK 38
REFCLK0
REFCLK0 9
REFCLK1
REFCLK1 14
APICCLK APICCLK
APICCLK 14
REFCLK3
REFCLK3 17
SCLK
SCLK 35,36
SIO48M 27
UCLK48M 15
MS_48 38
SMBCLK 4,11,14,37
SMBDAT 4,11,14,37
SDCLK
AGPCLK0
ZCLK0
ZCLK1
PCICLK2
PCICLK1
SIOPCLK
96XPCLK
MS_CLK
PCICLK5
1394PCLK
CARD_CLK
REFCLK0
REFCLK1
SCLK
REFCLK3
UCLK48M
SIO48M
MS_48
R429 10K
R430 10K
BSEL0 5
FS2
FS4
R162
4.7K
MULTISEL
R163
X_0
R187
R186
R189 49.9RST
R188
49.9RST
49.9RST
49.9RST
C185 X_10p
C186 X_10p
C103 X_10p
C102 X_10p
CN4 X_10p
1 2
3 4
5 6
7 8
CN3 X_10p 1 2
3 4
5 6
7 8
C105 10p
C107 10p
C106 10p
C26 10p
C104 10p
C184 10p
C183 10p
C182 10p
SDRAM
FS2
A A
8
7
6
FS1
0 1 0
0
1
5
CPU PCI FS0
100 0
1 1
133
4
ZCLK FS4
100
100
AGP FS3
33
66 0
66
33 0 66 66
3
MICRO-STAR INT'L CO.,LTD.
Title
MAIN CLOCK GEN
Size Document Number Rev
MS-6535 200
Custom
Date: Sheet of
2
3 41 Friday, September 20, 2002
1
8
7
6
5
4
3
2
By-Pass Capacitors
Place near to the Clock Buffer
1
D D
CP58 X_COPPER
VCC2.5V
C429
104p
C C
B B
VCC2.5V
CP57 X_COPPER
L75
X_80-0805
VCC2.5V
C410
X_4.7u-0805
R390
X_10KST
R391
X_10KST
L77
X_80-0805
C408
103p
C458
X_104p
C424
X_4.7u-0805
C412
104p
SMBCLK
SMBDAT
FWDSDCLKO
C427
103p
CP59
X_COPPER
CP60 X_COPPER
FB_OUT
1.25V
C426
104p
Clock Buffer (DDR)
(OPTIONS)
1: (ICS-93705)
CBVDD
CBVDD
C459
104p
12
23
10
22
20
18
21
U23
ICS93722 / ICW28352
3
VDD
VDD
VDD
AVDD
7
SCLK
SDATA
8
CLK_IN
FB_IN
9
NC
NC
NC
C434
104p
6
GND
GND
111528
GND
GND
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
CLK#0
CLK#1
CLK#2
CLK#3
CLK#4
CLK#5
FB_OUT
2
4
13
17
24
26
1
5
14
16
25
27
19
DDRCLK[0..8]
DDRCLK-[0..8]
SMBCLK
SMBDAT
FWDSDCLKO
DDRCLK[0..8] 11
DDRCLK-[0..8] 11
SMBCLK 3,11,14,37
SMBDAT 3,11,14,37
FWDSDCLKO 8
CP71 X_COPPER
CP73 X_COPPER
CP75 X_COPPER
CP77 X_COPPER
CP79 X_COPPER
CP81 X_COPPER
CP70 X_COPPER
CP72 X_COPPER
CP74 X_COPPER
R359
R358 X_0
R367 X_0
R383
R378
R380
R360 X_0
R357
R365
R382
R379 X_0
R381 X_0
CP76 X_COPPER
CP78 X_COPPER
CP80 X_COPPER
X_0
X_0
X_0
X_0
X_0
X_0
X_0
DDRCLK0
DDRCLK1
DDRCLK2
DDRCLK3
DDRCLK8
DDRCLK7
DDRCLK-0
DDRCLK-1
DDRCLK-2
DDRCLK-3
DDRCLK-8
DDRCLK-7
DDRCLK8
DDRCLK7
DDRCLK2
DDRCLK3
DDRCLK0
DDRCLK1
DDRCLK-8
DDRCLK-7
DDRCLK-2
DDRCLK-3
DDRCLK-0
DDRCLK-1
C465 X_10p
C467 X_10p
C452 X_10p
C470 X_10p
C415 X_10p
C414 X_10p
C466 X_10p
C468 X_10p
C437 X_10p
C469 X_10p
C416 X_10p
C413 X_10p
R384
PART
ICW28353 ICS93722
R640
10KST
R641
10KST
C642
A A
8
104p
7
X
X
X
ICW28352
X
X
X
6
5
4
FB_OUT
22
C471
22p
MICRO-STAR INT'L CO.,LTD.
Title
DDR CLOCK BUFFER
Size Document Number Rev
MS-6535 200
Custom
3
Date: Sheet of
2
4 41 Friday, September 20, 2002
1
8
7
6
5
4
3
2
1
CPU GTL REFERNCE VOLTAGE BLOCK CPU SIGNAL BLOCK
HA#[3..31] 7
VID[0..4] 32
D D
C C
B B
A A
A3~A16#, HREQ#0~4 is strobed by HADSTB#0
A17~A35# is strobed by HADSTB#1
HDBI#[0..3] 7
Trace : 10
mil width
10mil space
CPU_TMPA 28
HD#[0..63] 7
FERR# 14
STPCLK# 14
INIT# 14
HDBSY# 7
HDRDY# 7
HTRDY# 7
HADS# 7
HLOCK# 7
HBNR# 7
HIT# 7
HITM# 7
HBPRI# 7
HDEFER# 7
R232 X_33
IGNNE# 14
SMI# 14
A20M# 14
CPUSLP# 14
BSEL0 3
CPU_GD 7
CPURST# 7
8
HDBI#0
HDBI#1
HDBI#2
HDBI#3
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
CPU_TMPA
THERMTRIP#
CPU_GD
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
PROCHOT#
IGNNE#
SMI#
A20M#
CPUSLP#
G25
AC3
AA3
AB2
AF26
AB26
AD2
AD3
AE21
AF24
AF25
AD6
AD5
AB23
AB25
AA24
AA22
AA25
W25
W26
E21
P26
V21
V6
B6
Y4
W5
H5
H2
J6
G1
G4
G2
F3
E3
D2
E2
C1
D5
F7
E6
D4
B3
C4
A2
C3
B2
B5
C6
A22
A7
Y21
Y24
Y23
Y26
V24
U19A
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
BSEL0
BSEL1
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
V22
HD#53
7
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
D53#
D52#
D51#
D50#
U21
V25
U23
U24
HD#51
HD#50
HD#49
HD#52
A34#
D49#
A33#
D48#
U26
HD#48
A32#
D47#
T23
HD#47
HA#31
A31#
D46#
T22
HD#46
HA#30
A30#
D45#
T25
T26
HD#45
HA#29
A29#
D44#
R24
HD#44
HA#28
HD#43
A28#
D43#
HA#27
A27#
D42#
R25
HD#42
HA#26
A26#
D41#
P24
HD#41
HA#25
A25#
D40#
R21
N25
HD#40
HA#24
A24#
D39#
N26
HD#39
HA#23
A23#
D38#
M26
HD#38
HA#22
HA#21
A22#
D37#
N23
HD#37
HD#36
HA#20
A21#
D36#
M24
HD#35
HA#19
A20#
D35#
P21
HD#34
6
A19#
D34#
HA#18
A18#
D33#
N22
HD#33
HA#17
A17#
D32#
M23
HD#32
HA#16
A16#
D31#
H25
HD#31
HA#15
A15#
D30#
K23
J24
HD#30
HA#14
HD#29
A14#
D29#
HA#13
A13#
D28#
L22
HD#28
HA#12
A12#
D27#
M21
HD#27
HA#11
A11#
D26#
H24
HD#26
HA#10
A10#
D25#
G26
L21
HD#25
HA#9
A9#
D24#
D26
HD#24
HA#8
A8#
D23#
F26
HD#23
HA#7
HA#6
A7#
D22#
E25
HD#22
HD#21
HA#5
A6#
D21#
F24
HD#20
HA#4
A5#
D20#
F23
HD#19
A4#
D19#
HA#3
A3#
D18#
G23
HD#18
D17#
E24
HD#17
D16#
H22
HD#16
AE25A5A4
AD26
AC26
DBR#
ITP_CLK1
ITP_CLK0
VCC_SENSE
VSS_SENSE
Differential
Host Data
Strobes
D15#
D14#
D13#
D12#
D11#
D10#
D9#
D25
J21
D23
C26
H21
G22
B25
C24
HD#9
HD#10
HD#14
HD#15
HD#11
HD#12
HD#13
5
D8#
HD#8
C23
HD#7
D7#
VID4
AE1
B24
HD#6
VID3
AE2
VID4#
D6#
D22
HD#5
VID2
AE3
VID3#
D5#
C21
HD#4
VID1
AE4
VID2#
D4#
A25
HD#3
VID0
AE5
VID1#
VID0#
LINT1/NMI
LINT0/INTR
D3#
D2#
A23
B22
HD#2
HD#1
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
D1#
D0#
B21
PGA-S478-A10
HD#0
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
4
GTLREF1
GTLREF2
BPM#5
BPM#4
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
R410 56
R231 56
R331 56
R221 56
R409 56
R225 56
RS#2
RS#1
RS#0
R343 49.9RST
R233 49.9RST
D0~D15, HDBI#0 is strobed by HDSTBN/P#0
D16~D31, HDBI#1 is strobed by HDSTBN/P#1
D32~D47, HDBI#2 is strobed by HDSTBN/P#2
D48~D63, HDBI#3 is strobed by HDSTBN/P#3
VCCP
CPUCLK-0 3
CPUCLK0 3
RS#[0..2] 7
HBR#0 7
* Short trace
HADSTB#1 7
HADSTB#0 7
HDSTBP#3 7
HDSTBP#2 7
HDSTBP#1 7
HDSTBP#0 7
HDSTBN#3 7
HDSTBN#2 7
HDSTBN#1 7
HDSTBN#0 7
NMI 14
INTR 14
HREQ#[0..4] 7
3
Length < 1.5inch.
GTLREF1
Length < 1.5inch.
GTLREF2
2/3*Vccp
C261
C260
220p
220p
Change R226 to 75 ohm for GTLREF voltage
reference from 2/3VCCP to be 3/5VCCP
2/3*Vccp
C317
C316
220p
220p
Every pin put one 220pF cap near it.
Trace Width 15mils, Space 15mils.
Keep the voltage dividers within 1.5 inches of the
first GTLREF Pin
CPU ITP BLOCK
ITP_TMS
ITP_TDO
ITP_TCK
R337 39
R332 75
R344 27
CPU STRAPPING RESISTORS
ALL COMPONENTS CLOSE TO CPU
PROCHOT#
CPU_GD
HBR#0
CPURST#
THERMTRIP#
BPM#0
BPM#1
BPM#4
BPM#5
ITP_TDI
ITP_TRST#
CPU_GD
CPURST#
CPUSLP#
MICRO-STAR INT'L CO.,LTD.
Title
mPGA478 CPU-1
Size Document Number Rev
MS-6535 200
Custom
Date: Sheet of
2
R345 62
R224 300
R290 49.9RST
R222 49.9RST
R293 62
3 4
5 6
7 8
R297 150
R330 680
VCCP
R227
49.9RST
R226
C237
1u
X_102p C236
X_102p C234
X_223p C235
75RST
R336
X_49.9RST
Reserved dummy PAD
VCCP
VCCP
RN46 47 1 2
VCCP
VCCP
5 41 Friday, September 20, 2002
1
8
VCCP
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
VCC
VSS
AD18
VCC
VSS
AD21
VCC
VSS
AD23
VCC
VSS
AD4
VCC
VSS
AD8
VCC
VSS
AE11
AA16
VCC
VSS
AE13
U19B
VCC
VCC
D D
D10
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
C C
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
VSS
AD12
VSS
AD14
VCC
VSS
AD16
VCC
VSS
AA18
AE15
VCC
VSS
AA8
AE17
VCC
VSS
AB11
AE19
VCC
VSS
AB13
AE22
VCC
VSS
AB15
AE24
VCC
VSS
AB17
AE26
7
VCC
VSS
AB19
AE7
VCC
VSS
AB7
AE9
VCC
VSS
AB9
AF1
VCC
VSS
AC10
AF10
VCC
VSS
AC12
AF12
VCC
VSS
AC14
AF14
VCC
VSS
AC16
AF16
VCC
VSS
AC18
AF18
VCC
VSS
AC8
AF20
VCC
VSS
CPU VOLTAGE BLOCK
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF6
AF8
VSS
B10
B12
B14
B16
B18
B23
B20
B26B4B8
VCC
VSS
6
AE16
VCC
VSS
AE18
VCC
VSS
AE20
C11
VCC
VSS
AE6
C13
VCC
VSS
AE8
C15
AF11
VCC
VSS
C17C2C19
AF13
VCC
VSS
VCC
VSS
AF15
AF17
VCC
VSS
C22
AF19
AF2
AF21
AF5
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
C25C5C7C9D12
AF7
VCC
VSS
VCC
VSS
AF9
D14
B11
VCC
VSS
D16
5
B13
B15
B17
B19B7B9
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
D18
D20
D21D3D24D6D8E1E11
VCC
VSS
VCC
VSS
VCC
VSS
4
C10
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
E20E8F11
F13
F15
F17
F19
AF4
F9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC-VID
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E13
E15
E17
E19
E23
E7E9F10
F12
F14
F16
E4
E26
F18F2F22
F25F5F8
G21G6G24
VSS
VSS
G3H1H23
VSS
VSS
VSS
H26H4J2
AE23
AF3
VCC-IOPLL
VCC-VIDPRG
VSS
VSS
VSS
VSS
J22
J25J5K21
3
AD20
VCCA
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
PGA-S478-A10
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
VCC_VID 37
C239
X_10u-1206
C248
X_10u-1206
2
C238
22u-1206
L44 4.7u-10%-0805
L51 4.7u-10%-0805
C249
22u-1206
1
VCCP
B B
CPU DECOUPLING CAPACITORS
VCCP
C268
10u-1206
C295
10u-1206
C281
10u-1206
C259
X_10u-1206
C276
10u-1206
C341
10u-1206
C283
10u-1206
C304
X_10u-1206
A A
C270
X_10u-1206
C262
10u-1206
PLACE CAPS WITHIN CPU CAVITY
8
7
VCCP
C282
10u-1206
C309
10u-1206
C292
X_10u-1206
C254
X_10u-1206
C334
X_10u-1206
C269
10u-1206
C256
X_10u-1206
C252
X_10u-1206
C272
X_10u-1206
VCCP
C325
10u-1206
C324
X_10u-1206
C310
X_10u-1206
C266
X_10u-1206
C297
10u-1206
C264
10u-1206
C288
X_10u-1206
C296
10u-1206
VCCP
C346
X_10u-1206
MICRO-STAR INT'L CO.,LTD.
Title
mPGA478 CPU-2
Size Document Number Rev
6
5
4
3
Date: Sheet of
MS-6535 200
Custom
2
6 41 Friday, September 20, 2002
1
8
D D
CPUCLK1 3
CPUCLK-1 3
HDEFER# 5
HLOCK# 5
HTRDY# 5
CPURST# 5
CPU_GD 5
HBPRI# 5
RS#[0..2] 5
HADS# 5
HITM# 5
HIT# 5
HDRDY# 5
HDBSY# 5
HBNR# 5
C C
HREQ#[0..4]
HREQ#[0..4] 5
HA#[3..31] 5
B B
VCCP
VCCP
R200
75RST
A A
R204
150RST
8
CPUCLK1
CPUCLK-1
HDEFER#
HLOCK#
HTRDY#
CPURST#
CPU_GD
HBPRI#
HBR#0
HBR#0 5
RS#[0..2]
HADS#
HITM#
HIT#
HDRDY#
HDBSY#
HBNR#
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
HADSTB#1 5
HADSTB#0 5
HA#[3..31]
R217
HNCOMP
Rds-on(n) = 10 ohm
20RST
HNCVERF = 1/3 VCCP
R216
HPCOMP
Rds-on(p) = 56 ohm
110RST
HPCVERF = 2/3 VCCP
HD#[0..63] 5
C206
X_103p
C514
C214
X_104p
104p
place this capacitor
under 650 solder side
RS#2
RS#1
RS#0
HADSTB#1
HADSTB#0
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
HD#[0..63]
VCCP
R201
150RST
R205
75RST
AJ26
AH26
W26
W28
W29
W24
W25
AD24
AA24
AF26
AE25
AH28
AD26
AG29
AE26
AF28
AC24
AG28
AE29
AD28
AC25
AD27
AE28
AF27
AB24
AB26
AC28
AC26
AC29
AA26
AB28
AB27
AA25
AA29
AA28
7
U26
U24
V26
C20
D19
T27
U25
T24
T26
U29
V28
T28
U28
V24
V27
Y27
Y26
Y24
Y28
7
CPUCLK
CPUCLK#
DEFER#
HLOCK#
HTRDY#
CPURST#
CPUPWRGD
BPRI#
BREQ0#
RS#2
RS#1
RS#0
ADS#
HITM#
HIT#
DRDY#
DBSY#
BNR#
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
HASTB#1
HASTB#0
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
C207
X_103p
HNCVREF HVREF
C215
103p
C1XAVSS
C1XAVDD
C4XAVSS
AH25
AJ25
AH27
C1XAVSS
C1XAVDD
HOST
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
B21
F19
A21
E19
D22
D20
B22
C22
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
C1XAVDD
C1XAVSS
C4XAVDD
AJ27
C4XAVSS
C4XAVDD
HD#56
HD#55
B23
A23
HD#55
HD#54
HVREF
U21
HD#54
D21
HD#53
T21
P21
HVREF0
HVREF1
HD#53
HD#52
F22
D24
HD#52
HD#51
6
VAD[0..11]
VBD[0..11]
HPCOMP
HNCOMP
HNCVREF
VBD7
VBD6
VBD5
N21
J17
B20
B19
A19A7F9B7M6M5M4L3L6L4K6L2K3J3K4J2J6J4J1H6F4F1G6E3F5E2E4E1D3D4C2F7C3E6B2D5D6A3D7C5A5C6D8
ST0
ST1
ST2
AAD0
AAD1
HVREF2
HVREF3
HVREF4
HPCOMP
HNCOMP
HNCOMPVREF
AAD2
VBD4
AAD3
VBD3
AAD4
VBD2
AAD5
VBD1
AAD6
VBD0
VAD6
AAD7
5
VAD[0..11] 17
VBD[0..11] 17
VAD5
VAD4
VAD7
AAD8
AAD9
AAD10
VAD8
AAD11
VAD9
AAD12
VAD10
AAD13
VAD11
AAD14
AAD16
AAD15
AAD17
AAD16
AAD18
AAD17
VBD11
AAD18
VBD10
AAD19
VBD8
AAD20
VBD9
AAD21
VAD1
AAD22
VAD0
AAD23
VAD2
AAD24
VAD3
AAD25
AAD26
651-1
HD#51
HD#50
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#37
HD#36
HD#35
HD#34
HD#33
HD#32
HD#31
HD#30
HD#29
HD#28
HD#27
HD#26
HD#25
HD#24
HD#23
HD#22
HD#21
HD#20
HD#19
HD#18
HD#17
HD#16
HD#15
J28
M24
L26
HD#18
HD#20
HD#19
1 2
X_COPPER
X_80-0603
1 2
X_COPPER
K26
HD#17
CP55
L70
CP53
L25
HD#16
L28
HD#15
HD#14
M26
HD#14
P26
HD#13
C362
103p
D23
HD#50
6
C24
B24
HD#49
HD#48
X_COPPER
X_COPPER
E25
E23
D25
HD#47
HD#46
HD#45
CP54
1 2
L69
X_80-0603
CP52
1 2
A25
HD#44
C26
HD#43
B26
HD#42
B27
HD#41
D26
HD#40
B28
HD#39
VCC3
E26
HD#38
C376
X_1u
F28
HD#37
G25
HD#36
F27
HD#35
F26
HD#34
G24
HD#33
H24
HD#32
G29
J26
G26
HD#31
HD#30
HD#29
C4XAVDD
C4XAVSS
5
J25
HD#28
H26
HD#27
G28
HD#26
H28
HD#25
J24
HD#24
K28
HD#23
J29
HD#22
K27
HD#21
C363
103p
4
VBBLANK
VBCTL0
VBCTL1
VBHSYNC
VBVSYNC
SBA7
AAD27
AAD28
AAD29
AAD30
AAD31
AGP
HD#13
HD#12
HD#11
HD#10
HD#9
HD#8
HD#7
L29
N24
N26
M27
N28
P27
N29
HD#9
HD#8
HD#7
HD#6
HD#12
HD#11
HD#10
VCC3
A4XAVDD
A4XAVSS
4
SBA6
HD#6
R24
HD#5
SBA5
HD#5
R28
SBA4
HD#4
HD#4
M28
HD#3
SBA3
HD#3
P28
HD#2
SBA2
HD#2
R26
HD#1
C7
SBA1
HD#1
R29
HD#0
C227
104p
VBBLANK 17
VBCTL0 17
VBCTL1 17
VBHSYNC 17
VBVSYNC 17
VBCLK
SBA0
AC/BE#3
AC/BE#2
AC/BE#1
AC/BE#0
AFRAME#
ADEVSEL#
ASERR#
AGP8XDET
SB_STB#
AD_STB0
AD_STB#0
AD_STB1
AD_STB#1
AGPCLK
AGPRCOMP
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
AGPVREF
AGPVSSREF
HDSTBN#3
HDSTBN#2
HDSTBN#1
HDSTBN#0
HDSTBP#3
HDSTBP#2
HDSTBP#1
HDSTBP#0
HD#0
DBI#3
DBI#2
E21
A27
H27
HDBI#3
HDBI#2
HDBI#1
X_COPPER
C223
103p
X_COPPER
AREQ#
AGNT#
AIRDY#
ATRDY#
ASTOP#
APAR
RBF#
WBF#
PIPE#
ADBIH
ADBIL
SB_STB
DBI#1
DBI#0
R25
HDBI#0
CP30
1 2
L42
X_80-0603
1 2
3
VBCLK 17
U18A
F6
F3
H4
K5
C9
A6
G2
G1
G3
G4
H5
H1
H3
E8
F8
D9
D10
B3
C4
B5
A4
K1
L1
C1
D1
B10
M1
B9
A9
B8
A8
M3
M2
F20
F23
K24
P24
F21
F24
L24
N25
SIS651
CP32
3
ADSTB0
ADSTB#0
VGCLK
ADSTB#1
AGPCLK0
AGPRCOMP
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
R257 8.2K
HDSTBN#3
HDSTBN#2
HDSTBN#1
HDSTBN#0
HDSTBP#3
HDSTBP#2
HDSTBP#1
HDSTBP#0
HDBI#[0..3] 5
VCC3
C218
X_1u
2
U18-1
N.B HEAT SINK
VBCAD 17
AAD16
AAD17
A1XAVDD
A1XAVSS
AAD18
ADSTB0
ADSTB#0
ADSTB#1
C224
104p
RN45 X_8.2K
R243 8.2K
R234 8.2K
CP29
1 2
X_COPPER
L43
X_80-0603
C228
103p
CP33
1 2
X_COPPER
7 41 Friday, September 20, 2002
VBHCLK 17
VGCLK 17
AGPCLK0 3
R249 62
HDSTBN#3 5
HDSTBN#2 5
HDSTBN#1 5
HDSTBN#0 5
HDSTBP#3 5
HDSTBP#2 5
HDSTBP#1 5
HDSTBP#0 5
VCC3
MICRO-STAR INT'L CO.,LTD.
Title
SIS651-AGP&HOST
Size Document Number Rev
MS-6535 200
Custom
Date: Sheet of
2
1
VDDQ
1 2
3 4
5 6
7 8
VCC3
C217
X_1u
1
8
7
6
5
4
3
2
1
RMD[0..63]
RDQM[0..7]
RDQS[0..7]
RMA[0..14]
RCS-[0..3]
CKE[0..3]
RMA2
RMA3
RMA1
RMA4
RMA11
RMA12
RMA0
L = 1.2"
RCS-0
RCS-2
RCS-1
RCS-3
S3AUXSW# 37
SDCLK 3
FWDSDCLKO 4
DDRAVDD
DDRAVSS
DDRVREFA
DDRVREFB
SDAVDD
SDAVSS
C336
104p
RMD[0..63] 11,12
RDQM[0..7] 11,12
RDQS[0..7] 11,12
RMA[0..14] 11,12
RCS-[0..3] 11,12
CKE[0..3] 11
C329
104p
C335
X_103p
C357
X_103p
C377
103p
C353
X_103p
103p
X_COPPER
VCCM
VCCM
1 2
X_COPPER
X_80-0603
C330
X_103p
1 2
X_COPPER
CP50
1 2
L64
X_80-0603
CP49
1 2
X_COPPER
R309
150RST
R322
150RST
R308
150RST
R321
150RST
CP48
VCC3
L62
CP47
VCC3
C403
X_1u
RMA14
MA13
DQS2
RN64
RMA7
7 8
RMA8
5 6
RMA5
3 4
RMA6
1 2
X_0
R431 X_0
R432 0
R433 10
RMA14
RMA13
RDQS2
Rs place close to DDR1
L = 1"~ 3" L = 0.4" from RN to DDR1
RMA0
AH11
RMA1
AF12
RMA2
AH12
RMA3
AG12
RMA4
AD12
RMA5
AH15
RMA6
AF15
AH16
RMA8
AE15
RMA9
AD15
RMA10
AF11
RMA11
AG8
RMA12
AJ11
MA13 RMA10
AG16
RMA14
AF16
RSRAS#
AH8
RSCAS#
AJ7
RSWE#
AH7
L = 1" ~ 3"
AE7
RCS-0
AF7
RCS-2
AH6
RCS-1
AJ5
RCS-3
AF8
AD7
AB2
AA4
AB1
Y6
AA5
Y5
Y4
AA3
R311 22
AD11
AE11
Y1
RN60 X_0
R411 X_0
R412 X_0
S3AUXSW#
R286 4.7K
C364
X_10p
Near SIS651
1 2
3 4
5 6
7 8
RN59 X_0
RSCAS#
RSWE#
RN54 X_0
FWDSDCLKO
1 2
3 4
5 6
7 8
7 8
5 6
3 4
1 2
VCC3SBY
Y2
AA1
AA2
AJ19
AH2
R282 4.7K
W3
VCC3SBY
RSCAS# 11,12
RSWE# 11,12
RMA7
RMA8
RMA5
RMA6
D D
The L of RN to DDR1 is 0.4"
Rs place close to DDR1
RMD1 MD1 MD0
RMD5 MD5 MD1
RMD0 MD0 MD2
RMD4 MD4 MD3
RMD6 MD6 MD4
RMD2 MD2 MD5
RDQM0 DQM0 MD6
RDQS0 DQS0 MD7
RMD9 MD9 DQM0
RMD8 MD8 DQS0
RMD7 MD7 MD8
RMD3 MD3 MD9
RMD11 MD11 MD10
RMD10 MD10 MD11
RMD15 MD15 MD12
RMD14 MD14 MD13
RDQM1 DQM1 MD14 RMA7
RMD13 MD13 MD15
RDQS1 DQS1 DQM1
RMD12 MD12 DQS1
RMD21 MD21 MD16
C C
B B
A A
RMD17 MD17 MD17
RMD16 MD16 MD18
RMD20 MD20 MD19
RMD22 MD22 MD20
RMD18 MD18 MD21
RDQM2 DQM2 MD22
RMA9
RMD28 MD28
RMD24 MD24
RMD19
RMD23
RMD31
RMD27 MD27
RMD30 MD30
RMD26 MD26
RDQM3 DQM3
RDQS3 DQS3
RMD25 MD25
RMD29 MD29
RMD33 MD33
RMD37 MD37
RMD36 MD36
RMD32 MD32
RMD38 MD38
RMD34 MD34
RDQM4 DQM4
RDQS4
RMD40 MD40
RMD35 MD35
RMD39 MD39
RDQS5 DQS5
RDQM5 DQM5
RMD41 MD41
RMD45 MD45
RMD47 MD47
RMD46 MD46
RMD43 MD43
RMD42 MD42
RMD55 MD55
RDQS6 DQS6
RMD54 MD54
RDQM6 DQM6
RMD53 MD53
RMD52 MD52
RMD49 MD49
RMD48 MD48
RMD56 MD56
RMD60 MD60
RMD51 MD51
RMD50 MD50
RMD62 MD62
RDQM7 DQM7
RMD57 MD57
RMD61 MD61
RMD59 MD59
RMD63 MD63
RMD58 MD58
RDQS7 DQS7
1 2
RN73
3 4
5 6
10
7 8
1 2
RN72
3 4
5 6
10
7 8
RN71101 2
3 4
5 6
7 8
RN69101 2
3 4
5 6
7 8
RN70101 2
3 4
5 6
7 8
1 2
RN67
3 4
5 6
10
7 8
1 2
RN65
3 4
5 6
10
7 8
1 2
RN63
3 4
5 6
10
7 8 C374
1 2
RN61
3 4
5 6
10
7 8
RN62101 2
3 4
5 6
7 8
RN58101 2
3 4
5 6
7 8
RN57101 2
3 4
5 6
7 8
1 2
RN56
3 4
5 6
10
7 8
1 2
RN53
3 4
5 6
10
7 8
RN52101 2
3 4
5 6
7 8
RN50101 2
3 4
5 6
7 8
RN51101 2
3 4
5 6
7 8
1 2
RN49
3 4
5 6
10
7 8
1 2
RN48
3 4
5 6
10
7 8
1 2
3 4
5 6
RN47
10
7 8
RMA9
MD19
MD23
MD31
DQS4
L = 2"~4"
U18B
AJ23
MD0
AG22
MD1
AH21
MD2
AJ21
MD3
AD23
MD4
AE23
MD5
AF22
MD6
AF21
MD7
AD22
DQM0
AH22
DQS0/CSB#0
AD21
MD8
AG20
MD9
AE19
MD10
AF19
MD11
AE21
MD12
AD20
MD13
AD19
MD14
AH19
MD15
AF20
DQM1
AH20
DQS1/CSB#1
AF18
MD16
AG18
MD17
AH17
MD18
AD16
MD19
AD18
MD20
AD17
MD21
AF17
AJ17
AE17
AH18
AD14
AG14
AJ13
AE13
AJ15
AF14
AD13
AF13
AH13
AH14
AD10
AH10
AG10
AF10
AE9
AD8
AH9
AF9
AD9
AJ9
AH5
AG4
AE5
AH3
AG6
AF6
AF5
AF4
AH4
AJ3
AE4
AD6
AE2
AC5
AG2
AG1
AF3
AC6
AD4
AF2
AB6
AD3
AA6
AB3
AC4
AE1
AD2
AC1
AB4
AC2
MD22
MD23
DQM2
DQS2/CSB#2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3/CSB#3
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4/CSB#4
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5/CSB#5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6/CSB#6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7/CSB#7
651-2
MD23
DQM2
DQS2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3
MD32 CKE0
MD33 CKE1
MD34 CKE2
MD35 CKE3
MD36
MD37
MD38
MD39
DQM4
DQS4
MD40 SDCLK
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5 SDAVDD
DQS5
MD48 SDAVSS
MD49
MD50
MD51 DDRAVDD
MD52
MD53 DDRAVSS
MD54
MD55
DQM6
DQS6 DDRVREFA
MD56 DDRVREFB
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7
MA10
MA11
MA12
MA13
MA14
SRAS#
SCAS#
SWE#
CS#0
CS#1
CS#2
CS#3
CS#4
CS#5
CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
S3AUXSW#
SDCLK
FWDSDCLKO
SDRCLKI
SDAVDD
SDAVSS
DDRAVDD
DDRAVSS
DDRVREFA
DDRVREFB
DRAM_SEL
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
SIS651
MICRO-STAR INT'L CO.,LTD.
RSRAS#
RSRAS# 11,12
8
R427 X_0
MD44 RMD44
R413
RSRAS#
10
7
6
5
4
3
Title
SIS651-MEMORY
Size Document Number Rev
MS-6535 200
Custom
Date: Sheet of
2
8 41 Friday, September 20, 2002
1
8
D D
R277
R276
150RST
1 2
L57
X_80-0603
1 2
X_COPPER
1 2
L55
X_80-0603
1 2
X_COPPER
CP43
CP44
CP41
CP40
ZAD[0..15]
ZSTB[0..1]
ZSTB-[0..1]
C298
X_104p
ZVREF
C289
104p
C305
104p
104p
ZAD[0..15] 13
ZSTB[0..1] 13
ZSTB-[0..1] 13
C C
VCC1_8
150RST
B B
VCC3
VCC3 VCC1_8
A A
X_COPPER
C331
X_1u
X_COPPER
8
C299
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
7
NOTE: This page is for universal PCB design( suitable for both 645 or 650)
ZCLK0 3
ZUREQ 13
ZDREQ 13
C278
X_1u
7
6
NB Hardware Trap Table
DLLEN#
DRAM_SEL
TRAP0
TRAP1
CSYNC
RSYNC
LSYNC
ZCLK0
ZUREQ
ZDREQ
ZSTB0 ROUT
ZSTB-0 GOUT
ZSTB1
ZSTB-1 HSYNC
ZAD0
ZAD1 DDC1CLK
ZAD2
ZAD3
ZAD4
ZAD5 INTA#
ZAD6
ZAD7
ZAD8 CSYNC
ZAD9 RSYNC
ZAD10 LSYNC
ZAD11
ZAD12
ZAD13 VCOMP
ZAD14 VRSET
ZAD15 VVBWN
ZVREF
VDDZCMP
ZCMP_N
ZCMP_P DACAVSS1/2
VSSZCMP
Z1XAVDD DCLKAVSS
Z1XAVSS
Z4XAVDD ECLKAVSS
Z4XAVSS
CP36
1 2
X_COPPER
L52
X_80-0603
CP37
1 2
X_COPPER
0
enable PLL disable PLL
SDR DDR
normal NB debug mode
TV selection, NTSC/PAL(0/1) 0
enable VB
enable VGA interface
enable panel link
U18C
SIS651
V3
ZCLK
U6
ZUREQ
U1
ZDREQ
T3
ZSTB0
T1
ZSTB#0
P1
ZSTB1
P3
ZSTB#1
T4
ZAD0
R3
ZAD1
T5
ZAD2
T6
ZAD3
R2
ZAD4
R6
ZAD5
R1
ZAD6
R4
ZAD7
P4
ZAD8
N3
ZAD9
P5
ZAD10
P6
ZAD11
N1
N6
N2
N4
U3
V5
U4
U2
V6
W1
W2
V2
V1
PCIRST#1 17,27,37
PWRGD 14,37
AUXOK 14,37
C273
104p
6
ZAD12
ZAD13
ZAD14
ZAD15
ZVREF
VDDZCMP
ZCMP_N
ZCMP_P
VSSZCMP
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
PCIRST#1
HyperZip
PWRGD
AUXOK
R266 56
R271 56
1
VGA
Stereo
Glass
651-3
PCIRST#
PWROK
AUXOK
Y3W4W6
5
D11
5
TRAP1
E10
TRAP1
VDDZCMP
TRAP0
A10
ZCMP_N
ZCMP_P
VSSZCMP
Default
1(DDR)
TESTMODE2
TESTMODE1
TESTMODE0
F11
C11
DLLEN#
E11
0
0
0
1
0
ENTEST
F10
ENTEST
4
embedded pull-low
(30~50K Ohm)
yes
yes
yes
C15
VOSCI
A12
ROUT
B13
GOUT
A13
BOUT
F13
HSYNC
E13
VSYNC
D13
VGPIO0
D12
VGPIO1
B11
INT#A
E12
CSYNC
A11
RSYNC
F12
LSYNC
E14
VCOMP
D14
VRSET
F14
VVBWN
B12
DACAVDD1
C12
DACAVSS1
C13
DACAVDD2
C14
DACAVSS2
B15
DCLKAVDD
A15
DCLKAVSS
B14
ECLKAVDD
A14
ECLKAVSS
4
R218
R219
R220
R210 33
R211 33
R213 100
R212 100
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
C212
C219
104p
104p
0
0
0
REFCLK0
VSYNC
DDC1DATA
DACAVDD1/2
DCLKAVDD
ECLKAVDD
1 2
X_COPPER
L38
1 2
X_COPPER
X_80-0603
1 2
X_COPPER
L39 X_80-0603
1 2
X_COPPER
L40 X_80-0603
BOUT
CP26
X_80-0603
CP28
CP31
CP27
3
3
L41
W = 5mil
REFCLK0 3
ROUT 33
GOUT 33
BOUT 33
HSYNC 33
VSYNC 33
DDC1CLK 33
DDC1DATA 33
INTA# 13,17,19
VCC3
C506
X_1u
VCC3
2
for 650 only
RSYNC
R214 4.7K
TRAP1
R215 4.7K
CSYNC
R206 4.7K
LSYNC
R207 4.7K
ENTEST
R209 4.7K
PWRGD
C320 X_104p
C220
VVBWN
VCOMP
DACAVDD1/2
DACAVSS1/2
Title
Size Document Number Rev
Date: Sheet of
104p
C221
104p
C222
104p
Near C13 pin Near B12 pin
MICRO-STAR INT'L CO.,LTD.
SIS651-VGA & Z-link
MS-6535 200
Custom
2
C216
1u
L37 X_80-0603
CP24
1 2
X_COPPER
L36
CP25
1 2
X_COPPER
X_80-0603
1
VRSET
VCC1_8
9 41 Friday, September 20, 2002
1
VCC3
C263
X_1u
R203
130RST
8
7
6
5
4
3
2
1
VCCP VCC1_8 VCC3
H21
H22
J16
J20
J21
J22
K16
K17
K18
K19
K20
K21
L20
M20
N20
P20
R20
R21
T20
U20
V20
W20
Y20
Y21
AA20
AA21
AA22
AB21
AB22
L12
L14
L15
L16
L18
M11
M19
N11
P19
R11
T19
U11
V19
W11
W13
W15
W17
P11
IVDD
VSS
J14
IVDD
IVDD
IVDD
PVDDZ
VSS
VSS
VSS
VSS
VSS
VSS
U17
U18
V12
V13
V14
V15
V16
5
VCCP
A16
VTT
A17
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
651-4
VSS
VSS
VSS
VSS
VSS
VSS
P16
P17
P18
R12
R13
R14
VTT
IVDD
IVDD
Power
VSS
VSS
VSS
VSS
R15
R16
R17
R18
6
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
T12
T13
T14
T15
VSS
T16
T17
T18
U12
U13
U14
U15
U16
VTT
A18
VTT
D D
VCCM
C C
VDDQ
B B
VCC1_8
A A
B16
VTT
B17
VTT
B18
VTT
C16
VTT
C17
VTT
C18
VTT
D15
VTT
D16
VTT
D17
VTT
D18
VTT
E15
VTT
E16
VTT
E17
VTT
E18
VTT
F15
VTT
F16
VTT
F17
VTT
F18
VTT
AB5
VDDM
AD5
VDDM
AE6
VDDM
AE8
VDDM
AE10
VDDM
AE12
VDDM
AE14
VDDM
AE16
VDDM
AE18
VDDM
AE20
VDDM
AE22
VDDM
V10
VDDM
V11
VDDM
W18
VDDM
Y9
VDDM
Y10
VDDM
Y12
VDDM
Y14
VDDM
Y16
VDDM
Y18
VDDM
Y19
VDDM
AA8
VDDM
AA9
VDDM
AA10
VDDM
AA13
VDDM
AA14
VDDM
AA15
VDDM
AA16
VDDM
AA17
VDDM
AB8
VDDM
AB9
VDDM
AB13
VDDM
AB17
VDDM
E5
VDDQ
E7
VDDQ
E9
VDDQ
G5
VDDQ
J5
VDDQ
L5
VDDQ
H8
VDDQ
H9
VDDQ
J8
VDDQ
J9
VDDQ
J10
VDDQ
J13
VDDQ
K9
VDDQ
K11
VDDQ
K13
VDDQ
L10
VDDQ
N9
VDDQ
N10
VDDQ
N5
VDDZ
R5
VDDZ
U5
VDDZ
W5
VDDZ
P9
VDDZ
P10
VDDZ
R9
VDDZ
R10
VDDZ
T9
VDDZ
T10
VDDZ
T11
VDDZ
PVDDP
PVDDP
PVDDP
PVDDP
PVDDP
PVDDP
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L17
L19
N19
R19
U19
W19
M12
M13
M14
M15
M16
M17
M18
N12
N13
N14
N15
VCC1_8
8
7
VSS
N16
N17
N18
P12
P13
P14
P15
J15
OVDD
VSS
V17
K15
OVDD
VSS
V18
K10
OVDD
VSS
K12
PVDD
B25
K14
PVDD
VSS
C28
M10
PVDD
VSS
C29
VCC3SBY
W10
PVDD
VSS
VSS
D27
D28
Y11
Y13
PVDDM
PVDDM
VSS
VSS
E28
E29
Y15
Y17
PVDDM
PVDDM
VSS
VSS
AF23
AF24
PVDDM
VSS
VSS
AF25
AG24
AUX1.8
AUX3.3
VSS
AG26
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH23
VSS
AH24
VCC3SBY
U18D
U10
VCC1_8SBY
U9
VCC3SBY
A20
A22
A24
A26
C19
C21
C23
C25
C27
E20
E22
E24
F25
H25
K25
M25
P25
T25
V25
Y25
AB25
AD25
E27
G27
J27
L27
N27
R27
U27
W27
AA27
AC27
AE27
D29
F29
H29
K29
VDDQ
M29
P29
T29
V29
Y29
AB29
AD29
AF29
AE24
AG25
B4
B6
C8
C10
D2
F2
H2
K2
P2
T2
V4
AD1
AF1
AC3
AE3
AG3
AG5
AG7
AG9
AG11
AG13
AG15
AG17
AG19
AG21
AG23
AJ4
AJ6
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
AJ20
AJ22
AJ24
AG27
VSS
SIS651
4
VCCP
VCCP
C231
104p
C232
104p
Place these capacitors under 650 solder
side, DO NOT stuff
VCC1_8
C524
X_104p
C520
X_104p
C516
X_104p
C521
X_104p
3
C286
1u
C209
1u
C358
1u
C226
104p
C233
104p
X_1u-0805
X_1u-0805
X_1u-0805
X_1u-0805
C522
C517
C518
C519
C322
1u
C368
104p
VCCM
VCC3
C326
1u
C337
104p
C225
104p
VCC1_8SBY
C395
104p
C213
104p
C347
104p
C208
104p
C359
X_10u-0805
C361
X_10u-0805
VCCM
C528
X_104p
C529
X_104p
C527
X_104p
C526
X_104p
MICRO-STAR INT'L CO.,LTD.
Title
SIS651-POWER
Size Document Number Rev
MS-6535 200
Custom
Date: Sheet of
2
C355
104p
C375
104p
VCC3 VDDQ
C512
X_104p
C515
X_104p
C265
1u
C267
104p
VCC3SBY
C356
1u
C354
104p
C523
X_104p
C525
X_104p
C511
X_104p
C513
X_104p
10 41 Friday, September 20, 2002
1
8
7
6
5
4
3
2
1
RMD[0..63] 8,12
RMA[0..14] 8,12
RDQM[0..7] 8,12
RDQS[0..7] 8,12
D D
NOTE:
VDDID IS A TRAP ON THE DDR
MODULE TO INDICATE:
VDDID
OPEN
GND
MEMORY MUX TABLE:
SDR
CS0
CS1
CS2
CS3
CS4
CS5 CS5
CSB0
CSB1
CSB2
CSB3
CSB4
CSB5
CSB6
C C
CSB7
DDRVREF GEN. & DECOUPLING
VCCM
R393
75RST
R392
75RST
B B
A A
RMA[0..14] RMA[0..14]
RDQM[0..7] RDQM[0..7]
VCCM
RDQS[0..7] RDQS[0..7]
DDR1
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VDDID
VSS
VDDQ
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
VREF
SCL
SDA
VSS
15223054627796
VDDQ
VDDQ
2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
1
82
90
WP
92
91
181
SA0
182
SA1
183
SA2
VSS
VSS
DDR SDRAM DIMM
3111826344250586674818993
RMD0
RMD1
RMD2
RMD3
RMD4
RMD5
RMD6
RMD7
RMD8
RMD9
RMD10
RMD11
RMD12
RMD13
RMD14
RMD15
RMD16
RMD17
RMD18
RMD19
RMD20
RMD21
RMD22
RMD23
RMD24
RMD25
RMD26
RMD27
RMD28
RMD29
RMD30
RMD31
RMD32
RMD33
RMD34
RMD35
RMD36
RMD37
RMD38
RMD39
RMD40
RMD41
RMD42
RMD43
RMD44
RMD45
RMD46
RMD47
RMD48
RMD49
RMD50
RMD51
RMD52
RMD53
RMD54
RMD55
RMD56
RMD57
RMD58
RMD59
RMD60
RMD61
RMD62
RMD63
DDRVREF DDRVREF
SMBDAT
5
104
112
128
136
143
156
164
172
180738467085108
VDD
VDD
VDD
VDD
VDD
VDD
120
VDD
148
VDD
168
VDD
184
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
97
107
119
129
149
159
169
177
140
14
25
36
56
67
78
86
47
44
45
49
51
134
135
142
144
10
101
102
173
167
154
65
63
157
158
71
163
21
111
137
16
76
138
17
75
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
5
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
9
NC
NC(RESET#)
NC
NC
NC
NC(FETEN)
RAS#
CAS#
WE#
S0#
S1#
NC(S2#)
NC(S3#)
CKE0
CKE1
CK0
CK1
CK2
CK0#
CK1#
CK2#
REQUIRED POWER
VDD=VDDQ
VDD!=VDDQ
DDR
CS0
CS1
CS2
CS3
CS4
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
VCCM VCCM
R371 X_8.2K
C472
X_103p
RMA0 RMD4
RMA1 RMD5
RMA2 RMD6
RMA3 RMD7
RMA4 RMD8
RMA5 RMD9
RMA6 RMD10
RMA7 RMD11
RMA8 RMD12
RMA9 RMD13
RMA10 RMD14
RMA13 RMD15
RMA14 RMD16
RMA11 RMA11 RMD19
RMA12 RMA12 RMD20
RDQM0 RMD23
RDQM1 RMD24
RDQM2 RMD25
RDQM3 RMD26
RDQM4 RMD27
RDQM5 RMD28
RDQM6 RMD29
RDQM7 RMD30
RDQS0 RMD33
RDQS1 RMD34
RDQS2 RMD35
RDQS3 RMD36
RDQS4 RMD37
RDQS5 RMD38
RDQS6 RMD39
RDQS7 RMD40
DDRVREF
C473
C448
103p
103p
RSRAS# RSRAS# RMD59
RSRAS# 8,12
RSCAS# RSCAS# RMD60
RSCAS# 8,12
RSWE# RSWE# RMD61
RSWE# 8,12
RCS-0 RCS-2 RMD63
RCS-1 RCS-3
CKE0 WP CKE2
CKE1 SMBCLK CKE3
DDRCLK1
DDRCLK8
DDRCLK2
DDRCLK-1
DDRCLK-8
DDRCLK-2
RCS-[0..3] 8,12
DDRCLK[0..8] 4
DDRCLK-[0..8] 4
8
RCS-[0..3]
CKE[0..3]
CKE[0..3] 8
DDRCLK[0..8]
DDRCLK-[0..8]
7
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
124
132
139
145
152
160
176
116
VDDQ
VSS
100
6
VDDQ
VSS
VDDQ
VDDQ
addr =
1010000b
VSS
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
RMD[0..63]
R370 X_8.2K
CKE2
CKE0
CKE3
CKE1
470
4
DDRCLK0
DDRCLK7
DDRCLK3
DDRCLK-0
DDRCLK-7
DDRCLK-3
RN68
1 2
3 4
5 6
7 8
RDQM0
RDQM1
RDQM2
RDQM3
RDQM4
RDQM5
RDQM6
RDQM7
RDQS0
RDQS1
RDQS2
RDQS3
RDQS4
RDQS5
RDQS6
RDQS7
RMA0
RMA1
RMA2
RMA3
RMA4
RMA5
RMA6
RMA7
RMA8
RMA9
RMA10
RMA13
RMA14
VCCM
VCCM
120
148
168
184
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
97
107
119
129
149
159
169
177
140
14
25
36
56
67
78
86
47
44
45
49
51
134
135
142
144
10
101
102
173
167
154
65
63
157
158
71
163
21
111
137
16
76
138
17
75
VDD
VDD
VDD
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
5
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
9
NC
NC(RESET#)
NC
NC
NC
NC(FETEN)
RAS#
CAS#
WE#
S0#
S1#
NC(S2#)
NC(S3#)
CKE0
CKE1
CK0
CK1
CK2
CK0#
CK1#
CK2#
3
DDR2
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VDDID
VSS
VDDQ
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
VREF
SCL
SDA
VSS
15223054627796
VDDQ
VDDQ
2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
1
82
90
WP
92
91
181
SA0
182
SA1
183
SA2
VSS
VSS
DDR SDRAM DIMM
3111826344250586674818993
RMD0
RMD1
RMD2
RMD3
RMD17
RMD18
RMD21
RMD22
RMD31
RMD32
RMD41
RMD42
RMD43
RMD44
RMD45
RMD46
RMD47
RMD48
RMD49
RMD50
RMD51
RMD52
RMD53
RMD54
RMD55
RMD56
RMD57
RMD58
RMD62
R369 4.7K
WP
SMBCLK
SMBDAT
DDR DECOUPLING,
STUFF 2, THE OTHER
RESERVED
VCCM
SMBCLK 3,4,14,37
SMBDAT 3,4,14,37
VCCM
C441
104p
C442
104p
C440
X_104p
C444
X_104p
C445
X_104p
C446
X_104p
C449
X_104p
C447
X_104p
C443
X_104p
VCCM
104
112
128
136
143
156
164
172
180738467085108
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
addr =
1010001b
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
160
176
100
116
124
132
139
145
152
MICRO-STAR INT'L CO.,LTD.
Title
DDR1 & DDR2
Size Document Number Rev
MS-6535 200
Custom
Date: Sheet of
2
11 41 Friday, September 20, 2002
1
SSTL-2 Termination Resistors
RMD[0..63]
RDQM[0..7]
RDQS[0..7]
RMA[0..14]
RCS-[0..3]
L = 0.4"
RMD1
RMD5
RMD0
RMD4
RMD6
RMD2
RDQM0
RDQS0
RMD9
RMD8
RMD7
RMD3
RDQM1
RMD13
RDQS1 RMD47
RMD12 RMD46
RMD11
RMD10
RMD14
RMA9
RMA13
RDQS2
RMD21
RMD17
RMA14
RMD16
RMD20
RMD19
RMD23
RMA5
RMA8
RMD27
RMD30
RMD26
RMA3
RDQM3
RMA4
RDQS3
RMD29
RMA7
RMD22
RMD18
RDQM2
RMD25
RMD28
RMA6
RMD24
RMA0
RMA1
RMA2
RMD31
RMD39
RMA11
RMD38
RMD34
RN88 47
RN87 47
RN86 47
RN85 47
RN84 47
RN82 47
RN83 47
RN80 47
RN77 47
RN78 47
RN81 47
RN79 47
RN76 47
RN99 47
RMD[0..63] 8,11
RDQM[0..7] 8,11
RDQS[0..7] 8,11
RMA[0..14] 8,11
RCS-[0..3] 8,11
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
MD/DQM(/DQS)
MA/Control
CS
CKE
RMD36
RMD32
RMA12
RMA10
RDQM4
RDQS4
RMD33
RMD37
RSRAS#
RSRAS# 8,11
RMD44
RMD40
RMD35
RMD43
RMD42
RCS-3 RMD15
RCS-2
RCS-0
RMD53
RMD52
RMD49
RMD48
RMD55
RDQS6
RMD54
RDQM6
RMD59
RMD63
RMD58
RDQS7
RMD56
RMD60
RMD51
RMD50
RMD62
RDQM7
RMD57
RMD61
RDQS5
RDQM5
RCS-1
RSCAS#
RSCAS# 8,11
RMD41
RMD45
RSWE#
RSWE# 8,11
L = 0.4" e xcept RSC0~3 ( L=1.2" )
SDR
LV-CMOS
LV-CMOS
LV-CMOS
OD 3.3V OD 2.5V
RN101 47
RN100 47
RN98 47
RN94 47
RN96 47
RN93 47 1 2
RN92 47 1 2
RN89 47 1 2
RN91 47 1 2
RN90 47 1 2
RN95 47
RN97 47 1 2
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
3 4
5 6
7 8
3 4
5 6
7 8
3 4
5 6
7 8
3 4
5 6
7 8
3 4
5 6
7 8
1 2
3 4
5 6
7 8
3 4
5 6
7 8
DDR
Rs
SSTL-2
0/10/- 47
SSTL-2
10
SSTL-2
0
DDR_VTT
DDR_VTT
Rs
Rtt
10
0
47
0
47
DDR_VTT
DDR_VTT
DECOUPLING CAPACITOR FOR SSTL-2 END TERMIANTION VTT ISLAND
0603 Package plac ed within 200mils of VTT Termination R-packs
C474
X_1u
C475
1u
C476
X_1u
C477
1u
C490
X_1u
C491
1u
C492
X_1u
C493
1u
Did not stuff C476,C47 9,C482,C485,C488,C491,C494,C497,C500,C503 for DDR_VTT OK
C478
X_1u
C479
1u
C480
X_1u
C481
1u
C494
X_1u
C495
1u
C496
X_1u
C497
1u
C482
X_1u
C483
1u
C484
X_1u
C485
1u
C498
X_1u
C499
1u
C500
X_1u
C501
1u
C486
X_1u
C487
1u
C488
X_1u
C489
1u
Add 10uF-1206 Cap at the center
of DIMM c onn for DDR_VTT DC power
C502
X_1u
C503
1u
C504
X_1u
C505
1u
C540
10u-1206
MICRO-STAR INT'L CO.,LTD.
Title
DDR TERMINATOR
Size Document Number Rev
MS-6535 200
Custom
Date: Sheet of
12 41 Friday, September 20, 2002
8
INTB#
INTA#
INTC#
INTD#
D D
C C
VCC1_8
B B
A A
R93
150RST
R87
150RST
Analog Power supplies of Transzip function for 962 Chip.
CP5
VCC3 VCC3
1 2
X_COPPER
X_80-0603
1 2
X_COPPER
8
L8
CP6
RN25
8.2K
INTA# 9,17,19
INTB# 19,20,35
INTC# 19,20,35
INTD# 19,39
FRAME# 19,20,35,39
IRDY# 19,20,35,39
TRDY# 19,20,35,39
STOP# 19,20,35,39
SERR# 19,20,35,39
PAR 19,20,35,39
DEVSEL# 19,20,35,39
PLOCK# 19
96XPCLK 3
PCIRST# 37
ZCLK1 3
ZSTB0 9
ZSTB-0 9
ZSTB1 9
ZSTB-1 9
ZUREQ 9
ZDREQ 9
C88
X_104p
SZVREF IDEDB12
C91
104p
10
C82
104p
7
VCC3
1 2
3 4
5 6
7 8
PREQ#4 19,20
PREQ#3 19,39
PREQ#2 19,35
PREQ#1 19
PREQ#0 19
PGNT#4 19,20
PGNT#3 19,39
PGNT#2 19,35
PGNT#1 19
PGNT#0 19
C/BE#[0..3] 19,20,35,39
INTA#
INTB#
INTC# ICHRDYB
INTD# IDEREQB
FRAME# CBLIDB
IRDY#
TRDY# IDEIOR-B
STOP# IDEIOW-B
SERR#
PAR IDESAB2
DEVSEL# IDESAB1
PLOCK# IDESAB0
96XPCLK IDECS-B1
PCIRST# IDECS-B0
ZCLK1 IDEDA4
ZSTB0 IDEDA6
ZSTB-0 IDEDA7
ZSTB1 IDEDA9
ZSTB-1 IDEDA10
ZUREQ IDEDA13
ZDREQ IDEDA14
ZAD[0..15] 9
SZ1XAVDD
SZ1XAVSS
7
AD[0..31] 19,20,35,39
PREQ#4
PREQ#3
PREQ#2
PREQ#1
PREQ#0
PGNT#4
PGNT#3 IDEIOR-A
PGNT#2 IDEIOW-A
PGNT#1 IDACK-A
PGNT#0
C/BE#3 IDESAA1
C/BE#2 IDESAA0
C/BE#1
C/BE#0 IDECS-A1
R169 33
SVDDZCMP IDEDB0
SZCMP_N IDEDB1
SZCMP_P IDEDB3
SVSSZCMP IDEDB4
SZ1XAVDD IDEDB7
SZ1XAVSS IDEDB8
SZ4XAVDD IDEDB10
SZ4XAVSS IDEDB11
SZVREF IDEDB13
C81
X_1u
F1
F2
E1
H5
F3
H3
G1
G2
G3
H4
K3
M4
P1
R4
E3
F4
E2
G4
M3
M1
M2
N4
M5
N3
N1
N2
Y2
C3
V20
N19
N20
K20
K19
N16
N17
R19
N18
R18
P18
U20
U19
T20
T19
R20
P20
CP7
1 2
X_COPPER
L9
X_80-0603
CP8
1 2
X_COPPER
AD[0..31]
U8A
PREQ#4
PREQ#3
PREQ#2
PREQ#1
PREQ#0
PGNT#4
PGNT#3
PGNT#2
PGNT#1
PGNT#0
C/BE#3
C/BE#2
C/BE#1
C/BE#0
INT#A
INT#B
INT#C
INT#D
FRAME#
IRDY#
TRDY#
STOP#
SERR#
PAR
DEVSEL#
PLOCK#
PCICLK
PCIRST#
ZCLK
ZSTB0
ZSTB0#
ZSTB1
ZSTB1#
ZUREQ
ZDREQ
VDDZCMP
ZCMP_N
ZCMP_P
VSSZCMP
Z1XAVDD
Z1XAVSS
Z4XAVDD
SIS-SIS962L
Z4XAVSS
VZREF
ZVSSREF
6
AD31 ZAD0
AD30 ZAD1
AD29 ZAD2
AD28 ZAD3
J5J4H2H1J3K4J2J1K5K2L3K1L1L4L5L2N5P2P3P4R2R3R1T1P5T2U1U2T3R5U3
AD31
AD30
AD29
AD28
PCI
HyperZip
ZAD0
ZAD1
ZAD2
ZAD3
M18
M19
M17
M16
SZ4XAVDD
C85
104p
SZ4XAVSS
6
5
AD27 ZAD4
AD26 ZAD5
AD25 ZAD6
AD24 ZAD7
AD23 ZAD8
AD22 ZAD9
AD21 ZAD10
AD20 ZAD11
AD19 ZAD12
AD18 ZAD13
AD17 ZAD14
AD16 ZAD15
AD15
AD14
AD13
AD12
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
962L-1
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
M20
L16
L20
L18
K18
J20
ZAD15
K17
K16
H20
J18
H19
H18
VCC1_8
C96
X_1u
5
AD11
AD10
AD11
AD10
1 2
X_COPPER
1 2
AD9
AD8
AD7
AD9
AD8
AD7
IDE
CP11
L11
X_80-0603
CP10
X_COPPER
4
AD6
AD5
AD4
AD3
AD2
AD1
AD0
V1
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C109
104p
4
ICHRDYA
IDECSA#1
IDECSA#0
ICHRDYB
IDECSB#1
IDECSB#0
R106 56
R98 56
IDEAVDD
IDEAVSS
IDREQA
IIRQA
CBLIDA
IIOR#A
IIOW#A
IDACK#A
IDSAA2
IDSAA1
IDSAA0
IDREQB
IIRQB
CBLIDB
IIOR#B
IIOW#B
IDACK#B
IDSAB2
IDSAB1
IDSAB0
IDA10
IDA11
IDA12
IDA13
IDA14
IDA15
IDB10
IDB11
IDB12
IDB13
IDB14
IDB15
IDA0
IDA1
IDA2
IDA3
IDA4
IDA5
IDA6
IDA7
IDA8
IDA9
IDB0
IDB1
IDB2
IDB3
IDB4
IDB5
IDB6
IDB7
IDB8
IDB9
Y3
Y4
W10
V10
Y11
U12
V11
Y9
Y10
T11
U11
W11
T12
V12
W17
Y17
T16
U17
T14
W16
V16
Y18
T15
V17
U16
W18
U10
V9
W8
T9
Y7
V7
Y6
Y5
W6
U8
W7
V8
U9
Y8
T10
W9
Y16
V15
U14
W14
V13
T13
Y13
Y12
W12
W13
U13
Y14
V14
W15
Y15
U15
SVDDZCMP
SZCMP_N
SZCMP_P
SVSSZCMP
3
C80
103p
IDESAA2
IDECS-A0
IDEDA0
IDEDA1
IDEDA2
IDEDA3
IDEDA5
IDEDA8
IDEDA11
IDEDA12
IDEDA15
IDEDB2
IDEDB5
IDEDB6
IDEDB9
IDEDB14
IDEDB15
3
IDESAA[0..2]
IDECS-A[0..1]
IDESAB[0..2]
IDECS-B[0..1]
MICRO-STAR INT'L CO.,LTD.
Title
SIS962L-IDE , PCI , Z-link
Size Document Number Rev
MS-6535 200
Custom
Date: Sheet of
2
R78
80-0603
C79
104p
ICHRDYA
IDEREQA
IDEIRQA
CBLIDA
IDEIRQB
IDACK-B
Put near 961A Chip.
ZSTB0
ZSTB1
ZSTB-0
ZSTB-1
2
VCC1_8
C75
104p
ICHRDYA 22
IDEREQA 22
IDEIRQA 22
CBLIDA 22
IDEIOR-A 22
IDEIOW-A 22
IDACK-A 22
IDESAA[0..2] 22
IDECS-A[0..1] 22
ICHRDYB 22
IDEREQB 22
IDEIRQB 22
CBLIDB 22
IDEIOR-B 22
IDEIOW-B 22
IDACK-B 22
IDESAB[0..2] 22
IDECS-B[0..1] 22
IDEDA[0..15] 22
IDEDB[0..15] 22
R110 X_4.7K
R135 X_4.7K
R112 X_4.7K
R132 X_4.7K
VCC1_8
13 41 Friday, September 20, 2002
1
1